Indication device

Abstract

To provide a semiconductor device including oxide semiconductor with stable electric characteristics and higher reliability.SOLUTION: In a transistor including an oxide semiconductor film, a metal oxide film containing the same type of component as the oxide semiconductor film is stacked on an upper surface part and a lower surface part of the oxide semiconductor film, and an insulating film containing a component different from the metal oxide film and the oxide semiconductor film is provided in contact with a surface of the metal oxide film opposite to a surface thereof in contact with the oxide semiconductor film. In the oxide semiconductor film used as an active layer of the transistor, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are removed from the oxide semiconductor by heat treatment and oxygen, which is a main component material of the oxide semiconductor and decreases at the same time by the step of eliminating the impurities, is supplied. Thus, the oxide semiconductor film has the higher purity and is made electrically i-type (intrinsic).SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] A technology for constructing transistors using semiconductor thin films formed on substrates with insulating surfaces is The transistor is used in devices such as integrated circuits (ICs) and image display devices (display devices). Silicon is widely used as a semiconductor thin film that can be applied to transistors. Silicon-based semiconductor materials are widely known, but oxide semiconductors are also attracting attention. There are.

[0004] For example, the active layer of a transistor is 18 / cm 3 is less than Amorphous oxides containing indium (In), gallium (Ga), and zinc (Zn) were used. A transistor is disclosed (see Patent Document 1).

[0005] Transistors using oxide semiconductors have higher performance than transistors using amorphous silicon. Although they are faster and easier to manufacture than transistors using polycrystalline silicon, However, it is known that the electrical characteristics are easily fluctuated and reliability is low. The threshold voltage of the transistor changes before and after the test. In Patent Document 2 and Patent Document 3, the shift of the threshold voltage of a transistor using an oxide semiconductor is In order to suppress this, an interface formed on at least one of the upper surface and the lower surface of the oxide semiconductor layer A technique for preventing charge trapping at the interface of an oxide semiconductor layer by using a stabilization layer is disclosed. are. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-165528 [Patent Document 2] Japanese Patent Application Laid-Open No. 2010-16347 [Patent Document 3] Japanese Patent Application Laid-Open No. 2010-16348 Summary of the Invention [Problem to be solved by the invention]

[0007] However, the transistors disclosed in Patent Document 2 and Patent Document 3 do not include an interface stabilization layer. The gate insulating layer and the protective layer are made of the same material, and the condition of the interface with the active layer is Since the state cannot be maintained well, charge trapping occurs at the interface between the active layer and the interface stabilization layer. In particular, it is difficult to suppress the band gap between the interface stabilization layer and the active layer. If so, charge accumulation can easily occur.

[0008] Therefore, it is still believed that transistors including oxide semiconductors have sufficient reliability. I can't say.

[0009] In view of such problems, a method for imparting stable electrical characteristics to a semiconductor device using an oxide semiconductor is proposed. One of the objectives is to improve reliability. [Means for solving the problem]

[0010] One embodiment of the disclosed invention is a semiconductor device including an insulating film such as a gate insulating film or a protective insulating film and an active layer. The oxide semiconductor film is not in direct contact with the metal oxide film, but is in contact with the metal oxide film. The technical idea is that a metal oxide film exists, and the metal oxide film is made of the same kind of component as the oxide semiconductor film. That is, one embodiment of the disclosed invention is a metal oxide film and an oxide semiconductor film. a structure in which an insulating film made of a different component, a metal oxide film, and an oxide semiconductor film are stacked Here, the term "component of the same kind as the oxide semiconductor film" refers to a component of the oxide semiconductor film. It means that the metal element contains one or more metal elements selected from the group consisting of:

[0011] By providing such a laminated structure, electric charges that may be generated due to the operation of the semiconductor device, etc. and the like are sufficiently prevented from being captured at the interface between the insulating film and the oxide semiconductor film. This effect is achieved by using a metal film made of a material that is compatible with the oxide semiconductor film. When the metal oxide film is in contact with the oxide semiconductor film, the operation of the semiconductor device can be improved. The charges generated by the oxide semiconductor film are trapped at the interface between the oxide semiconductor film and the metal oxide film. Furthermore, an insulating film made of a material that can form a charge trapping center at the interface is provided. By making it present in a state of contact with the metal oxide film, it is possible to form a layer on the interface between the metal oxide film and the insulating film. This is due to the mechanism by which the aforementioned charge can be trapped.

[0012] That is, when a large amount of charge is generated in a metal oxide film alone, the metal oxide film and the oxide semiconductor film are incompatible. It becomes difficult to suppress the trapping of charges at the interface, and the By providing an insulating film, charges are preferentially captured at the interface between the metal oxide film and the insulating film, and the oxide Therefore, it is possible to suppress the trapping of charges at the interface between the compound semiconductor film and the metal oxide film. As described above, the effect of one embodiment of the disclosed invention is that the insulating film, the metal oxide film, and the oxide film The metal oxide film and the oxide semiconductor film are laminated. It can be said that the effects produced by the layered structure of the membrane are different in nature.

[0013] Then, the trapping of charges at the interface of the oxide semiconductor film is suppressed, and the trapping center of the charges is located in the oxide semiconductor. The above-mentioned effect of being able to keep the semiconductor device away from the conductive film reduces operational problems. This makes it possible to control the temperature and improve the reliability of the semiconductor device.

[0014] In view of the above-mentioned mechanism, it is desirable that the metal oxide film has a sufficient thickness. When the metal oxide film is thin, the influence of charges trapped at the interface between the metal oxide film and the insulating film increases. For example, a metal oxide film is thicker than an oxide semiconductor film. It is preferable to do so.

[0015] The insulating metal oxide film is connected to the source electrode, the drain electrode, and the oxide semiconductor film. Since the oxide semiconductor is formed in a manner that does not interfere with the connection of the source electrode or the drain electrode, This can prevent an increase in resistance compared to when a metal oxide film is present between the body membrane. Therefore, deterioration in the electrical characteristics of the transistor can be suppressed.

[0016] In the thin film formation process, oxide semiconductors may not have a stoichiometric composition due to an excess or deficiency of oxygen. If there is a deviation from the above or if hydrogen or moisture that forms electron donors gets mixed in, the electrical conductivity will decrease. Such a phenomenon is an electrical problem for a transistor using an oxide semiconductor. Therefore, hydrogen, moisture, hydroxyl groups, or hydrides (hydrogen compounds) are factors that cause fluctuations in the properties. impurities such as SiO 2 and SiO 2 are intentionally removed from the oxide semiconductor, and the oxide semiconductor is By supplying oxygen, which is the main component of oxide semiconductors and is simultaneously reduced, Therefore, the oxide semiconductor film is highly purified and made electrically i-type (intrinsic).

[0017] An i-type (intrinsic) oxide semiconductor is an oxide semiconductor that has had hydrogen, an n-type impurity, removed from it. By purifying the compound semiconductor to the extent possible, it is possible to minimize the amount of impurities other than the main component. i-type (intrinsic) oxide semiconductors or oxide semiconductors that are as close to i-type (intrinsic) as possible. do.

[0018] In the step of making the oxide semiconductor film i-type, a metal film having the same component as the oxide semiconductor film is used. It is also possible to simultaneously convert the metal oxide film to i-type. The metal oxide films provided on the upper and lower surfaces of the semiconductor film are sufficiently free of impurities such as moisture and hydrogen. It is desirable that the metal oxide film be an electrically i-type metal oxide film in which the conductivity is reduced to a minimum.

[0019] A transistor including a highly purified oxide semiconductor film has a low threshold voltage, an on-state current, and the like. The electrical characteristics show almost no temperature dependence. There is also little fluctuation.

[0020] A semiconductor device according to one embodiment of the present invention includes a gate electrode, a gate insulating film covering the gate electrode, and a gate insulating film. a first metal oxide film provided in contact with the gate insulating film; an oxide semiconductor film provided in a region overlapping with an electrode, and a source electrode in contact with the oxide semiconductor film; and a drain electrode, a second metal oxide film in contact with the oxide semiconductor film, and a second metal oxide film. and an insulating film covering the film.

[0021] In the semiconductor device, the second metal oxide film forms a source electrode and a drain electrode. The oxide semiconductor film is preferably provided to cover and be in contact with the first metal oxide film. It is more preferable that the metal oxide film is surrounded by the first metal oxide film and the second metal oxide film.

[0022] In the semiconductor device, at least a part of the top surface of the oxide semiconductor film is connected to the source electrode. In this case, the channel of the oxide semiconductor film may be in contact with the gate electrode and the drain electrode. Even if the side edge in the longitudinal direction coincides with the side edge in the channel length direction of the first metal oxide film, good.

[0023] Alternatively, in the above semiconductor device, at least one of the upper surfaces of the source electrode and the drain electrode is The portion may be in contact with the oxide semiconductor film. In this case, the channel of the oxide semiconductor film and a side end portion of the second metal oxide film in the channel length direction is aligned with a side end portion of the first metal oxide film in the channel length direction. Good too.

[0024] In any of the above semiconductor devices, the first metal oxide film and the second metal oxide film The film preferably contains the component elements of an oxide semiconductor film.

[0025] In any of the above semiconductor devices, the first metal oxide film and the second metal oxide film The energy gap of the film is preferably larger than the energy gap of the oxide semiconductor film. stomach.

[0026] In any of the above semiconductor devices, the first metal oxide film and the second metal oxide film The energy of the bottom of the conduction band of the film is higher than the energy of the bottom of the conduction band of the oxide semiconductor film. It is preferable that:

[0027] In any of the above semiconductor devices, the first metal oxide film and the second metal oxide film The film preferably contains gallium oxide, and the constituent elements of the first metal oxide film are It is more preferable that the ratio is equal to the ratio of the constituent elements of the second metal oxide film.

[0028] In any of the above semiconductor devices, a conductive film may be provided on the oxide film. .

[0029] In the above, the transistor is determined by the distance between the source electrode and the drain electrode. The channel length L is set to 10 nm or more and 10 μm or less, for example, 0.1 μm to 0.5 μm. Of course, the channel length L may be 1 μm or more. The channel width W can also be set to 10 nm or more. [Effects of the Invention]

[0030] According to one embodiment of the present invention, a transistor with stable electrical characteristics can be manufactured.

[0031] Another embodiment of the present invention is a semiconductor device including a highly reliable transistor with favorable electrical characteristics. It is possible to create a device. [Brief explanation of the drawings]

[0032] [Figure 1] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 2] FIG. 10 is a band diagram of a transistor including an oxide semiconductor film and a metal oxide film. [Figure 3] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 4] 1A to 1C illustrate an example of a manufacturing process of a semiconductor device. [Figure 5] 1A to 1C illustrate an example of a manufacturing process of a semiconductor device. [Figure 6] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 7] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 8] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 9] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 10] 1A and 1B are diagrams illustrating electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0033] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and it is understood by those skilled in the art that various modifications can be made to the modes and details. It will be easily understood. Furthermore, the present invention should not be construed as being limited to the description of the following embodiments. It is not something that can be done.

[0034] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of the processes or the order of stacking. Furthermore, in this specification, the specific name is not used as a matter for identifying the invention. It does not indicate a title.

[0035] (Embodiment 1) In this embodiment mode, one mode of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. and explain.

[0036] <Configuration example of semiconductor device> FIG. 1 shows a cross-sectional view and a plan view of a bottom-gate transistor as an example of a semiconductor device. Fig. 1(A) is a plan view, and Fig. 1(B) and Fig. 1(C) are views of the A- It should be noted that in FIG. 1(A), the cross section is shown in cross section B and cross section CD to avoid complication. In order to achieve this, some of the components of the transistor 310 (for example, the second metal oxide film 407) etc.) are omitted.

[0037] The transistor 310 shown in FIG. 1 includes a gate electrode 401 on a substrate 400 having an insulating surface. , a gate insulating film 402, a first metal oxide film 404, an oxide semiconductor film 403, and a source electrode. 405a, a drain electrode 405b, a second metal oxide film 407, and an insulating film 409. .

[0038] In the transistor 310 shown in FIG. 1, the second metal oxide film 407 is 5a and the drain electrode 405b, and the first metal oxide film 404 and the oxide semiconductor 1B and 1C, the second The second metal oxide film 407 and the first metal oxide film 404 are formed in the presence of the oxide semiconductor film 403. In other words, the oxide semiconductor film 403 is in contact with the first metal oxide film 4 4 and the second metal oxide film 407.

[0039] Here, the first metal oxide film 404 and the second metal oxide film 407 are formed of the oxide semiconductor film 4 It is preferable to use an oxide having the same components as those of the oxide semiconductor film 03. It is preferable to use a film containing an oxide of one or more metal elements selected from the group consisting of metal elements. Such a material is compatible with the oxide semiconductor film 403, and is used as the first metal oxide film 40 By using the metal oxide film 404 as the second metal oxide film 407, the state of the interface with the oxide semiconductor film can be improved. In other words, the above-mentioned materials can be used for the first metal oxide film 404 and the second metal oxide film 405. By using the metal oxide film 407, the interface between the oxide semiconductor film and the metal oxide film in contact with the oxide semiconductor film (Here, the interface between the first metal oxide film 404 and the oxide semiconductor film 403 or the second metal oxide film 404 is (interface between the metal oxide film 407 and the oxide semiconductor film 403) It is possible.

[0040] The first metal oxide film 404 and the second metal oxide film 407 are both oxide semiconductor films. Since the oxide semiconductor film 403 is made of the same material as the oxide semiconductor film 403, the oxide semiconductor film 403 is not present in the region. In the case where the first metal oxide is in contact with the first metal oxide, the adhesion can be improved. The ratio of the constituent elements of the metal oxide film 404 is equal to the ratio of the constituent elements of the second metal oxide film 407. is more preferable.

[0041] Since the oxide semiconductor film 403 is used as an active layer, the first metal oxide film 404 and The energy gap of the second metal oxide film 407 is The gap is required to be larger than the first metal oxide film 404. The second metal oxide film 407 and the oxide semiconductor film 403 are separated from each other by a small amount. At least, the oxide semiconductor film 403 is thick enough to prevent carriers from flowing out of the oxide semiconductor film 403 at room temperature (20° C.). For example, the first metal oxide film 404 or the second metal oxide film 405 is required to form an energy barrier. The energy difference between the bottom of the conduction band of the metal oxide film 407 and the bottom of the conduction band of the oxide semiconductor film 403 is The energy difference or the valence of the first metal oxide film 404 or the second metal oxide film 407 The energy difference between the top of the electron band and the top of the valence band of the oxide semiconductor film 403 is 0.5 eV or more. It is desirable that the value is 0.7 eV or more, and more desirable that the value is 1.5 eV or less. It would be desirable to have one.

[0042] Specifically, for example, when an In—Ga—Zn—O-based material is used for the oxide semiconductor film 403, In this case, the first metal oxide film 404 and the second metal oxide film 405 are formed using a material containing gallium oxide. In addition, gallium oxide and In-Ga-Zn-O based materials can be used to form a gallium oxide film 407. When they are in contact, the energy barrier is approximately 0.8 eV on the conduction band side and approximately 0 eV on the valence band side. 0.9eV.

[0043] Gallium oxide is also written as GaOx, and is formed when the oxygen content is in excess of the stoichiometric ratio. It is preferable to set the value of x. For example, it is preferable to set the value of x to 1.4 or more and 2.0 or less. It is more preferable that the value of x is 1.5 or more and 1.8 or less. However, the gallium oxide film Among them are group 3 elements such as yttrium, group 4 elements such as hafnium, and group 1 elements such as aluminum. By including impurity elements other than hydrogen, such as group 3 elements, group 14 elements such as silicon, and nitrogen, The energy gap of gallium oxide can be increased by adding impurities to improve the insulating properties. The energy gap of a gallium oxide film that does not contain the above impurities is 4.9 eV. For example, by including more than 0 and less than 20 atomic percent, the energy gap can be reduced to 6 eV can be expanded to an extent.

[0044] From the viewpoint of reducing the charge generation source and trapping centers, the hydrogen in the metal oxide film It is desirable that impurities such as silicon dioxide and water are sufficiently reduced. This is the same idea as reducing impurities in the body membrane.

[0045] The gate insulating film 402 and the insulating film 409 are formed of a first metal oxide film 404 and a second metal oxide film 405. A material that can form a charge trapping center at the interface by contacting with the oxide film 407. It is desirable to use such a material for the gate insulating film 402 and the insulating film 409. As a result, the charges are transferred to the interface between the gate insulating film 402 and the first metal oxide film 404 or to the insulating film. The metal oxide film 409 is trapped at the interface between the first metal oxide film 409 and the second metal oxide film 407. Charge trapping at the interface between the second metal oxide film 404 and the oxide semiconductor film 403, or Charge trapping at the interface of the oxide semiconductor film 403 can be sufficiently suppressed.

[0046] Specifically, the gate insulating film 402 and the insulating film 409 are made of silicon oxide, silicon nitride, or oxide. Aluminum oxide, aluminum nitride, and mixtures thereof can be used in single or laminated layers. For example, the first metal oxide film 404 and the second metal oxide film 407 may be coated with gallium oxide. When a material containing silicon is used, the gate insulating film 402 and the insulating film 409 are made of silicon oxide. It is preferable to use silicon dioxide or silicon nitride. Since the gate insulating film 402 and the insulating film 409 are in contact with the metal oxide film 407, the energy The gap is the energy gap of the first metal oxide film 404 and the second metal oxide film 407. It is desirable that it be larger than the standard.

[0047] The interface between the gate insulating film 402 and the first metal oxide film 404 or the insulating film 409 If a charge trapping center can be formed at the interface between the first metal oxide film 407 and the second metal oxide film 408, For example, the materials of the gate insulating film 402 and the insulating film 409 do not need to be limited to those mentioned above. , the interface between the gate insulating film 402 and the first metal oxide film 404, or the interface between the insulating film 409 and the first metal oxide film 404, A treatment for forming a charge trapping center at the interface with the metal oxide film 407 of No. 2 may be performed. Such treatments include, for example, plasma treatment and element addition treatment (ion implantation, etc.). be.

[0048] An insulator may be further provided on the transistor 310. In order to electrically connect the gate insulating film 405a and the drain electrode 405b to the wiring, 2. The first metal oxide film 404, the second metal oxide film 407, the insulating film 409, etc. are formed with an opening. A second gate electrode may be formed above the oxide semiconductor film 403. Note that the oxide semiconductor film 403 is preferably processed into an island shape. Although it is preferable, it does not have to be processed into islands.

[0049] FIG. 2 shows the above-mentioned transistor 310, that is, the gate insulating film I1 , a first metal oxide film MO1, an oxide semiconductor film OS, a second metal oxide film MO2, and an insulating film The energy band diagram (schematic diagram) of the structure where the insulating film I2 is bonded is shown in Figure 2. Assuming an ideal situation where the film, metal oxide film, and oxide semiconductor film are all intrinsic, The gate insulating film I1 and the insulating film I2 are made of silicon oxide (band gap Eg 8 eV to 9 eV) was measured using gallium oxide as the first metal oxide film MO1 and the second metal oxide film MO2. (Band gap Eg 4.9 eV) is used as the oxide semiconductor film OS. The figure shows the case where a non-single crystal film (band gap Eg 3.15 eV) based on SiO2 is used. The energy difference between the vacuum level and the bottom of the conduction band of silicon oxide is 0.95 eV. The energy difference between the vacuum level and the bottom of the conduction band of gallium is 3.5 eV, The energy difference between the vacuum level and the bottom of the conduction band of the nO-based non-single crystal film is 4.3 eV.

[0050] As shown in FIG. 2, the oxide semiconductor film OS has an oxide layer on the gate electrode GE side (channel side). The energy barriers at the interface between semiconductor and metal oxide are approximately 0.8 eV and 0.95 eV. Similarly, on the back channel side of the oxide semiconductor film OS (the side opposite to the gate electrode GE), In addition, there are energy differences of about 0.8 eV and about 0.95 eV at the interface between the oxide semiconductor and the metal oxide. At the interface between the oxide semiconductor and the metal oxide, such an energy barrier exists. The existence of the wall prevents the carriers from moving at the interface. does not move from the oxide semiconductor to the metal oxide, but moves within the oxide semiconductor. As shown in the figure, the oxide semiconductor film OS, the metal oxide film, and the insulating film are oxidized. Materials with a band gap that is gradually larger than that of semiconductors (insulating films than metal oxide films) Such beneficial results can be obtained when the material is sandwiched between two layers (the band gap of which is larger). Obtained.

[0051] 3A to 3G show examples of transistor structures different from those in FIG.

[0052] The transistor 320 shown in FIG. 3A includes a gate electrode 401, a gate insulating film 402, a gate insulating film 403, a gate insulating film 404, a gate insulating film 405, a gate insulating film 406, a gate insulating film 407, a gate insulating film 408, a gate insulating film 409, a gate insulating film 410, a gate insulating film 411, a gate insulating film 412, a gate insulating film 4 an insulating film 402, a first metal oxide film 404, an oxide semiconductor film 403, a source electrode 405a, 1 in that it includes the drain electrode 405b, the second metal oxide film 407, and the insulating film 409. 3A and the transistor 310 shown in FIG. 1. The difference from the transistor 310 shown in FIG. 1 is that the source electrode 405a and the drain electrode 405b , which is a position where the oxide semiconductor film 403 is connected. After forming the oxide semiconductor film 403, the source electrode 405a and the drain electrode 405b are formed. By this, at least part of the top surface of the oxide semiconductor film 403 is exposed to the source electrode 405a and the The transistor 320 is in contact with the drain electrode 405b, whereas the transistor 320 is in contact with the source electrode 40 By forming the oxide semiconductor film 403 after forming the gate electrode 5a and the drain electrode 405b, At least a part of the top surfaces of the source electrode 405a and the drain electrode 405b is formed on the oxide semiconductor film 403. The other components are the same as those in Figure 1. For details, see Figure 1. The relevant descriptions can be taken into consideration.

[0053] The transistor 330 shown in FIG. 3B includes a gate electrode 401, a gate insulating film 402, a gate insulating film 403, a gate insulating film 404, a gate insulating film 405, a gate insulating film 406, a gate insulating film 407, a gate insulating film 408, a gate insulating film 409, a gate insulating film 410, a gate insulating film 411, a gate insulating film 412, a gate insulating film 4 an insulating film 402, a first metal oxide film 404, an oxide semiconductor film 403, a source electrode 405a, 1 in that it includes the drain electrode 405b, the second metal oxide film 407, and the insulating film 409. The transistor 330 shown in FIG. The transistor shown in FIG. 1 has the same structure as the transistor shown in FIG. 1 in that the first metal oxide film 404 is processed into an island shape. This differs from the data 310.

[0054] In the transistor 330, the second metal oxide film 407 is a source electrode 405a and a drain electrode 405b. The gate electrode 405b is covered with the oxide semiconductor film 403 and the gate insulating film 402. The other components are the same as those in FIG. 1. For details, see the The following description may be taken into consideration.

[0055] In the transistor 340 shown in FIG. 3C, the second metal oxide film 407 is processed into an island shape. 3A in that the transistor 320 has a MOSFET, and the other components are the same as those of the transistor 320 shown in FIG. In the transistor 340, the second metal oxide film 4 The oxide semiconductor film 403 is provided in contact with the oxide semiconductor film 403.

[0056] The transistors 350, 360, 370, and 380 shown in FIGS. 3(D) to 3(G) are the same as those described above. For the configurations of the transistors 310, 320, 330, and 340, the insulating film 40 A conductive film 410 is formed on the oxide semiconductor film 403 in a region overlapping with the channel formation region of the oxide semiconductor film 403. Other components are shown in FIG. 1 or 3(A) to 3(C). is the same as:

[0057] <Example of transistor manufacturing process> Hereinafter, a manufacturing process of the transistor shown in FIG. 1 or FIG. 3A will be described with reference to FIGS. An example will be described.

[0058] <Fabrication Process of Transistor 310> 4A to 4E, an example of a manufacturing process of the transistor 310 shown in FIG. 1 will be described. We will explain about this.

[0059] First, a conductive film is formed on a substrate 400 having an insulating surface, and then a first photolithography is performed. The gate electrode 401 is formed by the process. If the resist mask is formed by an inkjet method, a photomask is not required. Therefore, the manufacturing cost can be reduced.

[0060] There is no significant limitation on the substrate that can be used for the substrate 400 having an insulating surface, but at least In either case, it is necessary for the material to have heat resistance to the extent that it can withstand the subsequent heat treatment. Substrates such as glass substrates, ceramic substrates, quartz substrates, and sapphire substrates can be used. In addition, as long as it has an insulating surface, a single crystal semiconductor substrate such as silicon or silicon carbide, a multi-layer substrate, etc. Crystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI substrates, etc. are used It is also possible to provide a semiconductor element on such a substrate.

[0061] A flexible substrate may be used as the substrate 400. When a flexible substrate is used, A transistor including the oxide semiconductor film 403 may be directly formed on a substrate. A transistor including an oxide semiconductor film 403 is formed on a plate, and then peeled off and transferred to a flexible substrate. In order to separate and transfer the film from the formation substrate to the flexible substrate, the film may be formed by removing an oxide film from the formation substrate. A peeling layer may be provided between the transistor including the semiconductor film 403 and the semiconductor film 403 .

[0062] An insulating film serving as a base film may be provided between the substrate 400 and the gate electrode 401. It has a function of preventing the diffusion of impurity elements from the substrate 400, and is a silicon nitride film, a silicon oxide film, etc. a silicon nitride film, a silicon oxide film, or a silicon oxynitride film, The laminated structure can be formed by the above.

[0063] The gate electrode 401 may be made of molybdenum, titanium, tantalum, tungsten, or aluminum. It uses metal materials such as aluminum, copper, neodymium, scandium, etc., or alloy materials with these as the main components. The insulating film may be formed as a single layer or a laminate.

[0064] Next, a gate insulating film 402 is formed on the gate electrode 401 (FIG. 4(A)). The insulating film 402 is brought into contact with the first metal oxide film 404, and a charge is generated at the interface between the insulating film 402 and the first metal oxide film 404. It is desirable to use a material in which the trapping centers can be formed. By using 02, charges are transferred to the interface between the gate insulating film 402 and the first metal oxide film 404. Therefore, charges are trapped at the interface between the first metal oxide film 404 and the oxide semiconductor film 403. can be sufficiently suppressed.

[0065] Specifically, the gate insulating film 402 may be a silicon oxide film, a silicon nitride film, or an oxynitride film. Silicon film, silicon nitride oxide film, aluminum oxide film, aluminum nitride film, oxynitride film Aluminum film, aluminum nitride oxide film, hafnium oxide film, etc., can be used as a single layer or as a laminate. The oxide semiconductor film 403 and the first metal oxide film 404 can be formed as a layer. In a later heat treatment step on the oxide semiconductor film 403, In order to efficiently remove impurities such as hydrogen and moisture from the first metal oxide film 404, It is preferable that the gate insulating film 402 is a silicon oxide film. Since the gate insulating film 402 is in contact with the first metal oxide film 4, the energy gap of the gate insulating film 402 is It is desirable that the energy gap be larger than that of 04.

[0066] In addition, a charge trapping center is formed at the interface between the gate insulating film 402 and the first metal oxide film 404. If it is possible to do so, there is no need to limit the material of the gate insulating film 402 to the above. In addition, there is no charge trapping layer at the interface between the gate insulating film 402 and the first metal oxide film 404. A core-forming treatment may be performed. Such treatments include, for example, plasma treatment and There are processes for adding elements (such as ion implantation).

[0067] The method for forming the gate insulating film 402 is not particularly limited. For example, the method may be a plasma CVD method or a sputtering method. The gate insulating film 402 can be formed by a deposition method such as a tarring method.

[0068] Next, a first metal oxide film 404 is formed on the gate insulating film 402 (FIG. 4(B)). The first metal oxide film 404 is made of an oxide containing the same components as those of the oxide semiconductor film 403. Such a material is compatible with the oxide semiconductor film 403, and By using the metal oxide film 404, the state of the interface with the oxide semiconductor film can be kept good. That is, by using the above-mentioned material for the first metal oxide film 404, 1. Suppression of trapping of charges at the interface between the metal oxide film 404 and the oxide semiconductor film 403 It is possible.

[0069] Note that the energy gap of the first metal oxide film 404 is The energy gap between the first metal oxide film 404 and the oxide The oxide semiconductor film 403 is formed between the oxide semiconductor film 403 at least at room temperature (20° C.). Therefore, it is necessary to form an energy barrier that prevents carriers from flowing out.

[0070] From the viewpoint of reducing the charge generation source and trapping centers, the hydrogen in the metal oxide film It is desirable that impurities such as silicon dioxide and water are sufficiently reduced. This is the same idea as reducing impurities in the body membrane.

[0071] In order to keep the charge trapping center away from the oxide semiconductor film 403, It is preferable that the film 404 has a sufficient thickness. The thickness is preferably more than 10 nm and less than 100 nm.

[0072] There is no particular limitation on the method for forming the first metal oxide film 404. For example, a plasma CVD method or a sintered metal oxide film can be used. The first metal oxide film 404 can be formed by a film forming method such as sputtering. In addition, sputtering is suitable because it is less likely to be contaminated with hydrogen or water. On the other hand, in terms of improving the quality of the film, plasma CVD methods are suitable.

[0073] Next, an oxide semiconductor film having a thickness of 3 nm to 30 nm is formed on the first metal oxide film 404. The oxide semiconductor film 403 is formed by a sputtering method. (For example, if the film thickness is 50 nm or more, the transistor may become normally on.) Therefore, it is preferable to set the film thickness as described above. The oxide semiconductor film 404 and the oxide semiconductor film 403 are successively formed without being exposed to the air. It is preferable that:

[0074] Note that before the oxide semiconductor film 403 was formed by a sputtering method, argon gas was introduced. The reverse sputtering is performed by introducing the metal oxide into the first metal oxide film 404 to generate plasma. It is preferable to remove the powdery substances (also called particles or dust) that are stuck to the surface. The term "thermal energy" refers to a process in which a voltage is applied to a substrate, plasma is generated near the substrate, and the surface of the substrate is modified. It is to be noted that instead of argon, gases such as nitrogen, helium, and oxygen may be used. .

[0075] The oxide semiconductor used for the oxide semiconductor film 403 is a quaternary metal oxide, In-S n-Ga-Zn-O oxide semiconductors and In-Ga-Zn-O ternary metal oxides Oxide semiconductors, In-Sn-Zn-O oxide semiconductors, In-Al-Zn-O oxide semiconductors Conductor, Sn-Ga-Zn-O oxide semiconductor, Al-Ga-Zn-O oxide semiconductor, S n-Al-Zn-O oxide semiconductors and In-Zn-O oxides, which are binary metal oxides Semiconductors, Sn-Zn-O oxide semiconductors, Al-Zn-O oxide semiconductors, Zn-Mg- O-based oxide semiconductors, Sn-Mg-O-based oxide semiconductors, In-Mg-O-based oxide semiconductors, I n-Ga-O-based oxide semiconductors, In-O-based oxide semiconductors, which are single-component metal oxides, and Sn -O-based oxide semiconductors, Zn-O-based oxide semiconductors, etc. can be used. The oxide semiconductor may contain SiO2. For example, an In-Ga-Zn-O oxide Semiconductors are oxide films containing indium (In), gallium (Ga), and zinc (Zn), The stoichiometric ratio is not particularly important. It may also include an element.

[0076] The oxide semiconductor film 403 is formed of a material having the chemical formula InMO3(ZnO) m (m>0) A thin film can be used, where M is one or more selected from Ga, Al, Mn, and Co. For example, M may represent Ga, Ga and Al, Ga and Mn, or Examples of the elements include Ga and Co.

[0077] In this embodiment, the oxide semiconductor film 403 is an In—Ga—Zn—O-based oxide semiconductor film. The oxide semiconductor film 40 is formed by a sputtering method using a film formation target. 3 is in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a mixture of rare gas and oxygen. The film can be formed by sputtering in a suitable atmosphere.

[0078] In order to form an In-Ga-Zn-O film as the oxide semiconductor film 403 by a sputtering method, The target has a composition ratio of In2O3:Ga2O3:ZnO=1: A target for forming an oxide semiconductor film with a molar ratio of 1:1 can be used. The material and composition of the target are not limited to, for example, In2O3:Ga2O3:ZnO A target for forming an oxide semiconductor film having a molar ratio of 1:1:2 may be used.

[0079] In addition, when an In-Zn-O-based material is used as the oxide semiconductor, the composition of the target to be used The composition ratio, in atomic ratio, is In:Zn=50:1 to 1:2 (converted to molar ratio, In2O3: ZnO=25:1 to 1:4), preferably In:Zn=20:1 to 1:1 (in terms of molar ratio) Then, In2O3:ZnO=10:1 to 1:2), more preferably In:Zn=15: The ratio is 1 to 1.5:1 (converted to a molar ratio of In2O3:ZnO=15:2 to 3:4). For example, a target used for forming an In-Zn-O based oxide semiconductor has an atomic ratio of In: When Zn:O=X:Y:Z, Z>1.5X+Y.

[0080] The filling rate of the target for forming the oxide semiconductor film is 90% or more and 100% or less, preferably The filling rate is 95% or more and 99.9% or less. As a result, the formed oxide semiconductor film 403 can be a dense film.

[0081] The sputtering gas used in forming the oxide semiconductor film 403 is hydrogen, water, a hydroxyl group, or a fluorine-containing gas. It is preferable to use a high-purity gas from which impurities such as hydrides have been removed.

[0082] The oxide semiconductor film 403 was formed by holding the substrate 400 in a film formation chamber maintained under reduced pressure. The substrate temperature is set to 100°C or higher and 600°C or lower, preferably 200°C or higher and 400°C or lower. By heating the substrate 400 during film formation, the oxide semiconductor film 403 This reduces the impurity concentration in the silicon substrate and also reduces damage caused by sputtering. Then, the remaining moisture in the film formation chamber is removed and sputtering gas from which hydrogen and moisture have been removed is introduced. Then, an oxide semiconductor film 403 is formed over a substrate 400 using the target. To remove the residual moisture, adsorption type vacuum pumps, such as cryopumps and ion pumps, are used. It is preferable to use a pump or a titanium sublimation pump. A cryopump with a cold trap may be used. The vapor deposition chamber is filled with, for example, hydrogen atoms, compounds containing hydrogen atoms such as water (H2O) (preferably Since the exhaust gas contains carbon atoms, the oxide semiconductor film formed in the film-forming chamber may be damaged. The concentration of impurities contained in the body film 403 can be reduced.

[0083] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, when a pulsed DC power supply is used, powdery substances (particles, etc.) generated during film formation are This is preferable because it can reduce the thickness (also called "slippage") and make the film thickness distribution uniform.

[0084] After that, the oxide semiconductor film 403 is preferably subjected to heat treatment (first heat treatment). The first heat treatment removes excess hydrogen (including water and a hydroxyl group) from the oxide semiconductor film 403. ) is removed, the structure of the oxide semiconductor film 403 is adjusted, and the defect level in the energy gap is lowered. Furthermore, the first heat treatment can reduce the amount of the metal oxide in the first metal oxide film 404. It is also possible to remove excess hydrogen (including water and hydroxyl groups) from the silicon dioxide. The temperature of the first heat treatment is , 250°C or higher and 700°C or lower, preferably 450°C or higher and 600°C or lower, or distortion of the substrate Less than one point.

[0085] The heat treatment is carried out by, for example, placing the object to be treated in an electric furnace using a resistance heating element, and heating the object in a nitrogen atmosphere. The heat treatment can be performed under conditions of 450° C. and 1 hour. During this time, the oxide semiconductor film 403 is not exposed to the air. Do not allow leakage and prevent contamination with water or hydrogen.

[0086] Heat treatment equipment is not limited to electric furnaces, and may be heat conduction or heat radiation from a medium such as heated gas. For example, a GRTA (Gas Rap id Thermal Anneal) equipment, LRTA (Lamp Rapid The RTA (Rapid Thermal Anneal) equipment ) equipment can be used. The LRTA equipment uses halogen lamps, metal halide lamps, etc. , xenon arc lamp, carbon arc lamp, high-pressure sodium lamp, high-pressure mercury lamp This is a device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a lamp. The GRTA device is a device that performs heat treatment using high-temperature gas. The gas used is argon. or an inert gas such as nitrogen that does not react with the material to be treated by heat treatment. It is used.

[0087] For example, in the first heat treatment, the workpiece is placed in a heated inert gas atmosphere and heated for several minutes. After the heating, the object to be treated may be taken out of the inert gas atmosphere and subjected to GRTA treatment. GRTA treatment allows high-temperature heat treatment in a short time. It is possible to apply this method even under temperature conditions exceeding 100°C. During the treatment, an inert gas is used instead of oxygen. By performing the first heat treatment in an atmosphere containing oxygen, This is because the defect level in the energy gap caused by oxygen vacancies can be reduced. .

[0088] The inert gas atmosphere is nitrogen or a rare gas (helium, neon, argon, etc.). It is desirable to use an atmosphere containing ) as the main component and not containing water, hydrogen, etc. For example, nitrogen and rare gases such as helium, neon, and argon introduced into a heat treatment device Purity should be 6N (99.9999%) or higher, preferably 7N (99.99999%) or higher ( That is, the impurity concentration is set to 1 ppm or less, preferably 0.1 ppm or less.

[0089] In either case, the first heat treatment reduces impurities and produces an i-type (intrinsic semiconductor) or i-type By forming the oxide semiconductor film 403 that is close to the This can be realized.

[0090] By the way, the above-mentioned heat treatment (first heat treatment) has the effect of removing hydrogen, water, etc. This heat treatment can also be called a dehydration treatment or a dehydrogenation treatment. The dehydrogenation treatment is performed, for example, after the oxide semiconductor film 403 is processed into an island shape. In addition, such dehydration treatment and dehydrogenation treatment can be carried out in one step. It may be performed multiple times without limitation.

[0091] Next, the oxide semiconductor film 403 is subjected to a second photolithography process to form an island-shaped oxide semiconductor film. It is preferable to process the oxide semiconductor film 403 into an island-shaped oxide semiconductor film (FIG. 4C). A resist mask for forming the resist mask may be formed by an ink-jet method. When the inkjet method is used to form the film, no photomask is required, which reduces manufacturing costs. The etching of the oxide semiconductor film 403 here can be performed by dry etching or wet etching. It is also possible to use either a chip or both.

[0092] In the second photolithography step, the first gold film is formed in addition to the oxide semiconductor film 403. By patterning the metal oxide film 404, the transistor 33 shown in FIG. In the transistor 330, the pattern of the oxide semiconductor film 403 can be set to 0. The same mask is used for forming the pattern of the first metal oxide film 404 and forming the pattern of the first metal oxide film 404. The side end portion in the channel length direction of the oxide semiconductor film 403 and the channel of the first metal oxide film 404 are The side end portions in the longitudinal direction of the cable are aligned.

[0093] Next, a source electrode and a drain electrode were formed on the first metal oxide film 404 and the oxide semiconductor film 403. A conductive film for forming the inner electrode (including wiring formed in the same layer as the inner electrode) is formed. The conductive film used for the source electrode and the drain electrode may be, for example, Al, Cr, Cu, or Ta. a metal film containing an element selected from Ti, Mo, and W, or a metal containing the above-mentioned elements as components; Nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film) can be used. In addition, Ti, Mo, or Al can be applied to either or both of the upper and lower sides of the metal film. High-melting-point metal films such as W or their metal nitride films (titanium nitride film, molybdenum nitride film, A structure in which a tungsten nitride film is laminated may also be used. The conductive film used for the electrode may be formed of a conductive metal oxide. Indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), Indium tin oxide alloy (In2O3-SnO2, abbreviated as ITO), indium oxide Zinc oxide alloy (In2O3-ZnO) or these metal oxide materials containing silicon oxide The above-mentioned material can be used.

[0094] A resist mask is formed on the conductive film by a third photolithography process, and selective etching is performed. After forming the source electrode 405a and the drain electrode 405b by etching, a resist mask is The third photolithography process involves the exposure of the resist mask to ultraviolet light. It is preferable to use ultraviolet rays, KrF laser light, or ArF laser light. The rear electrode 405a is formed by the gap width between the lower end of the source electrode 405a and the lower end of the drain electrode 405b. The channel length L of the transistor to be formed is determined. Note that the channel length L = 25 nm When performing exposure of less than 100 nm, for example, extreme ultraviolet light with an extremely short wavelength of several nm to several tens of nm ( Extreme Ultraviolet) in the third photolithography step It is recommended to perform exposure when forming a resist mask. Exposure with extreme ultraviolet light has high resolution and focal depth. Therefore, it is possible to reduce the channel length L of the transistor to be formed later. This allows the operating speed of the circuit to be increased.

[0095] In addition, in order to reduce the number of photomasks and steps used in the photolithography process, The resist mask is formed by a multi-tone mask, which is an exposure mask that allows the incident light to have multiple intensities. The etching process may be performed using a resist mask formed using a multi-tone mask. The mask has a shape with multiple film thicknesses, and the shape can be further deformed by etching. Therefore, it can be used in multiple etching processes to process different patterns. Therefore, one multi-tone mask can handle at least two different patterns. Therefore, the number of exposure masks can be reduced. Since the corresponding photolithography process can also be eliminated, the process can be simplified.

[0096] Note that when the conductive film is etched, the oxide semiconductor film 403 is etched and divided. However, it is desirable to optimize the etching conditions so that the conductive film alone does not It is difficult to achieve a condition in which the oxide semiconductor film 402 is etched while the oxide semiconductor film 403 is not etched at all. When the conductive film is etched, the oxide semiconductor film 403 is only partly etched. For example, 5 to 50% of the thickness of the oxide semiconductor film 403 is etched to form a groove (depression). In some cases, the oxide semiconductor film 403 becomes a thin film.

[0097] Next, plasma treatment is performed using gases such as N2O, N2, or Ar to remove the exposed Water adsorbed on the surface of the oxide semiconductor film 403 may be removed by plasma treatment. In this case, the oxide semiconductor film 403 is heated without being exposed to the air after the plasma treatment. It is desirable to form a second metal oxide film 407 in contact therewith.

[0098] Next, a layer of the oxide semiconductor film 404 is formed on the source electrode 405a and the drain electrode 405b. A second metal oxide film 407 is formed in contact with a part of the metal oxide film 03 (FIG. 4(D)).

[0099] The second metal oxide film 407 is a film containing the same components as the oxide semiconductor film 403. It is desirable to use an oxide containing the main component material of the semiconductor film 403. Such a material is oxidized. The second metal oxide film 407 is compatible with the compound semiconductor film 403. This is because the state of the interface with the oxide semiconductor film can be maintained in a good condition. By using the second metal oxide film 407, the second metal oxide film 407 and the oxide semiconductor This makes it possible to suppress the trapping of charges at the interface with the film 403 .

[0100] The energy gap of the second metal oxide film 407 is The gap is required to be larger than the second metal oxide film 407. The oxide semiconductor film 403 is formed between the oxide semiconductor film 403 at least at room temperature (20° C.). It is necessary to form an energy barrier that prevents carriers from leaking out.

[0101] The second metal oxide film 407 is formed using a method that does not mix impurities such as water and hydrogen. When the second metal oxide film 407 contains hydrogen, the hydrogen is converted into an oxide semiconductor. The hydrogen penetrates into the oxide semiconductor film 403, or the hydrogen extracts oxygen from the oxide semiconductor film 403. The back channel of the oxide semiconductor film 403 becomes low resistance (n-type), and a parasitic channel Therefore, the second metal oxide film 407 should contain as little hydrogen as possible. It is important to avoid the use of hydrogen in the deposition process to ensure a film that is free of hydrogen.

[0102] Therefore, the second metal oxide film 407 is preferably formed by sputtering. The sputtering gas used in forming the film is an impurity gas such as hydrogen, water, hydroxyl group or hydride. It is preferable to use a high-purity gas from which impurities have been removed.

[0103] In order to keep the charge trapping center away from the oxide semiconductor film 403, It is preferable that the film 407 has a sufficient thickness. The thickness of the layer 7 is preferably more than 10 nm and less than 100 nm.

[0104] Next, an insulating film 409 is formed on the second metal oxide film 407 (FIG. 4(E)). For 09, inorganic insulating films are used, such as silicon oxide film, silicon oxynitride film, and aluminum oxide film. oxide insulating film such as aluminum film, aluminum oxynitride film, or silicon nitride film, silicon oxide nitride film, A single layer of nitride insulating film such as silicon film, aluminum nitride film, or aluminum nitride oxide film, or For example, the second metal oxide film 407 may be formed by sputtering. A silicon oxide film and a silicon nitride film are laminated in this order from the side.

[0105] Next, the second metal oxide film 407 and a part (channel formation region) of the oxide semiconductor film 403 are formed. It is preferable to carry out the second heat treatment in a state of contact. The temperature of the second heat treatment is 250°C or more, The temperature is set to 00° C. or lower, preferably 450° C. to 600° C., or lower than the strain point of the substrate.

[0106] The second heat treatment is carried out in an atmosphere of nitrogen, oxygen, or ultra-dry air (with a water content of 20 ppm or less, preferably 1 ppm or less, more preferably 10 ppb or less of air), or rare gases (argon, helium The reaction may be carried out under an atmosphere of nitrogen, oxygen, ultra-dry air, or a rare gas. It is preferable that the atmosphere does not contain water, hydrogen, etc. The purity of oxygen or rare gas should be 6N (99.9999%) or more, preferably 7N (99.9 9999%) or more (i.e., impurity concentration is 1 ppm or less, preferably 0.1 ppm or less). It is preferable that

[0107] In the second heat treatment, the oxide semiconductor film 403 and the second metal oxide film 407 are brought into contact with each other. Therefore, the dehydration (or dehydrogenation) treatment described above simultaneously Oxygen, one of the main components of oxide semiconductors, can be reduced to a low level. The second metal oxide film 407 containing oxygen can supply oxygen to the oxide semiconductor film 403. This can reduce the number of charge trapping centers in the oxide semiconductor film 403. The oxide semiconductor film 403 is highly purified and made electrically i-type (intrinsic) by the above process. Furthermore, this heat treatment can also cause the first metal oxide film 404 or the second metal At the same time, impurities are removed from the oxide film 407, and the oxide film 407 can be highly purified.

[0108] In this embodiment, the second heat treatment is performed after the insulating film 409 is formed. The timing of the heat treatment is not particularly limited as long as it is performed after the formation of the second metal oxide film 407. For example, the second heat treatment may be performed after the second metal oxide film 407 is formed. In the case where the insulating film 409 is formed by laminating, for example, a silicon oxide film and a silicon nitride film, Then, a silicon oxide film is formed on the second metal oxide film 407, and then a second heat treatment is performed. Alternatively, a silicon nitride film may be formed by performing a second heat treatment subsequent to the first heat treatment. Alternatively, the first heat treatment may be combined with the second heat treatment, or the second heat treatment may be combined with the first heat treatment. This may also serve as a heat treatment.

[0109] As described above, by applying at least one of the first heat treatment and the second heat treatment, the oxide The semiconductor film 403 is highly purified so that it does not contain impurities other than its main components as much as possible. The highly purified oxide semiconductor film 403 contains extremely large amounts of donor-derived carriers. The carrier concentration is 1×10 14 / cm 3 Less than 1 x 10 12 / cm 3 less than 1×10 11 / cm 3 is less than.

[0110] The transistor 310 is formed through the above steps (FIG. 4(E)). Impurities such as hydrogen, moisture, hydroxyl groups, or hydrides (also called hydrogen compounds) are added to oxide semiconductors. A transistor including a highly purified oxide semiconductor film 403 that is intentionally removed from the film 403. Therefore, the transistor 310 has suppressed fluctuations in electrical characteristics and is electrically stable. It is fixed.

[0111] After the insulating film 409 is formed, a conductive film 410 is further provided over the insulating film 409. 3(D) can be formed. The conductive film 410 can be formed using the same material and process as the electrode 401. By providing the transistor 350 at a position overlapping with the channel forming region of the semiconductor film 403, In the bias-thermal stress test (hereinafter referred to as BT test) to check the reliability of It is possible to further reduce the amount of change in the threshold voltage of the transistor 350 before and after the BT test. The conductive film 410 may have the same potential as the gate electrode 401 or may have a different potential. The conductive film 410 may function as a second gate electrode. may be GND, 0V, or floating.

[0112] Although not shown, a protective insulating film may be further formed to cover the transistor 350. The protective insulating film may be a silicon nitride film, a silicon nitride oxide film, or an aluminum nitride film. It can be used.

[0113] A planarization insulating film may be provided over the transistors 310 and 350. For example, heat-resistant materials such as acrylic, polyimide, benzocyclobutene, polyamide, and epoxy are used. In addition to the above organic materials, low dielectric constant materials (lo wk materials), siloxane resin, PSG (phosphorus glass), BPSG (boron phosphorus glass) ) can be used. It should be noted that multiple insulating films made of these materials can also be stacked. good.

[0114] <Fabrication process of transistor 320> 5A to 5C, a manufacturing process of the transistor 320 shown in FIG. 3A will be described. An example will be described.

[0115] As in the process shown in FIG. 4(A), a gate electrode 401 and a gate electrode 402 are formed on a substrate 400. a gate insulating film 402 covering the first metal oxide film 1 and a first metal oxide film 203 provided in contact with the gate insulating film 402; After forming the first metal oxide film 404, a source electrode and a drain electrode ( A conductive film is formed to form a second photoresist (including wiring formed in the same layer). A resist mask is formed on the conductive film by a lithography process, and selective etching is performed. After forming the source electrode 405a and the drain electrode 405b, the resist mask is removed. (Figure 5(A)).

[0116] Next, a first metal oxide film 404, a source electrode 405a, and a drain electrode 405b are An oxide semiconductor film 403 having a thickness of 3 nm to 30 nm is formed by a sputtering method.

[0117] Note that before the oxide semiconductor film 403 was formed by a sputtering method, argon gas was introduced. The first metal oxide film 404 and the source electrode are then deposited by reverse sputtering, which generates plasma. Powdery substances (particles, etc.) adhering to the surface of the drain electrode 405a or the drain electrode 405b It is preferable to remove the argon atmosphere. , oxygen, etc. may also be used.

[0118] After that, the oxide semiconductor film 403 is preferably subjected to heat treatment (first heat treatment). The first heat treatment removes excess hydrogen (including water and a hydroxyl group) from the oxide semiconductor film 403. ) is removed, the structure of the oxide semiconductor film 403 is adjusted, and the defect level in the energy gap is lowered. Furthermore, the first heat treatment can reduce the amount of the metal oxide in the first metal oxide film 404. It is also possible to remove excess hydrogen (including water and hydroxyl groups) from the silicon dioxide. The temperature of the first heat treatment is , 250°C or higher and 700°C or lower, preferably 450°C or higher and 600°C or lower, or distortion of the substrate Less than one point.

[0119] Next, the oxide semiconductor film 403 is subjected to a third photolithography process to form an island-shaped oxide semiconductor film. The oxide semiconductor film 403 is then processed into an island-shaped oxide semiconductor film 403 (FIG. 5(B)). The resist mask for this purpose may be formed by an ink-jet method. When the film is formed by the PET method, no photomask is used, which reduces the manufacturing cost. The first heat treatment is performed on the oxide semiconductor film 403 after the oxide semiconductor film 403 is patterned. However, the oxide semiconductor film 403 does not necessarily have to be patterned. stomach.

[0120] Next, plasma treatment is performed using gases such as N2O, N2, or Ar to remove the exposed Water adsorbed on the surface of the oxide semiconductor film 403 may be removed by plasma treatment. In this case, the oxide semiconductor film 403 is heated without being exposed to the air after the plasma treatment. It is desirable to form a second metal oxide film 407 in contact therewith.

[0121] Next, a layer of the oxide semiconductor film 404 is formed on the source electrode 405a and the drain electrode 405b. A second metal oxide film 407 is formed in contact with the second metal oxide film 403. An insulating film 409 is formed thereon.

[0122] Next, the oxide semiconductor film 403 is subjected to second heat treatment in a state where the oxide semiconductor film 403 is in contact with the second metal oxide film 407. The temperature of the second heat treatment is 250°C or higher and 700°C or lower, preferably 45 The temperature should be between 0°C and 600°C, or below the distortion point of the substrate.

[0123] The second heat treatment is carried out in an atmosphere of nitrogen, oxygen, or ultra-dry air (with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less of air), or noble gases (argon, helium, etc. The reaction may be carried out under an atmosphere of nitrogen, oxygen, ultra-dry air, or a rare gas. It is preferable that the gas does not contain water, hydrogen, etc. Or the purity of the rare gas is 6N (99.9999%) or more, preferably 7N (99.999%). 99%) or more (i.e., impurity concentration is 1 ppm or less, preferably 0.1 ppm or less). It is preferable that:

[0124] In the second heat treatment, the oxide semiconductor film 403 and the second metal oxide film 407 are brought into contact with each other. Therefore, the dehydration (or dehydrogenation) treatment described above simultaneously Oxygen, one of the main components of oxide semiconductors, can be reduced to a low level. The second metal oxide film 407 containing oxygen can supply oxygen to the oxide semiconductor film 403. This can reduce the number of charge trapping centers in the oxide semiconductor film 403. The oxide semiconductor film 403 is highly purified and made electrically i-type (intrinsic) by the above process. Furthermore, this heat treatment can also cause the first metal oxide film 404 or the second metal At the same time, impurities are removed from the oxide film 407, and the oxide film 407 can be highly purified.

[0125] The transistor 320 is formed through the above steps (FIG. 5C). Impurities such as hydrogen, moisture, hydroxyl groups, or hydrides (also called hydrogen compounds) are added to oxide semiconductors. The transistor includes a highly purified oxide semiconductor film 403 that is intentionally removed from the oxide semiconductor film. Therefore, the transistor 320 is electrically stable with its electrical characteristics being suppressed from fluctuating. do.

[0126] In this embodiment, the second heat treatment is performed after the insulating film 409 is formed. The timing of the heat treatment is not particularly limited as long as it is performed after the formation of the second metal oxide film 407. stomach.

[0127] After the oxide semiconductor film 403 is formed, the oxide semiconductor film 403 is not patterned. A second metal oxide film 407 is formed, and the second metal oxide film 407 and the oxide semiconductor film 403 are The transistor 340 shown in FIG. 3C is formed by patterning the same mask. In the transistor 340, the oxide semiconductor film 403 can be patterned. The same mask is used for forming the pattern of the second metal oxide film 407. The side end portion in the channel length direction of the oxide semiconductor film 403 and the channel of the second metal oxide film 407 are In this case, the first heat treatment is performed to form the second metal oxide film. The oxide semiconductor film 403 and the second metal oxide film 407 may be formed before the formation of the second metal oxide film 407. The first heat treatment may be performed after the film formation. Alternatively, the second heat treatment may be performed after the first heat treatment. Alternatively, the first heat treatment may be combined with the second heat treatment, or the second heat treatment may be combined with the first heat treatment. The second heat treatment may also serve as the first heat treatment.

[0128] As described above, by applying at least one of the first heat treatment and the second heat treatment, the oxide The semiconductor film 403 is highly purified so that it does not contain impurities other than its main components as much as possible. The highly purified oxide semiconductor film 403 contains extremely large amounts of donor-derived carriers. The carrier concentration is 1×10 14 / cm 3 Less than 1 x 10 12 / cm 3 less than 1×10 11 / cm 3 is less than.

[0129] In FIG. 5C, after the insulating film 409 is formed, a conductive film 410 is formed on the insulating film 409. By providing the conductive film, the transistor 360 illustrated in FIG. The gate electrode 410 can be formed using the same material and process as the gate electrode 401 .

[0130] As described above, the transistor according to this embodiment has a structure in which the upper and lower surfaces of the oxide semiconductor film are A metal oxide film made of the same kind of component as the oxide semiconductor film is laminated on the surface portion, and further, The metal oxide film and the oxide semiconductor film are formed on the surface of the metal oxide film opposite to the surface in contact with the oxide semiconductor film. An insulating film made of a different material from the oxide semiconductor film is provided in contact with the oxide semiconductor film. A metal oxide film made of a material having good compatibility with the oxide semiconductor film is provided in contact with the metal oxide film. By this, charges that may be generated due to the operation of the semiconductor device are transferred between the oxide semiconductor film and the metal It suppresses capture at the interface with the oxide film, and furthermore, prevents the formation of charge capture centers at the interface. By making an insulator made of a material that can be used in contact with the metal oxide film, The charge can be trapped at the interface between the metal oxide film and the insulator. Since the influence of charges on the oxide semiconductor film can be reduced, the charge on the oxide semiconductor film interface can be reduced. It is possible to suppress the threshold fluctuation of the transistor caused by charge trapping.

[0131] Furthermore, the oxide semiconductor film used for the active layer of the transistor is subjected to heat treatment to remove hydrogen, moisture, Impurities such as hydroxyl groups or hydrides (also called hydrogen compounds) are removed from the oxide semiconductor, The main component material that makes up the oxide semiconductor is also reduced during the impurity removal process. By supplying oxygen, it is highly purified and electrically i-type (intrinsic). A transistor including such a highly purified oxide semiconductor film has a low fluctuation in electrical characteristics. is suppressed and is electrically stable.

[0132] When charges are trapped at the interface of the oxide semiconductor film, the threshold voltage of the transistor (For example, if a positive charge is trapped on the back channel side, the transistor The threshold voltage shifts in the negative direction. One of the causes of this charge trapping is the positive ions. A model of the movement and trapping of ions (or the atoms responsible for them) can be postulated. In a transistor using an oxide semiconductor, water is used as a source of such cations. The disclosed invention uses a highly purified oxide semiconductor, and Since the structure is in contact with the laminated structure of the metal oxide film and the insulating film, This even suppresses charge trapping due to hydrogen, which is assumed in the above model. It is believed that this can be achieved when the ionization rate of hydrogen is, for example, about 10%.

[0133] As described above, a semiconductor device using an oxide semiconductor and having stable electrical characteristics is provided. Therefore, a highly reliable semiconductor device can be provided.

[0134] As described above, the configurations, methods, etc. shown in this embodiment may be applied to the configurations, methods, etc. shown in other embodiments. They can be used in any suitable combination.

[0135] (Embodiment 2) A semiconductor device having a display function (a display device) using the transistor described in Embodiment 1 as an example In addition, a part or the whole of a driver circuit including a transistor can be manufactured. The pixel portion and the display portion can be integrally formed on the same substrate to form a system-on-panel.

[0136] In FIG. 6A, a pixel portion 4002 provided on a first substrate 4001 is surrounded by a A sealant 4005 is provided and the substrate is sealed with a second substrate 4006. In A), the area surrounded by the sealant 4005 on the first substrate 4001 and The semiconductor layer is formed in a different region using a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate. A scanning line driver circuit 4004 and a signal line driver circuit 4003 are mounted on the substrate. A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel portion 4002 are connected to the signal line driver circuit 4003 and the scanning line driver circuit 4004. Various signals and potentials are transmitted via FPC (Flexible Printed Circuit). t) Powered by 4018a and 4018b.

[0137] In FIG. 6B and FIG. 6C, a pixel portion 4002 provided on a first substrate 4001 A sealant 4005 is provided so as to surround the scanning line driver circuit 4004 . A second substrate 4006 is provided on the pixel portion 4002 and the scanning line driver circuit 4004. Therefore, the pixel portion 4002 and the scanning line driver circuit 4004 are connected to the first substrate 4001. The display element is sealed by a sealing material 4005 and a second substrate 4006. In (B) and (C) of FIG. 6, the first substrate 4001 is surrounded by a sealing material 4005. In a region different from the region where the semiconductor layer is embedded, a single crystal semiconductor film or a polycrystalline semiconductor film is formed on a separately prepared substrate. A signal line driver circuit 4003 formed of a semiconductor film is mounted. In C), a signal line driver circuit 4003 and a scanning line driver circuit 4004 are separately formed. Various signals and potentials applied to the pixel portion 4002 are supplied from the FPC 4018. do.

[0138] In addition, in FIG. 6B and FIG. 6C, a signal line driver circuit 4003 is separately formed. However, the present invention is not limited to this configuration. A circuit may be formed separately and mounted, or a part of a signal line driver circuit or a part of a scanning line driver circuit may be mounted. Alternatively, only the part may be formed separately and mounted.

[0139] The method of connecting the separately formed drive circuit is not particularly limited, and may be ip On Glass) method, wire bonding method, or TAB (Tape A The C This is an example in which a signal line driver circuit 4003 and a scanning line driver circuit 4004 are implemented by the OG method. FIG. 6(B) shows an example in which a signal line driver circuit 4003 is mounted by the COG method, and FIG. 6(C) shows an example in which a signal line driver circuit 4003 is mounted by the COG method. ) is an example in which the signal line driver circuit 4003 is mounted by the TAB method.

[0140] The display device also includes a panel in which a display element is sealed, and a controller for the panel. and modules in which ICs, etc., including the above are mounted.

[0141] In this specification, the term "display device" refers to an image display device, a display device, or an optical device. Also refers to connectors, such as FPC or TAB tape. Modules with TCP attached, TAB tape or TCP with a printed wiring board attached The IC (integrated circuit) is directly mounted on the module or display element using the COG method. All such modules are also included in the display device.

[0142] The pixel portion and the scanning line driver circuit provided on the first substrate have a plurality of transistors. The transistor shown as an example in Embodiment 1 can be applied.

[0143] The display element provided in the display device may be a liquid crystal element (also called a liquid crystal display element), a light-emitting element ( The light-emitting element emits light by applying a current or a voltage. This category includes elements whose brightness can be controlled, specifically inorganic EL (Electroluminescent) Luminescence, organic electroluminescence, etc. Also, electronic ink, etc. A display medium whose contrast changes depending on use can also be applied.

[0144] One embodiment of a semiconductor device will be described with reference to FIGS. 7 to 9. FIGS. 7 to 9 are the same as those in FIG. B) corresponds to the cross section at MN.

[0145] As shown in FIGS. 7 to 9, the semiconductor device has a connection terminal electrode 4015 and a terminal electrode 4016. The connection terminal electrode 4015 and the terminal electrode 4016 are terminals of the FPC 4018. and are electrically connected to each other via an anisotropic conductive film 4019 .

[0146] The connection terminal electrode 4015 is formed from the same conductive film as the first electrode layer 4030. 016 indicates the source and drain electrodes of the transistor 4010 and the transistor 4011. It is formed of the same conductive film as

[0147] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 7 to 9, the transistors included in the pixel portion 4002 are 4004 and a transistor 4010 included in the scanning line driver circuit 4004. There are.

[0148] In this embodiment, the transistors 4010 and 4011 are the transistors The transistors shown in the table below can be applied. 011 has suppressed fluctuations in electrical characteristics and is electrically stable. As the semiconductor device of this embodiment shown in FIG. 9, a highly reliable semiconductor device can be provided. do.

[0149] The transistor 4010 provided in the pixel portion 4002 is electrically connected to a display element. The display element is not particularly limited as long as it can display, and various display elements can be used. It can be used.

[0150] FIG. 7 shows an example of a liquid crystal display device using liquid crystal elements as display elements. The liquid crystal element 4013 includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer. The liquid crystal layer 4008 is sandwiched between insulating films that function as alignment films. The second electrode layer 4031 is provided on the second substrate 4006 side. The first electrode layer 4030 and the second electrode layer 4031 are stacked with a liquid crystal layer 4008 interposed therebetween. It has a layered structure.

[0151] The spacers 4035 are obtained by selectively etching the insulating film, and the liquid crystal layer 400 The film thickness (cell gap) of the film 8 is controlled. Although an example in which columnar spacers 4035 are provided is shown, spherical spacers may also be used.

[0152] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, etc. The liquid crystals that can be used include polymer dispersed liquid crystals, ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, the liquid crystal material can be in a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0153] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. To achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used in the liquid crystal layer. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a short response time of 1 msec or less. Since the liquid crystal display is optically isotropic, no alignment treatment is required and the viewing angle dependency is small. Since there is no need to provide a rubbing treatment, the This can prevent electrostatic breakdown, which may occur during the manufacturing process, thereby reducing defects and damage to the liquid crystal display device. Therefore, it is possible to improve the productivity of the liquid crystal display device.

[0154] The specific resistivity of the liquid crystal material is 1×10 9 Ω·cm or more, preferably 1×10 1 1 Ω·cm or more, and more preferably 1×10 12 Ω·cm or more. The specific resistivity values ​​in the specification are those measured at 20°C.

[0155] The size of the storage capacitor provided in the liquid crystal display device is determined by the lead of the transistor arranged in the pixel portion. It is set so that the charge can be maintained for a predetermined period, taking into consideration the current and other factors. By using a transistor with a semiconductor film, the liquid crystal capacitance in each pixel It is sufficient to provide a storage volume having a size of 1 / 3 or less, preferably 1 / 5 or less, of the capacity of the do.

[0156] The transistor including the purified oxide semiconductor film used in this embodiment has a low-temperature property in an off state. Therefore, the current value (off-state current value) at the time of the image signal or the like can be reduced. The data retention time can be extended, and the write interval can also be set longer when the power is on. This reduces the frequency of refresh operations, which has the effect of reducing power consumption. It plays a key role.

[0157] In addition, the transistor using the highly purified oxide semiconductor film used in this embodiment has a relatively low Since a relatively high field effect mobility can be obtained, high speed driving is possible. By using the above transistor in the pixel portion, a high-quality image can be provided. In addition, the transistors can be separately formed in a driver circuit portion and a pixel portion on the same substrate. This allows the number of components in the liquid crystal display device to be reduced.

[0158] There are two types of LCD displays: TN (Twisted Nematic) mode, IPS (In-P lane-Switching) mode, FFS (Fringe Field Switching) mode ching) mode, ASM(Axially Symmetric aligned) Micro-cell mode, OCB (Optical Compensated B) refrigeration mode, FLC (Ferroelectric Liquid d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0159] Furthermore, normally black type liquid crystal display devices, for example, those employing vertical alignment (VA) mode The liquid crystal display device may be a transmission type liquid crystal display device. This is a method of controlling the arrangement of crystal molecules, and when no voltage is applied, In this method, the liquid crystal molecules are aligned vertically. There are several types of vertical alignment modes: However, for example, MVA (Multi-Domain Vertical Alignment) nt) mode, PVA (Patterned Vertical Alignment) mode, ASV (Advanced Super View) mode, etc. It is also possible to divide a pixel into several regions (subpixels) and display each region separately. Multi-domain or multi-domain design that is designed to tilt the molecule in the direction of The method mentioned can be used.

[0160] In addition, in display devices, black matrices (light-shielding layers), polarizing members, phase difference members, reflecting members, Optical members (optical substrates) such as a protection member are provided as appropriate. For example, a polarizing substrate and a retardation substrate are provided as appropriate. Alternatively, a backlight or a sidelight may be used as the light source. It's fine.

[0161] In addition, multiple light-emitting diodes (LEDs) are used as backlights, and a time-division display system is used. It is also possible to perform field sequential driving. By applying the color drive method, color display can be achieved without using a color filter. This can be done.

[0162] In addition, the display method in the pixel section uses the progressive method, interlace method, etc. In addition, the color elements controlled by pixels when displaying colors are RGB (R is It is not limited to the three colors (red, green, and blue). For example, RGBW (W stands for white). Or, RGB may be combined with one or more colors such as yellow, cyan, or magenta. The size of the display area may be different for each dot of the color element. This is not limited to color display devices, but can also be applied to monochrome display devices. It is also possible.

[0163] Furthermore, a light-emitting element that utilizes electroluminescence is used as a display element included in the display device. The light-emitting element using electroluminescence can be applied to a light-emitting material They are distinguished by whether they are organic or inorganic compounds, and generally, the former are organic E The latter is called an inorganic EL element.

[0164] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. These carriers are then injected into a layer containing a light-emitting organic compound, causing a current to flow. The recombination of electrons and holes causes the light-emitting organic compound to form an excited state, When the excited state returns to the ground state, light is emitted. The optical element is called a current-excited light-emitting element.

[0165] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0166] The light emitting element only needs to have at least one of the pair of electrodes transparent in order to extract light. Then, a transistor and a light emitting element are formed on the substrate, and light is extracted from the surface opposite the substrate. Top emission, bottom emission where light is extracted from the surface on the substrate side, and surface on the substrate side and the opposite side of the substrate There are light emitting devices with a double-sided emission structure that extracts light from the It is possible.

[0167] FIG. 8 shows an example of a light-emitting device using a light-emitting element as a display element. The transistor 513 is electrically connected to the transistor 4010 provided in the pixel portion 4002 . The light-emitting element 4513 includes a first electrode layer 4030, an electroluminescent layer 4511, a second electrode layer 4032, and a second electroluminescent layer 4513. The electrode layer 4031 has a laminated structure, but is not limited to the structure shown. The configuration of the light emitting element 4513 can be changed as appropriate according to the direction of emitted light.

[0168] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. An opening is formed on the first electrode layer 4030 using a resin material, and the sidewall of the opening is continuous. It is preferable to form the inclined surface with a curvature.

[0169] The electroluminescent layer 4511 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0170] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4513. A protective film may be formed on the insulating film 4031 and the partition wall 4510. The protective film may be made of silicon nitride. A silicon nitride film, a silicon oxide film, a DLC film, etc. can be formed on the first substrate 400. The space sealed by the first substrate 4001, the second substrate 4006, and the sealing material 4005 is filled with a filler 45. 14 is provided and sealed. In this way, it is highly airtight and degassed so as not to be exposed to the outside air. Protective films with low wear (laminating films, UV-curing resin films, etc.) and covering materials It is preferable to package (enclose) the

[0171] Filler 4514 can be an inert gas such as nitrogen or argon, or an ultraviolet curing resin or Thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic, polyimide Mido, epoxy resin, silicone resin, PVB (Polyvinyl Butyral) or EVA (Elastomer) For example, nitrogen may be used as a filler. stomach.

[0172] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be attached to the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates), color filters, etc. may be provided as needed. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to further diffuse reflected light and reduce glare.

[0173] It is also possible to provide electronic paper that drives electronic ink as a display device. Electronic paper is also called an electrophoretic display (electrophoretic display), and is a paper It is possible to make it as easy to read as a digital camera, consume less power than other display devices, and have a thinner and lighter form factor. This has the advantage that

[0174] The electrophoretic display device may have various forms, but it has a structure in which first particles having a positive charge and and a second particle having a negative charge. By applying an electric field to the microcapsules, The particles in the cell are moved in opposite directions to each other, and only the color of the particles that gather on one side is displayed. The first particles or the second particles contain a dye, and when there is no electric field, they move. The color of the first particle and the color of the second particle are different (including colorless). )

[0175] In this way, the electrophoretic display device moves materials with high dielectric constants to areas with high electric fields, so-called This is a display that utilizes the dielectrophoretic effect.

[0176] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0177] The first particles and the second particles in the microcapsules may be made of a conductive material, an insulating material, a semiconductor, or the like. Conductive materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, electro A material selected from magnetochromic materials, magnetophoretic materials, or a composite material of these materials is used. That's good enough.

[0178] In addition, a display device using a twist ball display method can also be applied as electronic paper. The twist ball display method uses spherical particles painted in black and white as the display element. The first electrode layer and the second electrode layer are disposed between the first electrode layer and the second electrode layer. This is a method of displaying information by controlling the orientation of spherical particles by generating a potential difference between the electrode layers. do.

[0179] FIG. 9 shows an active matrix electronic paper as one mode of a semiconductor device. The electronic paper is an example of a display device that uses the twisting ball display method.

[0180] A first electrode layer 4030 connected to the transistor 4010 and a second electrode layer 4031 provided on the second substrate 4006 The second electrode layer 4031 has a black area 4615a and a white area 4615b. 4613, which includes a liquid-filled cavity 4612 therearound. The spherical particles 4613 are filled with a filler 4614 such as a resin. The second electrode layer 4031 corresponds to a common electrode (opposite electrode). are electrically connected.

[0181] 7 to 9, the first substrate 4001 and the second substrate 4006 are made of glass. In addition to a glass substrate, a flexible substrate can also be used. For example, a light-transmitting plastic substrate can be used. As for plastic, FRP (Fibreglass) s-Reinforced Plastics) plate, PVF (Polyvinyl Fluoride) A film, a polyester film or an acrylic resin film can be used. Also, a sheet with a structure in which aluminum foil is sandwiched between PVF film or polyester film. can also be used.

[0182] The insulating layer 4021 can be formed using an inorganic insulating material or an organic insulating material. Acrylic resin, polyimide, benzocyclobutene resin, polyamide, epoxy resin, etc. When the above-mentioned organic insulating material having heat resistance is used, it is suitable as a planarizing insulating film. In addition to organic insulating materials, low-k materials, siloxane resins, PSG (polysiloxane group) BPSG (Boron Phosphide Glass), etc. can be used. The insulating layer may be formed by stacking a plurality of insulating films made of the material.

[0183] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, a sintering method, or the like, depending on the material. Pin coating method, dipping method, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), roll coating, curtain coating, knife coating Coatings, etc. can be used.

[0184] A display device transmits light from a light source or a display element to display an image. All thin films such as the substrate, insulating film, and conductive film provided on the elemental part are sensitive to light in the visible light wavelength range. It is translucent.

[0185] A first electrode layer and a second electrode layer (a pixel electrode layer, a common electrode layer, a pair of electrodes) that apply a voltage to the display element In the case of a light-emitting diode (also called a counter electrode layer), the direction of the light to be extracted, the location of the electrode layer, and The light transmission property or reflectivity can be selected depending on the pattern structure of the electrode layer.

[0186] The first electrode layer 4030 and the second electrode layer 4031 are made of an indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide, ITO, indium zinc oxide, silicon oxide A light-transmitting conductive material such as indium tin oxide doped with Zn can be used.

[0187] The first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) and molybdenum. (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (N b), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Titanium Metals such as titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag), It can be formed by using one or more of the alloys or nitrides thereof. Cut.

[0188] The first electrode layer 4030 and the second electrode layer 4031 are made of a conductive polymer (conductive polymer). The conductive polymer can be formed using a conductive composition containing a conductive polymer. For example, a so-called π-electron conjugated conductive polymer can be used. or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives, or or a copolymer consisting of two or more of aniline, pyrrole and thiophene, or a derivative thereof Conductors and the like are examples.

[0189] In addition, since transistors are easily damaged by static electricity, a protection circuit for protecting the drive circuit is required. It is preferable that the protection circuit is configured using a non-linear element.

[0190] As described above, by using the transistor described in Embodiment 1 as an example, a highly reliable semiconductor device can be obtained. Note that the transistors exemplified in Embodiment 1 can be used in the above-described table. Not only semiconductor devices with display functions, but also power devices mounted on power supply circuits, LSIs, etc. semiconductor integrated circuits, semiconductor devices with image sensor functions that read information from objects, etc. The present invention can be applied to semiconductor devices having various functions.

[0191] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0192] (Embodiment 3) The semiconductor device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television receivers), computer monitors, digital cameras, digital video cameras cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices), ), portable game machines, personal digital assistants, audio playback devices, large game machines such as pachinko machines, etc. Examples of electronic devices including the semiconductor device described in the above embodiment will be described. Reveal.

[0193] FIG. 10A shows a notebook personal computer, which includes a main body 3001 and a housing 300 2, a display unit 3003, a keyboard 3004, etc. By applying the semiconductor device shown in 2. or 3., a highly reliable notebook type personal computer can be realized. The computer may be a computer.

[0194] FIG. 10B shows a personal digital assistant (PDA), which has a main body 3021 including a display unit 3023 and a An external interface 3025 and operation buttons 3024 are provided. The semiconductor device shown in the first or second embodiment has a stylus 3022 as an accessory for the semiconductor device. By applying this, a more reliable personal digital assistant (PDA) can be achieved.

[0195] FIG. 10C shows an example of an electronic book. For example, an electronic book 2700 is housed in a housing 27 The housing 2701 and the housing 2703 are The shaft 2711 is an integral part of the opening and closing operation. This configuration makes it possible to operate like a paper book.

[0196] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are also configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a sentence is displayed on the right display (display 2705 in FIG. 10(C)), and An image can be displayed on the display unit (the display unit 2707 in FIG. 10C). Or by applying the semiconductor device shown in 2, it becomes a highly reliable electronic book 2700. It is possible.

[0197] FIG. 10C shows an example in which an operation unit and the like are provided in the housing 2701. For example, The housing 2701 includes a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The surface may be provided with a keyboard, a pointing device, etc. On the back and sides, there are external connection terminals (earphone terminal, USB terminal, etc.), storage media insertion port, etc. Furthermore, the electronic book 2700 may have a function as an electronic dictionary. A similar configuration may also be used.

[0198] The electronic book 2700 may also be configured to be able to send and receive information wirelessly. The desired book data can be purchased and downloaded from the e-book server. is also possible.

[0199] FIG. 10(D) shows a mobile phone, which is composed of two housings, a housing 2800 and a housing 2801. The housing 2801 contains a display panel 2802, a speaker 2803, a microphone, and 2804, pointing device 2806, camera lens 2807, external connection terminal 2808. The housing 2800 also includes a solar cell for charging the mobile phone. The antenna is mounted on the housing 28 By applying the semiconductor device shown in the first or second embodiment, This makes it possible to make the mobile phone more reliable.

[0200] The display panel 2802 is equipped with a touch panel, and the image displayed in FIG. The multiple operation keys 2805 are indicated by dotted lines. It also has a boost circuit to boost the voltage required for each circuit.

[0201] The display direction of the display panel 2802 changes appropriately depending on the usage mode. The camera lens 2807 is located on the same surface as the camera lens 2802, so video calls are possible. The speaker 2803 and microphone 2804 are not limited to voice calls, but also to video calls, Recording and playback are possible. Furthermore, the housing 2800 and the housing 2801 can be slid apart. It can be folded from the unfolded state shown in 10(D) to the overlapped state, making it suitable for carrying. This makes it possible to miniaturize the device.

[0202] The external connection terminal 2808 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the memory slot 2811, it is possible to store and transfer a larger amount of data. do.

[0203] In addition to the above functions, even if the device has infrared communication function, TV reception function, etc. good.

[0204] FIG. 10(E) shows a digital video camera, which includes a main body 3051, a display unit (A) 3057, Eyepiece 3053, operation switch 3054, display unit (B) 3055, battery 3056, etc. By applying the semiconductor device shown in the first or second embodiment, This makes it possible to provide a more reliable digital video camera.

[0205] FIG. 10(F) shows an example of a television device. The television device 9600 includes: A display unit 9603 is incorporated in a housing 9601. The display unit 9603 displays images. In this case, the housing 9601 is supported by a stand 9605. By applying the semiconductor device shown in the first or second embodiment, The television device 9600 can be highly reliable.

[0206] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by a remote control operator. A display unit for displaying the output information may be provided.

[0207] The television device 9600 is configured to include a receiver, a modem, and the like. It can receive more general TV broadcasts and can also receive them via wired or wireless modems. By connecting to a communication network, it can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0208] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is. [Explanation of symbols]

[0209] 310 Transistor 320 transistors 330 Transistor 340 transistors 350 transistors 360 Transistor 400 boards 401 Gate electrode 402 Gate insulating film 403 Oxide semiconductor film 404 First metal oxide film 405a Source electrode 405b Drain electrode 407 Second metal oxide film 409 Insulating Film 410 Conductive film

Claims

1. a driver circuit having a first transistor and a pixel portion having a second transistor; The drive circuit a first conductive layer that functions as a first gate electrode of the first transistor; a first insulating layer having a region overlying the first conductive layer; a first metal oxide layer having a region located on the first insulating layer; a second conductive layer having a region in contact with a top surface of the first metal oxide layer and functioning as one of a source electrode and a drain electrode of the first transistor; a third conductive layer having a region in contact with an upper surface of the first metal oxide layer and functioning as the other of the source electrode and the drain electrode of the first transistor; a first oxide semiconductor layer including a region in contact with a top surface of the second conductive layer, a region in contact with a top surface of the third conductive layer, and a region in contact with a top surface of the first metal oxide layer, the first oxide semiconductor layer including a channel formation region of the first transistor; a second metal oxide layer having a region in contact with an upper surface of the first oxide semiconductor layer; a second insulating layer having a region in contact with an upper surface of the second metal oxide layer, a region in contact with an upper surface of the second conductive layer, and a region in contact with an upper surface of the third conductive layer; a fourth conductive layer having a region located above the first oxide semiconductor layer and functioning as a second gate electrode of the first transistor; when viewed in a cross section of the first transistor in a channel length direction, both end portions of the second metal oxide layer are located on the first oxide semiconductor layer; an end of the second metal oxide layer has a region protruding from an end of the fourth conductive layer in a cross-sectional view of the first transistor in a channel length direction; The pixel unit a fifth conductive layer having a region in contact with a top surface of the first metal oxide layer and functioning as one of a source electrode and a drain electrode of the second transistor; a sixth conductive layer having a region in contact with a top surface of the first metal oxide layer and functioning as the other of the source electrode and the drain electrode of the second transistor; a second oxide semiconductor layer including a region in contact with a top surface of the fifth conductive layer, a region in contact with a top surface of the sixth conductive layer, and a region in contact with a top surface of the first metal oxide layer, and including a channel formation region of the second transistor; a seventh conductive layer having a region located above the second insulating layer and functioning as a pixel electrode; the second transistor is a single-gate transistor; the seventh conductive layer is electrically connected to the second transistor through an opening in the second insulating layer.

2. In claim 1, the first insulating layer comprises silicon nitride; The display device, wherein the second insulating layer comprises silicon oxide.

3. In claim 1 or 2, the first metal oxide layer has a thickness of more than 10 nm and not more than 100 nm; The display device, wherein the second metal oxide layer has a film thickness of more than 10 nm and not more than 100 nm.

Images