Power Amplifier Module

Abstract

A power amplification module comprising: a carrier circuit that includes one or more carrier amplifiers; a peak circuit that includes one or more peak amplifiers; a carrier control circuit that controls the base current or the gate voltage of a prescribed carrier amplifier in the carrier circuit; and a carrier output circuit that is connected to the carrier amplifier at the furthest output side of the carrier circuit, and that outputs a carrier control signal for controlling the base current or the gate voltage of the prescribed carrier amplifier to the carrier control circuit.

Description

[Technical Field]

[0001] The present disclosure relates to a power amplifier module. [Background technology]

[0002] A Doherty amplifier is a highly efficient power amplifier. A Doherty amplifier generally consists of a carrier amplifier, which operates regardless of the power level of the input signal, and a peaking amplifier, which is turned off when the power level of the input signal is low and turned on when the power level is high, connected in parallel. When the power level of the input signal is high, the Doherty amplifier operates while the carrier amplifier maintains saturation at the saturated output power level. This allows the Doherty amplifier to improve efficiency compared to ordinary power amplifiers. In this way, the Doherty amplifier operates at the appropriate timing by optimizing the class C bias level of the peaking amplifier and operating the peaking amplifier when the carrier amplifier approaches saturation. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application Publication No. 2020 / 0028472 Summary of the Invention [Problem to be solved by the invention]

[0004] The Doherty amplifier described in Patent Document 1 has a detection circuit that detects the base current of a carrier amplifier. The Doherty amplifier controls the bias of a peak amplifier based on the base current detected by the detection circuit. That is, the Doherty amplifier controls the operation of the peak amplifier by determining that the carrier amplifier is approaching saturation based on the base current detected by the detection circuit. This allows the Doherty amplifier to immediately detect saturation of the carrier amplifier and operate the peak amplifier, thereby improving gain characteristics. However, the Doherty amplifier described in Patent Document 1 controls the operation of the peak amplifier based on the approach of the carrier amplifier to saturation, but cannot control the operation of the carrier amplifier. Therefore, the Doherty amplifier cannot prevent damage to the Doherty amplifier due to saturation of the carrier amplifier.

[0005] Therefore, an object of the present disclosure is to provide a power amplifier module that can prevent damage to a carrier amplifier by detecting saturation of the carrier amplifier. [Means for solving the problem]

[0006] A power amplifier module according to one aspect of the present invention comprises a carrier circuit including one or more carrier amplifiers, a peak circuit including one or more peak amplifiers, a carrier control circuit that controls the base current or gate voltage of a predetermined carrier amplifier in the carrier circuit, and a carrier output circuit that is connected to the carrier amplifier on the most output side in the carrier circuit and outputs a carrier control signal to the carrier control circuit to control the base current or gate voltage of the predetermined carrier amplifier. [Effects of the Invention]

[0007] According to the present disclosure, it is possible to provide a power amplifier module that can prevent damage to a carrier amplifier by detecting saturation of the carrier amplifier. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 2 is a diagram illustrating an example of the configuration of a power amplifier module according to the first embodiment. [Figure 2] FIG. 2 is a diagram illustrating an example of the configuration of a carrier output circuit according to the first embodiment. [Figure 3] 10 is a graph showing an example of the relationship between the base current of the output amplifier and the voltage of the signal Dcont1. [Figure 4] FIG. 2 is a diagram illustrating an example of the configuration of a carrier control circuit according to the first embodiment. [Figure 5] FIG. 10 is a diagram illustrating an example of the configuration of a carrier output circuit according to a first modified example. [Figure 6] FIG. 10 is a diagram illustrating an example of the configuration of a carrier output circuit according to a second modified example. [Figure 7] FIG. 10 is a diagram illustrating an example of the configuration of a carrier output circuit according to a third modified example. [Figure 8] FIG. 10 is a diagram illustrating an example of the configuration of a power amplifier module according to a second embodiment. [Figure 9] FIG. 10 is a diagram illustrating an example of the configuration of a carrier control circuit according to a second embodiment. [Figure 10] FIG. 10 is a diagram showing the configuration of a first modified example of the power amplifier module according to the second embodiment. [Figure 11] FIG. 10 is a diagram showing the configuration of a second modified example of the power amplifier module according to the second embodiment. [Figure 12] FIG. 10 is a diagram illustrating an example of the configuration of a power amplifier module according to a third embodiment. [Figure 13] FIG. 10 is a diagram illustrating an example of the configuration of a carrier control circuit according to a third embodiment. [Figure 14] FIG. 10 is a diagram illustrating an example of the configuration of a carrier control circuit according to a first modified example. [Figure 15] FIG. 10 is a diagram illustrating an example of the configuration of a carrier control circuit according to a second modified example. [Figure 16] FIG. 10 is a diagram illustrating an example of the configuration of a power amplifier module according to a fourth embodiment. [Figure 17] FIG. 10 is a diagram illustrating an example of the configuration of a carrier control circuit according to a fourth embodiment. [Figure 18]FIG. 10 is a diagram illustrating an example of the configuration of a carrier control circuit according to a first modified example. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, each embodiment of the present disclosure will be described with reference to the drawings. Hereinafter, circuit elements with the same reference numerals will be referred to as the same circuit elements, and redundant description will be omitted. ===Configuration of power amplifier module 100 according to the first embodiment===

[0010] The configuration of a power amplifier module according to the first embodiment will be described with reference to FIG. 1. FIG. 1 is a diagram showing an example of the configuration of a power amplifier module 100 according to the first embodiment. The power amplifier module 100 is mounted on, for example, a mobile phone and used to amplify the power of a signal to be transmitted to a base station. The power amplifier module 100 can amplify the power of signals conforming to communication standards such as 2G (second generation mobile communication system), 3G (third generation mobile communication system), 4G (fourth generation mobile communication system), 5G (fifth generation mobile communication system), LTE (Long Term Evolution)-FDD (Frequency Division Duplex), LTE-TDD (Time Division Duplex), LTE-Advanced, and LTE-Advanced Pro. Note that the communication standards of the signals amplified by the power amplifier module 100 are not limited to these.

[0011] 1, the power amplifier module 100 includes, for example, a Doherty amplifier circuit. The power amplifier module 100 includes, for example, an input terminal 101, an output terminal 102, a divider 110, a carrier circuit 120, a peak circuit 130, a peak phase shifter 140, a carrier phase shifter 141, a combiner 150, a carrier output circuit 160, and a carrier control circuit 170.

[0012] The power amplifier module 100 detects saturation of a carrier amplifier provided on the most output side of the carrier circuit 120, for example, based on the base current or gate current of that carrier amplifier. When the power amplifier module 100 detects saturation of the most output-side carrier amplifier, it lowers the bias point of a specific carrier amplifier in the carrier circuit 120. This alleviates the saturated state of the most output-side carrier amplifier in the power amplifier module 100, thereby preventing damage to the power amplifier module 100 that would occur if that carrier amplifier were saturated. Note that the "saturated state" includes, for example, "a state in which gain decreases as input increases."

[0013] The input terminal 101 is a terminal to which, for example, a harmonic signal (hereinafter referred to as "signal RFin") is input.

[0014] The output terminal 102 is a terminal from which an amplified signal (hereinafter referred to as a "signal Pout") obtained by amplifying the signal RFin is output, for example.

[0015] The divider 110 divides, for example, the signal RFin into a signal (hereinafter referred to as "signal RF1") to be input to the carrier circuit 120 and a signal (hereinafter referred to as "signal RF2") to be input to the peak circuit 130. Here, the phase of the signal RF2 is delayed by approximately 90 degrees relative to the phase of the signal RF1, for example, through a peak phase shifter 140 described later. The divider 112 may be, for example, a distributed constant circuit such as a coupled-line 3 dB coupler or a Wilkinson divider. Note that the term "approximately 90 degrees" includes a range of, for example, 45 degrees to 135 degrees.

[0016] The carrier circuit 120 is configured, for example, by connecting a plurality of amplifiers in series. The carrier circuit 120 is configured, for example, to include a buffer amplifier 121, a driver amplifier 122, and an output amplifier 123. The buffer amplifier 121 amplifies and outputs an input signal RF1. The driver amplifier 122 amplifies and outputs the signal RF1 amplified by the buffer amplifier 121. The output amplifier 123 amplifies the signal amplified by the driver amplifier 122 and outputs an amplified signal (hereinafter referred to as "signal RF11"). The buffer amplifier 121, the driver amplifier 122, and the output amplifier 123 are biased, for example, to class A, class AB, or class B. That is, the buffer amplifier 121, the driver amplifier 122, and the output amplifier 123 amplify the input signal and output the amplified signal regardless of the power level of the input signal, such as a small instantaneous input power.

[0017] In the above description, carrier circuit 120 is described as including buffer amplifier 121, driver amplifier 122, and output amplifier 123, but is not limited to this. Carrier circuit 120 may be, for example, configured with only output amplifier 123, or may be configured with two amplifiers, or may be configured with four or more amplifiers. For convenience, hereinafter, carrier circuit 120 will be described as including buffer amplifier 121, driver amplifier 122, and output amplifier 123.

[0018] The peak circuit 130 is configured, for example, by connecting a plurality of amplifiers in series. The peak circuit 130 is configured, for example, to include a buffer amplifier 131, a driver amplifier 132, and an output amplifier 133. The buffer amplifier 131 amplifies and outputs the input signal RF2. The driver amplifier 132 amplifies and outputs the signal RF2 amplified by the buffer amplifier 131. The output amplifier 133 amplifies the signal amplified by the driver amplifier 132 and outputs the amplified signal (hereinafter referred to as "signal RF21"). The buffer amplifier 131, the driver amplifier 132, and the output amplifier 133 are biased, for example, to class A, class AB, class B, or class C. The amplifiers constituting the carrier circuit 120 and the peak circuit 130 may have the same circuit configuration.

[0019] In the above description, the peak circuit 130 is described as including the buffer amplifier 131, the driver amplifier 132, and the output amplifier 133, but is not limited to this. The peak circuit 130 may be configured, for example, with only the output amplifier 133, or may be configured with two amplifiers, or may include four or more amplifiers. It is desirable that the peak circuit 130 be configured with the same number of amplifiers as the carrier amplifiers of the carrier circuit 120, for example. For convenience, the peak circuit 130 will be described below as being configured with the buffer amplifier 131, the driver amplifier 132, and the output amplifier 133.

[0020] The peak phase shifter 140 is, for example, a quarter-wave line connected to the input side of the peak circuit 130. The carrier phase shifter 141 is, for example, a quarter-wave line connected to the output side of the carrier circuit 120. This changes the load impedance seen at the output end of the carrier amplifier 113, thereby achieving high efficiency of the carrier amplifier 113. Note that the peak phase shifter 140 may also be realized using lumped constant elements.

[0021] The combiner 150 combines, for example, a signal RF11 output from the carrier circuit 120 and passing through the carrier phase shifter 141 and a signal RF21 output from the peak circuit 130, and outputs an amplified signal Pout.

[0022] The carrier output circuit 160, for example, supplies a bias current to the output amplifier 123 of the carrier circuit 120 and detects the base current of the output amplifier 123. The carrier output circuit 160 outputs a signal indicating that the output amplifier 123 is saturated (hereinafter referred to as a "signal Dcont1") based on the base current of the output amplifier 123. Here, the configuration of the carrier output circuit 160 will be described with reference to FIG. 2. FIG. 2 is a diagram showing an example of the configuration of the carrier output circuit 160 according to the first embodiment. Note that in FIG. 2, the output amplifier 123 is shown configured to include a bipolar transistor. However, for example, the output amplifier 123 may be a field-effect transistor instead of the bipolar transistor. In this case, hereinafter, the base of the output amplifier 123 will be read as the gate of the output amplifier 123. As shown in FIG. 2, the carrier output circuit 160 includes, for example, an input terminal 161, an output terminal 162, a transistor Q11, a transistor Q12, a resistor R11, and a resistor R12. The input terminal 161 is a terminal to which a control signal for controlling the bias current is supplied. The output terminal 162 is a terminal for outputting a signal Dcont1. The transistor Q11 is a transistor that supplies a bias current to the output amplifier 123. For example, the collector of the transistor Q11 is connected to a power supply Vcc1, and the emitter is connected to the base of the output amplifier 123 through a resistor. A control signal for controlling the bias current is supplied to the base of the transistor Q11 through, for example, a resistor R11. The collector of the transistor Q12 is connected to the base of the transistor Q11, the base is connected to the emitter of the transistor Q11 through a resistor R12, and the emitter is connected to ground. The output terminal 162 is connected to a node between the base of the transistor Q12 and the resistor R12.

[0023] An example of the signal Dcont1 output from the carrier output circuit 160 will now be described with reference to Fig. 3. Fig. 3 is a graph showing an example of the relationship between the base current of the output amplifier 123 and the voltage of the signal Dcont1. In Fig. 3, the horizontal axis represents the base current of the output amplifier 123, and the vertical axis represents the voltage of the signal Dcont1. As shown in Fig. 3, the carrier output circuit 160 outputs the signal Dcont1 with a small voltage at the base current when the output amplifier 123 is saturated.

[0024] The carrier control circuit 170 is, for example, a circuit that controls the bias point of a predetermined carrier amplifier in the carrier circuit 120. When the carrier circuit 120 is composed of multiple carrier amplifiers, the predetermined carrier amplifier is preferably the carrier amplifier closest to the input side. For convenience, the following description will be given assuming that the predetermined carrier amplifier is the buffer amplifier 121 closest to the input side. The configuration of the carrier control circuit 170 will now be described with reference to FIG. 4. FIG. 4 is a diagram illustrating an example of the configuration of the carrier control circuit 170 according to the first embodiment. As shown in FIG. 4, the carrier control circuit 170 includes, for example, a bias control terminal 171, a signal input terminal 172, a bias output terminal 173, transistors Q21, Q22, and Q23, a resistor R21, a capacitor C21, and a capacitor C22. The bias control terminal 171 is a terminal to which a current for determining a bias point when no input is applied is supplied from an external circuit. The signal input terminal 172 is a terminal to which an inverted signal of the signal Dcont1 output from the carrier output circuit 160 is input. The bias output terminal 173 is connected to, for example, the base of the buffer amplifier 121 and is a terminal for supplying a bias current to the base. The transistor Q21 is a transistor that supplies a bias current to the buffer amplifier 121. For example, the collector of the transistor Q21 is connected to a power supply Vcc2, and the emitter is connected to the base of the buffer amplifier 121 via the bias output terminal 173. The base of the transistor Q21 is connected to the bias control terminal 171. The collector of the transistor Q22 is connected to the base of the transistor Q21, the base is connected to the signal input terminal 172, and the emitter is connected to ground. That is, the base current of the transistor Q21 is adjusted in response to the signal Dcont1 input from the signal input terminal 172. The resistor R21, the transistor Q23, the capacitor C21, and the capacitor C22 form a feedback circuit in relation to the transistor Q21. The capacitor C21 is a capacitor for filtering out RF signals that may enter the transistor Q21.Furthermore, capacitor C22 is connected to the collector of transistor Q23 and acts to prevent the RF signal from entering the collector of transistor Q23. Note that capacitor C22 can be eliminated by increasing the capacitance of capacitor C21. Furthermore, resistor R21, transistor Q23, capacitor C21, and capacitor C22 do not necessarily have to be provided, and the configuration is not limited to that shown in FIG.

[0025] In the power amplifier module 100 according to the first embodiment, when the carrier output circuit 160 detects saturation of the output amplifier 123, the voltage of the signal Dcont1 decreases as shown in Fig. 3. Here, for example, an inverted signal of the signal Dcont1 is input to the signal input terminal 172 of the carrier control circuit 170. The inverting circuit may be realized by a NOT circuit or an inverting circuit using a transistor.

[0026] <<Modifications>> A first modified example of the carrier output circuit 160 will be described with reference to FIG. 5. FIG. 5 is a diagram illustrating an example of the configuration of a carrier output circuit 160a according to the first modified example. Note that if a field-effect transistor is used instead of a bipolar transistor in the output amplifier 123 of FIG. 5, the collector of the output amplifier 123 is replaced with the drain of the output amplifier 123. As shown in FIG. 5, the carrier output circuit 160a detects the voltage amplitude of the collector of the output amplifier 123. Based on the voltage amplitude of the collector, the carrier output circuit 160a outputs a signal Dcont1 indicating that the output amplifier 123 is saturated. As shown in FIG. 5, the carrier output circuit 160 includes, for example, an input terminal 161a, an output terminal 162a, a transistor Q31, a transistor Q32, a resistor R31, a resistor R32, a resistor R33, a resistor R34, and a capacitor C31. The input terminal 161a is a terminal to which the collector voltage of the output amplifier 123 is input. The output terminal 162a is a terminal for outputting the signal Dcont1. The collector of the transistor Q31 is connected to the power supply Vbat through a resistor R33, the base is connected to the node between the resistors R31 and R32, and the emitter is connected to ground. The base of the transistor Q31 is connected to the base of the transistor Q32 through a resistor R31, and the collector of the transistor Q31 is connected to the base of the transistor Q32. That is, the transistor Q31, the resistor R31, and the resistor R32 form a constant voltage circuit. Therefore, the base potential of the transistor Q32 is kept constant by the constant voltage circuit. The base of the transistor Q32 is connected to the constant voltage circuit, the collector is connected to the power supply Vbat through a resistor R34, and the emitter is connected to the input terminal 161a. The collector of the transistor Q32 is connected to the output terminal 162a. The capacitor C31 is a capacitor for smoothing the signal Dcont1. One end of the capacitor C31 is connected to the node between the collector of the transistor Q32 and the output terminal 162a, and the other end is connected to ground.

[0027] Next, a second modified example of the carrier output circuit 160 will be described with reference to FIG. 6. FIG. 6 is a diagram illustrating an example of the configuration of a carrier output circuit 160b according to the second modified example. As shown in FIG. 6, the carrier output circuit 160b includes, for example, an input terminal 161b, an output terminal 162b, transistors Q41, Q42, and Q43, diodes D41, D42, resistors R41, R42, and R43, a capacitor C41, and a current source Is1. The input terminal 161b is a terminal to which the collector voltage of the output amplifier 123 is input. The output terminal 162b is a terminal for outputting a signal Dcont1. The collector of the transistor Q41 is connected to the input terminal 161b, the emitter is connected to the anode of the diode D41, and the base is connected to a predetermined reference potential B1. The cathode of the diode D41 is connected to the output terminal 162b via the resistor R41. The collector of transistor Q42 is connected to power supply Vcc3 through current source Is1, the emitter is connected to the anode of diode D42, and the base is connected to a predetermined reference potential B1. The collector of transistor Q43 is connected to the cathode of diode D42 through resistor R42, the emitter is connected to ground, and the base is connected to power supply Vcc3 through resistor R43. One end of capacitor C41 is connected to the predetermined reference potential B1, and the other end is connected to ground. Note that diodes D41 and D42 may also be realized by diode-connected transistors.

[0028] A third modified example of the carrier output circuit 160 will now be described with reference to FIG. 7. FIG. 7 illustrates an example of the configuration of a carrier output circuit 160c according to the third modified example. Details common to the carrier output circuit 160b according to the second modified example will be omitted, and only differences will be described. As shown in FIG. 7, the carrier output circuit 160c is a circuit obtained by adding an input terminal 162c, a transistor Q44, a diode D43, and a resistor R44 to the carrier output circuit 160b according to the second modified example. The input terminal 162c is, for example, a terminal to which the collector voltage of the output amplifier 133 in the peak circuit 130 is input. The collector of the transistor Q44 is connected to the input terminal 162c, the emitter is connected to the anode of the diode D43, and the base is connected to a predetermined reference potential B1. The cathode of the diode D43 is connected to the output terminal 163c via the resistor R44.

[0029] 5 to 7, carrier output circuits 160a to 160c output a signal Dcont1 whose voltage increases when saturation of output amplifier 123 is detected. Therefore, there is no need to invert the voltage input to signal input terminal 172 of carrier control circuit 170, and a simple circuit configuration can be realized.

[0030] ===Operation of power amplifier module 100=== The operation of the power amplifier module 100 will be described below with reference to FIGS. 1 to 5. First, in the power amplifier module 100, when the output amplifier 123 is saturated, the base-collector diode of the output amplifier 123 is turned on. This increases the base current of the output amplifier 123 as shown in FIG. 3, which increases the emitter current of the transistor Q11 in the carrier output circuit 160 shown in FIG. 2 and also increases the base current of the transistor Q11. This decreases the collector current of the transistor Q12, which in turn decreases the base current of the transistor Q12. This decreases the base potential of the transistor Q12, which in turn decreases the signal Dcont1. Therefore, the carrier output circuit 160 can output the signal Dcont1 based on the base current of the output amplifier 123.

[0031] Next, for example, an inverted signal Dcont1 is input to the carrier control circuit 170 shown in FIG. 4 from a signal input terminal 172. When the inverted signal Dcont1 is input to the base of transistor Q22, the transistor Q22 turns on. When transistor Q22 turns on, the current supplied to the base of transistor Q21 flows to transistor Q22, reducing the base current of transistor Q21. That is, the base current of buffer amplifier 121, supplied from bias output terminal 173 connected to the emitter of transistor Q21, decreases. This lowers the bias point of buffer amplifier 121, alleviating the saturation state of output amplifier 123 and preventing damage to power amplifier module 100.

[0032] Power Amplification Module 200 According to Second Embodiment A power amplifier module 200 according to the second embodiment will be described with reference to Figs. 8 and 9. Fig. 8 is a diagram showing an example of the configuration of the power amplifier module 200 according to the second embodiment. Fig. 9 is a diagram showing an example of the configuration of a carrier control circuit 270 according to the second embodiment. Note that, among the configurations of the power amplifier module 200 according to the second embodiment, description of those parts that are common to the configuration of the power amplifier module 100 according to the first embodiment will be omitted, and only the different configurations will be described. Furthermore, similar actions and effects resulting from similar configurations will not be mentioned sequentially.

[0033] In response to a decrease in gain due to a decrease in the load impedance of the carrier amplifier when the carrier amplifier is saturated and the peak amplifier operates, the power amplifier module 200 suppresses the decrease in gain by raising the bias point of the carrier amplifier before the load impedance of the carrier amplifier decreases.

[0034] 8, the power amplifier module 200 includes, for example, an input terminal 201, an output terminal 202, a divider 210, a carrier circuit 220, a peaking circuit 230, a peak phase shifter 240, a carrier phase shifter 241, a combining unit 250, a carrier output circuit 260, a peaking circuit 261, a control output circuit 262, and a carrier control circuit 270. Note that the input terminal 201, the output terminal 202, the divider 210, the carrier circuit 220, the peaking circuit 230, the peak phase shifter 240, the carrier phase shifter 241, the combining unit 250, and the carrier output circuit 260 are similar to the input terminal 101, the output terminal 102, the divider 110, the carrier circuit 120, the peaking circuit 130, the peak phase shifter 140, the carrier phase shifter 141, the combining unit 150, and the carrier output circuit 160, and therefore description thereof will be omitted.

[0035] The peak output circuit 261, for example, supplies a bias current to the output amplifier 233 of the peak circuit 230 and detects the base current of the output amplifier 233. The peak output circuit 261 outputs a signal (hereinafter referred to as "signal Dcont2") indicating that the output amplifier 233 is saturated, based on the base current of the output amplifier 233. Note that the configuration of the peak output circuit 261 can be the same as that of the carrier output circuit 160, and therefore a description thereof will be omitted.

[0036] The control output circuit 262 outputs a signal (hereinafter referred to as "signal Dcont3") for controlling the bias point of the buffer amplifier 221 in the carrier circuit 220 to the carrier control circuit 270, for example, based on the signal Dcont1 output from the carrier output circuit 260 and the signal Dcont2 output from the peak output circuit 261. The control output circuit 262 may be configured, for example, as an analog circuit including a differential amplifier, or may be configured to convert the signals Dcont1 and Dcont2 into digital signals and then convert them back into analog signals. Furthermore, when the control output circuit 262 converts the signals Dcont1 and Dcont2 into digital signals, for example, the control output circuit 262 may generate the signal Dcont3 taking into account the envelope signal of the signal RFin, its history, the ambient temperature, etc.

[0037] Carrier control circuit 270 is, for example, a circuit that controls the bias point of a predetermined carrier amplifier in carrier circuit 220. When carrier circuit 220 is configured with multiple carrier amplifiers, the predetermined carrier amplifier is preferably, for example, buffer amplifier 221 located closest to the input side. For convenience, the following description will be given assuming that the predetermined carrier amplifier is buffer amplifier 221. Here, the configuration of carrier control circuit 270 will be described with reference to FIG. 9. FIG. 9 is a diagram showing an example of the configuration of carrier control circuit 270. As shown in FIG. 9, carrier control circuit 270 includes, for example, a switching circuit 270a and a current adding circuit 270b.

[0038] The switching circuit 270a includes, for example, an input terminal 271a, an output terminal 271b, and a transistor Q51. The input terminal 271a is a terminal to which a signal Dcont3 output from the control output circuit 262 is input. The output terminal 271b is connected to the base of the buffer amplifier 221 and is a terminal that supplies a bias current. The transistor Q51 has a base connected to the input terminal 271a, a collector connected to the current adding circuit 270b, and an emitter connected to ground.

[0039] The current adder circuit 270b includes, for example, field effect transistors M51, M52, and M53, and a bias generating circuit 270c. The field effect transistors M51 and M52 form a current mirror. The field effect transistor M51 has a source connected to the collector of the transistor Q51, a source and a gate connected together, and a drain connected to a power supply Vcc4. The field effect transistor M52 has a source connected to the source of the field effect transistor M53, and a drain connected to the power supply Vcc4. The field effect transistor M53 has a source connected to the output terminal 271b, a gate connected to the bias generating circuit 270c, and a drain connected to the power supply Vcc4.

[0040] Next, the operation of the power amplifier module 200 will be described with reference to FIGS. 8 and 9. First, in the power amplifier module 200, when the output amplifier 223 of the carrier circuit 220 becomes saturated, the base-collector diode of the output amplifier 223 becomes ON. As a result, the base current of the output amplifier 223 increases. The carrier output circuit 260 detects the increased base current and outputs a signal Dcont1 to the control output circuit 262. Similarly, when the output amplifier 233 of the peak circuit 230 becomes saturated, the base-collector diode of the output amplifier 233 becomes ON. As a result, the base current of the output amplifier 233 increases. The peak output circuit 261 detects the base current of the output amplifier 233 and outputs a signal Dcont2 to the control output circuit 262. The control output circuit 262 outputs a signal Dcont3 to the carrier control circuit 270 based on the signals Dcont1 and Dcont2. In the carrier control circuit 270, when a signal Dcont3 is input to the input terminal 271a, the transistor Q51 is turned on. When a current flows through the collector of the transistor Q51, a current flows through the field-effect transistors M51 and M52, which form a current mirror. This causes a current to be added to the node N1, to which the source of the field-effect transistor M52 is connected. In the carrier control circuit 270, a bias current flows through the field-effect transistor M53 by the bias generation circuit 270c even before the signal Dcont3 is input. That is, the carrier control circuit 270 adds the current flowing through the node N1 due to the input of the signal Dcont3 to the bias current. The carrier control circuit 270 supplies this bias current to the base of the buffer amplifier 221 via the output terminal 271b. This allows the power amplifier module 200 to raise the bias point of the output amplifier 223 and suppress a decrease in gain before the load impedance of the output amplifier 223 decreases.

[0041] <<First Modification>> A first modified example of the power amplifier module 200 will be described with reference to Fig. 10. Fig. 10 is a diagram showing the configuration of a first modified example of the power amplifier module 200 according to the second embodiment. In this modified example, a description of matters common to the above-described embodiment will be omitted, and only the differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned one by one.

[0042] The power amplifier module 200 according to the first modification example raises the bias point of the buffer amplifier 231 when the output amplifier 223 of the carrier circuit 220 approaches saturation. Furthermore, the power amplifier module 200 lowers the bias point of the buffer amplifier 231 when the output amplifier 233 of the peaking circuit 230 approaches saturation. This makes it possible to prevent a breakdown of the peaking circuit 230 due to additional power being input to the output amplifier 233, for example, when the output amplifier 233 of the peaking circuit 230 becomes saturated while the output amplifier 223 of the carrier circuit 220 is not saturated due to an external factor.

[0043] In the power amplifier module 200 according to the first modification, a peak control circuit 271 is provided instead of the carrier control circuit 270. The peak control circuit 271 is, for example, a circuit that controls the bias point of a predetermined peak amplifier in the peak circuit 230. When the peak circuit 230 is made up of a plurality of peak amplifiers, the predetermined peak amplifier is preferably the peak amplifier closest to the input side (here, the buffer amplifier 231). The configuration of the peak control circuit 271 is similar to the configuration of the carrier control circuit 270, for example, and therefore description thereof will be omitted.

[0044] <<Second Modification>> A second modified example of the power amplifier module 200 will be described with reference to Fig. 11. Fig. 11 is a diagram showing the configuration of the second modified example of the power amplifier module 200 according to the second embodiment. In this modified example, a description of matters common to the above-described embodiment will be omitted, and only the differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned one by one.

[0045] The power amplifier module 200 according to the second modification raises the bias point of the buffer amplifier 221 of the carrier circuit 220 when the output amplifier 233 of the peak circuit 230 approaches saturation, and raises the bias point of the buffer amplifier 231 of the peak circuit 230 when the output amplifier 223 of the carrier circuit 220 approaches saturation. Furthermore, the power amplifier module 200 lowers the bias point of the buffer amplifier 231 of the peak circuit 230 when the output amplifier 233 of the peak circuit 230 approaches saturation. This makes it possible to raise the bias point of the output amplifier 223 and suppress a decrease in gain, for example, before the load impedance of the output amplifier 223 of the carrier circuit 220 decreases. Furthermore, if the output amplifier 233 becomes saturated when the output amplifier 223 is not saturated due to an external factor, it is possible to suppress a breakdown of the peak circuit 230 caused by additional power being input to the output amplifier 233. The power amplifier module 200 according to the second modification is provided with a carrier control circuit 270 and a peak control circuit 271. The configurations of the carrier control circuit 270 and the peak control circuit 271 are as described above, and therefore a description thereof will be omitted.

[0046] Power Amplification Module 300 According to the Third Embodiment A power amplifier module 300 according to the third embodiment will be described with reference to Fig. 12. Fig. 12 is a diagram showing an example of the configuration of the power amplifier module 300 according to the third embodiment. Note that, among the configurations of the power amplifier module 300 according to the third embodiment, descriptions of those parts that are common to the configurations of the power amplifier modules 100 and 200 according to the first and second embodiments will be omitted, and only the different configurations will be described. Furthermore, similar actions and effects resulting from similar configurations will not be mentioned sequentially.

[0047] The power amplifier module 300 controls the pass characteristics of at least one of the carrier circuit 320 and the peak circuit 330, thereby controlling the saturation state of at least one of the output amplifiers 323 and 333. This alleviates the saturation state of at least one of the carrier amplifier or peak amplifier on the most output side, and therefore the power amplifier module 300 can prevent damage to the power amplifier module 300 due to saturation of the carrier amplifier or peak amplifier.

[0048] The power amplifier module 300 includes a control output circuit 362, a carrier control circuit 380, and a peak control circuit 381. It is sufficient that the power amplifier module 300 includes at least either the carrier control circuit 380 or the peak control circuit 381.

[0049] The control output circuit 362 outputs a signal (hereinafter referred to as "signal Dcont4") for controlling the pass characteristics of at least one of the carrier control circuit 380 or the peak control circuit 381, based on, for example, the signal Dcont1 output from the carrier output circuit 360 and the signal Dcont2 output from the peak output circuit 361. The control output circuit 362 may be configured, for example, as an analog circuit including a differential amplifier, or may be configured to convert the signals Dcont1 and Dcont2 into digital signals and then convert them back into analog signals. Furthermore, when the control output circuit 362 converts the signals Dcont1 and Dcont2 into digital signals, for example, the control output circuit 362 may generate the signal Dcont4 taking into account the envelope signal of the signal RFin, its history, the ambient temperature, etc.

[0050] Carrier control circuit 380 may be, for example, a variable attenuator that changes the characteristics of the current that is supplied to the base of a predetermined carrier amplifier. Carrier control circuit 380 is connected in series between buffer amplifier 321 and driver amplifier 322, for example. Note that carrier control circuit 380 is not limited to being connected in series between buffer amplifier 321 and driver amplifier 322, and may be connected in series between driver amplifier 322 and output amplifier 323, or may be connected in series to the input side of buffer amplifier 321.

[0051] Peak control circuit 381 may be, for example, a variable attenuator that changes the characteristics of the current that is supplied to the base of a predetermined peak amplifier. Peak control circuit 381 is connected in series between buffer amplifier 331 and driver amplifier 332, for example. Note that peak control circuit 381 is not limited to being connected in series between buffer amplifier 331 and driver amplifier 332, and may be connected in series between driver amplifier 332 and output amplifier 333, or may be connected in series to the input side of buffer amplifier 331.

[0052] Next, an example of the configuration of the carrier control circuit 380 will be described with reference to FIG. 13. FIG. 13 illustrates an example of the configuration of the carrier control circuit 380 according to the third embodiment. The peak control circuit 381 has a similar configuration to the carrier control circuit 380, and therefore its description will be omitted. The carrier control circuit 380 controls whether to pass the signal RF1a output from the buffer amplifier 321, for example, based on the signal Dcont4. That is, the carrier control circuit 380 changes the pass characteristics of the signal RF1a, for example, based on the signal Dcont4. This allows the carrier control circuit 380 to easily control the operation of the output amplifier 323. As shown in FIG. 13, the carrier control circuit 380 includes, for example, an input terminal 380a, an output terminal 380b, a control terminal 380c, a transistor Q61, a resistor R61, a resistor R62, a capacitor C61, and an inductor L61. The input terminal 380a is a terminal to which the signal RF1 is supplied. The output terminal 380b outputs a signal RF from the emitter of the transistor Q61 in response to the signal Dcont4. The control terminal 317d is a terminal to which the signal Dcont4 is supplied. The transistor Q61 has a collector connected to the input terminal 318a through a capacitor C61, an emitter connected to the output terminal 318b, and a base connected to the control terminal 380c through a resistor R61. The collector of the transistor Q61 is connected to a power supply Vcc5 through a resistor R62. The capacitor C61 is a capacitor for cutting the DC component of the signal RF1a. The inductor L61 has one end connected to the emitter of the transistor Q61 and the other end connected to ground. The inductor L61 is an inductor for directing the DC component of the signal RF1a to ground. Note that, although the output of the control output circuit 362 shown in FIG. 12 is shown connected directly to the control terminal 380c shown in FIG. 13, a level shift circuit may be inserted as appropriate. Furthermore, the transistor Q61 shown in FIG. 13 is described as a bipolar transistor, but may also be a field effect transistor.

[0053] Note that the carrier control circuit 380 is not limited to the variable attenuator described above. The carrier control circuit 380 may be, for example, a switch that switches whether or not the signal RF1 is passed to the driver amplifier 322. The switch is, for example, connected in series to the base of the buffer amplifier 321. The switch is turned on when the signal Dcont4 is input from the output circuit 324. That is, the switch switches, for example, to pass the signal RF1 when in the on state and not pass the signal RF1 when in the off state. This allows the carrier control circuit 380 to control the operating point of the output amplifier 323 with a simple configuration.

[0054] A first modified example of the carrier control circuit 380 will now be described with reference to FIG. 14. FIG. 14 is a diagram showing an example of the configuration of a carrier control circuit 1380 according to the first modified example. Details common to the above-described carrier control circuit 380 will be omitted, and only differences will be described. As shown in FIG. 14, the carrier control circuit 1380 is a circuit obtained by adding a transistor Q62, resistors R63 and R64, and a capacitor C62 between an input terminal 1380a and an output terminal 1380b to the carrier control circuit 380. The collector of the transistor Q62 is connected to the output terminal 1380b via the capacitor C62, the emitter is connected to ground via the inductor L41, and the base is connected to the control terminal 1380c via the resistor R43. The emitter of the transistor Q62 is connected to the emitter of the transistor Q61. The collector of the transistor Q62 is connected to the power supply Vcc6 via the resistor R64. Although the output of control output circuit 362 shown in Fig. 12 is shown connected directly to control terminal 1380c shown in Fig. 14, a level shift circuit may be inserted as appropriate. Also, transistor Q61 and transistor Q62 shown in Fig. 14 are described as bipolar transistors, but they may also be field effect transistors.

[0055] A second modified example of the carrier control circuit 380 will be described with reference to FIG. 15. FIG. 15 is a diagram illustrating an example of the configuration of the carrier control circuit 2380 according to the second modified example. As shown in FIG. 15, the carrier control circuit 2380 includes, for example, an input terminal 2380a, an output terminal 2380b, a control terminal 2380c, a diode D71, a diode D72, an inductor L71, an inductor L72, a capacitor C71, a capacitor C72, and inductors L73 and L74 and capacitors C73, C74, C75, C76, and C77 that configure a 90-degree hybrid circuit. The input terminal 2380a is a terminal to which a signal RF1a is supplied. The output terminal 2380b is a terminal to which a signal RF corresponding to the signal Dcont4 is output. The control terminal 2380c is connected to the anode of the diode D71 via the inductor L71 and to the anode of the diode D72 via the inductor L72. The cathodes of diode D71 and diode D72 are connected to ground. Capacitor C71 is a capacitor for cutting DC components, with one end connected to the anode of diode D71 and the other end connected to the 90-degree hybrid circuit. Capacitor C72 is a capacitor for cutting DC components, with one end connected to the anode of diode D72 and the other end connected to the 90-degree hybrid circuit. Note that, although the output of control output circuit 362 shown in FIG. 12 is shown here as being directly connected to control terminal 2380c shown in FIG. 15, a level shift circuit may be inserted as appropriate.

[0056] Power Amplification Module 400 According to the Fourth Embodiment A power amplifier module 400 according to the fourth embodiment will be described with reference to Fig. 16. Fig. 16 is a diagram showing an example of the configuration of the power amplifier module 400 according to the fourth embodiment. Note that, among the configuration of the power amplifier module 400 according to the fourth embodiment, a description of the components common to the configurations of the power amplifier modules 100, 200, and 300 according to the first, second, and third embodiments will be omitted, and only the different configurations will be described. Furthermore, similar actions and effects resulting from similar configurations will not be mentioned sequentially.

[0057] Power amplifier module 400 controls buffer amplifier 421 of carrier circuit 420 based on the frequency of the signal output from combiner 450 (hereinafter referred to as the "combined signal"). This alleviates the saturation state of the carrier amplifier on the most output side, thereby preventing damage to power amplifier module 400 due to saturation of that carrier amplifier. Power amplifier module 400 includes a carrier output circuit 460, a carrier control circuit 470, and a conversion unit 490.

[0058] Carrier output circuit 460 includes, for example, a filter circuit (not shown), and outputs to conversion section 490 a signal for controlling buffer amplifier 421 of carrier circuit 420 based on the frequency of the synthesized signal.

[0059] The conversion unit 490 converts into a direct current the signal output from the carrier output circuit 460. For convenience, the signal converted by the conversion unit 490 will be described below as a "signal Dcont5."

[0060] The carrier control circuit 470 is, for example, a circuit that controls the bias point of a predetermined carrier amplifier in the carrier circuit 420. When the carrier circuit 420 is composed of multiple carrier amplifiers, the predetermined carrier amplifier is preferably, for example, the buffer amplifier 421 located closest to the input side. For convenience, the following description will be given assuming that the predetermined carrier amplifier is the buffer amplifier 421. The configuration of the carrier control circuit 470 will be described with reference to FIG. 17 . FIG. 17 is a diagram illustrating an example of the configuration of the carrier control circuit 470 according to the fourth embodiment. As shown in FIG. 17 , the carrier control circuit 470 includes, for example, a level shift circuit 471, a transistor Q81, a current source I8, and a capacitor C81. The level shift circuit 471 is, for example, a circuit that increases the level of an input DC signal Dcont5. The level shift circuit 471 outputs the increased signal Dcont5 to the current source I8. The current source I8 flows a current based on the signal Dcont5 output from the level shift circuit 471. The transistor Q81 is, for example, a transistor that functions as a variable resistor. The base of transistor Q81 is connected to its collector, its collector is connected to power supply Vcc7 through resistor R81, its collector is connected to the collector of buffer amplifier 421 through capacitor C81, and its emitter is connected to current source I8 and the base of buffer amplifier 421. When signal Dcont5 is input to current source I8, carrier control circuit 470 reduces the current supplied to the base of buffer amplifier 421, which is connected to the emitter of transistor Q81. In other words, carrier control circuit 470 can control the base current of buffer amplifier 421 based on signal Dcont5.

[0061] Next, a modified configuration of the carrier control circuit 470 will be described with reference to FIG. 18. FIG. 18 is a diagram showing an example of the configuration of a carrier control circuit 1470 according to a first modified example. As shown in FIG. 18, the carrier control circuit 1470 includes, for example, a level shift circuit 1471, a field-effect transistor M91, a capacitor C91, and a capacitor C92. The level shift circuit 1471 outputs a signal Dcont5 with a higher level to the gate of the field-effect transistor M91. The field-effect transistor M91 is, for example, a transistor that functions as a variable resistor. The field-effect transistor M91 has a gate connected to the level shift circuit 1471, a source connected to the base of the buffer amplifier 421 via the capacitor C92, and a drain connected to the collector of the buffer amplifier 421 via the capacitor C91.

[0062] ===Summary=== A power amplifier module 100 according to an exemplary embodiment of the present disclosure includes a carrier circuit 120 including one or more carrier amplifiers, a peak circuit 130 including one or more peak amplifiers, a carrier control circuit 170 that controls the base current or gate voltage of a predetermined carrier amplifier (e.g., buffer amplifier 121) in the carrier circuit 120, and a carrier output circuit 160 that is connected to the carrier amplifier (e.g., output amplifier 123) on the most output side in the carrier circuit 120 and outputs a signal Dcont1 (carrier control signal) for controlling the base current or gate voltage of the predetermined carrier amplifier (e.g., buffer amplifier 121) to the carrier control circuit 170. This makes it possible to adjust the saturation state and gain of the carrier amplifier (e.g., output amplifier 123) in the Doherty amplifier circuit, thereby preventing damage to the power amplifier module 100.

[0063] Furthermore, the carrier output circuit 160 of the power amplifier module 100 outputs a signal Dcont1 (carrier control signal) based on the base current or gate current of the output amplifier 123 (carrier amplifier) ​​on the most output side in the carrier circuit 120, and the carrier control circuit 170 controls the base current or gate voltage of a predetermined carrier amplifier (for example, the buffer amplifier 121) based on the signal Dcont1 (carrier control signal). This makes it possible to adjust the saturation state and gain of the output amplifier 123 on the most output side in the Doherty amplifier circuit, thereby preventing damage to the power amplifier module 100.

[0064] Furthermore, the carrier control circuit 170 of the power amplifier module 100 controls the bias supplied to the base or gate of a predetermined carrier amplifier (for example, the buffer amplifier 121) to be reduced based on the signal Dcont1 (carrier control signal). This alleviates the saturation state of the output amplifier 123 on the most output side, thereby preventing the power amplifier module 100 from being destroyed due to saturation of the output amplifier 123.

[0065] Moreover, the power amplifier module 200 further includes a peak output circuit 261 that outputs a signal Dcont2 (peak control signal) based on the base current or gate current of the output amplifier 233 on the most output side in the peak circuit 230, and a control output circuit 262 (first output circuit) that outputs a signal Dcont3 (first control signal) to the carrier control circuit 270 based on the signals Dcont1 (carrier control signal) and Dcont2 (peak control signal) for controlling the carrier control circuit 270, and the carrier control circuit 270 controls the base current or gate voltage of a predetermined carrier amplifier (for example, buffer amplifier 221) based on the signal Dcont3 (first control signal). This makes it possible to raise the bias point of the carrier circuit 220 and suppress a decrease in gain before the load impedance of the carrier circuit 220 decreases.

[0066] The power amplifier module 200 further includes a peak output circuit 261 that outputs a signal Dcont2 (peak control signal) based on the base current or gate current of the output amplifier 233 on the most output side in the peak circuit 230, a control output circuit 262 (second output circuit) that outputs a signal Dcont3 (second control signal) to the peak control circuit 271 based on the signals Dcont1 (carrier control signal) and Dcont2 (peak control signal) to control the base current of a predetermined peak amplifier in the peak circuit, and the peak control circuit 271 that controls the base current or gate voltage of a predetermined peak amplifier (e.g., buffer amplifier 231) based on the signal Dcont3 (second control signal). This makes it possible to raise the bias point of the carrier circuit 220 and suppress a decrease in gain before the load impedance of the carrier circuit 220 decreases, and to suppress a breakdown in the peak circuit 230 due to additional power being input to the peak circuit 230 when the peak circuit 230 becomes saturated while the carrier circuit 220 is not saturated due to an external factor.

[0067] Furthermore, the carrier circuit 120 of the power amplifier module 100 includes a plurality of carrier amplifiers (for example, a buffer amplifier 121, a driver amplifier 122, and an output amplifier 123) connected in series, and a predetermined carrier amplifier is the buffer amplifier 121 closest to the input side in the carrier circuit 120. The carrier control circuit 170 controls the base current or gate voltage of the buffer amplifier 121 closest to the input side based on a signal Dcont1 (carrier saturation signal). This makes it possible to more efficiently adjust the saturation state of the carrier circuit 120 in the Doherty amplifier circuit.

[0068] Furthermore, the peak circuit 230 of the power amplifier module 200 includes a plurality of peak amplifiers (for example, a buffer amplifier 231, a driver amplifier 232, and an output amplifier 233) connected in series, and a predetermined peak amplifier is the buffer amplifier 231 closest to the input side in the peak circuit 230, and the peak control circuit 271 controls the base current or gate voltage of the buffer amplifier 231 closest to the input side based on a signal Dcont3 (second control signal). This makes it possible to more efficiently adjust the saturation states of the carrier circuit 220 and the peak circuit 230 in the Doherty amplifier circuit.

[0069] Furthermore, the carrier control circuit 380 of the power amplifier module 300 is a variable attenuator that changes the characteristics of the current supplied to the base of a specified carrier amplifier or the characteristics of the AC voltage applied to the gate of a specified carrier amplifier based on the signal Dcont4 (carrier saturation signal). This makes it possible to more efficiently adjust the saturation state of the carrier circuit 320 in the Doherty amplifier.

[0070] The power amplifier module 300 also includes a control output circuit 362 (peak output circuit) that outputs a signal Dcont4 (peak control signal) based on the base current or gate current of the output amplifier 333 on the most output side in the peak circuit 330, and a peak control circuit 381 that is a variable attenuator that changes the characteristics of the current supplied to the base of a specified peak amplifier or the characteristics of the voltage applied to the gate of a specified peak amplifier based on the signal Dcont4 (peak control signal). This makes it possible to more efficiently adjust the saturation state of the peak circuit 330 in the Doherty amplifier circuit.

[0071] Furthermore, power amplifier module 400 includes carrier phase shifter 441 (phase shifter) that changes the phase of the signal output from carrier circuit 420, combiner 450 that combines the signal whose phase has been changed by carrier phase shifter 441 (phase shifter) with the signal output from peak circuit 430 to output a combined signal, and carrier output circuit 460 that outputs signal Dcont5 (carrier control signal) to carrier control circuit 470 based on the frequency of the combined signal. This makes it possible to more efficiently adjust the saturation state of carrier circuit 420 in the Doherty amplifier circuit.

[0072] The above-described embodiments are intended to facilitate understanding of the present disclosure and are not intended to limit the present disclosure. The present disclosure may be modified or improved without departing from its spirit, and equivalents thereof are also included in the present disclosure. In other words, designs modified by a person skilled in the art as appropriate are also included within the scope of the present disclosure as long as they comprise the features of the present disclosure. The elements and their arrangements included in the embodiments are not limited to those exemplified and can be modified as appropriate. [Explanation of symbols]

[0073] 100, 200, 300, 400...power amplification modules, 120, 220, 320, 420...carrier circuits, 130, 230, 330, 430...peak circuits, 160, 260, 360, 460...carrier output circuits, 170, 270, 380, 470...carrier control circuits, 271, 381...peak control circuits, 262, 362...control output circuits.

Claims

1. a carrier circuit including one or more carrier amplifiers; a peaking circuit including one or more peaking amplifiers; a carrier output circuit that outputs a first saturation detection signal that indicates saturation of an output carrier amplifier based on a base current or a gate voltage of the output carrier amplifier that is the carrier amplifier on the most output side in the carrier circuit; a carrier control circuit that controls a bias supplied to a base or a gate of a predetermined carrier amplifier in the carrier circuit to be reduced based on the first saturation detection signal; A power amplifier module comprising:

2. the carrier circuit includes a plurality of carrier amplifiers connected in series; the predetermined carrier amplifier is a carrier amplifier closest to an input side in the carrier circuit, the carrier control circuit controls, based on the first saturation detection signal, to reduce the bias supplied to the base or gate of the carrier amplifier closest to the input side; The power amplifier module according to claim 1 .

3. the carrier control circuit is a variable attenuator that changes a characteristic of a current supplied to a base of the predetermined carrier amplifier or a characteristic of an AC voltage applied to a gate of the predetermined carrier amplifier based on the first saturation detection signal. The power amplifier module according to claim 1 .

4. A carrier circuit including one or more carrier amplifiers; a peaking circuit including one or more peaking amplifiers; a phase shifter that changes the phase of a signal output from an output carrier amplifier that is the carrier amplifier on the most output side in the carrier circuit; a combining unit that combines the signal whose phase has been changed by the phase shifter and the signal output from the peak circuit and outputs a combined signal; a carrier output circuit that outputs a signal for controlling a predetermined carrier amplifier in the carrier circuit based on the frequency of the composite signal; a converter that converts the signal output from the carrier output circuit into a direct current and outputs a first saturation detection signal that indicates saturation of the output carrier amplifier; a carrier control circuit that controls the bias supplied to the base or gate of the predetermined carrier amplifier so as to be reduced based on the first saturation detection signal; A power amplifier module comprising:

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