Electrical offset correction in magnetoresistive bridges.
The bridge circuit with controlled switches and clock signals effectively cancels electrical offset in MR elements, improving the accuracy of magnetic field sensors by summing differential output voltages from alternating switch states.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-02-15
- Publication Date
- 2026-03-11
AI Technical Summary
Magnetic field sensors using MR elements face challenges in accurately measuring magnetic fields due to electrical offset components caused by mismatches between MR elements, which cannot be eliminated using current-spinning methods typical in Hall plates.
A bridge circuit design with controlled switches and clock signals is employed to measure differential output voltages in alternating configurations, effectively canceling out electrical offset components by summing voltages from different switch states.
This approach significantly improves the accuracy of magnetic field measurements by eliminating electrical offset and drift, enhancing the precision of MR bridge performance.
Smart Images

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Abstract
Description
[Background technology]
[0001]
[0001] Magnetic field sensors are used in a variety of applications including, but not limited to, angle sensors that sense the angle of a magnetic field direction, current sensors that sense a magnetic field generated by a current carried by a current-carrying conductor, magnetic switches that sense the proximity of a ferromagnetic body, rotation detectors that sense the passage of a ferromagnetic article, e.g., the magnetic domains of a ring magnet, or a ferromagnetic target (e.g., gear teeth) where the magnetic field sensor is used in combination with a back bias magnet or other magnet, magnetic field sensors that sense the field density of a magnetic field, linear sensors that sense the position of a ferromagnetic target, and the like.
[0002]
[0002] In certain applications, magnetic field sensors include MR elements. Various types of MR elements are known, including semiconductor MR elements such as indium antimonide (InSb), giant magnetoresistance (GMR) elements, anisotropic magnetoresistance (AMR) elements, tunneling magnetoresistance (TMR) elements, and magnetic tunnel junctions (MTJs). The magnetic field sensing element may be a single element, or alternatively, may include two or more magnetic field sensing elements arranged in various configurations, such as a half bridge or a full (Wheatstone) bridge. Depending on the device type and other application requirements, the magnetic field sensing element may be a device fabricated from type IV semiconductor materials, such as silicon (Si) or germanium (Ge), or type III-V semiconductor materials, such as gallium arsenide (GaAs) or indium compounds, such as indium antimonide (InSb).
[0003]
[0003] MR elements have an electrical resistance that changes in the presence of an external magnetic field. A spin valve is a type of magnetoresistive element formed from two or more magnetic materials or layers. The simplest form of a spin valve has a reference (or magnetically pinned) layer and a free layer. The resistance of the spin valve changes depending on the magnetic alignment of the reference and free layers. Generally, the magnetic alignment of the reference layer does not change, but the magnetic alignment of the free layer moves in response to an external magnetic field. Summary of the Invention [Means for solving the problem]
[0004] In one embodiment, a bridge circuit includes a first magnetoresistive (MR) element, a second MR element connected in series with the first MR element at a first node, a third MR element, a fourth MR element connected in series with the third MR element at a second node, a first switch having one end connected to a power supply voltage and the other end connected to the third MR element, a second switch having one end connected to ground and the other end connected to the fourth MR element, a third switch having one end connected to ground and the other end connected to the third MR element and the first switch, and a fourth switch having one end connected to the power supply voltage and the other end connected to the fourth MR element and the second switch. The first and second MR elements are in parallel with the third and fourth MR elements.
[0005] The above-described aspects may include one or more of the following features. In a first mode, the first and second switches may be closed and the third and fourth switches may be open; in a second mode, the first and second switches may be open and the third and fourth switches may be closed; and an electrical offset component may be removed from the differential output voltage of the bridge by summing the differential voltage output of the bridge in the first mode and the differential voltage output of the bridge in the second mode. The first and second switches may be controlled by a first clock signal, and the third and fourth switches may be controlled by a second clock signal. When the first clock signal is at a high voltage level, the second clock signal may be at a low voltage level. When the first clock signal is at a low voltage level, the second clock signal may be at a high voltage level. The first MR element and the fourth MR element may be fabricated to have substantially equal magnetic field characteristics, and the second MR element and the third MR element may be fabricated to have substantially equal magnetic field characteristics. The first MR element and the fourth MR element may have substantially the same magnetic field reference direction. The second MR element and the third MR element may have substantially the same magnetic field reference direction. The magnetic field reference direction of the second and third MR elements may be opposite to the magnetic field reference direction of the first and fourth MR elements. The magnetic field reference direction of the second and third MR elements may be opposite to the direction of the external magnetic field. The magnetic field reference direction of the second and third MR elements may be substantially the same as the magnetic field reference direction of the first and fourth MR elements. The first and fourth MR elements may detect an external magnetic field that is opposite to the external magnetic field detected by the second and third MR elements. The bridge circuit may be a magnetometer or a gradiometer. The bridge circuit may further include a fifth switch having one end connected to a power supply voltage and the other end connected to the first MR element, and a sixth switch having one end connected to ground and the other end connected to the second MR element. The fifth switch and the sixth switch may each be closed.
[0006] In another aspect, a magnetic field sensor includes a bridge circuit. The bridge circuit includes a first magnetoresistive (MR) element, a second MR element connected in series to the first MR element at a first node, a third MR element, a fourth MR element connected in series to the third MR element at a second node, a first switch having one end connected to a power supply voltage and the other end connected to the third MR element, a second switch having one end connected to ground and the other end connected to the fourth MR element, a third switch having one end connected to ground and the other end connected to the third MR element and the first switch, and a fourth switch having one end connected to the power supply voltage and the other end connected to the fourth MR element and the second switch. The first and second MR elements are in parallel with the third and fourth MR elements.
[0007] The above-described aspects may include one or more of the following features. In a first mode, the first and second switches may be closed and the third and fourth switches may be open; in a second mode, the first and second switches may be open and the third and fourth switches may be closed; and an electrical offset component may be removed from the differential output voltage of the bridge by summing the differential voltage output of the bridge in the first mode and the differential voltage output of the bridge in the second mode. The first and second switches may be controlled by a first clock signal, and the third and fourth switches may be controlled by a second clock signal. When the first clock signal is at a high voltage level, the second clock signal may be at a low voltage level. When the first clock signal is at a low voltage level, the second clock signal may be at a high voltage level. The first MR element and the fourth MR element may be fabricated to have substantially equal magnetic field characteristics, and the second MR element and the third MR element may be fabricated to have substantially equal magnetic field characteristics. The first MR element and the fourth MR element may have substantially the same magnetic field reference direction. The second MR element and the third MR element may have substantially the same magnetic field reference direction. The magnetic field reference direction of the second and third MR elements may be opposite to the magnetic field reference direction of the first and fourth MR elements. The magnetic field reference direction of the second and third MR elements may be opposite to the direction of the external magnetic field. The magnetic field reference direction of the second and third MR elements may be substantially the same as the magnetic field reference direction of the first and fourth MR elements. The first and fourth MR elements may detect an external magnetic field that is opposite to the external magnetic field detected by the second and third MR elements. The bridge circuit may be a magnetometer or a gradiometer. The bridge circuit may further include a fifth switch having one end connected to a power supply voltage and the other end connected to the first MR element, and a sixth switch having one end connected to ground and the other end connected to the second MR element. The fifth switch and the sixth switch may each be closed. The sensor may further include an offset processing circuit configured to receive the output of the bridge circuit.The first and second switches may be controlled by a first clock signal, and the third and fourth switches may be controlled by a second clock signal. The offset processing circuit may include an amplifier configured to receive the output of the bridge circuit, a sample and hold (S&H) configured to receive the output of the amplifier, a filter configured to receive the output from the S&H circuit, and a summer configured to receive the output of the amplifier and the output of the filter. The S&H circuit may be enabled by a third clock signal. The filter may be a first filter, and the offset processing circuit may further include a second filter configured to receive the output of the summer. The S&H circuit may be a first S&H circuit, and the offset processing circuit may further include a second S&H configured to receive the output of the summer, and the second S&H circuit may be enabled by a fourth clock signal. The fourth clock signal may be equal to the first clock signal. The fourth clock cycle may have a smaller duty cycle than the first clock signal. The third clock signal may be equal to the second clock signal. The third clock cycle may have a smaller duty cycle than the second clock signal.
[0008] In a further aspect, a method includes correcting an electrical offset in a magnetoresistive (MR) bridge having a first leg and a second leg. A first end of the first leg is connected to a power supply voltage and a second end of the first leg is connected to ground. A first end of the second leg is connected to the power supply voltage and a second end of the second leg is connected to ground. The correcting step includes measuring a first differential output voltage of the MR bridge; after measuring the first differential output voltage, inverting the second leg of the MR bridge so that the second end is connected to the power supply voltage and the first leg is connected to ground; after the inverting step, measuring a second differential output voltage; and combining the first and second differential output voltages. The inverting step can include closing a switch connected to an MR element of the MR bridge and opening a switch connected to the MR element of the MR bridge.
[0009] The foregoing features can be more fully understood from the following description of the drawings. The drawings aid in explaining and understanding the disclosed technology. Because it is often impractical or impossible to illustrate and describe every possible embodiment, the figures provided show one or more exemplary embodiments. As such, the figures do not limit the scope of the broad concepts, systems, and techniques described herein. Like numbers in the figures represent like elements. [Brief explanation of the drawings]
[0010] [Figure 1]
[0010] FIG. 1 is a diagram of an example of a magnetic field sensor. [Figure 2]
[0011] FIG. 2 is a diagram illustrating an example of a magnetoresistive circuit. [Figure 3A]
[0012] FIG. 1 is a diagram of a prior art bridge with magnetoresistive elements and electrical offsets. [Figure 3B]
[0013] FIG. 3B is a diagram of an example of a bridge circuit used to eliminate the effects of electrical offsets found in the prior art bridge circuit of FIG. 3A. [Figure 4]
[0014] 2 is a graph of an example of a timing diagram of a first clock signal CLKA and a second clock signal CLKB. [Figure 5A]
[0015] FIG. 5A is a diagram of an example of an equivalent bridge circuit to the bridge circuit of FIG. 3B when the first clock signal CLKA is at a high voltage level and the second clock signal CLKB is at a low voltage level. [Figure 5B]
[0016] FIG. 5B is a diagram of an example of an equivalent bridge circuit to the bridge circuit of FIG. 3B when the first clock signal CLKA is at a low voltage level and the second clock signal CLKB is at a high voltage level. [Figure 6A]
[0017] FIG. 6A is a diagram of one example of an offset processing circuit. [Figure 6B]
[0018] FIG. 6B is a graph of an example timing diagram of second clock signal CLKB and second clock sample signal CLKSB. [Figure 7A]
[0019] FIG. 7A is a diagram of another example of an offset processing circuit. [Figure 7B]
[0020] FIG. 7B is a graph of an example timing diagram of first clock signal CLKA and first clock sample signal CLKSB. DETAILED DESCRIPTION OF THE INVENTION
[0011]
[0021] Techniques for correcting electrical offset in bridges including magnetoresistive (MR) elements, or MR bridges, are described herein. Unlike Hall plates or vertical Hall devices, which can be modeled as Wheatstone bridges, bridges with MR elements are constructed from individual elements arranged as Wheatstone bridges and therefore cannot be current-spun to eliminate electrical offset. Mismatch between the MR elements in an MR bridge will appear as an electrical offset component even in the absence of any applied magnetic field. The techniques described herein correct the electrical offset while a magnetic field is applied to the MR bridge, thereby eliminating the electrical offset and offset drift component, which greatly improves the accuracy of the MR bridge compared to without any correction.
[0012]
[0022] As used herein, the term "magnetic field sensor" is used to describe circuits that use magnetic field sensing elements, generally in combination with other circuits. Magnetic field sensors are used in a variety of applications, including, but not limited to, angle sensors that sense the angle of a magnetic field direction, current sensors that sense a magnetic field generated by a current carried by a current-carrying conductor, magnetic switches that sense the proximity of a ferromagnetic object, rotation detectors that sense the passage of a ferromagnetic article, e.g., the magnetic domains of a ring magnet, or a ferromagnetic target (e.g., gear teeth) where the magnetic field sensor is used in combination with a back bias magnet or other magnet, and magnetic field sensors that sense the field density of a magnetic field.
[0013]
[0023] As used herein, the term "target" is used to describe an object that is sensed or detected by a magnetic field sensor or magnetoresistive element. The target may include a conductive material that allows eddy currents to flow within the target, for example, a metallic target that conducts electricity.
[0014]
[0024] 1, the magnetic field sensor 10 may include a magnetoresistive circuit 16, an analog circuit 22, and a digital circuit 26. The magnetoresistive circuit detects changes in the magnetic field from a magnet 120.
[0015]
[0025] The analog circuitry 22 is configured to receive the output signal 30 from the magnetoresistive circuitry 16. The analog circuitry 22 further converts the baseband signal from an analog signal to a digital signal.
[0016]
[0026] Digital circuitry 26 receives the digital signal from analog circuitry 22 and, for example, filters the digital signal. The filtered digital b signal is provided by digital circuitry 26 as an output signal 50 of magnetic field sensor 10. In some examples, the output signal may indicate the angle and / or position of magnet 120.
[0017]
[0027] 2, one example of the magnetoresistive circuit 16 (FIG. 1) that corrects for electrical offset in an MR bridge is magnetoresistive circuit 16'. Magnetoresistive circuit 16' includes a bridge circuit 202 and an offset processing circuit 204. Bridge circuit 202 has outputs A and B, which are received by offset processing circuit 204. Offset processing circuit 204 processes outputs A and B to generate output signal 30 that removes the effects of the electrical offset.
[0018]
[0028] 3A, a prior art bridge including an MR element is an MR bridge 300. The MR bridge 300 has a left leg 301a and a right leg 301b.
[0019]
[0029] The MR bridge 300 includes an MR element 302a in series with an MR element 304a. The MR elements 302a and 304a form the left leg 301a of the MR bridge 300.
[0020]
[0030] The MR element 302a is connected to a power supply voltage VCC, and the MR element 304a is connected to ground (GND). A first node 306 that forms an output A is located between the MR elements 302a and 304a.
[0021]
[0031] MR bridge 300 further includes MR element 302b in series with MR element 304b. MR element 304b is connected to a power supply voltage VCC, and MR element 302b is connected to ground (GND). Between MR elements 302b and 304b is a second node 308 that forms output B. The voltage output of MR bridge 300 is the difference between output A and output B.
[0022]
[0032] MR elements 302a and 302b are fabricated to have the same magnetic field characteristics (e.g., reference angle, electrical resistance, etc.). In one example, MR elements 302a and 302b have substantially the same reference angle within a few degrees, where the reference angle is the angle at which the MR element is most sensitive to changes in the external magnetic field. In another example, MR elements 302a and 302b have substantially the same electrical resistance as a function of magnetic field within 100 ohms. For example, MR elements 302a and 302b have an electrical resistance R1(B), where B is the magnetic field.
[0023]
[0033] MR element 304a and MR element 304b are fabricated to have the same magnetic field characteristics (e.g., reference angle, electrical resistance, etc.). In one example, MR element 304a and MR element 304b have substantially the same reference angle within a few degrees. In another example, MR element 304a and MR element 304b have substantially the same electrical resistance as a function of magnetic field within 100 ohms. For example, MR element 304a and MR element 304b have electrical resistance R2(B).
[0024]
[0034] In one particular example, bridge 300 is a magnetometer. MR elements 302 a, 302 b, 304 a, and 304 b detect the same external magnetic field (not shown). The reference angles of MR elements 302 a and 302 b are in the same direction as the external magnetic field and opposite to the reference angles of MR elements 304 a and 304 b.
[0025]
[0035] In another specific example, bridge 300 is a gradiometer. The reference angles of MR elements 302 a, 302 b, 304 a, and 304 b are in the same direction. In this configuration, MR elements 302 a and 302 b detect an external magnetic field that is opposite in direction to the external magnetic field detected by MR elements 304 a and 304 b.
[0026]
[0036] However, mismatches due to manufacturing, for example, may occur between MR elements 302a, 302b, 304a, and 304b, creating an electrical offset. In Figure 3A, the electrical offset is represented by electrical offset component 320 disposed between MR element 304b and second node 308. MR elements 302b, 304b, and electrical offset component 320 form left leg 301b of MR bridge 300.
[0027]
[0037] Denoting the resistance of the electrical offset component 320 as ΔR, the voltage output of the MR bridge 300 is a function of the magnetic field and can be expressed as:
[0028]
number
[0038] If ΔR<<R1+R2, then:
[0029]
number
[0030]
[0039] For small variations in B, we get:
[0031]
number
[0032] Therefore, the result is as follows.
number
[0033]
[0040] The output of the MR bridge 300 is proportional to the difference in resistance between the legs 301a, 301b of the MR bridge 300 caused by a change in magnetic field. If there is a fixed imbalance between both legs (represented here by ΔR, which is independent of the magnetic field), it will add to the output voltage as an error component. If the sensed magnetic signal is a baseband signal, the electrical offset caused by ΔR cannot be distinguished from the magnetic signal (as when the current spinning method is used with a Hall plate). Even when no magnetic field is applied, there will be an output voltage that is different from zero. That is,
[0034]
number
[0035] The mismatch term is represented by ΔR, so it is assumed that for any applied magnetic field, R2(B=0)=R1(B=0) and R1+R2=RLEG.
[0036]
[0041] In one example, the MR elements 302a, 302b, 304a, and 304b can each be a TMR element. In another example, the MR elements 302a, 302b, 304a, and 304b can each be a GMR element. In a further example, one or more of the MR elements 302a, 302b, 304a, and 304b can be either a TMR element or a GMR element.
[0037]
[0042] 3B, an example of bridge circuit 202 (FIG. 2) is bridge circuit 202′, which removes electrical offset component 320.
[0038]
[0043] Bridge circuit 202' includes MR bridge 300'. MR bridge 300' includes left leg 301a' and right leg 301b'. As described further herein, the output voltage of MR bridge 300' can be measured in a first mode, and then right leg 301b' can be inverted and the output voltage of MR bridge 300' can be measured again in a second mode. The two output voltages of MR bridge 300' in each mode can be used to remove the effects of electrical offset 320.
[0039]
[0044] MR bridge 300' is similar to MR bridge 300 but includes additional electrical components. MR element 302b and MR element 304b form left leg 301a' of MR bridge 300'. MR element 302b, MR element 304b, and electrical offset component 320 form right leg 301b' of MR bridge 300'.
[0040]
[0045] For example, the bridge circuit 202' includes a switch 312 disposed between the power supply voltage VCC and the MR element 304b, and a switch 314 disposed between the MR element 202b and ground.
[0041]
[0046] Bridge circuit 202′ further includes a switch 316 and a switch 318. One end of switch 316 is connected to a third node 336 disposed between switch 312 and MR element 304b, and the other end of switch 316 is connected to ground. One end of switch 318 is connected to a fourth node 338 disposed between switch 314 and MR element 302b, and the other end of switch 318 is connected to power supply voltage VCC.
[0042]
[0047] Switches 312 and 314 receive clock signal CLKA. Switches 316 and 318 receive clock signal CLKB. An example of clock signals CLKA and CLKB is shown in FIG.
[0043]
[0048] When clock signal CLKA is at a high voltage level, clock signal CLKB is at a low voltage level. This scenario is referred to as the first mode.
[0044]
[0049] When clock signal CLKA is at a low voltage level, clock signal CLKB is at a high voltage level. This scenario is referred to as the second mode.
[0045]
[0050] In some examples, one or more of the switches 312, 314, 316, 318 may be transistors. The transistors may be, for example, n-type metal oxide semiconductor (NMOS) transistors.
[0046]
[0051] In another example, bridge circuit 202′ can include additional switches in left leg 301 a′ of bridge 300′ to compensate for effects (e.g., resistance, parasitic capacitance, etc.) caused by switches 312, 314. These additional switches in left leg 301 a′ will be closed (i.e., in the “on” position) whether in the first mode or the second mode.
[0047]
[0052] 5A and 5B, an example of an equivalent bridge circuit of bridge circuit 202′ (FIG. 3B) in the first mode is bridge circuit 500a. The output voltage of bridge circuit 500a is:
[0048]
number
[0049] This is the same as bridge 300 (FIG. 3A) because by closing switches 312, 314 and opening switches 316 and 318, bridge circuit 500a becomes equivalent to bridge 300 (FIG. 3A).
[0050]
[0053] An example of an equivalent bridge circuit of bridge circuit 202' (FIG. 3B) in the second mode is bridge circuit 500b. The output voltage of bridge circuit 500b is:
[0051]
number
[0052]
[0054] When ΔR≪R1+R2, Vout_2 nd mode(B) is equal to:
[0053]
number
[0054]
[0055] For small B variations, we have:
[0055]
number
[0056] Therefore, the result is as follows.
number
[0057]
[0056] Therefore, Vout_1st mode(B) plus Vout_2nd mode(B) is equal to:
[0058]
number
[0059] This does not include the electrical offset representation ΔR.
[0060] In one example, the rate at which the bridge circuit 202′ switches from the first mode to the second mode and back to the first mode (called the switching frequency) is greater than the maximum signal frequency of the magnetic field sensor 10 (FIG. 1). In another example, the switching frequency can be twice the maximum signal frequency of the magnetic field sensor 10 (FIG. 1). In a further example, the switching frequency is greater than 1 kHz. In another example, the switching frequency is faster than the electrical offset drift caused by temperature drift.
[0061] 6A, an example of the offset processing circuit 204 (FIG. 2) is the offset processing circuit 204′. The offset processing circuit 204′ includes a differential amplifier 702, a sample and hold (S&H) circuit 706, a filter 710, a summer 712, and a filter 714.
[0062] The difference between voltage signals A and B is received and amplified by differential amplifier 702 to form signal 752. Signal 752 is received by S&H circuit 706. During the second mode, when second clock signal CLKB is at a high voltage level, the S&H circuit samples and holds the error offset component.
[0063]
[0060] S&H circuit 706 is controlled by second clock sample signal CLKSB. In one example, when second clock sample signal CLKSB is at a high voltage level, a sample of signal 752 is taken, and when second clock sample signal CLKSB is at a logic low voltage level, a sample of signal 752 is not taken. The taken sample is an error component.
[0064] In one example, second clock sample signal CLKSB can be the same as second clock signal CLKB. In another example, second clock sample signal CLKSB can have a smaller duty cycle than second clock signal CLKB, but second clock sample signal CLKSB is at a high voltage level only when second clock signal CLKB is at a high voltage level, as shown in FIG.
[0065]
[0062] Filter 710 filters the error component. In one example, filter 710 is a low-pass filter. Summer 712 adds the error component from signal 752 to generate signal 756, which is filtered by filter 714 to generate signal 30. In one example, filter 714 is a low-pass filter.
[0066] Referring to FIG. 7A, another example of offset processing circuit 204 (FIG. 2) is offset processing circuit 204″. Offset processing circuit 204″ is the same as offset circuit 204′ (FIG. 6A) except that filter 714 (FIG. 6A) has been replaced with S&H circuit 720. This may be desirable if filter 714 (FIG. 6A) takes too long to settle.
[0067]
[0064] The S&H circuit 720 is controlled by the first clock sample signal CLKSA. In one example, when the first clock sample signal CLKSA is at a high voltage level, a sample of the signal 756 is taken, and when the first clock sample signal CLKSA is at a logic low voltage level, a sample of the signal 756 is not taken. The taken sample is the output voltage of the MR bridge without the error component.
[0068] In one example, the first clock sample signal CLKSA can be the same as the first clock signal CLKA. In another example, the first clock sample signal CLKSA can have a smaller duty cycle than the first clock signal CLKA, but the first clock sample signal CLKSA is at a high voltage level only when the first clock signal CLKA is at a high voltage level, as shown in FIG.
[0069]
[0066] Having described preferred embodiments that serve to illustrate the various concepts, structures, and techniques that are the subject of this patent, it will now be apparent to those skilled in the art that other embodiments incorporating these concepts, structures, and techniques may be used.
[0070]
[0067] Elements of different embodiments described herein may be combined to form other embodiments not specifically described above. Various elements that are described in the context of a single embodiment may also be provided separately or in any suitable subcombination. Other embodiments not specifically described herein are also within the scope of the following claims.
Claims
1. a first magnetoresistive (MR) element; a second magnetoresistive (MR) element connected in series with the first magnetoresistive (MR) element at a first node; a third magnetoresistive (MR) element; and a fourth magnetoresistive (MR) element connected in series with the third magnetoresistive (MR) element at a second node, the first magnetoresistive (MR) element and the second magnetoresistive (MR) element being in parallel with the third magnetoresistive (MR) element and the fourth magnetoresistive (MR) element; a first switch having one end connected to a power supply voltage and the other end connected to the third magnetoresistive (MR) element; a second switch having one end connected to ground and the other end connected to the fourth magnetoresistive (MR) element; a third switch having one end connected to ground and the other end connected to the third magnetoresistive (MR) element and the first switch; a fourth switch having one end connected to the power supply voltage and the other end connected to the fourth magnetoresistive (MR) element and the second switch; In a bridge circuit including In a first mode, the first switch and the second switch are closed, and the third switch and the fourth switch are open; In a second mode, the first switch and the second switch are open, and the third switch and the fourth switch are closed; an electrical offset component is removed from the differential voltage output of the bridge circuit by summing the differential voltage output of the bridge circuit in the first mode and the differential voltage output of the bridge circuit in the second mode; Bridge circuit.
2. the first switch and the second switch are controlled by a first clock signal; the third switch and the fourth switch are controlled by a second clock signal; 2. The bridge circuit of claim 1.
3. 3. The bridge circuit of claim 2, wherein when the first clock signal is at a high voltage level, the second clock signal is at a low voltage level.
4. 4. The bridge circuit of claim 3, wherein said second clock signal is at a high voltage level when said first clock signal is at a low voltage level.
5. the first magnetoresistive (MR) element and the fourth magnetoresistive (MR) element are fabricated to have substantially equal magnetic field characteristics; the second magnetoresistive (MR) element and the third magnetoresistive (MR) element are fabricated to have substantially equal magnetic field characteristics; 2. The bridge circuit of claim 1.
6. 6. The bridge circuit of claim 5, wherein the first magnetoresistive (MR) element and the fourth magnetoresistive (MR) element have substantially equal magnetic field reference directions.
7. 7. The bridge circuit of claim 6, wherein the second magnetoresistive (MR) element and the third magnetoresistive (MR) element have substantially equal magnetic field reference directions.
8. 8. The bridge circuit of claim 7, wherein the magnetic field reference direction of the second magnetoresistive (MR) element and the third magnetoresistive (MR) element is opposite to the magnetic field reference direction of the first and fourth magnetoresistive (MR) elements.
9. 9. The bridge circuit of claim 8, wherein the magnetic field reference direction of the second magnetoresistive (MR) element and the third magnetoresistive (MR) element is opposite to the direction of an external magnetic field.
10. 8. The bridge circuit of claim 7, wherein the magnetic field reference direction of the second magnetoresistive (MR) element and the third magnetoresistive (MR) element is substantially the same as the magnetic field reference direction of the first magnetoresistive (MR) element and the fourth magnetoresistive (MR) element.
11. 11. The bridge circuit of claim 10, wherein the first magnetoresistive (MR) element and the fourth magnetoresistive (MR) element detect an external magnetic field that is opposite in direction to an external magnetic field detected by the second magnetoresistive (MR) element and the third magnetoresistive (MR) element.
12. 2. The bridge circuit of claim 1, wherein the bridge circuit is a magnetometer or a gradiometer.
13. The bridge circuit includes: a fifth switch having one end connected to the power supply voltage and the other end connected to the first magnetoresistive (MR) element; a sixth switch having one end connected to ground and the other end connected to the second magnetoresistive (MR) element; further comprising the fifth switch and the sixth switch are each closed; 2. The bridge circuit of claim 1.
14. A magnetic field sensor including a bridge circuit, the bridge circuit comprising: a first magnetoresistive (MR) element; a second magnetoresistive (MR) element connected in series with the first magnetoresistive (MR) element at a first node; a third magnetoresistive (MR) element; and a fourth magnetoresistive (MR) element connected in series with the third magnetoresistive (MR) element at a second node, the first magnetoresistive (MR) element and the second magnetoresistive (MR) element being in parallel with the third magnetoresistive (MR) element and the fourth magnetoresistive (MR) element; a first switch having one end connected to a power supply voltage and the other end connected to the third magnetoresistive (MR) element; a second switch having one end connected to ground and the other end connected to the fourth magnetoresistive (MR) element; a third switch having one end connected to ground and the other end connected to the third magnetoresistive (MR) element and the first switch; a fourth switch having one end connected to the power supply voltage and the other end connected to the fourth magnetoresistive (MR) element and the second switch; In a magnetic field sensor, In a first mode, the first switch and the second switch are closed, and the third switch and the fourth switch are open; In a second mode, the first switch and the second switch are open, and the third switch and the fourth switch are closed; an electrical offset component is removed from the differential voltage output of the bridge circuit by summing the differential voltage output of the bridge circuit in the first mode and the differential voltage output of the bridge circuit in the second mode; Sensor.
15. the first switch and the second switch are controlled by a first clock signal; the third switch and the fourth switch are controlled by a second clock signal; The sensor of claim 14.
16. 16. The sensor of claim 15, wherein the second clock signal is at a low voltage level when the first clock signal is at a high voltage level.
17. 17. The sensor of claim 16, wherein the second clock signal is at a high voltage level when the first clock signal is at a low voltage level.
18. the first magnetoresistive (MR) element and the fourth magnetoresistive (MR) element are fabricated to have substantially equal magnetic field characteristics; The sensor of claim 14 , wherein the second magnetoresistive (MR) element and the third magnetoresistive (MR) element are fabricated to have substantially equal magnetic field characteristics.
19. 20. The sensor of claim 18, wherein the first magnetoresistive (MR) element and the fourth magnetoresistive (MR) element have substantially equal magnetic field reference directions.
20. 20. The sensor of claim 19, wherein the second magnetoresistive (MR) element and the third magnetoresistive (MR) element have substantially equal magnetic field reference directions.
21. 21. The sensor of claim 20, wherein the magnetic field reference direction of the second magnetoresistive (MR) element and the third magnetoresistive (MR) element is opposite to the magnetic field reference direction of the first magnetoresistive (MR) element and the fourth magnetoresistive (MR) element.
22. 22. The sensor of claim 21, wherein the magnetic field reference direction of the second magnetoresistive (MR) element and the third magnetoresistive (MR) element is opposite to a direction of an external magnetic field.
23. 21. The sensor of claim 20, wherein the magnetic field reference direction of the second magnetoresistive (MR) element and the third magnetoresistive (MR) element is substantially the same as the magnetic field reference direction of the first magnetoresistive (MR) element and the fourth magnetoresistive (MR) element.
24. 24. The sensor of claim 23, wherein the first magnetoresistive (MR) element and the fourth magnetoresistive (MR) element detect an external magnetic field that is opposite in direction to an external magnetic field detected by the second magnetoresistive (MR) element and the third magnetoresistive (MR) element.
25. The sensor of claim 14 , wherein the bridge circuit is a magnetometer or a gradiometer.
26. The bridge circuit includes: a fifth switch having one end connected to the power supply voltage and the other end connected to the first magnetoresistive (MR) element; a sixth switch having one end connected to ground and the other end connected to the second magnetoresistive (MR) element; further comprising the fifth switch and the sixth switch are each closed; The sensor of claim 14.
27. The sensor of claim 14 , further comprising an offset processing circuit configured to receive the differential voltage output of the bridge circuit.
28. the first switch and the second switch are controlled by a first clock signal; the third switch and the fourth switch are controlled by a second clock signal; The offset processing circuit an amplifier configured to receive the output of the bridge circuit; a sample and hold (S&H) configured to receive the output of the amplifier, the S&H circuit being enabled by a third clock signal; a filter configured to receive the output from the S&H circuit; a summer configured to receive the output of the amplifier and the output of the filter; 28. The sensor of claim 27, comprising:
29. the filter is a first filter; the offset processing circuit further includes a second filter configured to receive the output of the summer; 29. The sensor of claim 28.
30. the S&H circuit is a first S&H circuit; the offset processing circuit further includes a second S&H configured to receive the output of the adder, the second S&H circuit being enabled by a fourth clock signal; 29. The sensor of claim 28.
31. 31. The sensor of claim 30, wherein the fourth clock signal is equal to the first clock signal.
32. 31. The sensor of claim 30, wherein the fourth clock signal has a smaller duty cycle than the first clock signal.
33. 29. The sensor of claim 28, wherein the third clock signal is equal to the second clock signal.
34. 30. The sensor of claim 28, wherein the third clock signal has a smaller duty cycle than the second clock signal.
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