Quantum computer and its control method

Abstract

To provide a quantum computer with especially a loading technique capable of improving stability.SOLUTION: A preferred aspect of the present invention is a quantum computer with a semiconductor. The quantum computer includes: a semiconductor crystal substrate; a gate electrode array structure formed on the surface of the semiconductor crystal substrate; and a reservoir unit as a carrier supply means. In the quantum computer, a classical potential barrier is formed within the semiconductor crystal substrate by controlling the voltage applied to the gate electrode array structure, and the charge supplied from the reservoir is transferred into the classical potential barrier.SELECTED DRAWING: Figure 6A

Description

[Technical Field]

[0001] This invention relates to a device for integrating qubits and a control method for the device. [Background technology]

[0002] Quantum computers are thought to be capable of processing information at much faster speeds than existing computers. While existing computers deal with binary values ​​of 0 and 1, quantum computers are characterized by their ability to handle superposition states of these two values.

[0003] To handle superposition states, quantum computers require elements that realize qubits. Qubits can be realized using superconducting elements, cold atoms, photons, and quantum dots made of semiconductor elements. The basic operations of a quantum computer include initialization, computation, and readout, and further basic operations include single-qubit gates and two-qubit gates, and it is known that universal quantum computing can be realized by combining these.

[0004] Here, we will explain the initialization method for qubits using semiconductor elements. By applying a voltage to a gate electrode fabricated within a semiconductor device, a fine potential structure is generated in the semiconductor that can confine individual electrons. By transferring and confining individual electrons in this potential and aligning their spins (degrees of freedom used as qubits), the qubits are initialized. Here, the operations of "transferring" and "confining" electrons together are called "loading." Methods for loading individual electrons into quantum dots have been investigated to date.

[0005] Patent Document 1 discloses a method for transferring electrons using the Coulomb blockade phenomenon. Patent Document 2 discloses a method for transferring a single electron between quantum dots by the tunneling effect. Non-Patent Document 1 reports on the principle of a single-electron pump, which will be described later. [Prior art documents]

Patent Document

[0006]

Patent Document 1

Patent Document 2

Non-Patent Document

[0007]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0008] The present invention relates to a method for packing (loading) electrons one by one into each dot of a quantum dot array at high speed and with high precision for realizing a quantum computer using a quantum dot array structure.

[0009]

[0010] However, the movement of electrons using the tunneling effect is the control of a quantum phenomenon, is vulnerable to noise, is difficult in terms of voltage control accuracy, device manufacturing accuracy, etc., and has problems in scalability when integrated on a large scale. In particular, since the tunneling effect is inherently a probabilistic phenomenon, it is known that there are many problems in terms of high speed, high precision, and stability.

[0011] ​On the other hand, quantum computers using large-scale quantum dot arrays require high-speed and high-precision electron loading, such as transfer speeds on the order of GHz and error rates on the order of ppm. Furthermore, electron confinement must be highly stable. Therefore, conventional electron loading methods based on the tunneling effect and Coulomb blockade have challenges in terms of speed, accuracy, and stability.

[0012] Therefore, the object of the present invention is to provide a loading method that is particularly stable in quantum computers. [Means for solving the problem]

[0013] A preferred aspect of the present invention is a quantum computer made of semiconductors, comprising a semiconductor crystal substrate, a gate electrode array structure formed on the surface of the semiconductor crystal substrate, and a reservoir section which is a carrier supply means, characterized in that a classical potential barrier is formed in the semiconductor crystal substrate by controlling the voltage applied to the gate electrode array structure, and charges supplied from the reservoir section are transferred into the classical potential barrier.

[0014] Another preferred aspect of the present invention is a method for controlling a quantum computer made of semiconductors, the method comprising: a first step of extracting a unit charge from a reservoir, which is a carrier supply means, using a classical potential barrier; a second step of sending the extracted unit charge to a desired qubit position using the gradient of the classical potential barrier; and a third step of performing a qubit operation on the unit charge sent to the desired qubit position. [Effects of the Invention]

[0015] In quantum computers, this method can provide a particularly stable loading technique. [Brief explanation of the drawing]

[0016] [Figure 1]A two-view diagram illustrating the schematic of a two-dimensional qubit array. [Figure 2A] A potential diagram to explain the electronic road. [Figure 2B] A schematic diagram of the different types of electron confinement. [Figure 3A] A schematic diagram of electron transfer to a quantum dot by classical confinement. [Figure 3B] A schematic diagram showing an example of a configuration for realizing a single-electron pump. [Figure 3C] A schematic diagram illustrating the operation of a single-electron pump. [Figure 3D] Schematic diagram of other single-electron pump operation. [Figure 4A] A schematic diagram of a single-electron transfer method. [Figure 4B] A schematic diagram of another single-electron transport method. [Figure 5] A schematic diagram of another single-electron transfer method. [Figure 6A] Plan view of a 2D large-scale quantum dot array. [Figure 6B] Plan view of another large-scale 2D quantum dot array. [Figure 6C] Plan view of another large-scale 2D quantum dot array. [Figure 7] Block diagram of a quantum computer system. [Figure 8A] A flowchart illustrating the calibration conditions for a single-electron pump. [Figure 8B] A flowchart illustrating the calibration conditions for a single-electron pump. [Figure 9A] Graphs of transistor characteristics for gates in barriers and quantum dots. [Figure 9B] A schematic diagram of the adjustment graph for pump gate coupling. [Figure 9C] A conceptual diagram of a graph used for exploring single-electron pump conditions. [Figure 10A] A graph showing the results of achieving single-electron pump operation. [Figure 10B] A graph showing the results of achieving single-electron pump operation. [Figure 10C] A graph showing the results of achieving single-electron pump operation. [Figure 11] Flowchart of the computation process of the quantum computer in the example. [Modes for carrying out the invention]

[0017] The embodiments will be described in detail below with reference to the drawings. However, the present invention is not to be construed as being limited to the embodiments described below. It will be easily understood by the parties involved that the specific configuration may be modified without departing from the spirit or purpose of the present invention.

[0018] In the configuration of the invention described below, the same reference numerals are used in common across different drawings for parts that are the same or have similar functions, and redundant explanations may be omitted. If there are multiple elements with the same or similar functions, they may be described using different subscripts. However, subscripts may be omitted in some cases.

[0019] The designations such as "Part 1," "Part 2," and "Part 3" used in this specification are for identifying constituent elements and do not necessarily limit their number, order, or content. Furthermore, the numbers used to identify constituent elements are used context by context, and a number used in one context does not necessarily indicate the same configuration in another context. Moreover, the identification of a constituent element by one number does not prevent the consideration of the function of a constituent element identified by another number.

[0020] The positions, sizes, shapes, and ranges of each component shown in drawings and other documents may not represent their actual positions, sizes, shapes, and ranges in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, and ranges disclosed in the drawings and other documents. [Examples]

[0021] [Basic configuration] This paper describes a quantum computer that uses semiconductor elements and electron spins as qubits. This quantum computer has multiple two-dimensional qubit arrays. The qubits are spin qubits whose degrees of freedom are the spins of electrons (or holes; electrons are assumed below, but holes are also acceptable) in the semiconductor. Note that Japanese Patent Publication No. 2021-27142 proposes a two-dimensional qubit array.

[0022] Figure 1 is a two-view schematic of a two-dimensional qubit array. This figure shows a portion of a qubit array 100 having a large number of qubits. The qubit array 100 is implemented in a chip placed at extremely low temperatures of a few mK to a few K, and operates in a region where thermal fluctuations can be ignored. The following explanation assumes a situation where thermal fluctuations and excitations can be ignored.

[0023] Qubit 101 is the selected qubit to be controlled, while the other qubits (e.g., 102) are unselected qubits. Wires 103 and 104 are composite structures of wires and gate electrodes placed between each qubit in the Y and X directions, respectively, and are used to generate a local magnetic field 126 on the qubit by passing currents Ia, Ib, Ic, and Id through them.

[0024] Furthermore, wirings 103 and 104 can also be used as gate electrodes to control the strength of the coupling between electron spins, and a two-qubit gate can be performed by exchange interaction. In addition, wirings 105 and 106 are composite structures of wiring and gate electrodes positioned directly above each qubit in the Y and X directions, respectively, and are used as gate electrodes to trap electrons that become qubits.

[0025] Cross-sectional view 120 is a cross-sectional view of a line containing qubits, such as wiring 106, in the qubit array 100, and is a MOS (Metal Oxide Insulator) structure composed of an insulating layer 121, a semiconductor layer 122, and a gate electrode layer forming multiple gate electrode wirings 103 and 105. By adjusting the voltage applied to the gate electrode wirings 103 and 105, a potential 124 is generated within the semiconductor layer 122, trapping electrons 123, etc.

[0026] Furthermore, this element has an AC magnetic field generator with polarization direction 110, which is implemented, for example, by a microstrip line or coplanar waveguide. This applies a nearly uniform AC magnetic field 111 to the entire qubit. By shifting the resonance frequency of a desired qubit with a local magnetic field 126 created by applying an electric current, and matching the irradiation RF frequency of the AC magnetic field 111 to this shifted resonance frequency, a qubit can be selected and quantum gate operations can be performed. In this way, spin qubits can be manipulated by ESR (Electron Spin Resonance).

[0027] Note that these figures are schematic diagrams showing a magnified portion of the qubit array 100, and the actual gate dimensions and the thickness of each layer do not represent the actual dimensions.

[0028] The two-dimensional integrated qubit array described above, which uses electron spins as qubits, assumes that one electron is already placed at each site. However, in reality, it is necessary to transfer and confine one electron to each quantum dot (site). This is called electron loading. Electron loading will be explained below.

[0029] [Overview of the Electronic Load System] Figure 2A shows a potential diagram to explain the electron load. The dotted line shows the potential distribution of electrons. It is necessary to store one electron at a time in the quantum dot 201 from the reservoir 200 where many electrons are present. The quantum dot 201 has a valley potential structure with potential barriers 202 on both sides, and the operation 203 of filling these dots one by one with electrons 204 will be described. The potential barriers 202 can be controlled, for example, by the gate voltage of the wiring 103 in Figure 1.

[0030] First, a "single-electron pump operation" is required to transport a single electron from the reservoir section 200, which contains many electrons, across the potential barrier 202. Next, a "transfer operation" is required to transport a single electron stored in a quantum dot to an adjacent quantum dot. By sequentially repeating these two operations, electrons can be confined to all quantum dots, such as 220 and 230.

[0031] Figure 2B shows a schematic diagram of the types of electron confinement. In this embodiment, electron confinement is classified into two types: "quantum confinement" and "classical confinement." In "quantum confinement," under conditions where the potential barrier is relatively low or thin, electrons 241 can move to an adjacent quantum dot by the tunneling effect 242, as shown in schematic Figure 240.

[0032] On the other hand, "classical confinement" occurs when the potential barrier is relatively high or thick, as shown in schematic Figure 250, where electron 251 cannot move to an adjacent quantum dot by tunneling (the tunneling probability is negligible), and is stably confined. These differences are characterized, for example, by the energy of the potential barrier, with a voltage range of 0.1 to 100 mV for quantum confinement (e.g., 0.1 to several tens of mV) and 0.1 to 10 V for classical confinement (e.g., 0.1 to several volts).

[0033] Similarly, electron transfers are classified into two types: "quantum transfer" and "classical transfer." "Quantum transfer" refers to the movement of electrons between quantum dots due to the tunneling effect, while "classical transfer" refers to the movement of electrons in a state where they existed at the bottom of the potential.

[0034] In "quantum transfer," as shown in the schematic diagram 260, for example, by modulating the potential barrier shown by the dotted line as indicated by the arrow, electron 261 is moved to the adjacent quantum dot by the tunneling effect 262.

[0035] In "classical transfer," as shown in the schematic diagram 270, electron 271 moves to the adjacent quantum dot by an operation 272 that overcomes the potential barrier, for example, by modulating the potential barrier shown by the dotted line as indicated by the arrow.

[0036] [Pump operation] To load electrons into a large-scale quantum dot array quickly, accurately, and stably, it is necessary to perform the "classical confinement" described above on the electrons. However, when performing classical confinement, the potential barrier must be high enough that the tunneling effect can be ignored.

[0037] Figure 3A is a schematic diagram of electron transfer to a quantum dot by classical confinement. In order to transfer electrons to this quantum dot, as shown in Figure 3A, electron 271 must overcome the high potential barrier 390 by means other than tunneling.

[0038] Therefore, a method called a ratchet-mode single-electron pump (hereinafter referred to as a single-electron pump) is used as the "classical transfer" described above. The principle of the single-electron pump is disclosed in Non-Patent Literature 1. This makes it possible to transfer electrons to the quantum dot, bypassing the high potential barrier required for "classical confinement," and thus achieve classical electron confinement.

[0039] Figure 3B shows an example of a configuration for realizing a single-electron pump. This configuration is the same as the cross-sectional view 120 in Figure 1, but with the addition of a reservoir 305 and a drain 306. The reservoir 305 contains a large number of electrons. In addition, this example configuration has an SOI (Silicon on Insulator) layer (corresponding to the insulating layer 121 and semiconductor layer 122 in Figure 1) and a BOX (Buried OXide) layer, and further has two types of gate electrodes 303 and 304 (corresponding to wiring 103 and wiring 105 in Figure 1).

[0040] In one example, the voltage between the reservoir 305 and the drain 306 is adjusted to 0V by, for example, a voltage adjustment circuit 307. A circuit 301 is connected to the electrode of the gate electrode 303 that is closest to the reservoir 305, which can apply DC bias and AC voltage. In addition, a circuit 302 is connected to the other electrodes, which can apply DC voltage. Circuit 302 may also be capable of applying AC voltage. These circuits 301 and 302 may be digital circuits, analog circuits, or a combination thereof, and the output voltage may be a digital discrete value voltage, an analog approximately continuous value voltage, or a combination thereof.

[0041] Figure 3C shows a schematic diagram of the single-electron pump operation in the configuration shown in Figure 3B. Potential 310 represents the electron potential in the classically confined quantum dot formed in the SOI. The single-electron pump is a technique for transferring only one electron from reservoir 305. The set of potentials 311, 312, and 313 constitutes the single-electron pump, and in this part, a single electron is transferred from reservoir 305 to potential 314 in a single operation.

[0042] First, circuit 301 drives the gate electrode 303, applying DC and AC voltages to the potential barrier 311. The AC voltage is driven primarily at DC levels at frequencies such as 100MHz, 1GHz, and 10GHz. DC voltages are applied to other potentials such as 312, but no AC voltages are applied. The relative magnitudes of the DC voltages at each gate will be described later.

[0043] As a result, an electron enters (Loading) the potential 312, crosses over (Ejection) the peak of the potential barrier 313, and only one electron is trapped (Trap) in the potential 314 (the portion surrounded by the potential barriers 313 and 315). In this way, the charge supplied from the reservoir 305 is transferred within the classical potential barrier. Once an electron is trapped in the potential 314, it will then be transferred one quantum dot at a time.

[0044] When the AC amplitude of the potential barrier 311 is large, the force to extract electrons from the reservoir 305 as an electron pump becomes stronger. However, in this embodiment, since it is necessary to extract single electrons, it is necessary to adjust the amplitude. The calibration method for the AC amplitude will be described later in FIG. 8B.

[0045] FIG. 3D shows a configuration in which the heights of the potential barriers 311, 312, and 313 are different from those in FIG. 3C. The potential height can be controlled by the gate voltage directly above. FIGS. 3C and 3D only differ in the DC setting, and the AC is also applied superimposed on the potential barrier 311. Note that, for example, not only the potential barrier 311 but also a method such as applying an AC voltage to the two gates of the potential barriers 311 and 312 simultaneously may be possible.

[0046] As shown in FIGS. 3C and 3D, if the overdrive voltages obtained by subtracting the threshold voltage of each gate from the voltage value applied to each gate are V1 to V5 respectively, for example, a single-electron pump shown in FIG. 3C can be realized by setting "the DC levels of V1 and V3 < the DC level of V2".

[0047] [[ID=1's]] Also, a single-electron pump shown in FIG. 3D can be realized by setting "the DC levels of V1 and V3 > the DC level of V2". Here, the higher the voltage value of the DC level, the lower the potential for the electron. Note that the actual potential shape may become more complicated due to the influence of the spacer between the gate electrodes and the like, but the single-electron pump conditions can be satisfied by adjusting the gate voltage.

[0048] With the above configuration, it is possible to transfer and confine a single electron from a reservoir containing many electrons to a classically confined quantum dot using a single-electron pump operation. Because this operates in the realm of classical transfer, it is possible to operate at high speed, with high precision and stability, and high-speed transfers of, for example, 1 GHz can be realized, making it a fundamental technology for quantum computers using large-scale quantum dot arrays.

[0049] [Dot section operation (load sequence)] Next, we will show how to transfer a single electron trapped by a single-electron pump to a different quantum dot. This loading sequence is also called shuttle.

[0050] Figures 4A and 4B show schematic diagrams of the single-electron transfer method. As explained in Figures 3C and 3D, Figures 4A and 4B describe the method of electron transport between the dots to the right of the initial state (A), after the electron is first trapped in potential 314. Here, each rectangular block represents a simplified potential, and its height can be controlled by the voltage applied to the gate electrode directly above it.

[0051] In Figure 4A, sequence 400 shows a sequence for transferring electron 402 from left to right, starting from the initial state (A). To move electron 402, a potential gradient is created by multiplying the potential 403, where the electron is currently located, by the potential 404 to which it is to be moved (B). For example, potential 403 is increased and potential 405 is decreased. Potential 406 is increased (or not decreased) to prevent the electron from returning to the left. Also, potential 407 is increased (or not decreased) to prevent the electron from going too far to the right.

[0052] By manipulating the potential gradient in this way, electrons can be transferred to the adjacent quantum dot (C). This can also be achieved by the classical transfer described above. By repeating sequence 400, electrons can be transferred to the desired quantum dot.

[0053] Sequence 401 in Figure 4B is a different electron transfer method. The potential 408 on the opposite side of the quantum dot from the destination quantum dot is increased, the potential on the destination quantum dot side is completely decreased, and the potential 409 on the opposite side of the destination quantum dot from the destination quantum dot is increased (B). This allows electrons to be transferred to the desired quantum dot (C). Note that the electron transfer methods in Figures 4A and 4B assume a voltage of 0V between the reservoir and the drain.

[0054] Figure 5 shows different electron transfer methods. In this method, the voltage between the reservoir and drain is changed from 0V during the transfer. For example, the potential in the direction of movement is made positive. At the same time, by lowering the height of all potential barriers between the transfer point and the quantum dot, the electron is pulled and transferred to the desired quantum dot. After the electron transfer, the voltage between the reservoir and drain is returned to 0V.

[0055] In single-electron pumps, high voltage adjustment accuracy is required to extract a single electron, for example, an adjustment accuracy of 0.1mV or less is necessary. On the other hand, electron transfer systems can use relatively low voltage adjustment accuracy, for example, an adjustment accuracy of about 1V is sufficient.

[0056] [2D configuration] By combining the single-electron pump and single-electron transfer described above, electrons can be transferred to desired quantum dots on a two-dimensional large-scale quantum dot array.

[0057] An example is shown in Figure 6A. It has a single-electron pump control circuit 600 and a quantum dot control circuit 601, which control the voltage applied to the gate electrodes of the single-electron pump section 602 and the quantum dot array section 603, respectively. The single-electron pump section 602 performs the operations described in Figures 3B to 3D. The quantum dot array section 603 performs the operations described in Figures 4A to 5.

[0058] Here, the relationship "number of single-electron pumps < number of quantum dots in the quantum dot array" exists, which allows for efficient electron loading by reducing the number of pumps with high drive adjustment accuracy. Furthermore, while the influence of element variations increases when the number of quantum dots in the quantum dot array is large, the control accuracy of electron transfer is not as high as described above, so robustness can be improved by this relationship.

[0059] The potential barrier 604 and the electron-confining quantum dot section 605 are arranged in two dimensions, and electrons are loaded into each quantum dot by pumping them (the gate electrodes directly above the quantum dots are omitted for clarity in the diagram). For example, to load an electron into a desired quantum dot 607, one electron is taken from the reservoir by the single-electron pump section 602 (see Figures 3B to 3D), and then transferred along the path 606 (see Figures 4A to 45). At this time, all potential barriers outside the path are raised to prevent electrons from leaving the path 606.

[0060] Furthermore, by synchronizing the drive frequency of the single-electron pump unit 602 and the electron transfer frequency between quantum dots by the quantum dot control circuit 601 as integer multiples or rational multiples, the control circuit can be simplified and the transfer accuracy can be improved.

[0061] Figure 6B shows an example of a different configuration. In this configuration, the number of quantum dot connections is reduced to improve the precision of device manufacturing. Even with fewer connections, all quantum dot sections 605 are connected via other quantum dot sections 605, so electrons obtained by the single-electron pump can be directed to the desired quantum dot.

[0062] Figure 6C shows an example of a different configuration. In this configuration, multiple single-electron pump units 602 are arranged in a line. This allows the single-electron pumps to operate in parallel, enabling even faster electron loading. The parallel control unit 610 allows multiple single-electron pump units 602 to operate in parallel. Also, the black circles represent electron-present regions, and the white circles represent electron-absent regions. As shown in the figure, creating electron-absent regions improves the degree of freedom of electron transfer, allowing, for example, a 2-qubit gate between any two electrons (qubits).

[0063] [System Diagram] Figure 7 shows an example of the system configuration. When an electronic load command is issued from the host unit 701, the control controller 702 starts control for the electronic load. The voltage control unit consists of two modules: a classical voltage control unit 703 and a quantum voltage control unit 704. The classical voltage control unit 703 and the quantum voltage control unit 704 control the voltage applied to the gate electrode of the quantum dot array unit 603.

[0064] The classical voltage control unit 703 is a voltage control unit for performing the classical confinement and classical transfer described above, and has a relatively large voltage control range of several volts. On the other hand, the quantum voltage control unit 704 is a voltage control unit for performing quantum operations on spin, and is used for controlling 2-qubit gates, etc. Therefore, its voltage control range is relatively small, of several tens of millivolts.

[0065] In the configuration of the voltage control unit shown in Figure 7, the quantum computer of this embodiment can use voltages of, for example, 0.1 to 10V for generating classical potential barriers and 0.1 to 100mV for generating quantum potential barriers as voltage ranges.

[0066] These two voltage control units can be switched by the switch unit 705. For example, the classical voltage control unit 703 is used when loading or reading electrons, and the quantum voltage control unit 704 is used when performing quantum operations. This allows for high-speed, high-precision, and stable control of the electrons in the qubit array unit 706.

[0067] In the above system, for example, the host unit 701 is a higher-level server (electronic computer), the control controller 702, classical voltage control unit 703, quantum voltage control unit 704, and switch unit 705 are external circuits attached to the qubit array unit 706, and the qubit array unit 706 is located inside the cooling device. Alternatively, all components except the host unit 701 may be implemented inside the cooling device. For example, by placing the control controller 702, classical voltage control unit 703, quantum voltage control unit 704, and switch unit 705 at the 4K stage of the dilution refrigerator, and the qubit array unit 706 at the lowest temperature position (~mK) of the dilution refrigerator, low-noise and highly efficient control becomes possible.

[0068] [Calibration method for single-electron pump conditions] Figure 8A shows an example of a calibration method for single-electron pump conditions, specifically a calibration method for the applied voltage to the gate directly above potential 312 (referred to as QG) of the quantum dot in Figure 3C. Figure 8B also shows a calibration method for the applied voltage to the gates directly above potential barriers 311 and 313 (referred to as JG1 and JG2) in Figure 3C. These calibrations are performed by the control controller 702, which controls the classical voltage control unit 703, the quantum voltage control unit 704, the switch unit 705, and the qubit array unit 706.

[0069] In the flow chart of Figure 8A, only DC voltage is applied to each gate. The gate DC voltage of QG is gradually changed to its maximum value (S801, S804), and during this time, the DC voltages of JG1 and JG2 are changed to measure a two-dimensional map (S802) and evaluate the coupling strength (S803). The gate DC voltage of QG that gives the optimal coupling strength condition is identified and stored (S805). Details are explained in Figure 9B.

[0070] In FIG. 8B, a calibration method for the applied voltages of JG1 and JG2 is shown. First, the AC amplitude applied to JG1 is set. The AC frequency is driven at a frequency such as 100 MHz, 1 GHz, 10 GHz, etc. (S811). Next, the gate DC voltage of QG is set to the voltage determined by the flow in FIG. 8A (S812). In the case of this example, V rd , QG , d , JG , ,

[0074] , JG1 , is set to -1.1V.

[0071] In this embodiment, as an example, while changing the AC amplitude V JG1 RF,in applied to the barrier gate JG1 from 0.8 to 1.5V, the DC voltage V JG1 of the barrier gate JG1 is changed in the range of 0 to 2V, the DC voltage V JG2 of the barrier gate JG2 is changed in the range of 0.5 to 2V, and a two-dimensional map is measured (S813). If a good plateau (a region where the value does not change) can be confirmed on the two-dimensional map (S814), the conditions are stored and the process ends (S815). Details will be described in FIG. 9C.

[0072] [Experimental Results of the Pump Section] FIGS. 9A to 10C show an example of experimental results of single-electron pump operation according to the device configuration of FIG. 3B.

[0073] FIG. 9A shows the transistor characteristics when two types of gates JG (gate electrode 303 in FIG. 3A) and QG (gate electrode 304 in FIG. 3A) for the barrier and the quantum dot are used at room temperature and cryogenic temperature. The dotted line represents the characteristics at room temperature (300K), and the solid line represents the characteristics at cryogenic temperature (4K). The drain current I JG ,V QG when applied is shown. V d is shown. V rd is the voltage between the reservoir and the drain.

[0074] FIG. 9B is a calibration graph for adjusting the coupling of the pump gate. It corresponds to the two-dimensional map displayed in the map measurement S802 in FIG. 8A. For the two-dimensional maps (a) to (f), the horizontal axis is the DC voltage V JG1 of the barrier gate JG1, and the vertical axis is the DC voltage V of the barrier gate JG2JG2 The DC voltage of QG is V QG This chart shows the source-drain current Id when the voltage is changed from -1.6V to +0.4V. Darker colors indicate a larger Id.

[0075] The two-dimensional map (a) shows the case of strong coupling between the pump gate, as shown in the potential coupling diagram (conceptual diagram) in the upper left of the figure, V JG1 When you move V QG This is a state in which V fluctuates. The two-dimensional map (f) shows the case where the pump-gate coupling is weak (weak coupling), as shown in the potential coupling diagram (image) in the lower right of the figure, V QG is V JG1 It is not affected.

[0076] Qualitatively, when the pump-gate coupling is strong, the single-electron pump has a strong ability to draw electrons from the reservoir. On the other hand, when the pump-gate coupling is strong, a high voltage is required at the barrier gate to move electrons. In this example, in two-dimensional maps (a) and (b), the pump-gate coupling is strong, and no current flows unless a high voltage is applied. In two-dimensional map (c), the coupling is weaker, but current flows even at a low voltage. In the coupling strength evaluation (S803) of this example, the conditions between two-dimensional maps (c) and (b) were set as the conditions for a single-electron pump with good characteristics for single-electron transport. Under the conditions of this example, V QG The voltage was set to -1.1V. The coupling strength evaluation can be performed automatically by pre-determining the evaluation conditions for the two-dimensional map, or the operator can visually select the two-dimensional map.

[0077] Figure 9C is a graph for exploring single-electron pump conditions and corresponds to the two-dimensional map (S813) in Figure 8B. In the two-dimensional map, the horizontal axis is the DC voltage V of the barrier gate JG2. JG2 The vertical axis represents the DC voltage V of the barrier gate JG1. JG1 The conditions are changed according to those described in Figure 8B. Only the barrier gate JG1 has an AC voltage superimposed.

[0078] Figures 9C (a) to (c) show the AC amplitude V of the barrier gate JG1, respectively. JG1 RF,in When I is changed to 0.8V, 1V, and 1.5V d The value of / ef is shown, and the darker colored areas are large I d This represents the value of / ef. d is the drain current, e is the unit charge (elementary charge), and f is the operating frequency of the single-electron pump (= AC frequency of the barrier gate JG1).

[0079] As can be seen from Figures 9C(a) to (c), a larger AC amplitude of the barrier gate JG1 allows the electron pump to draw more current. However, in this embodiment, it is necessary to realize a single-electron pump that draws a single charge. By operating it as a single-electron pump within the area enclosed by the thick rectangle in Figure 9C(b), it becomes possible to load a single electron using classical operation. The reason for this will be explained below.

[0080] Figure 10A is a magnified view of the area surrounding the thick rectangle in Figure 9C(b). Figure 10A is V JG1 and V JG2 and I d The relationship between / ef is shown, and the light white area is I d / ef=1, i.e., I d This is the region where =ef. In this region, the current I flows d This indicates that a unit charge e is being transported at frequency f, meaning that the transport of unit charge by a single-electron pump is realized. d V obtains the region where =ef JG1 Approximately 1.16V, V JG2 It can be seen that the voltage is approximately 1.5V.

[0081] Figure 10B is a graph showing the results of realizing single-electron pump operation, and V JG2 and I d This shows the relationship between / ef. The circles represent experimental values, and the solid line represents fitted values. Reservoir-drain voltage V rd V is 0V. Based on the calibration results explained in Figures 8B and 9B, V QGV was set to -1.1V. As explained in Figure 10A, V JG1 The voltage was set to 1.16V. The AC voltage amplitude of the barrier gate JG1 was V. JG1 RF,in V is 1V according to the conditions in Figure 9C(b). The AC frequency f of the barrier gate JG1 is arbitrary, but it was set to 100MHz. As shown in the graph in Figure 10B, V JG2 The voltage is in the range of approximately 1.6 to 1.8V. d The value of / ef becomes 1, indicating that a single-electron pump has been realized.

[0082] Figure 10C shows V JG2 When V is set to 1.5V, JG1 and I d This shows the relationship between / ef. As shown in the graph in Figure 10C, V JG1 The voltage is in the range of approximately 1.08 to 1.18V. d The value of / ef becomes 1, indicating that a single-electron pump has been realized.

[0083] Figures 10A to 10C clearly show the plateau characteristic of single-electron pump operation (Non-Patent Literature 1), confirming that the single-electron pump operation is being performed correctly. [Examples]

[0084] Example 1 describes an example in which electron loading, which involves transferring and confining one electron at a time to each quantum dot, is performed using classical operations. In classical operations, spin polarization and phase are generally not conserved, but this is not a problem in the loading and initialization state before quantum computation. In a quantum computer, after electron loading, the spin polarization is aligned and quantum gate operations (quantum computation operations) are performed, and then electrons are transferred and read out one by one.

[0085] During the above readout, electron transfer is performed as described in Figures 4A to 5. While the spin phase is irrelevant during electron readout, the spin polarization must be preserved in the quantum computation state. In classical operations, the probability of spin being up or down can be preserved during readout, allowing the electron to move as follows.

[0086] When reading out the spin state of an electron, a Z-axis measurement (measurement of the probability of spin being up or down) is usually performed. Therefore, the phase of the electron before reading out does not affect the measurement result. Thus, by classically moving the electron to the reading position after the quantum computation operation is completed, while preserving only the probability of spin being up or down, the coherence time until measurement can be effectively extended from the phase relaxation T2 to the energy relaxation time T1, thereby increasing the effective coherence time. Electron transfer while preserving the probability of spin being up or down can be achieved by adjusting the rate of change of the potential when creating a gradient in the classical potential barrier for electron transfer. Specifically, the rate of change of the potential, shown by the arrows in Figures 4A to 5, is slowed down. Although the electron transfer speed becomes slower, the probability of spin being up or down is preserved, allowing for reading out after the computation without problems.

[0087] As described above, in the quantum computer of this embodiment, by making the electron transfer rate for reading after the quantum operation slower than the electron transfer rate for loading before the quantum operation, it becomes possible to save the spin up / down probability and read the data. [Examples]

[0088] Figure 11 is a schematic flowchart of the computation process of the quantum computer in the embodiment. Such processing can be achieved by the host unit 701 in Figure 7 instructing the control controller 702, and the control controller 702 controlling the classical voltage control unit 703 and the quantum voltage control unit 704 to control the voltage applied to the gate electrode of the quantum dot array unit 603.

[0089] First, electrons are transported to a desired qubit position, for example, as shown in Figure 6A (S1101), and confined as a qubit (S1102). At this stage, since no quantum operation is performed, the state of the electron spin is irrelevant, and this is carried out by a single-electron pump and a classical potential barrier generated by the classical voltage control unit 703, as described in Example 1.

[0090] Next, the spin states are aligned and initialized as is well known (S1103), and the necessary quantum gate operations are performed (S1104). During this time, the polarization and phase of the electron spins must be preserved because the operation results must be saved, and the movement of electrons is carried out by a quantum potential barrier generated by the quantum voltage control unit 704.

[0091] Next, in the step of reading out the calculation result, electrons are transported to the reading position (S1105), and their state is read out (S1106). During this time, it is necessary to store information about the polarization of the electrons to be read out. For this purpose, a quantum potential barrier may be used, but as mentioned in the problem section above, there are issues with speed and stability. Here, as explained in Example 2, the classical voltage control unit 703 makes it possible to transport electrons without changing their polarization by slowing down the rate of change of the classical potential during electron transport, for example, compared to step S1101.

[0092] [Features of the proposed method (compatibility and switching between classical and quantum mechanics)] The operation of quantum computers using quantum dot arrays involves two types of operations: "quantum computation" which involves spin manipulation, and "electron loading" which does not involve spin manipulation. Of these, at least for "electron loading" which does not involve spin manipulation, electrons can be manipulated quickly, with high precision, and stably through classical transfer and confinement.

[0093] Non-patent document 1 reports, for example, single-electron pump operation with transfer speeds on the order of GHz and error rates on the order of ppm. Therefore, by loading electrons using a single-electron pump, it is possible to achieve transfer speeds on the order of GHz and error rates on the order of ppm, enabling the realization of a highly scalable quantum computer using a large-scale quantum dot array.

[0094] Thus, in a quantum computer using a quantum dot array with electron spins in silicon, it is necessary to confine one electron at a time to each quantum dot during the initialization of quantum computation. By using a single-electron pump with a reservoir and an AC-driven gate electrode, high-speed, high-precision, and highly stable single-electron transfer and confinement becomes possible.

[0095] According to the method of this embodiment, electrons can be transferred and confined at high speed, with high precision and stability in a quantum computer using a large-scale quantum dot array. As a result of this embodiment, an energy-efficient quantum computer can be realized, which means that energy consumption will be reduced, carbon emissions will be reduced, global warming will be prevented, and a sustainable society can be realized. [Explanation of Symbols]

[0096] Single-electron pump control circuit 600, quantum dot control circuit 601, single-electron pump section 602, quantum dot array section 603, potential barrier 604, quantum dot section 605, path 606

Claims

1. A quantum computer using semiconductors, Semiconductor crystal substrate and A gate electrode array structure formed on the surface of the semiconductor crystal substrate, It has a reservoir section which is a carrier supply means, By controlling the voltage applied to the gate electrode array structure, a classical potential barrier is formed that inhibits the movement of charge within the semiconductor crystal substrate by the tunneling effect. The charge supplied from the reservoir is transferred into the classical potential barrier. Before quantum operations on the qubits, the charge supplied from the reservoir is transferred using the classical potential barrier; during quantum operations, the charge is transferred using a quantum potential barrier that allows the movement of charge by tunneling effect so as to conserve the spin polarization of unit charges; and after quantum operations, the charge is transferred by setting the rate of change of the potential when creating the gradient of the classical potential barrier so as to conserve the spin polarization of unit charges. A quantum computer characterized by the following features.

2. The classical potential barrier and the quantum potential barrier having a different voltage range have at least two gate voltage modes for generating them. The quantum computer according to claim 1.

3. The device is characterized by having a switch unit that switches between the two types of gate voltage modes. The quantum computer according to claim 2.

4. A voltage range of 0.1 to 10 V is used for generating the classical potential barrier, and a voltage range of 0.1 to 100 mV is used for generating the quantum potential barrier. The quantum computer according to claim 2.

5. The gate electrode array structure includes a single-electron pump for extracting a unit charge from the reservoir section. The quantum computer according to claim 2.

6. The single-electron pump comprises, in order of proximity to the reservoir section, a first gate for controlling a first classical potential barrier, a second gate for controlling a second classical potential barrier, and a third gate for controlling a third classical potential barrier, and an AC voltage is applied to the first gate. The quantum computer according to claim 5.

7. To transfer the unit charge extracted by the single-electron pump, a gradient is provided in the classical potential barrier formed within the semiconductor crystal substrate. The quantum computer according to claim 6.

8. The rate of change of the potential when a gradient is applied to the classical potential barrier is set slower when transferring unit charge to a qubit after a quantum operation than when transferring unit charge to a qubit before a quantum operation is performed by the unit charge. The quantum computer according to claim 7.

9. When transferring a unit charge to the qubit after a quantum operation, the rate of change of the potential when creating a gradient in the classical potential barrier is set so that the spin polarization of the unit charge is preserved. The quantum computer according to claim 8.

10. During the transfer of unit charge to the qubit in a quantum operation, the quantum potential barrier is used so that the spin polarization and phase of the unit charge are preserved. The quantum computer according to claim 9.

11. When transferring a unit charge to the qubit before quantum operation, the conservation of the spin polarization and phase of the unit charge is disregarded, and the rate of change of the potential when a gradient is applied to the classical potential barrier is set. The quantum computer according to claim 10.

12. The DC voltages applied to the first gate, the second gate, and the third gate, respectively, and the AC voltage applied to the first gate are calibrated. The quantum computer according to claim 6.

13. A method for controlling a quantum computer made of semiconductors, The first step is to extract a unit charge from the reservoir, which is a carrier supply means, using a classical potential barrier that inhibits the movement of charge by the tunneling effect. The second step is to transfer the extracted unit charge to the desired qubit position using the gradient of a classical potential barrier. A third step is to perform a qubit operation on the unit charge sent to the desired qubit position, Execute, A control method for a quantum computer, comprising: transferring charge supplied from the reservoir using the classical potential barrier before quantum operations on the qubits; transferring charge using a quantum potential barrier that allows charge to move by tunneling effect so as to conserve the spin polarization of unit charges during quantum operations; and transferring charge after quantum operations by setting the rate of change of the potential when creating the gradient of the classical potential barrier so as to conserve the spin polarization of unit charges.

14. In the third step described above, when moving the unit charge during the execution of a qubit operation, this is done by manipulating the quantum potential barrier. A method for controlling a quantum computer according to claim 13.

15. When moving the unit charge in order to read out the qubit after the completion of the qubit operation, a fourth step is performed by manipulating the classical potential barrier. The operating speed of the classical potential barrier in the fourth step is set slower than the operating speed of the classical potential barrier in the second step. A method for controlling a quantum computer according to claim 13.

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