Switching converters, and electronic devices using them.
The switching converter addresses efficiency drops in Buck converters by using a dual capacitor-inductor configuration and controlled transistor states to reduce switching losses and enhance efficiency across varying load conditions.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-07-16
- Publication Date
- 2026-03-17
AI Technical Summary
Buck converters experience efficiency drops in regions with low step-down ratios, and hybrid DC/DC converters with capacitors improve efficiency but face issues with sharp current spikes and increased switching losses.
A switching converter design incorporating a first and second capacitor connected in parallel, a first and second inductor, and a controller circuit that alternates transistor states to manage charging currents, reducing switching losses and enhancing efficiency through resonant operation.
The proposed design improves efficiency by limiting charging current spikes and maintaining efficient voltage conversion across varying load conditions.
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Abstract
Description
[Technical Field]
[0001] This disclosure relates to a switching converter. [Background technology]
[0002] DC / DC converters (switching converters) are used to generate voltages lower or higher than the power supply voltage. Buck converters generally have high efficiency in the region where the step-down ratio is close to 1, and their efficiency decreases in the region where the step-down ratio is low, i.e., the region where the output voltage is low. To solve this problem, a hybrid configuration (called a hybrid DC / DC converter) that adds a capacitor to the DC / DC converter has been proposed. In this configuration, the capacitor is used to generate a switching voltage with half the amplitude of the input voltage, thereby improving efficiency compared to a normal Buck converter. [Prior art documents] [Patent Documents]
[0003] [Patent Document 1] U.S. Patent No. 7696735B2 [Overview of the project] [Problems that the invention aims to solve]
[0004] This disclosure is made in the circumstances described herein, and one of its exemplary purposes is to provide a switching converter that is more efficient than a Buck converter. [Means for solving the problem]
[0005] A part of this disclosure relates to a switching converter. The switching converter includes an input line, an output line, a ground line, a first transistor, a second transistor, a third transistor, and a fourth transistor connected in series between the input line and the ground line, a first capacitor connected between the connection nodes of the second and third transistors and the ground line, a second capacitor connected between the connection nodes of the first and second transistors and the connection nodes of the third and fourth transistors, a first inductor connected between the connection nodes of the third and fourth transistors and the output line, an output capacitor connected to the output line, a second inductor provided on a loop that returns from the ground line through the fourth transistor, the second capacitor, the second transistor, and the first capacitor back to the ground line, and a controller circuit that drives the first through fourth transistors.
[0006] Another aspect of the present disclosure is a controller circuit for a switching converter. The switching converter comprises an input line, an output line, a ground line, a first transistor, a second transistor, a third transistor, and a fourth transistor connected in series between the input line and the ground line, a first capacitor connected between the connection nodes of the second and third transistors and the ground line, a second capacitor connected between the connection nodes of the first and second transistors and the connection nodes of the third and fourth transistors, a first inductor connected between the connection nodes of the third and fourth transistors and the output line, an output capacitor connected to the output line, and a second inductor provided on a loop returning from the ground line through the fourth transistor, the second capacitor, the second transistor, and the first capacitor to the ground line.
[0007] Furthermore, any combination of the above components, or in which components or expressions are mutually substituted among methods, apparatus, systems, etc., are also valid embodiments of the present invention. [Effects of the Invention]
[0008] According to certain aspects of this disclosure, the efficiency of a switching converter can be improved. [Brief explanation of the drawing]
[0009] [Figure 1] Figure 1 is a circuit diagram of a switching converter according to an embodiment. [Figure 2] Figure 2 is a circuit diagram of a switching converter related to the comparative technology. [Figure 3] Figure 3 is an equivalent circuit diagram of the first state φI of the switching converter related to the comparative technology. [Figure 4] Figure 4 is an equivalent circuit diagram of the second state φII of the switching converter related to the comparative technology. [Figure 5] Figure 5 shows the operating waveform of a switching converter related to the comparative technology. [Figure 6] Figure 6 is the equivalent circuit diagram of the switching converter in the first state φ1 shown in Figure 1. [Figure 7] Figure 7 is the equivalent circuit diagram of the switching converter in the second state φ2 of Figure 1. [Figure 8] Figure 8 shows the operating waveform of the switching converter in Figure 1. [Figure 9] Figure 9 is a circuit diagram of a switching converter according to modified example 2. [Figure 10] Figure 10 is a circuit diagram of a switching converter according to modified example 3. [Figure 11] Figure 11 shows an example of an electronic device equipped with a switching converter. [Modes for carrying out the invention]
[0010] (Summary of the embodiment) This section outlines some exemplary embodiments of the present disclosure. This outline is intended to provide a basic understanding of the embodiments and to simplify some concepts of one or more embodiments, serving as a prelude to the more detailed descriptions that follow. It is not intended to limit the scope of the invention or disclosure. This outline is not a comprehensive overview of all possible embodiments, nor is it intended to identify essential elements of all embodiments or to delineate the scope of some or all aspects. For convenience, “one embodiment” may be used to refer to one or more embodiments (examples or variations) disclosed herein.
[0011] A switching converter according to one embodiment includes an input line, an output line, a ground line, a first transistor, a second transistor, a third transistor, and a fourth transistor connected in series between the input line and the ground line, a first capacitor connected between the connection nodes of the second and third transistors and the ground line, a second capacitor connected between the connection nodes of the first and second transistors and the connection nodes of the third and fourth transistors, a first inductor connected between the connection nodes of the third and fourth transistors and the output line, an output capacitor connected to the output line, a second inductor provided on a loop that returns from the ground line through the fourth transistor, the second capacitor, the second transistor, and the first capacitor back to the ground line, and a controller circuit that drives the first through fourth transistors.
[0012] In this configuration, when the first and second capacitors are connected in parallel and charge is transferred from the second capacitor to the first capacitor, the charging current is limited by the second inductor. This prevents a sharp increase in the charging current and reduces switching losses.
[0013] In one embodiment, the second inductor may be connected in series with the second capacitor between the second and third transistors.
[0014] In one embodiment, the second inductor may be connected in series with the first capacitor between the connection nodes of the second and third transistors and the ground line.
[0015] In one embodiment, the inductance of the second inductor may be smaller than the inductance of the first inductor.
[0016] In one embodiment, the first to fourth transistors may be N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).
[0017] In one embodiment, the controller circuit may alternately repeat a first state in which the first and third transistors are on and the second and fourth transistors are off, and a second state in which the first and third transistors are off and the second and fourth transistors are on.
[0018] In one embodiment, the length of the second state may be approximately half the natural period, which is the reciprocal of the resonant frequency of the LC resonant circuit formed by the first capacitor, the second capacitor, and the second inductor. This enables resonant operation and thus increases efficiency. "Approximately half" means not only when it is exactly half, but also when it deviates from half within a range in which resonant operation can be achieved, for example, within a range of ±20% from half.
[0019] A controller circuit according to one embodiment controls a switching converter. The switching converter includes an input line, an output line, a ground line, a first transistor, a second transistor, a third transistor, and a fourth transistor connected in series between the input line and the ground line, a first capacitor connected between the connection nodes of the second and third transistors and the ground line, a second capacitor connected between the connection nodes of the first and second transistors and the connection nodes of the third and fourth transistors, a first inductor connected between the connection nodes of the third and fourth transistors and the output line, an output capacitor connected to the output line, and a second inductor provided on a loop that returns from the ground line through the fourth transistor, the second capacitor, the second transistor, and the first capacitor to the ground line. The controller circuit includes a state control unit that alternately repeats a first state in which the first and third transistors are on and the second and fourth transistors are off, and a second state in which the first and third transistors are off and the second and fourth transistors are on, and a drive circuit that drives the first to fourth transistors according to the output of the state control unit.
[0020] In one embodiment, the length of the second state may be approximately half the natural period, which is the reciprocal of the resonant frequency of the LC resonant circuit formed by the first capacitor, the second capacitor, and the second inductor.
[0021] In one embodiment, the controller circuit may be integrated onto a single semiconductor substrate. "Integrated integration" includes cases where all the components of the circuit are formed on the semiconductor substrate, or where the main components of the circuit are integrated, and some resistors, capacitors, etc., may be provided outside the semiconductor substrate for adjusting circuit constants. Integrating the circuit onto a single chip can reduce the circuit area and maintain uniformity of the characteristics of the circuit elements.
[0022] (Embodiment) The present invention will be described below with reference to the drawings, based on preferred embodiments. The same or equivalent components, members, and processes shown in each drawing will be denoted by the same reference numerals, and redundant descriptions will be omitted as appropriate. Furthermore, the embodiments are illustrative and not limiting to the invention, and not all features or combinations thereof described in the embodiments are necessarily essential to the invention.
[0023] In this specification, "member A connected to member B" includes not only cases where member A and member B are directly connected physically, but also cases where member A and member B are indirectly connected via other members that do not substantially affect their electrical connection or impair the functions or effects produced by their combination.
[0024] Similarly, "the state in which member C is provided between member A and member B" includes not only cases where member A and member C, or member B and member C, are directly connected, but also cases where they are indirectly connected via other members that do not substantially affect their electrical connection state or impair the functions or effects produced by their combination.
[0025] Furthermore, "signal A (voltage, current) corresponds to signal B (voltage, current)" means that signal A is correlated with signal B, specifically, (i) when signal A is signal B, (ii) when signal A is proportional to signal B, (iii) when signal A is obtained by level-shifting signal B, (iv) when signal A is obtained by amplifying signal B, (v) when signal A is obtained by inverting signal B, (vi) or any combination thereof. It will be understood by those skilled in the art that the scope of "corresponds" is determined by the types and applications of signals A and B.
[0026] The vertical and horizontal axes of the waveform diagrams and time charts referenced herein have been enlarged or reduced as appropriate for ease of understanding, and the waveforms shown have also been simplified, exaggerated, or emphasized for ease of understanding.
[0027] (Embodiment) Figure 1 is a circuit diagram of a switching converter 100 according to an embodiment. The switching converter 100 has an input voltage V on the input line 102. IN The voltage is stepped down, and the stepped-down output voltage V is output to output line 104. OUT The switching converter 100 comprises a first transistor M1 to a fourth transistor M4, a first capacitor C1, a second capacitor C2, an output capacitor C3, a first inductor L1, a second inductor L2, and a controller IC 200. The second capacitor C2 is also called a flying capacitor.
[0028] The first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 are connected in series between the input line 102 and the ground line 106. The first to fourth transistors M1 to M4 are N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).
[0029] The first capacitor C1 is connected between the connection node n2 of the second transistor M2 and the third transistor M3 and the ground line 106. The second capacitor C2 is connected between the connection node n1 of the first transistor M1 and the second transistor M2 and the connection node n3 of the third transistor M3 and the fourth transistor M4.
[0030] The first inductor L1 is connected between the connection node n3 of the third transistor M3 and the fourth transistor M4 and the output line 104.
[0031] Output capacitor C3 is connected to output line 104.
[0032] The second inductor L2 is provided on a loop 110 that returns to the ground line 106 via the fourth transistor M4, the second capacitor C2, the second transistor M2, and the first capacitor C1. In this embodiment, the second inductor L2 is connected in series with the second capacitor C2 between the ends of the second transistor M2 and the third transistor M3, that is, between node n1 and node n3. It is preferable that the inductance of the second inductor L2 be smaller than the inductance of the first inductor L1.
[0033] The controller IC200 drives the first transistor M1 through the fourth transistor M4. For example, the controller IC200 alternately cycles between the first state φ1 and the second state φ2. • First state φ1 Transistor 1 M1: ON Second transistor M2: OFF Third transistor M3: ON Transistor 4 M4: OFF
[0034] • Second state φ2 Transistor 1 M1: OFF Second transistor M2: ON Third transistor M3: OFF Transistor 4 M4: ON
[0035] The controller IC 200 is a functional IC integrated on a single semiconductor substrate, comprising a drive circuit 210, a state control unit 220, and a feedback circuit 230. The gate pins G1 to G4 of the controller IC 200 are connected to the gates of the first transistor M1 to the fourth transistor M4. The feedback pin FB of the controller IC 200 is connected to the output voltage V of the switching converter 100. OUT Feedback signal V corresponding to the signal FB This is fed back. Resistors R1 and R2 are used for the output voltage V. OUT The voltage is divided, and the feedback signal V FB Generates.
[0036] Resistors R1 and R2 may be integrated into the controller IC200. Also, the first transistor M1 to the fourth transistor M4 may be integrated into the controller IC200.
[0037] The state control unit 220 is control logic that generates control signals S1 to S4 that define the on and off states of the first transistor M1 to the fourth transistor M4, thereby controlling the state of the switching converter 100.
[0038] The drive circuit 210 drives the first transistor M1 to the fourth transistor M4 according to the outputs S1 to S4 of the state control unit 220. The drive circuit 210 includes four drivers Dr1 to Dr4.
[0039] The feedback circuit 230 receives the feedback signal V FB and reference voltage V REF The time ratio between the first state φ1 and the second state φ2 is controlled so that the error approaches zero. The feedback circuit 230 can be configured in the same way as a general DC / DC converter and may include, for example, a pulse width modulator and a pulse frequency modulator. The control method is not particularly limited and may be a voltage mode controller, a peak current mode controller or an average current mode controller, or a ripple control, specifically a hysteresis control (Bang-Bang control) or a controller with a fixed bottom detection on time and a fixed peak detection off time.
[0040] The above describes the configuration of the switching converter 100. Before explaining the operation of the switching converter 100, we will describe a switching converter related to the comparative technology.
[0041] Figure 2 is a circuit diagram of the switching converter 100R related to the comparative technology. The switching converter 100R has a configuration in which the second inductor L2 is omitted from the switching converter 100 in Figure 1. The switching converter 100R related to the comparative technology is also called a hybrid DC / DC converter.
[0042] This switching converter 100R has a first state φ in which transistors M1 and M3 are on and M2 and M4 are off I and a second state φ in which transistors M1 and M3 are off and M2 and M4 are on II and repeats them.
[0043] FIG. 3 is an equivalent circuit diagram of the first state φ of the switching converter 100R according to the comparative technique. In the first state φ I , a charging current I of the second capacitor C2 and a discharging current I of the first capacitor C1 flow through the first inductor L1 I . The charging current I of the second capacitor C2 passes through the first transistor M1. On the other hand, the discharging current I of the first capacitor C1 passes through the third transistor M3 C2 . C1 The charging current I of the second capacitor C2 C2 . C1 Since the second capacitor C2 and the first capacitor C1 are connected in series between the input line 102 and the ground line 106 in the first state φ
[0044] the first state φ I , V IN = V C1 + V C2 holds. V C1 is the voltage across the first capacitor C1, and V C2 is the voltage across the second capacitor C2. In the first state φ I , the voltage V C2 increases with time, and the voltage V C1 decreases with time
[0045] The voltage of the connection node n3 of the third transistor M3 and the fourth transistor M4 is V n3 = V IN - V C2 . The voltage ΔV across the first inductor L1 L(φI) is ΔV L(φI) = V IN - V C2 - V OUT as described later, V C1 = VC2 =V IN When it is / 2, ΔV L(φI) =V IN / 2-V OUT The coil current I flowing through the first inductor L1 L ΔV L(φI) / L1=(V IN / 2-V OUT It increases with a slope of ) / L1.
[0046] Figure 4 is the equivalent circuit diagram of the second state φII of the switching converter 100R related to the comparative technology. II In this configuration, the voltage at the connection node n3 between the third transistor M3 and the fourth transistor M4 is 0V. The voltage across the first inductor L1 is ΔV. L(φII) teeth, ΔV L(φII) =-V OUT Therefore, the coil current I flowing through the first inductor L1 is... L ΔV L(φII) / L1=-V OUT It decreases with a slope of / L1.
[0047] Also, the second state φ II In this configuration, the first inductor L1 has a coil current I L A current flows. Also, current I flows from the second capacitor C2 through the second transistor M2 to the first transistor M1. C21 A current flows, and charge is transferred from the second capacitor C2 to the first capacitor C1, causing the second capacitor C2 to discharge and the first capacitor C1 to charge. When C1=C2, as a result of the charge transfer, V C1 =V C2 =V IN It becomes / 2.
[0048] Figure 5 is an operating waveform diagram of the switching converter 100R related to the comparative technology. Figure 5 shows the coil current I L The current I flowing through the first transistor M1 to the fourth transistor M4. M1 ~I M4 The waveform for one switching cycle is shown.
[0049] First state φ I In, current I M1 is I C2 to, current I M3 is current I C1 corresponds to. Coil current I L is I M1 and I M3 is the sum of. Second state φ II In, I M2 is I C21 corresponds to, and current I M4 is I L and I M2 is the sum of.
[0050] First state φ I The length of is t ON Second state φ II The length of is t OFF Let it be. In the steady state, the first state φ I and the second state φ II The change in coil current I L is equal. (V IN [[ID=五十二]] / 2-V<Immediately after the transition, current I passes through the second transistor M2. M2 =I C21 A current flows. The voltage V immediately before the transition. C1 and V C2 If the potential difference is large, a large spike-like current I will occur immediately after the transition. M2 The following flows. The loss generated in the second transistor M2 (switched capacitor loss) is, P=(4C·f) -1 ·I OUT 2 This is represented as follows: C is the combined capacitance of the first capacitor C1 and the second capacitor C2, and f is the switching frequency. The switching converter 100R in the comparative technology has a current I immediately after the transition to φII. M2 The spikes in this data lead to a problem where losses increase significantly. These are the challenges of the comparative technology.
[0053] Next, the operation of the switching converter 100 will be explained. The operation of the switching converter 100 is basically the same as that of the switching converter 100R related to the comparative technology.
[0054] Figure 6 is an equivalent circuit diagram of the switching converter 100 in the first state φ1 shown in Figure 1. In the first state φ1, the charging current I of the second capacitor C2 flows through the first inductor L1. C2 And the discharge current I of the first capacitor C1 C1 It plays.
[0055] The coil current I flowing through the first inductor L1 L ΔV L(φ1) / L1=(V IN / 2-V OUT It increases with a slope of ) / L1.
[0056] Figure 7 is the equivalent circuit diagram of the switching converter 100 in the second state φ2 of Figure 1. The voltage ΔV across the first inductor L1 L(φII) teeth, ΔV L(φII) =-V OUT Therefore, the coil current I flowing through the first inductor L1 is...L ΔV L(φ2) / L1=-V OUT It decreases with a slope of / L1.
[0057] Furthermore, in the second state φ2, the first inductor L1 has a coil current I L Current flows. Also, current flows from the second capacitor C2 through the second transistor M2 to the first transistor M1 IC. 21 Current I flows, and charge is transferred from the second capacitor C2 to the first capacitor C1. (Figure 7) C21 The current I in Figure 4 passes through the second inductor L2. C21 It is different.
[0058] In the switching converter 100 shown in Figure 1, in a steady state, V OUT =d×V IN / 2=V OUT The following holds true. In other words, the output voltage V OUT The value ranges from 0 to V depending on the duty cycle d. IN It can be controlled within the range of / 2.
[0059] Figure 8 is an operating waveform diagram of the switching converter 100 shown in Figure 1. Figure 8 shows the coil current I L The waveform for one switching cycle is shown.
[0060] After transitioning from the first state φ1 to the second state φ2, current I is transmitted via the second transistor M2. M2 =I C21 As mentioned above, this current I flows. M2 =I C21 The current I passes through the second inductor L2. M2 (=I C21 In the second state φ2, the current I increases and decreases gradually, and immediately after transitioning to the second state φ2, C21 The spikes are suppressed. This reduces the power loss of the switched capacitor.
[0061] Length t of φ2 in the second state OFF It is preferable that the frequency is approximately half the natural period T0, which is the reciprocal of the resonant frequency of the LC resonant circuit formed by the first capacitor C1, the second capacitor C2, and the second inductor L2. This allows the device to operate in a resonant state and further improves efficiency.
[0062] (modified version) The embodiments described above are illustrative, and it will be understood by those skilled in the art that various modifications are possible in combinations of their components and processing steps. Such modifications will be described below.
[0063] (Variation 1) In Embodiment 1, the controller IC 200 alternately switched between a first state φ1 and a second state φ2, but the disclosure is not limited thereto. For example, in a light load state, in addition to the first state φ1 and the second state φ2, a third state φ3 may also be switched. The third state φ3 is a high-impedance state in which all transistors M1 to M4 are off.
[0064] (Variation 2, Variation 3) The insertion of the second inductor L2 is not limited to the position shown in Figure 1, and the current I in the second state φ2 may vary. C21 It can be inserted along the path. For example, the positions of the second capacitor C2 and the second inductor L2 can be swapped, or it can be inserted at other locations.
[0065] Figure 9 is a circuit diagram of the switching converter 100A according to Modification 2. In this modification, the second inductor L2 is connected in series with the second transistor M2 between switching nodes n1 and n2. In this case as well, in the second state φ2, the current I flowing through the second transistor M2 C21 This can suppress peaks and improve efficiency.
[0066] Figure 10 is a circuit diagram of the switching converter 100B according to Modification 3. In this modification, the second inductor L2 is connected in series with the first capacitor C1 between the switching node n2 and the ground line 106. The first capacitor C1 and the second inductor L2 may be swapped. In Modification 3, the current I in the first state φ1 C1 However, since it will pass through the second inductor L2, the current I C1 This will also have an impact.
[0067] (Application) Figure 11 shows an example of an electronic device 700 equipped with a switching converter 100. The electronic device 700 includes an internal circuit 710 and a power supply circuit 720. The internal circuit 710 may include a CPU (Central Processing Unit), memory, LAN (Local Area Network) interface circuit, etc. The power supply circuit 710 has an input voltage V IN The voltage is boosted (or bucked) and supplied to the internal circuit 710. The above-mentioned boost-buck converter 100 can be used as a power supply circuit 720.
[0068] Electronic equipment 700 is not limited to servers; it may also be in-vehicle equipment. Furthermore, electronic equipment 700 may also be industrial equipment, office automation (OA) equipment, or consumer electronics such as audio equipment.
[0069] Those skilled in the art will understand that the embodiments are illustrative, and that various modifications exist for each component and combination of processing steps, and that such modifications are also included in this disclosure and may constitute the scope of the present invention. [Explanation of symbols]
[0070] 100 Switching Converters 102 input lines 104 output lines 106 Grounding line M1 First Transistor M2 Second Transistor M3 Third Transistor M4 4th transistor C1 First Capacitor C2 Second Capacitor C3 Output Capacitor L1 First Inductor L2 Second Inductor 200 Controllers World 210 Drive Circuit 220 State Control Unit 230 Feedback Circuit
Claims
1. Input line and, Output line and, Grounding line and A first transistor, a second transistor, a third transistor, and a fourth transistor connected in series between the input line and the ground line, A first capacitor connected between the connection nodes of the second and third transistors and the ground line, A second capacitor connected between the connection node of the first transistor and the second transistor and the connection node of the third transistor and the fourth transistor, A first inductor connected between the connection nodes of the third and fourth transistors and the output line, The output capacitor connected to the aforementioned output line, A second inductor is provided on a loop that returns from the ground line through the fourth transistor, the second capacitor, the second transistor, the first capacitor, and back to the ground line, A controller circuit that drives the first to fourth transistors, Equipped with, The second inductor is connected in series with the second transistor between the connection nodes of the first and second transistors and the connection nodes of the second and third transistors. The controller circuit, under light load conditions, A first state in which the first transistor and the third transistor are on, and the second transistor and the fourth transistor are off, A second state in which the first transistor and the third transistor are off, and the second transistor and the fourth transistor are on, A third state in which all transistors from the first to the fourth are off, A switching converter that repeats the following steps in sequence.
2. Input line and, Output line and, Grounding line and A first transistor, a second transistor, a third transistor, and a fourth transistor connected in series between the input line and the ground line, A first capacitor connected between the connection nodes of the second and third transistors and the ground line, A second capacitor connected between the connection node of the first transistor and the second transistor and the connection node of the third transistor and the fourth transistor, A first inductor connected between the connection nodes of the third and fourth transistors and the output line, The output capacitor connected to the aforementioned output line, Between the connection nodes of the first transistor and the second transistor and the connection nodes of the second transistor and the third transistor, a second inductor is connected in series with the second transistor, A controller circuit that drives the first to fourth transistors, A switching converter equipped with the following features.
3. An input line and Output line and, Grounding line and A first transistor, a second transistor, a third transistor, and a fourth transistor connected in series between the input line and the ground line, A first capacitor connected between the connection nodes of the second and third transistors and the ground line, A second capacitor connected between the connection node of the first transistor and the second transistor and the connection node of the third transistor and the fourth transistor, A first inductor connected between the connection nodes of the third and fourth transistors and the output line, The output capacitor connected to the aforementioned output line, A second inductor is provided on a loop that returns from the ground line through the fourth transistor, the second capacitor, the second transistor, the first capacitor, and back to the ground line, A controller circuit that drives the first to fourth transistors, Equipped with, The second inductor is connected in series with the first capacitor between the connection node of the second transistor and the third transistor and the ground line. The controller circuit, under light load conditions, A first state in which the first transistor and the third transistor are on, and the second transistor and the fourth transistor are off, A second state in which the first transistor and the third transistor are off, and the second transistor and the fourth transistor are on, A third state in which all transistors from the first to the fourth are off, A switching converter that repeats the following steps in sequence.
4. Input line and, Output line and, Grounding line and A first transistor, a second transistor, a third transistor, and a fourth transistor connected in series between the input line and the ground line, A first capacitor connected between the connection nodes of the second and third transistors and the ground line, A second capacitor connected between the connection node of the first transistor and the second transistor and the connection node of the third transistor and the fourth transistor, A first inductor connected between the connection nodes of the third and fourth transistors and the output line, The output capacitor connected to the aforementioned output line, Between the connection node of the second transistor and the third transistor and the ground line, a second inductor is connected in series with the first capacitor, A controller circuit that drives the first to fourth transistors, A switching converter equipped with the following features.
5. The switching converter according to any one of claims 1 to 4, wherein the inductance of the second inductor is smaller than the inductance of the first inductor.
6. The switching converter according to any one of claims 1 to 4, wherein the first to fourth transistors are N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).
7. The controller circuit is The switching converter according to claim 2 or 4, which alternately repeats a first state in which the first transistor and the third transistor are on and the second transistor and the fourth transistor are off, and a second state in which the first transistor and the third transistor are off and the second transistor and the fourth transistor are on.
8. The switching converter according to any one of claims 1, 3, or 7, wherein the length of the second state is approximately half the natural period, which is the reciprocal of the resonant frequency of the LC resonant circuit formed by the first capacitor, the second capacitor, and the second inductor.
9. An electronic device comprising a switching converter according to any one of claims 1 to 8.
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