Switching circuits, inverter circuits

Abstract

To provide a switching circuit having high power conversion efficiency at high frequencies.SOLUTION: A switching circuit 110 includes an inductor L disposed between load means R and switch means M, first rectifying means D1 arranged in series between the switch means M and a power supply or ground, a first capacitor C1, a second rectifying means D2 connected in parallel via the inductor L to the first rectifying means D1 and the first capacitor C1 arranged in series, a second capacitor C2, and third rectifying means D3 disposed between a junction of the first rectifying means D1 and the first capacitor C1 and a junction of the second capacitor C2 and the second rectifying means D2.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a switching circuit and an inverter circuit that perform non-resonant ZCS / ZVS operation.

Background Art

[0002] To improve the cruising range of electric vehicles and the fuel efficiency of hybrid vehicles, a high power conversion efficiency is required for the inverter mounted. Also, in order to improve the motor efficiency, it is necessary to increase the frequency of the carrier, which is the operating frequency of the inverter. At the same time, it is desired to suppress the generated electromagnetic noise to improve the EMC performance and reduce the cost of noise countermeasures. Patent Document 1 discloses an inverter circuit that performs ZCS operation. Patent Document 2 discloses an inverter circuit that uses a flip-flop.

[0003] FIG. 27 shows one phase of the output circuit of a three-phase inverter. An inductive load is connected to the high side, the power supply voltage is set to 48V, the driving frequency is 50KHz, Duty is 50%, and a predetermined dead time is set to prevent penetration. The load is on the high side, and the current direction is the direction flowing into the half-bridge. Therefore, the MOSFET on the bottom switch 160 side becomes the main switch, and the top switch 150 side performs a flywheel circuit operation. FIG. 28 shows the results of simulating the voltage, current, and loss of the top switch and the bottom switch when the bottom switch is on. (Conditions) ·Analysis of bottom-on operation ·Power supply voltage 48V ·Load inductance 10uH ·Load resistance 0.15 Ω (48V 0.15Ω = 320A, equivalent to 160A at 50% Duty drive) ·Gate resistance 2.2 Ω ·Fixed constant circuit (wiring inductance = 0)

[0004] Just before the bottom switch 160 turns on, a load current of approximately 160A due to the load inductance flows towards the power supply via the top switch 150. At this time, the bottom switch 160 turns on, and a large recovery current flows through the upper and lower switches for approximately 6ns, the time it takes for the hot carriers caused by the forward current of the body diode of the top switch 150 and the external Schottky diode to disappear. On the top switch side, the power loss is small due to the low voltage between SD and the top switch, while a large power loss occurs on the bottom switch side. After the carrier disappears, the voltage between the DS of the upper and lower MOSFETs increases (decreases) exponentially while the DS capacitance of the top switch MOSFET is charged, and this voltage becomes the output terminal voltage waveform. Furthermore, the recovery current described above flows directly into the power supply current as a large harmonic ripple. [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2014-220913 [Patent Document 2] Japanese Patent Publication No. 2015-76989 [Overview of the project] [Problems that the invention aims to solve]

[0006] Figure 29 shows the simulation results of the voltage, current, and losses of the top switch and bottom switch when the bottom switch is off. Just before the bottom switch 160 turns off, a load current of approximately 160A due to the load inductance flows towards GND via the bottom switch 160. At this time, the bottom switch 160 turns off, so the load current remains at its current value due to the inductive component, and the decrease in current through the bottom switch 160 increases as the current through the top switch 150.

[0007] This shows the relationship between the SD voltage, drain current, and losses for the top and bottom switches. As you can see, the top switch is initially off, so the increase in current lags behind the increase in voltage, resulting in relatively small losses. However, the bottom switch maintains a load current of 160A while the SD voltage increases, resulting in large losses. The losses and power conversion efficiencies associated with each of the above switching operations are as follows. Bottom switch side MOSFET power dissipation (per unit): 11.872W Bottom-side recovery reduced Schottky diode power loss = 266uW Top switch side MOSFET power dissipation (per MOSFET): 4.122W Top-side recovery reduction Schottky diode loss = 373.8mW Load power = 3.6757KW Power supply power = 3.7235KW Efficiency = 98.71%

[0008] A common method to reduce switching losses and improve efficiency is to perform ZVS and ZCS operation using resonance (partial resonance), thereby reducing V × I losses by creating a phase difference between the voltage and current of the switching element. However, this method has drawbacks such as a complex structure and difficulty in timing control. Furthermore, in conventional ZCS and ZVS inverter circuits, the energy used for ZCS and ZVS operation is consumed directly, making it impossible to improve efficiency.

[0009] The objective of the present invention is to provide a switching circuit and an inverter circuit that have high power conversion efficiency at high frequencies and improved EMC performance by suppressing generated electromagnetic noise to a low level. [Means for solving the problem]

[0010] The switching circuit (110) according to the present invention is a switching circuit that drives a load means (R) by intermittently supplying power from a power source (E), and is a soft switching method that reduces switching losses by providing a time difference between the voltage applied to a switch means (M) built into the switching circuit and the current flowing through the switch means (M). The device further includes an inductor (L) disposed between the load means (R) and the switch means (M), a first rectifier means (D1) disposed in series between the switch means (M) and the power supply or ground, a first capacitor (C1), a second rectifier means (D2) connected in parallel to the first rectifier means (D1) and the first capacitor (C1) via the inductor (L), a second capacitor (C2), and a third rectifier means (D3) disposed between the connection between the first rectifier means (D1) and the first capacitor (C1) and the connection between the second capacitor (C2) and the second rectifier means (D2).

[0011] The inverter circuit according to the present invention comprises a half-bridge inverter having a top inverter switch (50) and a bottom inverter switch (60), a top-side auxiliary circuit (20T) that performs ZVS / ZCS operation when the top inverter switch (50) is turned on or off, and a bottom-side auxiliary circuit (20B) that performs ZVS / ZCS operation when the bottom inverter switch (60) is turned on or off. The inverter circuit further comprises a top-side inductor (L3) connected between the top inverter switch (50) and a load means (LU) that performs ZCS operation when the top inverter switch (50) and the bottom inverter switch (60) are turned on, and a bottom-side inductor (L4) connected between the bottom inverter switch (60) and a load means (L1) and also connected to the top-side inductor (L3). The top-side auxiliary circuit (20T) includes a first rectifier means (D1) arranged in series between the top inverter switch (50) and the power supply or ground, a first capacitor (C1), a second rectifier means (D2) connected in parallel to the first rectifier means (D1) and the first capacitor (C2) arranged in series via the top-side inductor (L3), a second capacitor (C2), and a third rectifier means (D3) arranged between the connection between the first rectifier means (D1) and the first capacitor (C1) and the connection between the second capacitor (C2) and the second rectifier means (D2). The symbols within the parentheses above indicate the correspondence with the specific means described in the embodiments described later. [Effects of the Invention]

[0012] In the switching circuit of claim 1, the energy of the inductor (L) used to turn on the switching means (M) by ZCS is stored in the first capacitor (C1) during the on state of the switching means (M). Then, the energy (voltage) of the first capacitor (C1) turns off the switching means (M) by ZVS, and during the off state of the switching means (M), the energy of the first capacitor (C1) is refluxed to the power supply side to completely discharge the first capacitor (C1). In the conventional ZCS and ZVS inverter circuits, the energy used for ZCS and ZVS operations is simply consumed, whereas in the inverter circuit of claim 1, the energy used for ZCS and ZVS operations is refluxed to the power supply side, so high efficiency can be achieved.

[0013] In the switching circuit of claim 2, the first rectifying means (D1) prevents the charge of the first capacitor (C1) from short - circuiting to the switching means (M), and the third rectifying means (D3) can prevent the short - circuit of the inductor (L).

[0014] In the switching circuit of claim 3, the second rectifying means (D2) can reflux the charge of the second capacitor (C2) to the power supply (E).

[0015] In the switching circuit of claim 4, the load means is a resistive load (R), and the switching means consists of a switching element (M) of a unilateral switch driven only in a unilateral switching mode. Since the bilateral switching mode is not used, the structure is simple.

[0016] In the switching circuit of claim 5, the load means is an inductive load (L1) and has a rectifying element (DF) for flowing a flywheel current. In the inverter circuit of claim 5, the control configuration is simple because the flywheel current flows through the rectifying element (DF).

[0017] In the switching circuit of claim 6, the inductor is divided into two parts (L3, L4), one end (OUT) of the inductive load (L1) is connected to the divided connection point, the other end (VB) of the inductive load (L1) is connected to the power supply or ground, one end (anode) of the rectifying element (DF) is connected in series to the two-divided inductor (L3, L4), and the other end (cathode) of the rectifying element (DF) is connected to the power supply or ground. In the inverter circuit of claim 6, the control configuration is simple because the flywheel current flows through the rectifying element (DF).

[0018] In the switching circuit of claim 7, the load means is an inductive load (L1), and further includes a switching element (M1) for flowing a flywheel current. In the inverter circuit of claim 7, since the flywheel current flows through the switching element (M1), the loss is lower than that using a rectifying element.

[0019] In the switching circuit of claim 8, the inductor is divided into two parts (L3, L4), one end (OUT) of the inductive load (L1) is connected to the divided connection point, the other end of the inductive load is connected to the power supply or ground, one end (drain or source) of the switching element (M) is connected in series to the two-divided inductor (L3, L4), and the other end (source or drain) of the switching element is connected to the power supply or ground. In the inverter circuit of claim 8, since the flywheel current flows through the switching element (M1), the loss is lower than that using a rectifying element.

[0020] In the inverter circuit of claim 9, when the main switch turns on, the switch recovery current (energy) flowing through the inverter switch on the opposite side that becomes the flywheel switch is accumulated in the top inductor (L3) and the bottom inductor (L4), and regenerated to the power supply during the operation when the next switch turns off, so the power conversion efficiency can be improved. Also, by storing the switch recovery current in the top inductor (L3) and the bottom inductor (L4), it can be suppressed and low noise can be achieved.

[0021] In the inverter circuit of claim 9, the energy of the load means (LU) used to turn on the top switch (50) and bottom switch (60) with ZCS is stored in the first capacitor (C1) while the top switch and bottom switch are on. Then, the energy (voltage) of the first capacitor (C1) is used to turn off the top switch and bottom switch with ZVS, and while the top switch and bottom switch are off, the energy of the first capacitor (C1) is returned to the power supply side, completely discharging the first capacitor (C1). In conventional ZCS and ZVS inverter circuits, the energy used for ZCS and ZVS operation is consumed as is, whereas in the inverter circuit of claim 9, the energy used for ZCS and ZVS operation is returned to the power supply side, thus achieving high efficiency.

[0022] The inverter circuit of claim 10 is a three-phase inverter. It can drive a three-phase motor with low losses even at high frequencies.

[0023] The inverter circuit of claim 11 has a bottom auxiliary circuit (20B) comprising: a first rectifier means (D1) arranged in series between the bottom inverter switch (60) and the power supply or ground; a first capacitor (C1); a second rectifier means (D2) connected in parallel to the first rectifier means (D1) and the first capacitor (C1) arranged in series via a bottom inductor (L4); a second capacitor (C2); and a third rectifier means (D3) arranged between the connection between the first rectifier means (D1) and the first capacitor (C1) and the connection between the second capacitor (C2) and the second rectifier means (D2). The inverter circuit of claim 11 improves power conversion efficiency by storing the switch recovery current (energy) flowing through the inverter switch in the top inductor (L3) and the bottom inductor (L4) and regenerating it to the power supply during the next switch-off operation.

[0024] The inverter circuit of claim 12 includes a detection means (70) for detecting which of the top inverter switch (50) or bottom inverter switch (60) is the main switch, and auxiliary circuit interruption means (SW1, SW2) for enabling the operation of the top auxiliary circuit (20T) or bottom auxiliary circuit (20B) on the main switch side, and for disabling the top auxiliary circuit (20T) or bottom auxiliary circuit (20B) on the side that is not the main switch. The inverter circuit of claim 12 improves power conversion efficiency by using a switching mode on both sides of the top inverter switch and the bottom inverter switch, appropriately accumulating the switch recovery current (energy) flowing to the inverter switch in the top inductor (L3) and the bottom inductor (L4), and regenerating it to the power supply during the next switch-off operation.

[0025] The inverter circuit of claim 13 includes a flip-flop (A3) having input terminals (D, CLK) that constitute a detection means and output terminals (Q, Q-bar) that control an auxiliary circuit interruption means. Therefore, the inverter circuit of claim 13 can determine whether the current load is flowing out or in from the inverter circuit, detect the main switch, enable the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the main switch side, and disable the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the side that is not the main switch.

[0026] The inverter circuit of claim 14 comprises a detection means (70) consisting of a resistor (R22) connected between the connection point (CN) of the top inductor (L3) and the bottom inductor (L4) and the load (LU), a first comparator (CPT) connected across the resistor which generates an output when the potential on the load side is lower than the potential on the connection point side, and a second comparator (CPB) which generates an output when the potential on the load side is higher than the potential on the connection point side. The auxiliary circuit interruption means consists of a first switch (SW1) and a second switch (SW2) which enable the operation of the top auxiliary circuit (20T) or bottom auxiliary circuit (20B) on the main switch side based on the outputs of the first and second comparators, and disable the top auxiliary circuit or bottom auxiliary circuit on the side that is not the main switch. The inverter circuit of claim 14 can determine whether the current load is flowing out or in from the inverter circuit, detect the main switch, enable the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the main switch side, and disable the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the side that is not the main switch. The inverter circuit of claim 14 has a simple configuration because the detection means (70) consists of a resistor (R22), a first comparator (CPT), and a second comparator (CPB).

[0027] The inverter circuit of claim 15 includes comparison means (CPU2, CPV2, CPW2) for comparing the U-phase control input signal, the V-phase control input signal, and the W-phase control input signal, and auxiliary circuit interruption means (SW1, SW2) for enabling the operation of the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the main switch side, and for disabling the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the side that is not the main switch. The inverter circuit of claim 15 can detect the main switch from the U-phase control input signal, the V-phase control input signal, and the W-phase control input signal, enable the operation of the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the main switch side, and disable the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the side that is not the main switch. The inverter circuit of claim 15 can interrupt the auxiliary circuits without passing load current through resistors, thus having no resistance loss and high efficiency.

[0028] The inverter circuit of claim 16 comprises a comparison means (80) consisting of a U-phase control comparator (CPU2) that compares the W-phase control input signal with the U-phase control input signal, a V-phase control comparator (CPV2) that compares the U-phase control input signal with the V-phase control input signal, and a W-phase control comparator (CPW2) that compares the V-phase control input signal with the W-phase control input signal. The auxiliary circuit interruption means consists of a U-phase auxiliary circuit interruption means (SW1U, SW2U) that enables the operation of the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the main switch side of the U-phase (110U) based on the output of the U-phase control comparator, and disables the top-side auxiliary circuit or bottom-side auxiliary circuit on the side that is not the main switch, and a U-phase auxiliary circuit interruption means (SW1U, SW2U) that enables the operation of the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the main switch side of the V-phase (110V) based on the output of the V-phase control comparator. The inverter circuit of claim 16 comprises a V-phase auxiliary circuit interruption means (SW1V, SW2V) that enables operation of the main switch and disables the top-side auxiliary circuit or bottom-side auxiliary circuit on the side that is not the main switch, and a W-phase auxiliary circuit interruption means (SW1W, SW2W) that enables operation of the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the main switch side of the W-phase (110W) and disables the top-side auxiliary circuit or bottom-side auxiliary circuit on the side that is not the main switch. The inverter circuit of claim 16 can detect the main switch from the U-phase control input signal, the V-phase control input signal, and the W-phase control input signal, enable operation of the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the main switch side, and disable the top-side auxiliary circuit (20T) or bottom-side auxiliary circuit (20B) on the side that is not the main switch. The inverter circuit of claim 16 can interrupt the auxiliary circuits without passing load current through a resistor, so there is no resistance loss and it is highly efficient.

[0029] The inverter circuit of claim 17, wherein the top inductor (L3) connected to the top inverter switch (122) and the bottom inductor (L4) connected to the bottom inverter switch (118) are part of the metal plate constituting the output terminal (124), and consist of a pair of extending pieces (124A, 124B) formed so that their extending directions are substantially perpendicular. The inverter circuit of claim 14 can be constructed at low cost, has high mechanical strength and high reliability because the top inductor L3 and the bottom inductor L4 are part of the metal plate constituting the output terminal 124. Although magnetic flux is generated in a spiral shape with respect to the extending direction in both extending pieces 124A and 124B, the magnetic flux does not interfere with each other because they are formed so that their extending directions are substantially perpendicular. [Brief explanation of the drawing]

[0033] [Figure 1] Figure 1(A) shows an example of a switching circuit according to the first embodiment of the present invention, in which the source side of MOFFET(M) is grounded, and Figure 1(B) shows an example of a switching circuit according to the first embodiment, in which a resistive load R is connected to the source side of MOFFET(M). [Figure 2] Figure 2(A) shows an example of a switching circuit according to the second embodiment in which the source side of MOFFET(M) is grounded, and Figure 2(B) shows an example of a switching circuit according to the second embodiment in which an inductive load L1 is connected to the source side of MOFFET(M). [Figure 3] This is a circuit example of a switching circuit according to the second embodiment, which is composed of a single inductor. [Figure 4] Figure 4(A) shows the circuit configuration of the switching circuit of the third embodiment in which MOSFET(M1) operates as a flywheel circuit and MOSFET(M2) acts as the main switch, and Figure 4(B) shows the circuit configuration of the switching circuit of the third embodiment in which MOSFET(M2) operates as a flywheel circuit and MOSFET(M1) acts as the main switch. [Figure 5] Circuit diagram of the inverter circuit of the fourth embodiment [Figure 6]Diagram illustrating the current flowing through the inverter circuit of the fourth embodiment. [Figure 7] Circuit diagram of the inverter circuit of the fifth embodiment [Figure 8] This is a circuit diagram of the inverter circuit of the fifth embodiment, showing the current direction during main switch-on operation. [Figure 9] This is a circuit diagram of the inverter circuit of the fifth embodiment, showing the current direction during main switch-on operation. [Figure 10] This is a circuit diagram of the inverter circuit of the fifth embodiment, showing the current direction during main switch-on operation. [Figure 11] This is a circuit diagram of the inverter circuit of the fifth embodiment, showing the current direction during the main switch-off operation. [Figure 12] This shows the drain current, DS voltage, and drain loss on the top and bottom sides. [Figure 13] This shows the drain current, DS voltage, and node voltage on the top side. [Figure 14] This shows the drain currents on the top and bottom sides, the voltage between the top and bottom sides, the drain loss, and the current of capacitor C2. [Figure 15] The FFT analysis results of the output voltage waveform are shown. [Figure 16] The FFT analysis results of the power supply current waveform are shown. [Figure 17] The falling edge waveforms of the conventional inverter circuit and the inverter circuit of the fifth embodiment are shown. [Figure 18] The rise time waveforms of the conventional inverter circuit and the inverter circuit of the fifth embodiment are shown. [Figure 19] Circuit diagram showing the regenerative operation of the inverter circuit of the fifth embodiment. [Figure 20] A schematic diagram showing a power module configured with an inverter circuit according to the fifth embodiment. [Figure 21] Circuit diagram of an inverter according to the first modification example of the fifth embodiment. [Figure 22] Circuit diagram of an inverter according to the second modification example of the fifth embodiment. [Figure 23]Circuit diagram of the inverter according to the sixth embodiment [Figure 24] The output currents of the U, V, and W phases and the control signals of the U, V, and W phases of the inverter according to the sixth embodiment are shown. [Figure 25] The output currents of the U, V, and W phases and the control signals of the U, V, and W phases of the inverter according to the sixth embodiment are shown. [Figure 26] The output currents of the U, V, and W phases and the control signals of the U, V, and W phases of the inverter according to the sixth embodiment are shown. [Figure 27] Circuit diagram of a conventional inverter circuit [Figure 28] This shows the simulation results of the voltage, current, and losses of the top switch and bottom switch when the bottom switch is ON, using a conventional inverter circuit. [Figure 29] This shows the simulation results of the voltage, current, and losses of the top switch and bottom switch when the bottom switch is off, using a conventional inverter circuit. [Modes for carrying out the invention]

[0034] [First Embodiment] Figure 1 is a circuit diagram of a switching circuit according to the first embodiment. Figure 1(A) shows an example circuit where the source side of MOFFET(M) is grounded, and Figure 1(B) shows an example circuit where a resistive load R is connected to the source side of MOFFET(M).

[0035] The switching circuit 110 according to the first embodiment drives the load means (resistive load) R by intermittently supplying power from the power supply E. The switching means consists of a switching element (MOSFET) M that is driven in a one-sided switching mode only. The switching circuit 110 is a soft switching method that reduces switching loss by providing a time difference between the voltage applied to the switching means M built into the switching circuit and the current flowing through the switching means M. That is, the switching circuit 110 turns on the switching means (MOSFET) M at the timing when the current is zero (ZCS) and turns off the MOSFET (M) at the timing when the voltage is zero (ZVS) based on a gate signal from the control circuit means 10.

[0036] The switching circuit 110 of the first embodiment shown in Figure 1(A) includes an inductor L disposed between a resistive load R and a MOSFET(M), a first diode D1 disposed in series between the MOSFET(M) and a power supply E (or ground (Figure 1(B))), a first capacitor C1, a second diode D2 connected in parallel to the first diode D1 and the first capacitor C1 via the inductor L, a second capacitor C2, and a third diode D3 disposed between the connection between the first diode D1 and the first capacitor C1 and the connection between the second capacitor C2 and the second diode D2.

[0037] The input terminal VB of the resistive load R is connected to the power supply E, the first capacitor C1, and the cathode side of the second diode D2. The output terminal OUT of the resistive load R is connected to the connection point between the inductor L and the second capacitor C2.

[0038] The first diode D1 is connected to the drain side of MOSFET(M) with its anode side to prevent the charge of the first capacitor C1 from short-circuiting to MOSFET(M). The second diode D2 recirculates the charge from the second capacitor C2 back to the power supply E. The cathode side of the second diode D2 is connected to the power supply E (or ground (Figure 1(B))), and the anode side is connected to the second capacitor C2. The third diode D3 prevents a short circuit in the inductor L. The anode side of the third diode D3 is connected to the connection point between the first diode D1 and the first capacitor C1, and the cathode side is connected to the connection point between the second capacitor C2 and the second diode D2.

[0039] [On operation of switch element M] When the switch element M is off, the time during which a leftward current flows through the inductor L is very short, "less than 1 usec". Therefore, the current through the inductor L is usually zero just before the switch element M turns on. In the previous off operation, inductor L generates a positive voltage on the left side while allowing load current to flow. When the current from inductor L is zero (ZCS), the switch (MOSFET) M turns on. Since the current from inductor L is initially zero, it increases with a predetermined rise time (time constant). As a result, the drain current of the switch element M increases after its drain voltage becomes zero.

[0040] Focusing on the behavior of inductor L, at the moment the switch M is turned on, a current flows that is the sum of a first current flowing through the path of capacitor C1 - rectifier D3 - capacitor C2 - inductor L and a second current flowing from power supply E through load means R. The first current decreases in a short time as capacitors C1 and C2 charge, but inductor L acts to maintain this decreased current, generating a negative voltage at its right end. Consequently, the OUT terminal becomes a negative voltage below GND level, and capacitors C1 and C2 act to divide the voltage of power supply E and the negative voltage.

[0041] After the first capacitor C1 and the second capacitor C2 are charged, their capacitances are adjusted so that the lower terminal voltage of the first capacitor C1 becomes 0V. The second capacitor C2 plays a role in setting the upper terminal voltage of the first capacitor C1 to the power supply voltage and the lower terminal voltage to 0V. When the lower terminal voltage of the first capacitor C1 becomes 0V, the ZVS of the switch element M, which will be described later, is realized.

[0042] [Off operation of switch element M] As described above, the ON operation charges the first capacitor C1 to a voltage approximately equal to the voltage of the power supply E. Immediately before the switch element M turns off, a load current flows through the inductor L. When the switch element M turns off and the current in the inductor L decreases, the inductor L needs to generate a positive voltage at its left end in an attempt to maintain its previous current value. However, since the lower end of the capacitor C1 is 0V, no such positive voltage is generated, and the voltage at the left end of the inductor L remains 0V. Current flows to the capacitor C1 via the rectifier D1, charging C1 in the reverse direction, while the drain voltage of the switch element M rises. This voltage is the drain voltage of the switch element M, and since the cutoff time of the switch element M is faster than the time it takes for this voltage to rise, the ZVS operation of the switch element M is realized.

[0043] When the switch element M is turned off by ZVS, the drain current becomes 0A, but the drain voltage starts at approximately 0V, which is about equal to the voltage at the lower end of the first capacitor C1, and the first capacitor C1 discharges while a regenerative current flows to the power supply side. When the first capacitor C1 is completely discharged, the current in the inductor L is returned to the power supply E for a short time via the first rectifier (diode) D1, the third rectifier D3, and the second rectifier D2.

[0044] The load mechanism R discharges the second capacitor C2 when the OUT terminal is at the voltage of the power supply E, setting the charge voltage of the second capacitor C2 to 0V. This causes the lower end of the first capacitor C1 to reach 0V when the switch element M is turned on next. If the second rectifier mechanism D2 is not present, the upper end of the second capacitor C2 will remain positively charged, and even when the switch element M is turned on, current cannot flow through the path of the first capacitor C1 - third rectifier mechanism D3 - second capacitor C2.

[0045] In the switching circuit of the first embodiment, the energy of the inductor L used to turn on the switch means M with ZCS is stored in the first capacitor C1 while the switch means M is on. Then, the energy (voltage) of the first capacitor C1 is used to turn off the switch means M with ZVS, and while the switch means M is off, the energy of the first capacitor C1 is returned to the power supply side, completely discharging the first capacitor C1. In conventional ZCS and ZVS inverter circuits, the energy used for ZCS and ZVS operation is consumed as is, whereas in the switching circuit of the first embodiment, the energy used for ZCS and ZVS operation is returned to the power supply side, thus achieving high efficiency.

[0046] [Second Embodiment] Figure 2 is a circuit diagram of a switching circuit according to the second embodiment. Figure 2(A) shows an example circuit where the source side of MOFFET(M) is grounded, and Figure 2(B) shows an example circuit where an inductive load L1 is connected to the source side of MOFFET(M).

[0047] The switching circuit 110 according to the second embodiment drives the inductive load L1 by intermittently supplying power from the power supply E. The switching circuit 110 employs a soft switching method that reduces switching losses by creating a time difference between the voltage applied to the switch means (MOSFET) M built into the switching circuit and the current flowing through the MOSFET(M). Specifically, the switching circuit 110 turns on the switch means (MOSFET) M when the current is zero (ZCS) and turns off the MOSFET(M) when the voltage is zero (ZVS) based on a gate signal from the control circuit means 10.

[0048] The switching circuit 110 of the second embodiment shown in Figure 2(A) includes an inductor L4 disposed between an inductive load L1 and a MOSFET(M), a first diode D1 disposed in series between the MOSFET(M) and a power supply E (or ground (Figure 2(B))), a first capacitor C1, a second diode D2 connected in parallel to the first diode D1 and the first capacitor C1 via inductors L3 and L4, a second capacitor C2, a third diode D3 disposed between the connection between the first diode D1 and the first capacitor C1 and the connection between the second capacitor C2 and the second diode D2, and a rectifier element (flywheel diode) DF for carrying flywheel current.

[0049] The input terminal VB of the inductive load L1 is connected to the power supply E, the first capacitor C1, and the cathode side of the second diode D2. The output terminal OUT of the inductive load L1 is connected to the connection point with inductors L3 and L4.

[0050] The first diode D1 is connected to the drain side of MOSFET(M) with its anode to prevent the charge of the first capacitor C1 from short-circuiting to MOSFET(M). The second diode D2 recirculates the charge of the second capacitor C2 to the power supply E. The cathode side of the second diode D2 is connected to the power supply E, and its anode side is connected to the second capacitor C2 side. The third diode D3 prevents short-circuiting of inductors L3 and L4. The anode side of the third diode D3 is connected to the connection point between the first diode D1 and the first capacitor C1, and its cathode side is connected to the connection point between the second capacitor C2 and the second diode D2. The flywheel diode DF is connected in series with inductor L3 with its anode side, and its cathode side is connected to the power supply or ground, or to the input terminal VB of the inductive load L1.

[0051] The output terminal OUT of the inductive load L1 is connected to the connection point of the two divided inductors L3 and L4, and the input terminal VB of the inductive load L1 is connected to the power supply E. In the circuit example in Figure 2(B), the ground terminal GND of the inductive load L1 is connected to earth.

[0052] [Switch-on operation] The flywheel diode DF is assumed to operate as a flywheel circuit. When MOSFET(M) is off, the current through the inductive load L1 decreases, so the inductive load L1 generates a positive voltage on its lower side to maintain the current, and load current flows through it.

[0053] The direction and value of the current described above are maintained as it flows in the forward direction through the flywheel diode DF. Subsequently, the MOSFET(M) turns on, causing a reverse recovery current to flow through the flywheel diode DF. The current in inductor L3 rapidly reverses, and the current in inductor L4, which initially has a value of 0, increases with a predetermined rise time (time constant). This causes the drain current to increase after the drain voltage of MOSFET(M) becomes 0V, thus realizing ZCS operation during the ON transition of MOSFET(M). In addition, the recovery current (energy) on the flywheel diode DF side is stored as current in inductors L3 and L4 and is regenerated to the power supply in subsequent operations, thereby improving power conversion efficiency.

[0054] Focusing on the behavior of inductor L3, when the MOSFET(M) is turned on, a large recovery current flows through the flywheel diode DF, but as the recovery current disappears, the current decreases rapidly. Then, in order to maintain the current, inductor L3 generates a large voltage with the upper part being negative. As a result, capacitors C2 and C1 are charged via diodes D1 and D3, respectively, with the left side of capacitor C2 becoming positive and the upper part of capacitor C1 becoming positive, and the recovery energy is stored in both capacitors. In this way, a large negative surge voltage is generated at the top of inductor L3, and the capacitance settings of capacitors C1 and C2 are important in order to prevent this voltage from exceeding the voltage rating of the flywheel diode DF. Furthermore, the ratio of capacitors C1 and C2 is set such that the lower terminal voltage of capacitor C1 becomes 0V after both capacitors C1 and C2 have been charged, thereby achieving ZVS during the MOSFET off operation described later.

[0055] [Main switch off operation] As described above, the ON operation charges capacitor C1 to a voltage E approximately equal to the power supply voltage. Therefore, when MOSFET(M) is turned off, the drain current becomes 0A, but the drain voltage starts from approximately 0V, which is approximately equal to the voltage at the bottom of capacitor C1, as the voltage at the bottom of the inductive load L1 rises due to the decrease in the current of the inductive load L1, and capacitor C1 discharges while regenerating current flows to the power supply side. During this operation, the flywheel diode DF is in the OFF period, so the capacitor C1 current does not flow back through the flywheel diode DF and inductors L3, L4, and diode D1, thus preventing power loss. When capacitor C1 is completely discharged, the flywheel current of the inductive load L1 flows back to the power supply for a short time through diodes D1, D3, and D2, but immediately after that the voltage at the top of inductor L3 reaches the ON potential of flywheel diode DF, so after that the current flows back to the power supply through flywheel diode DF, and the power loss of diodes D1, D3, and D2 is kept to a minimum.

[0056] ZVS / ZCS operation is also possible with the circuit configuration shown in Figure 3, which uses a single inductor L instead of the divided inductors L3 and L4 shown in Figures 2(A) and 2(B). The operation of the switching circuit shown in Figure 3 when inductor L3 is removed and only one inductor L is used is explained below. As an inductive load, when driving a DC motor using a known PWM, a capacitor C is often inserted in parallel with the load to reduce brush noise of the DC motor. In this case, when the MOSFET(M) turns on, the recovery current of the flywheel diode DF, which is a flywheel rectifier, flows through the inductor L. As the current value tries to decrease due to the decrease in hot carriers (holes) that cause the recovery current of the flywheel diode DF, the inductor L tries to maintain the current up to that point, generating a negative voltage at its upper end. This voltage is divided by capacitors C2 and C1, and the lower end voltage of capacitor C1 is brought to GND potential (0V), thereby achieving ZVS operation when the MOSFET(M) turns off, as described above. However, when there is a capacitor C in parallel with the load, the generation of the above negative voltage is suppressed and the voltage does not drop sufficiently, so the voltage at the lower end of capacitor C1 does not become 0V. Furthermore, this voltage is greatly affected by the capacitance value of capacitor C. Therefore, in order to generate a constant negative voltage without being affected by the capacitance value of capacitor C, it is effective to divide L into L3 and L4 as shown in Figure 2.

[0057] This stabilizes the negative voltage value mentioned above, allowing the voltage at the lower terminal of capacitor C1 to be set to 0V. Furthermore, it allows for precise control of the lower terminal voltage of the flywheel diode DF, resulting in the excellent effect of preventing the reverse breakdown voltage of the flywheel diode DF from being exceeded.

[0058] [Third Embodiment] Figure 4 is a circuit diagram of a switching circuit according to the third embodiment. Figure 4(A) shows a circuit configuration in which MOSFET(M1) operates as a flywheel circuit and MOSFET(M2) acts as the main switch. Figure 4(B) shows a circuit configuration in which MOSFET(M2) operates as a flywheel circuit and MOSFET(M1) acts as the main switch.

[0059] [Circuit Configuration] The switching circuit 110 according to the third embodiment drives the inductive load L1 by intermittently supplying power from the power supply E. The switching circuit 110 employs a soft switching method that reduces switching losses by creating a time difference between the voltage applied to the switch means (MOSFET) M2 built into the switching circuit and the current flowing through the MOSFET (M2). Specifically, the switching circuit 110 of the third embodiment shown in Figure 4(A) is turned on when the current is zero (ZCS) and turned off when the voltage is zero (ZVS) based on a gate signal from the control circuit means 10.

[0060] The switching circuit 110 of the third embodiment shown in Figure 4(A) includes an inductor L4 disposed between an inductive load L1 and a MOSFET(M2), a first diode D1 disposed in series between the MOSFET(M2) and a power supply E (or ground (Figure 4(B))), a first capacitor C1, a second diode D2 connected in parallel to the first diode D1 and the first capacitor C1 via inductors L3 and L4, a second capacitor C2, a third diode D3 disposed between the connection between the first diode D1 and the first capacitor C1 and the connection between the second capacitor C2 and the second diode D2, and a switching element (MOSFET(M1)) for conducting flywheel current.

[0061] The input terminal VB of the inductive load L1 is connected to the power supply E, the first capacitor C1, and the drain side of the MOSFET (M1). The ground terminal GND of the inductive load L1 is connected to earth (Figure 4(B)). The output terminal OUT of the inductive load L1 is connected to the connection point with inductors L3 and L4.

[0062] The first diode D1 is connected to the drain side of MOSFET(M2) with its anode side to prevent the charge of the first capacitor C1 from short-circuiting to MOSFET(M2). The second diode D2 recirculates the charge from the second capacitor C2 back to the power supply E. The cathode side of the second diode D2 is connected to the power supply E, and the anode side is connected to the second capacitor C2. The third diode D3 prevents a short circuit between inductors L3 and L4. The anode side of the third diode D3 is connected to the connection point between the first diode D1 and the first capacitor C1, and the cathode side is connected to the connection point between the second capacitor C2 and the second diode D2. The MOSFET (M1) has its source side connected in series with the inductor L3, and its drain side connected to the input terminal VB of the inductive load L1.

[0063] The output terminal OUT of the inductive load L1 is connected to the connection point of the two divided inductors L3 and L4, and the input terminal VB of the inductive load L1 is connected to the power supply E.

[0064] [Main switch-on operation] As shown in Figure 4(A), there is an inductive load L1, with MOSFET(M2) acting as the main switch and MOSFET(M1) operating as a flywheel circuit. When MOSFET(M2) is off, the current through the inductive load L1 decreases, so the inductive load L1 generates a positive voltage on its lower side to maintain the current, and load current flows through it.

[0065] Next, MOSFET(M1) turns off ahead of schedule by a certain amount of time, but the direction and value of the current are maintained. MOSFET(M2) turns on later, causing a body diode reverse recovery current to flow through MOSFET(M1). This rapidly reverses the current in inductor L3, and since the current in inductor L4 is initially 0, it increases with a predetermined rise time (time constant). This results in an increase in drain current after the drain voltage of MOSFET(M2) reaches 0V, thus realizing ZCS operation during the main switch-on transition. Furthermore, the MOSFET(M1) side switch recovery current (energy) is stored as current in inductors L3 and L4 and regenerated back to the power supply in subsequent operations, improving power conversion efficiency.

[0066] Focusing on the behavior of inductor L3, when MOSFET(M2) is turned on, a large recovery current flows through MOSFET(M1). However, as the recovery current disappears, the current decreases rapidly. To maintain the previous current, inductor L3 generates a large voltage with its upper side negative. As a result, capacitors C2 and C1 are charged via diodes D1 and D3, respectively, with the left side of capacitor C2 becoming positive and the upper side of capacitor C1 becoming positive, and the recovery energy is stored in both capacitors. In this way, a large negative surge voltage is generated at the top of inductor L3, and the capacitance settings of capacitors C1 and C2 are important to prevent this voltage from exceeding the voltage rating of MOSFET(M1). Furthermore, the ratio of capacitors C1 and C2 is set such that the lower terminal voltage of capacitor C1 becomes 0V after both capacitors C1 and C2 have been charged, thereby achieving ZVS during the off operation of the MOSFET(M2) side MOSFET, as described later.

[0067] [Main switch off operation] As described above, the ON operation charges capacitor C1 to a voltage E approximately equal to the power supply voltage. Therefore, when the MOSFET on the main switch side, MOSFET(M2), is turned off, the drain current becomes 0A. However, the drain voltage starts from 0V, as it is approximately equal to the voltage at the bottom of capacitor C1, due to the voltage rise at the bottom of the inductive load L1 caused by the decrease in the current of the inductive load L1. Capacitor C1 then discharges while regenerative current flows to the power supply side. During this operation, MOSFET(M1) is in a dead time period, so the current in capacitor C1 does not flow back through MOSFET(M1) and inductors L3, L4, and diode D1, thus preventing power loss. When capacitor C1 is completely discharged, the flywheel current of the inductive load L1 flows back to the power supply for a short time through diodes D1, D3, and D2. However, immediately afterward, the voltage at the top of inductor L3 reaches the source potential of MOSFET(M2), so after this, the current flows back to the power supply through MOSFET(M1), and the power loss through diodes D1, D3, and D2 is kept to a minimum. As described above, the off operation of the main switch MOSFET (M2) achieves ZVS operation, where the voltage rises only after the current becomes zero, thereby suppressing switching losses.

[0068] [Fourth Embodiment] Figure 5 is a circuit diagram of the inverter circuit according to the fourth embodiment. The inverter circuit 110 according to the fourth embodiment is for driving a three-phase motor equipped with a U-phase coil LU, a V-phase coil LV, and a W-phase coil LW. The inverter circuit 110 according to the fourth embodiment consists of a U-layer inverter circuit 110U for driving the U-phase coil LU, a V-layer inverter circuit 110V for driving the V-phase coil LV, and a W-layer inverter circuit 110W for driving the W-phase coil LW. The U-layer inverter circuit 110U, the V-layer inverter circuit 110V, and the W-layer inverter circuit 110W have the same configuration.

[0069] [Circuit Configuration] The U-layer inverter circuit 110U of the switching circuit 110 according to the fourth embodiment includes a half-bridge inverter having a top inverter switch 50 and a bottom inverter switch 60, a top-side auxiliary circuit 20T that performs ZVS / ZCS operation in response to a gate signal from the control circuit means 10 when the top inverter switch 50 is turned on or off, and a bottom-side auxiliary circuit 20B that performs ZVS / ZCS operation in response to a gate signal from the control circuit means 10 when the bottom inverter switch 60 is turned on or off.

[0070] The U-layer inverter circuit 110U further includes a top-side inductor L3 connected between the top inverter switch 50 and the load means (U-phase coil LU), which performs ZCS operation when the top inverter switch 50 and the bottom inverter switch 60 are switched on, and a bottom-side inductor L4 connected between the bottom inverter switch 60 and the U-phase coil LU, and also connected to the top-side inductor L3.

[0071] The top-side auxiliary circuit 20T includes a first diode D1 arranged in series between the top inverter switch 50 and ground, a first capacitor C1, a second diode D2 connected in parallel to the first diode D1 and first capacitor C1 arranged in series via inductors L3 and L4, a second capacitor C2, and a third diode D3 arranged between the connection point between the first diode D1 and the first capacitor C1 and the connection point between the second capacitor C2 and the second diode D2.

[0072] The bottom auxiliary circuit 20B includes a first diode D1 arranged in series between the bottom inverter switch 60 and the power supply E, a first capacitor C1, a second diode D2 connected in parallel to the first diode D1 and the first capacitor C1 via inductors L3 and L4, a second capacitor C2, and a third diode D3 arranged between the connection between the first diode D1 and the first capacitor C1 and the connection between the second capacitor C2 and the second diode D2.

[0073] The output terminal OUT of the U-layer inverter circuit 110U, which is connected to the connection point between the two divided inductors L3 and L4, is connected to one end of the inductive load U-phase coil LU, and the other end of the inductive load U-phase coil LU is connected to the other end of the inductive load V-phase coil LV and the inductive load W-phase coil LW.

[0074] In the bottom auxiliary circuit 20B, the first diode D1 is connected to the drain side of MOSFET(M2) with its anode side to prevent the charge of the first capacitor C1 from short-circuiting to MOSFET(M2). The second diode D2 recirculates the charge from the second capacitor C2 back to the power supply E. The cathode side of the second diode D2 is connected to the power supply E, and the anode side is connected to the second capacitor C2. The third diode D3 prevents a short circuit between inductors L3 and L4. The anode side of the third diode D3 is connected to the connection point between the first diode D1 and the first capacitor C1, and the cathode side is connected to the connection point between the second capacitor C2 and the second diode D2. MOSFET(M1) has its source side connected in series with inductor L3, and its drain side connected to power supply E.

[0075] circuit operation [Current direction detection circuit] The current direction detection circuit 70 in Figure 5 detects the direction of the current. The current direction detection circuit 70 determines whether the load current is flowing out or into the inverter circuit based on the level of the output terminal when the MOSFET (M2) is turned on. When the current direction of the inductive load (U-phase coil) LU is to the right in the figure, the voltage level to the left of the inductive load LU becomes "L" to prevent the current in this direction from decreasing. In this case, the top switch side MOSFET (M1) becomes the main switch and the bottom switch side MOSFET (M2) becomes the flywheel switch. Therefore, the bottom switch ZCS / ZVS circuit 20B is unnecessary, and the switch SW1 is turned off to disconnect the circuit element (if the bottom switch ZCS / ZVS circuit 20B and the top switch ZCS / ZVS circuit 20T are connected at the same time, unintended circuit operation will occur and losses will increase). Similarly, if the current direction of the inductive load LU is to the left, the ZCS / ZVS circuit 20T of the top-side switch is interrupted when switch SW2 is turned off.

[0076] Reasons why switches SW1 and SW2 are necessary in the inverter circuit of the fourth embodiment As shown in Figure 6, when the load current flows to the left through the inductive load LU, the top switch side MOSFET (M1) acts as the flywheel switch and the bottom switch side MOSFET (M2) acts as the main switch. In this case, when the bottom switch side MOSFET (M2) is turned on, a negative voltage is generated at the upper end of inductor L3 and a positive voltage at the lower end. However, if the top switch ZCS / ZVS circuit is connected, the current flows in the direction shown in Figure 6, and the upper end of inductor L3 does not have a negative voltage. Therefore, it is necessary to control SW1 or SW2 according to the direction of the load current to shut off the ZCS / ZVS circuit on the flywheel side.

[0077] [Main switch-on operation] As shown in Figure 5, there is an inductive load LU, and MOSFET(M2) acts as the main switch when switch SW1 is ON, while MOSFET(M1) operates as a flywheel circuit when switch SW2 is OFF. When MOSFET(M2) is OFF, the current through the inductive load LU decreases, so the load current flows through the inductive load LU while generating a positive voltage on the left side to maintain the current.

[0078] Next, MOSFET(M1) turns off ahead of schedule by a certain amount of time, but the direction and value of the current are maintained. MOSFET(M2) turns on later, causing a body diode reverse recovery current to flow through MOSFET(M1). This rapidly reverses the current in inductor L3, and since the current in inductor L4 is initially 0, it increases with a predetermined rise time (time constant). This results in an increase in drain current after the drain voltage of MOSFET(M2) reaches 0V, thus realizing ZCS operation during the main switch-on transition. Furthermore, the MOSFET(M1) side switch recovery current (energy) is stored as current in inductors L3 and L4 and regenerated back to the power supply in subsequent operations, improving power conversion efficiency.

[0079] Focusing on the behavior of inductor L3, when MOSFET(M2) is turned on, a large recovery current flows through MOSFET(M1). However, as the recovery current disappears, the current decreases rapidly. To maintain the previous current, inductor L3 generates a large voltage with its upper side negative. As a result, capacitors C2 and C1 are charged via diodes D1 and D3, respectively, with the left side of capacitor C2 becoming positive and the upper side of capacitor C1 becoming positive, and the recovery energy is stored in both capacitors. In this way, a large negative surge voltage is generated at the top of inductor L3, and the capacitance settings of capacitors C1 and C2 are important to prevent this voltage from exceeding the voltage rating of MOSFET(M1). Furthermore, the ratio of capacitors C1 and C2 is set such that the lower terminal voltage of capacitor C1 becomes 0V after both capacitors C1 and C2 have been charged, thereby achieving ZVS during the off operation of the MOSFET(M2) side MOSFET, as described later.

[0080] [Main switch off operation] As described above, the ON operation charges capacitor C1 to a voltage E approximately equal to the power supply voltage. Therefore, when the MOSFET on the main switch side, MOSFET(M2), is turned off, the drain current becomes 0A. However, the drain voltage starts from 0V, as it is approximately equal to the voltage at the bottom of capacitor C1, due to the voltage rise at the left end of the inductive load LU caused by the decrease in the current of the inductive load LU. Capacitor C1 then discharges while regenerative current flows to the power supply side. During this operation, MOSFET(M1) is in a dead time period, so the current in capacitor C1 does not flow back through MOSFET(M1) and inductors L3, L4, and diode D1, thus preventing power loss. When capacitor C1 is completely discharged, the flywheel current of the inductive load LU flows back to the power supply for a short time through diodes D1, D3, and D2. However, immediately afterward, the voltage at the top of inductor L3 reaches the source potential of MOSFET(M2), so after this, the current flows back to the power supply through MOSFET(M1), and the power loss through diodes D1, D3, and D2 is kept to a minimum. As described above, the off operation of the main switch MOSFET (M2) achieves ZVS operation, where the voltage rises only after the current becomes zero, thereby suppressing switching losses.

[0081] [Fifth Embodiment] Figure 7 is a circuit diagram of the inverter circuit according to the fifth embodiment. The inverter circuit according to the fifth embodiment is for driving a three-phase motor equipped with a U-phase coil L1, a V-phase coil (not shown), and a W-phase coil, similar to the fourth embodiment. Figure 7 shows only the U-layer inverter circuit 110 for driving the U-phase coil L1 according to the fifth embodiment, but the other V-layer inverter circuits and W-layer inverter circuits have the same configuration.

[0082] [Circuit Configuration] The U-layer inverter circuit 110 of the switching circuit according to the fifth embodiment includes a half-bridge inverter having a top inverter switch 50 and a bottom inverter switch 60, a top-side auxiliary circuit 20T that performs ZVS / ZCS operation based on signals from control circuit means A1 and A2 when the top inverter switch 50 is turned on or off, and a bottom-side auxiliary circuit 20B that performs ZVS / ZCS operation based on signals from control circuit means A1 and A2 when the bottom inverter switch 60 is turned on or off.

[0083] The U-layer inverter circuit 110 further includes a top-side inductor L3 connected between the top inverter switch 50 and the load means (U-phase coil L1), which performs ZCS operation when the top inverter switch 50 and the bottom inverter switch 60 are switched ON, and a bottom-side inductor L4 connected between the bottom inverter switch 60 and the U-phase coil L1, and also connected to the top-side inductor L3.

[0084] The top-side auxiliary circuit 20T includes a first diode D1 (D1c, D1d) arranged in series between the top inverter switch 50 and ground, a first capacitor C1c, a second diode D2 (D2c, D2d) connected in parallel to the first diode D1 (D1c, D1d) and the first capacitor C1c via inductors L3 and L4, a second capacitor C2c, and a third diode D3 (D3c, D3d) arranged between the connection point between the first diode D1 (D1c, D1d) and the first capacitor C1c, and the connection point between the second capacitor C2c and the second diode D2 (D2c, D2d).

[0085] The bottom auxiliary circuit 20B includes a first diode D1 (D1a, D1b) arranged in series between the bottom inverter switch 60 and the power supply E, a first capacitor C1, a second diode D2 (D2a, D2b) connected in parallel to the first diode D1 (D1a, D1b) and the first capacitor C1 via inductors L3 and L4, a second capacitor C2, and a third diode D3 (D3a, D13) arranged between the connection point between the first diode D1 (D1a, D1b) and the first capacitor C1, and the connection point between the second capacitor C2 and the second diode D2 (D2a, D2b). The bottom auxiliary circuit 20B further includes a resistor R5 and a capacitor C6 to suppress voltage fluctuations.

[0086] One end of the inductive load U-phase coil L1 is connected to the connection point between the two divided inductors L3 and L4, and the other end of the inductive load U-phase coil L1 is connected to the power supply. Resistor R3 represents the resistance component in the inductive load U-phase coil L1.

[0087] In the bottom auxiliary circuit 20B, the first diode D1 (D1a, D1b) is connected to the drain side of MOSFET (M2) with its anode side connected to the drain side of MOSFET (M2) to prevent the charge of the first capacitor C1 from short-circuiting to MOSFET (M2). The second diode D2 (D2a, D2b) recirculates the charge from the second capacitor C2 back to the power supply E. The cathode side of the second diode D2 (D2a, D2b) is connected to the power supply E, and the anode side is connected to the second capacitor C2. The third diode D3 (D3a, D3b) prevents short circuits between inductors L3 and L4. The anode side of the third diode D3 (D3a, D3b) is connected to the connection point between the first diode D1 (D1a, D1b) and the first capacitor C1, and the cathode side is connected to the connection point between the second capacitor C2 and the second diode D2 (D2a, D2b). MOSFET(M1) has its source side connected in series with inductor L3, and its drain side connected to power supply E.

[0088] circuit operation [Current direction detection circuit] The current direction detection circuit 70 in Figure 7 detects the direction of the current. The current direction detection circuit 70 determines whether the load current is flowing out or into the inverter circuit based on the level of the output terminal when the bottom switch 60 is turned on. Specifically, the clock terminal CLK of flip-flop A3 is the input signal to the gate driver of the MOSFET on the bottom switch 60 side. If the output terminal connected to the data terminal D is "L" at the rising edge of the clock (the on-timing of the bottom MOSFET), the current direction of the inductive load L1 will be to the right in the figure, and the voltage level on the left side of the inductive load L1 will be "L" to prevent the current in this direction from decreasing. In this case, the top switch side MOSFET becomes the main switch and the bottom switch side MOSFET becomes the flywheel switch. Therefore, the bottom switch ZCS / ZVS circuit 20B is unnecessary, and the MOSFET M4 is turned off to disconnect the circuit element. (If the bottom switch ZCS / ZVS circuit 20B and the top switch ZCS / ZVS circuit 2OT are connected at the same time, unintended circuit operation will occur and losses will increase). That is, for the same reasons as the inverter circuit of the fourth embodiment, the inverter circuit of the fifth embodiment requires a current direction detection circuit 70. Similarly, if the current direction of the inductive load L1 is to the left, the ZCS / ZVS circuit 20T of the top switch is interrupted.

[0089] [Main switch-on operation] As shown in Figure 8, the inductive load L1 is located on the power supply side, the bottom switch 60 acts as the main switch, and the top switch 50 operates as a flywheel circuit. When the bottom switch side MOSFET is off, the current through the inductive load L1 decreases, so the inductive load L1 generates a positive voltage on the left side to maintain the current, and load current flows through it.

[0090] Next, referring to Figures 9 and 12, the top switch side MOSFET turns off ahead of the dead time, but the direction and value of the current described above are maintained. The bottom switch side MOSFET turns on with a delay, so the top side recovery countermeasure diode D5 and the reverse recovery current of the body diodes of each MOSFET flow, causing the current in inductor L3 to rapidly reverse, and the current in inductor L4, which has an initial value of 0, increases with a predetermined rise time (time constant) → as a result, the drain current increases after the drain voltage of the bottom switch side MOSFET becomes 0V, realizing ZCS operation during the main switch-on transition. In addition, the top side switch recovery current (energy) is stored as current in inductors L3 and L4 and is regenerated to the power supply in the operation described in the following section, so the power conversion efficiency can be improved.

[0091] Focusing on the behavior of inductor L3, as shown in Figures 12 and 13, when the bottom switch MOSFET is turned on, a large recovery current flows through inductor L3 to the top switch. However, as the recovery current disappears, the current decreases rapidly. In response, inductor L3 generates a large voltage with a negative polarity at its upper end (node ​​n012) to maintain the previous current (Figures 10 and 12). As a result, capacitors C2 and C1 are charged via diodes D1 (D1a, D1b) and D3 (D3a, D3b), respectively, with the left side of capacitor C2 becoming positive and the upper part of capacitor C1 becoming positive, and the recovery energy is stored in both capacitors. In this way, as shown in Figure 13, a large negative surge voltage of approximately 70V is generated at node n012. To prevent this voltage from exceeding the voltage rating of the top switch, the capacitance settings of capacitors C1 and C2 are crucial. Furthermore, the ratio of capacitors C1 and C2 is set such that the lower terminal voltage of capacitor C1 becomes 0V after both capacitors C1 and C2 have been charged, thereby achieving ZVS during the off operation of the bottom switch side MOSFET, as described later. The relationship when the power supply voltage is 48V and the voltage rating of the top switch is (48V + 70V ≈ 120V) is as follows: (48V + 70V) × C1 / (C1 + C2) = 48V

[0092] [Main switch off operation] As described above, the ON operation charges capacitor C1 to approximately 48V, which is about equal to the power supply voltage. Therefore, when the bottom switch side MOSFET, which is the main switch, turns off, the drain current becomes 0A. However, the drain voltage starts from 0V, as the voltage at the left end of the inductive load L1 rises due to the decrease in the current of the inductive load L1, and this voltage is approximately equal to the voltage at the bottom end of capacitor C1. Capacitor C1 then discharges while regenerative current flows to the power supply side. During this operation, the top switch is in a dead time period, so the current in capacitor C1 does not flow back through the top switch side MOSFET and inductors L3, L4, and diodes D1 (D1a, D1b), thus preventing power loss. When capacitor C1 is completely discharged, the flywheel current of the inductive load L1 briefly returns to the power supply via diodes D1 (D1a, D1b), D3 (D3a, D3b), and D2 (D2a, D2b). However, immediately afterward, the voltage at node n012 reaches the source potential of the top switch side MOSFET, so the current returns to the power supply via the top switch, and the power loss in diodes D1 (D1a, D1b), D3 (D3a, D3b), and D2 (D2a, D2b) is kept small. As described above, the main switch's off operation achieves a zero-voltage (ZVS) operation, where the voltage rises only after the current becomes zero, as shown in Figure 14, thereby suppressing switching losses. The current surge C2up across capacitor C2 in Figure 14 indicates the current regenerated to the power supply side.

[0093] The losses and power conversion efficiencies associated with each of the above switching operations are as follows. Bottom switch side MOSFET power dissipation (per MOSFET): 3.9488 W Bottom-side recovery reduction Schottky diode D5 power loss = 15.25 µW Top switch side MOSFET power dissipation (per MOSFET): 3.7975 W Top-side recovery reduction Schottky diode D7 loss = 262.54 mW Load power = 3.6925 KW Power supply power = 3.7231KW Efficiency = 99.178

[0094] As a result, power loss was reduced by 63.72% compared to conventional high-speed hard-switching circuits. (Other reference values) ZCS / ZVS Circuit Component Loss M4=4 54.2mW D2a=6 99.92mW D2b=6 99.92mW D3a=7 90.63mW D3b=7 90.63mW D1a=6 89.04mW D1b=6 89.04mW L3=1 .3214W L4=1 .3376W

[0095] [Noise analysis of output voltage / input current] Figure 15 shows the FFT analysis results of the output voltage waveform. It can be seen that the inverter circuit of the fifth embodiment has a significantly lower noise peak envelope compared to that of the conventional technology. Figure 16 shows the FFT analysis results of the power supply current waveform. It can be seen that the inverter circuit of the fifth embodiment has a significantly lower noise peak envelope compared to that of the conventional technology.

[0096] [Comparison of rise / fall waveforms and power supply current waveforms between the conventional inverter circuit shown in Figure 27 and the ZCS / ZVS of the fifth embodiment] Figures 17 and 18 show the cause of the noise difference generated by the conventional inverter circuit and the ZCS / ZVS of the fifth embodiment, based on their switching waveforms. Figure 17 shows the falling edge waveforms, with the upper side representing the falling edge of the output voltage and the lower side representing the falling edge of the power supply current. In the upper side of the output voltage falling edge, the conventional inverter circuit shows a steep waveform drop, whereas the ZCS / ZVS of the fifth embodiment shows a gradual drop. In the lower side of the power supply current falling edge, the conventional inverter circuit generates a rapidly changing, spark-like recovery current. This recovery current results in power loss and is a major source of noise.

[0097] Figure 18 shows the rising waveforms, with the upper side representing the rise of the output voltage and the lower side representing the rise of the power supply current. In the rising output voltage (upper side), the conventional inverter circuit shows a steep rise in the waveform, while the ZCS / ZVS of the fifth embodiment shows a gradual rise. In the falling power supply current (lower side), the conventional inverter circuit shows a steep rise in the waveform, while the ZCS / ZVS of the fifth embodiment shows a gradual rise.

[0098] In the inverter circuit of the fifth embodiment, as described above, the switch recovery current (energy) that flows to the MOSFET on the opposite side, which acts as a flywheel switch, when the main switch is turned on is stored as current in inductors L3 and L4, and is regenerated to the power supply during the next switch-off operation, thereby improving power conversion efficiency. In addition, by storing the switch recovery current in inductors L3 and L4, noise can be reduced.

[0099] In the inverter circuit of the fifth embodiment, the energy of the inductor L1 used to turn on the MOSFET of the top switch 50 and the MOSFET of the bottom switch 60 with ZCS is stored in capacitor C1 while the MOSFETs of the top switch 50 and the bottom switch 60 are on. Then, the energy (voltage) of capacitor C1 is used to turn off the MOSFETs of the top switch 50 and the bottom switch 60 with ZVS, and while the MOSFETs of the top switch 50 and the bottom switch 60 are off, the energy of capacitor C1 is returned to the power supply side and capacitor C1 is completely discharged. In conventional ZCS and ZVS inverter circuits, the energy used for ZCS and ZVS operation is consumed as is, whereas in the inverter circuit of the fifth embodiment, the energy used for ZCS and ZVS operation is returned to the power supply side, thus achieving high efficiency.

[0100] In the embodiments described above, MOSFETs were used as examples of switching elements, but various power electronics switching elements such as SiC can be used as switching elements. Furthermore, each diode may be a known ideal diode device composed of MOSFETs.

[0101] Figure 19 is a circuit diagram showing the regenerative operation of the inverter circuit of the fifth embodiment. Automotive three-phase inverters regenerate power from the motor to charge the battery. This requires regenerative braking. Conventional ZCS and ZVS type inverter circuits suffer from a significant decrease in regenerative efficiency when performing regenerative braking because the switching on and off of the ZCS and ZVS switches cannot be properly controlled. In contrast, the inverter circuit of the fifth embodiment can perform ZCS when the MOSFET is on and ZVS when it is off, so efficiency does not decrease even during regenerative braking.

[0102] Figure 20 is a schematic diagram showing a half-bridge power module 210 configured with an inverter circuit according to the fifth embodiment. The power module 210 has a negative input terminal 112, a positive input terminal 114, and an output terminal 124. A peripheral circuit 120 and a bottom inverter switch 122 such as SiC or MOSFET are attached to the negative input terminal 112. A peripheral circuit 116 and a top inverter switch 118 are attached to the positive input terminal 112. The output terminal 124 and the bottom inverter switch 122 are connected via a bottom inductor L4 formed integrally with the output terminal. The output terminal 124 and the top inverter switch 118 are connected via a top inductor L3 formed integrally with the output terminal. The above components are molded on a substrate 130 to constitute the power module 210.

[0103] The top-side inductor L3 connected to the top inverter switch 118 and the bottom-side inductor L4 connected to the bottom inverter switch 122 are part of the metal plate constituting the output terminal 124, and consist of a pair of extending pieces 124A and 124B formed so that their extending directions are approximately perpendicular. The top-side inductor L3 constitutes inductor L3 in Figure 17, and the bottom-side inductor L4 constitutes inductor L4. Magnetic flux is generated in a spiral shape in both extending pieces 124A and 124B with respect to the extending direction, but because they are formed so that their extending directions are approximately perpendicular, the magnetic fluxes do not interfere with each other. The extending pieces 124A and 124B have a constant width and extend from both ends 124R and 124L of the metal plate constituting the output terminal 124. The length Ln of the extending pieces 124A and 124B is 7.5 mm, and they have an inductance of 5 nH.

[0104] In the fifth embodiment, the top inductor L3 and bottom inductor L4 of the power module 210 are part of the metal plate that constitutes the output terminal 124, thus allowing for an inexpensive construction while maintaining high mechanical strength and reliability.

[0105] [Example of modification of the fifth embodiment] Figure 21 is a circuit diagram of an inverter circuit according to the first modification example of the fifth embodiment. The inverter circuit according to the first modification of the fifth embodiment is for driving a three-phase motor, which, like the fifth embodiment, includes a U-phase coil LU, a V-phase coil (not shown), and a W-phase coil.

[0106] [Circuit Configuration] The U-layer inverter circuit 110U of the switching circuit according to the first modification example of the fifth embodiment comprises a half-bridge inverter having a top inverter switch 50 and a bottom inverter switch 60, a top-side auxiliary circuit 20T that performs ZVS / ZCS operation in response to a signal from the control circuit means 10 when the top inverter switch 50 is turned on or off, and a bottom-side auxiliary circuit 20B that performs ZVS / ZCS operation in response to a signal from the control circuit means 10 when the bottom inverter switch 60 is turned on or off.

[0107] [Current direction detection circuit] The current direction detection circuit 70 in Figure 21 detects the direction of the current. The current direction detection circuit 70 determines whether the load current is flowing out or into the inverter circuit based on the level of the output terminal when the bottom switch 60 is turned on. Specifically, the clock terminal CLK of flip-flop A4 is the input signal to the gate driver of the MOSFET on the bottom switch 60 side. If the output terminal connected to the data terminal D is "L" at the rising edge of the clock (the on timing of the bottom MOSFET), the current direction of the inductive load LU will be to the right in the figure, and the voltage level on the left side of the inductive load LU will be "L" to prevent the current in this direction from decreasing. In this case, the top switch side MOSFET becomes the main switch and the bottom switch side MOSFET (60) becomes the flywheel switch. Therefore, the bottom switch ZCS / ZVS circuit 20B is unnecessary, and the switch SW1 is turned off to disconnect the circuit element. (If the bottom switch ZCS / ZVS circuit 20B and the top switch ZCS / ZVS circuit 2OT are connected at the same time, unintended circuit operation will occur and losses will increase). Similarly, if the current direction of the inductive load LU is to the left, the ZCS / ZVS circuit 20T of the top-side switch is interrupted by switch SW2.

[0108] [Second modification example of the fifth embodiment] Figure 22 is a circuit diagram of an inverter circuit according to a second modification example of the fifth embodiment. The inverter circuit according to the second modification of the fifth embodiment is for driving a three-phase motor, which, like the fifth embodiment, includes a U-phase coil LU, a V-phase coil (not shown), and a W-phase coil.

[0109] [Circuit Configuration] The U-layer inverter circuit 110U of the inverter circuit according to the second modification example of the fifth embodiment comprises a half-bridge inverter having a top inverter switch 50 and a bottom inverter switch 60, a top-side auxiliary circuit 20T that performs ZVS / ZCS operation in response to a signal from the control circuit means 10 when the top inverter switch 50 is turned on or off, and a bottom-side auxiliary circuit 20B that performs ZVS / ZCS operation in response to a signal from the control circuit means 10 when the bottom inverter switch 60 is turned on or off.

[0110] [Current direction detection means] The current direction detection circuit 70 in Figure 22 detects the direction of the current. The current direction detection circuit 70 consists of a resistor R22 connected between the connection point CN of the top inductor L3 and the bottom inductor L4 and the load LU, a first comparator CPT connected to both ends of resistor R22 that generates an output when the potential on the load LU side is lower than the potential on the connection point CN side, i.e., when load current flows out to the load LU side and the voltage drop across resistor R22 causes the potential on the load LU side to be lower than the potential on the connection point CN side, and a second comparator CPB that generates an output when the potential on the load LU side is higher than the potential on the connection point CN side, i.e., when load current flows into the inverter side and the voltage drop across resistor R22 causes the potential on the load LU side to be higher than the potential on the connection point CN side. The output of the first comparator CPT (H=on) turns on switch SW2, enabling operation of the top auxiliary circuit 20T, and the off of the second comparator CPB turns off switch SW1, disabling operation of the bottom auxiliary circuit 20B.

[0111] The output of the second comparator CPB (H=on) turns on switch SW1, enabling operation of the bottom auxiliary circuit 20B, and the off state of the first comparator CPT turns off switch SW2, disabling operation of the top auxiliary circuit 20T. The inverter circuit 110 according to the second modification of the fifth embodiment can determine whether the current load is flowing out or in from the inverter circuit, detect the main switch, enable operation of the top auxiliary circuit 20T or bottom auxiliary circuit 20B on the main switch side, and disable operation of the top auxiliary circuit 20T or bottom auxiliary circuit 20B on the side that is not the main switch. The inverter circuit according to the second modification of the fifth embodiment has a simple configuration because the detection means 70 consists of a resistor R22, a first comparator CPT and a second comparator CPB.

[0112] [Sixth Embodiment] Figure 23 is a circuit diagram of the inverter circuit according to the sixth embodiment. The inverter circuit of the sixth embodiment is for driving a three-phase motor, which includes a U-phase coil LU, a V-phase coil (not shown), and a W-phase coil, similar to the fifth embodiment.

[0113] [Circuit Configuration] The U-layer inverter circuit 110U of the switching circuit according to the sixth embodiment includes a half-bridge inverter having a top inverter switch 50 and a bottom inverter switch 60, a top-side auxiliary circuit 20T that performs ZVS / ZCS operation in response to a signal from the control circuit means 10 when the top inverter switch 50 is turned on or off, and a bottom-side auxiliary circuit 20B that performs ZVS / ZCS operation in response to a signal from the control circuit means 10 when the bottom inverter switch 60 is turned on or off.

[0114] [Control circuit means] The control circuit means 10 includes a sawtooth oscillator 12 that generates a sawtooth wave with a fixed carrier frequency of 10KHz to 100KHz. U, V, and W phase control signals with a 120° phase difference are input to the control circuit means 10. The U phase control signal (U phase control input signal) is compared with a sawtooth wave by the U phase output comparator CPU, and the U phase output comparator CPU outputs a square wave with on / off duty cycle modulation corresponding to the sine wave of the U phase control signal. The square wave from the U phase output comparator CPU turns the bottom inverter switch 60 on and off via the delay means 14B, and turns the top inverter switch 50 on and off via the knot circuit NT1 and delay means 14T. The delay means 14B and delay means 14T provide a dead time between the top inverter switch 50 and the bottom inverter switch 60, preventing the top inverter switch 50 and the bottom inverter switch 60 from being turned on simultaneously. The V-phase output comparator CPV and the W-phase output comparator CPW operate similarly to the U-phase output comparator CPU described above. When increasing the motor torque, the sinusoidal amplitude of the U, V, and W-phase control signals is increased, and when increasing the motor rotation speed, the frequency of the U, V, and W-phase control signals is increased. The sinusoidal frequency of the U, V, and W-phase control signals is approximately 50Hz to 100Hz at the motor's rotation speed.

[0115] [Means of comparison] The comparison means 80 in Figure 23 detects the direction of the current. The comparison means 80 consists of a comparator CPU2 for U-phase control that compares the W-phase control input signal with the U-phase control input signal, a comparator CPV2 for V-phase control that compares the U-phase control input signal with the V-phase control input signal, and a comparator CPW2 for W-phase control that compares the V-phase control input signal with the W-phase control input signal.

[0116] Figure 24 shows the U, V, and W phase output currents and the U, V, and W phase control signals. The U, V, and W phase output currents are 180° behind the U, V, and W phase control signals. The positive amplitude of the sine wave of the U, V, and W phase output currents indicates that the output current flowing through the U phase coil LU is moving to the right (load current is flowing out to the load LU side), and the negative amplitude of the sine wave indicates that the output current flowing through the U phase coil LU is moving to the left (load current is flowing in to the inverter side). The comparator CPU2 for U phase control compares the W phase control input signal and the U phase control input signal. While the W phase control input signal (dotted line) is greater than the U phase control input signal (solid line) at the timings enclosed by the dashed lines in the figure, the amplitude of the U phase output current is on the positive side. While the amplitude of the U-phase output current is positive, the comparator CPU2 for U-phase control outputs an ON signal, turning on the switch SW2U of the top-side auxiliary circuit 20T on the main switch side of U-phase 110U. The inverted OFF signal of the ON signal, transmitted via the knot circuit NT2, turns off the switch SW1U of the bottom-side auxiliary circuit 20B. On the other hand, while the amplitude of the U-phase output current is negative, the comparator CPU2 for U-phase control outputs an OFF signal, turning off the switch SW2U of the top-side auxiliary circuit 20T on the main switch side of U-phase 110U. The inverted ON signal of the OFF signal, transmitted via the knot circuit NT2, turns on the switch SW1U of the bottom-side auxiliary circuit 20B.

[0117] Figure 25 shows the U, V, and W phase output currents and the U, V, and W phase control signals. The comparator CPU2 for V phase control compares the U phase control input signal and the V phase control input signal. At the timings enclosed by the dashed lines in the figure, the amplitude of the V phase output current is positive while the U phase control input signal (solid line) is greater than the V phase control input signal (dotted line). While the amplitude of the V phase output current is positive, the comparator CPV2 for V phase control outputs an ON signal, turning on the switch SW2V of the top auxiliary circuit 20T on the V phase 110V main switch side. The OFF signal, which is the inverted ON signal via the knot circuit NT4, turns off the switch SW1V of the bottom auxiliary circuit 20B.

[0118] Figure 26 shows the U, V, and W phase output currents and the U, V, and W phase control signals. The comparator CPW2 for W phase control compares the V phase control input signal and the W phase control input signal. At the timings enclosed by the dashed lines in the figure, the amplitude of the W phase output current is positive while the V phase control input signal (single dashed line) is greater than the W phase control input signal (double dashed line). While the amplitude of the W phase output current is positive, the comparator CPW2 for W phase control outputs an ON signal, turning on the switch SW2W of the top auxiliary circuit 20T on the main switch side of the W phase 110W. The OFF signal, which is the inverted ON signal, is sent via the knot circuit NT6 to turn off the switch SW1W of the bottom auxiliary circuit 20B.

[0119] The inverter circuit 110 of the sixth embodiment includes auxiliary circuit interruption means (switches) SW1U, SW2U that enable the operation of the top auxiliary circuit 20T or bottom auxiliary circuit 20B on the main switch side of the U-phase 110U based on the output of the comparator CPU2 for U-phase control, and disable the top auxiliary circuit or bottom auxiliary circuit on the side that is not the main switch, and the top auxiliary circuit 20T or bottom auxiliary circuit on the main switch side of the V-phase 110V based on the output of the comparator CP2 for V-phase control. The inverter circuit of the sixth embodiment can detect the main switch from the U-phase control input signal, the V-phase control input signal, and the W-phase control input signal to detect the main switch from the V-phase control input signal, and enable the main switch side top-side auxiliary circuit 2OT or bottom-side auxiliary circuit 20B, while enabling the main switch side top-side auxiliary circuit 20T or bottom-side auxiliary circuit 20B, which is not the main switch. The inverter circuit of the sixth embodiment can detect the main switch from the U-phase control input signal, the V-phase control input signal, and the W-phase control input signal to enable the main switch side top-side auxiliary circuit 2OT or bottom-side auxiliary circuit 20B, which is not the main switch, while enabling the main switch side top-side auxiliary circuit 20T or bottom-side auxiliary circuit 20B, which is not the main switch. The inverter circuit of the sixth embodiment can interrupt the auxiliary circuits without passing load current through a resistor, so there is no resistance loss and it is highly efficient.

[0120] In the embodiments described above, switches SW1, SW2, SW1U, SW2U, etc., consist of semiconductor switching elements. [Explanation of Symbols]

[0121] 10 Control circuit means 20T Top-side auxiliary circuit 20B Bottom-side auxiliary circuit 50 Top Inverter Switch 60 Bottom Inverter Switch C1 First capacitor C2 Second capacitor D1 First rectifier D2 Second rectifier D3 Third rectifier L Inductor L1 load means L3 Top Inductor L4 Bottom Inductor

Claims

1. A switching circuit that drives a load means by intermittently supplying power from a power source, wherein a soft-switching type switching circuit is used, which reduces switching losses by providing a time difference between the voltage applied to a switch means built into the switching circuit and the current flowing through the switch means, An inductor disposed between the load means and the switch means, A first rectifier means and a first capacitor are arranged in series between the switching means and the power supply or ground. A second rectifier means and a second capacitor are connected in parallel to the first rectifier means and the first capacitor, which are arranged in series, via the inductor. A switching circuit characterized by having a connection between the first rectifier means and the first capacitor, and a third rectifier means disposed between the connection between the second capacitor and the second rectifier means.

2. A switching circuit according to claim 1, The first rectifier means prevents the charge of the first capacitor from short-circuiting to the switch means. The third rectifier means prevents a short circuit of the inductor.

3. A switching circuit according to claim 2, The second rectifier means returns the charge of the second capacitor to the power supply.

4. A switching circuit according to any one of claims 1 to 3, The aforementioned loading means is a resistive load, The switching means consists of a switching element that is driven in a single-sided switching mode only.

5. A switching circuit according to any one of claims 1 to 3, The aforementioned loading means is an inductive load, Furthermore, it has a rectifier element for conducting flywheel current.

6. A switching circuit according to claim 5, The inductor is divided into two parts, one end of the inductive load is connected to the divided connection point, and the other end of the inductive load is connected to the power supply or ground. One end of the rectifier element is connected in series to the two-part inductor, and the other end of the rectifier element is connected to a power source or ground.

7. A switching circuit according to any one of claims 1 to 3, The aforementioned loading means is an inductive load, Furthermore, it has a switching element for conducting flywheel current.

8. A switching circuit according to claim 7, The inductor is divided into two parts, one end of the inductive load is connected to the divided connection point, and the other end of the inductive load is connected to the power supply or ground. One end of the switching element is connected in series to the two-part inductor, and the other end of the switching element is connected to a power source or ground.

9. An inverter circuit, A half-bridge inverter having a top inverter switch and a bottom inverter switch, The top-side auxiliary circuit performs ZVS / ZCS operation when the top inverter switch is turned on or off, When the bottom inverter switch is turned on or off, a bottom-side auxiliary circuit performs ZVS / ZCS operation, The inverter circuit further includes a top-side inductor connected between the top inverter switch and the load means, which performs ZCS operation when the top inverter switch and the bottom inverter switch are switched on, and a bottom-side inductor connected between the bottom inverter switch and the load means and also connected to the top-side inductor. The aforementioned top-side auxiliary circuit is, A first rectifier means and a first capacitor are arranged in series between the top inverter switch and the power supply or ground. A second rectifier means and a second capacitor are connected in parallel to the first rectifier means and the first capacitor, which are arranged in series, via the top-side inductor. An inverter circuit characterized by having a connection between the first rectifier means and the first capacitor, and a third rectifier means disposed between the connection between the second capacitor and the second rectifier means.

10. The inverter circuit according to claim 9 is a three-phase inverter.

11. An inverter circuit according to claim 9 or claim 10, The bottom-side auxiliary circuit is, A first rectifier means and a first capacitor are arranged in series between the bottom inverter switch and the power supply or ground. A second rectifier means and a second capacitor are connected in parallel to the first rectifier means and the first capacitor, which are arranged in series, via the bottom inductor. The device comprises a connection between the first rectifier and the first capacitor, and a third rectifier disposed between the connection between the second capacitor and the second rectifier.

12. An inverter circuit according to any one of claims 9 to 11, Furthermore, the system includes detection means for detecting which of the top inverter switch or the bottom inverter switch is the main switch, and auxiliary circuit interruption means for enabling the operation of the top-side auxiliary circuit or the bottom-side auxiliary circuit on the main switch side, and disabling the top-side auxiliary circuit or the bottom-side auxiliary circuit on the side that is not the main switch.

13. An inverter circuit according to claim 12, The device includes a flip-flop having an input terminal that constitutes the detection means and an output terminal that controls the auxiliary circuit interruption means.

14. An inverter circuit according to claim 12, The detection means, A resistor is connected between the connection point between the top inductor and the bottom inductor and the load. A pair of comparators connected to both ends of the resistor, which compare the potential on the load side of the resistor with the potential on the connection side, comprising: a first comparator that generates an output when the potential on the load side is lower than the potential on the connection side; and a second comparator that generates an output when the potential on the load side is higher than the potential on the connection side. The auxiliary circuit interruption means is The system consists of a first switch and a second switch, which, based on the outputs of the first and second comparators, enable the operation of the top-side auxiliary circuit or the bottom-side auxiliary circuit on the main switch side, and disable the top-side auxiliary circuit or the bottom-side auxiliary circuit on the side that is not the main switch.

15. An inverter circuit according to claim 10, A comparison means for comparing the U-phase control input signal, the V-phase control input signal, and the W-phase control input signal, The system includes an auxiliary circuit blocking means that enables the operation of the top-side auxiliary circuit or the bottom-side auxiliary circuit on the main switch side, and disables the top-side auxiliary circuit or the bottom-side auxiliary circuit on the side that is not the main switch, based on the comparison results of the comparison means.

16. An inverter circuit according to claim 15, The aforementioned comparison means is, A comparator for U-phase control that compares the W-phase control input signal and the U-phase control input signal, A comparator for V-phase control compares the U-phase control input signal and the V-phase control input signal, It consists of a comparator for W-phase control that compares the V-phase control input signal and the W-phase control input signal, The auxiliary circuit blocking means is A U-phase auxiliary circuit interruption means that enables the operation of the top-side auxiliary circuit or the bottom-side auxiliary circuit on the main switch side of the U-phase based on the output of the comparator for U-phase control, and disables the top-side auxiliary circuit or the bottom-side auxiliary circuit on the side that is not the main switch, A V-phase auxiliary circuit interruption means that enables the operation of the top-side auxiliary circuit or the bottom-side auxiliary circuit on the main switch side of the V-phase based on the output of the comparator for V-phase control, and disables the top-side auxiliary circuit or the bottom-side auxiliary circuit on the side that is not the main switch, The system comprises a W-phase auxiliary circuit interruption means that, based on the output of the W-phase control comparator, enables the operation of the top-side auxiliary circuit or the bottom-side auxiliary circuit on the main switch side of the W-phase, and disables the top-side auxiliary circuit or the bottom-side auxiliary circuit on the side that is not the main switch.

17. A power module comprising the inverter circuit of claim 9 and integrated into a single unit.

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