Inverter control unit, program
The multi-level inverter control system addresses the issue of concentrated load on specific switches by distributing the load across multiple switches, improving reliability and reducing switching losses in the inverter system.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-05-11
- Publication Date
- 2026-03-25
AI Technical Summary
Conventional inverters face a reliability issue where the load concentrates on specific switches, leading to potential failure and reduced system reliability.
A multi-level inverter control system that distributes the load across multiple switches by implementing a switching mode that includes H-level, L-level, and intermediate voltage levels, using a control device to manage the switching of semiconductor switches in a rotating electric machine system, ensuring balanced load distribution and reducing switching losses.
The system effectively distributes the load, preventing excessive stress on individual switches, thereby enhancing the reliability and longevity of the inverter system while maintaining torque control under thermal stress conditions.
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Abstract
Description
Technical Field
[0006] , , , ,
[0001] The present disclosure relates to a control device and a program for a multi-level inverter.
Background Art
[0002] Conventionally, a three-level inverter including two serially connected capacitors and a switch electrically connected to the capacitors and the armature winding of a rotating electric machine is known.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] In order to suppress a decrease in the reliability of the switches provided corresponding to each phase, it is desirable to suppress the occurrence of a situation where the load concentrates on a specific switch among the switches.
[0005] A main object of the present disclosure is to provide an inverter control device and a program capable of suppressing the occurrence of a situation where the load concentrates on a specific switch.
Means for Solving the Problems
[0006] The present disclosure is a switch provided corresponding to each phase, the switch being electrically connected to a plurality of power storage units connected in series and the armature winding of a rotating electric machine, and is applied to a multi-level inverter including: In an inverter control device that performs switching control of the switch so as to output any one of a plurality of voltage levels that can be output from a series connection of the plurality of power storage units, A setting unit for setting the switching mode of the inverter that satisfies predetermined conditions, A control unit that controls the switching of the switch based on the set switching mode, Equipped with, The aforementioned predetermined conditions are: At least one of the following modes is selected: an H-level mode in which the output voltage level of each phase is the highest voltage level among multiple voltage levels, and an L-level mode in which the output voltage level of each phase is the lowest voltage level among multiple voltage levels. The output voltage level of each phase is a two-level mode consisting of the set of the highest voltage level and the lowest voltage level, The condition is that the output voltage level of some of the phases is included in one control cycle in an intermediate level mode, where the output voltage level of some of the phases is the intermediate voltage level among multiple voltage levels.
[0007] According to this disclosure, the load can be distributed to switches corresponding to intermediate voltage levels, thereby suppressing situations where the load concentrates on switches corresponding to the highest and lowest voltage levels. [Brief explanation of the drawing]
[0008] [Figure 1] Overall configuration diagram of the control system according to the first embodiment. [Figure 2] Functional block diagram of the torque control process executed by the control unit. [Figure 3] A diagram showing the vector space in normal control. [Figure 4] A diagram showing the first sector in normal control. [Figure 5] A diagram illustrating the vector space in thermal dispersion control. [Figure 6] This diagram shows the switching modes used in the first sector for thermal dispersion control. [Figure 7] A diagram illustrating switching modes in thermal dispersion control. [Figure 8] A diagram illustrating switching modes in thermal dispersion control. [Figure 9]Figure showing the first sector in thermal dispersion control. [Figure 10] Figure showing the first sector in thermal dispersion control. [Figure 11] Figure showing the first sector in thermal dispersion control. [Figure 12] Flowchart showing the selection processing procedure of normal control and thermal dispersion control. [Figure 13] Flowchart showing the processing procedure of thermal dispersion control. [Figure 14] Flowchart showing the processing procedure of thermal dispersion control according to the second embodiment. [Figure 15] Figure showing the switching mode used in the first sector in thermal dispersion control according to the third embodiment. [Figure 16] Figure showing the switching mode used in the first sector in thermal dispersion control.
Mode for Carrying Out the Invention
[0009] A plurality of embodiments will be described while referring to the drawings. In the plurality of embodiments, parts that are functionally and / or structurally corresponding and / or associated may be assigned the same reference numerals, or reference numerals with different hundreds or more digits. For corresponding parts and / or associated parts, the description of other embodiments can be referred to.
[0010] <First Embodiment> Hereinafter, a first embodiment in which the control device according to the present disclosure is embodied will be described while referring to the drawings. In the present embodiment, the control device is mounted on an electric vehicle such as an electric car or a hybrid car.
[0011] As shown in Fig. 1, the in-vehicle system includes a rotating electric machine 10, a storage battery 20, and an inverter 30. The rotating electric machine 10 is the in-vehicle main machine and is capable of power transmission to drive wheels (not shown). The rotating electric machine 10 of the present embodiment is a three-phase synchronous machine and includes a U-phase winding 11U, a V-phase winding 11V, and a W-phase winding 11W that are star-connected as stator windings. Each phase winding 11U, 11V, 11W is arranged with an electrical angle shift of 120° each. The rotating electric machine 10 is, for example, a permanent magnet synchronous machine.
[0012] The storage battery 20 is electrically connected to the rotating electric machine 10 via the inverter 30. The storage battery 20 is, for example, a battery pack including a series connection of battery cells. The storage battery 20 is a rechargeable secondary battery, for example, a lithium-ion storage battery or a nickel-metal hydride storage battery.
[0013] The inverter 30 is a power conversion circuit that converts the DC power supplied from the storage battery 20 into three-phase AC power by switching control and supplies the converted AC power to the rotating electric machine 10. The system includes a first capacitor 21 and a second capacitor 22 as power storage units on the input side of the inverter 30. The first capacitor 21 and the second capacitor 22 are connected in series. The storage battery 20 is connected in parallel to the series connection of the first and second capacitors 21, 22. In the present embodiment, the capacitance of the first capacitor 21 and the capacitance of the second capacitor 22 are set to the same value. Note that the first capacitor 21 and the second capacitor 22 may be provided outside the inverter 30 or may be built into the inverter 30.
[0014] Inverter 30 is a T-type 3-level inverter and is equipped with three phases of series connections of upper arm switches SUH, SVH, SWH and lower arm switches SUL, SVL, SWL. Each switch SUH to SWL is a voltage-controlled semiconductor switching element, specifically an IGBT. In each switch SUH to SWL, the high-potential terminal is the collector and the low-potential terminal is the emitter. Each switch SUH, SVH, SWH, SUL, SVL, SWL is connected in antiparallel to freewheeling diodes DUH, DVH, DWH, DUL, DVL, DWL.
[0015] The emitter of the U-phase upper arm switch SUH is connected to the collector of the U-phase lower arm switch SUL. The connection point between the U-phase upper arm switch SUH and the U-phase lower arm switch SUL is connected to the first end of the U-phase winding 11U. The emitter of the V-phase upper arm switch SVH is connected to the collector of the V-phase lower arm switch SVL. The connection point between the V-phase upper arm switch SVH and the V-phase lower arm switch SVL is connected to the first end of the V-phase winding 11V. The emitter of the W-phase upper arm switch SWH is connected to the collector of the W-phase lower arm switch SWL. The connection point between the W-phase upper arm switch SWH and the W-phase lower arm switch SWL is connected to the first end of the W-phase winding 11W. The second ends of each phase winding 11U, 11V, and 11W are connected to each other at the neutral point.
[0016] The collectors of each upper arm switch SUH to SWH are connected by a positive busbar 31, which is a conductive material such as a busbar. The positive busbar 31 is connected to the positive terminal of the battery 20 and the first terminal of the first capacitor 21. The second terminal of the first capacitor 21 is connected to the first terminal of the second capacitor 22 via the capacitor neutral point O. The emitters of each lower arm switch SUL to SWL are connected by a negative busbar 32, which is a conductive material such as a busbar. The negative busbar 32 is connected to the negative terminal of the battery 20 and the second terminal of the second capacitor 22.
[0017] The inverter 30 is equipped with middle switches QU, QV, and QW that conduct and interrupt current in both directions. Each of the middle switches QU to QW in this embodiment is a voltage-controlled semiconductor switching element, specifically an IGBT. Freewheeling diodes DU, DV, and DW are connected in antiparallel to each of the middle switches QU to QW.
[0018] Specifically, using the U-phase as an example, the two switches constituting the U-phase middle switch QU have their emitters connected to each other. Of the switches constituting the U-phase middle switch QU, one collector is connected to the connection point between the U-phase upper arm switch SUH and the U-phase lower arm switch SUL, and the other collector is connected to the capacitor neutral point O. The U, V, and W-phase middle switches QU to QW allow bidirectional current flow when they are ON and block bidirectional current flow when they are OFF. The U, V, and W-phase middle switches QU to QW may be configured with their collectors connected to each other. Reverse blocking IGBTs (RB-IGBTs) may be used as the U, V, and W-phase middle switches QU to QW.
[0019] The motor control system includes a first voltage sensor 41, a second voltage sensor 42, a phase current sensor 43, and a rotation angle sensor 44. The first voltage sensor 41 detects the terminal voltage of the first capacitor 21. The second voltage sensor 42 detects the terminal voltage of the second capacitor 22. The phase current sensor 43 detects the U, V, and W phase currents flowing through each phase winding 11U, 11V, and 11W. Note that the phase current sensor 43 only needs to be able to detect the current of at least two of the three phases. The rotation angle sensor 44 is, for example, a resolver and detects the electrical angle of the rotating electric machine 10.
[0020] The temperature sensor 45 detects at least one of the following: the temperature of the cooling water that cools the inverter 30, and the temperature of the inverter 30. The detected values from each of the sensors 41 to 45 are input to the control device 50 of the system.
[0021] The control device 50 is an electronic control unit (ECC) mainly composed of a microcontroller 51. The microcontroller 51 is equipped with a CPU (Central Processing Unit). The functions provided by the microcontroller 51 can be provided by software recorded in a physical memory device and the computer that executes it, by software only, by hardware only, or by a combination thereof. For example, when the microcontroller 51 is provided by electronic circuits which are hardware, it can be provided by digital circuits including a large number of logic circuits, or by analog circuits. For example, the microcontroller 51 executes a program stored in a non-transitory tangible storage medium which serves as its own storage unit. The program includes, for example, a processing program as shown in Figure 12, which will be described later. The method corresponding to the program is executed by executing a set of instructions that constitute the program. The storage unit is, for example, non-volatile memory. The program stored in the storage unit can be updated via a communication network such as the Internet, for example, OTA (Over The Air).
[0022] The control device 50 controls the control variable of the rotating electric machine 10 to a command value, and performs switching control of each switch SUH~SWL, QU~QW of the inverter 30. The switching control of the control device 50 will be explained using Figure 2. In the example shown in Figure 2, current feedback control is performed in the switching control. The control variable is the torque of the rotating electric machine 10, and the command value is the command torque Trq* input from the higher-level control device.
[0023] In the control device 50, the command current setting unit 60 sets the d,q axis command currents Id* and Iq* based on the command torque Trq*. For example, the command current setting unit 60 may set the d,q axis command currents Id* and Iq* based on map information or mathematical formula information relating the command torque Trq* and the d,q axis command currents Id* and Iq*.
[0024] The two-phase conversion unit 61 converts the U, V, and W phase currents in the three-phase fixed coordinate system into the d-axis current Idr and q-axis current Iqr in the two-phase rotating coordinate system (dq coordinate system) based on the detected values of the phase current sensor 43 and the electrical angle θe detected by the rotation angle sensor 44.
[0025] The d-axis deviation calculation unit 62a calculates the d-axis current deviation ΔId by subtracting the d-axis current Idr from the d-axis command current Id*. The q-axis deviation calculation unit 62b calculates the q-axis current deviation ΔIq by subtracting the q-axis current Iqr from the q-axis command current Iq*.
[0026] The d-axis command voltage calculation unit 63a calculates the d-axis command voltage Vd as an manipulated variable for feedback control of the d-axis current Idr to the d-axis command current Id* based on the d-axis current deviation ΔId. The q-axis command voltage calculation unit 63b calculates the q-axis command voltage Vq as an manipulated variable for feedback control of the q-axis current Iqr to the q-axis command current Iq* based on the q-axis current deviation ΔIq. The feedback control used in the d-axis command voltage calculation unit 63a and the q-axis command voltage calculation unit 63b may be, for example, proportional-integral control.
[0027] The fixed coordinate transformation unit 64 converts the d,q axis command voltages Vd,Vq in the two-phase rotating coordinate system to the α,β axis command voltages Vα,Vβ in the two-phase fixed coordinate system, based on the d,q axis command voltages Vd,Vq and electrical angle θe output from the d,q axis command voltage calculation units 63a,63b.
[0028] The modulation unit 65 calculates a command voltage vector Vαβ determined by the α and β axis command voltages Vα and Vβ. The command voltage vector Vαβ is a voltage vector used to control the control variable of the rotating electric machine 10 to a command value.
[0029] The modulation unit 65 performs normal control when it determines that specific execution conditions are not met, and performs thermal dispersion control when it determines that the execution conditions are met. The execution conditions are conditions for determining whether the inverter 30 is in a thermally critical situation. By switching from normal control to thermal dispersion control in a thermally critical situation, the switching control of the inverter 30 is continued as much as possible, and consequently, the vehicle can continue running as much as possible.
[0030] First, let's explain normal control.
[0031] The modulation unit 65 identifies the sector in the vector space where the tip of the command voltage vector Vαβ extending from the origin exists. The sector divides the vector space in which the command voltage vector Vαβ can exist into six parts based on the deflection angle of the command voltage vector Vαβ. The deflection angle of the command voltage vector Vαβ is the angle between the command voltage vector Vαβ and the U-phase axis, specifically the electrical angle θe. The sign of the electrical angle θe is positive when it is counterclockwise. Figure 3 shows the first to sixth sectors that divide the vector space into six parts. In the vector space, the axes of the U, V, and W phases are offset by 120° in electrical angle. Each sector is a region sandwiched between the axes of two phases that have an electrical angle difference of 60 degrees from each other. In Figure 3, the area showing the first sector is marked with dot hatching.
[0032] The first to sixth sectors are further divided into four regions. Specifically, the first endpoint of a sector is defined as the endpoint on the first axis L1, which has a smaller deflection angle than the two phase axes that demarcate each sector, and the second endpoint is defined as the endpoint on the second axis L2, which has a larger deflection angle. Furthermore, the midpoint between the origin and the first endpoint of the vector space is defined as the first midpoint, the midpoint between the origin and the second endpoint is defined as the second midpoint, and the midpoint between the first and second endpoints is defined as the intermediate endpoint. In this case, the first region R1 is the region enclosed by the triangle with the origin, the first midpoint, and the second midpoint as its vertices. The second region R2 is the region enclosed by the triangle with the first midpoint, the second midpoint, and the intermediate endpoint as its vertices. The third region R3 is the region enclosed by the triangle with the second endpoint, the second midpoint, and the intermediate endpoint as its vertices. The fourth region R4 is the area enclosed by the triangles whose vertices are the first endpoint, the first midpoint, and the midpoint endpoint. Figure 4 shows the first to fourth regions R1 to R4, using the first sector as an example. In the first sector, the first endpoint is "HLL", the second endpoint is "HHL", the first midpoint is "MLL", the second midpoint is "HHM", and the midpoint endpoint is "HML".
[0033] The meaning of the symbols "HML" and others mentioned above will be explained below. The operating state of each switch SUH~SWL, QU~QW is represented by the output voltage level of each phase, and the output voltage level of each phase is represented by three voltage levels H, M, and L. The phase voltage at level H is the voltage output when the upper arm switch is turned on and the lower arm switch and middle switch are turned off in the target phase. The phase voltage at level M is the voltage output when the middle switch is turned on and the upper and lower arm switches are turned off in the target phase. The phase voltage at level L is the voltage output when the lower arm switch is turned on and the upper arm switch and middle switch are turned off in the target phase.
[0034] For example, "HML" indicates a mode where the U-phase voltage is at the highest voltage level H, the V-phase voltage is at the intermediate voltage level M, and the W-phase voltage is at the lowest voltage level L. In "HML" mode, the U-phase upper arm switch SUH, the V-phase middle switch QV, and the W-phase lower arm switch SWL are turned on, while the V and W-phase upper arm switches SVH and SWH, the U and W-phase middle switches QU and QW, and the U and V-phase lower arm switches SUL and SVL are turned off.
[0035] Furthermore, assuming the voltage of battery 20 is Vdc and the potential of the capacitor neutral point O is the reference potential (0V), the phase voltage at level H is "Vdc / 2", the phase voltage at level M is "0", and the phase voltage at level L is "-Vdc / 2".
[0036] "HHH" corresponds to the H-level mode where the output voltage level of all three phases is H, "LLL" corresponds to the L-level mode where the output voltage level of all three phases is L, and "MMM" corresponds to the M-level mode where the output voltage level of all three phases is at an intermediate voltage level.
[0037] Returning to the explanation of Figure 2 above, the modulation unit 65 identifies the sector where the tip of the command voltage vector Vαβ is located based on the electrical angle θe. For example, the modulation unit 65 identifies that the tip of the command voltage vector Vαβ is located in the first sector when 0° ≤ θe < 60°.
[0038] The modulation unit 65 identifies a sub-region among the first to fourth regions constituting the identified sector, which is the region where the tip of the command voltage vector Vαβ is located, based on the magnitude of the command voltage vector Vαβ and the sector-internal angle α. The sector-internal angle α is the angle between the command voltage vector Vαβ and the first axis L1 extending from the origin to the first endpoint within the target sector.
[0039] The modulation unit 65 selects a group of output voltage levels to be used in one control period based on the identified sector and the sub-region within that sector. The group is a group of output voltage levels corresponding to the three vertices that make up the sub-region. Hereinafter, as shown in FIG. 4, the case where the tip of the command voltage vector Vαβ exists in the first region of the first sector will be described as an example.
[0040] The modulation unit 65 decomposes the command voltage vector Vαβ into a first voltage vector Vt1 along the first axis L1 and a second voltage vector Vt2 along the second axis L2. The first voltage vector Vt1 is a vector obtained by multiplying a voltage vector determined from "MLL" or "HMM" by ta (0 < ta < 1). The second voltage vector Vt2 is a vector obtained by multiplying a voltage vector determined from "MML" or "HHM" by tb (0 < tb < 1). The modulation unit 65 sets the appearance period of "MLL" or "HMM" to ta × TS and the appearance period of "MML" or "HHM" to tb × TS in one control period. The modulation unit sets the period obtained by subtracting "ta × TS" and "tb × TS" from the length TS of one control period (= TS - ta × TS - tb × TS) as the appearance period of "HHH", "MMM" or "LLL". Note that a period twice the length TS of one control period corresponds to one switching period Tsw of each switch SUH~SWL, QU~QW.
[0041] The modulation unit 65 performs switching control of each switch SUH~SWL, QU~QW so that the modes set in the above-described manner appear sequentially in one control period. Thereby, the torque of the rotating electrical machine 10 is controlled to the command torque Trq*.
[0042] Subsequently, the thermal dispersion control will be described.
[0043] The modulation unit 65 identifies in which sector among the six sectors the tip of the command voltage vector Vαβ exists based on the electrical angle θe.
[0044] The modulation unit 65 sets the switching mode to be used in each control cycle based on the identified sector. Specifically, the modulation unit 65 sets a switching mode that includes seven modes, consisting of the H-level mode, L-level mode, and the 1st to 5th modes.
[0045] The first mode is a mode in which the output voltage levels of two of the three phases are in the H level mode and the output voltage level of one phase is in the M level mode. If the identified sector is the first sector, the first mode is "HHM" as shown in Figures 5 and 6.
[0046] The second mode is a mode in which the output voltage levels of two of the three phases are at the high level and the output voltage level of one phase is at the low level. If the identified sector is the first sector, the second mode is "HHL".
[0047] The third mode is a mode in which, among the three phases, the output voltage level of one phase is at the H level, the output voltage level of one phase is at the M level, and the output voltage level of one phase is at the L level. If the identified sector is the first sector, the third mode is "HML".
[0048] The fourth mode is a mode in which the output voltage level of one of the three phases is at the H level and the output voltage levels of the other two phases are at the L level. If the identified sector is the first sector, the fourth mode is "HLL".
[0049] The fifth mode is a mode in which the output voltage level of one of the three phases is at the M level and the output voltage levels of the other two phases are at the L level. If the specified sector is the first sector, the fifth mode is "MLL". The first, third, and fifth modes correspond to "intermediate level modes", and the second and fourth modes correspond to "two-level modes".
[0050] The modulation unit 65 sets a switching mode in which one of the H-level mode and L-level mode is the first mode in one control cycle and the other is the last mode in one control cycle, and the 1st to 5th modes appear between the H-level mode and L-level mode in one control cycle.
[0051] The modulation unit 65 sets the switching mode by imposing the condition that, when switching the output voltage level in each control cycle, only the output voltage level of one of the three phases is switched. This setting is intended to reduce switching losses by prohibiting simultaneous switching of two or more phases, thereby reducing the total number of switching cycles per control cycle. Here, in order to produce seven modes in one control cycle while imposing this condition, the modulation unit 65 prohibits the use of the M-level mode "MMM". The following explanation will use the case where the identified sector is the first sector as an example.
[0052] The modulation unit 65 sets the switching mode in the following sequence for one control cycle, as shown in Figures 6 to 8: "HHH" → "HHM" → "HHL" → "HML" → "HLL" → "MLL" → "LLL". The modulation unit 65 then sets the switching mode in the following sequence for the next control cycle, as shown in Figures 6 to 8: "LLL" → "MLL" → "HLL" → "HML" → "HHL" → "HHM" → "HHH". The use of "HHM", "HML", and "MLL" allows for a longer period of current flow to the middle switch in one control cycle. This helps to prevent situations where load is concentrated on specific upper and lower arm switches.
[0053] The modulation unit 65 sets the occurrence rate τcm for "HHL" and the occurrence rate τam for "HLL". The occurrence rate is the ratio of the relative occurrence period of each mode (HHL, etc.) to the length of one control cycle TS. For example, "τcm × TS" is the occurrence period of "HHL" in one control cycle.
[0054] Specifically, first, the modulation unit 65 decomposes the command voltage vector Vαβ into a first voltage vector "ka × Vam" (see FIG. 9) along the first axis L1 and a second voltage vector "kc × Vcm" (see FIG. 10) along the second axis L2. The first voltage vector "ka × Vam" is a vector obtained by multiplying the voltage vector Vam determined from "HLL" in the fourth mode by a first coefficient ka (0 < ka < 1). The second voltage vector Vcm is a vector obtained by multiplying the voltage vector Vcm determined from "HHL" in the second mode by a second coefficient kc (0 < kc < 1).
[0055] The modulation unit 65 sets the occurrence ratio τam of "HLL" based on the following equation (eq1). In the following equation (eq1), τas is the occurrence ratio of "MLL", and τbs is the occurrence ratio of "HML".
[0056]
Number
[0057] The subtraction of the second term from the first term on the right side of the above equation (eq1) is to suppress the occurrence of a situation where the torque of the rotating electrical machine 10 exceeds the command torque Trq*. Specifically, "HHM", "HML", and "MLL" including the M level are used to suppress the occurrence of a situation where the load concentrates on specific upper and lower arm switches. By subtracting the influence of "HHM", "HML", and "MLL", it is possible to suppress the torque from exceeding the command torque Trq*.
[0058] The modulation unit 65 sets the occurrence ratio τcm of "HHL" based on the following equation (eq2). In the following equation (eq2), τcs is the occurrence ratio of "HHM".
[0059]
Number
[0060] The reason why the second term is subtracted from the first term on the right-hand side of equation (eq2) above is, as described above, to suppress the occurrence of a situation where the torque of the rotating electric machine 10 exceeds the commanded torque Trq*.
[0061] The modulation unit 65 calculates the total occurrence ratio τbm of "HHH" and "LLL" in one control cycle based on the following equation (eq3).
[0062]
number
[0063] The modulation unit 65 sets the occurrence rate of "HHM" τcs, the occurrence rate of "HML" τbs, and the occurrence rate of "MLL" τas to satisfy the following two conditions. These two conditions are intended to suppress the occurrence of a situation in which the torque of the rotating electric machine 10 exceeds the command torque Trq*.
[0064] The first condition is that the value obtained by multiplying the total occurrence ratio of "MLL" and "HML" in one control cycle, "τas + τbs", by the magnitude |Vas| of the voltage vector Vas of "MLL", is less than or equal to the value obtained by multiplying the occurrence ratio of "HLL", τam, by the magnitude |Vam| of the voltage vector Vam of "HLL". The first condition is expressed by the following equation (eq4).
[0065]
number
[0066] The second condition is that the value obtained by multiplying the total occurrence period "τcs+τbs" of "HHM" and "HML" in one control cycle by the magnitude |Vcs| of the voltage vector Vcs of "HHM" is less than or equal to the value obtained by multiplying the occurrence rate τcm of "HHL" by the magnitude |Vcm| of the voltage vector Vcm of "HHL". The second condition is expressed by the following equation (eq5).
[0067]
number
[0068] If the identified sector is, for example, the third sector, then the first mode is "MHH", the second mode is "LHH", the third mode is "LHM", the fourth mode is "LHL", and the fifth mode is "LML" (see Figure 5). The modulation unit 65 sets the switching modes in one control cycle to be "HHH" → "MHH" → "LHH" → "LHM" → "LHL" → "LML" → "LLL". The modulation unit 65 sets the switching modes in the next control cycle to be "LLL" → "LML" → "LHL" → "LHM" → "LHH" → "MHH" → "HHH".
[0069] The modulation unit 65 actually sets a dead time period that is much shorter than each of "τas×TS, τbs×TS, τcs×TS" between temporally adjacent modes. However, in this embodiment, for the sake of explanation, the dead time period is ignored.
[0070] Figure 12 shows the procedure for selecting between normal control and thermal dispersion control performed by the modulation unit 65. In step S10, it is determined whether or not the conditions for performing thermal dispersion control are met. The conditions for performing thermal dispersion control are those that allow it to be determined that the inverter 30 is in an overheated state. For example, the conditions for performing thermal dispersion control are those in which the determination parameter value exceeds a threshold. The determination parameter value is a value calculated based on, for example, the command torque Trq*, the rotor rotation speed calculated based on the electrical angle θe, and the detected value of the temperature sensor 45.
[0071] If it is determined in step S10 that the execution conditions are not met, the process proceeds to step S11 and normal control is performed. On the other hand, if it is determined in the step that the execution conditions are met, the process proceeds to step S12 and heat dispersion control is performed.
[0072] Figure 13 shows the procedure for controlling thermal dispersion.
[0073] In step S20, based on the electrical angle θe, it is determined which of the six sectors contains the tip of the command voltage vector Vαβ.
[0074] In step S21, based on the identified sector, the switching mode to be used in one control cycle is set in the manner described above. In this embodiment, the process in step S21 corresponds to the "setting unit".
[0075] In step S22, switching control is performed on each switch SUH~SWL, QU~QW so that the modes constituting the set switching mode appear sequentially in one control cycle. In this embodiment, the processing in step S22 corresponds to the "control unit".
[0076] According to the thermal dispersion control described above, even when the inverter 30 is under severe thermal conditions, the switching control of the inverter 30, which controls the torque of the rotating electric machine 10 to the commanded torque Trq*, can be continued as much as possible.
[0077] <Second Embodiment> The second embodiment will be described below, focusing on the differences from the first embodiment, with reference to the drawings. In this embodiment, a process to suppress voltage fluctuations at the capacitor neutral point O is added to the heat dispersion control. In this embodiment as well, the case where the identified sector is the first sector will be used as an example.
[0078] Figure 14 shows the procedure for controlling thermal dispersion.
[0079] In step S23, in addition to the processing in step S21 of the first embodiment, adjustment processing is performed on the occurrence ratio τas of "MLL", the occurrence ratio τbs of "HML", and the occurrence ratio τcs of "HHM".
[0080] First, the voltage difference ΔV is calculated, which is the difference between the first voltage V1r, which is the voltage detected by the first voltage sensor 41, and the second voltage V2r, which is the voltage detected by the second voltage sensor 42. Then, it is determined whether the magnitude of the calculated voltage difference ΔV exceeds a threshold.
[0081] If the magnitude of the voltage difference ΔV is determined to be below the threshold, no adjustment process is performed. On the other hand, if the magnitude of the voltage difference ΔV is determined to be above the threshold, the adjustment process is performed.
[0082] The adjustment process involves adjusting the occurrence ratios τas, τbs, and τcs so that the magnitude of the voltage difference ΔV is less than or equal to the judgment threshold. Specifically, it involves adjusting the occurrence ratios τas, τbs, and τcs so that the magnitude of the voltage difference ΔV approaches zero.
[0083] If it is determined that the amount of charge Q2 of the second capacitor 22, calculated based on the second voltage V2r, is less than the amount of charge Q1 of the first capacitor 21, calculated based on the first voltage V1r, the occurrence ratios τas, τbs, and τcs are adjusted among "MLL", "HML", and "HHM" to increase the occurrence ratio of modes that charge the second capacitor 22 and decrease the occurrence ratio of modes that discharge the second capacitor 22. In this adjustment, "τas + τbs + τcs" is kept unchanged before and after the adjustment.
[0084] Let's explain using the example where the current flowing through the W-phase winding 11W is the largest among the U, V, and W-phase windings 11U, 11V, and 11W, and the current flows through the W-phase winding 11W from the neutral point side towards the inverter 30 side. In this case, "HHM" is the mode for charging the second capacitor 22, and "HML" and "MLL" are the modes for discharging the second capacitor 22. For this reason, the frequency of occurrence τcs for "HHM" is increased, and the frequency of occurrence τbs and τas for "HML" and "MLL" are shortened.
[0085] On the other hand, if it is determined that the amount of charge Q1 in the first capacitor 21 is less than the amount of charge Q2 in the second capacitor 22, the occurrence ratios τas, τbs, and τcs are adjusted so that the occurrence ratio of the mode that charges the first capacitor 21 is increased and the occurrence ratio of the mode that discharges from the first capacitor 21 is decreased among the modes "MLL", "HML", and "HHM".
[0086] As described above, this embodiment makes it possible to suppress voltage fluctuations at the capacitor neutral point O, thereby improving the torque controllability of the rotating electric machine 10 in thermal dispersion control.
[0087] <Third Embodiment> The third embodiment will be described below, focusing on the differences from the first embodiment, with reference to the drawings. In this embodiment, the method for setting the switching mode in thermal dispersion control has been changed. In this embodiment as well, the case where the identified sector is the first sector will be used as an example.
[0088] The modulation unit 65 sets the switching mode for the first of two temporally adjacent control cycles as shown in Figure 15: "HHH" (corresponding to the "first zero vector mode") → "HHM" → "HHL" → "HML" → "HLL" → "MLL". The modulation unit 65 then sets the switching mode for the next control cycle as shown in Figure 16: "LLL" (corresponding to the "second zero vector mode") → "MLL" → "HLL" → "HML" → "HHL" → "HHM".
[0089] In this embodiment, the modulation unit 65 sets the frequency of "HHH" occurrences in the first control cycle to "τbm" instead of "τbm / 2", and sets the frequency of "LLL" occurrences in the next control cycle to "τbm" instead of "τbm / 2".
[0090] According to the embodiment described above, the same effects as those of the first embodiment can be obtained.
[0091] <Other Embodiments> Furthermore, each of the above embodiments may be implemented with the following modifications.
[0092] In the third embodiment, the adjustment process may be performed in the same manner as in the second embodiment.
[0093] • The multi-level inverter is not limited to a 3-level inverter; it may also be an inverter with 4 or more levels.
[0094] The modulation unit 65 may be set to a switching mode that includes the M level mode.
[0095] The semiconductor switches constituting the inverter are not limited to IGBTs; for example, N-channel MOSFETs may also be used. In this case, the high-potential terminal of the switch is the drain, and the low-potential terminal is the source. Each switch also has a body diode.
[0096] The inverter is not limited to the inverter shown in Figure 1; other inverters, such as a neutral point clamp type, may also be used.
[0097] The energy storage unit connected to the inverter is not limited to a capacitor; it may also be a rechargeable battery (for example, a small-capacity battery).
[0098] • The rotating electric machine is not limited to those in which the windings of each phase are connected in a star configuration; they may also be connected in a delta configuration.
[0099] The inverter, rotating electric machine, and control device are not limited to being mounted on vehicles; they may also be mounted on other moving objects such as aircraft or ships. If the moving object is an aircraft, the rotating electric machine will be the aircraft's power source for flight; if the moving object is a ship, the rotating electric machine will be the ship's power source for navigation. Furthermore, the inverter, rotating electric machine, and control device are not limited to being mounted on moving objects.
[0100] The control devices and methods described herein may be implemented by a dedicated computer provided by configuring a processor and memory programmed to perform one or more functions embodied by a computer program. Alternatively, the control devices and methods described herein may be implemented by a dedicated computer provided by configuring a processor by one or more dedicated hardware logic circuits. Alternatively, the control devices and methods described herein may be implemented by one or more dedicated computers configured by a combination of a processor and memory programmed to perform one or more functions and a processor configured by one or more hardware logic circuits. Furthermore, the computer program may be stored as instructions executed by the computer on a computer-readable non-transitional tangible recording medium.
[0101] The following describes the characteristic configurations extracted from each of the embodiments described above. [Configuration 1] This invention relates to a multi-level inverter (30) that includes switches provided for each phase, which are electrically connected to a plurality of series-connected energy storage units (21, 22) and to the armature windings (11U~11W) of a rotating electric machine (10), and includes switches (SUH~SWL, QU~QW). In an inverter control device (50) that controls the switching of the switch to output one of the multiple voltage levels that can be output from the series connection of the multiple energy storage units, A setting unit for setting the switching mode of the inverter that satisfies predetermined conditions, A control unit that controls the switching of the switch based on the set switching mode, Equipped with, The aforementioned predetermined conditions are: At least one of the following modes is selected: H-level mode (HHH), where the output voltage level of each phase is the highest voltage level among multiple voltage levels, and L-level mode (LLL), where the output voltage level of each phase is the lowest voltage level among multiple voltage levels. The output voltage level of each phase is a two-level mode (HHL, HLL) consisting of the set of the highest voltage level and the lowest voltage level, An inverter control device, provided that the output voltage level of some of the phases is included in one control cycle (TS) in an intermediate level mode (HHM, HML, MLL) where the output voltage level is an intermediate voltage level among multiple voltage levels. [Configuration 2] The aforementioned predetermined condition is the first condition, The setting unit sets the switching mode that satisfies the first condition, the second condition, and the third condition, The first condition is that the H-level mode, the L-level mode, the 2-level mode, and the intermediate-level mode are included in one control cycle, and the M-level mode (MMM), in which the output voltage level of each phase is the intermediate voltage level, is not included in one control cycle. The second condition is that, of the H-level mode and the L-level mode, one is the first mode in one control cycle and the other is the last mode in one control cycle, and the 2-level mode and the intermediate-level mode appear between the H-level mode and the L-level mode in one control cycle. The inverter control device according to Configuration 1, wherein the third condition is that when switching the output voltage level, only the output voltage level of one of the phases is switched. [Configuration 3] The aforementioned inverter is a 3-level inverter, The H-level mode is a mode in which the output voltage level of the three phases becomes the maximum voltage level. The L-level mode is a mode in which the output voltage level of the three phases becomes the lowest voltage level. The aforementioned M-level mode is a mode in which the output voltage level of the three phases becomes the intermediate voltage level. The aforementioned two-level mode and the aforementioned intermediate level mode are, In the first mode (HHM), the output voltage levels of two of the three phases become the maximum voltage level, and the output voltage level of one phase becomes the intermediate voltage level. In the second mode (HHL), the output voltage levels of two of the three phases become the highest voltage level, and the output voltage level of one phase becomes the lowest voltage level. In the third mode (HML), the output voltage level of one phase becomes the highest voltage level, the output voltage level of one phase becomes the intermediate voltage level, and the output voltage level of one phase becomes the lowest voltage level. In the fourth mode (HLL), the output voltage level of one of the three phases becomes the highest voltage level, and the output voltage levels of the other two phases become the lowest voltage level. The inverter control device according to configuration 2, wherein a fifth mode (MLL) is in which the output voltage level of one of the three phases becomes the intermediate voltage level and the output voltage levels of the other two phases become the lowest voltage level. [Structure 4] The inverter control device according to configuration 3, wherein the setting unit sets the appearance period of each of the first mode, third mode, and fifth mode in one control cycle to a period of less than 1 / 3 of the length of one control cycle. [Composition 5] The setting unit is, The condition is that the value obtained by multiplying the total occurrence period of the fifth mode (MLL) and the third mode (HML) in one control cycle by the magnitude of the voltage vector of the fifth mode (|Vas|) is less than or equal to the value obtained by multiplying the occurrence period of the fourth mode (HLL) in one control cycle by the magnitude of the voltage vector of the fourth mode (|Vam|), The condition is that the value obtained by multiplying the total occurrence period of the first mode (HHM) and the third mode (HML) in one control cycle by the magnitude of the voltage vector of the first mode (|Vcs|) is less than or equal to the value obtained by multiplying the occurrence period of the second mode (HHL) in one control cycle by the magnitude of the voltage vector of the second mode (|Vcm|), The inverter control device according to configuration 4, wherein the appearance period in one control cycle of each of the first to fifth modes is set to satisfy the condition. [Composition 6] The inverter control device according to configuration 5, wherein the setting unit sets the total occurrence period of the H-level mode and the L-level mode in one control cycle to a period obtained by subtracting the total occurrence period of the first to fifth modes in one control cycle from the length of one control cycle. [Composition 7] The aforementioned predetermined condition is the first condition, The setting unit sets the switching mode that satisfies the first condition, the second condition, and the third condition, Of the H-level mode and the L-level mode, one is designated as the first zero-vector mode, and the other as the second zero-vector mode. The first condition is, The conditions are that, of two temporally adjacent control cycles, the first control cycle includes the first zero-vector mode, the two-level mode, and the intermediate-level mode, and the next control cycle includes the second zero-vector mode, the two-level mode, and the intermediate-level mode, and that the M-level mode (MMM) in which the output voltage level of each phase is the intermediate voltage level is not included in one control cycle. The second condition is that the first mode in the first control cycle is the first zero-vector mode, the last mode in the first control cycle is the intermediate-level mode, the first mode in the next control cycle is the second zero-vector mode, and the last mode in the next control cycle is the intermediate-level mode. The inverter control device according to Configuration 1, wherein the third condition is that when switching the output voltage level, only the output voltage level of one of the phases is switched. [Structure 8] The aforementioned inverter is a 3-level inverter, The H-level mode is a mode in which the output voltage level of the three phases becomes the maximum voltage level. The L-level mode is a mode in which the output voltage level of the three phases becomes the lowest voltage level. The aforementioned M-level mode is a mode in which the output voltage level of the three phases becomes the intermediate voltage level. The aforementioned two-level mode and the aforementioned intermediate level mode are, In the first mode (HHM), the output voltage levels of two of the three phases become the maximum voltage level, and the output voltage level of one phase becomes the intermediate voltage level. In the second mode (HHL), the output voltage levels of two of the three phases become the highest voltage level, and the output voltage level of one phase becomes the lowest voltage level. In the third mode (HML), the output voltage level of one phase becomes the highest voltage level, the output voltage level of one phase becomes the intermediate voltage level, and the output voltage level of one phase becomes the lowest voltage level. In the fourth mode (HLL), the output voltage level of one of the three phases becomes the highest voltage level, and the output voltage levels of the other two phases become the lowest voltage level. The inverter control device according to configuration 7, wherein a fifth mode (MLL) is in which the output voltage level of one of the three phases becomes the intermediate voltage level and the output voltage levels of the other two phases become the lowest voltage level. [Composition 9] The inverter control device according to configuration 8, wherein the setting unit sets the appearance period of each of the first mode, third mode, and fifth mode in one control cycle to a period of less than 1 / 3 of the length of one control cycle. [Configuration 10] The setting unit is, The condition is that the value obtained by multiplying the total occurrence period of the fifth mode (MLL) and the third mode (HML) in one control cycle by the magnitude of the voltage vector of the fifth mode (|Vas|) is less than or equal to the value obtained by multiplying the occurrence period of the fourth mode (HLL) in one control cycle by the magnitude of the voltage vector of the fourth mode (|Vam|), The condition is that the value obtained by multiplying the total occurrence period of the first mode (HHM) and the third mode (HML) in one control cycle by the magnitude of the voltage vector of the first mode (|Vcs|) is less than or equal to the value obtained by multiplying the occurrence period of the second mode (HHL) in one control cycle by the magnitude of the voltage vector of the second mode (|Vcm|), The inverter control device according to configuration 9, wherein the appearance period in one control cycle of each of the first to fifth modes is set to satisfy the condition. [Composition 11] The setting unit is, The appearance period of the first zero-vector mode in the first control cycle is set to the length of one control cycle minus the total appearance period of the first to fifth modes. The inverter control device according to configuration 10, wherein the appearance period of the second zero vector mode in the next control cycle is set to a period obtained by subtracting the total appearance period of the first to fifth modes from the length of one control cycle. [Composition 12] The setting unit is, Determine whether the voltage difference between the two energy storage units exceeds a threshold. An inverter control device according to any one of configurations 3 to 6, 8 to 11, wherein if it is determined that the voltage difference exceeds the threshold, the occurrence period in one control cycle of each of the first, third, and fifth modes is adjusted so that the voltage difference becomes less than or equal to the threshold. [Composition 13] The setting unit is, Determine whether the inverter is in an overheated state. An inverter control device according to any one of configurations 2 to 12, which sets the switching mode that satisfies the first condition, the second condition, and the third condition, on the condition that the inverter is determined to be in an overheated state. [Composition 14] The inverter, as the switch, Upper and lower arm switches (SUH~SWL) are provided for each phase, Middle switches (QU~QW) are provided for each phase, Equipped with, The H-level mode is a mode in which only the three-phase upper arm switch is turned on among the three-phase upper and lower arm switches and the middle switch. The L-level mode is a mode in which only the three-phase lower arm switch is turned on among the three-phase upper and lower arm switches and the middle switch. The aforementioned M-level mode is a mode in which only the three-phase middle switch is turned on among the three-phase upper and lower arm switches and the middle switch. The first mode is a mode in which only two phases of the upper arm switch and the remaining one phase of the middle switch are turned on, out of the three phases of the upper and lower arm switches and the middle switch. The second mode is a mode in which two phases of the upper arm switch and the remaining one phase of the lower arm switch are turned on, out of the three phases of the upper and lower arm switches and the middle switch. The third mode is a mode in which only the upper and lower arm switches and the middle switch of different phases among the three-phase upper and lower arm switches and the middle switch are turned on. The fourth mode is a mode in which only one phase of the upper arm switch and the remaining two phases of the lower arm switches are turned on, out of the three phases of the upper and lower arm switches and the middle switch. The inverter control device according to any one of configurations 3 to 6, 8 to 12, wherein the fifth mode is a mode in which only one phase of the middle switch and the remaining two phases of the lower arm switches are turned on among the three phases of the upper and lower arm switches and the middle switch. [Explanation of symbols]
[0102] 10... Rotating electric machine, 21, 22... First and second capacitors, 30... Inverter, 50... Control device.
Claims
1. This invention relates to a multi-level inverter (30) that includes switches provided for each phase, which are electrically connected to a plurality of series-connected energy storage units (21, 22) and to the armature windings (11U to 11W) of a rotating electric machine (10), and includes switches (SUH to SWL, QU to QW). In an inverter control device (50) that controls the switching of the switch to output one of the multiple voltage levels that can be output from the series connection of the multiple energy storage units, A setting unit for setting the switching mode of the inverter that satisfies predetermined conditions, A control unit that controls the switching of the switch based on the set switching mode, Equipped with, The aforementioned predetermined conditions are: At least one of the following modes is selected: H-level mode (HHH), in which the output voltage level of each phase is the highest voltage level among multiple voltage levels, and L-level mode (LLL), in which the output voltage level of each phase is the lowest voltage level among multiple voltage levels. The output voltage level of each phase is a two-level mode (HHL, HLL) consisting of the set of the highest voltage level and the lowest voltage level, An inverter control device, characterized in that the output voltage level of some of the phases is included in one control cycle in an intermediate level mode (HHM, HML, MLL) where the output voltage level is at an intermediate voltage level among multiple voltage levels.
2. The aforementioned predetermined condition is the first condition, The setting unit sets the switching mode that satisfies the first, second, and third conditions, The first condition is that the H-level mode, the L-level mode, the 2-level mode, and the intermediate-level mode are included in one control cycle, and the M-level mode (MMM), in which the output voltage level of each phase is the intermediate voltage level, is not included in one control cycle. The second condition is that, of the H-level mode and the L-level mode, one is the first mode in one control cycle, the other is the last mode in one control cycle, and the 2-level mode and the intermediate-level mode appear between the H-level mode and the L-level mode in one control cycle. The inverter control device according to claim 1, wherein the third condition is that when switching the output voltage level, only the output voltage level of one of the phases is switched.
3. The aforementioned inverter is a 3-level inverter, The H-level mode is a mode in which the output voltage level of the three phases becomes the maximum voltage level. The L-level mode is a mode in which the output voltage level of the three phases becomes the lowest voltage level. The aforementioned M-level mode is a mode in which the output voltage level of the three phases becomes the intermediate voltage level. The aforementioned two-level mode and the aforementioned intermediate level mode are, In the first mode (HHM), the output voltage levels of two of the three phases become the maximum voltage level, and the output voltage level of one phase becomes the intermediate voltage level. In the second mode (HHL), the output voltage levels of two of the three phases become the highest voltage level, and the output voltage level of one phase becomes the lowest voltage level. In the third mode (HML), the output voltage level of one phase becomes the highest voltage level, the output voltage level of one phase becomes the intermediate voltage level, and the output voltage level of one phase becomes the lowest voltage level. In the fourth mode (HLL), the output voltage level of one of the three phases becomes the highest voltage level, and the output voltage levels of the other two phases become the lowest voltage level. The inverter control device according to claim 2, wherein a fifth mode (MLL) is in which the output voltage level of one of the three phases becomes the intermediate voltage level and the output voltage levels of the other two phases become the lowest voltage level.
4. The inverter control device according to claim 3, wherein the setting unit sets the appearance period of each of the first mode, the third mode, and the fifth mode in one control cycle to a period of less than one-third of the length of one control cycle.
5. The aforementioned setting unit is, The condition is that the value obtained by multiplying the total occurrence period of the fifth mode (MLL) and the third mode (HML) in one control cycle by the magnitude of the voltage vector of the fifth mode (|Vas|) is less than or equal to the value obtained by multiplying the occurrence period of the fourth mode (HLL) in one control cycle by the magnitude of the voltage vector of the fourth mode (|Vam|), The condition is that the value obtained by multiplying the total occurrence period of the first mode (HHM) and the third mode (HML) in one control cycle by the magnitude of the voltage vector of the first mode (|Vcs|) is less than or equal to the value obtained by multiplying the occurrence period of the second mode (HHL) in one control cycle by the magnitude of the voltage vector of the second mode (|Vcm|), The inverter control device according to claim 4, wherein the appearance period in one control cycle of each of the first to fifth modes is set to satisfy the condition.
6. The inverter control device according to claim 5, wherein the setting unit sets the total occurrence period of the H-level mode and the L-level mode in one control cycle to a period obtained by subtracting the total occurrence period of the first to fifth modes in one control cycle from the length of one control cycle.
7. The aforementioned predetermined condition is the first condition, The setting unit sets the switching mode that satisfies the first, second, and third conditions, Of the H-level mode and the L-level mode, one is designated as the first zero-vector mode, and the other as the second zero-vector mode. The first condition is, The conditions are that, of two temporally adjacent control cycles, the first control cycle includes the first zero-vector mode, the two-level mode, and the intermediate-level mode, and the next control cycle includes the second zero-vector mode, the two-level mode, and the intermediate-level mode, and that the M-level mode (MMM) in which the output voltage level of each phase is the intermediate voltage level is not included in one control cycle. The second condition is that the first mode in the first control cycle is the first zero-vector mode, the last mode in the first control cycle is the intermediate-level mode, the first mode in the next control cycle is the second zero-vector mode, and the last mode in the next control cycle is the intermediate-level mode. The inverter control device according to claim 1, wherein the third condition is that when switching the output voltage level, only the output voltage level of one of the phases is switched.
8. The aforementioned inverter is a 3-level inverter, The H-level mode is a mode in which the output voltage level of the three phases becomes the maximum voltage level. The L-level mode is a mode in which the output voltage level of the three phases becomes the lowest voltage level. The aforementioned M-level mode is a mode in which the output voltage level of the three phases becomes the intermediate voltage level. The aforementioned two-level mode and the aforementioned intermediate level mode are, In the first mode (HHM), the output voltage levels of two of the three phases become the maximum voltage level, and the output voltage level of one phase becomes the intermediate voltage level. In the second mode (HHL), the output voltage levels of two of the three phases become the highest voltage level, and the output voltage level of one phase becomes the lowest voltage level. In the third mode (HML), the output voltage level of one phase becomes the highest voltage level, the output voltage level of one phase becomes the intermediate voltage level, and the output voltage level of one phase becomes the lowest voltage level. In the fourth mode (HLL), the output voltage level of one of the three phases becomes the highest voltage level, and the output voltage levels of the other two phases become the lowest voltage level. The inverter control device according to claim 7, wherein a fifth mode (MLL) is in which the output voltage level of one of the three phases becomes the intermediate voltage level and the output voltage levels of the other two phases become the lowest voltage level.
9. The inverter control device according to claim 8, wherein the setting unit sets the appearance period of each of the first mode, the third mode, and the fifth mode in one control cycle to a period of less than one-third of the length of one control cycle.
10. The aforementioned setting unit is, The condition is that the value obtained by multiplying the total occurrence period of the fifth mode (MLL) and the third mode (HML) in one control cycle by the magnitude of the voltage vector of the fifth mode (|Vas|) is less than or equal to the value obtained by multiplying the occurrence period of the fourth mode (HLL) in one control cycle by the magnitude of the voltage vector of the fourth mode (|Vam|), The condition is that the value obtained by multiplying the total occurrence period of the first mode (HHM) and the third mode (HML) in one control cycle by the magnitude of the voltage vector of the first mode (|Vcs|) is less than or equal to the value obtained by multiplying the occurrence period of the second mode (HHL) in one control cycle by the magnitude of the voltage vector of the second mode (|Vcm|), The inverter control device according to claim 9, wherein the appearance period in one control cycle of each of the first to fifth modes is set to satisfy the condition.
11. The aforementioned setting unit is, The appearance period of the first zero vector mode in the first control cycle is set to the period obtained by subtracting the total appearance period of the first to fifth modes from one control cycle. The inverter control device according to claim 10, wherein the appearance period of the second zero vector mode in the next control cycle is set to a period obtained by subtracting the total appearance period of the first to fifth modes from the length of one control cycle.
12. The aforementioned setting unit is, Determine whether the voltage difference between the two energy storage units exceeds a threshold. An inverter control device according to any one of claims 3 to 6, 8 to 11, wherein if it is determined that the voltage difference exceeds the threshold, the occurrence period in one control cycle of each of the first, third, and fifth modes is adjusted so that the voltage difference becomes less than or equal to the threshold.
13. The aforementioned setting unit is, Determine whether the inverter is in an overheated state. An inverter control device according to any one of claims 2 to 11, wherein the inverter is determined to be in an overheated state, and the switching mode that satisfies the first condition, the second condition, and the third condition is set.
14. The inverter, as the switch, Upper and lower arm switches (SUH to SWL) are provided corresponding to each phase, Middle switches (QU to QW) are provided for each phase, Equipped with, The H-level mode is a mode in which only the three-phase upper arm switch is turned on among the three-phase upper and lower arm switches and the middle switch. The L-level mode is a mode in which only the three-phase lower arm switch is turned on among the three-phase upper and lower arm switches and the middle switch. The aforementioned M-level mode is a mode in which, of the three phases of the upper and lower arm switches and the middle switch, only the three phase middle switch is turned on. The first mode is a mode in which only two phases of the upper arm switch and the remaining one phase of the middle switch are turned on, out of the three phases of the upper and lower arm switches and the middle switch. The second mode is a mode in which two phases of the upper arm switch and the remaining one phase of the lower arm switch are turned on, out of the three phases of the upper and lower arm switches and the middle switch. The third mode is a mode in which only the upper and lower arm switches and the middle switch of different phases among the three-phase upper and lower arm switches and the middle switch are turned on. The fourth mode is a mode in which only one phase of the upper arm switch and the remaining two phases of the lower arm switches are turned on, out of the three phases of the upper and lower arm switches and the middle switch. The inverter control device according to any one of claims 3 to 6, 8 to 11, wherein the fifth mode is a mode in which only one phase of the middle switch and the remaining two phases of the lower arm switches are turned on among the three phases of the upper and lower arm switches and the middle switch.
15. In a program applied to a multi-level inverter (30) which includes switches provided for each phase, and which are electrically connected to a plurality of series-connected energy storage units (21, 22) and the armature windings (11U to 11W) of a rotating electric machine (10), the program describes the following: In the inverter, the switching control of the switch is performed so that it outputs one of the multiple voltage levels that can be output from the series-connected multiple energy storage units. Computer (51), A process for setting the switching mode of the inverter that satisfies predetermined conditions, The process of controlling the switching of the switch based on the set switching mode is executed. The aforementioned predetermined conditions are: At least one of the following modes is selected: H-level mode (HHH), in which the output voltage level of each phase is the highest voltage level among multiple voltage levels, and L-level mode (LLL), in which the output voltage level of each phase is the lowest voltage level among multiple voltage levels. The output voltage level of each phase is a two-level mode (HHL, HLL) consisting of the set of the highest voltage level and the lowest voltage level, A program with the condition that the output voltage level of some of the phases is within an intermediate level mode (HHM, HHL, HML, HLL, MLL) among multiple voltage levels, and that this mode is included in one control cycle.
Citation Information
Patent Citations
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