Command setting method, unit, display processing device, and electronic device.

Abstract

This application provides a command placement method, a unit, a display processing device, and an electronic device, which relate to the field of data transfer. The command placement unit includes a read data module including a buffer and a selector, in which a plurality of buffer areas are provided in the buffer, and a plurality of command interfaces configured to correspond to different buffer areas and connected to the image processing modules, respectively. The selector is configured to receive the read data and store the read data in the corresponding buffer area based on the identification information. Each command interface is configured to retrieve the read data from the corresponding buffer area and assign it to the image processing module based on a placement command in the read data. The command placement unit can improve bus bandwidth utilization and increase the efficiency of command placement for each module of the display processing device.

Description

Technical Field

[0001] This application relates to the field of data transfer, and specifically, to commands setting side law, unit, display processing device and electronic equipment.

Background Art

[0002] A DPU (Display Processor Unit) processes image data and transmits it to a display device by performing parameters on each image processing module in the DPU according to a control command from a CPU (Central Processing Unit). Settings By doing so, the image data is processed and sent to the display device.

[0003] Currently, the DPU transfers control commands using DMA (Direct Memory Access). The DPU reads control commands from DRAM (Dynamic Random Access Memory) using DMA technology and sends them to the DPU. Also, the DPU analyzes the control commands to setting obtain parameters, setting and based on the parameters, each image processing module in the DPU is setting operated to cause the DPU to execute the corresponding function.

[0004] In the DMA technology, the bandwidth of the transfer bus for reading control commands from DRAM can reach 128 bits or 256 bits. However, since the bandwidth of the interface bus for the DPU to receive control commands is only 32 bits (bits), the transfer of control commands to the DPU by the DMA technology can only use a bus with a 32-bit bandwidth, and the bandwidth of the transfer bus cannot be fully utilized.

[0005] Also, as requirements for the dynamic range, frame rate, resolution, etc. of images increase, the number of image processing modules required by the DPU also increases, and the DPU of the CPU settingThe burden on the DPU also increases. Furthermore, the DPU interacts with other modules or circuits within the device, and commands... setting Since the system is shared and all systems read commands from DRAM based on DMA, if the DPU cannot fully utilize its own transfer bandwidth or bus bandwidth, it will affect the performance of the entire device containing the DPU. [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] In view of this, this application aims to improve the bandwidth utilization rate of the display processing device and to control the commands of each module of the display processing device. setting To improve the efficiency of the command, setting The objective is to provide methods, units, display processing devices, and electronic devices. [Means for solving the problem]

[0007] In the first embodiment, the embodiment of this application is a command setting Provides a unit. Command setting The unit includes a buffer and a selector connected to the buffer, the buffer is provided with a plurality of buffer areas, the selector is connected to a memory that outputs read data, and the read data setting Commands and identification information are included, setting The command specifies each image processing module within the display processing unit. setting Includes parameters for doing so, a read data module in which the identification information represents a buffer area corresponding to the read data, and a plurality of command interfaces, each connected to the buffer and configured to correspond to a different buffer area, and each connected to the image processing module, wherein the selector is configured to receive the read data and store the read data in the corresponding buffer area based on the identification information, and each command interface retrieves the read data from the corresponding buffer area and in the read data setting Based on the command, the image processing module setting It is configured to do so.

[0008] In the embodiment of this application, the command interface is derived from read data. setting Get the command and use the image processing module setting By doing so, when transferring read data and read requests, it is not necessary to transfer read data according to the bandwidth of the image processing module's interface, and it is possible to transfer it according to the bandwidth of the transfer bus which is larger than the bit width of the image processing module's interface, thereby improving the utilization of the transfer bandwidth and the display processing device. setting Efficiency can be improved. Also, the above command setting Multiple units setting Command requests or analyses can be performed in parallel, and the display processing device setting Efficiency can be further improved.

[0009] In one embodiment, the command setting The unit further includes a read request module having a plurality of read request generators, each corresponding individually to a different command interface, each read request generator configured to send a read request to the memory, and the memory configured to send the read data to the buffer in response to the read request.

[0010] In the embodiment of this application, a read request module is provided with multiple read request generators, and each different read request generator corresponds to a different command interface. As a result, each read request module can generate read requests corresponding to different command interfaces, and the generation and issuance of multiple read requests can be performed in parallel. Compared to the method of generating and issuing read requests one by one, the generation of read requests is faster. Efficiency can be effectively improved. Therefore, for each image processing module setting To improve the efficiency of command acquisition and for the image processing module setting To improve efficiency.

[0011] In one embodiment, the read request module further includes a read request arbiter connected to each read request generator and also connected to the memory, the read request arbiter configured to control the output order of each read request based on a preset output priority rule.

[0012] Some image processing modules have high real-time requirements, and the memory needs to receive read requests one by one. In contrast, in the embodiment of this application, by providing a read request arbiter in the read request module, read requests corresponding to high-priority command interfaces can be output to memory in priority and read out, and each image processing module setting This can satisfy the requirement for real-time command retrieval.

[0013] In one embodiment, the read data module further includes an address cache memory connected to the buffer and each of the command interfaces, the address cache memory being configured to store the write address of the read data in the buffer area and the read address of the read data read from the buffer area, the command interface being configured to read the read data from the buffer area according to the write address, and the selector being configured to store the read data in the corresponding buffer area based on the read address and the identification information.

[0014] In the embodiment of this application, by recording read addresses and write addresses using an address cache memory, the command interface can accurately obtain read data from the buffer, and the image processing module setting This can improve accuracy.

[0015] In one embodiment, the read data module further includes a base address memory group having a plurality of base address memories. The address cache memory is respectively connected to each of the command interfaces via each of the base address memories. After the read data is stored in the buffer area, the base address memory provides the write address to the command interface connected to this base address memory.

[0016] In the embodiments of the present application, by recording the write address based on the base address memory group, the command interface only needs to receive the write address stored in the corresponding base address memory, without the need to set additional judgment logic, which can improve the setting efficiency of the command interface. In one embodiment, the read data module further includes an arbiter for buffer read respectively connected to the buffer and each of the command interfaces. The arbiter for buffer read instructs each of the command interfaces to obtain the read data from the buffer.

[0017] In the embodiments of the present application, usually, only one command interface can read the buffer at the same timing. Therefore, by providing an arbiter for buffer read and instructing each command interface to sequentially obtain the read data from the buffer, the possibility of data loss and read error can be reduced, and the setting accuracy of the display processing device can be improved.

[0018] In one embodiment, each of the command interfaces includes a command cache memory 121 connected to the buffer and a command parser. The command cache memory 121 is connected to the command parser, and the command parser is connected to the image processing module. The command cache memory 121 stores the read data obtained from the buffer, and the command parser setting outputs the read data to the image processing module in a predetermined format in order to

[0019] In an embodiment of the present application, by temporarily storing the data output from the command cache memory 121 in the display processing device module, the command parser can read and output the read data from the command cache memory 121 in a predetermined format. The command cache memory 121 and the command parser enable the command interface to setting perform data conversion to convert the command into data usable by the image processing module. Therefore, the bandwidth of the read data before being transferred to the image processing module can be made larger than the bandwidth of the image processing module, fully utilizing the bandwidth of the transfer bus and setting improving the efficiency of the image processing module.

[0020] In one embodiment, the command parser includes a first parser or a second parser, and the setting command includes a coefficient command for setting operating an image processing module having a 3D look-up table. The second parser is configured to output the read data to the image processing module according to the size of the output bandwidth of the second parser. The output bandwidth of the second parser in each of the command interfaces matches the bandwidth of each of the image processing modules having the 3D look-up table in the display processing device respectively.

[0021] In the embodiment of this application, the image processing module having a 3DLUT (3D Look Up Table) uses the 3DLUT setting The system receives coefficient commands for this purpose, but different coefficient commands have different bandwidths, and if coefficient commands are transferred using the same bandwidth, the transfer bandwidth may not be fully utilized. Therefore, a second parser is provided in the command interface, and by matching the output bandwidth of each second parser to the bandwidth of each image processing module that has a 3D lookup table in the display processing unit, image processing modules with different bandwidths can be analyzed by the corresponding second parser, and the output coefficient commands can be matched to each image processing module. Thus, the system command setting It can be completed all at once. setting This eliminates the need to perform the process multiple times or introduce invalid data, allowing for full utilization of bandwidth.

[0022] In one embodiment, each buffer area corresponding to the command interface shares the memory space of the buffer, and the memory space corresponding to each buffer area is allocated according to the number of read data corresponding to each command interface in the buffer.

[0023] In this embodiment, by dynamically allocating the size of the memory space corresponding to the cache area according to the number of read data, sufficient memory space is provided for the read data in different read data transfer cases. setting This is possible. Therefore, it can satisfy the read data transfer needs in different cases and commands. setting The scope of application of the unit can be expanded.

[0024] The embodiments of this application are command setting Further methods will be provided. Command setting The method includes a buffer and a selector connected to the buffer, wherein the buffer is provided with a plurality of buffer areas, the selector is connected to a memory that outputs read data, and the read data settingCommands and identification information are included, setting The command displays a display processing device. setting A command including parameters for doing so, a read data module in which the identification information represents a buffer area corresponding to the read data, and a plurality of command interfaces each connected to the buffer and configured to correspond to a different buffer area, each connected to the display processing device, setting The steps of applying to a unit and receiving the read data by the selector, storing the read data in a corresponding buffer area based on the identification information of the read data received by the selector, retrieving the read data from the buffer area corresponding to this command interface by the command interface, and using the command interface to access the read data setting Based on the command, the display processing device setting The steps include,

[0025] In a third embodiment, the embodiment of the present application provides a display processing device. The display processing device is a command as described in any one of the first embodiments. setting The unit and the respective command setting Includes multiple image processing modules connected to the unit.

[0026] In a fourth embodiment, an embodiment of the present application provides an electronic device. The electronic device includes a display processing device as described in the third embodiment, a controller, and a memory connected to the controller and the display processing device, respectively, wherein the controller is configured to generate the read data and store the read data in the memory, and the memory responds to a read request from the display processing device and outputs the read data to the display processing device.

[0027] In one embodiment, the memory is provided with a plurality of storage areas, each of which corresponds to a different command interface and is configured to store read data corresponding to each command interface.

[0028] In a fifth embodiment, an embodiment of the present application provides an image display system. The image display system includes an electronic device as described in any one of the fourth embodiments, and a display device that is communicated to the electronic device and displays image data output from the display processing device.

[0029] To more clearly explain the technical concept of the embodiments of this application, the drawings necessary for describing the embodiments are briefly described below. The following drawings only show some embodiments of this application and do not limit the scope. Those skilled in the art can obtain other relevant drawings based on these drawings without employing inventive ability. [Brief explanation of the drawing]

[0030] [Figure 1] This is a schematic diagram of a command setting unit according to one embodiment of the present application. [Figure 2] This is a schematic diagram of the buffer storage space according to one embodiment of the present application. [Figure 3] This is another schematic diagram of a command setting unit according to one embodiment of the present application. [Figure 4] A schematic diagram of a read operation by a buffer read arbiter according to one embodiment of this application. [Figure 5] This is a schematic diagram illustrating the operation of a read request module according to one embodiment of this application. [Figure 6] This is a schematic diagram illustrating the reception and analysis of read data according to one embodiment of this application. [Figure 7] This is a flowchart of a command setting method according to one embodiment of this application. [Figure 8] This is a schematic diagram of a display processing device according to one embodiment of the present application. [Figure 9]This is a schematic diagram of an electronic device according to one embodiment of the present application. [Figure 10] This is a schematic diagram of an image display system according to one embodiment of the present invention. [Modes for carrying out the invention]

[0031] To further clarify the purpose, technical proposal, and advantages of this application, the application will be described in more detail below with reference to the drawings and using examples. The specific examples described herein are for illustrative purposes only and do not limit the application.

[0032] Figure 1 shows a command according to one embodiment of the present application. setting This is a schematic diagram of unit 100. Command setting Unit 100 includes a read data module 110 and a plurality of command interfaces 120.

[0033] The read data module 110 includes a buffer 112 and a selector 111 connected to the buffer 112. The buffer 112 has multiple buffer areas, and the selector 111 is connected to a memory that outputs read data.

[0034] Buffer 112 may be various types of memory, such as SRAM (Static Random-Access Memory), DRAM (Dynamic Random-Access Memory), or PSRAM (Pseudo Static Random-Access Memory).

[0035] DPU is setting After generating the command, in order to read it from memory, setting The command is stored in memory. The DPU image processor includes multiple image processing modules. setting The command uses different image processing modules. setting It is what it is.

[0036] Figure 2 is a schematic diagram of the buffer storage space according to one embodiment of the present application. In the embodiment of the present application, since multiple command interfaces 120 are included, the storage space of buffer 112 is divided into multiple buffer areas, and one command interface 120 is set corresponding to each buffer area, so that the read data corresponding to each command interface 120 is stored in each buffer area. The size of the buffer area can be set as needed, for example, the size of one buffer area may be 256 bytes, 512 bytes, etc.

[0037] In some embodiments, the buffer area corresponding to each command interface shares the buffer space, and the storage space corresponding to each buffer area is dynamically allocated according to the number of read data corresponding to each command interface in the buffer. For example, if there are 10 command interfaces, there are 10 buffer areas, and the 10 buffer areas share the storage space of one buffer. If 10 read data are stored in one buffer, dividing the storage space equally would allocate space for storing one read data to each of the 10 buffer areas. In contrast, in this embodiment, storage space is allocated to each buffer area according to the number of read data input to the cache memory and the command interface corresponding to each read data. The storage space allocated to a single buffer area can range from a maximum of the buffer's storage space to a minimum of 0. For example, if 9 input read data correspond to command interface 1 and 1 read data corresponds to command interface 2, then the buffer area corresponding to command interface 1 is allocated storage space for 9 read data, the buffer area corresponding to command interface 2 is allocated storage space for 1 read data, and the other buffer areas have no storage space allocated to them, i.e., 0. The above are merely examples and do not limit this application.

[0038] In this embodiment, the read data setting Includes commands and identification information. setting The command specifies each image processing module of the display device. setting The system includes parameters for this purpose, and their specific details can be found in the prior art, so they will not be explained here. The identification information represents the buffer area corresponding to the read data, and may also be information representing the buffer area such as an address or number. Furthermore, since the buffer area corresponds to the command interface, the identification information can also represent the command interface.

[0039] Furthermore, in order to store each read data in the corresponding buffer area, buffer 112 and command setting A selector 111 is installed between unit 100 and external memory. Based on identification information, the selector 111 can store each read data in the corresponding buffer area.

[0040] Multiple command interfaces 120 are each connected to the buffer 112 and configured to correspond to different buffer areas, and are also each connected to the image processing module.

[0041] In the embodiment of this application, the selector 111 is configured to receive read data and store the read data in the corresponding buffer area based on the identification information. Each command interface 120 retrieves the read data from the corresponding buffer area and the read data setting Based on the command, the image processing module setting It is configured to do so. settingBefore outputting commands to each image processing module of the display processing unit, the read data is transferred between memory and buffer 112 according to the bandwidth of the transfer bus (e.g., 128-bit, 256-bit, etc.) and stored in buffer 112. Each command interface 120 is connected to an image processing module, thereby converting the read data into data that fits the bandwidth of the image processing module (e.g., 32-bit). Furthermore, multiple command interfaces 120 operate in parallel, allowing the transferred read data to be processed in a timely manner. Buffer 112 allows for better utilization of the transfer bus bandwidth during the transfer of read data. The transferred read data can be used by the command interfaces 120. The parallel operation of multiple command interfaces 120 allows for processing of multiple image processing modules. setting Efficiency can be improved. This will allow this command setting Unit 100 monitors bandwidth utilization and the image processing module. setting Efficiency can be improved.

[0042] In some examples, the command setting A control unit (not shown) is provided in unit 100. The control unit may be a single control circuit or a combination of multiple control circuits. Commands are provided to the control unit. setting The unit 100 includes various control logics for controlling the cooperative operation of each part of the unit. In some embodiments, the control unit may be a controller of a display processing device.

[0043] Figure 3 shows a command according to one embodiment of the present application. setting This is another schematic diagram of unit 100.

[0044] In one embodiment, command settingThe unit 100 may further include a read request module 130 having a plurality of read request generators 131, each corresponding individually to a different command interface 120. Each read request generator 131 is configured to send a read request to memory, and the memory is configured to send read data to buffer 112 in response to the read request.

[0045] The display processing unit sends a read request to external memory. setting Commands are acquired, but in the embodiment of this application, since there are multiple command interfaces 120, if the display processing device generates read requests one by one, the efficiency of read request generation is low, and the bandwidth utilization of the transfer bus remains low. Therefore, in this embodiment, one read request generator 131 is provided for each different command interface 120, multiple read requests are generated in parallel, and the read requests are sent to memory to acquire read data. This reduces the waiting time when generating read requests, improves the efficiency of read request generation, and improves the image processing module's setting Efficiency can be improved.

[0046] In the above embodiment, the number of read request generators 131, command interfaces 120, and buffer areas may be the same as the number of image processing modules in the display processing device.

[0047] In one embodiment, the read request module 130 may further include a read request arbiter 132 connected to each read request generator 131 and also connected to memory. The read request arbiter 132 is configured to control the output order of each read request based on a preset output priority rule.

[0048] Memory reads by the display processing unit are typically performed one at a time, meaning that read requests are usually issued one at a time. For example, when using an AXI (Advanced eXtensible Interface, a bus protocol) bus as the transfer bus, the AXI interface can only issue one read request at a time. However, some image processing modules within the display processing unit have high real-time requirements. If multiple read requests are generated simultaneously, and the system is controlled to cause requests from such image processing modules to be put on hold, the read data acquired afterward may not meet the needs of these image processing modules.

[0049] Therefore, for such an image processing module, a read request arbiter 132 may be provided, connected to the output terminal of each read request generator 131, so that read requests are output to memory after arbitration by the read request arbiter 132. The read request arbiter 132 is provided with output priority rules, and the output order of each read request is controlled based on these output priority rules.

[0050] Priority rules can be set according to the needs of the image processing module within the display processing unit. The read request arbiter 132 may be an arbitration circuit for implementing round-robin arbitration, weighted round-robin arbitration, etc. The arbitration circuit may refer to prior art and will not be described here.

[0051] In one embodiment, the read data module 110 further includes an address cache memory 113. The address cache memory 113 is connected to the buffer 112 and each command interface 120, respectively, and is configured to store the write addresses of read data in the buffer area and the read addresses of read data read from the buffer area.

[0052] In this embodiment, read data is stored in the buffer area of ​​buffer 112. However, when multiple read data are stored in the same buffer area, it is necessary to distinguish between readable read data and overwritable read data within this buffer area. For this reason, address cache memories are provided, connected to buffer 112 and each command interface 120. By recording the write address of the read data in the buffer area and the read address of the read data that has been read using this address cache memory, the command interface 120 determines whether or not there is unread read data in buffer 112 based on the write address and read address. If there is unread read data, it retrieves the read data from buffer 112.

[0053] Furthermore, after the selector 111 determines the corresponding buffer area based on the identification information, it further obtains the read address corresponding to this buffer area and determines the overwritable storage space within this buffer area.

[0054] In the above embodiment, the address cache memory 113 may be implemented using a conventional cache memory, which will not be described here.

[0055] In some embodiments, the read data module 110 further includes a base address memory group 114 having multiple base address memories. The address cache memory 113 is connected to each command interface 120 via each base address memory.

[0056] In this embodiment, if the command interface 120 does not have the function to determine read addresses and write addresses, a base address memory is provided. This base address memory retrieves the readable write addresses within the corresponding buffer area of ​​the address cache memory 113 and provides them to the corresponding command interface 120.

[0057] The base address memory can be a conventional storage device. For example, the base address memory may be a FIFO (First Input First Output) or a register.

[0058] In one embodiment, the read data module 110 further includes a buffer read arbiter 115. The buffer read arbiter 115 is connected to the buffer 112 and each command interface 120, respectively. The buffer read arbiter 115 instructs each command interface 120 to retrieve read data from the buffer 112.

[0059] Similar to the principle of the read request arbiter 132, when a command interface 120 reads from buffer 112, typically only one command interface 120 can read from buffer 112 at a time. In this embodiment, if multiple command interfaces 120 need to read from buffer 112 simultaneously, the buffer read arbiter 115 can instruct each command interface 120 to read sequentially, thereby reducing the possibility of data loss and read errors.

[0060] Next, the command interface 120, which is currently authorized to receive read data, is configured to acquire the read data preferentially, and the read request arbiter 132 instructs the higher-priority command interface to acquire the read data preferentially. For example, as shown in Figure 4, once the buffer read arbiter has determined which command interface will acquire the read data, it returns this command interface and the write address of the read data to the buffer, allowing the command interface to acquire the read data from the buffer area of ​​the buffer according to the write address.

[0061] In the embodiment of this application, the format of the read data is a data format that is compatible with the bandwidth of the transfer bus, and the image processing module may not be able to use it directly. Therefore, the command interface 120 needs to convert it to a data format that the image processing module can use. Since the conversion process takes time, the command interface 120 may not be able to receive the read data or may not be permitted to receive it during this time. In contrast, in this embodiment, the command interface 120 that is permitted to receive the read data is given priority in acquiring the read data.

[0062] In some embodiments, the pre-configured read priority rules may, but are not limited to, being set according to the read data real-time requirements of the image processing module corresponding to each command interface 120. The buffer read arbiter 115 can refer to conventional arbitration circuits and will not be described here.

[0063] In one embodiment, each of the command interfaces 120 includes a command cache memory 121 connected to the buffer 112 and a command parser. The command cache memory 121 is connected to the command parser, and the command parser is connected to the image processing module.

[0064] Because the bandwidth of the transfer bus may not match the interface bandwidth of the display processing unit, the command interface 120 in read data setting Display commands in the image processing module within the processing unit setting The bandwidth of the read data needs to be converted so that it can be used.

[0065] In this embodiment, the command cache memory 121 stores the read data obtained from the buffer 112. The command parser uses the image processing module. settingTo achieve this, the read data is output to the image processing module in a predetermined format. Here, the predetermined format may be, for example, a data size of 4 bytes, 32 bytes, etc. The data size corresponding to the predetermined format is the same as the interface bandwidth of the image processing module.

[0066] The command cache memory 121 can temporarily store read data. On the one hand, storing multiple read data reduces the storage burden on the buffer 112. On the other hand, the data size corresponding to a predetermined format is usually smaller than the size of a single read data, and the command parser cannot convert the read data all at once. Temporarily storing the read data in the command cache memory 121 reduces the possibility of data loss. As a result, the command cache memory 121 and the command parser can transfer read data before outputting it to the display processing device, without being limited by the interface bandwidth of the display processing device. Since the transfer bandwidth is usually greater than the interface bandwidth of the display processing device, the utilization rate of the transfer bandwidth during read data transfer can be improved.

[0067] In one embodiment, the command parser includes a first parser 122 or a second parser 123.

[0068] In a display processing device, setting The command includes a normal command and a coefficient command. The first parser 122 converts the normal command into a predetermined format, and the second parser 123 converts the coefficient command. Here, based on the normal command setting Each image processing module typically has the same corresponding interface bandwidth. Therefore, the output bandwidth of each first parser 122 is the same, which is the bandwidth of the display processing module.

[0069] On the other hand, the coefficient command is an image processing module having a 3DLUT in the display processing device. settingThis is for the purpose of... The interface bandwidth of such display processing modules may differ. For example, if some display processing modules have a bandwidth of 36 bits and others have a bandwidth of 48 bits, but the output bandwidth of the command parser is uniformly 32 bits, the command parser will... setting The command needs to be issued in two separate steps, which may prevent the full utilization of bandwidth during the second transmission.

[0070] The second parser 123 is configured to output read data to the image processing module according to the size of its output bandwidth, and the output bandwidth of the second parser 123 in each command interface 120 matches the bandwidth of each image processing module having a 3D lookup table in the display processing device.

[0071] In the embodiment of this application, a second parser 123 is provided as a command parser in the command interface 120 corresponding to an image processing module having different 3DLUTs, and the output bandwidth of the second parser 123 can be set to match the bandwidth of this image processing module. This allows for one image processing module having such 3DLUTs to be used. setting This eliminates the need to transfer commands multiple times, making efficient use of interface bandwidth and improving the image processing module's performance. setting Command assignment efficiency improves.

[0072] The above command setting Unit 100 can convert the bit width of the read data to a bit width that the image processing module's interface can receive. When transferring read data and read requests, the transfer can be performed according to the bandwidth of the transfer bus, which is larger than the bit width of the image processing module's interface, thereby improving the utilization of the transfer bandwidth and the display processing device. setting Efficiency can be improved. At the same time, the above command setting Unit 100 provides multiple settingCommand requests or analyses can be performed in parallel, and the display processing device setting Efficiency can be further improved.

[0073] For the sake of understanding, an example is provided, but this example is not intended to limit the scope of this application. Figure 5 is a schematic diagram of the operation of a read request module according to one embodiment of this application. Figure 6 is a schematic diagram of the reception and analysis of read data according to one embodiment of this application.

[0074] In this example, the number of command interfaces 120 is 20, the number of corresponding read request generators 131 is 20, and the buffer area is 20. The read request arbiter 132 uses a circuit that supports weighted round-robin arbitration, and the buffer area can store 256 bytes of data. The interface bandwidth between the command interface 120 and the image processing module is 4 bytes, and the memory and command setting The transfer bus between unit 100 and the other unit is 32 bytes.

[0075] First, as shown in Figure 5, each read request generator 131 generates a read request corresponding to each image processing module in accordance with the control of the display processing device controller. The read request includes a flag and / or address corresponding to the read data in the memory storage area and is sent to memory via the read request arbiter 132.

[0076] Next, as shown in Figure 6, the selector 111 determines the corresponding buffer area based on the identification information for the read data obtained from memory, assigns a write address, and then stores the read data in the corresponding buffer area. For example, the size of each buffer area is 256 bytes, and the read / write unit is 64 bytes.

[0077] Then, the write address and read address are provided to the base address memory, the write address of the read data that can be read by the base address memory is determined, and this write address is provided to the corresponding command interface 120. Here, if the read / write unit is 64 bytes, 64 bytes of read data can be written at once.

[0078] The buffer read arbiter 115 controls each command interface 120 to retrieve read data from the buffer area of ​​buffer 112 according to a pre-configured read priority rule. When read data stored in the buffer area is read, the address cache memory 113 records the corresponding read address.

[0079] The read data acquired by each command interface 120 is stored in the command cache memory 121, and the image processing module... setting To achieve this, the data is converted in a predetermined format by the command parser and output to the image processing module. Here, the command cache memory 121 reads from the buffer 112 with a bandwidth of 64 bytes, and each command interface can output the converted read data in 4 bytes. Here, the command interface having the second parser analyzes the read data including coefficient commands, and the command interface having the first parser analyzes the read data including normal commands.

[0080] Based on a similar technical concept, the embodiments of this application are command setting Further methods will be provided. Command setting The method is the command according to the above embodiment. setting It can be applied to unit 100.

[0081] Figure 7 shows a command according to one embodiment of the present application. setting This is a flowchart of the method. Commands setting The method includes the following steps:

[0082] S210: Receives read data via selector.

[0083] S220: Based on the identification information of the read data received by the selector stomach The read data is then stored in the corresponding buffer area.

[0084] S230: The command interface retrieves read data from the buffer area corresponding to this command interface.

[0085] S240: Command interface for reading data setting Based on the command, the display processing device setting do.

[0086] In one embodiment, before the selector receives the read data, a read request is sent to the memory via each read request generator 131. The memory then sends the read data to the buffer in response to the read request.

[0087] In one embodiment, after each read request generator 131 sends a read request to memory, the read request arbiter 132 controls the output order of each read request. Here, the read request arbiter 132 is configured to control the output order of each read request based on a pre-configured output priority rule.

[0088] In one embodiment, based on the identification information of the read data received by the selector stomach After storing the read data in the corresponding buffer area, the address cache memory 113 stores the write address of the read data in the buffer area and the read address of the read data read from the buffer area. Accordingly, S230 includes the step of obtaining the read data from the buffer area corresponding to the command interface by the command interface and its write address.

[0089] In one embodiment, the address cache memory 113 stores the write address of the read data in the buffer area and the read address of the read data read from the buffer area, and then the base address memory provides the write address to the command interface connected to this base address memory.

[0090] In one embodiment, the step of obtaining read data from a buffer area corresponding to this command interface by a command interface further includes the step of obtaining read data from the buffer in accordance with a pre-configured read priority rule in the buffer read arbiter 115.

[0091] In one embodiment, the command interface is used to read data setting Based on the command, the display processing device setting The steps include storing the read data obtained from the buffer in the command cache memory 121, and the image processing module. setting This includes the step of outputting the read data in a predetermined format to an image processing module using a command parser.

[0092] In one embodiment, the step of outputting read data in a predetermined format to an image processing module by a command parser includes a coefficient command by a second parser 123. setting This includes a step of parsing the command. The coefficient command is an image processing module with a 3D lookup table. setting The purpose is as follows: The second parser 123 is configured to output read data to the image processing module according to the size of the output bandwidth of the second parser 123. The output bandwidth of the second parser 123 in each command interface matches the bandwidth of each image processing module having a 3D lookup table in the display processing unit.

[0093] Based on a similar technical concept, embodiments of this application further provide a display processing device. Figure 8 is a schematic diagram of a display processing device according to one embodiment of this application. The display processing device is command setting It includes a unit 100 and a plurality of image processing modules 210.

[0094] Multiple image processing modules 210 each have a command setting The command is connected to the command interface of unit 100. setting Refer to unit 100. The image processing module 210 can be referred to by the image processing module in the conventional display processing device, and will not be described here.

[0095] Based on a similar technical concept, embodiments of this application further provide electronic devices. Figure 9 is a schematic diagram of an electronic device 300 according to one embodiment of this application. The electronic device 300 includes a display processing device 200, a controller 310, and a memory 320.

[0096] The display processing device 200 is the display processing device 200 according to the above embodiment, and its specific details can be found in the above description and will not be explained here.

[0097] Conventional components may be used for the controller and memory. For example, the controller 310 may be a CPU, and the memory 320 may be DRAM, etc. A bus is used to communicate between the controller, the memory, and the display processing unit 200.

[0098] In the embodiments of this application, the controller 310 is configured to generate read data and store the read data in memory. The memory 320 is configured to respond to a read request from the display processing device and output the read data to the display processing device 200. The functions of the controller 310 and memory 320 in the electronic device can be described by prior art and will not be described here.

[0099] In one embodiment, the memory 320 is provided with multiple storage areas, each corresponding to a different command interface and configured to store read data corresponding to each command interface.

[0100] By providing multiple storage areas in memory 320, the display processing unit retrieves read data from the corresponding storage area based on identification information corresponding to the command interface in a read request. setting It is possible.

[0101] Based on a similar technical concept, embodiments of this application further provide an image display system. Figure 10 is a schematic diagram of an image display system according to one embodiment of this application. The image display system 400 includes an electronic device 300 and a display device 410. The electronic device 300 is the electronic device according to the above embodiment.

[0102] The display device 410 is connected to the electronic device 300 via communication and receives and displays image data output from the display processing device of the electronic device 300.

[0103] In some embodiments, the display device may be provided within the electronic device as part of the structure of the electronic device.

[0104] The above description is merely a specific embodiment of the present application, and the scope of protection of this application is not limited to these. A person skilled in the art can modify or substitute the technical invention within the scope of the art disclosed in this application, and such modifications or substitutions are also included within the scope of protection of this application. Therefore, the scope of protection of this application is as set forth in the claims.

[0105] In this specification, terms such as “having,” “including,” and any variations thereof are intended to encompass non-exclusive inclusion. Therefore, a process, method, article, or apparatus comprising a set of elements is not necessarily limited to these elements and may include other elements not explicitly stated or specific to these processes, methods, articles, or apparatus. Unless otherwise specified, the expression “including” does not exclude situations where a process, method, article, or apparatus comprising such elements also possesses other similar elements. [Explanation of Symbols]

[0106] 100 commands setting unit 110 Read Data Module 111 Selector 112 buffers 113 Address Cache Memory 114 Base Address Memory Groups 115 Buffer lead arbiter 120 Command Interface 121 Command cache memory 122 First Parser 123 Second Parlor 130 Read Request Module 131 Read Request Generator 132 Read Request Arbiter 200 Display Processing Device 210 Image Processing Module 300 Electronic equipment 310 Controller 320 memory 400 Display System 410 Display equipment

Claims

1. A buffer and a selector connected to the buffer, wherein the buffer is provided with a plurality of buffer areas, the selector is connected to a memory that outputs read data, the read data includes a setting command and identification information, the setting command includes parameters for setting each image processing module of the display processing device, and the identification information represents a buffer area corresponding to the read data, It includes a plurality of command interfaces, each connected to the buffer and configured to correspond to a different buffer area, and each connected to the image processing module, The selector is configured to receive the read data and store the read data in the corresponding buffer area based on the identification information. Each command interface is configured to retrieve the read data from the corresponding buffer area and to configure the image processing module based on the configuration commands in the read data. A command setting unit characterized by the following features.

2. The read request module further includes a plurality of read request generators, each corresponding to a different command interface, Each of the read request generators is configured to send a read request to the memory, and the memory is configured to send the read data to the buffer in response to the read request. The command setting unit according to feature 1.

3. The read request module further includes a read request arbiter connected to each of the read request generators and connected to the memory, The read request arbiter is configured to control the output order of each read request based on a pre-configured output priority rule. The command setting unit according to feature 2.

4. The read data module further includes an address cache memory connected to the buffer and each of the command interfaces, The address cache memory is configured to store the write address of the read data in the buffer area and the read address of the read data read from the buffer area. The command interface is configured to read the read data from the buffer area according to the write address, The selector is configured to store the read data in the corresponding buffer area based on the read address and the identification information. The command setting unit according to feature 1.

5. The read data module further includes a base address memory group having a plurality of base address memories, The address cache memory is connected to each command interface via each of the base address memories, The base address memory provides the write address to the command interface connected to the base address memory after the read data has been stored in the buffer area. The command setting unit according to feature 4.

6. The read data module further includes buffer read arbiters connected to the buffer and each of the command interfaces, respectively. The buffer read arbiter instructs each command interface to retrieve the read data from the buffer. The command setting unit according to feature 4.

7. Each buffer area corresponding to the command interface shares the memory space of the buffer, and the memory space corresponding to each buffer area is allocated according to the number of read data corresponding to each command interface in the buffer. The command setting unit according to feature 1.

8. Each of the command interfaces includes a command cache memory connected to the buffer and a command parser, the command cache memory is connected to the command parser, and the command parser is connected to the image processing module. The command cache memory stores the read data obtained from the buffer. The command parser outputs the read data in a predetermined format to the image processing module in order to configure the image processing module. A command setting unit according to any one of claims 1 to 7.

9. The command parser includes a first parser or a second parser, The aforementioned configuration command includes a coefficient command for configuring an image processing module having a 3D lookup table, The second parser is configured to output the read data to the image processing module according to the size of the output bandwidth of the second parser. The output bandwidth of the second parser in each command interface is matched to the bandwidth of each image processing module having the 3D lookup table in the display processing device. The command setting unit according to feature 8.

10. A command setting unit according to any one of claims 1 to 7, Includes a plurality of image processing modules, each connected to the command setting unit. A display processing device characterized by the following:

11. A command setting unit according to any one of claims 8, Includes a plurality of image processing modules, each connected to the command setting unit. A display processing device characterized by the following:

12. The command setting unit according to claim 9, Includes a plurality of image processing modules, each connected to the command setting unit. A display processing device characterized by the following:

13. The display processing device described in claim 10, a controller, and a memory connected to the controller and the display processing device, respectively, The controller is configured to generate the read data and store the read data in the memory. The memory responds to a read request from the display processing device and outputs the read data to the display processing device. An electronic device characterized by the following features.

14. The display processing device described in claim 11, a controller, and a memory connected to the controller and the display processing device, respectively, The controller is configured to generate the read data and store the read data in the memory. The memory responds to a read request from the display processing device and outputs the read data to the display processing device. An electronic device characterized by the following features.

15. The display processing device described in claim 12, a controller, and a memory connected to the controller and the display processing device, respectively, The controller is configured to generate the read data and store the read data in the memory. The memory responds to a read request from the display processing device and outputs the read data to the display processing device. An electronic device characterized by the following features.

16. This applies to a command setting unit that includes a buffer and a selector connected to the buffer, wherein the buffer is provided with a plurality of buffer areas, the selector is connected to a memory that outputs read data, the read data includes a setting command and identification information, the setting command includes parameters for setting a display processing device, the identification information represents a buffer area corresponding to the read data, and a plurality of command interfaces, each connected to the buffer and configured to correspond to a different buffer area, and each connected to the display processing device. The steps include receiving the read data by the selector, The steps include storing the read data in a corresponding buffer area based on the identification information of the read data received by the selector, The steps include: obtaining the read data from the buffer area corresponding to the command interface using the command interface; The step includes setting the display processing device based on the setting commands in the read data using the command interface. A command setting method characterized by the following:

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