Method for manufacturing a light-emitting system, a micro-LED, and an array of micro-light-emitting diodes.

Abstract

The light emitting system includes an array of micro light emitting diodes (micro LEDs). The array of micro LEDs includes a semiconductor substrate, a prep layer formed on at least a portion of the semiconductor substrate, and an active region formed on the prep layer. The array of micro LEDs also includes a plurality of thick substructures forming an array on the active region, and a plurality of thin substructures formed on the active region, each of the thin substructures being disposed between each adjacent pair of thick substructures. Each of the thick substructures defines a shape and size of a corresponding one of the micro LEDs. Each of the thin substructures is configured to prevent movement of free electron carriers through the plurality of thin substructures to electrically isolate each of the thick substructures from each of all others of the thick substructures. Additionally, the plurality of micro LEDs share an active region.

Description

Technical Field

[0001] Cross - reference to Related Applications This application claims priority to U.S. Provisional Patent Application No. 63 / 137,355, filed on January 14, 2021, the entire content of which is incorporated herein by reference.

[0002] Background Aspects of the present disclosure generally relate to light - emitting structures, such as the structures of light - emitting diodes used in various types of displays and other devices.

Background Art

[0003] Increasing the number of pixels (or picture elements) in light - emitting devices and displays can improve the user experience and enable new applications. However, increasing the number of light - emitting elements forming the pixels or increasing their density is challenging. By reducing the size of light - emitting diodes (LEDs: light emitting diodes), it becomes possible to increase both the total number and density of the light - emitting elements forming the pixels.

[0004] Recent developments in LED manufacturing techniques have enabled the production of micro - light - emitting diodes (micro - LEDs) where each LED has a pitch on the order of a few microns to a fraction of a micron. For example, see International Patent Publications WO2019 / 209945A1, WO2019 / 209957A1, WO2019 / 209961A1, and WO2020 / 210563A1 by He et al., all of which are incorporated herein by reference in their entirety. Such micro - LEDs enable new configurations of hosts for displays and other applications using light - emitting elements.

[0005] Figure 1 shows an epitaxial layer structure for a commonly implemented LED. The LED structure 100 includes one or more bulk layers or preparationThe semiconductor substrate or semiconductor template 110 supports layer 120. In one example, the semiconductor template is an n-type GaN template formed on an n-type epitaxial substrate. preparation An activated quantum well (QW) 130 is formed on top of layer 120. Bulk layer or preparation Layer 120 is, for example, a thick layer of one material or a structure of two or more materials, configured to bring about a transition in the coefficient of thermal expansion and / or lattice matching from the semiconductor template 110 to the active QW130. Bulk layer or preparation By adjusting the material composition of layer 120, more flexible material selection for the active QW130 is possible, thereby enabling the formation of an active region with desired luminescence characteristics. Finally, one or more p-layers 140 are deposited on the active QW130 to provide electronic contacts on the LED structure 100. The p-layers 140 include a p-doped layer and / or a contact layer. The LED structure 100 can then be etched or otherwise shaped to form a desired micro-LED shape factor for a specified application.

[0006] In some embodiments, techniques such as epitaxial growth and dry etching, or selective area growth (SAG), may be used to define the position, shape, and size of the LED structure 100 on the semiconductor template 110. That is, one way of forming an array of microLEDs on a substrate is to epitaxially grow the layer structures necessary for light emission (for example, preparation The process involves lattice matching or strain-controlling the layers, active quantum well layer, electron blocking layer, p-layer, and other functional layers shown in Figure 1, followed by a mask etching process (e.g., dry etching or wet etching) to define and separate the desired array shape of micro-LEDs from the layer structure. Etching typically involves etching the entire layer structure, including the active emission region, to separate the active emission region of each micro-LED from the surrounding micro-LEDs. [Overview of the project] [Problems that the invention aims to solve]

[0007] Conventional micro-LED manufacturing processes have drawbacks, such as wavelength shifts from the LED layer structure before etching and separation, and reduced quantum efficiency. Therefore, this specification presents techniques and devices that enable the effective and efficient design and manufacture of micro-LEDs. [Means for solving the problem]

[0008] Summary of Disclosure To provide a basic understanding of one or more embodiments, a simplified overview of such embodiments is presented below. This overview is not intended to be a comprehensive summary of all possible embodiments, nor to identify the essential or defining elements of all embodiments, nor to describe the scope of any or all embodiments. The purpose of the overview is to present some concepts of one or more embodiments in a simplified form as a prelude to a more detailed explanation.

[0009] One aspect of this disclosure describes a light-emitting system. The light-emitting system includes an array of microlight-emitting diodes (microLEDs). The array of microLEDs includes a semiconductor substrate and at least one formed on at least a portion of the semiconductor substrate preparation Layers and at least one preparationThe array of microLEDs includes an active region formed on top of the active region. The array of microLEDs also includes a plurality of thick substructures forming an array on top of the active region, and a plurality of thin substructures formed on top of the active region, each of which thin substructures is positioned between each adjacent pair of thick substructures. Each of the plurality of thick substructures defines the shape and size of one of the microLEDs. Each of the plurality of thin substructures is configured to prevent the movement of free electron carriers through the plurality of thin substructures in order to electrically isolate each of the thick substructures from each of the other thick substructures. Furthermore, the plurality of microLEDs share an active region.

[0010] In another embodiment, a method for manufacturing an array of microlight-emitting diodes (microLEDs) on a semiconductor substrate is described. The method involves placing at least one on at least a portion of the semiconductor substrate preparation Depositing layers and at least one preparation The method includes forming an active region on a layer, depositing at least one p-layer on the active region, and depositing at least one mask structure on the at least one p-layer, configured to define the size and shape of each of a plurality of micro-LEDs. The method further includes partially etching off at least one p-layer where at least one p-layer is not covered by at least one mask structure, and removing at least one mask structure.

[0011] The attached drawings illustrate only a few embodiments and should therefore not be considered limiting in scope. [Brief explanation of the drawing]

[0012] [Figure 1] This figure shows an example of a commonly implemented microLED structure according to the embodiments of this disclosure. [Figure 2]This is a partial top view of an LED array, which includes a number of microLED structures as components of an array for use in a display, according to an aspect of the present disclosure. [Figure 3] This is a cross-sectional view of an epitaxial layer structure for an LED according to an aspect of the present disclosure. [Figure 4] These are cross-sectional views of a plurality of micro-LEDs formed by selectively etching an epitaxial layer structure for LEDs according to an aspect of the present disclosure. [Figure 5] These are cross-sectional views of a plurality of micro-LEDs formed by selectively etching an epitaxial layer structure for LEDs according to an aspect of the present disclosure. [Figure 6] This figure shows the process for forming a microLED according to an aspect of the present disclosure. [Figure 7] This figure shows an alternative process for forming a microLED according to an aspect of the present disclosure. [Figure 8] This figure shows an alternative process for forming a microLED according to an aspect of the present disclosure. [Figure 9] This figure shows an alternative process for forming a microLED according to an aspect of the present disclosure. [Figure 10] This figure shows an alternative process for forming a microLED according to an aspect of the present disclosure. [Figure 11] This is a cross-sectional view of a plurality of microLEDs according to an aspect of the present disclosure. [Modes for carrying out the invention]

[0013] Detailed explanation The detailed description set forth below in connection with the accompanying drawings is intended as a description of various configurations and is not intended to represent only the configurations in which the concepts described herein may be implemented. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. It will be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known components are shown in block diagram form to avoid obscuring such concepts.

[0014] The present disclosure provides aspects of LEDs that enable improved efficiency of light emission within a desired wavelength range including various wavelengths within the visible spectrum including red, green, and blue wavelengths. The aspects presented herein enable the application of micro-LED technology that maintains high efficiency and emission within a specified wavelength range at a reduced device size. In some examples, the light emitters may have a size on the micron scale or even sub-micron scale.

[0015] FIG. 2 shows a top view of a portion of an LED array 200 including a number of micro-LED structures as components of an array for use in a display according to an aspect of the present disclosure. As shown in FIG. 2, the LED array 200 includes a plurality of micro-LED structures 210, 220, and 230 supported on a substrate 240, which, as an example, emit light at red, green, and blue wavelengths, respectively. Alternatively, all of the micro-LED structures may emit light within a single wavelength range such as the red wavelength range. Although FIG. 2 shows only a 4×4 array of LEDs, the LED array 200 may be a component of a larger array of light emitters forming, for example, a display, and the arrangement, shape, number, size, and corresponding wavelength of light emission of the pixels may be adjusted for a particular application. For example, for a particular application, circular or hexagonal light emitters may be implemented, and these light emitters may be grouped into two, three, or more groups. The display may be a high-resolution and high-density display such as one used in a light field application.

[0016] To define and shape the micro-LED structure of FIG. 2, processes such as planar epitaxial deposition and then etching as described above may be used. As an example, FIG. 3 shows a cross-sectional view of an epitaxial layer structure 300 for an LED. The epitaxial layer structure is essentially a kind of the micro-LED structure 100 shown in FIG. 1 and is a simplified larger plane. As shown in FIG. 3, the epitaxial layer structure 300 includes a semiconductor substrate or semiconductor template 310, and the semiconductor substrate or semiconductor template 310 supports one or more preparation layers 320 thereon. preparation On the layer 320, an active region 330 is formed, for example, by epitaxial deposition. In an embodiment, the active region 330 includes one or more quantum wells, quantum dots, or double heterojunction structures configured to emit light therefrom. In a particular embodiment, the active region 310 is an example of the active QW region 130. On the upper surface of the active region 330, a p layer 340 is formed. Each of the semiconductor substrate 310, preparation layer 320, active region 330, and p layer 340 may include multiple layers potentially incorporating various material compositions inside.

[0017] To define and shape an array of micro-LED structures from the epitaxial layer structure 300, dry or wet etching processes may be used. For example, a mask 350 may be deposited, printed, or formed on the epitaxial layer structure 300 over the area corresponding to the micro-LED structures. Then, a dry or wet etching process is used to remove the unprotected portion of the epitaxial layer structure 300 to a specific depth. In this way, the shapes of a plurality of micro-LED structures are defined and separated from the epitaxial layer structure 300. In an embodiment, the mask 350 is one or more material layers including a patterned array of through openings.

[0018] Figure 4 shows the results of a conventional etching process. Figure 4 shows cross-sectional views of multiple micro-LEDs 400 (indicated in curly braces) obtained as a result of selectively etching an LED epitaxial layer structure like the one shown in Figure 3. The multiple micro-LEDs 400 are separated by openings 410 etched to a depth of 412 (indicated by double arrows). In the conventional method described above, when forming the micro-LEDs 400, the depth 412 of the opening 410 is preparation It extends within layer 320', thereby isolating the active region 330' and the p-layer 340'. While it is required to isolate the p-layer 340' for each micro-LED 400 so that each micro-LED 400 can be individually electrically addressed, preparation It has been shown that etching into layer 320' to isolate the active region leads to a decrease in the internal quantum efficiency (IQE) of the resulting micro-LED 400 compared to the epitaxial layer structure 300, and a blue shift (i.e., a shift towards shorter emission wavelengths).

[0019] In contrast, Figure 5 shows a cross-sectional view of several microLEDs formed using an alternative method for separating microLEDs from the epitaxial layer structure shown in Figure 3, according to one embodiment. As shown in Figure 5, the microLEDs 500 (shown in curly braces) are formed by etching an opening 510, which is etched to a depth 512 (shown by double arrows). In other words, the opening 510 is etched into what was originally the p-layer 340, forming a thick substructure 542 and a thin substructure 544 within the opening 510, the thick substructure 542 defining the size and shape of the individual microLEDs 500. The thick substructure 542 is configured to electrically address the individual microLEDs 500, and the thin substructure 544 is configured to prevent the movement of free carriers through the thin substructure 544. Meanwhile, the active region 330 and preparationLayer 320 remains intact. In this way, the micro-LED 500 maintains the IQE and emission wavelength of the original epitaxial layer structure 300 in Figure 3, while having the shape factor of a micro-LED and operating as a isolated and individually addressable micro-LED. Furthermore, the active region 330 and remain intact. preparation The micro-LED 500, which includes layer 320, was shown to have a much higher light extraction efficiency (LEE) than the micro-LED 400 in Figure 4, which has a decoupled active region 330' and p-layer 340'.

[0020] The dimensions of the opening 510 shown in Figure 5 may be customized according to the spacing required between the micro-LEDs 500 for a particular application. For example, the spacing between the micro-LEDs 500 may be on the order of a fraction of a micron (e.g., for high-density micro-LED applications), 3 to 5 microns (e.g., for applications where additional structures are required between the micro-LEDs 500), or even wider (e.g., for low-density micro-LED applications). In certain embodiments, only a portion of a given semiconductor substrate contains micro-LEDs formed in the manner shown in Figures 3 and 5, thereby leaving space on the semiconductor substrate for different types of processing or device manufacturing.

[0021] As a specific example, a 0.5-micron layer of the p-layer 340 left on the upper surface of the active region 330 as a thin substructure 544 was shown to be sufficient to ensure that the thin substructure 544 within the opening 510 is depleted of free electron carriers, thus electrically isolating each micro-LED 500 from one another. For example, the p-layer 340 may be formed from a p-type material including an Al(In)GaN electron blocking layer (EBL). In this way, the p-layer is shaped into an array of substructures that define the shape and size of the micro-LEDs. Subsequently, each p-layer substructure corresponding to each micro-LED 500 can be individually accessed so that each micro-LED 500 can be controlled individually. The micro-LEDs 500 share a continuous active QW structure, maintaining the luminescence performance of the original planar LED structure of the epitaxial layer structure 300. Such a structure may be formed, for example, by performing shallow etching on the structure shown in Figure 3, and then stopping the etching process before reaching the active region 330.

[0022] Figure 6 shows a process for forming a microLED on a semiconductor substrate or semiconductor template according to one embodiment. As shown in Figure 6, the process 600 begins with a starting step 602, and then in step 610, on a semiconductor substrate or semiconductor template preparation Layers are deposited. In step 612, preparation An active region is formed on the layer, followed by the deposition of the p layer in step 614. In step 616, one or more mask structures are deposited on the p layer to define the size and shape of each microLED to be formed. Then, in step 620, a shallow etching process is performed to form the microLEDs, and in step 622, the mask structures are removed. The process 600 is terminated in the final step 630.

[0023] Step 620 may include, for example, monitoring the layer structure being etched to ensure that etching is stopped before the active region is exposed. For example, step 620 may include monitoring the precise etching depth (e.g., an optical device or other sensing device) to stop etching at a specific known depth to avoid etching into the active region. Alternatively, preparation If the layer includes a specific layer (such as an electron blocking layer) formed of a particular known material, the etching equipment may be configured to monitor that material (for example, using an optical device or other sensing device) and indicate that the etching process should be stopped when that particular known material is detected.

[0024] It should be noted that shallow etching processes are known in transistor technology, including heterojunction bipolar transistors (HBTs). For example, the use of passivation ledges in HBT formation has been discussed in the literature (see, for example, https: / / parts.jpl.nasa.gov / mmic / 3-V.PDF accessed 2020-12-21). However, this type of etching operation is not currently used for forming microLEDs.

[0025] Figures 7 to 9 show alternative micro-LED array structures. As shown in Figure 7, the semiconductor substrate or semiconductor template 310 is placed on it. preparationThe layer 320 and the active region 330 are supported. Then, instead of depositing the p-layer structure directly on the active region, an electron blocking layer 744 is deposited on the active region 330. Then, a mask 750 is formed on the electron blocking layer 744 to define the shape and size of the micro-LED to be formed. In one example, the mask 750 is essentially the negative of the mask 350 in Figure 3. In an embodiment, the mask 750 is one or more material layers containing a patterned array of through-apers, the size and shape of each aperture at least partially defining the size and shape of the micro-LED to be formed.

[0026] Referring to Figure 8, a p-layer 842 is deposited on top of the electron-blocking layer 744. The p-layer 842 may be configured to cooperate with the electron-blocking layer 744 to define the shape and size of the micro-LEDs, while enabling individual addressing of each micro-LED through the p-layer 842. Then, as shown in Figure 9, when the mask structure 750 is removed, the micro-LEDs 900, separated by the openings 910, remain. The micro-LEDs 900, like the micro-LED 500 in Figure 5, share a continuous active region while remaining individually addressable via the p-layer 842 and the electron-blocking layer 744, which prevents the movement of free electron carriers between adjacent micro-LEDs 900. Therefore, preparation The integrity of layer 320 and the active region 330 is preserved in their complete state, thereby preserving the IQE and emission wavelength of the original planar structure while defining individually addressable micro-LEDs.

[0027] Figure 10 shows an alternative process for forming microLEDs on a semiconductor substrate or semiconductor template as shown in Figures 7-9, according to an aspect of the present disclosure. As shown in Figure 10, process 1000 begins with a starting step 1002 and then forms one or more microLEDs on the semiconductor substrate or semiconductor template. preparation The process proceeds to step 1010, where layers are deposited. Then, in step 1012, preparationAn active region (e.g., an active QW region) is formed on the layer. In step 1014, an electron blocking layer is deposited on the active region. In step 1016, one or more mask structures are deposited on the electron blocking layer to define the shape and size of the microLED. Then in step 1020, an additional p layer is deposited. In step 1022, the mask structures are removed, and the process 1000 ends in the termination step 1030.

[0028] Figure 11 shows an alternative array of microLEDs formed on a semiconductor substrate or semiconductor template according to an aspect of the present disclosure. As shown in Figure 11, a plurality of microLEDs 1100A to 1100C separated by spacing 1105 are formed on a semiconductor substrate or semiconductor template 1110. Within each of the microLEDs 1100A to 1100C, one or more preparation Layer 1120, active region 1130, and one or more p layers 11 4There are two types of micro-LEDs. Each of the micro-LEDs 1100A to 1100C also has an electrical contact 1150 for electrically addressing that micro-LED. The spacing 1105 is shown to decouple adjacent micro-LEDs, including the active area 1130, and extend into the semiconductor substrate 1110, but note that each of the micro-LEDs 1100A to 1100C also includes a shallow step 1160. This may maximize the dimensions of the light-emitting portion (i.e., the active area 1130) of each micro-LED, while also allowing customization of the device space required for the electrical addressing of each of the micro-LEDs 1100A to 1100C to meet the requirements of a specific device application. Furthermore, in the configuration shown in Figure 11, all micro-LEDs may be configured to emit light in the same wavelength range, or each of the micro-LEDs 1100A to 1100C may be configured to emit light at different wavelengths. For example, microLED 1100A may be configured to emit light at a red wavelength, microLED 1100B may be configured to emit light at a green wavelength, and microLED 1100C may be configured to emit light at a blue wavelength. The shallow step 1160 may be incorporated into all microLEDs 1100A to 1100C, or into only specific microLEDs.

[0029] The techniques described above may be used in configurations in which multiple types of microLEDs (for example, configured to emit light in different wavelength ranges) are monolithically integrated on a common substrate. In one such embodiment, one or more of the microLEDs may be based on a shallow isolation structure formed by the shallow etching process described above. Furthermore, the shallow isolation structure may be combined with a conventional deep isolation structure (for example, shown in Figure 4) for different types of microLEDs. Such a deep isolation structure may be used, for example, outside the shallow isolation area. Such combinations of shallow and deep isolation structures may be optimized for specific desired properties of the microLEDs, such as optical isolation and light extraction.

[0030] While the techniques described above may be particularly attractive for the formation of microLEDs operating in the red wavelength range, the same techniques may be used to form microLEDs operating in other wavelength ranges, such as blue, green, and infrared. That is, the microLED structures presented herein enable higher efficiency over a wider range of wavelengths. For example, the embodiments presented herein may improve efficiency in longer wavelength emission while minimizing the blue shift from planar LED structures to microLED formats. It should be noted that the device configurations and techniques presented herein may be applicable to any semiconductor QW structures and devices.

[0031] Furthermore, the shallow etching technique described above may be used in combination with other micro-LED formation techniques. For example, additional micro-LEDs may be formed in the openings between micro-LEDs (e.g., openings 510 and 910) formed using the shallow etching technique. As an example, the shallow etching technique described above can be used to form a first set of micro-LEDs operating in a first wavelength range, leaving sufficient space between the first set of micro-LEDs, and additional micro-LEDs can be formed in the openings. The additional micro-LEDs may be configured to work in cooperation with the active regions of the first set of micro-LEDs to emit light in a wavelength range outside the first wavelength range. Alternatively, additional semiconductor devices (e.g., sensors, transistors, or other non-light-emitting devices) may be disposed in the openings between micro-LEDs formed using the shallow etching technique described above.

[0032] The preceding description is provided so that any person skilled in the art may carry out the various embodiments described herein. Various modifications to these embodiments will be readily apparent to a person skilled in the art, and the comprehensive principles defined herein may apply to other embodiments. Therefore, the claims are not intended to be limited to the embodiments shown herein, but should be given the entire scope consistent with the language of the claims. References to singular elements mean "one or more" and not "one and only" unless otherwise specified. Unless otherwise specified, the term "several" refers to one or more. Combinations such as "at least one of A, B, or C," "one or more of A, B, or C," "at least one of A, B, and C," "one or more of A, B, and C," and "A, B, C, or any combination thereof" may include any combination of A, B, and / or C, and may include many A's, many B's, or many C's. In particular, combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B, and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” may be A only, B only, C only, A and B, A and C, B and C, or A and B and C, and any such combination may encompass one or more components of A, B, or C. All structural and functional equivalents of elements of various aspects described throughout this disclosure, known to those skilled in the art and to be known thereafter, are expressly incorporated herein by reference and are intended to be covered by the claims. Furthermore, nothing disclosed herein, whether such disclosure is expressly stated in the claims or not, is intended to be made available to the public.

Claims

1. It comprises an array of micro light-emitting diodes (micro LEDs), and the array of micro LEDs is Semiconductor substrate and At least one preparation layer disposed on at least a portion of the semiconductor substrate, An active region disposed on the at least one preparatory layer, A thick substructure disposed on the active region, It includes a thin substructure disposed on the active region, the thin substructure being disposed adjacent to the thick substructure, The thick substructure defines the shape and size of at least one of the microLEDs in the array of microLEDs. A light-emitting system in which the thin substructure is configured to prevent the movement of free electron carriers through the thin substructure.

2. The light-emitting system according to claim 1, wherein the thin substructure includes an electron blocking layer.

3. The light-emitting system according to claim 1 or claim 2, wherein the thin substructure is formed of p-type Al(In)GaN.

4. The light-emitting system according to any one of claims 1 to 3, wherein the thickness of the thin substructure is less than 1 micron.

5. The light-emitting system according to claim 1, wherein the thickness of the thin substructure is approximately 0.5 microns.

6. The light-emitting system according to any one of claims 1 to 5, wherein the active region includes at least one of a quantum well structure, a plurality of quantum dots, and a double heterojunction structure.

7. A method for manufacturing an array of microlight-emitting diodes (microLEDs) on a semiconductor substrate, wherein the method is: Depositing at least one preparatory layer on at least a portion of the semiconductor substrate, Forming an active region on the aforementioned at least one preparatory layer, Depositing at least one p-layer on the active region, This includes depositing at least one mask structure on the at least one p layer, wherein the at least one mask structure is configured to define the size and shape of each of the arrays of micro-LEDs. The process includes partially etching away the at least one p-layer by thinning the region of the at least one p-layer not covered by the at least one mask structure to form a thick substructure and a thin substructure adjacent to the thick substructure, wherein the thick substructure defines the shape and size of at least one of the micro-LEDs in the array of micro-LEDs, and the thin substructure is configured to prevent the movement of free electron carriers through the thin substructure. A method comprising removing the at least one mask structure.

8. The method according to claim 7, wherein partially etching off the at least one p layer includes reducing the thickness of the at least one p layer to less than 1 micron in the area where the at least one p layer is not covered by the at least one mask structure.

9. The method according to claim 8, wherein reducing the thickness of the at least one p layer includes reducing the thickness of the at least one p layer to about 0.5 microns in the area where the at least one p layer is not covered by the at least one mask structure.

10. The combination of the semiconductor substrate, the at least one preparation layer, the active region, and the at least one p layer exhibits emission at a first wavelength. The method according to any one of claims 7 to 9, wherein each of the micro-LEDs emits light at the first wavelength after the removal of the at least one mask structure.

11. The combination of the semiconductor substrate, the at least one preparation layer, the active region, and the at least one p layer exhibits a first internal quantum efficiency (IQE) value at a given wavelength. The method according to any one of claims 7 to 10, wherein each of the microLEDs exhibits an IQE value substantially similar to the first IQE value at a given wavelength after the removal of the at least one mask structure.

12. The method according to any one of claims 7 to 11, wherein partially etching off the at least one p layer leaves the active region and the at least one preparatory layer intact.

13. The method according to any one of claims 7 to 12, wherein forming an active region comprises forming at least one of a quantum well structure, a plurality of quantum dots, and a double heterojunction structure.

14. Multiple microLEDs, Semiconductor substrate and At least one preparation layer disposed on at least a portion of the semiconductor substrate, An active region disposed on the at least one preparatory layer, An electron blocking layer disposed on the active region, It includes a first thick substructure disposed on the electron blocking layer, The first thick substructure is physically separated from the second thick substructure and defines the shape and size of one of the plurality of microLEDs. A plurality of micro-LEDs, wherein the electron blocking layer is configured to prevent the movement of free electron carriers through the electron blocking layer in order to electrically isolate the first thick substructure from the second thick substructure.

15. A method for manufacturing an array of microlight-emitting diodes (microLEDs) on a semiconductor substrate, wherein the method is: Depositing at least one preparatory layer on at least a portion of the semiconductor substrate, Forming an active region on the aforementioned at least one preparatory layer, Depositing an electron blocking layer on the aforementioned active region, Depositing at least one p-layer on the aforementioned electron blocking layer, The process includes depositing at least one mask structure on the at least one p layer, wherein the at least one mask structure is configured to define the size and shape of each of the micro-LEDs. The at least one p-layer is etched away without penetrating the electron-blocking layer, where the at least one p-layer is not covered by the at least one mask structure. A method comprising removing the at least one mask structure.

16. The plurality of microLEDs according to claim 14, wherein the electron blocking layer is formed of p-type Al(In)GaN.

17. The plurality of microLEDs according to claim 14, wherein the thickness of the electron blocking layer is less than 1 micron.

18. The plurality of microLEDs according to claim 14, wherein the thickness of the electron blocking layer is approximately 0.5 microns.

19. The plurality of microLEDs according to claim 14, wherein the active region includes at least one of a quantum well structure, a plurality of quantum dots, and a double heterojunction structure.

20. The light-emitting system according to claim 1, wherein the array of micro-LEDs shares the active region.

21. The light-emitting system according to claim 1, wherein the thick substructure is a first thick substructure, and the thin substructure is configured to prevent the movement of the free electron carriers through the thin substructure in order to electrically isolate the first thick substructure from the second thick substructure.

22. Semiconductor substrate and At least one preparation layer disposed on at least a portion of the semiconductor substrate, An active region disposed on the at least one preparatory layer, A plurality of micro-LEDs, each comprising a substructure having a thick portion and a thin portion, wherein the thin portion of the substructure is configured to prevent the movement of free electron carriers through the thin portion of the substructure.

23. The plurality of microLEDs according to claim 22, wherein the thin portion of the substructure is formed of p-type Al(In)GaN.

24. The plurality of microLEDs according to claim 22, wherein the thin portion of the substructure has a width smaller than the height of the thin portion of the substructure.

25. The plurality of microLEDs according to claim 22, wherein the thickness of the thin portion of the substructure is less than 1 micron.

26. The plurality of microLEDs according to claim 22, wherein the thickness of the thin portion of the substructure is approximately 0.5 microns.

27. The plurality of microLEDs according to claim 22, wherein the thin portion of the substructure is a first thin portion of the substructure, and the thick portion of the substructure is arranged between the first thin portion and the second thin portion of the substructure.

28. The plurality of microLEDs according to claim 22, wherein the active region includes at least one of a quantum well structure, a plurality of quantum dots, and a double heterojunction structure.

Images