Power conversion circuit control device

Abstract

To simplify the configuration of a device for controlling a plurality of power conversion circuits connected in parallel.SOLUTION: A control value calculation unit 20 executes: an operation amount determination process for determining an overall operation amount on the basis of the difference between a measured value of current flowing at a parallel connection end of a plurality of power conversion circuits connected in parallel and a current command value; a superposition process for individually superimposing a plurality of different disturbance signals on the overall operation amount to generate a plurality of disturbance-superimposed signals; an error extraction process for extracting one or more components corresponding to the plurality of different disturbance signals from the overall operation amount and determining one or more error components corresponding to the plurality of different disturbance signals; a correction coefficient determination process for determining a correction coefficient for each of the plurality of disturbance-superimposed signals on the basis of the error components; and a control variable determination process for performing a correction process using the correction coefficient on each of the plurality of disturbance-superimposed signals to determine an operation amount for each of the plurality of power conversion circuits.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a power conversion circuit control device, and more particularly to a device for controlling a plurality of power conversion circuits connected in parallel. [Background technology]

[0002] Power conversion circuits that couple two switching circuits with a transformer are widely used. For example, the electrical circuit installed in an electric vehicle is connected to the secondary switching circuit, while the commercial power supply is connected to the primary switching circuit. Because the primary and secondary switching circuits are electrically isolated by the transformer, handling the commercial power supply becomes easier, even when a high-output battery is installed.

[0003] Such power conversion circuits include those in which the power transmitted from the primary side to the secondary side is determined according to the difference between the switching phase of the primary side switching circuit and the switching phase of the secondary side switching circuit, as shown in Patent Document 1 below. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2022-160093 [Non-patent literature]

[0005] [Non-Patent Document 1] Yeh Ting, Sjoerd de Haan, Jan A. Ferreira: "Modular Single-active Bridge DC-DC Converters", IEEE IAS. Magazine, Vol. 22, No. 5, pp. 43-52 (2016) [Overview of the project] [Problems that the invention aims to solve]

[0006] When increasing the power supplied from a power conversion circuit to a load circuit, it becomes necessary to increase the voltage withstand or current allowable of the switching elements used in the power conversion circuit, which can make the design of the power conversion circuit difficult. Therefore, as described in Non-Patent Document 1, a parallel power conversion device in which multiple power conversion circuits are connected in parallel has been considered. However, in a parallel power conversion device, it is necessary to provide an ammeter for each power conversion circuit in order to control each power conversion circuit, which can make the configuration of the device that controls the parallel power conversion device complex.

[0007] The present invention aims to simplify the configuration of a device that controls multiple power conversion circuits connected in parallel. [Means for solving the problem]

[0008] The present invention is characterized by performing the following: an operation quantity determination process that determines a total operation quantity based on the difference between the measured value of the current flowing at the parallel connection terminals of a plurality of parallel-connected power conversion circuits and a current command value; a superposition process that generates a plurality of disturbance superposition signals by individually superimposing a plurality of different disturbance signals onto the total operation quantity; an error extraction process that extracts one or more components corresponding to the plurality of different disturbance signals from the total operation quantity and determines one or more error components corresponding to the plurality of different disturbance signals; a correction coefficient determination process that determines a correction coefficient for each of the plurality of disturbance superposition signals based on the error components; and an operation quantity determination process that determines an operation quantity for each of the plurality of power conversion circuits by applying a correction process using the correction coefficient to each of the plurality of disturbance superposition signals.

[0009] Preferably, the multiple disturbance signals are represented by an orthogonal sequence of functions.

[0010] Preferably, the multiple disturbance signals are represented by a plurality of mutually orthogonal trigonometric functions.

[0011] Preferably, the multiple disturbance signals are represented by multiple disturbance functions, where there is a time period in which the value of one function is active and the values ​​of the other functions are inactive, and each function becomes active one by one as time progresses.

[0012] Preferably, the plurality of disturbance signals are a plurality of signals obtained by applying a low-pass filter to each of the plurality of signals represented by the plurality of disturbance functions.

[0013] Preferably, the error extraction process includes a process of extracting each error component from the total manipulated variable by multiplying a value based on the total manipulated variable by a plurality of disturbance signals.

[0014] Preferably, the error extraction process calculates the average value of a plurality of multiplied values ​​obtained by multiplying the value based on the total manipulated variable by a plurality of disturbance signals, and then calculates each error component by subtracting the average value from each of the plurality of multiplied values.

[0015] Preferably, the correction coefficient determination process includes a process of performing a time integral over each error component and determining each correction coefficient based on each monotonically increasing function whose independent variable is a value based on the time integral value of each error component.

[0016] Preferably, the system includes a switching control unit that controls each of the multiple power conversion circuits based on the manipulated variable for each of the power conversion circuits, each power conversion circuit comprising a primary-side switching circuit and a secondary-side switching circuit coupled by a transformer, and the switching control unit controls the difference between the switching phase of the primary-side switching circuit and the phase of the secondary-side switching circuit based on the manipulated variable. [Effects of the Invention]

[0017] According to the present invention, the configuration of a device that controls multiple power conversion circuits connected in parallel can be simplified. [Brief explanation of the drawing]

[0018] [Figure 1] This is a diagram showing the configuration of a parallel power converter. [Figure 2] This diagram shows the configuration of a parallel-type power converter in which three power conversion circuits are connected in parallel. [Figure 3] This is a diagram showing the computational model of a power conversion system. [Figure 4] This figure shows an example configuration of a power conversion system equipped with three power conversion circuits. [Figure 5] This is a diagram showing the configuration of a power conversion system. [Figure 6] This is a diagram showing the configuration of a power conversion system. [Figure 7] This figure shows the results of a simulation conducted on a power conversion system. [Figure 8] This figure shows the results of a simulation conducted on a power conversion system. [Modes for carrying out the invention]

[0019] Embodiments of the present invention will be described with reference to the figures. Identical components shown in multiple drawings are denoted by the same reference numerals to simplify their description. The terms used in each figure to indicate directions such as "up" and "down" are for illustrative purposes only and do not limit the orientation of each component when it is positioned.

[0020] Figure 1 shows the configuration of a parallel power converter 100 according to the basic technology of the present invention. The parallel power converter 100 comprises a plurality (N) of power conversion circuits 10-1 to 10-N connected in parallel. Here, parallel connection means that one input terminal of each power conversion circuit 10-i (i=1 to N) and the other input terminal of each power conversion circuit 10-i are connected to each other in common, and one output terminal of each power conversion circuit 10-i and the other output terminal of each power conversion circuit 10-i are connected to each other in common.

[0021] The positive input terminal Tp1, which is one of the pair of input terminals of each power conversion circuit 10-i, is commonly connected to the parallel terminal TP1, and the negative input terminal Tg1, which is the other of the pair of input terminals of each power conversion circuit 10-i, is commonly connected to the parallel terminal TG1. The positive output terminal Tp2, which is one of the pair of output terminals of each power conversion circuit 10-i, is commonly connected to the parallel terminal TP2, and the negative output terminal Tg2, which is the other of the pair of output terminals of each power conversion circuit 10-i, is commonly connected to the parallel terminal TG2.

[0022] A DC power source 200 is connected to parallel terminals TP1 and TG1 (a pair of parallel connection terminals). A load circuit 202 is connected to parallel terminals TP2 and TG2 (a pair of parallel connection terminals). Each power conversion circuit 10-i switches, boosting or stepping down the DC voltage output from the DC power source 200 and outputting it to the load circuit 202. This supplies DC power from the DC power source 200 to the load circuit 202. The boosting or stepping down of each power conversion circuit 10-i applies an appropriate voltage to the load circuit 202. Furthermore, by connecting multiple power conversion circuits 10-1 to 10-N in parallel, each power conversion circuit 10-i may use electrical circuit elements with low voltage withstand or current allowable.

[0023] Figure 2 shows the configuration of a parallel power converter 101 in which three power conversion circuits 10-1 to 10-3 are connected in parallel. Each of the power conversion circuits 10-1 to 10-3 includes a primary-side switching circuit 12 and a secondary-side switching circuit 14. The primary-side switching circuit 12 includes parallel-connected switching bridges X1 and Y1. Switching bridge X1 includes series-connected switching elements S1 and S2. Switching bridge Y1 includes series-connected switching elements S3 and S4. Switching elements S1 to S4 may be IGBTs (Insulated Gate Bipolar Transistors) or MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). Two IGBTs are connected in series when the emitter terminal of one IGBT is connected to the collector terminal of the other IGBT. Two MOSFETs are connected in series when the source terminal of one MOSFET is connected to the drain terminal of the other MOSFET.

[0024] The primary switching circuit 12 further includes a capacitor C1 connected in parallel to switching bridges X1 and Y1. The upper parallel connection terminals of switching bridge X1, switching bridge Y1, and capacitor C1 are connected to the positive input terminal Tp1, and the lower parallel connection terminals are connected to the negative input terminal Tg1.

[0025] Switching elements S1 and S2 alternately switch on and off. That is, when switching element S1 switches from off to on, switching element S2 switches from on to off, and when switching element S1 switches from on to off, switching element S2 switches from off to on. Similarly, switching elements S3 and S4 alternately switch on and off. Switching elements S1 and S3 switch with a predetermined phase difference, for example, a phase difference of 180°.

[0026] The primary switching circuit 12 further includes an inductor L1. One end of the inductor L1 is connected to the connection point of switching elements S1 and S2, and the other end is connected to the connection point of switching elements S3 and S4.

[0027] The secondary switching circuit 14 comprises a switching bridge X2, a switching bridge Y2, a capacitor C2, and an inductor L2. The circuit configuration of the secondary switching circuit 14 is the same as that of the primary switching circuit 12. Switching bridges X2, Y2, capacitor C2, and inductor L2 correspond to switching bridges X1, Y1, capacitor C1, and inductor L1, respectively. Inductors L1 and L2 are magnetically coupled to form the transformer 15. The upper parallel connection terminals of switching bridges X2, Y2, and capacitor C2 are connected to the positive output terminal Tp2, and the lower parallel connection terminals are connected to the negative output terminal Tg2.

[0028] The inductor L1 of the primary-side switching circuit 12 in each of the power conversion circuits 10-1 to 10-3 may constitute a first connector. The inductor L2 of the secondary-side switching circuit 14 in each of the power conversion circuits 10-1 to 10-3 may constitute a second connector that is detachably attached to the first connector. By bringing the first connector and the second connector close together or mechanically coupling them, a transformer 15 is formed in each of the power conversion circuits 10-1 to 10-3.

[0029] The power transmitted from the primary switching circuit 12 to the secondary switching circuit 14 is determined according to the phase difference between the switching of the primary switching circuit 12 and the switching of the secondary switching circuit 14. An ammeter 13 is connected to the parallel terminal TP2. The ammeter 13 measures the current flowing through the parallel terminal TP2, and the total current I out Output the measured value. Here, the total current I out This refers to the current I1~I flowing out from the positive output terminal Tp2 of the power conversion circuit 10-1~10-N. NThis is the sum of the currents.

[0030] Figure 2 shows a parallel power converter 101 in which three power conversion circuits 10-1 to 10-3 are connected in parallel. However, the parallel power converter 101 may have a circuit configuration in which two or more power conversion circuits 10-i having the circuit configuration shown in Figure 2 are connected in parallel.

[0031] In this case as well, the inductors L1 of the primary-side switching circuits 12 provided in the multiple power conversion circuits 10-i may constitute a single first connector. The inductors L2 of the secondary-side switching circuits 14 provided in the multiple power conversion circuits 10-i may constitute a single second connector. The first connector and the second connector are brought close together or mechanically coupled to form a transformer 15 in each power conversion circuit 10-i.

[0032] Furthermore, the primary-side switching circuit 12 and the secondary-side switching circuit 14 may be configured in such a way that the power transmitted from the primary side to the secondary side is determined according to the difference between the switching phase of the primary-side switching circuit 12 and the switching phase of the secondary-side switching circuit 14.

[0033] Figure 3 shows a calculation model of a power conversion system 104 according to an embodiment of the present invention. The power conversion system 104 comprises a parallel power converter 100 and a power conversion circuit control device 102. The parallel power converter 100 comprises power conversion circuits 10-1 to 10-N and an adder 24. The power conversion circuits 10-1 to 10-N each have a phase difference δ1 to δ N Controlled by this, the current I1~I N These outputs are respectively. Here, the power conversion circuit 10-i has a phase difference δ i Controlled by the phase difference δ of the switching phase difference between the primary switching circuit 12 and the secondary switching circuit 14. i This refers to the control being performed to approach or match a certain value. The summer 24 is a virtual component in the calculation model, and the currents I1~I NAdd them up to obtain the total current I out and output it.

[0034] The current I i is expressed as follows using the phase difference δ i .

[0035] [Equation]

[0036] However, k is the coupling coefficient of inductors L1 and L2, V in is the DC voltage applied to the positive input terminal Tp1 and the negative input terminal Tg1, ω is the switching angular frequency, and L is the inductance of inductors L1 and L2. G is the gain obtained by summarizing the variables multiplied before δ in the central equation. For V in (Equation 1), in each variable except V is a unique value for each power conversion circuit 10-i. Although each variable except in V may be suffixed with "i" as a subscript, the subscript "i" is omitted for simplicity of notation. The function f(δ) shown in each power conversion circuit 10-i in FIG. 3 is expressed by the following (Equation 2).

[0037] [Equation]

[0038] Also, when u = f(δ), the inverse function f -1 (u) of f(δ) is expressed by the following (Equation 3).

[0039] [Equation]

[0040] Here, sgn(u) is the sign function that becomes +1 when u is positive and -1 when u is negative.

[0041] The power conversion circuit control device 102 includes a subtractor 16, a proportional-integral controller 18, a control value calculation unit 20, and switching control units 22-1 to 22-N. The power conversion circuit control device 102 may include a processor that executes a program to realize the functions of each component (subtractor 16, proportional-integral controller 18, control value calculation unit 20, and switching control units 22-1 to 22-N).

[0042] The subtractor 16 receives the total current I from the ammeter 13 connected to the parallel terminal TP2 of the parallel power converter 100. out Measured value (hereinafter simply referred to as total current I out (This is what is obtained.) Total current I out This indicates the current flowing out from the parallel power converter 100. The subtractor 16 also shows the total current I. out The target value for the current command is I ref Obtain the current command value I. ref The power conversion circuit control device 102 may obtain this information from other control devices.

[0043] The subtractor 16 and the proportional-integral controller 18 control the total current I out and current command value I ref Based on the difference, the manipulated variable determination process is executed to determine the total manipulated variable v. That is, the subtractor 16 determines the current command value I ref Total current I out The current error d is calculated by subtracting the value and output to the proportional-integral controller 18. The proportional-integral controller 18 integrates the current error d over a predetermined time, and calculates the total manipulated variable v by multiplying the time integral value obtained and the value of the current error d by a predetermined coefficient and taking the sum, and outputs it to the control value calculation unit 20. Based on the total manipulated variable v, the control value calculation unit 20 calculates the manipulated variable u for each power conversion circuit 10-i. i The phase difference δ is calculated and output to the switching control unit 22-i. The switching control unit 22-i calculates the phase difference δ based on (Equation 3). i We determine the phase difference δ of the power conversion circuit 10-i. i It is controlled by this.

[0044] In addition, a controller that performs proportional control (P control) or a controller that performs proportional-integral-derivative control (PID control) may be used instead of the proportional-integral-integral controller 18 that performs such proportional-integral control (PI control). A controller that performs P control calculates the total manipulated variable v by multiplying the current error d by a predetermined coefficient and outputs it to the control value calculation unit 20. A controller that performs PID control obtains a time integral value by integrating the current error d over a predetermined time and also obtains a derivative value by performing a derivative operation on the current error d. A controller that performs PID control calculates the total manipulated variable v by multiplying the time integral value, the time derivative value, and the value of the current error d by a predetermined coefficient and taking the sum, and outputs it to the control value calculation unit 20.

[0045] The control value calculation unit 20 calculates the currents I1 to I output by the power conversion circuits 10-1 to 10-N through the process described below. N To ensure uniformity, manipulated variables u1~u are controlled at a predetermined feedback cycle. N We repeatedly search for this.

[0046] Figure 4 shows an example configuration of a power conversion system 106 equipped with three power conversion circuits 10-1 to 10-3. The control value calculation unit 20a includes a disturbance generation unit 30, superimposing units 32-1 to 32-3, multipliers 34-1 to 34-3, error extraction processing unit 36, integration processing unit 38, two-phase to three-phase conversion unit 40, and function processing unit 42.

[0047] The disturbance generator 30 outputs three disturbance signals Δ1 to Δ3, shown in (Equation 4), to the superimposing units 32-1 to 32-3, respectively. The disturbance signals Δ1 to Δ3 are sine or cosine functions with respect to time t and frequency f, with a phase difference of 120° (2π / 3). The frequency f is the reciprocal of the period 1 / f, which is the manipulated quantities u1 to u N This can be determined to be longer than the feedback period that is repeatedly required.

[0048]

number

[0049] The superimposing units 32-1 to 32-3 individually add (superimpose) the disturbance signals Δ1 to Δ3 to the total manipulated variable v, and output the disturbance superimposed signals v1 to v3 to the multipliers 34-1 to 34-3, respectively.

[0050] The error extraction processing unit 36 ​​performs an error extraction calculation on the total manipulated variable v as shown in (Equation 5), and the gain error rate G error:a and G error:b The gain error rate G is calculated and output to the integration processing unit 38. error:a and G error:b This corresponds to the error component that is included in the overall manipulated variable v after feedback, due to the superposition of disturbance signals Δ1 to Δ3 on the overall manipulated variable v.

[0051]

number

[0052] Note that G in (Mathematics 5) error:a This is obtained by multiplying the total manipulated variable v by cos(2πft) and extracting the DC component using a low-pass filter (LPF). error:b This can be obtained by multiplying the total manipulated variable v by sin(2πft) and extracting the DC component using a low-pass filter (LPF).

[0053] The integration processing unit 38 calculates the gain error rate. Gerror:a and G error:b Each of these is integrated over a predetermined time, and the resulting time integral value is multiplied by a predetermined proportionality constant (gain) to obtain a gain correction amount K. a and K b The gain correction amount K is calculated and output to the 2-phase 3-phase conversion unit 40. In Figure 4, the integral operation is represented in the s-domain of the Laplace transform. T is a constant determined by the proportionality constant. The 2-phase 3-phase conversion unit 40 calculates the gain correction amount K. a and K b For this, the 2-phase to 3-phase conversion shown in (Equation 6) is performed, and the 3-phase gain correction amount K c1 , K c2 and K c3 The result is calculated and output to the function processing unit 42.

[0054]

number

[0055] The function processing unit 42 calculates the gain correction amount K according to (equation 7). c1 ~K c3 The manipulated variable correction coefficients K1 to K3 are determined as exponential values ​​for .

[0056]

number

[0057] When determining the manipulated variable correction coefficients K1 to K3, instead of using an exponential function, use the gain correction amount K c1 ~K c3 Other monotonically increasing functions (functions whose derivative is positive) with respect to the variable may also be used. The function processing unit 42 outputs the manipulated variable correction coefficients K1 to K3 to the multipliers 34-1 to 34-3, respectively.

[0058] Thus, the integration processing unit 38, the two-phase to three-phase conversion unit 40, and the function processing unit 42 perform a correction coefficient determination process to determine the correction coefficients for each of the three superimposed disturbance signals based on the error component of the total manipulated variable v based on the disturbance signals Δ1 to Δ3, thereby determining the manipulated variable correction coefficients K1 to K3.

[0059] Multipliers 34-1 to 34-3 apply a correction process to the disturbance superimposed signals v1 to v3 using manipulated variable correction coefficients K1 to K3 to generate manipulated variables u1 to u3. That is, multipliers 34-1 to 34-3 multiply the disturbance superimposed signals v1 to v3 by the manipulated variable correction coefficients K1 to K3, respectively, to generate manipulated variables u1 to u3, and output them to switching control units 22-1 to 22-3, respectively. Switching control units 22-1 to 22-3 determine the phase difference δ1 to δ3, respectively, based on (Equation 3). Switching control units 22-1 to 22-3 control the power conversion circuits 10-1 to 10-3, respectively, with the phase difference δ1 to δ3.

[0060] The control value calculation unit 20a calculates the total current I out and current command value I ref Based on this, the process of determining the manipulated variables u1 to u3 is repeatedly executed at a predetermined feedback period. The switching control units 22-1 to 22-3 control the power conversion circuits 10-1 to 10-3 based on the manipulated variables u1 to u3 that have been determined sequentially over time. As a result, the currents I1 to I3 output by the power conversion circuits 10-1 to 10-3 converge to the same value and become uniform.

[0061] As described above, if the inductor L1 of the primary-side switching circuit 12 provided in each of the power conversion circuits 10-1 to 10-3 constitutes the first connector, and the inductor L2 of the secondary-side switching circuit 14 provided in each of the power conversion circuits 10-1 to 10-3 constitutes the second connector, the first and second connectors may be misaligned during coupling. According to this embodiment, even if a coupling misalignment occurs between the first and second connectors, and variations occur in the coupling coefficient of the transformer 15 in each power conversion circuit, the current input to each power conversion circuit, or the current output from each power conversion circuit, will be made uniform.

[0062] This section explains the principle by which the currents I1 to I3 output by the power conversion circuits 10-1 to 10-3 converge to the same value. out The current command value I ref If it follows this, then (equation 8) holds true.

[0063]

number

[0064] Solving (Equation 8) for the total manipulated variable v yields (Equation 9).

[0065]

number

[0066] Here, the average of K1G1, K2G2, and K3G3 is G meanLet the gain error rate G error1 , G error2 , and G error3 Define it as shown in (Equation 10).

[0067]

number

[0068] By utilizing the fact that the sum of the disturbance signals Δ1, Δ2, and Δ3, which are three-phase AC signals, is 0, we can eliminate K1G1, K2G2, and K3G3 from (Equation 9) and (Equation 10) to obtain (Equation 11).

[0069]

number

[0070] The second term on the right-hand side of (Equation 11) is the gain error rate G. error1 , G error2 , and G error3 It is 0 when is 0, and has a non-zero AC component otherwise. That is, the second term on the right-hand side is the gain error rate G. error1 , G error2 , and G error3 It contains the following information. From this, each gain error rate G error1 , G error2 , and G error3 It is associated with G as follows: error:a and G error:b It is possible to estimate this.

[0071] Gain error rate G error1 , G error2 , and G error3 And, G error:a and G error:b The relationship with the gain error rate G will be explained. error1 , G error2 , and G error3 This is interpreted as a symmetric three-phase AC where the sum of these is 0. Gain error rate G error1 , G error2 , and G error3This is the formula for 2-phase to 3-phase conversion and the gain error rate G error:a and G error:b Therefore, it can be expressed as (number 12).

[0072]

number

[0073] Similarly, disturbance signals Δ1~Δ3 are orthogonal two-phase components Δ a and Δ b Therefore, it can be expressed as (number 13).

[0074]

number

[0075] By substituting the left-hand sides of (Equation 12) and (Equation 13) into (Equation 11), we obtain (Equation 14).

[0076]

number

[0077] Furthermore, from (Equation 4) and (Equation 13), we obtain (Equation 15).

[0078]

number

[0079] By substituting (Equation 15) into (Equation 14), we obtain (Equation 16).

[0080]

number

[0081] In (Equation 16), the cosine wave component and the sine wave component included in the total manipulated variable v are, respectively, the gain error rate G. error:a and G error:bis shown. From (Equation 16), the gain error rates G error:a and G error:b are understood to be obtained by (Equation 5).

[0082] The gain error rates G error:a and G error:b correspond to the error components corresponding to each of the disturbance signals Δ a and Δ b obtained by three-phase to two-phase conversion of the disturbance signals Δ1 to Δ3. This error component corresponds to the error included in the disturbance superimposed signal due to the superimposition of the disturbance signals Δ1 to Δ3 on the total operation amount v. The gain error rates G error:a and G error:b as error components are extracted from the total operation amount v by (Equation 5).

[0083] In the power conversion system 106 shown in FIG. 4, the two-phase gain error rates G error:a and G error:b are extracted, and the two-phase gain error rates G error:a and G error:b are time-integrated to obtain the two-phase gain correction amounts K a and K b Furthermore, by the two-phase to three-phase conversion unit 40, the two-phase gain error rates G error:a and G error:b are converted into the three-phase gain correction amounts K c1 to K c3 and the three-phase gain error rates G c1 to K c3 respectively, and the three-phase operation amount correction coefficients K1 to K3 are obtained by the function processing unit 42 from each of the gain correction amounts K

[0084] Thus, in the power conversion system 106, the three-phase gain error rates G error:1 to G error:3 are not directly obtained, but the two-phase gain error rates G error:a to G error:b are obtained, and the two-phase gain error rates G error:a and G error:bThe three-phase control variable correction coefficients K1 to K3 are determined from this. Since the calculation process for determining the three-phase control variable correction coefficients K1 to K3 is performed for two phases, the calculation process is simplified.

[0085] Thus, the reason why the directly obtainable value can be the value for two phases is the gain error rate G. error:1 ~G error:3 This is because there is a constraint that the sum of the gain error rate G is 0. error:1 ~G error:3 One of these is represented by the other two values, and the gain error rate G error:1 ~G error:3 This is because it actually contains information for two values.

[0086] Next, the operational stability of the power conversion system 106 will be described. From (Equation 7), (Equation 10), and (Equation 12), the following (Equation 17) is obtained.

[0087]

number

[0088] G1exp(K c1 )=G2exp(K c2 )=G3exp(K c3 By Taylor expanding (Equation 17) around a point that satisfies ), we obtain (Equation 18).

[0089]

number

[0090] Substitute (Equation 6) into (Equation 18) and get K c1 ~K c3 By removing and rearranging the expression, we obtain (Equation 19).

[0091]

number

[0092] The processing performed by the integration processing unit 38 results in (Equation 20), and from (Equation 19) and (Equation 20), the gain correction amount K is obtained. a and K b By eliminating (number 21), we obtain (number 21).

[0093]

number

[0094]

number

[0095] This formula is G error:a and G error:b However, this indicates that it converges exponentially to 0 with respect to the time constant T. Therefore, it can be said that the operation of the power conversion system 106 is stable.

[0096] Figure 5 shows the configuration of a power conversion system 108 according to a second embodiment of the present invention. The power conversion system 108 is a generalization in which the number of power conversion circuits 10-i to be controlled is N (where N is an integer of 2 or more).

[0097] The control value calculation unit 20b, which constitutes the power conversion system 108, includes a disturbance generation unit 31, superimposing units 32-1 to 32-N, multipliers 34-1 to 34-N, a manipulated variable adjustment unit 44, an error extraction processing unit 48, an integration processing unit 50, an N-1 phase N-phase conversion unit 52, and a function processing unit 54.

[0098] The disturbance generation unit 31 generates N disturbance signals Δ1 to Δ N These are output to the superimposing units 32-1 to 32-N, respectively. Here, the disturbance signals Δ1 to Δ N This is a sequence of N-1 orthogonal functions φ1~φ N-1 And, using a regular matrix A, it can be expressed as (Equation 22).

[0099]

number

[0100] The superimposing units 32-1 to 32-N are controlled by the total manipulated variable v and the disturbance signal Δ1 to Δ N Each of these is added (superimposed) individually, and the disturbance superimposed signals v1~v N These are output to multipliers 34-1 to 34-N, respectively.

[0101] The control unit 44 includes a high-pass filter (HPF) and a coefficient multiplier 46. The high-pass filter (HPF) removes the DC component from the total control unit v, resulting in a total control unit w ac The coefficient multiplier 46 generates the total manipulated variable w. ac Multiply this by a constant value -1 / Δ to obtain the total manipulated variable v ac =-w ac The / Δ value is output to the error extraction processing unit 48.

[0102] The error extraction processing unit 48 processes the total manipulated variable v ac For this, an error extraction calculation process as shown in (Equation 23) is performed, and the gain error rate g error:1 ~g error:N-1 The result is calculated and output to the integration processing unit 50.

[0103]

number

[0104] Gain error rate g error:1 and g error:N-1 This is the disturbance signal Δ1~Δ N The orthogonal function sequence φ1~φ obtained by transforming it with the inverse matrix of the invertible matrix A. N-1 This corresponds to the error component corresponding to each of the above. This error component is the total manipulated variable v multiplied by the disturbance signal Δ1~Δ N This corresponds to the error that has been included in the disturbance-supervised signal due to its superposition. The gain error rate g is the error component. error:1 ~g error:N-1 This is extracted from the total manipulated variable v by (equation 23).

[0105] The integration processing unit 50 calculates the gain error rate g error:1 ~g error:N-1Each of these is integrated over a predetermined time, and the resulting time integral value is multiplied by a predetermined proportionality constant to obtain the gain correction amount K. d1 ~K dN-1 The gain correction amount K is calculated and output to the N-1 phase N-phase conversion unit 52. In Figure 5, the integral operation is represented in the s domain of the Laplace transform. The N-1 phase N-phase conversion unit 52 calculates the gain correction amount K. d1 ~K dN-1 For this, an N-1 phase N-phase conversion is performed as shown in (Equation 24), and the gain correction amount K of the N phase is applied. c1 ~K cN The result is calculated and output to the function processing unit 54.

[0106]

number

[0107] Here, the sign "t" superimposed on the upper right of A indicates that it is the transpose of A, and the sign "-1" is A t We will show that it is the inverse matrix of .

[0108] The function processing unit 54 controls the gain correction amount K. c1 ~K cN The manipulated variable correction coefficients K1~K are obtained by substituting each of these into the independent variable x of the monotonically increasing function h(x). N We will find the following. Here, the monotonically increasing function h(x) can be, for example, the exponential function exp(x).

[0109] Thus, the integration processing unit 50, the N-1 phase N phase conversion unit 52, and the function processing unit 54 perform a correction coefficient determination process to determine correction coefficients for each of the N disturbance superimposed signals based on the error component of the total manipulated variable v, and manipulated variable correction coefficients K1~K N We seek.

[0110] The multipliers 34-1 to 34-N are used to superimpose disturbance signals v1 to v N For this, the manipulated variable correction coefficients K1~K N A correction process is applied using the manipulated variables u1~u N This generates the following: In other words, the multipliers 34-1 to 34-N generate the disturbance superimposed signals v1 to vN The respective control variable correction coefficients K1 to K N Multiply by and control the manipulated variables u1~u N These are generated and output to switching control units 22-1 to 22-N, respectively. Switching control units 22-1 to 22-N each generate a phase difference δ1 to δ based on (Equation 3). N The following is determined. The switching control units 22-1 to 22-N each control the power conversion circuits 10-1 to 10-N with a phase difference δ1 to δ. N It is controlled by this.

[0111] The control value calculation unit 20b calculates the total current I out and current command value I ref Based on this, the manipulated variables u1~u N The process of determining the manipulated variables u1 to u is repeatedly executed at a predetermined feedback period. The switching control units 22-1 to 22-N sequentially determine the manipulated variables u1 to u as time progresses. N Based on this, the power conversion circuits 10-1 to 10-N are controlled. This controls the currents I1 to I output by the power conversion circuits 10-1 to 10-N. N These converge to the same value and become uniform.

[0112] The ammeter used in this control is for total current I out Only those measuring the current are required. Therefore, the number of ammeters used in the power conversion system 108 is reduced, and the configuration is simplified.

[0113] Furthermore, as described above, if the inductor L1 of the primary-side switching circuit 12 provided in each of the power conversion circuits 10-1 to 10-N constitutes one first connector, and the inductor L2 of the secondary-side switching circuit 14 provided in each of the power conversion circuits 10-1 to 10-N constitutes one second connector, the first and second connectors may be misaligned during coupling. According to this embodiment, even if a coupling misalignment occurs between the first and second connectors, and variations occur in the coupling coefficient of the transformer 15 in each power conversion circuit, the current input to each power conversion circuit, or the current output from each power conversion circuit, will be made uniform.

[0114] The current I1 to I output from the power conversion circuit 10-1 to 10-N N The principle by which the total current I converges to the same value will be explained. out The current command value I ref If it follows this pattern, then (Equation 25) holds as a generalized expression of (Equation 9).

[0115]

number

[0116] Disturbance signal Δ1~Δ N By using a sum of 0, the third term on the right-hand side of (Equation 25) becomes 0. Also, when a high-pass filter is applied to the total manipulated variable v, the first term on the right-hand side of (Equation 25) becomes 0. Under these conditions, the total manipulated variable v ac Equation (26) is obtained as the expression representing this.

[0117]

number

[0118] Total manipulated quantity v ac Therefore, the gain error rate G error:1 ~G error:N As a method for determining the disturbance signal Δ1~Δ N Some systems represent the signal as an orthogonal function sequence, while others represent the signal as a sequence of functions to which a constant is added to each function forming the orthogonal function sequence. In this case, the gain error rate G error:i (i=1~N) represents the total manipulated variable v ac Disturbance signal Δ included i It is required as an ingredient.

[0119] Disturbance signal Δ i This is a regular matrix A and an orthogonal function sequence φ1~φ N-1 It can be expressed as (Mathematics 27) using .

[0120]

number

[0121] By substituting (Equation 27) into (Equation 26), we obtain (Equation 28).

[0122]

number

[0123] Due to the properties of orthogonal function sequences, the total manipulated variable v ac The orthogonal function sequence φ1~φ included N-1 Each component g error:1 ~g error:N-1 However, it can be expressed as shown in (Equation 29) below.

[0124]

number

[0125] Since the sum of the gain error rates is 0, (Equation 30) holds if we set the Nth column of the invertible matrix A to have the same value.

[0126]

number

[0127] By combining (Equation 29) and (Equation 30), we obtain (Equation 31).

[0128]

number

[0129] (Equation 31) Gain error rate G error:1 ~G error:N By solving for this, we can find the gain error rate G error:1 ~G error:N (Equation 32) is obtained, which represents this.

[0130]

number

[0131] (Equation 32) contains the gain error rate G error:1 ~G error:N However, the gain error rate g error:1 ~g error:N-1 It has been shown that it can be expressed using a regular matrix A. As is clear from (Equation 29) and (Equation 32), the gain error rate G error:1 ~G error:N This involves the total manipulated variable v, where each component of the N-1 orthogonal function sequence is a factor. ac It is represented based on what is extracted from it.

[0132] In the power conversion system 108 shown in Figure 5, the total manipulated quantity v ac The gain error rate g of the N-1 phase error:1 ~g error:N-1 The gain error rate g of the N-1 phase is extracted. error:1 ~g error:N-1 This is integrated over time to obtain the gain correction amount K for the N-1 phase. d1 ~K dN-1 Furthermore, the N-1 phase N-phase conversion unit 52 provides the gain error rate g of the N-1 phase. error:1 ~g error:N-1 The gain correction amount K is for the N phase. c1 ~K cN Converted to gain correction amount K c1 ~K cN From each of these, the function processing unit 54 calculates the N-phase control variable correction coefficients K1 to K N This is required.

[0133] Thus, in the power conversion system 108, the gain error rate G of the N phase error:1 ~G error:N This cannot be directly determined, and the gain error rate g of the N-1 phase error:1 ~g error:N-1 The gain error rate g of the N-1 phase is then determined. error:1 ~g error:N-1 From the N-phase control variable correction coefficient K1~K N The following is required: N-phase manipulated variable correction coefficient K1~K N Since the calculation process involves N-1 phases of computation, the computation process is simplified.

[0134] Thus, the reason why the directly obtainable value can be the value for N-1 phases is that the gain error rate G error:1 ~G error:N This is because there is a constraint that the sum of the gain error rate G is 0. error:1 ~G error:N One of these is represented by the other N-1 values, and the gain error rate G error:1 ~G error:N This is because it actually contains information on N-1 values.

[0135] Orthogonal function sequence φ1~φ N-1 These can be multiple mutually orthogonal trigonometric functions. When there are three power conversion circuits, the orthogonal functions φ1 and φ2 and the invertible matrix A can be shown, for example, by (Equation 33) as follows.

[0136]

number

[0137] When there are two power conversion circuits, the function φ1 and the invertible matrix A can be shown, for example, by (equation 34) as follows:

[0138]

number

[0139] In this case, the disturbance signal is represented by (Equation 35), and the gain error rate G error:1 and G error:2 It is represented by (number 36).

[0140]

number

[0141]

number

[0142] When the number of power conversion circuits is four, the orthogonal function sequences φ1 to φ3 and the regular matrix A are represented by, for example, (Equation 37). Here, when the number of power conversion circuits is four or more, the orthogonal function sequence includes functions with a frequency of twice the fundamental frequency or higher.

[0143]

Equation

[0144] When the number of power conversion circuits is five, the orthogonal function sequences φ1 to φ4 and the regular matrix A are represented by, for example, (Equation 38).

[0145]

Equation

[0146] FIG. 6 shows the configuration of the power conversion system 110 according to the third embodiment of the present invention. The control value calculation unit 20c included in the power conversion system 110 includes a disturbance generation unit 33, superimposers 32-1 to 32-4, multipliers 34-1 to 34-3, an operation amount adjustment unit 60, an error extraction processing unit 64, an integration processing unit 68, and a function processing unit 70.

[0147] The disturbance generation unit 33 includes low-pass filters LPF1 to LPF4 and coefficient multipliers 35-1 to 35-4. The disturbance generation unit 33 acquires disturbance function signals φ1 to φ4, reduces the high-frequency components of the disturbance function signals φ1 to φ4 by the low-pass filters LPF1 to LPF4, and outputs them to the coefficient multipliers 35-1 to 35-4, respectively. The low-pass filters LPF1 to LPF4 reduce the slew rate of the disturbance function signals φ1 to φ4. By reducing the slew rate of the disturbance function signals φ1 to φ4, the N tracking performance of the disturbance function signals φ1 to φ4 when the operation amounts u1 to u are repeatedly obtained is improved. Each coefficient multiplier 35-1 to 35-4 multiplies the disturbance function signals φ1 to φ4 that have been subjected to low-pass filter processing by the low-pass filters LPF by an adjustment coefficient Δ to generate disturbance signals Δ1 to Δ4, and outputs them to the superimposers 32-1 to 32-4, respectively.

[0148] The disturbance function signals φ1 to φ4 may be signals represented by the disturbance function shown in (Equation 39). However, in this embodiment, N=4 in (Equation 39). Disturbance function signal φ represented by (Equation 39) k These are orthogonal signals.

[0149]

number

[0150] For the disturbance function signals φ1 to φ4 shown in (Equation 39), there is a time period in which the value of one disturbance function signal becomes an active value, and the values ​​of the other disturbance function signals become inactive values. Here, the active value is √FN or -√FN, and the inactive value is 0. The disturbance function signals φ1 to φ4 become active one by one as time progresses. N The period 1 / f in which the states in which the activity values ​​are taken sequentially is given by the manipulated variables u1~u N This can be determined to be longer than the feedback period that is repeatedly required.

[0151] The disturbance function signals φ1 to φ4 may be signals represented by the disturbance function shown in (Equation 40). However, in this embodiment, N=4 in (Equation 40).

[0152]

number

[0153] For the disturbance function signals φ1 to φ4 shown in (Equation 40), there is a time period in which the value of one disturbance function signal becomes an active value, and the values ​​of the other disturbance function signals become inactive values. Here, the active value is 1 and the inactive value is 0. The disturbance function signals φ1 to φ4 become active one by one as time progresses. N The period 1 / f in which the states in which the activity values ​​are taken sequentially is given by the manipulated variables u1~u N This can be determined to be longer than the feedback period that is repeatedly required.

[0154] The superimposing units 32-1 to 32-4 individually add the disturbance signals Δ1 to Δ4 to the total manipulated variable v, and output the disturbance superimposed signals v1 to v4 to the multipliers 34-1 to 34-4, respectively.

[0155] As described above, for the disturbance function signals φ1 to φ4, there is a time period in which the value of one disturbance function signal becomes active, while the values ​​of the other disturbance function signals become inactive. Then, the disturbance function signals φ1 to φ4 become active one by one as time progresses. Therefore, the superimposed disturbance signals v1 to v4 have values ​​corresponding to the disturbance function signals φ1 to φ4 in a time-division manner as time progresses.

[0156] The control unit 60 includes a high-pass filter (HPF) and a coefficient multiplier 62. The high-pass filter (HPF) controls the total control unit w obtained by removing the DC component from the total control unit v. ac The coefficient multiplier 62 generates the total manipulated variable v. ac Multiply by -4 / Δ to get the total manipulated variable v ac = -4v ac The / Δ value is output to the error extraction processing unit 64.

[0157] The error extraction processing unit 64 comprises multipliers 1-1 to 1-4, an average calculation unit 66, and subtractors 2-1 to 2-4. Multipliers 1-1 to 1-4 receive the total manipulated variable w output from the manipulated variable adjustment unit 60. ac The gain error rate G is obtained by multiplying the randomized disturbance function signals φ1 to φ4, which have been subjected to low-pass filtering, individually by this multiplication factor. error:1 ~G error:4 The average value calculation unit 66 calculates φ1v ac ~φ4v ac The average value V mean We will find the following. Subtractors 2-1 to 2-4 have a gain error rate G. error:1 ~G error:4 From each of V mean The gain error rate G obtained by subtracting the following e1 ~G e4 The result is calculated and output to the integration processing unit 68.

[0158] As described above, for the disturbance function signals φ1 to φ4, there is a time period during which the value of one disturbance function signal becomes the active value and the values of the other disturbance function signals become the inactive values. And the disturbance function signals φ1 to φ4 sequentially become the active value one by one with the passage of time. Also, the gain error rates G error:1 ~G error:4 are values obtained by individually multiplying the disturbance function signals φ1 to φ4, which have been subjected to low-pass filter processing, by the overall operation amount v ac . Therefore, the instantaneous values of the gain error rates G error:1 ~G error:4 are values extracted from the overall operation amount v ac by any of the components of the disturbance function signals φ1 to φ4. That is, the gain error rates G error:1 ~G error:4 have values corresponding to the disturbance function signals φ1 to φ4 sequentially one by one with the passage of time in a time-division manner.

[0159] The gain error rates G error:1 ~G error:4 correspond to the error components corresponding to each of the disturbance signals Δ1 to Δ4. This error component corresponds to the error included in the disturbance superposition signal due to the superposition of the disturbance signals Δ1 to Δ4 on the overall operation amount v. The gain error rates G e1 ~G e4 as the error components are extracted from the overall operation amount v ac by the error extraction processing unit 64. <00,00967>

[0160] Also, the reason why the subtractors 2-1 to 2-4 subtract V error:1 ~G error:4 from V mean is to make the sum of the gain error rates G e1 ~G e4 equal to 0.

[0161] The integration processing unit 68 time-integrates each of the gain error rates G e1 ~G e4 over a predetermined time, and multiplies the time-integrated value thus obtained by a predetermined coefficient to obtain the gain correction amounts K c1 ~K c4The function processing unit 70 calculates the gain correction amount K and outputs it to the function processing unit 70. c1 ~K c4 The manipulated variable correction coefficients K1 to K4 are calculated as exponential values ​​for , and output to multipliers 34-1 to 34-4, respectively.

[0162] In this way, the integration processing unit 68 and the function processing unit 70 perform a correction coefficient determination process to determine the correction coefficient for each of the four disturbance superimposed signals based on the error component of the overall manipulated variable v, thereby determining the manipulated variable correction coefficients K1 to K4.

[0163] Multipliers 34-1 to 34-4 apply a correction process to the disturbance superimposed signals v1 to v4 using manipulated variable correction coefficients K1 to K4 to generate manipulated variables u1 to u4. That is, multipliers 34-1 to 34-4 multiply the disturbance superimposed signals v1 to v4 by the manipulated variable correction coefficients K1 to K4 to generate manipulated variables u1 to u4, and output them to switching control units 22-1 to 22-4, respectively. Switching control units 22-1 to 22-4 determine the phase differences δ1 to δ4, respectively, based on (Equation 3). Switching control units 22-1 to 22-4 control the power conversion circuits 10-1 to 10-4, respectively, with the phase differences δ1 to δ4.

[0164] The control value calculation unit 20c calculates the total current I out and current command value I ref Based on this, the process of determining the manipulated variables u1 to u4 is repeatedly executed at a predetermined feedback period. The switching control units 22-1 to 22-4 control the power conversion circuits 10-1 to 10-4 based on the manipulated variables u1 to u4 that have been determined sequentially over time. As a result, the currents I1 to I4 output by the power conversion circuits 10-1 to 10-4 converge to the same value and become uniform.

[0165] The ammeter used in this control is for total current I out Only those measuring the current are required. Therefore, the number of ammeters used in the power conversion system 110 is reduced, and the configuration is simplified.

[0166] Figures 7 and 8 show the results of a simulation performed on the power conversion system 110 according to the third embodiment. In each figure, the horizontal axis represents time and the vertical axis represents current. The gains of the power conversion circuits 10-1 to 10-4 defined by (Equation 1) are G1 to G4, respectively. With gain G2 as the reference, gain G1 was set to +10%, gain G3 to -10%, and gain G4 to -20%. As shown in Figure 7, the currents I1 to I4 flowing out from the positive output terminal Tp2 of the power conversion circuits 10-1 to 10-4 converge towards the same value over time.

[0167] Figure 8 shows the currents I1 to I4 after they converge, and the total current I out This is shown. The vertical axis in Figure 8 is stretched compared to the vertical axis in Figure 7. The ripple rate of currents I1 to I4 is 1.4%, and the ripple components contained in currents I1 to I4 suppress each other, so the total current I out The ripple rate is kept below 1.4%.

[0168] In the above, the current flowing through the parallel terminal TP2 of the parallel power conversion circuit is the total current I. out Assuming the total current is I out An embodiment of controlling a parallel power converter based on the measured values ​​is shown. In addition to such control, the current flowing through parallel terminal TG2, the current flowing through parallel terminal TP1, or the current flowing through parallel terminal TG2 is used to control the total current I out Assuming the total current is I out Based on the measured values, similar control may be applied to parallel power converters. In this case, the total current I out An ammeter 13 is connected to the terminal through which the current is said to flow.

[0169] [Configuration of the present invention] Configuration 1: A manipulated variable determination process that determines the overall manipulated variable based on the difference between the measured value of the current flowing at the parallel connection terminals of multiple power conversion circuits connected in parallel and the current command value, A superposition process is performed to generate multiple superimposed disturbance signals by individually superimposing multiple different disturbance signals onto the aforementioned total manipulated quantity. An error extraction process that extracts one or more components corresponding to multiple different disturbance signals from the total manipulated variable and determines one or more error components corresponding to multiple different disturbance signals, A correction coefficient determination process that determines a correction coefficient for each of the multiple disturbance superimposed signals based on the error component, A control variable determination process is performed to determine the control variable for each of the multiple disturbance superimposed signals by applying a correction process using the correction coefficient, and determining the control variable for each of the multiple power conversion circuits. A power conversion circuit control device characterized by performing the following: Configuration 2: A power conversion circuit control device as described in Configuration 1, A power conversion circuit control device characterized in that the multiple disturbance signals are represented by an orthogonal function sequence. Configuration 3: The power conversion circuit control device described in configuration 2, A power conversion circuit control device characterized in that the multiple disturbance signals are represented by a plurality of mutually orthogonal trigonometric functions. Configuration 4 A power conversion circuit control device as described in Configuration 1, The power conversion circuit control device is characterized in that the multiple disturbance signals are represented by multiple disturbance functions, where there is a time period in which the value of one function becomes an active value and the values ​​of the other functions become inactive values, and each of the multiple disturbance functions becomes an active value one by one as time progresses. Configuration 5: The power conversion circuit control device described in configuration 4, Multiple disturbance signals are, A power conversion circuit control device characterized by being a plurality of signals obtained by applying a low-pass filter to each of the plurality of signals represented by the plurality of disturbance functions. Configuration 6: A power conversion circuit control device according to configuration 4 or configuration 5, The error extraction process described above is: A power conversion circuit control device characterized by including a process of extracting each error component from the total manipulated variable by multiplying each of the disturbance signals by a value based on the total manipulated variable. Composition 7: A power conversion circuit control device according to configuration 4 or configuration 5, The error extraction process described above is: A power conversion circuit control device characterized by calculating the average value of a plurality of multiplied values ​​obtained by multiplying a value based on the total manipulated variable by a plurality of disturbance signals, and then calculating each error component by subtracting the average value from each of the plurality of multiplied values. Composition 8: A power conversion circuit control device according to any one of configurations 1 to 7, The correction coefficient determination process is as follows: A power conversion circuit control device characterized by including a process of performing a time integral on each of the error components and determining each of the correction coefficients based on each monotonically increasing function whose independent variable is a value based on the time integral value of each of the error components. Composition 9: A power conversion circuit control device according to any one of configurations 1 to 8, The system includes a switching control unit that controls each of the multiple power conversion circuits based on the operation amount for each of the power conversion circuits, Each of the aforementioned power conversion circuits is: It comprises a primary-side switching circuit and a secondary-side switching circuit coupled by a transformer, The switching control unit, A power conversion circuit control device characterized by controlling the difference between the switching phase of the primary switching circuit and the phase of the secondary switching circuit based on the manipulated variable. [Explanation of Symbols]

[0170] 10-1~10-N Power conversion circuit, 12 Primary switching circuit, 13 Ammeter, 14 Secondary switching circuit, 15 Transformer, 2-1~2-4, 16 Subtractor, 18 Proportional-integral controller, 20, 20a, 20b, 20c, 43 Control value calculation unit, 22-1~22-N Switching control unit, 24 Adder / totaler, 30, 31, 33 Disturbance generation unit, 32-1~32-N Superimulator, 1-1~1-4, 34-1~34-N Multiplier, 35-1~35-4, 46, 62 Coefficient multiplier, 36, 48, 64 Error extraction unit, 38, 50, 68 Integral unit, 40 Two-phase / three-phase conversion unit, 42, 54, 70 Function unit, 44, 60 Manipulated variable adjustment unit, 50 N-1 phase N-phase conversion unit, 66 average value calculation unit, 100 parallel power converter, 102 power conversion circuit control device, 104, 106, 108 power conversion system.

Claims

1. A manipulated variable determination process that determines the overall manipulated variable based on the difference between the measured value of the current flowing at the parallel connection terminals of multiple power conversion circuits connected in parallel and the current command value, A superposition process is performed to generate multiple superimposed disturbance signals by individually superimposing multiple different disturbance signals onto the aforementioned total manipulated quantity. An error extraction process that extracts one or more components corresponding to multiple different disturbance signals from the total manipulated variable and determines one or more error components corresponding to multiple different disturbance signals, A correction coefficient determination process that determines a correction coefficient for each of the multiple disturbance superimposed signals based on the error component, A control variable determination process is performed to determine the control variable for each of the multiple disturbance superimposed signals by applying a correction process using the correction coefficient, and determining the control variable for each of the multiple power conversion circuits. A power conversion circuit control device characterized by performing the following:

2. A power conversion circuit control device according to claim 1, A power conversion circuit control device characterized in that the multiple disturbance signals are represented by an orthogonal function sequence.

3. A power conversion circuit control device according to claim 2, A power conversion circuit control device characterized in that the multiple disturbance signals are represented by a plurality of mutually orthogonal trigonometric functions.

4. A power conversion circuit control device according to claim 1, The power conversion circuit control device is characterized in that the multiple disturbance signals are represented by multiple disturbance functions, where there is a time period in which the value of one function becomes an active value and the values ​​of the other functions become inactive values, and each of the multiple disturbance functions becomes an active value one by one as time progresses.

5. A power conversion circuit control device according to claim 4, Multiple disturbance signals are, A power conversion circuit control device characterized by having multiple signals obtained by applying a low-pass filter to each of the multiple signals represented by the multiple disturbance functions.

6. A power conversion circuit control device according to claim 4 or claim 5, The error extraction process described above is: A power conversion circuit control device characterized by including a process of extracting each error component from the total manipulated variable by multiplying each of the disturbance signals by a value based on the total manipulated variable.

7. A power conversion circuit control device according to claim 4 or claim 5, The error extraction process described above is: A power conversion circuit control device characterized by calculating the average value of a plurality of multiplied values ​​obtained by multiplying a value based on the total manipulated variable by a plurality of disturbance signals, and then calculating each error component by subtracting the average value from each of the plurality of multiplied values.

8. A power conversion circuit control device according to claim 1, The correction coefficient determination process is as follows: A power conversion circuit control device characterized by including a process of performing a time integral on each of the error components and determining each of the correction coefficients based on each monotonically increasing function whose independent variable is a value based on the time integral value of each of the error components.

9. A power conversion circuit control device according to claim 1, The system includes a switching control unit that controls each of the multiple power conversion circuits based on the operation amount for each of the power conversion circuits, Each of the aforementioned power conversion circuits is: It comprises a primary-side switching circuit and a secondary-side switching circuit coupled by a transformer, The switching control unit, A power conversion circuit control device characterized by controlling the difference between the switching phase of the primary switching circuit and the phase of the secondary switching circuit based on the manipulated amount.

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