Printed wiring board, method for manufacturing the same, and electronic device
The printed circuit board addresses ion migration issues by using a multilayer insulating structure with varying undulations in glass fiber layers to suppress metal ion movement, enhancing insulation stability in high-temperature, high-humidity environments.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- MITSUBISHI ELECTRIC CORP
- Filing Date
- 2025-06-30
- Publication Date
- 2026-04-10
AI Technical Summary
Ion migration occurs between conductive layers of printed circuit boards in high-temperature, high-humidity environments, leading to insulation degradation due to the presence of an electric field, ionic substances, and moisture, which creates conductive paths between wiring layers with different potentials.
The printed circuit board incorporates a first insulating layer composed of multiple laminated glass fiber layers with undulations and a resin layer, where the position and size of undulations differ among the glass fiber layers, effectively suppressing ion migration by hindering the movement of metal ions between conductive layers.
This configuration significantly reduces the occurrence of ion migration and insulation degradation, even in harsh conditions, by laminating glass fiber layers with varying undulations, thereby maintaining electrical integrity.
Smart Images

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Abstract
Description
Technical Field
[0001] The present disclosure relates to a printed wiring board having two terminals to which a DC voltage is applied, a method for manufacturing the same, and an electronic device.
Background Art
[0002] In recent years, with the miniaturization of electronic devices, the density of printed wiring boards has been increasing. In order to achieve miniaturization and high integration of printed wiring boards, it is common to use a multilayer substrate in which an insulating layer and a wiring layer having a pattern formed in a conductive layer are alternately laminated, and different wiring layers are electrically connected by vias arranged to penetrate the insulating layer in the thickness direction. Patent Document 1 discloses a power module in which a P-side conductive layer in which the positive electrode side of a DC capacitor is wired and an N-side conductive layer in which the negative electrode side is wired are opposed to each other with an insulating layer interposed therebetween, and currents flow in opposite directions in the P-side conductive layer and the N-side conductive layer. According to the technique described in Patent Document 1, the forward path and the return path of switching power are alternately laminated in the multilayer substrate, and the magnetic field is canceled by the proximity effect, so that the parasitic inductance of the multilayer substrate can be significantly reduced.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] However, when DC power is input to the printed circuit board used in the power module described in Patent Document 1, particularly in a high-temperature, high-humidity environment, there was a possibility that ion migration would proceed within the insulating layer from the P-side conductive layer to the N-side conductive layer, leading to conductivity. Ion migration is a phenomenon that is likely to occur in situations where three elements are present: an electric field, ionic substances, and moisture. In this specification, ionic substances refer to substances that ionize metals. An example of an ionic substance is a halogen. Ion migration occurs when a liquid such as an electrolyte is present between multiple wirings with different potentials, causing metals constituting the wiring with a high ionization tendency, such as Cu (copper), to dissolve as metal ions. These metal ions move and precipitate within the insulating layer present between the multiple wiring layers due to the Coulomb force caused by the electric field. The occurrence of such an event creates a conductive path between multiple wiring layers with different potentials, resulting in insulation degradation.
[0005] This disclosure has been made in view of the above, and aims to provide a printed circuit board that can suppress the progression of ion migration between conductive layers compared to conventional designs when a wiring layer connected to the positive electrode and a wiring layer connected to the negative electrode are arranged with an insulating layer in between. [Means for solving the problem]
[0006] To solve the above-mentioned problems and achieve the objectives, the printed circuit board of this disclosure comprises a first insulating layer, a first wiring layer having a first wiring pattern disposed on a first surface of the first insulating layer, and a second wiring layer having a second wiring pattern disposed on a second surface opposite to the first surface of the first insulating layer. The first insulating layer is composed of a plurality of laminated glass fiber layers and a resin layer containing the plurality of glass fiber layers internally. The glass fiber layer has undulations within the first insulating layer, and the location and size of the undulations differ among multiple glass fiber layers. [Effects of the Invention]
[0007] The printed wiring board according to this disclosure has the effect of suppressing the progression of ion migration between conductive layers compared to conventional designs, when a wiring layer connected to the positive electrode and a wiring layer connected to the negative electrode are arranged with an insulating layer in between. [Brief explanation of the drawing]
[0008] [Figure 1] A schematic cross-sectional view showing an example of the configuration of a printed circuit board according to Embodiment 1. [Figure 2] This figure schematically shows an example of the internal structure of the insulating layer of a printed circuit board according to Embodiment 1. [Figure 3] A diagram illustrating the occurrence of ion migration when the insulating layer consists of only one layer of glass fiber. [Figure 4] This figure schematically shows another example of the configuration of the printed circuit board according to Embodiment 1. [Figure 5] A schematic cross-sectional view showing an example of the procedure for manufacturing a printed circuit board according to Embodiment 1. [Figure 6] A schematic cross-sectional view showing an example of the procedure for manufacturing a printed circuit board according to Embodiment 1. [Figure 7] A schematic cross-sectional view showing an example of the procedure for manufacturing a printed circuit board according to Embodiment 1. [Figure 8] A schematic cross-sectional view showing an example of the procedure for manufacturing a printed circuit board according to Embodiment 1. [Figure 9] A schematic cross-sectional view showing an example of the procedure for manufacturing a printed circuit board according to Embodiment 1. [Figure 10] A schematic cross-sectional view showing an example of the procedure for manufacturing a printed circuit board according to Embodiment 1. [Figure 11] A schematic cross-sectional view showing an example of the procedure for manufacturing a printed circuit board according to Embodiment 1. [Figure 12] This figure shows an example of the configuration of a motor drive device as an electronic device according to Embodiment 2. [Modes for carrying out the invention]
[0009] The printed circuit board, its manufacturing method, and electronic device according to embodiments of this disclosure will be described in detail below with reference to the drawings. Note that the cross-sectional views of the printed circuit board used in the following embodiments are schematic, and the relationship between the thickness and width of the layers, the ratio of the thickness of each layer, etc., may differ from those of reality.
[0010] Embodiment 1. Figure 1 is a schematic cross-sectional view showing an example of the configuration of a printed circuit board according to Embodiment 1. Figure 2 is a schematic diagram showing an example of the internal structure of the insulating layer of the printed circuit board according to Embodiment 1. The printed circuit board 1 includes a first insulating layer 11, a first wiring layer 21 disposed on the first surface 11a of the first insulating layer 11 and having a first wiring pattern, and a second wiring layer 22 disposed on the second surface 11b of the first insulating layer 11 and having a second wiring pattern. The first surface 11a and the second surface 11b face each other.
[0011] In the example shown in Figure 1, the printed circuit board 1 includes a second insulating layer 12 placed on a first wiring layer 21, and a third wiring layer 23 placed on the second insulating layer 12 and having a third wiring pattern. The printed circuit board 1 also includes a third insulating layer 13 laminated on a second wiring layer 22, and a fourth wiring layer 24 placed on the third insulating layer 13 and having a fourth wiring pattern.
[0012] The first wiring layer 21 and the third wiring layer 23 are connected to one electrode of the element that outputs a DC voltage, and the second wiring layer 22 and the fourth wiring layer 24 are connected to the other electrode of the element that outputs a DC voltage. In this example, the first wiring layer 21 and the third wiring layer 23 are connected to the positive electrode potential, and the second wiring layer 22 and the fourth wiring layer 24 are connected to the negative electrode potential. Also, the first wiring layer 21 and the third wiring layer 23, and the second wiring layer 22 and the fourth wiring layer 24, are arranged in a state where at least a part thereof overlaps. That is, the first wiring layer 21 connected to the positive electrode side and the second wiring layer 22 connected to the negative electrode side are arranged sandwiching the first insulating layer 11. Also, at least a part of the first wiring layer 21 and the second wiring layer 22 are arranged facing each other across the first insulating layer 11. From the first wiring layer 21 to the fourth wiring layer 24, in one example, they are made of Cu. Note that the first wiring layer 21 and the third wiring layer 23 may be connected to the negative electrode potential, and the second wiring layer 22 and the fourth wiring layer 24 may be connected to the positive electrode potential.
[0013] The second insulating layer 12 insulates the first wiring layer 21 and the third wiring layer 23. As shown in FIG. 2, the second insulating layer 12 has a single layer of glass fiber layer 121 and a resin layer 122 that surrounds the entire glass fiber layer 121. Specifically, the second insulating layer 12 is a layer formed by impregnating a single layer of glass fiber layer 121 with resin and curing it. The glass fiber layer 121 is an insulating layer knitted into a sheet shape such that the direction of the glass fibers is at least two directions. The glass fiber layer 121 is not flat but a sheet-like structure having undulations. Also, the glass fiber layer 121 is arranged over the entire planar direction of the second insulating layer 12. The resin layer 122 is, in one example, made of an epoxy resin. The thickness of the second insulating layer 12 is, in one example, 35 μm. The second insulating layer 12 has a single layer of glass fiber layer 121 in order to insulate between the first wiring layer 21 and the third wiring layer 23 having the same potential.
[0014] The third insulating layer 13 insulates the second wiring layer 22 and the fourth wiring layer 24. As shown in Figure 2, the third insulating layer 13 has a single glass fiber layer 131 and a resin layer 132 that surrounds the entire glass fiber layer 131. Specifically, the third insulating layer 13 is a layer formed by impregnating a single glass fiber layer 131 with resin and curing it. The glass fiber layer 131 is an insulating layer woven into a sheet shape such that the glass fibers are oriented in at least two directions. The glass fiber layer 131 is not flat, but a sheet-like structure with undulations. The glass fiber layer 131 is also arranged across the entire planar direction of the third insulating layer 13. In one example, the resin layer 132 is made of epoxy resin. In one example, the thickness of the third insulating layer 13 is 35 μm. The third insulating layer 13 consists of a single layer of glass fiber 131 to insulate the second wiring layer 22 and the fourth wiring layer 24, which are at the same potential.
[0015] The first insulating layer 11 insulates the first wiring layer 21 and the second wiring layer 22. As shown in FIG. 2, the first insulating layer 11 includes a plurality of glass fiber layers 111a - 111e and a resin layer 112 surrounding the entire plurality of glass fiber layers 111a - 111e. Specifically, the first insulating layer 11 is a layer formed by impregnating two or more glass fiber layers 111a - 111e laminated in the thickness direction with resin and curing it. That is, it can be said that the first insulating layer 11 is a layer composed of a plurality of laminated glass fiber layers 111a - 111e and a resin layer 112 containing the plurality of glass fiber layers 111a - 111e inside. In the following description, when the glass fiber layers 111a - 111e are not individually distinguished, the glass fiber layers 111a - 111e are denoted as glass fiber layer 111. The glass fiber layer 111 is an insulating layer woven into a sheet shape such that the direction of the glass fibers is at least two - directional. Also, the glass fiber layer 111 is woven into a sheet shape and has undulations inside the resin layer 112. Moreover, each of the plurality of glass fiber layers 111 is arranged over the entire planar direction of the first insulating layer 11. The resin layer 112 is composed of, for example, an epoxy resin. The first insulating layer 11 is thicker than the second insulating layer 12 and the third insulating layer 13 which include one glass fiber layer 121, 131 each. That is, the insulating layer sandwiched between two wiring layers to which different potentials are supplied is made thicker than the insulating layer sandwiched between two wiring layers to which the same potential is supplied.
[0016] Here, the detailed structure of each insulating layer will be described. As described above, the second insulating layer 12 is composed of a resin layer 122 containing one glass fiber layer 121 inside, and the third insulating layer 13 is composed of a resin layer 132 containing one glass fiber layer 131 inside. The sheet - shaped glass fiber layers 121, 131 are not arranged flatly inside the second insulating layer 12 and the third insulating layer 13 respectively, but are arranged in a state with undulations.
[0017] The first insulating layer 11 is composed of a resin layer 112 containing two or more stacked glass fiber layers 111 inside. Figure 2 shows an example in which the first insulating layer 11 contains five glass fiber layers 111a-111e inside the resin layer 112. In the first insulating layer 11 as well, each sheet-like glass fiber layer 111 is not arranged flat inside the resin layer 112, but rather in a wavy state. Here, one glass fiber layer 111 refers to a single sheet-like layer that can be determined to have been formed by weaving multiple glass fibers in a single process.
[0018] Since one glass fiber layer 111 has undulations, when multiple such glass fiber layers 111 are laminated, the position and size of the undulations differ among the multiple glass fiber layers 111. More specifically, it is sufficient that the position and size of the undulations do not coincide between adjacent glass fiber layers 111, and even if the position and size of the undulations coincide at a certain position in the planar direction of the first insulating layer 11, it is sufficient that the position and size of the undulations differ at other positions. Furthermore, the position and size of the undulations of multiple non-adjacent glass fiber layers 111 may coincide. Embodiment 1 is characterized in that the first insulating layer 11 is composed of a resin layer 112 containing two or more glass fiber layers 111 with different undulation positions and sizes. This structure of the first insulating layer 11 makes it possible to suppress the occurrence of ion migration compared to conventional methods. Note that the difference in the position and size of the undulations also indicates that the shape of the undulations of the glass fiber layers 111 is different.
[0019] Here, we will explain the mechanism by which the printed wiring board 1 according to Embodiment 1 suppresses the occurrence of ion migration. Figure 3 is a diagram illustrating the occurrence of ion migration when the insulating layer contains only one glass fiber layer. In Figure 3, an example is shown in which the insulating layer 51 has one glass fiber layer 511 and a resin layer 512 containing the glass fiber layer 511 inside. Furthermore, a first wiring layer 61 connected to the positive electrode of an electronic component (not shown) is arranged on the first surface 51a of the insulating layer 51, and a second wiring layer 62 connected to the negative electrode of an electronic component (not shown) is arranged on the second surface 51b.
[0020] Normally, ion migration is likely to occur at the interface between the glass fiber layer 511 and the resin layer 512 in the insulating layer 51. As described above, under conditions where three elements are present—an electric field, ionic material, and moisture—Cu ions (Cu) that make up the first wiring layer 61 and the second wiring layer 62 have a higher ionization tendency than the ionic material. 2+ ) melts and moves along the glass fiber layer 511.
[0021] As shown in Figure 3, when the glass fiber layer 511 is a single layer, the glass fiber layer 511 has a wave-like undulation between the first surface 51a and the second surface 51b of the insulating layer 51. Furthermore, when a positive voltage is applied to the first wiring layer 61 and a negative voltage is applied to the second wiring layer 62, dissolved Cu ions move along the glass fiber layer 511 from the first surface 51a side to the second surface 51b side. When the glass fiber layer 511 comes into contact with the second surface 51b, and the second wiring layer 62 is present there, electrical conductivity occurs between the first surface 51a and the second surface 51b of the insulating layer 51, resulting in dielectric breakdown.
[0022] On the other hand, in the printed wiring board 1 according to Embodiment 1, the first insulating layer 11 has a structure in which two or more glass fiber layers 111 are laminated. As shown in Figure 2, when a positive voltage is applied to the first wiring layer 21 on the first surface 11a and a negative voltage is applied to the second wiring layer 22 on the second surface 11b, the dissolved Cu ions first move along the glass fiber layer 111a from the first surface 11a side to the second surface 11b side. If there is a glass fiber layer 111b adjacent to the glass fiber layer 111a during the movement, the Cu ions will move along the glass fiber layer 111b toward the second surface 11b side. In the case of Figure 2, this movement of Cu ions occurs for five layers of glass fiber layers 111a-111e. Therefore, compared to the case where there is one glass fiber layer 511 in the conventional method, electrical conductivity between the first surface 11a and the second surface 11b becomes less likely, and the occurrence of dielectric breakdown can be suppressed.
[0023] Furthermore, because a resin layer 112 exists between the upper and lower adjacent glass fiber layers 111 within the first insulating layer 11, it is difficult for Cu ions that have moved along the glass fiber layer 111 on the first surface 11a side to move to the glass fiber layer 111 on the second surface 11b side of that glass fiber layer 111. For Cu ions to move from the glass fiber layer 111 on the first surface 11a side to the glass fiber layer 111 on the second surface 11b side, the Cu ions must move to a position where the glass fiber layer 111 on the first surface 11a side and the glass fiber layer 111 on the second surface 11b side come into contact. As will be described later, when the first insulating layer 11 is formed by laminating multiple fiber resin layers in which resin is impregnated into glass fiber layers 111, it is considered that there are not many positions where adjacent glass fiber layers 111 come into contact. From this point of view as well, in the printed wiring board 1 according to Embodiment 1, the movement of Cu ions from the first surface 11a side to the second surface 11b side is suppressed, and the occurrence of dielectric breakdown is suppressed.
[0024] Considering the above, even if the first insulating layer 11 is composed of a single thick glass fiber layer 111, it is difficult to suppress the occurrence of ion migration with a single glass fiber layer 111. In other words, simply making the glass fiber layer 111 thicker is not enough to suppress the occurrence of ion migration; it is only by laminating multiple glass fiber layers 111 with undulations that it becomes possible to suppress the occurrence of ion migration.
[0025] As described above, when a voltage is applied between the first wiring layer 21 located on the first surface 11a and the second wiring layer 22 located on the second surface 11b, that is, when a voltage is applied such that the first wiring layer 21 and the second wiring layer 22 are at different potentials, a first insulating layer 11 having a plurality of stacked glass fiber layers 111 and a resin layer 112 containing the plurality of glass fiber layers 111 is used.
[0026] In Figures 1 and 2, the first wiring layer 21 and the third wiring layer 23 are at the same potential, making ion migration less likely. Therefore, the second insulating layer 12 sandwiched between the first wiring layer 21 and the third wiring layer 23 is made of a resin layer 122 having a single glass fiber layer 121 inside. Also, the second wiring layer 22 and the fourth wiring layer 24 are at the same potential, making ion migration less likely. Therefore, the third insulating layer 13 sandwiched between the second wiring layer 22 and the fourth wiring layer 24 is made of a resin layer 132 having a single glass fiber layer 131 inside.
[0027] Returning to Figure 1, the printed circuit board 1 has via holes 31 extending from the third wiring layer 23 to the first insulating layer 11, and via holes 32 extending from the third wiring layer 23 to the fourth wiring layer 24. Via wirings 41 and 42 are formed on the inner circumferential surfaces of via holes 31 and 32, respectively. In one example, via hole 31 is connected to the positive terminal of an electronic component, and via hole 32 is connected to the negative terminal of an electronic component. For this reason, the first wiring layer 21 and the third wiring layer 23 are connected to via wiring 41, but are not connected to via wiring 42, as an opening 33 without wiring is provided around the via hole 32. The second wiring layer 22 and the fourth wiring layer 24 are shaped to be connected to via wiring 42.
[0028] A via wiring 41 is connected to the positive terminal and a via wiring 42 to the negative terminal of an electronic component mounted on the printed circuit board 1. As a result, even when a voltage is applied between the first wiring layer 21 connected to the via wiring 41 and the second wiring layer 22 connected to the via wiring 42, the movement of metal ions, in one example Cu ions, from the first wiring layer 21 to the second wiring layer 22 via the first insulating layer 11 is suppressed by the mechanism described above. In other words, dielectric breakdown due to ion migration of the first insulating layer 11 is suppressed.
[0029] The printed circuit board 1 shown in Figure 1 is an example, and the insulating layer between the wiring layer connected to the positive electrode and the wiring layer connected to the negative electrode may be a resin layer containing multiple layers of glass fiber. Figure 4 is a schematic diagram showing another example of the configuration of a printed circuit board according to Embodiment 1. In the printed circuit board 1a shown in Figure 4, a first wiring layer 25, a second insulating layer 16, and a third wiring layer 27 are formed in order on the first surface 15a of the first insulating layer 15, and a second wiring layer 26, a third insulating layer 17, and a fourth wiring layer 28 are formed in order on the second surface 15b of the first insulating layer 15. Here, via holes 35 that penetrate the printed circuit board 1a in the thickness direction are provided in the first wiring layer 25 and the fourth wiring layer 28 so that the positive electrodes of electronic components can be connected, and via wiring 45 is provided on the inner surface of the via holes 35. Furthermore, via holes 36 penetrating the printed circuit board 1a in the thickness direction are provided in the second wiring layer 26 and the third wiring layer 27 so that the negative electrodes of electronic components can be connected, and via wiring 36 is provided on the inner surface of the via holes 36. In other words, in the structure shown in Figure 4, a voltage is applied between the first surface 16a and the second surface 16b of the second insulating layer 16, a voltage is applied between the first surface 15a and the second surface 15b of the first insulating layer 15, and a voltage is applied between the first surface 17a and the second surface 17b of the third insulating layer 17. As a result, all of the layers from the first insulating layer 15 to the third insulating layer 17 are composed of resin layers containing multiple stacked glass fiber layers inside.
[0030] Returning to Figure 1, the first insulating layer 11 is formed by laminating and joining multiple fiber resin layers, each impregnated with resin into a single glass fiber layer 111. In one example, the first insulating layer 11 is formed by laminating fiber resin layers, each having a single glass fiber layer 111 and a semi-cured resin positioned to cover the single glass fiber layer 111, and then applying pressure and heat. In this case, the first insulating layer 11 is formed by joining multiple unit resin layers, each containing a single glass fiber layer 111, in the thickness direction. In this case, boundaries between the unit resin layers in the first insulating layer 11 may exist, or they may become unclear or disappear. Therefore, it may not be possible to determine that the first insulating layer 11 is formed of multiple unit resin layers solely from observation of the resin layer 112. In Embodiment 1, as described above, it is determined whether the first insulating layer 11 is formed of multiple unit resin layers based on whether or not there are multiple glass fiber layers 111 with different undulation positions and sizes.
[0031] In Figures 1 and 2, the first insulating layer 11, which consists of a resin layer 112 containing two or more stacked glass fiber layers 111, the first wiring layer 21 placed on the first surface 11a of the first insulating layer 11, and the second wiring layer 22 placed on the second surface 11b may be made of copper-clad laminate (CCL). The copper-clad laminate used in this case has a structure in which copper foil is laminated on both sides of a prepreg made by impregnating two or more glass fiber layers 111 with resin.
[0032] Next, a method for manufacturing a printed circuit board 1 according to Embodiment 1 will be described. Figures 5 to 11 are schematic cross-sectional views showing an example of the procedure for manufacturing a printed circuit board according to Embodiment 1. First, as shown in Figure 5, a plurality of fiber resin layers 110 are formed by impregnating a resin 112a into a single glass fiber layer 111 in which glass fibers are woven in a two-dimensional shape, and then laminating them. Next, as shown in Figure 6, the laminated plurality of fiber resin layers 110 are heated and pressurized to form a first insulating layer 11. At this time, the resin 112a hardens to become a resin layer 112. Here, an example is given in which the first insulating layer 11 consists of two glass fiber layers 111. The steps shown in Figures 5 and 6 correspond to the insulating layer formation steps.
[0033] Next, as shown in Figure 7, copper foil to be a wiring layer is laminated on the first surface 11a of the first insulating layer 11, and the copper foil is processed into a predetermined pattern to form the first wiring layer 21. Specifically, copper foil is laminated on the first surface 11a of the first insulating layer 11, and a resist is applied on top of the copper foil. Then, a resist pattern is formed using lithography technology to form the desired wiring pattern. In one example, the resist pattern is formed so that the resist remains in the areas where the copper foil remains, i.e., where the wiring pattern remains. Next, the copper foil is etched using etching technology, with the resist pattern as a mask. By removing the resist pattern, the first wiring layer 21 is formed on the first surface 11a. The process shown in Figure 7 corresponds to the first wiring layer formation process.
[0034] Next, as shown in Figure 8, copper foil, which will become the wiring layer, is laminated on the second surface 11b of the first insulating layer 11, and the copper foil is shaped into a predetermined pattern to form the second wiring layer 22. Specifically, a mask is formed on the first surface 11a of the first insulating layer 11 on which the first wiring layer 21 is formed. In one example, a resist is applied to the first surface 11a. Also, copper foil is laminated on the second surface 11b of the first insulating layer 11, and a resist is applied on the copper foil. After that, a resist pattern is formed on the copper foil using lithography techniques to form the desired wiring pattern. In one example, the resist pattern is formed so that the resist remains in the areas where the copper foil remains, i.e., where the wiring pattern remains. Next, the copper foil is etched using etching techniques, with the resist pattern as a mask. The resist on the first surface 11a and the resist pattern on the second surface 11b of the first insulating layer 11 are removed. As a result, the second wiring layer 22 is formed on the second surface 11b. The process shown in Figure 8 corresponds to the second wiring layer formation process.
[0035] Subsequently, as shown in Figure 9, a single layer of glass fiber 121 is impregnated with resin 122a, and copper foil, which will become the wiring layer, is laminated onto the first surface 120a of the prepreg 120, which is in a semi-cured state with resin 122a. The copper foil is then processed into a desired pattern to form the third wiring layer 23. Specifically, copper foil is placed on the first surface 120a of the prepreg 120, and a mask is formed on the copper foil. In one example, a resist is applied to the first surface 120a as a mask. Then, a resist pattern is formed using lithography to create the desired wiring pattern. Next, the copper foil is etched using etching technology, with the resist pattern as a mask. By removing the resist pattern, a prepreg 120 is formed with the third wiring layer 23 formed on the first surface 120a.
[0036] Furthermore, as shown in Figure 10, a single layer of glass fiber 131 is impregnated with resin 132a, and copper foil, which will become the wiring layer, is laminated onto the second surface 130b of the prepreg 130, which is in a semi-cured state with the resin 132a. The copper foil is then processed into a desired pattern to form the fourth wiring layer 24. Specifically, copper foil is placed on the second surface 130b of the prepreg 130, and a mask is formed on the copper foil. In one example, a resist is applied to the second surface 130b as a mask. Then, a resist pattern is formed using lithography technology to create the desired wiring pattern. Next, the copper foil is etched using etching technology, with the resist pattern as a mask. By removing the resist pattern, a prepreg 130 is formed with the fourth wiring layer 24 formed on the second surface 130b.
[0037] Subsequently, as shown in Figure 11, a prepreg 120 having a third wiring layer 23 is placed on the first surface 11a of the first insulating layer 11, and a prepreg 130 having a fourth wiring layer 24 is placed on the second surface 11b of the first insulating layer 11, and then heated and pressurized. As a result, the prepreg 120 hardens to become the second insulating layer 12, and the prepreg 130 hardens to become the third insulating layer 13, thus obtaining the printed circuit board 1.
[0038] Next, via holes 31 and 32 are formed on the printed circuit board 1, and via wiring 41 and 42 are formed on the inner surfaces of the via holes 31 and 32 by a film formation method such as plating. This process yields a printed circuit board 1 as shown in Figure 1.
[0039] As described above, the printed circuit board 1 according to Embodiment 1 comprises a first insulating layer 11, a first wiring layer 21 having a first wiring pattern arranged on the first surface 11a of the first insulating layer 11 and connected to one electrode of an element that outputs a DC voltage, and a second wiring layer 22 having a second wiring pattern arranged on the second surface 11b opposite to the first surface 11a of the first insulating layer 11 and connected to the other electrode of an element that outputs a DC voltage. The first insulating layer 11 is composed of a plurality of stacked glass fiber layers 111 and a resin layer 112 containing the plurality of glass fiber layers 111. With this configuration, when DC power is input to the first wiring layer 21 and the second wiring layer 22 in a high temperature and high humidity environment, it is possible to suppress ion migration from the first wiring layer 21 to the second wiring layer 22 within the first insulating layer 11, which would otherwise lead to conductivity. In other words, by laminating multiple glass fiber layers 111 having a wavy shape, the occurrence of ion migration between the first wiring layer 21 connected to the positive electrode side and the second wiring layer 22 connected to the negative electrode side can be significantly reduced compared to conventional methods, and the occurrence of insulation degradation of the first insulating layer 11 can be suppressed.
[0040] Furthermore, by overlapping at least a portion of the first wiring layer 221 and the second wiring layer 22 via the first insulating layer 11, the parasitic inductance of the printed circuit board 1 can be reduced to the same level as in the conventional method, and the occurrence of insulating degradation of the first insulating layer 11 due to ion migration can be suppressed.
[0041] Embodiment 2. The printed circuit board 1 according to Embodiment 1 can be used in general electronic devices that have a DC power input in the circuit. In Embodiment 2, a motor drive device is given as an example of an electronic device that uses the printed circuit board 1. Figure 12 is a diagram showing an example of the configuration of a motor drive device as an electronic device according to Embodiment 2. The motor drive device 70 is connected to an AC power source 81 such as a commercial power source and a motor 82. The motor drive device 70 converts the first AC power supplied from the AC power source 81 into DC power, then converts it into a second AC power having a desired amplitude and phase, and supplies it to the motor 82. An example of the first AC power is three-phase AC power.
[0042] The motor drive unit 70 includes an input unit 71 to which first AC power is supplied, a converter circuit 72 that rectifies the first AC power to DC power, an inverter circuit 73 that converts the DC power to second AC power, a P-side DC connection unit 74a and an N-side DC connection unit 74b that connect the converter circuit 72 and the inverter circuit 73, and an output unit 75 that supplies second AC power to the motor 82. The P-side DC connection unit 74a and the N-side DC connection unit 74b are referred to as DC connection unit 74 unless otherwise distinguished.
[0043] The printed circuit board 1 of Embodiment 1 includes a DC connection section 74. The printed circuit board 1 also mounts various elements such as rectifier elements that constitute the converter circuit 72, and various elements such as switching elements and freewheeling diodes that constitute the inverter circuit 73. Taking the printed circuit board 1 in Figure 1 as an example, the first wiring layer 21 and the third wiring layer 23 are connected to the positive terminal of the converter circuit 72, and the second wiring layer 22 and the fourth wiring layer 24 are connected to the negative terminal of the converter circuit 72.
[0044] Furthermore, via wiring 41 corresponds to the P-side DC connection part 74a, and via wiring 42 corresponds to the N-side DC connection part 74b. The positive terminal, which is the first electrode of the inverter circuit 73, is connected to via wiring 41, which is connected to the first wiring layer 21 and the third wiring layer 23, via pads or the like. The negative terminal, which is the second electrode of the inverter circuit 73, is connected to via wiring 42, which is connected to the second wiring layer 22 and the fourth wiring layer 24, via pads or the like. In this way, even when the DC voltage output from the converter circuit 72 is applied between the first wiring layer 21 and the second wiring layer 22, the occurrence of ion migration is suppressed because there is a first insulating layer 11 made up of a resin layer 112 containing multiple stacked glass fiber layers 111 inside between the first wiring layer 21 and the second wiring layer 22.
[0045] In Figure 12, the motor drive unit 70 is shown as being connected to an AC power supply 81, but it may also be connected to a DC power supply. In this case, the motor drive unit 70 will receive DC power instead of the first AC power.
[0046] The electronic component according to Embodiment 2 comprises an electronic component having a first electrode connected to the first wiring layer 21 of the printed circuit board 1 of Embodiment 1 and a second electrode connected to the second wiring layer 22, and the electronic component is mounted on the printed circuit board 1. With this configuration, even when DC power is input to the first wiring layer 21 and the second wiring layer 22 in a high temperature and high humidity environment, it is possible to suppress ion migration from the first wiring layer 21 to the second wiring layer 22 within the first insulating layer 11, which would otherwise lead to conductivity. As a result, the occurrence of insulation degradation in the first insulating layer 11 is suppressed, and the lifespan of the electronic component in a high temperature and high humidity environment can be extended compared to conventional methods.
[0047] The configurations shown in the above embodiments are merely examples, and it is possible to combine them with other known technologies, combine different embodiments, and omit or modify parts of the configuration without departing from the gist of the invention. [Explanation of symbols]
[0048] 1,1a Printed wiring board, 11,15 First insulating layer, 11a,15a,16a,17a,51a,120a First side, 11b,15b,16b,17b,51b,130b Second side, 12,16 Second insulating layer, 13,17 Third insulating layer, 21,25,61 First wiring layer, 22,26,62 Second wiring layer, 23,27 Third wiring layer, 24,28 Fourth wiring layer, 31,32,35,36 Via holes, 33 Opening, 41,42,45,46 Via wiring, 51 Insulating layer, 70 Motor drive unit, 71 Input section, 72 Converter circuit, 73 Inverter circuit, 74 DC connection section, 74a P-side DC connection section, 74b N-side DC connection section, 75 Output section, 81 AC power supply, 82 motor, 110 fiber resin layer, 111, 111a-111e, 121, 131, 511 glass fiber layer, 112, 122, 132, 512 resin layer, 112a, 122a, 132a resin, 120, 130 prepreg.
Claims
1. The first insulating layer and A first wiring layer having a first wiring pattern disposed on the first surface of the first insulating layer, A second wiring layer having a second wiring pattern, disposed on a second surface of the first insulating layer opposite to the first surface, Equipped with, The first insulating layer is composed of a plurality of stacked glass fiber layers and a resin layer containing the plurality of glass fiber layers inside, The glass fiber layer has undulations within the first insulating layer, A printed wiring board characterized in that the position and size of the undulations differ in multiple glass fiber layers.
2. The printed wiring board according to claim 1, characterized in that the first insulating layer is formed by bonding a plurality of unit resin layers, each containing a single glass fiber layer, in the thickness direction.
3. The first wiring pattern is connected to one electrode of an element that outputs a DC voltage, The printed circuit board according to claim 1, characterized in that the second wiring pattern is connected to the other electrode of the element that outputs the DC voltage.
4. A second insulating layer is laminated on the first wiring layer, A third wiring layer having a third wiring pattern disposed on the second insulating layer and connected to the positive electrode, A third insulating layer is laminated on the second wiring layer, A fourth wiring layer having a fourth wiring pattern disposed on the third insulating layer and connected to the negative electrode, The printed wiring board according to claim 1, further characterized by having the following features.
5. A printed circuit board according to any one of claims 1 to 4, An electronic component having a first electrode connected to the first wiring layer and a second electrode connected to the second wiring layer, An electronic device characterized by having the following features.
6. The electronic device according to claim 5, further comprising an input section to which AC power or DC power is supplied.
7. An insulating layer formation process involves laminating multiple fiber resin layers, each impregnated with resin into a single glass fiber layer, and then heating and pressurizing them to form an insulating layer. A first wiring layer formation step involves laminating copper foil onto the first surface of the insulating layer and processing the copper foil into a predetermined pattern to form a first wiring layer, A second wiring layer formation step involves laminating copper foil onto the second surface of the insulating layer opposite to the first surface, and processing the copper foil into a predetermined pattern to form a second wiring layer. Includes, A method for manufacturing a printed circuit board, characterized in that, in the insulating layer formation step, the glass fiber layer has undulations inside the insulating layer, and the insulating layer is formed such that the position and size of the undulations differ among a plurality of glass fiber layers.
Citation Information
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