Semiconductor package and method for manufacturing the same

Abstract

The semiconductor package includes a printed circuit board including a connecting portion; an IC chip disposed on the printed circuit board; a solder portion disposed on an underside of the IC chip and coupled to the connecting portion; a bonding layer disposed between the solder portion and the connecting portion; and an underfill disposed between the IC chip and the printed circuit board, the bonding layer including a thermosetting resin and the underfill including a thermoplastic resin.

Description

Technical Field

[0001] This embodiment relates to a semiconductor package and a method for manufacturing the same.

Background Art

[0002] Generally, SMT equipment prints solder on the lands of a printed circuit board, then aligns and mounts the leads of surface mount components on the lands where the cream-type solder is printed, and applies infrared radiation heat to the printed circuit board on which the surface mount components are mounted to melt and attach the solder to connect the leads of the surface mount components and the lands of the printed circuit board.

[0003] A production line for assembling surface mount components on a printed circuit board consists of various types of equipment. Specifically, a surface mount (SMT) line includes a substrate feeder (Loader) that supplies the printed circuit board to the line, a screen printer that applies solder paste on the pattern before attaching components, a surface mounter that receives the supply of surface mount components from a surface mount component supply reel device (feeder or cassette) and attaches them to the substrate, a reflow oven that melts the applied solder paste to connect the components and the pattern after all the components are attached to the substrate by the surface mounter, a solder inspection that inspects the mounting state, a sorter that classifies the printed circuit boards on which the surface mounting is completed, and an unloader that removes the classified boards from the line.

[0004] Once surface mounting is complete on the surface mount assembly line described above, an underfill process is essential to improve the adhesion between the chip and the substrate. The underfill process involves transferring the substrate, which has just undergone surface mounting, to an underfill line. In other words, the surface mounting process and the underfill process are separated and carried out on different lines.

[0005] Thus, conventionally, when mounting components onto a printed circuit board using the surface mount method, a separate underfill process line is required after the surface mount process to apply and cure underfill resin between the chip and the board. This results in high equipment and operating costs, and various problems arise when the board with the surface-mounted components is transferred to the underfill line. [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] This embodiment aims to provide a semiconductor package and a method for manufacturing the same that can improve production efficiency by reducing the number of manufacturing steps. [Means for solving the problem]

[0007] A semiconductor package according to one embodiment includes a printed circuit board including a connecting portion; an IC chip disposed on the printed circuit board; a solder portion disposed on the lower surface of the IC chip and connecting to the connecting portion; a bonding layer disposed between the solder portion and the connecting portion; and an underfill disposed between the IC chip and the printed circuit board, wherein the bonding layer contains a thermosetting resin and the underfill contains a thermoplastic resin.

[0008] The material of the bonding layer may be epoxy.

[0009] The material of the underfill may be polyurethane.

[0010] The vertical thickness of the bonding layer may be less than half the vertical thickness of the solder portion.

[0011] The vertical thickness of the underfill may be greater than the vertical thickness of the solder portion.

[0012] A method for manufacturing a semiconductor package according to one embodiment includes: (a) a step of supplying a printed circuit board; (b) a step of printing a thermosetting resin onto the printed circuit board; (c) a step of applying solder paste to the printed circuit board; (d) a step of mounting an IC chip on the printed circuit board and applying a thermoplastic resin around the IC chip; and (e) a step of curing the thermosetting resin and the thermoplastic resin.

[0013] The thermoplastic resin may include polyurethane, and the thermosetting resin may include epoxy.

[0014] After step (e), the procedure may include a step of inspecting the mounting state of the IC chip.

[0015] The step after step (c) above may include a step in which epoxy is dipped onto the IC chip.

[0016] A method for manufacturing a semiconductor package according to another embodiment includes: (a) supplying a printed circuit board; (b) applying solder paste to the printed circuit board; (c) dipping an IC chip with a thermosetting resin; (d) mounting the IC chip on the printed circuit board and applying a thermoplastic resin around the IC chip; and (e) curing the thermosetting resin and the thermoplastic resin. [Effects of the Invention]

[0017] According to this embodiment, since the conventional underfill process is not separately performed in the manufacturing process of the semiconductor package, there are advantages of improved productivity, cost reduction, reduced defect rate, and repairability.

Brief Description of the Drawings

[0018] [Figure 1] Cross-sectional view of a semiconductor package according to an embodiment of the present invention. [Figure 2] Flowchart illustrating a method of manufacturing a semiconductor package according to an embodiment of the present invention. [Figure 3] Drawing illustrating a state where a bonding layer is formed on a printed circuit board according to an embodiment of the present invention. [Figure 4] Drawing illustrating a state where a thermoplastic resin is applied on a printed circuit board according to an embodiment of the present invention. [Figure 5] Drawing illustrating a state where the thermoplastic resin is cured in FIG. 4. [Figure 6] Flowchart showing a modification of a method of manufacturing a semiconductor package according to an embodiment of the present invention.

Modes for Carrying Out the Invention

[0019] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0020] However, the technical idea of the present invention is not limited to some of the described embodiments, and can be implemented in various different forms. Within the scope of the technical idea of the present invention, one or more of the constituent elements among the embodiments can be selectively combined or replaced and used.

[0021] In addition, the terms (including technical and scientific terms) used in the embodiments of the present invention can be interpreted as having a meaning generally understood by those having ordinary knowledge in the technical field to which the present invention pertains, unless clearly defined and described specially. Terms generally used like pre-defined terms can be interpreted considering their meaning in the context of the related technology.

[0022] Also, the terms used in the embodiments of the present invention are for explaining the embodiments and are not intended to limit the present invention.

[0023] In this specification, the singular form can also include the plural form unless otherwise specifically stated in the text. When described as "at least one (or one or more) of A, B, and C", it can include one or more of all combinations formed by A, B, and C.

[0024] Also, when explaining the components of the embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. can be used. These terms are only for distinguishing the components from other components and are not limited to the essence, order, or sequence of the corresponding components by those terms.

[0025] In addition, when a component is described as "connected", "coupled", or "connected" to another component, that component can be not only directly "connected", "coupled", or "connected" to that other component, but also "connected", "coupled", or "connected" by yet another component between that component and that other component.

[0026] Also, when described as being formed or arranged "above (on top of)" or "below (beneath)" each component, "above (on top of)" or "below (beneath)" includes not only the case where two components are in direct contact with each other, but also the case where one or more additional components are formed or arranged between the two components. Also, when expressed as "above (on top of)" or "below (beneath)", it can include the meaning of not only the upper direction but also the lower direction with respect to one component.

[0027] FIG. 1 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

[0028] Referring to Figure 1, the semiconductor package 100 according to this embodiment may include a printed circuit board 110, an IC chip 120, and an underfill 160.

[0029] The printed circuit board 110 is formed in a plate shape and may include a circuit pattern (not shown) for electrical connection. A connecting portion 130 for electrical connection with the IC chip 120 may be disposed on the upper surface of the printed circuit board 110. The connecting portion 130 may form part of the circuit pattern. The material of the connecting portion 130 may include copper. Multiple connecting portions 130 may be provided and arranged to be spaced apart from each other. The IC chip 120 may be mounted on the printed circuit board 110 via the connecting portion 130. The printed circuit board 110 and the IC chip 120 may be electrically connected via the connecting portion 130.

[0030] The IC chip 120 may be placed on the printed circuit board 110. The IC chip 120 can be surface mounted (SMT) on the printed circuit board 110. A solder portion 140 for bonding the IC chip 120 to the printed circuit board 110 may be placed between the IC chip 120 and the printed circuit board 110. The solder portion 140 may be a soldering area for mounting the IC chip 120 on the printed circuit board 110. The solder portion 140 may be ball-shaped. The solder portion 140 can be connected to the connecting portion 130. The solder portion 140 and the connecting portion 130 may be arranged facing each other in the vertical direction. The solder portion 140 and the connecting portion 130 may be in contact.

[0031] A bonding layer 150 may be formed between the connecting portion 130 and the solder portion 140. The bonding layer 150 is for firmly maintaining the bond between the connecting portion 130 and the solder portion 140, and may be placed on the upper surface of the connecting portion 130 or the lower surface of the solder portion 140. The material of the bonding layer 150 may include a thermosetting resin. For example, the bonding layer 150 may include epoxy. When the bonding layer 150 hardens in the reflow process described later, the bonding layer 150 can firmly fix the solder portion 140 on the connecting portion 130.

[0032] The vertical thickness of the bonding layer 150 may be less than half the vertical thickness of the solder portion 140.

[0033] The semiconductor package 100 may include an underfill 160 placed between the printed circuit board 110 and the IC chip 120. The underfill 160 may include a thermoplastic resin. For example, the material of the underfill 160 may include polyurethane. The underfill 160 serves as a structural support for the IC chip 120 and can be formed by being bonded to the printed circuit board 110 and then ejected using capillary force.

[0034] The vertical thickness of the underfill 160 may be greater than the vertical thickness of the solder portion 140.

[0035] The following describes how to manufacture the semiconductor package 100.

[0036] Figure 2 is a flowchart illustrating a method for manufacturing a semiconductor package according to an embodiment of the present invention; Figure 3 is a diagram illustrating the formation of a bonding layer on a printed circuit board according to an embodiment of the present invention; Figure 4 is a diagram illustrating the application of a thermoplastic resin to a printed circuit board according to an embodiment of the present invention; and Figure 5 is a diagram illustrating the curing of the thermoplastic resin in Figure 4.

[0037] Referring to Figures 1 and 2, the semiconductor package manufacturing method according to this embodiment may include the steps of: supplying a printed circuit board 110 via a substrate supply machine (S10); printing a thermosetting resin onto the printed circuit board 110 (S20); applying solder paste to the pattern on the printed circuit board 110 where the IC chip 120 is mounted and the underfill 160 is formed (S30); supplying the IC chip 120 onto the printed circuit board 110 via a component supply unit and simultaneously placing a thermoplastic resin around the IC chip 120 on the printed circuit board 110 (S40); and, after the surface mounting process (S40), heating via a reflow oven to cure the thermosetting resin and the thermoplastic resin (S50). In addition, the semiconductor package manufacturing method may include the step of inspecting the mounting state of the IC chip 120 on the printed circuit board 110 after the reflow process (S50).

[0038] In conventional semiconductor packaging, a paste-like solder (solder paste) is applied to the printed circuit board, followed by the mounting (installation) of various components, and then cured in a reflow oven. Separately, an underfill process must be performed on the printed circuit board after the SMT process, where liquid epoxy is applied to the sides of components such as BGA and CP, allowed to penetrate, and then further cured in a curing oven to prevent cracking and banding defects.

[0039] The semiconductor package manufacturing method according to this embodiment is characterized by the fact that the surface mounting process and the underfill process are performed on a single line.

[0040] In detail, in the step (S20) in which the thermosetting resin is printed onto the printed circuit board 110, as a step in which a bonding layer 150 is formed within the semiconductor package 10 as described above, epoxy can be printed onto the printed circuit board 110 in the form of a gel-type resin, as shown in Figure 3. In this embodiment, the example of printing the thermosetting resin onto the printed circuit board 110 is given, but the invention is not limited to this, and the thermosetting resin may also be printed on the underside of the IC chip 120 bonded to the printed circuit board 110.

[0041] Furthermore, in step (S40) where the thermoplastic resin is placed around the IC chip 120, as shown in Figure 4, it can be applied along the periphery of the IC chip 120 on the upper surface of the printed circuit board 110. Figure 4 shows an example in which multiple thermoplastic resins are provided and arranged facing each other with respect to the IC chip 120. The thermoplastic resin may have a "U" shaped cross-section and be arranged to enclose three sides of the IC chip 120. The multiple thermoplastic resins may be arranged spaced apart from each other. In this case, only a "U" shaped cross-section of the thermoplastic resin has been illustrated, but there are various other examples such as "B" and "L".

[0042] As a result, through the reflow process (S50), the thermoplastic resin hardens as shown in Figure 5, forming an underfill 160 inside the semiconductor package 100.

[0043] In summary, through the reflow process (S50), the thermosetting resin hardens, firmly fixing the solder portion 140 onto the connecting portion 130, and the thermoplastic resin penetrates into the interior of the IC chip 120 by capillary action, firmly fixing the bond between the printed circuit board 110 and the IC chip 120.

[0044] On the other hand, the semiconductor package 100 can undergo a secondary reflow process, which has the advantage that the bonding layer 150 can support the flow of the solder portion 140 during the melting process due to the thermosetting properties of the bonding layer 150.

[0045] Figure 6 is a flowchart showing a modified example of the semiconductor package manufacturing method according to an embodiment of the present invention.

[0046] In this modified example, the other parts are the same as those of the embodiment described above, except for the difference in the bonding layer formation structure using thermosetting resin. Therefore, below, only the characteristic parts of this modified example will be described, and the explanation of the embodiment described above will be used as a reference for the other parts.

[0047] Referring to Figure 6, the method for manufacturing a semiconductor package may include the steps of: supplying a printed circuit board 110 through a substrate supply machine (S110); applying solder paste to the printed circuit board 110 to the pattern for mounting the IC chip 120 and the pattern for forming the underfill 160 (S120); surface mounting the IC chip 120 onto the printed circuit board 110 after dipping it with a thermosetting resin (S130); placing a thermoplastic resin around the IC chip 120 on the printed circuit board 110 (S140); and heating the surface mounting process (S140) through a reflow oven to cure the thermosetting resin and the thermoplastic resin (S150).

[0048] Therefore, in this modified example, the thermosetting resin (e.g., epoxy) for forming the bonding layer 150 is applied to the bonding surface of the IC chip 120 that is bonded to the printed circuit board 110 by dipping. The dipping process can be carried out by immersing the IC chip 120 in an epoxy flux, which is a gel-type resin, and then pulling it out. Since the epoxy flux is not a rosin flux, there is no residual flux of the thermosetting resin in the reflow step (S150), which has the advantage of eliminating the need for separate cleaning or curing processes.

[0049] On the other hand, although the step of forming the bonding layer 150 with the thermosetting resin has been described as being divided into a step of printing on the printed circuit board 110 and a step of dipping on the IC chip 120, it is not the case that these can only be performed selectively; of course, the step of printing on the printed circuit board 110 and the step of dipping on the IC chip 120 can be performed together within a single semiconductor package manufacturing process.

[0050] According to the structure described above, the semiconductor package manufacturing process does not require a separate underfill process, resulting in advantages such as improved productivity, reduced costs, lower defect rates, and the ability to be repaired.

[0051] Although all components constituting the embodiments of the present invention have been described as being combined into one or operating in combination, the present invention is not necessarily limited to these embodiments. That is, within the scope of the object of the present invention, it is also possible for all components to be selectively combined into one or more components and operate in combination. Furthermore, unless otherwise stated, terms such as "includes," "constitutes," or "has" used herein mean that the component in question is inherent, and should be interpreted as including other components rather than excluding them. All terms, including technical or scientific terms, have the same meaning as generally understood by a person of ordinary skill in the art to which the present invention pertains, unless otherwise defined. Commonly used terms, such as predefined terms, should be interpreted as corresponding to their meaning in the context of the relevant art, and should not be interpreted as ideal or overly formal unless explicitly defined herein.

[0052] The above description is merely illustrative of the technical concept of the present invention, and a person with ordinary skill in the art to which the present invention belongs could make various modifications and changes without departing from the essential characteristics of the present invention. Accordingly, the embodiments disclosed herein are for illustrative purposes only, not to limit the technical concept of the present invention, and these embodiments do not limit the scope of the technical concept of the present invention. The scope of protection of the present invention should be interpreted in accordance with the following claims, and all technical concepts within an equivalent scope should be interpreted as being included in the scope of the rights of the present invention.

Claims

1. Printed circuit board including connecting parts; An IC chip placed on the aforementioned printed circuit board; A solder portion located on the lower surface of the IC chip and connected to the connecting portion; A bonding layer, partly positioned between the solder portion and the connecting portion; and This includes underfill disposed between the IC chip and the printed circuit board, The bonding layer is a thermosetting resin, The underfill is a thermoplastic resin, A semiconductor package characterized in that at least a portion of the lower surface of the solder portion and at least a portion of the upper surface of the connecting portion are in contact.

2. The semiconductor package according to claim 1, characterized in that the material of the bonding layer is epoxy.

3. The semiconductor package according to claim 1 or 2, characterized in that the material of the underfill is polyurethane.

4. The semiconductor package according to any one of claims 1 to 3, characterized in that the thickness of the bonding layer in the vertical direction is less than half the thickness of the solder portion in the vertical direction.

5. The semiconductor package according to any one of claims 1 to 4, characterized in that the vertical thickness of the underfill is greater than the vertical thickness of the solder portion.

6. (a) A printed circuit board including a connecting portion is supplied; (b) A step in which a thermosetting resin is printed onto the printed circuit board; (c) A step in which solder paste is applied to the printed circuit board; (d) The steps of mounting an IC chip on the printed circuit board and applying a thermoplastic resin around the IC chip; and (e) The process includes a step in which the thermosetting resin and the thermoplastic resin are cured, At least a portion of the lower surface of the solder paste and at least a portion of the upper surface of the connecting portion are in contact. A method for manufacturing a semiconductor package, characterized in that a portion of the thermosetting resin is placed between the solder paste and the connecting portion.

7. The aforementioned thermoplastic resin includes polyurethane, The method for manufacturing a semiconductor package according to claim 6, characterized in that the thermosetting resin includes epoxy.

8. A method for manufacturing a semiconductor package according to claim 6 or 7, characterized in that after step (e), the method includes a step of inspecting the mounting state of the IC chip.

9. The method for manufacturing a semiconductor package according to claim 8, characterized in that after step (c), the IC chip is dipped in epoxy.

10. (a) A printed circuit board including a connecting portion is supplied; (b) A step in which solder paste is applied to the printed circuit board; (c) A step in which the IC chip is dipped in a thermosetting resin; (d) The steps of mounting the IC chip on the printed circuit board and applying a thermoplastic resin around the IC chip; and (e) The process includes a step in which the thermosetting resin and the thermoplastic resin are cured, At least a portion of the lower surface of the solder paste and at least a portion of the upper surface of the connecting portion are in contact. A method for manufacturing a semiconductor package, characterized in that a portion of the thermosetting resin is placed between the solder paste and the connecting portion.

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