Semiconductor equipment

Abstract

To provide a small semiconductor device. To provide a semiconductor device with low power consumption. To provide a semiconductor device with a high degree of integration.SOLUTION: A semiconductor device comprises a first transistor, an insulating layer on the first transistor, a conductive layer, and a gate driver. A part of the conductive layer is provided to be embedded in the insulating layer, and the gate driver includes a second transistor and a third transistor. The second transistor and the third transistor are provided while being laminated on the first transistor, and each of the second transistor and the third transistor includes a metal oxide in a channel formation region. One of a source and a drain of the second transistor and one of a source and a drain of the third transistor are electrically connected to a gate of the first transistor via the conductive layer, a first potential and a second potential are supplied to the gate driver, and the gate driver has a function of selecting the first potential or the second potential and supplying the selected potential to the gate of the first transistor.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One aspect of the present invention relates to a semiconductor device. In particular, it relates to a semiconductor device that functions as a drive circuit for driving a power supply device. Another aspect of the present invention relates to an amplifier. Another aspect of the present invention relates to an electronic component. Another aspect of the present invention relates to an electronic device according to one aspect of the present invention. Another aspect of the present invention relates to a semiconductor device, an amplifier, an electronic component, and a method for manufacturing an electronic device.

[0002] It should be noted that one aspect of the present invention is not limited to the above-mentioned technical field. The technical field of the invention disclosed herein relates to a product, a method, or a method of manufacture. Alternatively, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. More specifically, examples of the technical field of one aspect of the present invention disclosed herein include display devices, light-emitting devices, energy storage devices, imaging devices, memory devices, vehicles, mobile bodies, methods for driving them, or methods for manufacturing them. [Background technology]

[0003] High-power transistors are used to drive high loads such as motors, and there are high demands for fast switching characteristics, low power consumption, high reliability, and a wide operating temperature range. An example of a high-power transistor drive circuit is described in Patent Document 1.

[0004] Furthermore, power transistors are sometimes driven using PWM (Pulse Width Modulation) control. PWM control is performed by a PWM signal output from a microcontroller or the like. The voltage of a PWM signal is too low to directly drive a power transistor with a large gate capacitance. Therefore, the PWM signal needs to be converted into a high-voltage signal before being supplied to the power transistor. The drive circuit for converting the PWM signal into a high-voltage signal is composed of a silicon transistor. For example, Patent Document 2 discloses a semiconductor device configuration in which an n-channel type transistor and a p-channel type transistor are provided on a silicon substrate to control the on or off state of a power transistor.

[0005] Transistors having a metal oxide in the channel formation region (hereinafter sometimes referred to as "oxide semiconductor transistors" or "OS transistors") are known. Various semiconductor devices have been fabricated by a hybrid CMOS process of OS transistors and Si transistors (Non-Patent Literature 1). As shown in Non-Patent Literature 1, OS transistors can be stacked on Si transistors. Furthermore, it is possible to provide a first gate electrode (also called the gate or front gate) and a second gate electrode (also called the back gate) on the OS transistor. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] International Publication No. 2017 / 205618 [Patent Document 2] Japanese Patent Publication No. 2004-328329 [Non-patent literature]

[0007] [Non-Patent Document 1] H.Tamura et al.,“Embedded SRAM and Cortex-M0 Core Using a 60-nm Crystalline Oxide Semiconductor,”IEEE MICRO,2014,Vol.34,No.6,pp.42-53.

Summary of the Invention

Problems to be Solved by the Invention

[0008] One aspect of the present invention aims to provide a small semiconductor device, amplifier, electronic device, etc. Or, one aspect of the present invention aims to provide a semiconductor device, amplifier, electronic device, etc. with low power consumption. Or, one aspect of the present invention aims to provide a semiconductor device, amplifier, electronic device, etc. with high integration. Or, one aspect of the present invention aims to prevent malfunction of a semiconductor device. Or, one aspect of the present invention aims to suppress an increase in manufacturing cost. Or, one aspect of the present invention aims to provide a novel semiconductor device, amplifier, electronic component, electronic device, vehicle, moving body, etc.

[0009] Note that the problems of one aspect of the present invention are not limited to the problems listed above. The problems listed above do not prevent the existence of other problems. Other problems are those not mentioned in this item as described below. Problems not mentioned in this item can be derived from the descriptions in the specification, drawings, etc. by those skilled in the art, and can be appropriately extracted from these descriptions. Note that one aspect of the present invention solves at least one of the problems listed above and / or other problems.

Means for Solving the Problems

[0010] One aspect of the present invention includes a first transistor, a second transistor, a gate driver, a first comparison circuit, a second comparison circuit, and a first terminal. The gate driver includes a third transistor and a fourth transistor. One of the source and drain of the first transistor and one of the source and drain of the second transistor are electrically connected to the first terminal. The third transistor and the fourth transistor are stacked on the first transistor. One of the source and drain of the third transistor and one of the source and drain of the fourth transistor are electrically connected to the gate of the first transistor. The first comparison circuit is supplied with an analog signal and a first potential, and has a function of outputting, as a first output signal, a signal corresponding to the comparison result between the analog signal and the first potential. The second comparison circuit is supplied with the first output signal and a carrier wave, and has a function of outputting, as a second output signal, a signal corresponding to the comparison result between the first output signal and the carrier wave. The gate driver has a function of outputting, to the first terminal, a signal corresponding to the second output signal by applying a desired potential to the gates of the first transistor and the second transistor, respectively.

[0011] Also, in the above configuration, it is preferable that the first transistor has one or more selected from silicon, germanium, silicon germanium, gallium arsenide, gallium aluminum arsenide, indium phosphide, silicon carbide, zinc selenide, gallium nitride, and gallium oxide in the channel formation region.

[0012] Also, in the above configuration, the third transistor and the fourth transistor each have a metal oxide in the channel formation region, and the metal oxide is a semiconductor device having indium and zinc.

[0013] Also, in the above configuration, it is preferable that the carrier wave is a triangular wave.

[0014] Alternatively, one aspect of the present invention is an amplifier comprising: a first transistor, a second transistor, a gate driver, a power supply control circuit, an inductor, a capacitive element, a first terminal, a second terminal, and a third terminal, wherein the gate driver comprises a third transistor and a fourth transistor, the third transistor and the fourth transistor each being stacked on the first transistor, one source and drain of the first transistor and one source and drain of the second transistor are electrically connected to the first terminal, one source and drain of the third transistor and one source and drain of the fourth transistor are electrically connected to the gate of the first transistor, the power supply control circuit is electrically connected to the gate driver and the second terminal, one terminal of the inductor is electrically connected to the first terminal, the other terminal of the inductor is electrically connected to the third terminal and one terminal of the capacitive element, and the power supply control circuit has the function of generating a signal based on an analog signal provided from the second terminal and providing it to the gate driver, and outputting an amplified analog signal from the third terminal.

[0015] Furthermore, in the above configuration, it is preferable that the power control circuit includes a first comparator circuit and a second comparator circuit, the first comparator circuit having the function of outputting a signal corresponding to the comparison result between an analog signal and a first potential as a first output signal, the second comparator circuit having the function of outputting a signal corresponding to the comparison result between the first output signal and a carrier wave as a second output signal, and the gate driver having the function of outputting a signal corresponding to the second output signal to the first terminal by applying a desired potential to the gate of the first transistor and the gate of the second transistor, respectively.

[0016] Furthermore, in the above configuration, it is preferable that the first terminal or the third terminal is electrically connected to the second terminal.

[0017] Alternatively, one aspect of the present invention is an electronic device having the amplifier described above and a speaker.

[0018] Alternatively, one aspect of the present invention is a semiconductor device comprising a first transistor, an insulating layer on the first transistor, a conductive layer, and a gate driver, wherein a portion of the conductive layer is provided to be embedded within the insulating layer, the gate driver comprises a second transistor and a third transistor, the second and third transistors are stacked on the first transistor, the second and third transistors each have a metal oxide in their channel forming region, the metal oxide being indium and zinc, one of the source and drain of the second transistor and one of the source and drain of the third transistor are electrically connected to the gate of the first transistor via the conductive layer, the gate driver is provided with a first potential and a second potential, and the gate driver has the function of selectively applying either the first potential or the second potential to the gate of the first transistor.

[0019] Furthermore, in the above configuration, it is preferable that the gate driver has a level shift circuit, and that the level shift circuit has the function of generating the potential applied to the gate of the second transistor and the gate of the third transistor, respectively.

[0020] Furthermore, in the above configuration, it is preferable that the first transistor has one or more elements selected from silicon, germanium, silicon germanium, gallium arsenide, gallium aluminum arsenide, indium phosphide, silicon carbide, zinc selenide, gallium nitride, and gallium oxide in its channel formation region.

[0021] Furthermore, in the above configuration, it is preferable that the metal oxide comprises one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium.

[0022] Furthermore, in the above configuration, it is preferable that the device includes a drain electrode, a first diffusion layer on the drain electrode, a semiconductor region and a second diffusion layer on the first diffusion layer, a gate electrode on the semiconductor region, and a source electrode on the second diffusion layer, wherein the first diffusion layer has a region that functions as the drain of the first transistor, the semiconductor region has a region that functions as the channel formation region of the first transistor, and the second diffusion layer has a region that functions as the source of the first transistor.

[0023] Furthermore, in the above configuration, it is preferable that a second semiconductor region is bonded to the semiconductor region, the polarity of the second diffusion layer and the polarity of the second semiconductor region are different from each other, and that the first diffusion layer, the second semiconductor region, and the second diffusion layer each have a region that functions as part of a diode element.

[0024] Furthermore, in the above configuration, the second semiconductor region is preferably a region bonded to the second diffusion layer.

[0025] Furthermore, in the above configuration, it is preferable that the second semiconductor region and the second diffusion layer form a pn junction. [Effects of the Invention]

[0026] According to one aspect of the present invention, it is possible to provide a compact semiconductor device, amplifier, electronic device, etc. Furthermore, according to one aspect of the present invention, it is possible to provide a semiconductor device, amplifier, electronic device, etc. with low power consumption. Furthermore, according to one aspect of the present invention, it is possible to provide a semiconductor device, amplifier, electronic device, etc. with high integration density. Furthermore, according to one aspect of the present invention, it is possible to prevent malfunctions of semiconductor devices. Furthermore, according to one aspect of the present invention, it is possible to suppress increases in manufacturing costs. Furthermore, according to one aspect of the present invention, it is possible to provide a novel semiconductor device, amplifier, electronic component, electronic device, vehicle, mobile device, etc.

[0027] The effects of one aspect of the present invention are not limited to those listed above. The listed effects do not preclude the existence of other effects. These other effects are those described below and not mentioned in this section. Those not mentioned in this section can be derived from the description in the specification or drawings, etc., by those skilled in the art, and can be appropriately extracted from these descriptions. One aspect of the present invention has at least one of the effects listed above and / or other effects. Therefore, one aspect of the present invention may, in some cases, not have the effects listed above. [Brief explanation of the drawing]

[0028] [Figure 1] Figure 1A is a circuit diagram showing an example of an amplifier according to one aspect of the present invention. Figure 1B is a circuit diagram showing an example of an amplifier according to one aspect of the present invention. [Figure 2] Figure 2A is a circuit diagram showing an example of an amplifier according to one aspect of the present invention. Figure 2B is a block diagram showing the configuration of a circuit according to one aspect of the present invention. [Figure 3] Figure 3 is a circuit diagram showing an example of an amplifier according to one embodiment of the present invention. [Figure 4] Figure 4 is a circuit diagram showing the configuration of a circuit according to one aspect of the present invention. [Figure 5] Figure 5 is a circuit diagram showing the configuration of a circuit according to one embodiment of the present invention. [Figure 6] Figure 6A is a circuit diagram showing the configuration of a circuit according to one embodiment of the present invention. Figure 6B is a circuit diagram showing the configuration of a circuit according to one embodiment of the present invention. [Figure 7] Figure 7 is a timing chart diagram illustrating the operation of a circuit according to one embodiment of the present invention. [Figure 8] Figure 8A is a circuit diagram showing the configuration of a circuit according to one embodiment of the present invention. Figure 8B is a block diagram showing the configuration of a circuit according to one embodiment of the present invention. [Figure 9] Figure 9 is a circuit diagram showing the configuration of a circuit according to one embodiment of the present invention. [Figure 10] Figure 10 is a circuit diagram illustrating one aspect of the present invention. [Figure 11]Figure 11 is a cross-sectional view showing an example of the structure of a semiconductor device. [Figure 12] Figure 12 is a cross-sectional view showing an example of the structure of a semiconductor device. [Figure 13] Figure 13 is a cross-sectional view showing an example of a transistor structure. [Figure 14] Figure 14A is a cross-sectional view showing an example of transistor structure. Figure 14B is a cross-sectional view showing an example of transistor structure. [Figure 15] Figure 15 shows an example of the configuration of an electronic component having a semiconductor device according to one embodiment of the present invention. [Figure 16] Figure 16 shows an example of the configuration of an electronic component having a semiconductor device according to one embodiment of the present invention. [Figure 17] Figure 17 is a cross-sectional view showing an example of the structure of a semiconductor device. [Figure 18] Figure 18 shows an example of an electronic component. [Figure 19] Figure 19A is an example of an electronic device according to one aspect of the present invention. Figure 19B is an example of an electronic device according to one aspect of the present invention. Figure 19C is an example of an electronic device according to one aspect of the present invention. Figure 19D is an example of an electronic device according to one aspect of the present invention. Figure 19E is an example of an electronic device according to one aspect of the present invention. [Modes for carrying out the invention]

[0029] The embodiments will be described below with reference to the drawings. However, it will be readily apparent to those skilled in the art that the embodiments can be implemented in many different ways, and their form and details can be modified in various ways without departing from the spirit and scope thereof. Accordingly, the present invention shall not be construed as being limited to the contents of the following embodiments.

[0030] In this specification, the ordinal numbers "1st," "2nd," and "3rd" are used to avoid confusion of constituent elements. Therefore, they do not limit the number of constituent elements, nor do they limit the order of the constituent elements. For example, a constituent element referred to as "1st" in one embodiment of this specification may be referred to as "2nd" in another embodiment or in the claims. For example, a constituent element referred to as "1st" in one embodiment of this specification may be omitted in another embodiment or in the claims.

[0031] In drawings, the same reference numeral may be used for identical elements, elements with similar functions, elements made of the same material, or elements formed simultaneously, and the explanation of such repetition may be omitted.

[0032] Furthermore, the position, size, and scope of each component shown in the drawings may not represent the actual position, size, and scope in order to facilitate understanding of the invention. Therefore, the disclosed invention is not necessarily limited to the position, size, and scope disclosed in the drawings. For example, in the actual manufacturing process, resist masks and other materials may be unintentionally reduced due to processes such as etching, but this may not be reflected in the drawings for the sake of ease of understanding.

[0033] Furthermore, in top views (also called "plan views") and perspective views, some components may be omitted to make the drawings easier to understand.

[0034] Furthermore, in this specification, the terms "electrode" and "wiring" do not functionally limit these components. For example, "electrode" may be used as part of "wiring," and vice versa. Moreover, the terms "electrode" and "wiring" also include cases where multiple "electrodes" or "wiring" are formed as a single unit.

[0035] Furthermore, in this specification, "terminal" may refer to, for example, wiring or electrodes connected to wiring. Also, in this specification, a part of "wiring" may be referred to as a "terminal."

[0036] In this specification, the terms "above" and "below" do not necessarily mean that the relative positions of the components are directly above or below each other and that they are in direct contact. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude cases where other components are included between insulating layer A and electrode B.

[0037] Furthermore, the functions of source and drain can be interchanged depending on operating conditions, such as when transistors of different polarities are used or when the direction of current changes during circuit operation, making it difficult to definitively determine which is the source and which is the drain. For this reason, in this specification, the terms source and drain may be used interchangeably.

[0038] Furthermore, in this specification, "electrically connected" includes both direct connections and connections made via "something that has some electrical function." Here, "something that has some electrical function" is not particularly limited as long as it enables the exchange of electrical signals between the connected objects. Therefore, even when it is expressed as "electrically connected," in a real circuit there may be no physical connection point, and only wiring may extend.

[0039] Furthermore, in this specification, "parallel" refers to a state in which, for example, two straight lines are positioned at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also, "perpendicular" and "orthogonal" refer to a state in which, for example, two straight lines are positioned at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included.

[0040] In this specification and other documents, when count values ​​and measured values ​​are referred to as "identical," "same," "equal," or "uniform," unless otherwise specified, this shall include an error margin of plus or minus 20%.

[0041] Furthermore, in this specification, when etching is performed after forming a resist mask, the resist mask shall be removed after the etching is completed, unless otherwise specified.

[0042] Furthermore, voltage often refers to the potential difference between a given potential and a reference potential (e.g., ground potential or source potential). Therefore, voltage and potential are often interchangeable.

[0043] Even when the term "semiconductor" is used, if, for example, its conductivity is sufficiently low, it will possess the properties of an "insulator." Therefore, it is possible to replace "semiconductor" with "insulator." In this case, the boundary between "semiconductor" and "insulator" is ambiguous, and a strict distinction between the two is difficult. Consequently, "semiconductor" and "insulator" as used herein may be interchangeable.

[0044] Furthermore, even when the term "semiconductor" is used, if, for example, its conductivity is sufficiently high, it will possess the properties of a "conductor." Therefore, it is possible to replace "semiconductor" with "conductor." In this case, the boundary between "semiconductor" and "conductor" is ambiguous, and a strict distinction between the two is difficult. Consequently, "semiconductor" and "conductor" as used herein may be interchangeable.

[0045] In this specification, the "on state" of a transistor refers to a state in which the source and drain of the transistor can be considered to be electrically short-circuited (also called the "conducting state"). The "off state" of a transistor refers to a state in which the source and drain of the transistor can be considered to be electrically disconnected (also called the "non-conducting state").

[0046] Furthermore, in this specification, "on-current" may refer to the current flowing between the source and drain when the transistor is in the "on" state. Also, "off-current" may refer to the current flowing between the source and drain when the transistor is in the "off" state.

[0047] Furthermore, in this specification, the high power supply potential VDD (hereinafter also simply referred to as "VDD" or "H potential") refers to a power supply potential that is higher than the low power supply potential VSS. The low power supply potential VSS (hereinafter also simply referred to as "VSS" or "L potential") refers to a power supply potential that is lower than the high power supply potential VDD. The ground potential can also be used as VDD or VSS. For example, if VDD is the ground potential, then VSS is a potential lower than the ground potential, and if VSS is the ground potential, then VDD is a potential higher than the ground potential.

[0048] Furthermore, in this specification, "gate" refers to the gate electrode and part or all of the gate wiring. Gate wiring refers to wiring that electrically connects the gate electrode of at least one transistor to another electrode or another wire.

[0049] Furthermore, in this specification, "source" refers to a source region, a source electrode, and part or all of the source wiring. The source region refers to a region of the semiconductor layer whose resistivity is below a certain value. The source electrode refers to the conductive layer in the portion connected to the source region. The source wiring refers to wiring used to electrically connect the source electrode of at least one transistor to another electrode or another wiring.

[0050] Furthermore, in this specification, "drain" refers to a drain region, a drain electrode, and part or all of the drain wiring. The drain region refers to a region of the semiconductor layer whose resistivity is below a certain value. The drain electrode refers to the conductive layer in the portion connected to the drain region. The drain wiring refers to wiring used to electrically connect the drain electrode of at least one transistor to another electrode or another wiring.

[0051] A semiconductor device refers to a circuit containing semiconductor elements (transistors, diodes, etc.) and a device having such a circuit. It also refers to any device that can function by utilizing the properties of semiconductors. For example, integrated circuits, chips equipped with integrated circuits, display devices, light-emitting devices, lighting devices, and electronic devices are all semiconductor devices.

[0052] (Embodiment 1) This embodiment describes an amplifier according to one aspect of the present invention.

[0053] An amplifier according to one embodiment of the present invention is shown in Figures 1A, 1B, 2A, and 3.

[0054] The amplifier 750 shown in Figure 1A comprises a semiconductor device 751, an inductor 752, a capacitive element 753, and a terminal 793. The inductor 752 is sometimes called a coil. The amplifier 750 processes the input signal applied to terminal 792 and outputs it from terminal 793. The amplifier 750 is sometimes simply called an amplifier.

[0055] The input signal supplied to terminal 792 is, for example, an analog signal. If the input signal is a digital signal, for example, the digital signal can be converted to an analog signal using a digital-to-analog conversion circuit before being supplied to terminal 792.

[0056] The semiconductor device 751 includes a gate driver 760, a power control circuit 761, transistors 762 and 763, terminals 791, 792, 794, and 795. The gate driver 760 has terminals G1 and G2. The power control circuit 761 includes a comparator 771. Terminals V1 and V2 are connected to the gate driver 760. Terminal REF is connected to the power control circuit 761. A comparator is sometimes called a comparator circuit.

[0057] One terminal of inductor 752 is electrically connected to terminal 791, and the other terminal is electrically connected to one electrode of capacitive element 753 and terminal 793. The other terminal of capacitive element 753 is given ground potential.

[0058] The semiconductor device 751 has the function of amplifying, converting, etc., the input signal applied to terminal 792 and outputting it from terminal 791. The inductor 752 and the capacitive element 753 can function as a low-pass filter. The low-pass filter has the function of attenuating specific frequency components of the output signal from terminal 791 and outputting them from terminal 793.

[0059] The output from terminal 793 is fed back to terminal 792. In Figure 1A, an example is shown where terminal 793 is electrically connected to terminal 792 for feedback, but terminal 791 may also be electrically connected to terminal 792 for feedback.

[0060] In semiconductor device 751, terminal 792 is electrically connected to one of the non-inverting and inverting input terminals of comparator 771, and terminal REF is electrically connected to the other. A reference potential Vr is supplied to terminal REF. The output terminal of comparator 771 is electrically connected to gate driver 760.

[0061] Terminal G1 of the gate driver 760 is electrically connected to the gate of transistor 762, and terminal G2 is electrically connected to the gate of transistor 763. One source and drain of transistor 762 and one source and drain of transistor 763 are electrically connected to terminal 791. The other source and drain of transistor 762 is electrically connected to terminal 794, and the other source and drain of transistor 763 is electrically connected to terminal 795.

[0062] As an example, a high potential VH is applied to terminal 794 and a low potential VL is applied to terminal 795. The ground potential may be used as the low potential VL. When transistor 763 is ON and transistor 762 is OFF, terminal 791 is electrically connected to terminal 795, and terminal 791 is given a low potential VL. When transistor 763 is OFF and transistor 762 is ON, terminal 791 is electrically connected to terminal 794, and terminal 791 is given a high potential VH.

[0063] The comparator 771 has the function of outputting the result of comparing the signal applied to terminal 792 with a reference potential Vr to the gate driver 760.

[0064] The gate driver 760 controls the gates of transistor 762 and transistor 763 based on the output from comparator 771, thereby outputting a signal from terminal 791 whose amplitude is the difference between a high potential VH and a low potential VL.

[0065] As shown in Figure 1B, the signal applied to terminal 792 may be divided by a resistor and then applied to the non-inverting or inverting input terminal of comparator 771. Figure 1B shows an example in which resistor elements 774 and 775 are placed between terminals 792 and 795 to divide the signal by a resistor.

[0066] The amplifier 750 shown in Figure 2A has a different power supply control circuit 761 configuration compared to Figure 1B. The power supply control circuit 761 of the amplifier 750 shown in Figure 2A includes a comparator 771, a comparator 772, a carrier wave generation circuit 773, a resistor 774, a resistor 775, and a terminal REF. The signal applied to terminal 792 is resistively divided by resistors 774 and 775 and applied to one of the non-inverting and inverting input terminals of comparator 772. Terminal REF is electrically connected to the other of the non-inverting and inverting input terminals of comparator 772. The output terminal of comparator 772 is electrically connected to one of the non-inverting and inverting input terminals of comparator 771, and the carrier wave generation circuit 773 is electrically connected to the other. The output terminal of comparator 771 is electrically connected to the gate driver 760.

[0067] The carrier wave generation circuit 773 has the function of generating and outputting a carrier wave. Various waveforms can be used as the carrier wave, such as a triangular wave.

[0068] Comparator 772 has the function of outputting signal A, obtained as a result of comparing the input signal from terminal 792 with the reference potential Vr, to comparator 771. Comparator 771 has the function of outputting signal B, obtained as a result of comparing signal A with the carrier wave provided by the carrier wave generation circuit 773, to gate driver 760.

[0069] The control method of the power supply control circuit 761 shown in Figures 1A and 1B is sometimes referred to as the hysteresis control method, and the control method of the power supply control circuit 761 shown in Figure 2A is sometimes referred to as the PWM (Pulse Width Modulation) control method.

[0070] Transistors 762 and 763 are sometimes called power MOSFETs or power transistors. Transistors 762 and 763 may have parasitic diodes. Parasitic diodes have functions such as reverse current prevention and rectification. They also have the function of mitigating electric field concentration when a high voltage is applied between the source and drain, thereby suppressing the destruction or degradation of the transistor. Alternatively, a diode element may be provided separately and connected in parallel with the transistor, either in place of or in combination with the parasitic diode.

[0071] Figure 2B shows an example configuration of the gate driver 760. Details of the gate driver 760 configuration will be described later.

[0072] The gate driver 760 shown in Figure 2B has terminal G1, terminal G2, and two driver circuits 760a. Of the two driver circuits 760a, one is connected to terminal G1 and the other is connected to terminal G2. The driver circuit 760a has a buffer circuit 104 connected to terminal G1 or terminal G2, a buffer circuit 103 connected to buffer circuit 104, a level shift circuit 102 connected to buffer circuit 103, and a buffer circuit 101 connected to level shift circuit 102. Buffer circuit 104 has transistors 121 and 122. One of the source and drain of transistor 121 is electrically connected to terminal V1, and the other is electrically connected to one of the source and drain of transistor 122. Terminal V2 is electrically connected to the other of the source and drain of transistor 122.

[0073] It is preferable to use transistors (also called "OS transistors" or "OS-FETs") that include an oxide semiconductor (OS), a type of metal oxide, in the semiconductor layer where the channel is formed, as transistors 121 and 122. OS transistors can be formed using thin-film formation methods such as sputtering, CVD, and ALD. By using OS transistors as transistors 121 and 122, and using a transistor in at least one of transistors 762 and 763 that has one or more selected from silicon, germanium, silicon germanium, gallium arsenide, gallium aluminum arsenide, indium phosphide, silicon carbide, zinc selenide, gallium nitride, and gallium oxide in the channel formation region, OS transistors can be stacked and provided using the thin-film formation method after at least one of transistors 762 and 763 has been provided. Therefore, the circuit area, chip area, etc. of the amplifier 750 can be reduced. In addition, the integration density of the amplifier 750 can be improved. Furthermore, since transistors 762, 763, etc., and the OS transistor can be stacked, the amount of wiring can be reduced, which may improve the characteristics and reliability of the amplifier 750.

[0074] The amplifier 750 shown in Figure 3 differs from that in Figure 2 in the configuration of the power control circuit 761, and has capacitive elements 776, resistors 777, resistors 778, and capacitive elements 779. In addition, the output from terminal 791, rather than the output from terminal 793, is fed back to one of the non-inverting and inverting input terminals (hereinafter referred to as terminal Ci1) of the comparator 772 via resistor 778.

[0075] In Figure 3, a capacitive element 776 and a resistive element 777 are provided between terminal Ci1 and terminal 792. One electrode of the capacitive element 776 is electrically connected to terminal 792, and the other electrode is electrically connected to one terminal of the resistive element 777. The other terminal of the resistive element 777 is electrically connected to terminal Ci1, one terminal of the resistive element 778, and one electrode of the capacitive element 779. The other terminal of the resistive element 778 is electrically connected to terminal 791. The other electrode of the capacitive element 779 is electrically connected to the output terminal of the comparator 772.

[0076] Comparator 772 and capacitance element 779 function as an integrating circuit.

[0077] By providing feedback from terminal 791 to terminal Ci1, for example, distortion, noise, etc., of the output signal obtained at terminal 793 can be reduced.

[0078] The amplifier 750 shown in Figure 3 can be suitably used, for example, to amplify acoustic signals.

[0079] This embodiment can be appropriately combined with descriptions of other embodiments.

[0080] (Embodiment 2) This embodiment describes the configuration and operation of a driver circuit applicable to a semiconductor device according to one aspect of the present invention, as well as an example of a semiconductor device configuration using the driver circuit.

[0081] Figure 4 is a circuit diagram showing an example of a driver circuit 760a in the gate driver 760 of the previous embodiment. The driver circuit 760a shown in Figure 4 includes a buffer circuit 101, a level shift circuit 102, a buffer circuit 103, and a buffer circuit 104.

[0082] In this embodiment, the driver circuit 760a is configured with buffer circuits 101, 103, 104, and level shift circuit 102 using transistors of the same polarity. Therefore, the driver circuit 760a can be configured with unipolar transistors.

[0083] Furthermore, the driver circuit 760a is configured to include a capacitive element within the level shift circuit 102, and to provide a boosting signal through the capacitive element, thereby boosting the signal using capacitive coupling in the capacitive element. In this configuration, the voltage applied between the source and drain of the transistor in the level shift circuit 102 can be made smaller than the voltage applied to the capacitive element in the level shift circuit 102, thereby suppressing dielectric breakdown of the transistor.

[0084] Next, we will describe each of the circuits in the driver circuit 760a.

[0085] The buffer circuit 101 is a circuit that converts the PWM signal output from a microcontroller or the like into a signal that can operate the level shift circuit 102, with increased boost and / or increased charge supply capability, and outputs it. The PWM signal output from the microcontroller or the like is input to the buffer circuit 101 via terminals IN_H and IN_L. The signal output from the buffer circuit 101 is the signal that is input to the level shift circuit 102.

[0086] In Figure 4, the PWM signal output from the microcontroller, etc., is referred to as the first signal (indicated as "1st signal" in the figure). Also in Figure 4, the signal output from the buffer circuit 101 and input to the level shift circuit 102 is referred to as the second signal (indicated as "2nd signal" in the figure). The PWM signal is boosted via the buffer circuit 101, the level shift circuit 102, and the buffer circuit 103. The boosted PWM signal is used to alternately conduct transistors 121 and 122 in the buffer circuit 104.

[0087] In Figure 4, two signals input from terminals IN_H and IN_L are shown as an example of a PWM signal, but the configuration is not limited to this. For example, three or more PWM signals may be input to the buffer circuit 101. Preferably, the two signals input from terminals IN_H and IN_L are inverted signals of each other.

[0088] The level shift circuit 102 includes transistors 111 and 112, and capacitive elements 113 and 114. The output from the buffer circuit 101 is supplied to one electrode of capacitive element 113 and one electrode of capacitive element 114. One source and one drain of transistor 111 are electrically connected to terminal V2, and the other is electrically connected to the gate of transistor 112 and the other electrode of capacitive element 113. One source and one drain of transistor 112 are electrically connected to terminal V2, and the other is electrically connected to the gate of transistor 111 and the other electrode of capacitive element 114.

[0089] The level shift circuit 102 is a circuit that has the function of boosting the voltage of the PWM signal output from a microcontroller or the like, based on a second signal output from the buffer circuit 101, and outputting it. The signal input to the level shift circuit 102 is the signal output from the buffer circuit 101 that is supplied to the capacitive elements 113 and 114. The signal output from the buffer circuit 101 is the signal input to the level shift circuit 102.

[0090] The second signal applied to the level shift circuit 102 is boosted by capacitive coupling in capacitive elements 113 and 114. The boosted second signal is further boosted by the voltage applied to terminal V2 (hereinafter referred to as voltage v2a) and output to the buffer circuit 103. In Figure 4, the signal output from the level shift circuit 102 and input to the buffer circuit 103 is referred to as the third signal (indicated as 3rd signal in the figure). The second and third signals were originally signals applied to terminals IN_H and IN_L.

[0091] Transistors 111 and 112 are transistors that function as switches. Furthermore, transistors 111 and 112 are transistors with the same polarity. As an example, Figure 4 shows an example in which n-channel transistors are used as transistors 111 and 112.

[0092] Transistors 111 and 112 operate as follows: when one of the second signals input to capacitive elements 113 and 114 becomes high, the transistor whose gate is connected to the high-level capacitive element becomes conductive. Conversely, when the other of the second signals input to capacitive elements 113 and 114 becomes low, the transistor whose gate is connected to the low-level capacitive element becomes non-conductive. For example, when the second signal input to capacitive element 113 is high, transistor 112 becomes conductive, and when the second signal input to capacitive element 114 is low, transistor 111 becomes non-conductive. Similarly, when the second signal input to capacitive element 113 is low, transistor 112 becomes non-conductive, and when the second signal input to capacitive element 114 is high, transistor 111 becomes conductive.

[0093] During the period when transistor 111 is conducting, current flows from terminal V2 to node N1, to which the capacitive element 113 connected to one of the source and drain of transistor 111, and the gate of transistor 112, which is in a non-conducting state, are connected, and the node is charged (first operation).

[0094] On the other hand, transistor 112 operates in the opposite direction to transistor 111. That is, during the period when transistor 112 is conducting, current flows from terminal V2 to node N2, which is connected to the capacitive element 114 connected to one of the source and drain of transistor 112, and the gate of transistor 111, which is not conducting, and charges the node (first operation).

[0095] Next, during the period when transistor 111 is non-conductive, the nodes to which the capacitive element 113, connected to either the source or drain of transistor 111, and the gate of transistor 112 are connected become electrically floating. At this time, a high level is applied to the capacitive element 113. As a result, the potential of the electrically floating nodes rises further due to capacitive coupling. The signal boosted by this capacitive coupling is output to the buffer circuit 103 as a third signal (second operation).

[0096] On the other hand, during the period when transistor 112 is non-conductive, the nodes to which the capacitive element 114, connected to either the source or drain of transistor 112, and the gate of transistor 111 are connected become electrically floating. At this time, a high level is applied to the capacitive element 114. As a result, the potential of the electrically floating nodes rises further due to capacitive coupling. The signal boosted by this capacitive coupling is output to the buffer circuit 103 as a third signal (second operation).

[0097] By repeating the first and second operations described above, the level shift circuit 102 can output a third signal obtained by boosting the second signal.

[0098] Furthermore, it is desirable that the capacitive elements 113 and 114 are elements that do not undergo dielectric breakdown under high voltage. The capacitance of the capacitive elements 113 and 114 is preferably 5 times or more, more preferably 10 times or more, the gate capacitance of the buffer circuit 103. When the capacitance of the capacitive elements 113 and 114 is increased, it is preferable that the second signal be a signal whose charge supply capability is enhanced by the buffer circuit 101.

[0099] Furthermore, in order to increase the capacitance, the capacitive elements 113 and 114 may be provided on a separate substrate from the substrate on which the transistors of the semiconductor device are formed.

[0100] The capacitances of capacitive elements 113 and 114 may be the same or different.

[0101] The level shift circuit 102 shown in Figure 4 has a configuration in which a second signal is applied to capacitive elements 113 and 114 using capacitive coupling. With this configuration, high voltage is not directly applied between the source and drain of transistors 111 and 112, thus eliminating dielectric breakdown of the transistors. As a result, the drive circuit for driving the power transistors can operate in a normal state, and malfunctions can be prevented. In addition, through-current flowing through the level shift circuit 102 can be eliminated, resulting in lower power consumption.

[0102] The buffer circuit 103 is a circuit that has the function of boosting the third signal output from the level shift circuit 102 into a signal that can operate the buffer circuit 104 and / or converting it into a signal with increased charge supply capability and outputting it. The signal input to the buffer circuit 103 is the signal applied to the gate of the transistor in the buffer circuit 103. The signal output from the buffer circuit 103 is the signal input to the buffer circuit 104.

[0103] In Figure 4, the signal applied to the gate of the transistor in buffer circuit 103 is considered the third signal. Also in Figure 4, the signal output from buffer circuit 103 and input to buffer circuit 104 is considered the fourth signal (indicated as 4th signal in the figure). The fourth signal is originally the signal applied to terminals IN_H and IN_L.

[0104] In Figure 4, a configuration is shown in which a buffer circuit 103 is provided between the level shift circuit 102 and the buffer circuit 104, but a configuration with multiple buffer circuits is also possible. Alternatively, a delay circuit such as a flip-flop may be provided between the level shift circuit 102 and the buffer circuit 104.

[0105] The buffer circuit 104 includes transistors 121 and 122. The signal output by the buffer circuit 104 is supplied to an externally located power MOSFET via the output terminal OUT.

[0106] The voltage applied to terminal V1 (hereinafter referred to as voltage v1a) is the voltage used to switch the power MOSFET connected to the output terminal OUT to a conductive state. Voltage v2a is the voltage used to switch the power transistor connected to the output terminal OUT to a non-conductive state. The buffer circuit 104 controls the switching of the power MOSFET connected to the output terminal OUT by switching the voltage output from the output terminal OUT using either the voltage from terminal V1 or the voltage from terminal V2. Voltage v1a may also be referred to as the first voltage. Voltage v2a may also be referred to as the second voltage. It is preferable that voltages v1a and v2a are generated by boosting the high power supply potential VDD using a bootstrap circuit. If the high power supply potential VDD is a higher voltage, voltages v1a and v2a may also be generated by stepping down the high power supply potential VDD. Voltages v1a and v2a may also be voltages directly supplied from an external source. Voltage v1a is a voltage greater than voltage v2a.

[0107] The buffer circuit 104 is a circuit that has the function of outputting a voltage to switch between conduction and non-conductivity of the power transistor based on the fourth signal output from the buffer circuit 103. The signal input to the buffer circuit 104 is the signal applied to the gate of either transistor 121 or transistor 122 in the buffer circuit 104. The signal output from the buffer circuit 104 is output via the output terminal OUT and is a signal that switches between conduction and non-conductivity of the externally provided power transistor. The fourth signal applied to the gates of transistors 121 and 122 is, as described above, originally the signal applied to terminals IN_H and IN_L. The fourth signal alternately makes transistors 121 and 122 conduct. Therefore, the signal output from the output terminal OUT is a signal that switches between voltage v1a and voltage v2a.

[0108] The driver circuit 760a described above has a configuration in which a signal is applied to the capacitive elements 113 and 114 in the level shift circuit 102 using capacitive coupling. This configuration prevents high voltage from being directly applied between the source and drain of transistors 111 and 112, thus eliminating dielectric breakdown of the transistors. Therefore, the drive circuit for driving the power device can operate in a normal state, and malfunctions can be prevented. In addition, through-current flowing through the level shift circuit 102 can be eliminated, resulting in lower power consumption. Thus, the reliability of the amplifier 750 can be improved. Furthermore, the power consumption of the amplification circuit can be reduced. In addition, noise in the signal output from the amplifier 750 can be reduced in some cases.

[0109] Next, the specific circuit configuration and operation of the driver circuit 760a shown in Figure 4 will be explained using Figures 5 to 9.

[0110] Figure 5 is a diagram showing a specific example of the circuit configuration for the driver circuit shown in Figure 4.

[0111] The buffer circuit 101 shown in Figure 5 includes inverter circuits 131 and 132. Inverter circuits 131 and 132 are supplied with potential from terminal V3 and terminal GND, respectively. The terminal GND is supplied with ground potential. In addition, inverter circuits 131 and 132 have transistors with the same polarity as transistors 111 and 112 in the level shift circuit 102.

[0112] Figure 6A shows an example of the circuit configuration of inverter circuits 131 and 132, which have n-channel transistors as transistors of the same polarity.

[0113] The inverter circuit 131 (or inverter circuit 132) shown in Figure 6A has transistors 151, 152, 153, 154, and a capacitive element 155. Transistors 151, 152, 153, and 154 are shown as n-channel type transistors, similar to transistors 111 and 112 in Figures 4 and 5.

[0114] A voltage is supplied to terminal V3 for boosting the level shift circuit 102 by charging and discharging the capacitive elements 113 and 114. The wiring connected to terminal V3 preferably has a high charge supply capacity so that the charging and discharging of the capacitive elements 113 and 114 can be performed at high speed. The voltage supplied to terminal V3 (hereinafter referred to as voltage v3a) may also be called a third voltage. It is preferable that voltage v3a is a voltage generated by boosting the high power supply potential VDD using a bootstrap circuit. Alternatively, if the high power supply potential VDD is a higher voltage, voltage v3a may be a voltage generated by internally stepping down the high power supply potential VDD. Voltage v3a may also be a voltage supplied directly from the outside. Voltage v3a is a voltage smaller than voltages v1a and v2a.

[0115] Transistors 151 and 152 have one of their source and drain terminals connected to terminal V3. Transistors 153 and 154 also have one of their source and drain terminals connected to terminal GND. Capacitive element 155 is placed between the gate of transistor 152 and the other source and drain terminals. The inverter circuit 131 (or inverter circuit 132) shown in Figure 6A is a circuit that can output a signal with the logic of the first signal inverted as a second signal.

[0116] Note that the inverter circuit 131 (or inverter circuit 132) shown in Figure 6A may be a circuit that is electrically arranged in series as shown in Figure 6B and can output a second signal by inverting the logic of the first signal back to its original logic.

[0117] Furthermore, the level shift circuit 102 shown in Figure 5 has the same configuration as the level shift circuit 102 described in Figure 4. In Figure 5, as in Figure 4, transistors 111 and 112 of the level shift circuit 102 are shown as n-channel type transistors.

[0118] Furthermore, the buffer circuit 103 shown in Figure 5 has transistors 141, 142, 143, and 144. The buffer circuit 103 is connected to terminals V4 and V2. The buffer circuit 103 outputs a fourth signal, which is obtained by switching the signal applied to the gates of transistors 121 and 122 of the buffer circuit 104 between the voltage applied to terminal V4 (hereinafter referred to as voltage v4a) and voltage v2a, based on the third signal. Note that transistors 141, 142, 143, and 144 are shown as n-channel type transistors, similar to transistors 111 and 112 in Figures 4 and 5.

[0119] Voltage v4a is a voltage used to further boost the third signal in order to ensure that transistors 121 and 122 are turned on. This boost prevents transistors 121 and 122 from not turning on if, for example, the third signal output via transistors 111 and 112 is a signal with a voltage that is lowered by the threshold voltage of the transistor. Voltage v4a may also be called the fourth voltage. Preferably, voltage v4a is a voltage generated by boosting the high power supply potential VDD using a bootstrap circuit. Alternatively, if the high power supply potential VDD is a higher voltage, voltage v4a may be a voltage generated by internally stepping down the high power supply potential VDD. Voltage v4a may also be a voltage supplied directly from the outside. Voltage v4a is the same as or higher than voltage v1a.

[0120] Figure 7 is a timing chart showing the operation of a circuit according to one embodiment of the present invention. The PWM signal applied to terminal IN_H shown in Figure 5 is denoted as PWM signal S_H, and the PWM signal applied to terminal IN_L is denoted as PWM signal S_L. The output signal applied to output terminal OUT is denoted as output signal S_OUT. PWM signals S_H, S_L, and output signal S_OUT can be represented as shown in the timing chart in Figure 7. Although the voltage scales of PWM signals S_H, S_L, and output signal S_OUT are shown with the same amplitude voltage, in reality, the amplitude voltage of output signal S_OUT is smaller than the amplitude voltages of PWM signals S_H and S_L. The potential on which PWM signals S_H and S_L oscillate is boosted by the buffer circuit 101, level shift circuit 102, and buffer circuit 103 described above, and becomes the voltage that controls the conduction or non-conduction state of transistors 121 and 122 in buffer circuit 104. The driver circuit 760a can output an output signal S_OUT that outputs either voltage V1 or voltage V2 according to the boosted PWM signals S_H and S_L.

[0121] Furthermore, in the configuration of the driver circuit 760a shown in Figure 5, the voltage of the wiring supplying the low power supply potential to buffer circuit 101 and the voltage of the wiring supplying the low power supply potential to buffer circuits 103 and 104 can be different voltages. Specifically, the voltage of the wiring supplying the low power supply potential to buffer circuit 101 can be set to ground potential, and the voltage of the wiring supplying the low power supply potential to buffer circuits 103 and 104 can be set to the voltage of terminal V2. Therefore, when current due to the reactance component accumulated in the wiring flows through the driver circuit 760a, malfunctions that occur when current flows to terminals IN_H and IN_L that supply the PWM signal can be reduced.

[0122] Transistors 111 and 112, transistors 121 and 122, transistors 141 to 144, and transistors 151 to 154, as described in Figures 5, 6A, and 6B, are all n-channel type transistors. In other words, the buffer circuits 101, 103, 104, and level shift circuit 102 of the semiconductor device can be constructed using unipolar transistors.

[0123] By constructing a semiconductor device using unipolar transistors, the number of photomasks required to differentiate between n-channel and p-channel transistors can be reduced compared to constructing a drive circuit using complementary transistors. Therefore, the configuration of the present invention can reduce manufacturing costs.

[0124] Simply replacing the transistors in a semiconductor device with unipolar transistors can lead to dielectric breakdown of the transistors when a semiconductor device is configured to convert a PWM signal to a high-voltage signal, because high voltage is used for signal conversion. On the other hand, the semiconductor device in this embodiment has a configuration in which the signal is supplied to the capacitive elements 113 and 114 in the level shift circuit 102 using capacitive coupling. With this configuration, high voltage is not directly applied between the source and drain of transistors 111 and 112, thus eliminating dielectric breakdown of the transistors. Therefore, the drive circuit for driving the power device can operate in a normal state, and malfunctions can be prevented.

[0125] Furthermore, in the semiconductor device of this embodiment, by constructing the semiconductor device with unipolar transistors, it is possible to construct transistors using semiconductor materials other than silicon for the semiconductor layer. For example, an oxide semiconductor can be used to construct the transistor for the semiconductor layer.

[0126] Oxide semiconductors have a larger energy gap compared to silicon, and thus can significantly reduce the generation of carriers due to thermal excitation. Therefore, transistors using oxide semiconductors as semiconductor layers can maintain their performance even in high-temperature environments and keep fluctuations in electrical properties small.

[0127] Furthermore, it is preferable that the oxide semiconductor be a highly purified oxide semiconductor (purified OS) in which impurities such as water or hydrogen, which act as electron donors, are reduced, and oxygen vacancies are also reduced. A highly purified oxide semiconductor is an i-type (intrinsic semiconductor) or very close to an i-type semiconductor. Therefore, a transistor having a channel formation region in a highly purified oxide semiconductor layer has a remarkably low off-current and high reliability in high-temperature environments. A transistor using an oxide semiconductor with such characteristics is suitable as a transistor for use in the semiconductor device of this embodiment.

[0128] The driver circuit 760a described above is constructed using unipolar transistors. This configuration allows the transistors constituting the driver circuit 760a to be made of oxide semiconductors. This configuration allows the transistors constituting the driver circuit 760a to have significantly low off-currents and improved reliability in high-temperature environments. Therefore, it is possible to prevent the transistors constituting the driver circuit 760a from malfunctioning due to temperature changes. Furthermore, the driver circuit 760a eliminates placement constraints such as having to space out the power transistors and the driver circuit in advance, or providing cooling means, to prevent overheating.

[0129] In the configuration of the driver circuit 760a shown in Figure 5, the output terminal OUT can be separated into two output terminals, OUT_H and OUT_L, as shown in Figure 8A. By separating the output terminal into two output terminals, OUT_H and OUT_L, as shown in Figure 8A, the through-current flowing between terminals V1 and V2 can be reduced.

[0130] Furthermore, the driver circuit 760a shown in Figure 8A can be simplified and represented as shown in Figure 8B using a block diagram.

[0131] Next, using the block diagram in Figure 8B, Figure 9 shows an example of an application of a semiconductor device used as a low-side driver to drive a power transistor.

[0132] Figure 9 shows a low-side driver using the driver circuit 760a from Figure 8A as an example of the gate driver 760. Figure 9 also shows transistors 762 and 763, which are power MOSFETs to which the output from the gate driver 760 is supplied. Furthermore, the control circuit 211 that supplies signals to the gate driver 760 is also shown.

[0133] The gate driver 760 shown in Figure 9 has two driver circuits 760a (hereinafter referred to as driver circuit 760a1 and driver circuit 760a2). The configuration shown in Figure 9 also includes a control circuit 211, photocouplers 212 and 213, reference voltage generation circuits 214 to 216, diodes Di1 to Di3, capacitive elements Cap1 to Cap4, transistors 762 and 763. In the circuit diagram shown in Figure 9, the resistive elements provided on the wiring are elements provided to convert the flowing current into voltage. In the circuit diagram shown in Figure 9, voltages PHV and PGND are voltages applied to the load (not shown) connected to transistors 762 and 763.

[0134] For example, the power control circuit 761 shown in Figure 2 can be used as the control circuit 211.

[0135] The PWM signal output from the control circuit 211 is supplied to driver circuits 760a1 and 760a2 via photocouplers 212 and 213, or through wiring. In addition, voltages from reference voltage generation circuits 214 to 216 are supplied to terminals V1, V2, and V3 of driver circuit 760a1, respectively. The voltage v4a supplied to driver circuit 760a1 is obtained by boosting the voltages output from reference voltage generation circuits 214, 215, and 216 using diodes Di1 and Di2, and capacitive elements Cap1 and Cap2.

[0136] In the low-side driver configuration shown in Figure 9, a diode Di3 is provided between terminal GND and terminal V2 of the driver circuit 760a1 so that the current is bidirectional. This diode Di3 is a component that short-circuits the terminals to prevent malfunctions when the voltage difference between terminal GND and terminal V2 changes significantly, thereby preventing a large potential difference from occurring between the terminals. It can be provided as needed.

[0137] The driver circuit shown in this embodiment uses transistors of the same polarity for both the buffer circuit and the level shift circuit. Therefore, the transistors provided in the driver circuit can be unipolar transistors.

[0138] Furthermore, the driver circuit includes a capacitive element within the level shift circuit, and a signal for boosting the voltage is applied through this capacitive element, thereby boosting the signal using capacitive coupling in the capacitive element. In this configuration, the voltage applied between the source and drain of the transistor in the level shift circuit can be made smaller than the voltage applied to the capacitive element in the level shift circuit, thereby suppressing dielectric breakdown of the transistor.

[0139] This embodiment can be implemented in appropriate combination with other embodiments.

[0140] (Embodiment 3) This embodiment shows an example of the configuration of a comparator according to one aspect of the present invention.

[0141] Figure 10 shows an example of the configuration of a comparator 50 applicable to the comparator of the amplifier described in the previous embodiment. The comparator 50 has transistors 21 to 25. The comparator 50 also has a wiring VBM_IN to which a first potential is supplied, a wiring VBP_IN to which a second potential is supplied, a wiring VB3_IN to which a predetermined potential VB3 is supplied, an input terminal CP1_IN, an input terminal CM1_IN, an output terminal CP1_OUT, and an output terminal CM1_OUT.

[0142] Here, the predetermined potential VB3 is a higher potential than the second potential. Also, in the comparator 50, the second potential is the high power supply potential, and the first potential is the low power supply potential.

[0143] In the comparator 50, one source or drain of transistor 21 is electrically connected to wiring VBM_IN, the other source or drain of transistor 21 is electrically connected to one source or drain of transistor 22 and one source or drain of transistor 24, and the gate of transistor 21 is electrically connected to wiring VB3_IN.

[0144] The other source or drain of transistor 22 is electrically connected to one source or drain of transistor 23 and to the output terminal CM1_OUT. The other source or drain of transistor 23 and the gate of transistor 23 are electrically connected to the wiring VBP_IN. The gate of transistor 22 is electrically connected to the input terminal CP1_IN.

[0145] The other source or drain of transistor 24 is electrically connected to one source or drain of transistor 25 and to the output terminal CP1_OUT. The other source or drain of transistor 25 and the gate of transistor 25 are electrically connected to the wiring VBP_IN. The gate of transistor 24 is electrically connected to the input terminal CM1_IN.

[0146] Alternatively, multiple circuits as shown in Figure 10 may be connected in parallel and used as a comparator 50. That is, the output of the comparator shown in Figure 10 may be input to the next stage comparator 50, and multiple comparators may be connected and used.

[0147] This embodiment can be appropriately combined with descriptions of other embodiments.

[0148] (Embodiment 4) An example of a semiconductor device configuration applicable to the amplifier described in the above embodiment will be described.

[0149] The semiconductor device shown in Figure 11 includes a transistor 300, a transistor 500, and a capacitive element 600. In the example shown in Figure 11, the semiconductor device has multiple transistors 300.

[0150] Figure 14A is a cross-sectional view of transistor 500 in the channel length direction, and Figure 14B is a cross-sectional view of transistor 500 in the channel width direction.

[0151] Transistor 500 is an OS transistor. Because transistor 500 has a low off-current, using it in a semiconductor device allows the semiconductor device to retain written data for a long period of time.

[0152] Transistor 500 is, for example, an n-channel transistor.

[0153] In the semiconductor device 751 of the amplifier 750 described in the previous embodiment, the gate driver 760 and the power control circuit 761 can be configured using the transistor shown as transistor 500. In addition, at least one of transistors 762 and 763 can be the transistor shown as transistor 300.

[0154] As shown in Figure 11, transistors 500 and 300 can be stacked. Therefore, for example, if transistor 300 from Figure 11 is used as transistor 762 (or transistor 763), the components of the semiconductor device 751, such as the gate driver 760 and the power control circuit 761, can be constructed using transistor 500 and stacked on transistor 762 (or transistor 763). Alternatively, only a portion of these circuits may be stacked on transistor 300.

[0155] The semiconductor device described in this embodiment has a transistor 300, a transistor 500, and a capacitive element 600, as shown in Figure 11. The transistor 500 is provided above the transistor 300, and the capacitive element 600 is provided above both the transistor 300 and the transistor 500. Layer 385 is the layer on which the transistor 300 is provided. In Figure 11, for example, layer 385 has a substrate 311 and layers sandwiched between the substrate 311 and the insulator 322. Layer 585 is the layer on which the transistor 500 is provided. In Figure 11, for example, layer 585 has layers sandwiched between the insulator 514 and the insulator 574. The substrate 311, insulator 322, insulator 514, and insulator 574 will be described later.

[0156] As the capacitance element in the amplifier 750 described in the previous embodiment, the capacitance element 600 shown in Figure 11 can be used. For example, the capacitance element 600 can be used as the capacitance element in the gate driver 760 or the power control circuit 761.

[0157] The transistor 300 is provided on a substrate 311 and includes a conductor 316, an insulator 315, a semiconductor region 313 consisting of a part of the substrate 311, a diffusion layer 314a that functions as a source region or drain region, and a diffusion layer 314b. The conductor 316 can function as the gate of the transistor 300. The insulator 315 can function as the gate insulating film of the transistor 300. The diffusion layers 314a and 314b are, for example, low-resistance regions.

[0158] Furthermore, transistor 300 can be used, for example, as transistors 762 and 763 shown in the above embodiment.

[0159] Figure 12 shows a different configuration of transistor 300 compared to Figure 11. In Figure 12, transistor 300 is configured such that a portion of region 319 extends to a greater depth. Region 319 will be described later.

[0160] The transistor 300 shown in Figures 11 and 12 is a transistor having a planar structure.

[0161] Figure 13 also shows an example of a transistor 300 having a trench-type structure.

[0162] The transistor 300 illustrated in Figures 11, 12, and 13 can be suitably used as a power MOSFET, and is particularly preferred for use with transistors 762 and 763. The transistor 300 shown in Figures 11, 12, and 13 is sometimes called a D-MOS (Double Diffusion Metal Oxide Semiconductor) FET.

[0163] The transistor 300 shown in Figure 11 is a transistor with a planar structure. By using one of the diffusion layers 314a and 314b as the source region and the other as the drain region, respectively, it can be operated as a MOSFET. However, here, both the diffusion layer 314a and 314b function as sources, a region 319 is formed outside the diffusion layers 314a and 314b, and a diffusion layer 317 that functions as a drain is provided in the region below the semiconductor region 313 of the silicon substrate in the cross-section shown in Figure 11, thereby allowing the transistor 300 to function as a D-MOSFET.

[0164] Furthermore, a back electrode 318 can be provided below the diffusion layer 317 and function as a drain electrode. Alternatively, both diffusion layers 314a and 314b may function as drains, and the diffusion layer 317 may function as a source.

[0165] Region 319 is preferably a region with opposite polarity to diffusion layers 314a and 314b. For example, if diffusion layers 314a and 314b are n-type regions, region 319 is preferably a p-type region. Alternatively, region 319 may be a high-resistance region. Region 319 may be an intrinsic region. By the contact of diffusion layers 314a and 314b with region 319, which is a region with opposite polarity, a pn junction is formed. Such a pn junction region is sometimes called a parasitic diode in this invention. The parasitic diode has functions such as reverse current prevention and rectification. The parasitic diode also has a function of protecting the transistor. By forming a parasitic diode between diffusion layers 314a and 314b and diffusion layer 317, electric field concentration when a high voltage is applied between the source and drain is mitigated, and the destruction or degradation of the transistor can be suppressed.

[0166] It is preferable that a conductor 328b be provided on the upper surfaces of diffusion layers 314a and 314b. It is also preferable that a conductor 328b be provided on the upper surface of region 319.

[0167] In addition, diffusion layers 314a, 314b, and 317 may not be provided. Even if these diffusion layers are not provided, by providing a conductor 328b, a back electrode 318, etc., connected to the semiconductor region 313 of the substrate 311, these electrodes may function as source electrodes, drain electrodes, etc.

[0168] Here, it is preferable to polish the substrate 311 before providing the back electrode. For example, by polishing the substrate 311, the native oxide film on the surface of the substrate 311 can be removed, thereby suppressing an increase in resistance. It is also preferable to polish the substrate 311 to reduce its thickness. For example, the thickness of the substrate 311 is preferably 5 μm or more and 300 μm or less, and more preferably 10 μm or more and 150 μm or less. By reducing the thickness of the substrate 311, the distance between the source and drain of the transistor 300 can be reduced, and the on-current of the transistor can be increased.

[0169] Here, when polishing the substrate 311 to make it thinner, it is preferable to provide a support substrate on the opposing side, specifically on the conductor 632 and the insulator 640. For example, a resin substrate can be used as the support substrate. Alternatively, a substrate having an adhesive layer may be used as the support substrate. A removable adhesive may be used as the adhesive layer. In such a case, when polishing the substrate 311, the first support substrate is bonded with the adhesive layer, polished, and then the back electrode 318 is formed. A second support substrate is then provided on the side opposite to the first support substrate so as to cover the back electrode 318, and after removing the first support substrate, the conductor 632 is exposed. After that, the conductor 632 is connected using bumps, wire bonding, clip bonding using conductive clips, etc.

[0170] Note that transistor 300 can be either a p-channel or n-channel type.

[0171] In the diffusion layers 314a, 314b, 317, etc., which form the channel-forming region of the semiconductor region 313, the region near it, the source region, or the drain region, it is preferable that a semiconductor such as a silicon-based semiconductor is included, and it is preferable that single-crystal silicon is included. Alternatively, it may be formed from a material having Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), InP (indium phosphide), SiC (silicon carbide), ZnSe (zinc selenide), GaN (gallium nitride), GaOx (gallium oxide; x is a real number greater than 0), etc. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing is also possible. Alternatively, the transistor 300 may be made into a HEMT (High Electron Mobility Transistor) by using GaAs and GaAlAs, etc.

[0172] The diffusion layers 314a, 314b, and 317 contain, in addition to the semiconductor material applied to the semiconductor region 313, elements that impart n-type conductivity, such as arsenic and phosphorus, or elements that impart p-type conductivity, such as boron.

[0173] The conductor 316, which functions as the gate electrode, can be made of a conductive material such as silicon, a semiconductor material, a metallic material, an alloy material, or a metal oxide material, which contains an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron.

[0174] Furthermore, since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use materials such as titanium nitride or tantalum nitride as the conductor. In addition, in order to achieve both conductivity and embedding properties, it is preferable to use metallic materials such as tungsten or aluminum as a laminate for the conductor, and tungsten is particularly preferable in terms of heat resistance.

[0175] Note that the transistor 300 shown in Figure 11 is just one example, and its structure is not limited to this example; any appropriate transistor should be used depending on the circuit configuration and driving method. For example, when a semiconductor device is constructed using only OS transistors, the configuration of transistor 300 should be the same as that of transistor 500, which uses an oxide semiconductor. Details of transistor 500 will be described later.

[0176] The transistor 300 is covered by insulators 320, 322, 324, and 326, which are stacked in that order.

[0177] For insulators 320, 322, 324, and 326, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, aluminum nitride, etc. may be used.

[0178] In this specification, silicon oxidizide refers to a material in which the oxygen content is greater than the nitrogen content, and silicon nitride refers to a material in which the nitrogen content is greater than the oxygen content. Furthermore, in this specification, aluminum oxidizide refers to a material in which the oxygen content is greater than the nitrogen content, and aluminum nitride refers to a material in which the nitrogen content is greater than the oxygen content.

[0179] The insulator 322 may also function as a planarizing film that flattens steps caused by transistors 300 or the like located below it. For example, the upper surface of the insulator 322 may be planarized by a planarizing treatment using chemical mechanical polishing (CMP) or the like to improve its flatness.

[0180] Furthermore, it is preferable to use a film for the insulator 324 that has barrier properties to prevent hydrogen and impurities from diffusing from the substrate 311 or the transistor 300 to the region where the transistor 500 is provided.

[0181] As an example of a film having barrier properties against hydrogen, silicon nitride formed by the CVD method can be used. However, when hydrogen diffuses into a semiconductor element having an oxide semiconductor, such as transistor 500, the properties of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses hydrogen diffusion between transistor 500 and transistor 300. Specifically, a film that suppresses hydrogen diffusion is a film that has a low hydrogen desorption rate.

[0182] The amount of hydrogen desorption can be analyzed, for example, using a thermal desorption gas analysis (TDS) method. For example, in TDS analysis, the amount of hydrogen desorption from insulator 324, when the film surface temperature is in the range of 50°C to 500°C, is calculated as 10 × 10¹⁶ hydrogen atoms per unit area of ​​insulator 324. 15 atoms / cm 2 The following is preferably 5 × 10 15 atoms / cm 2 The following is acceptable.

[0183] Furthermore, it is preferable that the dielectric constant of the insulator 326 is lower than that of the insulator 324. For example, the relative permittivity of the insulator 326 is preferably less than 4, and more preferably less than 3. Also, for example, the relative permittivity of the insulator 326 is preferably 0.7 times or less, and more preferably 0.6 times or less, than that of the relative permittivity of the insulator 324. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance occurring between wiring can be reduced.

[0184] Furthermore, insulators 320, 322, 324, and 326 have conductors 328 and 330, which are connected to the capacitive element 600 or the transistor 500, embedded within them. In the example shown in Figure 11, conductor 328 is provided so as to be embedded in insulators 320 and 322, and conductor 330 is provided so as to be embedded in insulators 324 and 326. Conductors 328 and 330 have the function of a plug or wiring. Conductors that have the function of a plug or wiring may be grouped together and given the same reference numeral. Also, in this specification, the wiring and the plug connected to the wiring may be an integrated unit. That is, there may be cases where a part of the conductor functions as wiring, and cases where a part of the conductor functions as a plug.

[0185] Here, when semiconductor elements are connected to each other, or to a conductor, or to each other, via a plug or wiring, they are connected electrically, for example.

[0186] The plugs and wiring (conductors 328, conductors 330, etc.) can be made from conductive materials such as metals, alloys, metal nitrides, or metal oxides, either in a single layer or in a laminated form. It is preferable to use high-melting-point materials such as tungsten or molybdenum, which offer both heat resistance and conductivity, with tungsten being preferable. Alternatively, it is preferable to form them from low-resistance conductive materials such as aluminum or copper. Using low-resistance conductive materials can reduce wiring resistance.

[0187] In the semiconductor device shown in Figure 11, the conductor 328b is provided on top of the diffusion layer 314a, the diffusion layer 314b, etc. The insulator 315 may also have regions sandwiched between the diffusion layer 314a and the conductor 328b, and regions sandwiched between the diffusion layer 314b and the conductor 328b. The conductor 328 is provided on top of the conductor 328b. The conductor 328b may have regions sandwiched between the diffusion layer 314a and the conductor 328, or regions sandwiched between the diffusion layer 314b and the conductor 328.

[0188] Furthermore, as shown in Figure 12, a portion of the region 319 may be provided to extend to a greater depth.

[0189] Furthermore, Figures 11 and 12 show examples of D-MOSFETs in which transistor 300 has a planar structure, while Figure 13 shows an example of a D-MOSFET in which transistor 300 has a trench structure. In Figure 13, the conductor 316, which functions as a gate, is formed in a trench provided between the diffusion layer 314a and the diffusion layer 314b. An insulator 315, which functions as a gate insulator, is formed between the diffusion layer 314a and the diffusion layer 314b and the conductor 316.

[0190] Compared to a planar structure, in a trench structure, the area of ​​the integrated circuit is preferably reduced to 0.5 times or less, and more preferably to 0.4 times or less.

[0191] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in Figure 11, insulators 350, 352, and 354 are stacked in order. Conductors 356 are formed on insulators 350, 352, and 354. Conductors 356 function as a plug or wiring for connecting to the transistor 300. Conductors 356 can be provided using the same material as conductors 328 and 330.

[0192] For example, it is preferable that the insulator 350, like the insulator 324, be an insulator that has barrier properties against hydrogen. It is also preferable that the conductor 356 includes a conductor that has barrier properties against hydrogen. In particular, a conductor that has barrier properties against hydrogen is formed in the openings of the hydrogen barrier insulator 350. With this configuration, transistor 300 and transistor 500 can be separated by the barrier layer, and the diffusion of hydrogen from transistor 300 to transistor 500 can be suppressed.

[0193] For example, tantalum nitride may be used as the conductor that has barrier properties against hydrogen. Furthermore, by laminating tantalum nitride with highly conductive tungsten, it is possible to suppress the diffusion of hydrogen from the transistor 300 while maintaining conductivity as wiring. In this case, it is preferable that the tantalum nitride layer, which has barrier properties against hydrogen, is in contact with the insulator 350, which also has barrier properties against hydrogen.

[0194] Although a wiring layer containing the conductor 356 has been described above, the semiconductor device according to this embodiment is not limited thereto. Multiple wiring layers similar to the wiring layer containing the conductor 356 may be formed.

[0195] Insulators 510, 512, 514, and 516 are arranged in order on the insulator 354. It is preferable that one of the insulators 510, 512, 514, and 516 is made of a material that has barrier properties against oxygen and hydrogen.

[0196] For example, it is preferable to use a film for insulators 510 and 514 that has barrier properties to prevent hydrogen and impurities from diffusing from the substrate 311 or the region where the transistor 300 is installed to the region where the transistor 500 is installed. Therefore, the same material as insulator 324 can be used.

[0197] As an example of a film having hydrogen barrier properties, silicon nitride formed by the CVD method can be used. However, when hydrogen diffuses into a semiconductor element having an oxide semiconductor, such as transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses hydrogen diffusion between transistor 500 and transistor 300. Specifically, a film that suppresses hydrogen diffusion is a film that has a low hydrogen desorption rate.

[0198] Furthermore, as films having barrier properties against hydrogen, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for insulators 510 and 514.

[0199] In particular, aluminum oxide exhibits a high barrier effect, preventing the permeation of both oxygen and impurities such as hydrogen and moisture, which can cause fluctuations in the electrical properties of transistors. Therefore, aluminum oxide can prevent the ingress of impurities such as hydrogen and moisture into the transistor 500 during and after the transistor manufacturing process. It can also suppress the release of oxygen from the oxides constituting the transistor 500. For this reason, it is suitable for use as a protective film for transistor 500.

[0200] Furthermore, for example, the same materials as those used for insulator 320 can be used for insulator 512 and insulator 516. Additionally, by applying materials with relatively low dielectric constants to these insulators, parasitic capacitance between wiring can be reduced. For example, silicon oxide films or silicon oxynitride films can be used as insulators 512 and insulator 516.

[0201] Furthermore, the insulators 510, 512, 514, and 516 have a conductor 518 and a conductor constituting the transistor 500 (for example, conductor 503) embedded in them. The conductor 518 functions as a plug or wiring for connecting to the conductor 610b, the transistor 300, or the capacitive element 600. The conductor 518 can be provided using the same material as the conductors 328 and 330.

[0202] In particular, the conductor 518 in the region in contact with the insulator 510 and the insulator 514 is preferably a conductor having barrier properties against oxygen, hydrogen, and water. With this configuration, transistor 300 and transistor 500 can be separated by a layer having barrier properties against oxygen, hydrogen, and water, and the diffusion of hydrogen from transistor 300 to transistor 500 can be suppressed.

[0203] A transistor 500 is provided above the insulator 516.

[0204] As shown in Figures 14A and 14B, the transistor 500 includes a conductor 503 arranged to be embedded in insulators 514 and 516, an insulator 520 arranged on top of insulators 516 and 503, an insulator 522 arranged on top of insulator 520, an insulator 524 arranged on top of insulator 522, an oxide 530a arranged on top of insulator 524, an oxide 530b arranged on top of oxide 530a, conductors 542a and 542b arranged spaced apart from each other on oxide 530b, an insulator 580 arranged on top of conductors 542a and 542b with an opening formed between conductors 542a and 542b, an oxide 530c arranged on the bottom and side surfaces of the opening, an insulator 550 arranged on the forming surface of oxide 530c, and a conductor 560 arranged on the forming surface of insulator 550.

[0205] Furthermore, as shown in Figures 14A and 14B, it is preferable that an insulator 544 is placed between the oxide 530a, oxide 530b, conductor 542a, and conductor 542b and the insulator 580. Also, as shown in Figures 14A and 14B, it is preferable that the conductor 560 has a conductor 560a provided inside the insulator 550 and a conductor 560b provided so as to be embedded inside the conductor 560a. Furthermore, as shown in Figures 14A and 14B, it is preferable that an insulator 574 is placed on top of the insulator 580, conductor 560, and insulator 550.

[0206] In the following, oxides 530a, 530b, and 530c may be collectively referred to as oxide 530.

[0207] While the transistor 500 shows a configuration in which three layers of oxide 530a, oxide 530b, and oxide 530c are stacked in the region where the channel is formed and in its vicinity, the present invention is not limited to this. For example, a single layer of oxide 530b, a two-layer structure of oxide 530b and oxide 530a, a two-layer structure of oxide 530b and oxide 530c, or a stacked structure of four or more layers may be provided. Also, while the conductor 560 is shown as a two-layer stacked structure in the transistor 500, the present invention is not limited to this. For example, the conductor 560 may be a single-layer structure or a stacked structure of three or more layers. Furthermore, the transistor 500 shown in Figures 11 and 14A is just an example, and the present invention is not limited to its structure; an appropriate transistor may be used depending on the circuit configuration and driving method.

[0208] Here, the conductor 560 functions as the gate electrode of the transistor, and the conductors 542a and 542b function as the source electrode or drain electrode, respectively. As described above, the conductor 560 is formed to be embedded in the opening of the insulator 580 and in the region sandwiched between the conductors 542a and 542b. The arrangement of the conductors 560, 542a, and 542b is selected in a self-aligned manner with respect to the opening of the insulator 580. In other words, in the transistor 500, the gate electrode can be positioned in a self-aligned manner between the source electrode and the drain electrode. Therefore, since the conductor 560 can be formed without providing a positional margin, the occupied area of ​​the transistor 500 can be reduced. This enables miniaturization and high integration of semiconductor devices.

[0209] Furthermore, since the conductor 560 is formed self-aligned in the region between the conductors 542a and 542b, the conductor 560 does not have any region that overlaps with the conductors 542a or 542b. This reduces the parasitic capacitance formed between the conductor 560 and the conductors 542a and 542b. Therefore, the switching speed of the transistor 500 can be improved, and it can be given high frequency characteristics.

[0210] Conductor 560 may function as a first gate (also called a top gate) electrode. Conductor 503 may function as a second gate (also called a bottom gate) electrode. In this case, the threshold voltage of transistor 500 can be controlled by changing the potential applied to conductor 503 independently of the potential applied to conductor 560, without linking them. In particular, by applying a negative potential to conductor 503, it is possible to make the threshold voltage of transistor 500 greater than 0V and reduce the off-current. Therefore, applying a negative potential to conductor 503 reduces the drain current when the potential applied to conductor 560 is 0V compared to not applying a negative potential.

[0211] The conductor 503 is positioned to overlap with the oxide 530 and the conductor 560. As a result, when a potential is applied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 connect, covering the channel-forming region formed in the oxide 530. In this specification, a transistor structure in which the channel-forming region is electrically surrounded by the electric fields of the first gate electrode and the second gate electrode is called a surrounded channel (S-channel) structure.

[0212] Furthermore, the conductor 503 has the same configuration as the conductor 518, with conductor 503a formed in contact with the inner walls of the openings of the insulators 514 and 516, and conductor 503b formed further inside. Although the transistor 500 shows a configuration in which conductors 503a and conductor 503b are stacked, the present invention is not limited to this. For example, the conductor 503 may be provided as a single layer or as a stacked structure of three or more layers.

[0213] Here, it is preferable to use a conductive material for the conductor 503a that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (i.e., the above impurities are less permeable). Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (e.g., at least one such as oxygen atoms or oxygen molecules) (i.e., the above oxygen is less permeable). In this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of any one or all of the above impurities or oxygen.

[0214] For example, the conductor 503a has a function of suppressing oxygen diffusion, which can prevent the conductor 503b from oxidizing and reducing its conductivity.

[0215] Also, when the conductor 503 also serves as a wiring, it is preferable to use a highly conductive conductive material mainly composed of tungsten, copper, or aluminum for the conductor 503b. In that case, the conductor 503a does not necessarily have to be provided. Although the conductor 503b is shown as a single layer, it may have a laminated structure. For example, it may be a laminate of titanium or titanium nitride and the above-mentioned conductive material.

[0216] The insulators 520, 522, and 524 have a function as a second gate insulating film.

[0217] Here, it is preferable to use an insulator for the insulator 524 that contacts the oxide 530 and contains more oxygen than oxygen that satisfies the stoichiometric composition. That is, it is preferable that an excess oxygen region is formed in the insulator 524. By providing such an insulator containing excess oxygen in contact with the oxide 530, oxygen vacancies in the oxide 530 can be reduced, and the reliability of the transistor 500 can be improved.

[0218] Specifically, as the insulator having an excess oxygen region, it is preferable to use an oxide material in which some oxygen is desorbed by heating. The oxide in which oxygen is desorbed by heating is an oxide film in which the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 18 atoms / cm 3 or more, preferably 1.0×10 19 atoms / cm 3 or more, more preferably 2.0×10 19 atoms / cm 3 or more, or 3.0×10 20 atoms / cm 3 or more. The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or more and 700°C or less, or 100°C or more and 400°C or less.

[0219] Furthermore, if the insulator 524 has an excess oxygen region, it is preferable that the insulator 522 has a function to suppress the diffusion of oxygen (e.g., oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen does not easily permeate it).

[0220] The insulator 522 has a function of suppressing the diffusion of oxygen and impurities, so the oxygen contained in the oxide 530 does not diffuse toward the insulator 520, which is preferable. Furthermore, it is possible to suppress the reaction of the conductor 503 with the oxygen contained in the insulator 524 and the oxide 530.

[0221] The insulator 522 preferably uses a single-layer or multi-layer insulator containing so-called high-k materials such as aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more integrated, thinning of the gate insulating film can lead to problems such as leakage current. By using a high-k material as the insulator that functions as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0222] In particular, it is preferable to use an insulator containing an oxide of either aluminum or hafnium, or both, which is an insulating material that has the function of suppressing the diffusion of impurities and oxygen (the above-mentioned oxygen is less permeable). As an insulator containing an oxide of either aluminum or hafnium, or both, it is preferable to use aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate). When an insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses the release of oxygen from the oxide 530 and the mixing of impurities such as hydrogen from the periphery of the transistor 500 into the oxide 530.

[0223] Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be subjected to nitriding treatment. Silicon oxide, silicon oxide nitride, or silicon nitride may be laminated onto the above insulators.

[0224] Furthermore, it is preferable that the insulator 520 is thermally stable. For example, silicon oxide and silicon oxynitride are suitable because they are thermally stable. Also, by combining a high-k material insulator with silicon oxide or silicon oxynitride, an insulator 520 with a thermally stable and high dielectric constant laminated structure can be obtained.

[0225] In Figures 14A and 14B, transistor 500 is shown with insulators 520, 522, and 524 as a second gate insulating film consisting of a three-layer laminated structure. However, the second gate insulating film may have a single layer, two layers, or a laminated structure of four or more layers. In that case, it is not limited to a laminated structure made of the same material, but may also be a laminated structure made of different materials.

[0226] In transistor 500, it is preferable to use a metal oxide that functions as an oxide semiconductor in the oxide 530 including the channel formation region. For example, as the oxide 530, it is preferable to use a metal oxide such as In-M-Zn oxide (where element M is one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium).

[0227] Specifically, for oxide 530a, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4 or 1:1:0.5 may be used. For oxide 530b, a metal oxide with an atomic ratio of In:Ga:Zn = 4:2:3 or 1:1:1 may be used. For oxide 530c, a metal oxide with an atomic ratio of In:Ga:Zn = 1:3:4, Ga:Zn = 2:1, or Ga:Zn = 2:5 may be used. Furthermore, specific examples of layered structures using oxide 530c include a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] and In:Ga:Zn=1:3:4 [atomic ratio], a layered structure of Ga:Zn=2:1 [atomic ratio] and In:Ga:Zn=4:2:3 [atomic ratio], a layered structure of Ga:Zn=2:5 [atomic ratio] and In:Ga:Zn=4:2:3 [atomic ratio], and a layered structure of gallium oxide and In:Ga:Zn=4:2:3 [atomic ratio].

[0228] Furthermore, the oxide 530b may be crystalline. For example, it is preferable to use CAAC-OS (c-axis aligned crystalline oxide semiconductor), which will be described later. Crystalline oxides such as CAAC-OS have few impurities and defects (such as oxygen vacancies) and have a dense structure with high crystallinity. Therefore, the extraction of oxygen from the oxide 530b by the source electrode or drain electrode can be suppressed. Also, even when heat treatment is performed, the extraction of oxygen from the oxide 530b can be reduced, so the transistor 500 is stable against high temperatures (so-called thermal budget) in the manufacturing process.

[0229] In oxide 530, it is preferable to use a metal oxide that functions as a channel-forming region and has a band gap of 2 eV or more, preferably 2.5 eV or more. By using a metal oxide with a large band gap in this way, the off-current of the transistor can be reduced.

[0230] By having oxide 530a below oxide 530b, the diffusion of impurities from structures formed below oxide 530a to oxide 530b can be suppressed. Furthermore, by having oxide 530c above oxide 530b, the diffusion of impurities from structures formed above oxide 530c to oxide 530b can be suppressed.

[0231] Furthermore, it is preferable that oxide 530 has a laminated structure of multiple oxide layers with different atomic ratios of each metal atom. Specifically, in the metal oxide used for oxide 530a, it is preferable that the atomic ratio of element M in the constituent elements is greater than the atomic ratio of element M in the constituent elements of the metal oxide used for oxide 530b. Also, in the metal oxide used for oxide 530a, it is preferable that the atomic ratio of element M to In is greater than the atomic ratio of element M to In in the metal oxide used for oxide 530b. Furthermore, in the metal oxide used for oxide 530b, it is preferable that the atomic ratio of In to element M is greater than the atomic ratio of In to element M in the metal oxide used for oxide 530a. In addition, oxide 530c can be any metal oxide that can be used for oxide 530a or oxide 530b.

[0232] Furthermore, it is preferable that the energy at the lower end of the conduction band of oxide 530a and oxide 530c is higher than the energy at the lower end of the conduction band of oxide 530b. In other words, it is preferable that the electron affinity of oxide 530a and oxide 530c is smaller than the electron affinity of oxide 530b.

[0233] Here, at the junctions of oxide 530a, oxide 530b, and oxide 530c, the energy level at the lower end of the conduction band changes smoothly. In other words, the energy level at the lower end of the conduction band at the junctions of oxide 530a, oxide 530b, and oxide 530c can be said to change continuously or be continuously joined. To achieve this, it is desirable to lower the defect level density of the mixed layer formed at the interface between oxide 530a and oxide 530b, and at the interface between oxide 530b and oxide 530c.

[0234] Specifically, a mixed layer with a low defect level density can be formed if oxide 530a and oxide 530b, and oxide 530b and oxide 530c, have a common element other than oxygen (as the main component). For example, if oxide 530b is In-Ga-Zn oxide, then In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide, etc., can be used as oxide 530a and oxide 530c.

[0235] In this case, the primary carrier pathway is oxide 530b. By configuring oxides 530a and 530c as described above, the defect level density at the interface between oxide 530a and oxide 530b, and at the interface between oxide 530b and oxide 530c, can be reduced. As a result, the influence of interface scattering on carrier conduction is reduced, and transistor 500 can obtain a high on-current.

[0236] Conductors 542a and 542b, which function as source electrodes and drain electrodes, are provided on the oxide 530b. It is preferable to use metallic elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum as conductors 542a and 542b, or alloys composed of the above metallic elements, or alloys combining the above metallic elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. In addition, metal nitride films such as tantalum nitride are preferred because they have barrier properties against hydrogen or oxygen.

[0237] Furthermore, although conductors 542a and 542b are shown as single-layer structures in Figure 14A, they may also be laminated structures of two or more layers. For example, a tantalum nitride film and a tungsten film may be laminated. Alternatively, a titanium film and an aluminum film may be laminated. In addition, a two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, or a two-layer structure in which a copper film is laminated on a tungsten film may also be used.

[0238] Furthermore, there are three-layer structures such as a titanium film or titanium nitride film, an aluminum film or copper film laminated on top of the titanium film or titanium nitride film, and a titanium film or titanium nitride film formed on top of that; and a molybdenum film or molybdenum nitride film, an aluminum film or copper film laminated on top of the molybdenum film or molybdenum nitride film, and a molybdenum film or molybdenum nitride film formed on top of that. Transparent conductive materials containing indium oxide, tin oxide, or zinc oxide may also be used.

[0239] Furthermore, as shown in Figure 14A, regions 543a and 543b may be formed as low-resistance regions at and near the interface between the oxide 530 and the conductor 542a (conductor 542b). In this case, region 543a functions as either a source region or a drain region, and region 543b functions as either a source region or a drain region. In addition, a channel-forming region is formed in the region sandwiched between regions 543a and 543b.

[0240] By providing the conductor 542a (conductor 542b) in contact with the oxide 530, the oxygen concentration in region 543a (region 543b) may be reduced. In addition, a metal compound layer containing the metal contained in the conductor 542a (conductor 542b) and the components of the oxide 530 may be formed in region 543a (region 543b). In such cases, the carrier density in region 543a (region 543b) increases, and region 543a (region 543b) becomes a low-resistance region.

[0241] The insulator 544 is provided so as to cover the conductors 542a and 542b, thereby suppressing oxidation of the conductors 542a and 542b. In this case, the insulator 544 may be provided so as to cover the side surface of the oxide 530 and be in contact with the insulator 524.

[0242] As the insulator 544, one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, or magnesium can be used. Alternatively, silicon nitride or silicon nitride can also be used as the insulator 544.

[0243] In particular, it is preferable to use an insulator 544 that contains an oxide of either aluminum or hafnium, or both, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate). Hafnium aluminate is especially preferable because it has higher heat resistance than hafnium oxide film. Therefore, it is preferable because it is less likely to crystallize during heat treatment in a later process. Note that if the conductors 542a and 542b are made of oxidation-resistant materials, or if their conductivity does not significantly decrease even when oxygen is absorbed, the insulator 544 is not an essential component. It can be designed appropriately according to the desired transistor characteristics.

[0244] The presence of the insulator 544 suppresses the diffusion of water and other impurities such as hydrogen contained in the insulator 580 to the oxide 530b via the oxide 530c and insulator 550. Furthermore, it suppresses the oxidation of the conductor 560 due to excess oxygen present in the insulator 580.

[0245] The insulator 550 functions as a first gate insulating film. It is preferable that the insulator 550 is placed in contact with the inside (top surface and side surface) of the oxide 530c. It is preferable that the insulator 550 is formed using an insulator that contains an excess of oxygen and releases oxygen upon heating, similar to the insulator 524 described above.

[0246] Specifically, silicon oxide with excess oxygen, silicon oxide-nitride, silicon nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, and porous silicon oxide can be used. Silicon oxide and silicon oxide-nitride are particularly preferred because they are stable to heat.

[0247] By providing an insulator 550, which releases oxygen upon heating, in contact with the upper surface of oxide 530c, oxygen can be effectively supplied from the insulator 550 to the channel-forming region of oxide 530b through oxide 530c. Furthermore, similar to the insulator 524, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 550 is reduced. The film thickness of the insulator 550 is preferably 1 nm to 20 nm.

[0248] Furthermore, in order to efficiently supply excess oxygen from the insulator 550 to the oxide 530, a metal oxide may be provided between the insulator 550 and the conductor 560. It is preferable that the metal oxide suppresses the diffusion of oxygen from the insulator 550 to the conductor 560. By providing a metal oxide that suppresses the diffusion of oxygen, the diffusion of excess oxygen from the insulator 550 to the conductor 560 is suppressed. In other words, the reduction in the amount of excess oxygen supplied to the oxide 530 can be suppressed. In addition, oxidation of the conductor 560 due to excess oxygen can be suppressed. As the metal oxide, any material that can be used for the insulator 544 may be used.

[0249] Furthermore, the insulator 550 may have a multilayer structure, similar to the second gate insulating film. As transistors become smaller and more integrated, thinning of the gate insulating film can lead to problems such as leakage current. Therefore, by using a multilayer structure of a high-k material and a thermally stable material for the insulator that functions as the gate insulating film, it becomes possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. In addition, a multilayer structure that is thermally stable and has a high dielectric constant can be achieved.

[0250] The conductor 560, which functions as the first gate electrode, is shown as a two-layer structure in Figures 14A and 14B, but it may also be a single-layer structure or a stacked structure of three or more layers.

[0251] It is preferable to use a conductive material for the conductor 560a that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one such as oxygen atoms or oxygen molecules). By having the function of suppressing the diffusion of oxygen in the conductor 560a, it is possible to suppress the oxidation of the conductor 560b by the oxygen contained in the insulator 550, which reduces the conductivity. As a conductive material that has the function of suppressing the diffusion of oxygen, it is preferable to use, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide. Furthermore, an oxide semiconductor applicable to the oxide 530 can be used as the conductor 560a. In that case, by depositing the conductor 560b by sputtering, the electrical resistance value of the conductor 560a can be reduced to make it a conductor. This can be called an OC (Oxide Conductor) electrode.

[0252] Furthermore, it is preferable that the conductor 560b is made of a conductive material mainly composed of tungsten, copper, or aluminum. Also, since the conductor 560b functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material mainly composed of tungsten, copper, or aluminum can be used. The conductor 560b may also be in a laminated structure, for example, a laminated structure of titanium or titanium nitride and the above conductive material.

[0253] The insulator 580 is provided on the conductors 542a and 542b via the insulator 544. The insulator 580 preferably has an excess oxygen region. For example, the insulator 580 preferably has silicon oxide, silicon oxynitride, silicon nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, porous silicon oxide, or a resin. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Silicon oxide and porous silicon oxide are particularly preferred because they can easily form an excess oxygen region in a later process.

[0254] The insulator 580 preferably has an excess oxygen region. By providing the insulator 580, which releases oxygen upon heating, in contact with the oxide 530c, oxygen in the insulator 580 can be efficiently supplied to the oxide 530 through the oxide 530c. It is preferable that the concentration of impurities such as water or hydrogen in the insulator 580 is reduced.

[0255] The opening in the insulator 580 is formed superimposed on the region between the conductors 542a and 542b. As a result, the conductor 560 is formed to be embedded in the opening in the insulator 580 and in the region sandwiched between the conductors 542a and 542b.

[0256] When miniaturizing semiconductor devices, it is necessary to shorten the gate length, but it is also necessary to ensure that the conductivity of the conductor 560 does not decrease. If the film thickness of the conductor 560 is increased to achieve this, the conductor 560 may take on a shape with a high aspect ratio. In this embodiment, since the conductor 560 is embedded in the opening of the insulator 580, even if the conductor 560 has a shape with a high aspect ratio, it can be formed without the conductor 560 collapsing during the manufacturing process.

[0257] The insulator 574 is preferably provided in contact with the upper surface of the insulator 580, the upper surface of the conductor 560, and the upper surface of the insulator 550. By forming the insulator 574 by sputtering, an excess oxygen region can be created in the insulator 550 and the insulator 580. This allows oxygen to be supplied to the oxide 530 from the excess oxygen region.

[0258] For example, as the insulator 574, one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium can be used.

[0259] In particular, aluminum oxide has high barrier properties and can suppress the diffusion of hydrogen and nitrogen even in thin films between 0.5 nm and 3.0 nm in thickness. Therefore, aluminum oxide deposited by sputtering can function as both an oxygen source and a barrier film against impurities such as hydrogen.

[0260] Furthermore, it is preferable to provide an insulator 581 that functions as an interlayer film on top of the insulator 574. Similar to the insulator 524, it is preferable that the insulator 581 has a reduced concentration of impurities such as water or hydrogen in the film.

[0261] Furthermore, conductors 540a and 540b are placed in the openings formed in insulators 581, 574, 580, and 544. Conductors 540a and 540b are provided facing each other with conductor 560 in between. Conductors 540a and 540b have the same configuration as conductors 546 and 548, which will be described later.

[0262] An insulator 582 is provided on an insulator 581. It is preferable to use a material that is barrier - resistant to oxygen and hydrogen for the insulator 582. Therefore, the same material as that of the insulator 514 can be used for the insulator 582. For example, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 582.

[0263] In particular, aluminum oxide has a high blocking effect that does not allow the film to permeate both oxygen and impurities such as hydrogen and moisture that are factors causing fluctuations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent the mixing of impurities such as hydrogen and moisture into the transistor 500 during and after the manufacturing process of the transistor. Also, it can suppress the release of oxygen from the oxides constituting the transistor 500. Therefore, it is suitable to be used as a protective film for the transistor 500.

[0264] In addition, conductors 546, conductors 548, etc. are embedded in the insulator 520, insulator 522, insulator 524, insulator 544, insulator 580, insulator 574, insulator 581, and insulator 582. The conductors 546 and conductors 548 have functions such as a plug connecting the conductor 610b and the transistor 300, or a wiring.

[0265] Conductors 546b, conductors 548b, etc. are embedded in the insulator 580, insulator 574, insulator 581, and insulator 582. The conductors 546b and conductors 548b have functions such as a plug connecting to the conductors 542a, conductors 542b, etc. of the transistor 500, or a wiring.

[0266] The conductors 546, conductors 546b, conductors 548, and conductors 548b can be provided using the same materials as the conductor 328 and the conductor 330.

[0267] Next, a conductor 610b is provided above the transistor 500. In the example shown in Figure 1, the conductor 610b is provided on the insulator 582. In the example shown in Figure 1, the conductor 610b is connected to the transistor 500 via the conductor 548b.

[0268] Furthermore, in addition to the conductor 610b, a conductor 610a may be provided on the insulator 582. The conductor 610a can be formed, for example, by processing from the same conductive film as the conductor 610b. By providing an insulator 630 on the conductors 610a and 610b, and further providing a conductor 620 via the insulator 630 so as to overlap with the conductor 610a, a capacitive element 600 composed of the conductor 610a, the conductor 620, and the insulator 630 can be provided on the insulator 582.

[0269] Conductors 610a and 610b can be metal films containing elements selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or metal nitride films (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film) composed of the above elements. Alternatively, conductive materials such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide with silicon oxide added can also be used.

[0270] In Figure 11, the conductors 610a and 610b are shown as single-layer structures, but the configuration is not limited to this, and a laminated structure of two or more layers is also possible. For example, a conductor with high adhesion to both a barrier conductor and a highly conductive conductor may be formed between the barrier conductor and the highly conductive conductor.

[0271] The conductor 620 can be made of conductive materials such as metal materials, alloy materials, or metal oxide materials. It is preferable to use high-melting-point materials such as tungsten or molybdenum that provide both heat resistance and conductivity, and tungsten is particularly preferable. When forming it simultaneously with other structures such as conductors, low-resistance metallic materials such as Cu (copper) or Al (aluminum) may be used.

[0272] An insulator 640 is provided on the conductor 620 and the insulator 630. The insulator 640 can be provided using the same material as the insulator 320. The insulator 640 may also function as a planarizing film that covers the uneven shape below it.

[0273] In the semiconductor device shown in Figure 11, a conductor 631 is provided embedded in the insulator 640, and a conductor 632 is provided on top of the conductor 631. The conductor 631 can function as a plug that is electrically connected to the transistor 300. The conductor 632 is electrically connected to the transistor 300 via the conductor 631.

[0274] Figure 11 shows an example of a semiconductor device configured on a substrate 311. The conductor 632 functions as an electrode pad for connecting to a circuit provided on a chip different from the one provided on the substrate 311, for example, by bumps, wire bonding, clip bonding, etc.

[0275] Figure 15 shows an example of placing the semiconductor device shown in Figure 11 on a printed circuit board (PCB) 638 via bumps 637. In Figure 15, the semiconductor device shown in Figure 11 is positioned so that the surface where the conductor 632 is exposed faces the printed circuit board 638 via bumps 637. In addition, a resin layer 641 or the like may be provided on the back electrode 318 to maintain strength.

[0276] Figure 16 shows an example in which the semiconductor device shown in Figure 11 is placed on a printed circuit board 638 and the conductor 632 is connected to other chips by wire bonding. In Figure 16, the semiconductor device shown in Figure 11 is placed on the printed circuit board 638 with the side where the conductor 632 is exposed facing upwards. The surface on which the back electrode 318 is provided faces the printed circuit board 638 via a resin layer 639. Wires 642 are bonded to the conductor 632.

[0277] Here, by providing the conductor 632 so as to overlap with a conductor connected to the diffusion layer 314a or diffusion layer 314b of the transistor 300, the routing of the conductor between the transistor 300 and the conductor 632 can be shortened, and the resistance between the transistor 300 and the conductor 632 can be lowered. More specifically, for example, as shown in Figure 1, it is preferable to provide the conductor 632 so as to overlap with at least one of the conductors 328b and 328. It is also preferable that the conductors 356 and 518 are provided so that at least a portion of them overlap with the conductor 632.

[0278] By shortening the routing of the conductive material between the transistor 300 and the conductor 632, the resistance can be reduced. For example, in the semiconductor device shown in Figure 11, the thickness of the conductive material provided in each wiring, more specifically, in the insulators 326, 354, 516, etc., and the thickness of the conductor 632 can be reduced. Therefore, in the semiconductor device shown in Figure 11, miniaturization of the semiconductor elements becomes possible.

[0279] In one embodiment of the present invention, a large-capacity battery pack may be connected to the energy storage device. Furthermore, rapid charging, rapid discharging, etc., may be performed on the battery pack connected to the energy storage device in one embodiment of the present invention. Therefore, a large current may flow through the transistor 300.

[0280] When a large current flows through transistor 300, the amount of heat generated by transistor 300 may increase. OS transistors can suppress variations in characteristics due to temperature changes. Therefore, by using an OS transistor as transistor 500, the semiconductor device can be operated stably even when the amount of heat generated by transistor 300 increases.

[0281] The configuration shown in Figure 17 includes, as a first structure, a layer 585 having a transistor 500 on a substrate 311b, a conductor 610b, a conductor 631, etc. provided on the layer 585, an insulator 901 and a conductor 632 embedded in the insulator 901 provided on the conductor 631, etc., and as a second structure, a configuration having a layer 385, in which the insulator 322 of layer 385 is replaced with a laminated structure of an insulator 322 and an insulator 902 on the insulator 322, and the first structure and the second structure are bonded together. An insulator 322b is provided on the substrate 311b, and a conductor 903 is provided so as to penetrate the substrate 311b and the insulator 322b. The conductor 903 and the printed circuit board are arranged facing each other, and the conductor 903 and the wiring on the printed circuit board can be electrically connected using bumps.

[0282] Here, it is preferable that the conductor 328 and the conductor 632 have the same main component metal element. Furthermore, it is preferable that the insulator 901 and the insulator 902 are composed of the same component.

[0283] For example, conductors 328 and 632 can be made of Cu, Al, Sn, Zn, W, Ag, Pt, or Au. Cu, Al, W, or Au are preferred due to their ease of bonding. Insulators 901 and 902 can be made of silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, titanium nitride, or the like.

[0284] That is, it is preferable to use the same metal material shown above for each of the conductor 328 and the conductor 632. Also, it is preferable to use the same insulating material shown above for each of the insulator 901 and the insulator 902. With this configuration, the bonding can be performed with a high yield.

[0285] Note that the conductor 328 and the conductor 632 may have a multilayer structure of a plurality of layers. In that case, it is only necessary that the surface layer (bonding surface) is made of the same metal material. Also, the insulator 901 and the insulator 902 may also have a multilayer structure of a plurality of layers. In that case, it is only necessary that the surface layer (bonding surface) is made of the same insulating material.

[0286] By this bonding, good electrical connection between the conductor 328 and the conductor 632 can be obtained. Also, a connection having sufficient mechanical strength of the insulator 901 and the insulator 902 can be obtained.

[0287] For bonding between metal layers, a surface activation bonding method can be used in which the oxide film on the surface and the adsorbed layer of impurities are removed by sputtering or the like, and the cleaned and activated surfaces are brought into contact with each other for bonding. Alternatively, a diffusion bonding method or the like in which the surfaces are bonded together using both temperature and pressure can be used. Since bonding occurs at the atomic level in both cases, excellent bonding can be obtained not only electrically but also mechanically.

[0288] Also, for bonding between insulating layers, after obtaining high flatness by polishing or the like, a hydrophilic bonding method or the like can be used in which the surfaces subjected to hydrophilic treatment with oxygen plasma or the like are brought into contact with each other for temporary bonding, and permanent bonding is performed by dehydration by heat treatment. Since bonding occurs at the atomic level in the hydrophilic bonding method as well, excellent mechanical bonding can be obtained.

[0289] Since an insulating layer and a metal layer are mixed on the bonding surface of the bonding, for example, the surface activation bonding method and the hydrophilic bonding method may be combined.

[0285]

[0290] For example, a method can be used in which the surface is cleaned after polishing, an anti-oxidation treatment is applied to the surface of the metal layer, and then a hydrophilic treatment is performed before joining. Alternatively, the surface of the metal layer may be made of a metal that is difficult to oxidize, such as Au, and then a hydrophilic treatment is performed. In addition, joining methods other than those described above may also be used.

[0291] By using this structure, fluctuations in electrical characteristics and reliability can be suppressed in semiconductor devices using transistors with oxide semiconductors. Alternatively, miniaturization or high integration can be achieved in battery control circuits using transistors with oxide semiconductors.

[0292] This embodiment can be appropriately combined with descriptions of other embodiments.

[0293] (Embodiment 5) This embodiment describes a metal oxide according to one aspect of the present invention.

[0294] <<Metal Oxides>> It is preferable to use a metal oxide that functions as an oxide semiconductor as the oxide 530. Below, metal oxides applicable to the oxide 530 according to the present invention will be described.

[0295] The metal oxide preferably contains at least indium or zinc. In particular, it is preferable that it contains indium and zinc. In addition, it is preferable that it contains gallium, yttrium, tin, etc. It may also contain one or more selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc.

[0296] Here, we consider the case where the metal oxide is an In-M-Zn oxide containing indium, element M, and zinc. Element M can be aluminum, gallium, yttrium, or tin. Other elements that can be used for element M include boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium. However, it is sometimes possible to combine multiple of the aforementioned elements for element M.

[0297] In this specification, metal oxides containing nitrogen may also be collectively referred to as metal oxides. Furthermore, metal oxides containing nitrogen may also be called metal oxynitrides.

[0298] [Structure of metal oxides] Oxide semiconductors (metal oxides) can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include CAAC-OS, polycrystalline oxide semiconductors, nc-OS (nanocrystalline oxide semiconductor), pseudo-amorphous oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0299] CAAC-OS has a c-axis orientation and a crystal structure in which multiple nanocrystals are linked in the ab-plane direction, resulting in a strained structure. The strain refers to the region where the orientation of the lattice arrangement changes between a region with a aligned lattice arrangement and another region with a aligned lattice arrangement, within the region where multiple nanocrystals are linked.

[0300] Nanocrystals are based on a hexagonal structure, but they are not necessarily regular hexagons and may have non-regular hexagonal shapes. Furthermore, under strain, they may have lattice arrangements such as pentagons and heptagons. In CAAC-OS, however, it is difficult to observe clear grain boundaries (also called grain boundaries) even near strain. This indicates that the formation of grain boundaries is suppressed by the strain in the lattice arrangement. This is because CAAC-OS can tolerate strain due to factors such as the sparse arrangement of oxygen atoms in the ab-plane and the change in interatomic bond distances caused by the substitution of metal elements.

[0301] Furthermore, CAAC-OS tends to have a layered crystalline structure (also called a layered structure) in which layers containing indium and oxygen (hereinafter referred to as the In layer) and layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer) are stacked. Note that indium and element M are mutually substitutable, and when element M in the (M,Zn) layer is substituted with indium, it can also be represented as the (In,M,Zn) layer. Similarly, when indium in the In layer is substituted with element M, it can also be represented as the (In,M) layer.

[0302] CAAC-OS is a highly crystalline metal oxide. Furthermore, because it is difficult to identify clear grain boundaries in CAAC-OS, it is less susceptible to the reduction in electron mobility caused by grain boundaries. Also, since the crystallinity of metal oxides can decrease due to impurities and defects, CAAC-OS can be considered a metal oxide with few impurities or defects (such as oxygen vacancies). Therefore, metal oxides containing CAAC-OS have stable physical properties. Consequently, metal oxides containing CAAC-OS are highly heat-resistant and reliable.

[0303] nc-OS exhibits periodicity in atomic arrangement within minute regions (e.g., regions between 1 nm and 10 nm, particularly between 1 nm and 3 nm). Furthermore, nc-OS lacks regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed across the entire film. Consequently, depending on the analytical method, nc-OS may be indistinguishable from a-like OS or amorphous oxide semiconductors.

[0304] Furthermore, in-Ga-Zn oxide (hereinafter referred to as IGZO), a type of metal oxide containing indium, gallium, and zinc, can sometimes adopt a stable structure when formed into the nanocrystals described above. In particular, since IGZO tends to have difficulty growing crystals in the atmosphere, smaller crystals (for example, the nanocrystals described above) may be structurally more stable than larger crystals (here, crystals of several millimeters or several centimeters).

[0305] a-like OS is a metal oxide having a structure between nc-OS and amorphous oxide semiconductors. a-like OS has porous or low-density regions. In other words, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS.

[0306] Oxide semiconductors (metal oxides) can take on diverse structures, each possessing different properties. One embodiment of the present invention may include two or more of the following: amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, nc-OS, and CAAC-OS.

[0307] [impurities] Here, we will explain the effects of various impurities in metal oxides.

[0308] When impurities are introduced into oxide semiconductors, defect levels or oxygen vacancies may form. Therefore, the inclusion of impurities in the channel formation region of an oxide semiconductor can easily alter the electrical properties of a transistor using that semiconductor, potentially reducing its reliability. Furthermore, the presence of oxygen vacancies in the channel formation region can lead to normally-on characteristics in the transistor.

[0309] Furthermore, the above-mentioned defect levels may include trap levels. Charges trapped in the trap levels of metal oxides can take a long time to disappear and may behave as if they were fixed charges. Therefore, transistors with metal oxides that have a high density of trap levels in the channel formation region may exhibit unstable electrical properties.

[0310] Furthermore, the presence of impurities in the channel formation region of an oxide semiconductor can reduce the crystallinity of that region, and can also reduce the crystallinity of the oxide material adjacent to the channel formation region. Low crystallinity of the channel formation region tends to reduce the stability or reliability of the transistor. Also, low crystallinity of the oxide material adjacent to the channel formation region can lead to the formation of interface states, which can reduce the stability or reliability of the transistor.

[0311] Therefore, to improve the stability or reliability of transistors, it is effective to reduce the impurity concentration in and near the channel formation region of oxide semiconductors. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0312] Specifically, the concentration of the impurity obtained by secondary ion mass spectrometry (SIMS) in the channel formation region and its vicinity of the oxide semiconductor is set to 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3The following applies: Alternatively, the concentration of the impurity obtained by elemental analysis using EDX in the channel formation region and its vicinity of the oxide semiconductor shall be 1.0 atomic% or less. When an oxide containing element M is used as the oxide semiconductor, the concentration ratio of the impurity to element M in the channel formation region and its vicinity of the oxide semiconductor shall be less than 0.10, preferably less than 0.05. Here, the concentration of element M used when calculating the above concentration ratio may be the concentration in the same region as the concentration of the impurity calculated, or it may be the concentration in the oxide semiconductor.

[0313] Furthermore, metal oxides with reduced impurity concentrations may also have lower trapping levels due to their lower defect level density.

[0314] Furthermore, when hydrogen enters an oxygen vacancy in a metal oxide, the oxygen vacancy and hydrogen combine to form V O It may form H. O H can function as a donor, generating electrons as carriers. Additionally, some hydrogen can combine with oxygen atoms (which bond to metal atoms) to generate electrons as carriers.

[0315] Therefore, transistors using oxide semiconductors with a high hydrogen content tend to exhibit normally-on characteristics. Furthermore, because hydrogen in oxide semiconductors is easily affected by stresses such as heat and electric fields, a high hydrogen content in the oxide semiconductor may reduce the reliability of the transistor.

[0316] In other words, V in metal oxides O It is preferable to reduce H as much as possible and make it high-purity intrinsic or substantially high-purity intrinsic. Thus, V O To obtain an oxide semiconductor with sufficiently reduced H content, it is important to remove impurities such as water and hydrogen from the oxide semiconductor (sometimes referred to as dehydration and dehydrogenation treatment) and to supply oxygen to the oxide semiconductor to compensate for oxygen deficiencies (sometimes referred to as oxygenation treatment). OBy using an oxide semiconductor with sufficiently reduced impurities such as H in the channel formation region of a transistor, stable electrical characteristics can be provided.

[0317] Furthermore, it is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. When the carrier concentration of the oxide semiconductor is low, the impurity concentration in the oxide semiconductor is lowered to lower the defect level density. In this specification, a low impurity concentration and a low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. Examples of impurities in oxide semiconductors include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0318] In particular, hydrogen contained in oxide semiconductors can react with oxygen bonded to metal atoms to form water, thus creating oxygen vacancies in the oxide semiconductor. If oxygen vacancies are present in the channel-forming region of the oxide semiconductor, the transistor may exhibit normally-on characteristics. Furthermore, defects containing hydrogen can function as donors, generating electrons as carriers. In addition, some of the hydrogen can combine with oxygen bonded to metal atoms, generating electrons as carriers. Therefore, transistors using oxide semiconductors with a high hydrogen content tend to exhibit normally-on characteristics.

[0319] A defect where hydrogen is placed in an oxygen vacancy (V O H) can function as a donor in oxide semiconductors. However, it is difficult to quantitatively evaluate such defects. Therefore, in oxide semiconductors, evaluation is sometimes done using carrier concentration rather than donor concentration. Accordingly, in this specification, the carrier concentration assuming no electric field is applied may be used as a parameter for oxide semiconductors, rather than the donor concentration. In other words, "carrier concentration" as described in this specification may be rephrased as "donor concentration".

[0320] Therefore, it is preferable that the hydrogen content in the oxide semiconductor be reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is 1 × 10⁻⁶. 20 atoms / cm 3 Less than 1 × 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 It should be less than [amount]. By using an oxide semiconductor with sufficiently reduced impurities such as hydrogen in the channel formation region of a transistor, stable electrical characteristics can be provided.

[0321] Furthermore, the carrier concentration of the oxide semiconductor in the channel formation region is 1 × 10⁻⁶. 18 cm -3 The following is preferable: 1 × 10 17 cm -3 It is more preferable that it be less than 1 × 10 16 cm -3 It is even more preferable that it be less than 1 × 10 13 cm -3 It is even more preferable that it be less than 1 × 10 12 cm -3 It is even more preferable that it be less than . There are no particular limitations on the lower limit of the carrier concentration of the oxide semiconductor in the channel formation region, but for example, 1 × 10 -9 cm -3 It can be done this way.

[0322] One aspect of the present invention can provide a semiconductor device with good reliability. Another aspect of the present invention can provide a semiconductor device with good electrical characteristics. Another aspect of the present invention can provide a semiconductor device with a large on-current. Another aspect of the present invention can provide a semiconductor device that can be miniaturized or highly integrated. Another aspect of the present invention aims to provide a semiconductor device with low power consumption.

[0323] <<Other Semiconductor Materials>> The semiconductor material that can be used for oxide 530 is not limited to the metal oxides described above. A semiconductor material having a band gap (a semiconductor material that is not a zero-gap semiconductor) may be used as oxide 530. For example, it is preferable to use semiconductors of elemental elements such as silicon, compound semiconductors such as gallium arsenide, or layered materials that function as semiconductors (also called atomic layer materials, two-dimensional materials, etc.) as semiconductor materials. In particular, it is preferable to use layered materials that function as semiconductors as semiconductor materials.

[0324] In this specification, the term "layered material" refers to a group of materials having a layered crystalline structure. A layered crystalline structure is a structure in which layers formed by covalent or ionic bonds are stacked via weaker bonds than covalent or ionic bonds, such as van der Waals forces. Layered materials have high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, it is possible to provide a transistor with a large on-current.

[0325] Layered materials include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogens. Chalcogens are a general term for elements belonging to Group 16, and include oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides.

[0326] As oxide 530, it is preferable to use, for example, a transition metal chalcogenide that functions as a semiconductor. Specific examples of transition metal chalcogenides applicable as oxide 530 include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum tellurium (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten tellurium (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), and zirconium selenide (typically ZrSe2).

[0327] This embodiment can be appropriately combined with descriptions of other embodiments.

[0328] (Embodiment 6) In this embodiment, an example in which the amplifier described in the above embodiment is used as an electronic component will be explained with reference to Figure 18.

[0329] In this embodiment, Figure 18 shows an example of a chip 1200 on which the semiconductor device of the present invention is mounted. Multiple circuits (systems) are mounted on the chip 1200. This technology of integrating multiple circuits (systems) onto a single chip is sometimes called a System on Chip (SoC).

[0330] Figure 18 shows an example in which multiple chips are provided on a printed circuit board 1203. In Figure 18, a chip 1201 is provided on the printed circuit board 1203. At least a part of a semiconductor device according to one embodiment of the present invention is provided on the chip 1201. For example, a gate driver and a power control circuit, which are part of the semiconductor device shown in the previous embodiment, are provided on the chip 1201. Furthermore, at least one power MOSFET, which is part of the semiconductor device shown in the previous embodiment, is provided on the chip 1201. Multiple bumps 1202 are provided on the back surface of the chip 1201 and are connected to the printed circuit board 1203.

[0331] By using the configuration of a semiconductor device according to one aspect of the present invention, circuits such as a gate driver and a power control circuit can be stacked on a power MOSFET within a single chip, thereby reducing the number of chips in the electronic component.

[0332] By reducing the number of chips, stable circuit operation can be achieved even in environments with vibration. Furthermore, by using bumps to create a mechanically robust connection between the chip and the connection electrodes of the printed circuit board, and by ensuring a reliable electrical connection, an even more vibration-resistant configuration can be achieved. Therefore, it is suitable for applications such as electronic components mounted in vehicles and mobile devices.

[0333] Furthermore, by using the semiconductor device configuration according to one aspect of the present invention, chip integration becomes possible, enabling chip miniaturization, and thus miniaturization of electronic devices. In addition, miniaturization of the chip may reduce power consumption.

[0334] The printed circuit board 1203 shown in Figure 18 includes chips 1221, 1222, etc., in addition to chip 1201. For example, an inductor 752 may be provided on chip 1221, and a capacitive element 753 may be provided on chip 1222. Note that the inductor 752, capacitive element 753, etc., may be provided on chip 1201 rather than on a different chip.

[0335] In the case where an amplifier according to one aspect of the present invention has multiple power MOSFETs, as shown in the example in Figure 1, each power MOSFET can be provided on a different chip. For example, in the printed circuit board 1203 shown in Figure 18, the first power MOSFET can be provided on chip 1201 and the second power MOSFET on chip 1225. By providing the power MOSFETs on different chips, leakage between MOSFETs can be reduced.

[0336] Alternatively, multiple power MOSFETs may be provided on the same substrate within a single chip, and gate drivers, power control circuits, etc., may be stacked on top of these multiple power MOSFETs. This enables circuit integration.

[0337] It is preferable that an integrated circuit 1223 is provided on the printed circuit board 1203. The integrated circuit 1223 has the function of supplying control signals, power, etc. to the chip 1201. The integrated circuit 1223 may include, for example, a CPU, an arithmetic circuit, a conversion circuit, etc. The arithmetic circuit may have functions such as image processing or multiply-accumulate operations. The conversion circuit may include, for example, one or both of an A / D (analog / digital) conversion circuit and a D / A (digital / analog) conversion circuit.

[0338] Furthermore, various chips such as DRAM and flash memory may be provided on the printed circuit board 1203. Additionally, the printed circuit board 1203 may be provided with a chip that performs wireless communication.

[0339] This embodiment can be appropriately combined with descriptions of other embodiments.

[0340] (Embodiment 7) This embodiment describes an example of an electronic device according to one aspect of the present invention.

[0341] An example of an electronic device equipped with an amplifier according to one aspect of the present invention will be explained with reference to Figure 19.

[0342] An amplifier according to one aspect of the present invention can be used in electronic devices such as sound reproduction devices. An amplifier according to one aspect of the present invention can be used in speakers, etc. An amplifier according to one aspect of the present invention can be used in electronic devices having speakers, etc. Examples of sound reproduction devices include car audio systems and digital audio players. An amplifier according to one aspect of the present invention can be used in headphones, earphones, etc.

[0343] The switching frequency of transistors 762 and 763 by the gate driver 760 shown in the above embodiment is preferably 10 times or more the frequency of the audio signal. The switching frequency is preferably 100 kHz or more and 5 MHz or less. It is preferable to adjust the inductance of the inductor and the capacitance of the capacitive element so that the cutoff frequency of the low-pass filter is higher than the audible frequency band.

[0344] The cleaning robot 7000 shown in Figure 19A is equipped with a secondary battery, an illuminance sensor, a microphone, a camera, a speaker, a display, various sensors (infrared sensor, ultrasonic sensor, accelerometer, piezoelectric sensor, light sensor, gyroscope, etc.), and a movement mechanism. The cleaning robot 7000 is also equipped with wheels and a suction port. The cleaning robot 7000 is self-propelled, can detect dirt, and can suck up the dirt from a suction port located on its underside.

[0345] The microphone has the function of detecting acoustic signals such as the user's voice and ambient sounds. The speaker has the function of emitting audio signals such as voice and warning sounds. The cleaning robot 7000 can analyze the audio signals input via the microphone and emit the necessary audio signals from the speaker. The cleaning robot 7000 can communicate with the user using the microphone and speaker.

[0346] An amplifier according to one aspect of the present invention can be used to amplify audio signals input via a microphone and to amplify audio signals emitted from a speaker.

[0347] The camera has the function of capturing images of the area around the cleaning robot 7000. The cleaning robot 7000 also has the function of moving using a mobility mechanism. The cleaning robot 7000 can capture images of its surroundings using the camera and analyze the images to detect the presence or absence of obstacles while moving.

[0348] The smartphone 7210 shown in Figure 19B is an example of a portable information terminal. The smartphone 7210 has a microphone, a camera, a speaker, various sensors, and a display unit. An amplifier according to one aspect of the present invention can be used to amplify the audio signal input via the microphone and the audio signal emitted from the speaker.

[0349] The earphone 7400 shown in Figure 19C comprises a main body 7401, a housing 7402, an ear hook 7403, and a circuit board 7404 disposed within the housing 7402. As the circuit board 7404, a chip equipped with an amplifier according to one embodiment of the present invention, as shown in the previous embodiment, can be used. By using this chip, a compact earphone can be provided. Furthermore, a lightweight earphone can be provided.

[0350] Furthermore, it is preferable that the earphone 7400 has wireless communication capabilities. It is also preferable that the earphone 7400 has a rechargeable battery within the housing 7402. Having a rechargeable battery allows the earphone to be used without being connected to a power source via a wire.

[0351] Furthermore, it is preferable that the earphones 7400 have wireless communication capabilities. When wireless communication is performed, communication protocols or technologies such as LTE (Long Term Evolution), GSM (Global System for Mobile Communication: registered trademark), EDGE (Enhanced Data Rates for GSM Evolution), CDMA2000 (Code Division Multiple Access 2000), W-CDMA (registered trademark), or specifications standardized by IEEE such as Wi-Fi (registered trademark), Bluetooth (registered trademark), and ZigBee (registered trademark) can be used. By having wireless communication capabilities, the earphones can be used without being connected to a device that outputs audio signals via a wired connection.

[0352] The television 7500 shown in Figure 19D includes a display unit 7501 and a speaker 7502. An amplifier according to one embodiment of the present invention can be used to amplify the audio signal emitted from the speaker.

[0353] Figure 19E shows the interior of vehicle 8400. Vehicle 8400 includes a display unit 8411, a speaker 8403, and a microphone 8404. An amplifier according to one aspect of the present invention can be used to amplify the audio signal input via the microphone and the audio signal emitted from the speaker.

[0354] This embodiment can be appropriately combined with descriptions of other embodiments. [Explanation of symbols]

[0355] :21:Transistor, 22:Transistor, 23:Transistor, 24:Transistor, 25:Transistor, 50:Comparator, 101:Buffer circuit, 102:Level shift circuit, 103:Buffer circuit, 104:Buffer circuit, 111:Transistor, 112:Transistor, 113:Capacitor element, 114:Capacitor element, 121:Transistor, 122:Transistor, 131:Inverter circuit, 132:Inverter circuit, 141:Transistor, 142:Transistor, 143:Transistor, 144:Transistor, 151:Transistor, 1 52: Transistor, 153: Transistor, 154: Transistor, 155: Capacitive element, 211: Control circuit, 212: Photocoupler, 213: Photocoupler, 214: Reference voltage generation circuit, 215: Reference voltage generation circuit, 216: Reference voltage generation circuit, 300: Transistor, 311: Substrate, 311b: Substrate, 313: Semiconductor region, 314a: Diffusion layer, 314b: Diffusion layer, 315: Insulator, 316: Conductor, 317: Diffusion layer, 318: Back electrode, 319: Region, 320: Insulator, 322: Insulator, 322b: Insulator, 324: Insulator, 326: Insulator, 328: Conductor, 328b: Conductor, 330: Conductor, 350: Insulator, 352: Insulator, 354: Insulator, 356: Conductor, 385: Layer, 500: Transistor, 503: Conductor, 503a: Conductor, 503b: Conductor, 510: Insulator, 512: Insulator, 514: Insulator, 516: Insulator, 518: Conductor, 520: Insulator, 522: Insulator, 524: Insulator, 530: Oxide, 530a: Oxide, 530b: Oxide, 530c: Oxide, 540a: Conductor, 540b: Conductor, 542a: Conductor, 542b: Conductor, 543a: Region, 543b: Region, 544 :Insulator, 546:Conductor, 546b:Conductor, 548:Conductor, 548b:Conductor, 550:Insulator, 560:Conductor, 560a:Conductor, 560b:Conductor, 574:Insulator, 580:Insulator, 581:Insulator, 582:Insulator, 585:Layer, 600:Capacitive element, 610a:Conductor, 610b:Conductor, 620:Conductor, 630:Insulator, 631:Conductor, 632:Conductor, 637:Bump, 638:Printed circuit board, 639:Resin layer, 640:Insulator, 641:Resin layer, 642:Wire, 750:Amplifier, 751:Semiconductor, 752:Inductor753: Capacitive element, 760: Gate driver, 760a: Driver circuit, 760a1: Driver circuit, 760a2: Driver circuit, 761: Power control circuit, 762: Transistor, 763: Transistor, 771: Comparator, 772: Comparator, 773: Carrier wave generation circuit, 774: Resistor element, 775: Resistor element, 776: Capacitive element, 777: Resistor element, 778: Resistor element, 779: Capacitive element, 791: Terminal, 792: Terminal, 793: Terminal, 794: Terminal, 795: Terminal, 901: Insulator, 902: Insulation Body, 903: Conductor, 1200: Chip, 1201: Chip, 1202: Bump, 1203: Printed circuit board, 1221: Chip, 1222: Chip, 1223: Integrated circuit, 1225: Chip, 7000: Cleaning robot, 7210: Smartphone, 7400: Earphone, 7401: Main unit, 7402: Housing, 7403: Ear hook, 7404: Circuit board, 7500: Television, 7501: Display unit, 7502: Speaker, 8400: Vehicle, 8403: Speaker, 8404: Microphone, 8411: Display unit,

Claims

1. It has a first terminal, a second terminal, a third terminal, a fourth terminal, a first comparator circuit, a gate driver, a first transistor, and a second transistor. The first terminal is directly connected to the first input terminal of the first comparison circuit. The first terminal is directly connected to the fourth terminal. The output terminal of the first comparison circuit is directly connected to the input terminal of the gate driver. The first output terminal of the gate driver is directly connected to the gate of the first transistor. The second output terminal of the gate driver is directly connected to the gate of the second transistor. One of the source and drain of the first transistor is directly connected to the second terminal. The source and the other drain of the first transistor are directly connected to the third terminal. One of the source and drain of the second transistor is directly connected to the second terminal. The source and the other drain of the second transistor are directly connected to the fourth terminal. An input signal is input to the aforementioned first terminal. An output signal is output to the second terminal. The first potential is input to the second input terminal of the first comparison circuit. The third terminal receives a second potential, The third potential is input to the fourth terminal. The transistor of the gate driver is a semiconductor device that is stacked on the first transistor.

2. In claim 1, The first transistor is a semiconductor device having one or more selected from silicon, germanium, silicon germanium, gallium arsenide, gallium aluminum arsenide, indium phosphide, silicon carbide, zinc selenide, gallium nitride, and gallium oxide in its channel formation region.

3. In claim 1 or claim 2, The transistor of the gate driver has a metal oxide in the channel formation region. The aforementioned metal oxide is a semiconductor device having indium and zinc.

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