Signal processing device, photodetector, and distance measuring device
The signal processing device in LiDAR systems addresses cost and performance issues by integrating signals from multiple input terminals, enhancing distance measurement accuracy and reducing manufacturing costs.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- KK TOSHIBA
- Filing Date
- 2022-08-05
- Publication Date
- 2026-04-20
AI Technical Summary
Existing LiDAR devices face challenges in reducing manufacturing costs while improving ranging performance.
A signal processing device with multiple input terminals and a control circuit that integrates signals from groups of consecutive input terminals, switching the combination of input terminals at each time point to enhance signal processing efficiency.
This approach reduces manufacturing costs and enhances ranging performance by optimizing signal integration and processing, leading to improved distance measurement accuracy and efficiency.
Smart Images

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Abstract
Description
Technical Field
[0001] Embodiments relate to a signal processing device, a photodetector, and a distance measuring device.
Background Art
[0002] A distance measuring device called LiDAR (Light Detection and Ranging) is known. LiDAR irradiates a target object with laser light and detects the intensity of the reflected light reflected from the target object by a sensor (photodetector). Then, LiDAR measures the distance from LiDAR to the target object based on the light intensity signal output from the sensor.
Prior Art Documents
Patent Documents
[0003] [[ID=--]] [[ID=--]]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] [[ID=--]] Suppress the manufacturing cost of the distance measuring device and improve the ranging performance. [[ID=--]]
Means for Solving the Problems
[0005] [[ID=--]] The signal processing device of the embodiment processes a plurality of intermittently input signals. The signal processing device includes a plurality of inputs end and , a first output terminal to an Nth output terminal (N is an integer of 2 or more), and a control circuit. The plurality of input terminals are configured such that a plurality of signals can be respectively input. The first output terminal to the Nth output terminal are respectively associated with first to Nth groups (N is an integer of 2 or more) each including M consecutive input terminals (M is an integer of 2 or more). The control circuit Group 1 through Group N a signal obtained by integrating a plurality of signals respectively input to M consecutive input terminals of the kth group (k is an integer from 1 to N) First to Nth output terminalsThe output is sent to the k-th output terminal, and the combination of input terminals assigned to the M input terminals is switched so that they are different at each of the first to M time points. [Brief explanation of the drawing]
[0006] [Figure 1] A schematic diagram showing an example of the overall configuration of a distance measuring device according to the first embodiment. [Figure 2] A schematic diagram showing an overview of the distance measurement method of the distance measuring device according to the first embodiment. [Figure 3] A schematic diagram showing a more detailed example of the configuration of the distance measuring device according to the first embodiment. [Figure 4] A schematic diagram showing an example of the distance measurement result for one frame by the distance measuring device according to the first embodiment. [Figure 5] A block diagram showing an example of the configuration of a photodetector included in the distance measuring device according to the first embodiment. [Figure 6] A circuit diagram showing an example of the circuit configuration of a sensor array and column selector included in a photodetector of a distance measuring device according to the first embodiment. [Figure 7] A plan view showing an example of the planar layout of a sensor array and column selector included in a photodetector of a distance measuring device according to the first embodiment. [Figure 8] A circuit diagram showing an example of the circuit configuration of a signal processing device included in a photodetector of a distance measuring device according to the first embodiment. [Figure 9] A circuit diagram showing an example of the circuit configuration of a switch in a distance measuring device according to the first embodiment. [Figure 10] A block diagram showing an example of the configuration of the measuring unit included in the distance measuring device according to the first embodiment. [Figure 11] A plan view showing an example of a control method for the column selector in the distance measurement operation of a distance measuring device according to the first embodiment. [Figure 12] A schematic diagram showing an example of the operation of the signal processing device at the first time of the distance measurement operation of the distance measuring device according to the first embodiment. [Figure 13]Schematic diagram showing an example of the operation of the signal processing device at the second time of the distance measurement operation of the distance measurement device according to the first embodiment. [Figure 14] Schematic diagram showing an example of an output method of the distance measurement result in the distance measurement operation of the distance measurement device according to the first embodiment. [Figure 15] Schematic diagram showing an example of the correspondence relationship between the measurement result and the pixel in the distance measurement operation of the distance measurement device according to the first embodiment. [Figure 16] Schematic diagram showing an example of setting the averaging range in the averaging process of the distance measurement device according to the first embodiment [Figure 17] Schematic diagram for explaining the difference in the averaging process between the first embodiment and the conventional example. [Figure 18] Schematic diagram showing the evaluation conditions in the photodetector according to the first comparative example. [Figure 19] Schematic diagram showing the evaluation conditions in the photodetector according to the second comparative example. [Figure 20] Schematic diagram showing the evaluation conditions in the photodetector according to the first embodiment. [Figure 21] Graph showing an example of the distance measurement performance of each of the first comparative example and the first embodiment. [Figure 22] Graph showing the evaluation results of the first comparative example, the second comparative example, and the first embodiment. [Figure 23] Schematic diagram showing the evaluation conditions of the first comparative example for comparing the first comparative example and the first embodiment. [Figure 24] Schematic diagram showing the evaluation conditions of the second comparative example for comparing the second comparative example and the first embodiment. [Figure 25] Block diagram showing an example of the configuration of the photodetector included in the distance measurement device according to the second embodiment. [Figure 26] Circuit diagram showing an example of the circuit configuration of the signal processing device included in the photodetector included in the distance measurement device according to the second embodiment. [Figure 27] Schematic diagram showing an example of the operation of the signal processing device at the first time of the distance measurement operation of the distance measurement device according to the second embodiment. [Figure 28]Schematic diagram showing an example of the operation of the signal processing device at the second time of the distance measurement operation of the distance measurement device according to the second embodiment. [Figure 29] Schematic diagram showing an example of the operation of the signal processing device at the third time of the distance measurement operation of the distance measurement device according to the second embodiment. [Figure 30] Schematic diagram showing an example of the output method of the distance measurement result in the distance measurement operation of the distance measurement device according to the second embodiment. [Figure 31] Block diagram showing an example of the configuration of the photodetector included in the distance measurement device according to the third embodiment. [Figure 32] Circuit diagram showing an example of the circuit configuration of the signal processing device included in the photodetector included in the distance measurement device according to the third embodiment. [Figure 33] Schematic diagram showing an example of the operation of the column selector at the first time of the distance measurement operation of the distance measurement device according to the third embodiment. [Figure 34] Schematic diagram showing an example of the operation of the column selector at the second time of the distance measurement operation of the distance measurement device according to the third embodiment. [Figure 35] Schematic diagram showing an example of the planar layout of the sensor array and the column selector included in the photodetector according to the modification.
Embodiments for Carrying Out the Invention
[0007] Hereinafter, embodiments will be described with reference to the drawings. Each embodiment illustrates an apparatus and a method for embodying the technical idea of the invention. The drawings are schematic or conceptual, and the dimensions, ratios, etc. of each drawing are not necessarily the same as those in reality. The "X direction" and "Y direction" shown in the drawings correspond to directions intersecting each other. The X direction corresponds to, for example, the horizontal direction. The Y direction corresponds to, for example, the vertical direction. The technical idea of the present invention is not specified by the shape, structure, arrangement, etc. of the components.
[0008] In the following explanation, components having substantially the same function and structure are assigned the same code. The numbers and other characters following the characters that make up the reference code are used to distinguish elements that are referenced by the same character-containing reference code and have a similar structure. When there is no need to distinguish between elements indicated by the same character-containing reference code, these elements are each referenced by a reference code containing only the character.
[0009] <1> First Embodiment The distance measuring device 1 according to the first embodiment is a type of LiDAR (Light Detection and Ranging) capable of measuring the distance between the distance measuring device 1 and an object. The details of the distance measuring device 1 according to the first embodiment will be described below.
[0010] <1-1> Composition <1-1-1> Overall configuration of distance measuring device 1 Figure 1 is a schematic diagram showing an example of the overall configuration of the distance measuring device 1 according to the first embodiment. As shown in Figure 1, in this example, a vehicle is positioned in front of the distance measuring device 1 as an example of the object TG to be measured. The distance measuring device 1 includes, for example, a control unit 10, an emission unit 20, a light receiving unit 30, a measurement unit 40, and an image processing unit 50.
[0011] The control unit 10 controls the overall operation of the distance measuring device 1. The control unit 10 includes, for example, a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), and an oscillator (not shown). The ROM stores programs used for the operation of the distance measuring device 1. The CPU controls the emission unit 20, light receiving unit 30, measurement unit 40, and image processing unit 50 according to the programs stored in the ROM. The RAM is used as the CPU's workspace. The oscillator is used to generate intermittent pulse signals. The control unit 10 may be configured to perform various data processing and arithmetic processing.
[0012] The emission unit 20 intermittently generates and emits laser light. Hereinafter, the intermittently generated laser light will be referred to as the "pulsed laser." The pulsed laser is emitted with a predetermined pulse width and period. The pulsed laser is used to measure the distance between the distance measuring device 1 and the object TG. In this specification, the laser light emitted from the emission unit 20 will be referred to as the "emitted light L1." The emitted light L1 reflected outside the distance measuring device 1 will be referred to as the "reflected light L2."
[0013] The light receiving unit 30 detects the light incident on the distance measuring device 1 and transmits the light reception result to the measurement unit 40. In other words, the light receiving unit 30 converts the light incident on the distance measuring device 1 into an electrical signal and transmits the converted electrical signal to the measurement unit 40. The light receiving unit 30 is used to detect reflected light L2 that is intermittently incident on the distance measuring device 1. In addition to reflected light L2, the light receiving unit 30 also receives ambient light and stray light (light generated inside the device), but the latter light is considered noise. For simplicity, the explanation of noise such as ambient light will be omitted as appropriate below.
[0014] The measurement unit 40 measures the time when the light receiving unit 30 detected the reflected light L2, based on the light reception result transferred from the light receiving unit 30. Then, the measurement unit 40 measures the distance between the distance measuring device 1 and the object TG based on the time when the emitted light L1 was emitted from the emission unit 20 and the time when the light receiving unit 30 detected the reflected light L2. The time when the emitted light L1 was emitted from the emission unit 20 is notified, for example, by the control unit 10. The measurement unit 40 may also input a portion of the results of processing the electrical signal input from the light receiving unit 30 to the control unit 10.
[0015] The image processing unit 50 acquires the measurement results from the measurement unit 40 and generates an image containing distance information using the acquired measurement results. The image generated by the image processing unit 50 includes distance information between the distance measuring device 1 and the object TG. The image generated by the image processing unit 50 is also referenced by a control program, for example, a vehicle equipped with the distance measuring device 1. The image processing unit 50 may be externally connected to the distance measuring device 1.
[0016] In the distance measuring device 1 according to the first embodiment, the control unit 10 is described as a single block independent of the light-emitting unit 20 and the light-receiving unit 30. However, it is not limited to this, and some of the functions of the control unit 10 may be implemented in the light-receiving unit 30 or the measurement unit 40. This allows the distance measuring device 1 to perform fine operations in a timely manner. Controls not specifically stated in the following description will be assumed to be performed by the control unit 10 for the sake of simplicity.
[0017] Figure 2 is a schematic diagram showing an overview of the distance measuring method of the distance measuring device 1 according to the first embodiment. The waveform of the input voltage shows the time change of the voltage supplied to the light source included in the emission unit 20. The waveform of the light reception result shows the time change of the intensity of the electrical signal based on the light detected by the light receiving unit 30. As shown in Figure 2, when a pulse signal is supplied to the light source of the emission unit 20, emitted light L1 is generated and emitted based on the rising edge of the pulse signal. Then, the emitted light L1 is irradiated onto the object TG, and the light receiving unit 30 detects the reflected light L2 reflected from the object TG.
[0018] The measurement unit 40 calculates the time of flight (ToF) of the emitted light L1 based on the difference between the emission time when the emitted light L1 is emitted from the emission unit 20 and the reception time when the light receiving unit 30 detects the reflected light L2. Then, the measurement unit 40 measures (measures the distance) between the distance measuring device 1 and the object TG based on the time of flight of the emitted light L1 and the speed of the laser light. This distance measuring method of the distance measuring device 1 is also called the "ToF method". The measurement unit 40 outputs the distance measurement result for each pair of emitted light L1 and reflected light L2 emitted and received by the distance measuring device 1.
[0019] The measurement unit 40 only needs to determine the emission time based on the time of emission of the emitted light L1 and the reception time based on the time of reception of the reflected light L2. For example, the measurement unit 40 may determine the emission time and reception time based on the rise time of the signal or based on the peak time of the signal. The processing of the measurement unit 40 may also be performed by the control unit 10.
[0020] <1-1-2> Configuration of the ejection unit 20 Figure 3 is a schematic diagram showing an example of the configuration of the light-emitting unit 20 and light-receiving unit 30 of the distance measuring device 1 according to the first embodiment. First, the specific configuration of the light-emitting unit 20 will be described with reference to Figure 3. As shown in Figure 3, the light-emitting unit 20 includes, for example, drive circuits 21 and 22, a light source 23, an optical system 24, and a mirror 25.
[0021] The drive circuit 21 generates a drive current in response to a pulse signal input from the oscillator of the control unit 10. The drive circuit 21 then supplies the generated drive current to the light source 23. In other words, the drive circuit 21 functions as a current supply source for the light source 23.
[0022] The drive circuit 22 generates a drive current in response to control by the control unit 10. The drive circuit 22 then supplies the generated drive current to the mirror 25. In other words, the drive circuit 22 functions as a power supply circuit for the mirror 25.
[0023] The light source 23 is a laser light source such as a laser diode. The light source 23 intermittently emits laser light (emitted light L1) based on an intermittent drive current (pulse signal) supplied from the drive circuit 21. The laser light (pulsed laser) emitted by the light source 23 is incident on the optical system 24.
[0024] The optical system 24 may include multiple lenses and optical elements. The optical system 24 is positioned in the optical path of the emitted light L1 from the light source 23. The optical system 24 collimates the incident emitted light L1 and guides the collimated emitted light L1 to the mirror 25. The optical system 24 also includes a beam splitter BS. The emitted light L1 from the light source 23 passes through the beam splitter BS and is irradiated onto the mirror 25. Furthermore, the beam splitter BS reflects the reflected light L2 irradiated from the mirror 25 toward the light receiving unit 30.
[0025] The mirror 25 is driven based on a drive current supplied from the drive circuit 22 and reflects the emitted light L1 incident on the mirror 25. The emitted light L1 reflected by the mirror 25 is emitted to the outside of the distance measuring device 1. Furthermore, the mirror 25 reflects reflected light L2 from the outside and guides it to the optical system 24. The reflective surface of the mirror 25 is configured to be rotatable or oscillating about two axes that intersect each other, for example. As the mirror 25, a polygon mirror, a rotating mirror, or a single-axis MEMS mirror may be used. In this specification, the case in which the mirror 25 is a rotating mirror (double-sided mirror) having two reflective surfaces will be described.
[0026] The distance measuring device 1 scans the area to be measured by controlling the mirror 25 to change the direction of emission of the emitted light L1. The distance measuring device 1 performs measurement operations at multiple points within the scanned area (hereinafter referred to as the scan area SA) and measures the distance to various objects TG. By continuously performing scans, the distance measuring device 1 can sequentially acquire the distance to objects TG in front of the distance measuring device 1. Hereinafter, a set of distance measurement results for multiple points corresponding to one scan will be referred to as a "frame". The emission unit 20 only needs to have a configuration that enables scanning using laser light, and may have other configurations. For example, the emission unit 20 may further include an optical system arranged on the optical path of the laser light reflected by the mirror 25.
[0027] Figure 4 is a schematic diagram showing an example of the distance measurement result for one frame by the distance measuring device according to the first embodiment. Figure 4 schematically shows the scan area SA and the distance data of the object TG obtained by the scan. In the example of Figure 4, the emitted light L1 is irradiated into the PQR space. The R axis is the axis from the distance measuring device 1 toward the object TG, and is, for example, along the center of the direction of emission of the emitted light L1. The PQ plane is a curved surface perpendicular to the R axis and extending concentrically from the emission port of the emitted light L1. The P axis and Q axis are mutually orthogonal axes within the PQ plane. The distance data is generated, for example, as a mapping onto the PQ plane.
[0028] The distance measuring device 1 generates multiple distance data corresponding to a detection area DA smaller than the scan area SA at each measurement cycle. The detection area DA includes, for example, n pixels PX (PX1, PX2, PX3, ..., and PXn) arranged in one dimension (where n is an integer of 2 or more). One distance data is generated for each pixel PX. The n pixels PX are arranged, for example, along the Q axis. The distance measuring device 1 repeatedly performs the above-described processing for each measurement cycle while shifting the detection area DA one-dimensionally along the P axis. Consecutive detection areas DA may overlap or be separated. In this way, the distance measuring device 1 can generate distance data for the area corresponding to the first row S1 within the scan area SA.
[0029] The distance measuring device 1 then performs the same processing on the second row S2 within the scan area SA as it did on the first row S1. When a rotating mirror with two reflective surfaces is used as the mirror 25, distance data for two rows, consisting of the first row S1 and the second row S2, is generated. This allows the distance measuring device 1 to map the distance data to objects present in the spatial PQR into the scan area SA, and to recognize the distance to the target object TG within the spatial PQR. The number of pixels along the Q axis of the distance measurement result for one frame can increase as the number of rows allocated to measurement in the scan area SA increases.
[0030] The scanning method described above is called "multichannel raster scanning." To realize multichannel raster scanning, an emitted light L1 having a vertically elongated illumination surface is used. In this case, the emitter 20 has, for example, an anisotropic aspherical collimator lens. As the mirror 25, a polygon mirror, a rotating mirror, or a two-axis mirror having multiple reflective surfaces with different tilt angles may be used. The distance measuring device 1 may also use the OPA method (Optical Phased Array) as another scanning method. The number of rows and the scanning direction in a single scan of the distance measuring device 1 may be set to other values. The operation and effects of the distance measuring device 1 according to the first embodiment do not depend on the scanning method of the emitted light L1.
[0031] <1-1-3> Configuration of the light-receiving unit 30 Referring again to Figure 3, the specific configuration of the light-receiving unit 30 of the distance measuring device 1 according to the first embodiment will be described. As shown in Figure 3, the light-receiving unit 30 includes, for example, an optical system 31 and a photodetector PD. The photodetector PD includes, for example, a sensor array 32, a column selector 33, a signal processing device 34, and a control circuit 35.
[0032] The optical system 31 collects reflected light L2 incident on the distance measuring device 1 onto the sensor array 32 of the photodetector PD. The optical system 31 includes at least one lens. For example, the optical system 31 has a microlens array provided to cover the sensor array 32.
[0033] The sensor array 32 converts light incident via the optical system 31 into an electrical signal. The sensor array 32 includes a photomultiplier element. As the photomultiplier element, for example, a single-photon avalanche diode (SPAD), a type of avalanche photodiode, is used. The electrical signal (light reception result) converted by the sensor array 32 is output to the signal processing device 34 via the column selector 33.
[0034] The column selector 33 selects one of several sets of SPADs included in the sensor array 32 based on the control of the control circuit 35. It then electrically connects the selected set of SPADs to the signal processing device 34.
[0035] The signal processing unit 34 adjusts the output level of the electrical signals transferred from the sensor array 32 and outputs it to the measurement unit 40. Furthermore, the signal processing unit 34 has a function to switch the combination of input signals. The detailed configuration of the signal processing unit 34 will be described later.
[0036] The control circuit 35 controls the overall operation of the photodetector PD based on the control of the control unit 10. The processing of the control circuit 35 may be performed by the control unit 10.
[0037] The components of the photodetector PD may be formed on the same substrate (chip) or on different substrates. The signal processing unit 34 may be externally connected to the photodetector PD. The measurement unit 40 may have the functions of the signal processing unit 34.
[0038] (Configuration of photodetector PD) Figure 5 is a block diagram showing an example of a detailed configuration of the photodetector PD included in the distance measuring device 1 according to the first embodiment. As shown in Figure 5, the sensor array 32 includes a plurality of channel units (groups) CHU1 to CHU(n+1) (where n is an integer of 2 or more). The column selector 33 includes a plurality of selection integrators XFR1 to XFR(n+1).
[0039] Each channel unit CHU contains multiple SPADs, corresponding to subpixels. Each subpixel may also be simply called a “pixel”. Multiple channel units CHU1 to CHU(n+1) of the sensor array 32 are connected to multiple selection integrators XFR1 to XFR(n+1) via output node sets OUT1 to OUT(n+1). Each output node set OUT contains multiple output nodes. Details of the output nodes will be described later.
[0040] Each selective integrator XFR selectively activates multiple SPADs contained in the associated channel unit CHU. An active SPAD corresponds to a state in which reflected light L2 can be detected. The multiple selective integrators XFR1 to XFR(n+1) of the column selector 33 are each connected to the signal processing device 34 via subchannels SCH1 to SCH(n+1). As a result, the selective integrator XFRi (1≦i≦(n+1)) can integrate the electrical signals input from the active SPADs via the output node set OUTi and transfer them to the signal processing device 34 using subchannel SCHi.
[0041] The signal processing device 34 integrates the electrical signals of two consecutive subchannels SCH and outputs them to the channel CH associated with those two consecutive subchannels SCH. In other words, the signal processing device 34 integrates the electrical signals transferred from two adjacent subpixels and outputs them to the measurement unit 40. In this specification, the number of signal lines used for transferring electrical signals between the signal processing device 34 and the measurement unit 40 corresponds to the number of channels N.
[0042] In the photodetector PD according to the first embodiment, the number of channel units CHU and the number of selection integrators XFR are designed based on the number of channels N. In the first embodiment, N = n / 2. Specifically, when the number of channels N = 80 (i.e., a photodetector PD with 80 channels of output), the column selector 33 and the signal processing device 34 are connected by 161 subchannels SCH.
[0043] In the following explanation, for the sake of brevity, we will describe the case where N=4, i.e., n=8, and the photodetector PD comprises 4 channels CH1~CH4, 9 subchannels SCH1~SCH9, 9 selection integrators XFR1~XFR9, 9 output node sets OUT1~OUT9, and 9 channel units CHU1~CHU9.
[0044] (Circuit configuration of sensor array 32 and column selector 33) Figure 6 is a circuit diagram showing an example of the circuit configuration of the sensor array 32 and column selector 33 included in the photodetector PD of the distance measuring device 1 according to the first embodiment. As shown in Figure 6, each channel unit CHU includes a plurality of cell units CU1 to CUm (where m is an integer of 2 or more). Each cell unit CU includes a plurality of photodetector elements DC. The following describes the case in which each cell unit CU includes three photodetector elements DC. Each photodetector element DC includes, for example, a diode APD and a quench resistor Rq, a protection resistor Rs, and a diode RD connected in series. Each selection integrator XFR includes, for example, transistors T1 to Tm.
[0045] A diode APD is, for example, a SPAD. A diode APD has an input terminal connected to a bias power supply and an output terminal connected to the first terminal of a quench resistor Rq. The quench resistor Rq functions as a quench resistor. The second terminals of each of the multiple quench resistors Rq contained in the same cell unit CU are connected to each other. That is, the output of each cell unit CU has a configuration in which the outputs of multiple photodetector DCs are connected and the output current (current signal) is integrated. The same voltage is applied to the input terminal (cathode) of all diode APDs in the photodetector PD. The output terminal (anode) of each diode APD is biased to a voltage above the avalanche breakdown voltage (for example, around -30V). This allows the diode APD to undergo avalanche breakdown based on the reception of reflected light L2, and generate a Geiger discharge.
[0046] The quench resistor Rq suppresses the potential difference across the diode APD that has undergone avalanche breakdown to below the breakdown voltage (quenching). The diode APD can stop its Geiger discharge due to the quench resistor Rq, etc. Then, after a certain period of time has elapsed since stopping the Geiger discharge, the diode APD can generate a Geiger discharge again by receiving reflected light L2. The time from when the diode APD generates a Geiger discharge until it can generate a Geiger discharge again is extremely small compared to the pulse period of the emitted light L1. For this reason, the diode APD can be measured periodically. Each set of output nodes of the multiple cell units CU1 to CUm included in the channel unit CHUi corresponds to the output node set OUTi shown in Figure 5.
[0047] The protective resistor Rs is connected between diode APD and quench resistor Rq. The output terminal (anode) of diode RD is connected to the node between diode APD and quench resistor Rq. The input terminal (cathode) of diode RD is connected to node DOUT. The input terminals of each diode RD are connected in common to node DOUT; that is, the input terminals of each diode RD may be coupled. Node DOUT is connected to a potential slightly below the breakdown voltage of diode APD (> the threshold voltage Vth of diode APD). This ensures that if the potential of the unselected output node set OUT drops, carriers are released to node DOUT, protecting the associated transistors T1~Tm.
[0048] A cell unit CU is used as the smallest unit of the region in which the sensor array 32 can detect light. A cell unit CU may also be called a subpixel or simply a pixel. The number of photodetectors DC (diode APDs) constituting the cell unit CU may be at least one. A cell unit CU containing multiple diode APDs may be called a silicon photomultiplier (SiPM). The dynamic range of light that the sensor array 32 can detect may vary depending on the number of diode APDs contained in a single cell unit CU. Also, the direction of the output current of the diode APD may vary depending on the polarity of the diode APD.
[0049] Each cell unit CU is assigned a column address. Each cell unit CU can be identified by its column address. The diode APD is configured to be set to an active or inactive state by the control circuit 35. An active diode APD can detect light incident on it and outputs an optical signal indicating the detection result to the output terminal. An inactive diode APD is normally in a low-power state and does not detect light. Each cell unit CU may also be assigned a row address.
[0050] Multiple transistors T1 to Tm included in the selective integrator XFRi (1 ≤ i ≤ (n+1)) are connected to multiple cell units CU1 to CUm included in the channel unit CHUi, respectively. Specifically, the first terminal of transistor Tj (1 ≤ j ≤ m) of the selective integrator XFRi is connected to the second terminal of each of the multiple quench resistors Rq included in the cell unit CUj of the channel unit CHUi. Each of the multiple transistors T1 to Tm is, for example, a MOS (metal-oxide-semiconductor) transistor with p-type polarity.
[0051] The second terminals of each of the multiple transistors T1 to Tm included in the selective integrator XFRi are connected to the subchannel SCHi. The current signal input to the subchannel SCH is integrated by connecting the multiple transistors T1 to Tm in parallel. In other words, the selective integrator XFR constitutes a circuit equivalent to an integrator. Control signals CS1 to CSm are input to the gate terminals of each of the multiple transistors T1 to Tm included in the selective integrator XFRi. In other words, each transistor Tj in the selective integrators XFR1 to XFR9 is controlled by a common control signal CS.
[0052] The control circuit 35 can set at least one cell unit CU among those arranged in the X direction to an active or inactive state via the column selector 33. Specifically, the control circuit 35 selects at least one cell unit CU of the channel unit CHUi using control signals CS1 to CSm. In other words, the control circuit 35 selectively turns on at least one of the transistors T1 to Tm of each channel unit CHU using control signals CS1 to CSm. To put it another way, the column selector 33 is configured to selectively connect each of the multiple subchannels SCH to at least one of the multiple associated cell unit CUs.
[0053] Furthermore, the control circuit 35 sets the voltage of each subchannel SCH to, for example, 0V to a few volts. This allows the control circuit 35 to apply a reverse bias to each diode APD of the photodetector DC corresponding to at least one transistor T that is in the ON state. This reverse bias is a potential difference that can cause avalanche breakdown in the diode APD. As a result, the channel unit CHUi in the photodetector PD can output the sum of the currents generated in multiple photodetectors DC in the selected cell unit CUj to the subchannel SCHi for each measurement cycle.
[0054] Note that other switching elements may be used as elements corresponding to transistors T1 to Tm, provided that they can perform the operation described later. Also, the sensor array 32 may be equipped with an active quench circuit instead of a single quench resistor Rq. The active quench circuit performs quenching based on the control of the control circuit 35 and can quench faster than when the above-mentioned quench resistor Rq is used. In the following description, the quench resistor Rq may be replaced with an active quench circuit, and the output terminal of the quench resistor Rq may be replaced with the output terminal of the active quench circuit. The output signal of the channel unit CHU may be an analog current signal when the quench resistor Rq is used, and a digital signal when the active quench circuit is used. When the active quench circuit is used, an adder is used to sum the output signals.
[0055] Alternatively, an n-type MOS transistor may be provided instead of the diode RD and the protective resistor Rs. One of the source and drain of this n-type MOS transistor may be connected to an output node included in the corresponding output node set OUT, and the other may be connected to the ground voltage VSS or node DOUT, with a control signal CSm input to the gate terminal.
[0056] (Planar layout of sensor array 32 and column selector 33) Figure 7 is a plan view showing an example of the planar layout of the sensor array 32 and column selector 33 included in the photodetector PD of the distance measuring device 1 according to the first embodiment. The dashed grid added to Figure 7 illustrates the region of each cell unit CU. As shown in Figure 7, in the photodetector PD, the sensor array 32 has, for example, a rectangular light-receiving surface. The sensor array 32 and the column selector 33 are adjacent to each other, for example, in the X direction. The sensor array 32 and the column selector 33 are formed, for example, on the same semiconductor substrate.
[0057] In the region of the sensor array 32, when N=4, channel units CHU1 to CHU9, each extending in the X direction (row direction), are arranged in the Y direction (column direction). In the region of each channel unit CHU, multiple cell units CU1 to CUm are arranged in the X direction. In the region of each cell unit CU, photodetectors DC1 to DC3 are arranged in the Y direction. With this arrangement, each cell unit CU has a width of one photodetector DC along the X direction and a width equal to the number of photodetectors DC along the Y direction. Each channel unit CHU has a width of m cell units CU along the X direction and a width of one cell unit CU along the Y direction. The region of the sensor array 32 has a width of approximately one channel unit CHU along the X direction and a width of approximately (n+1) channel units CHU along the Y direction.
[0058] In the region of the column selector 33, the selection integrators XFR are arranged adjacent to the associated channel units CHU. Specifically, when N=4, selection integrators XFR1 to XFR9 are arranged next to channel units CHU1 to CHU9, respectively. The width along the Y direction of the region of one channel unit CHU and the width along the Y direction of the region of one selection integrator XFR are designed to be approximately equal, for example. With this arrangement, the region of the column selector 33 has a width of approximately one selection integrator XFR along the X direction and a width of approximately (n+1) selection integrators XFR along the Y direction. Note that the shape of the region of the column selector 33 differs from that of the sensor array 32 in that it is not subject to physical or optical constraints. Therefore, the circuit design in the region of the column selector 33 has a higher degree of freedom than that of the sensor array 32.
[0059] In the first embodiment, the example shown was that channel units CHU1 to CHU9 are used for the first row S1 and the second row S2 of the scan, respectively, but the embodiment is not limited to this. The photodetector PD may have a circuit similar to the sensor array 32 and column selector 33 described above, associated with each row of the scan. In this case, for example, subchannels SCH associated with multiple column selectors 33 are connected to each other. Multiple rows of scans in the measurement of the scan region SA may overlap and may not be rectangular. Typically, in a single measurement, a fixed number (e.g., multiple) of photodetectors DC are set to an active state in both the Y and X directions. The Y-direction positions of the fixed number of photodetectors DC set to an active state may be changed with each measurement.
[0060] (Circuit configuration of signal processing device 34) Figure 8 is a circuit diagram showing an example of the circuit configuration of a signal processing device 34 included in the photodetector PD of the distance measuring device 1 according to the first embodiment. As shown in Figure 8, the signal processing device 34 includes a switch unit 341 and an output unit 342. The switch unit 341 is a circuit that switches between combinations of multiple subchannels SCH. When N=4, the switch unit 341 includes multiple switches SW1 to SW5. The output unit 342 is a circuit that, for example, amplifies multiple signals input via the switch unit 341 and outputs each to multiple channels CH. When N=4, the output unit 342 includes multiple output circuits OC1 to OC4.
[0061] Each switch SW is a three-way switch and has an input terminal IT and output terminals OT1 and OT2. Each switch SW electrically connects the input terminal IT and output terminal OT1, or the input terminal IT and output terminal OT2, based on the control signal GS. The control signal GS is a signal generated by the control circuit 35. Each output circuit OC can adjust the output level of the signal input to the input terminal and output it to the channel CH connected to the output terminal. Each output circuit OC can also adjust the voltage applied to the output terminal of the diode APD by adjusting the voltage of the node NG connected to the input terminal.
[0062] The input terminal IT of switch SW1 is connected to subchannel SCH1. The output terminals OT1 and OT2 of switch SW1 are connected to the ground node GND and node NG1, respectively. Node NG1 is connected to subchannel SCH2 and to the input terminal of output circuit OC1. The output terminal of output circuit OC1 is connected to channel CH1.
[0063] The input terminal IT of switch SW2 is connected to subchannel SCH3. The output terminals OT1 and OT2 of switch SW2 are connected to nodes NG1 and NG2, respectively. Node NG2 is connected to subchannel SCH4 and the input terminal of output circuit OC2. The output terminal of output circuit OC2 is connected to channel CH2.
[0064] The input terminal IT of switch SW3 is connected to subchannel SCH5. The output terminals OT1 and OT2 of switch SW3 are connected to nodes NG2 and NG3, respectively. Node NG3 is connected to subchannel SCH6 and the input terminal of output circuit OC3. The output terminal of output circuit OC3 is connected to channel CH3.
[0065] The input terminal IT of switch SW4 is connected to subchannel SCH7. The output terminals OT1 and OT2 of switch SW4 are connected to nodes NG3 and NG4, respectively. Node NG4 is connected to subchannel SCH8 and the input terminal of output circuit OC4. The output terminal of output circuit OC4 is connected to channel CH4.
[0066] The input terminal IT of switch SW5 is connected to subchannel SCH9. The output terminals OT1 and OT2 of switch SW5 are connected to node NG4 and the ground node GND, respectively.
[0067] In other words, in the switch section 341, the switch SWk (2≦k≦N+1) has an input terminal IT connected to the subchannel SCH (2×k-1), an output terminal OT1 connected to node NG (k-1), and an output terminal OT2 connected to node NGk. In the switch section 341, the output terminal OT1 of the switch SW (e.g., switch SW1) assigned to one end and the output terminal OT2 of the switch SW (e.g., switch SW5) assigned to the other end are, for example, grounded.
[0068] Figure 9 is a circuit diagram showing an example of the circuit configuration of a switch SW in a distance measuring device 1 according to the first embodiment. As shown in Figure 9, each switch SW includes, for example, transistors TR1 and TR2. Each of transistors TR1 and TR2 is a MOS transistor having p-type polarity. The first terminal (source) of each transistor TR1 and TR2 is connected to the input terminal IT of the switch SW. The second terminal (drain) of each transistor TR1 and TR2 is connected to the output terminals OT1 and OT2 of the switch SW, respectively. A control signal GS is input to the gate terminal of transistor TR1. The inverted signal bGS of the control signal GS is input to the gate terminal of transistor TR2. That is, a signal pair (two signal lines) consisting of the control signal GS and the inverted signal bGS is supplied to the switch SW as the control signal GS. As a result, the switch SW can function as a three-way switch. Note that each of transistors TR1 and TR2 may be a MOS transistor having n-type polarity. The setting of the control signal GS input to the switch SW can be appropriately changed according to the polarity of the transistor TR of the switch SW.
[0069] <1-1-4> Configuration of the measurement unit 40 Figure 10 is a block diagram showing an example of the configuration of the measurement unit of the distance measuring device 1 according to the first embodiment. As shown in Figure 10, the measurement unit 40 includes a plurality of measurement blocks MB. Each of the measurement blocks MB1 to MB4 processes the signals input from channels CH1 to CH4. Each of the plurality of measurement blocks MB includes a signal processing circuit 41, an AD (Analog to Digital) conversion circuit 42, and a measurement circuit 43.
[0070] The signal processing circuit 41 processes the signal input to the associated channel CH, such as by amplification, and outputs the processed signal to the AD conversion circuit 42. The amplifier used in the signal processing circuit 41 is, for example, a transimpedance amplifier (TIA).
[0071] The AD conversion circuit 42 converts the analog signal input from the signal processing circuit 41 into a digital signal and inputs the converted digital signal to the measurement circuit 43. The measurement unit 40 may be equipped with a TD (Time to Digital) conversion circuit instead of the AD conversion circuit 42, or it may be equipped with both an AD conversion circuit and a TD conversion circuit.
[0072] The measurement circuit 43 measures the distance between the object TG and the distance measuring device 1 based on the digital signal input from the AD conversion circuit 42, and outputs the measurement result externally. In this example, measurement blocks MB1 to MB4 process the signals input to channels CH1 to CH4, respectively, and output the measurement results R1 to R4, respectively.
[0073] <1-2> Operation The control method of the column selector 33 and the operation of the signal processing device 34 will be described below in relation to the distance measurement operation of the distance measuring device 1 according to the first embodiment.
[0074] <1-2-1> Control method of column selector 33 Figure 11 is a plan view showing an example of a control method for the column selector 33 in the distance measurement operation of the distance measuring device 1 according to the first embodiment. Figure 11 shows an example of the state of the sensor array 32 set based on the control of the column selector 33, and for the sake of simplicity, it shows the region including the respective cell units CU1 to CU7 of the channel units CHU1 to CHU4. In Figure 11, the photodetector element DC corresponding to the selected cell unit CU is shown without hatching, and the photodetector element DC corresponding to the unselected cell unit CU is shown with thick hatching. In addition, the region on the sensor array 32 that is irradiated with reflected light L2 is shown by a region with thin hatching.
[0075] As shown in Figure 11, in this example, the column selector 33 selects cell units CU3 to CU5 according to the position where reflected light L2 is irradiated. In this case, the control circuit 35 sets each of the control signals CS3 to CS5 to the "L" level and the other control signals CS to the "H" level. The "L" level is a logic level that can turn on transistor T. The "H" level is a logic level that can turn off transistor T. As a result, in each selection integrator XFR included in the column selector 33, transistors T3 to T5 are turned on, and transistors T1, T2, T6, and T7 are turned off.
[0076] This creates a current path between the cell units CU3~CU5 of channel unit CHUi (1≦i≦n+1) and the subchannel SCHi, while blocking the current paths between other cell units CU and the subchannel SCHi. In other words, the photodetector DC (i.e., SPAD) included in the cell unit CU at the irradiation position of reflected light L2 becomes active and is set to a state where it can detect light. On the other hand, the photodetector DC included in the cell unit CU at positions where reflected light L2 is not irradiated becomes inactive, and noise components other than reflected light L2 detected by the photodetector DC other than the selected cell unit CU are eliminated. By selectively setting the active region in this way, the photodetector PD can detect reflected light L2 with a high signal-to-noise ratio and improve measurement accuracy.
[0077] <1-2-2> Operation of the signal processing device 34 In the first embodiment, the switch unit 341 of the signal processing device 34 can switch between two types of combinations of adjacent subchannels SCH. In the first embodiment, these two types of combinations are called input groups IG1 and IG2. The operation of the signal processing device 34 (switch unit 341) at the first time and second time associated with input groups IG1 and IG2, respectively, in the distance measurement operation of the distance measuring device 1 will be described in order below.
[0078] (1st time) Figure 12 is a schematic diagram showing an example of the operation of the signal processing device 34 at the first time step of the distance measuring operation of the distance measuring device 1 according to the first embodiment. Figure 12 shows the circuit configuration of the signal processing device 34 when N=4 and an overview of the control of the control circuit 35 at the first time step. As shown in Figure 12, the control circuit 35 sets the control signal GS to the "L" level at the first time step. Then, each switch SW electrically connects the input terminal IT and the output terminal OT2 based on the control signal GS.
[0079] Specifically, subchannel SCH1 is connected to node NG1. The input terminal of output circuit OC1 receives the combined output currents of subchannels SCH1 and SCH2. Subchannel SCH3 is connected to node NG2. The input terminal of output circuit OC2 receives the combined output currents of subchannels SCH3 and SCH4. Subchannel SCH5 is connected to node NG3. The input terminal of output circuit OC3 receives the combined output currents of subchannels SCH5 and SCH6. Subchannel SCH7 is connected to node NG4. The input terminal of output circuit OC4 receives the combined output currents of subchannels SCH7 and SCH8.
[0080] As described above, the signal processing device 34 of the first embodiment, at the first time step, inputs a signal to the output circuit OCk that combines the output current of subchannel SCH(2×k-1) (1≦k≦N) and the output current of subchannel SCH(2×k), corresponding to input group IG1. Then, the output circuit OCk outputs a signal to channel CHk based on the signal obtained by integrating the output current of subchannel SCH(2×k-1) and the output current of subchannel SCH(2×k), corresponding to the first time step.
[0081] (2nd time) Figure 13 is a schematic diagram showing an example of the control method of the signal processing device 34 at the second time step of the distance measuring operation of the distance measuring device 1 according to the first embodiment. Figure 13 shows the circuit configuration of the signal processing device 34 and an overview of the control of the control circuit 35 at the second time step when N=4. As shown in Figure 13, the control circuit 35 sets the control signal GS to the "H" level at the second time step. Then, each switch SW electrically connects the input terminal IT and the output terminal OT1 based on the control signal GS.
[0082] Specifically, subchannel SCH3 is connected to node NG1. The input terminal of output circuit OC1 receives the combined output currents of subchannels SCH2 and SCH3. Subchannel SCH5 is connected to node NG2. The input terminal of output circuit OC2 receives the combined output currents of subchannels SCH4 and SCH5. Subchannel SCH7 is connected to node NG3. The input terminal of output circuit OC3 receives the combined output currents of subchannels SCH6 and SCH7. Subchannel SCH9 is connected to node NG4. The input terminal of output circuit OC4 receives the combined output currents of subchannels SCH8 and SCH9.
[0083] As described above, in the first embodiment, the signal processing device 34 inputs to the output circuit OCk a signal that combines the output current of subchannel SCH(2×k) (1≦k≦N) and the output current of subchannel SCH(2×k+1) in the second time step, corresponding to input group IG1. Then, in the second time step, the output circuit OCk outputs to channel CHk a signal based on the signal obtained by integrating the output current of subchannel SCH(2×k) and the output current of subchannel SCH(2×k+1).
[0084] <1-2-3> How to output distance measurement results Figure 14 is a schematic diagram showing an example of the method for outputting distance measurement results in the distance measurement operation of the distance measuring device 1 according to the first embodiment. Figure 14 shows the information transferred from the light receiving unit 30 to the measurement unit 40, the information transferred from the measurement unit 40 to the image processing unit 50, and a part of the processing by the image processing unit 50 in the case of the number of channels N=4.
[0085] As shown in Figure 14, the light receiving unit 30 sequentially transfers to the measurement unit 40 the electrical signals of channels CH1 to CH4 generated based on the photodetection result of input group IG1, and the electrical signals of channels CH1 to CH4 generated based on the photodetection result of input group IG2, corresponding to the detection region DA described using Figure 4. In other words, for each detection region DA, the output of the light reception result corresponding to input group IG1 and the output of the light reception result corresponding to input group IG2 are performed. In this way, the light receiving unit 30 transmits (transfers) N × 2 channel information (electrical signals) to the measurement unit 40 for each detection region DA.
[0086] Next, the measurement unit 40 generates measurement results R1 to R4 corresponding to channels CH1 to CH4, respectively, based on the light reception result corresponding to input group IG1 received from the light receiving unit 30. Similarly, the measurement unit 40 generates measurement results R1 to R4 corresponding to channels CH1 to CH4, respectively, based on the light reception result corresponding to input group IG2 received from the light receiving unit 30. Then, the measurement unit 40 packets the measurement results R1 to R4 of input group IG1 and the measurement results R1 to R4 of input group IG2, respectively. The measurement unit 40 then forwards packet P1 containing the measurement results R1 to R4 of input group IG1 and packet P2 containing the measurement results R1 to R4 of input group IG2 to the image processing unit 50. In this way, in the distance measuring device 1, data transmission between the measurement unit 40 and the image processing unit 50 is performed on a channel basis (input group IG basis), not on a frame basis. In addition, in the distance measuring device 1, a pair of packets P1 and P2 is associated with each detection area DA.
[0087] Next, the image processing unit 50 rearranges the packets P1 and P2 received from the measurement unit 40 and generates multiple pixels PX associated with the detection region DA. Specifically, the image processing unit 50 inserts data so that two data corresponding to the same channel CH appear consecutively. More specifically, the image processing unit 50 inserts the measurement result R1 of packet P2 after the measurement result R1 of packet P1, the measurement result R2 of packet P1 after the measurement result R1 of packet P2, the measurement result R2 of packet P2 after the measurement result R2 of packet P1, and so on, until the measurement result R4 of packet P1 is followed by the measurement result R4 of packet P2. In other words, the image processing unit 50 arranges the measurement results of packet P1 and packet P2 alternately in the vertical direction. These alternately arranged measurement results are associated with adjacent subchannel SCH combinations shifted by one position.
[0088] The image processing unit 50 then generates multiple pixels PX based on the rearranged measurement results. In this example, the groups of measurement results R1 to R4 of the rearranged packets P1 and P2 correspond to pixels PX1 to PX8 of the corresponding detection region DA. That is, the number of pixels PX arranged in each detection region DA corresponds to the number of channels N × the number of input groups IG. For example, if the photodetector PD is composed of 40 channels (N=40), 40 × 2 = 80 pixels PX are arranged along the Q axis, corresponding to each detection region DA. Furthermore, if a rotating mirror with two reflective surfaces is used, the image mapped by the scan region SA has 80 × 2 = 160 pixels PX arranged along the Q axis.
[0089] <1-2-4> Correspondence between measurement results and pixel PX Figure 15 is a schematic diagram showing an example of the correspondence between the measurement results of the distance measurement operation of the distance measuring device 1 according to the first embodiment and the pixels PX. Figure 15 shows the centroids of the measurement positions of pixels PX corresponding to three consecutive detection regions DA1 to DA3 superimposed on the planar layout of the sensor array 32. The elliptical regions indicated by hatched lines schematically represent the regions on the sensor array 32 that are irradiated with reflected light L2.
[0090] As shown in Figure 15, the irradiation position of reflected light L2 can change over time. In this example, the irradiation position of reflected light L2 is moving in the X direction. Each of the times t1 to t6 shown in Figure 15 represents a measurement timing corresponding to the irradiation position of reflected light L2. In this example, times t1, t3, and t5, i.e., odd-numbered measurement times, are associated with input group IG1. Times t2, t4, and t6, i.e., even-numbered measurement times, are associated with input group IG2. Furthermore, times t1 and t2 are associated with detection region DA1. Times t3 and t4 are associated with detection region DA2. Times t5 and t6 are associated with detection region DA3.
[0091] The measurement position of each pixel PX is determined based on the arrangement of the cell unit CU selected at each time step. In this example, the solid grid is shown as being associated with the pixel PX corresponding to input group IG1, and the dashed grid is shown as being associated with the pixel PX corresponding to input group IG2. Specifically, the odd-numbered pixels PX generated at times t1, t3, and t5 consist of subpixels for channel unit CHU(2×k-1) (1≦k≦N) and subpixels for channel unit CHU(2×k). The even-numbered pixels PX generated at times t2, t4, and t6 consist of subpixels for channel unit CHU(2×k) (1≦k≦N) and subpixels for channel unit CHU(2×k+1).
[0092] Therefore, the centroid of the measurement position in an odd-numbered pixel PX set and the centroid of the measurement position in an even-numbered pixel PX set are shifted, for example, by one channel unit CHU (sub-pixel) in the Y direction. In other words, the centroid of the measurement position in an odd-numbered pixel PX set and the centroid of the measurement position in an even-numbered pixel PX set are shifted by half a pixel (half a pixel) in the Y direction. Each detection region DA includes the respective pixel PX of input groups IG1 and IG2 measured at positions shifted in the X direction. Note that in the example shown in Figure 15, the region corresponding to each pixel PX is shown as a square region, but it is not limited to this. The region corresponding to each pixel PX may change depending on the layout of the photodetector elements DC included in the sensor array 32 and the number and position of the selected cell units CU.
[0093] <1-2-5> Averaging process In the distance measuring device 1 according to the first embodiment, the measurement unit 40 performs an averaging process using an averaging algorithm based on reliability. In the averaging process, when the measurement unit 40 calculates the distance value of a target measurement point (pixel PX), it uses the measurement results of at least one measurement point in the vicinity of the target measurement point. The measurement unit 40 then weights the measurement results of the measurement points in the vicinity of the target based on reliability and accumulates them in the measurement result of the target measurement point. The measurement unit 40 then detects at least one peak in the signal included in the accumulated measurement results and determines the distance value of the measurement point from the detected at least one peak based on reliability information.
[0094] Figure 16 is a schematic diagram showing an example of setting the averaging range in the averaging process of the distance measuring device 1 according to the first embodiment. Figure 16 shows an example of the averaging range used in the averaging process, superimposed on a planar layout of the sensor array 32 similar to that in Figure 15. In this specification, the averaging range refers to a region that includes the measurement points of the target described above and also includes at least one measurement point around the target. In this example, the region AA1 enclosed by the dashed line shows the averaging range used for pixel PX1 of the detection region DA1. The region AA2 enclosed by the dashed line shows the averaging range used for pixel PX2 of the detection region DA1.
[0095] As shown in Figure 16, pixels PX1 and PX2 of detection region DA1 share the channel unit CHU2 as sub-pixels. The averaging range of pixel PX1 in detection region DA1 (region AA1) includes pixels PX1 and PX3 of detection regions DA1 and DA2 respectively, as well as pixels PX2 and PX4 of detection region DA1. On the other hand, the averaging range of pixel PX2 in detection region DA1 (region AA2) includes pixels PX2 and PX4 of detection regions DA1 and DA2 respectively, as well as pixels PX3 and PX5 of detection region DA2.
[0096] In Figure 16, the shift in the centroids of multiple pixels PX contained in region AA1 and multiple pixels PX contained in region AA2 is shown by dR. The Y-direction (column direction) component of dR corresponds to one channel unit CHU (sub-pixel), i.e., half the width of a pixel PX. The averaging ranges of two pixels PX that share a channel unit CHU between input groups IG1 and IG2 have a relationship in which the position is shifted by half the size of the pixel PX in the Y direction. In other words, for each pair of pixel PX that share a channel unit CHU in each detection region DA, the measurement unit 40 sets the other averaging range (region AA2) to include the pixel PX that is positioned dR away from the pixel PX contained in one averaging range (region AA1).
[0097] As described above, in the first embodiment, the measurement unit 40 switches between an averaging range for odd-numbered measurement results and an averaging range for even-numbered measurement results in a single scan. The measurement unit 40 then generates each pixel PX of input group IG1 and each pixel PX of input group IG2 using the averaging process described above. As a result, the measurement unit 40 can transfer to the image processing unit 50 measurement results corresponding to the number of pixels PX equal to the number of channels N × 2, i.e., the number of subchannels SCH used in the measurement of each input group IG before averaging, for each detection region DA.
[0098] Figure 17 is a schematic diagram illustrating the difference between the averaging process of the first embodiment and the conventional example. The difference between the averaging process of the first embodiment and the conventional example will now be explained with reference to Figure 17.
[0099] In the first embodiment, the number of cell units CU of the photodetector 32 is approximately twice that of the conventional example. On the other hand, the number of output channels in the first embodiment remains the same as that of the conventional example. Therefore, the same signal processing circuit 41 and AD conversion circuit 42, including their number, can be used in both the first embodiment and the conventional example. Since the number of channels does not change between the first embodiment and the conventional example, the first embodiment can also use the same measurement circuit and averaging circuit as the conventional example.
[0100] The averaging range in the conventional example is shown in Figure 17. Here, pixels PX1 and PX2 are output to one channel line, and pixels PX3 and PX4 are output to another channel line (there are two channel lines). The averaging range in the conventional example does not change with each measurement and is processed on a fixed set of channels. When the first averaging range is region AA1, the averaging process is performed on the two channels mentioned above. Then, when the next averaging range is region AA2, the averaging process is performed on the same two channels as in region AA1. Therefore, region AA2 includes, for example, six pixels from pixels PX1 to PX4, as shown in Figure 17. In this case, the difference in the centroids of regions AA1 and AA2 in the conventional example is approximately 0.17 pixels, which is extremely small compared to the difference in centroids (half a pixel) in the first embodiment. This means that when the averaging process of the conventional example is used, the observed position and direction of the averaging result of region AA1 and region AA2 are almost the same in the vertical direction. Therefore, the first embodiment is superior to the conventional averaging process in terms of improving vertical resolution.
[0101] On the other hand, in the first embodiment, as shown in Figure 16, in region AA2, pixel PX1 is excluded from the averaging range, and pixel PX5 is added instead. In other words, in region AA2 of the averaging process in the first embodiment, the channel signal one level lower, which was not included in the conventional example, is added to the averaging range, and the number of channels to be included increases from 2 to 3. This makes it possible to move the pixel position by dR. As a circuit, this can be realized by adding one gate (transistor) to the path through which the aforementioned channel signals are transmitted to the averaging circuit, and opening and closing the gate according to a control signal indicating either input group IG1 or IG2.
[0102] In Figure 16, the averaging range is exemplified by setting it to 2-3 pixels (i.e., 4 cell units CU) in the vertical direction and 3 pixels in the horizontal direction, but it is not limited to this. Any number of pixels can be used in both the vertical and horizontal directions. However, the number of cell units CU to be averaged must remain constant. That is, in input group IG2, the number of channels to be averaged increases by one, but the number of cell units CU used between input groups IG1 and IG2 remains constant.
[0103] <1-3> Effects of the First Embodiment According to the distance measuring device 1 of the first embodiment described above, the manufacturing cost of the distance measuring device 1 can be reduced and the distance measuring performance can be improved. The effects of the first embodiment will be described in detail below.
[0104] When the distance measuring device 1 is mounted on a vehicle, vertical resolution is particularly important as a specification required for forward monitoring. Methods to increase vertical resolution include increasing the number of scan rows and increasing the number of vertical pixels that can measure distance simultaneously (i.e., the number of pixels PX arranged vertically corresponding to one detection area DA). For example, the number of vertical pixels PX that can measure distance simultaneously can be increased by increasing the number of channel units CHU of the sensor array 32.
[0105] However, the measurement IC for processing the light reception results output from the photodetector has a circuit for measuring distance values for each channel. Increasing the number of channels increases the circuit area, so increasing the number of channels leads to an increase in the size of the measurement IC and an increase in manufacturing costs. In other words, there is a limit to how many channels the measurement IC used in distance measuring device 1 can be increased from a manufacturing cost standpoint. For this reason, considering the balance between manufacturing cost and performance, it is also difficult to increase the number of channels in the photodetector in order to increase the number of pixels in the vertical direction.
[0106] Furthermore, increasing the number of channels increases the number of wires between the photodetector and the measurement IC. There are limitations in terms of cost and technology when designing this number of wires. For this reason, it is practically impossible to implement an excessively large number of wires between the photodetector and the measurement IC.
[0107] On the other hand, increasing the number of scan rows makes it possible to increase the number of vertical pixels without increasing the number of channels in the measurement IC. For example, the number of scan rows can be increased by using a multifaceted polygon mirror. However, polygon mirrors are more difficult to improve in terms of surface accuracy and machining accuracy than rotating mirrors (double-sided mirrors), and require a larger installation area than rotating mirrors. For this reason, it is preferable to use a rotating mirror in order to realize a compact and low-cost distance measuring device 1.
[0108] Another method for increasing the number of vertical pixels is to switch between connecting even-numbered channel units (CHU) and odd-numbered channel units (CHU) to each channel. This method is also called interlacing. However, simply switching the connection of channel units (CHU) reduces the number and area of diodes (APD) used for light detection per channel. This reduces the signal-to-noise ratio (S / N ratio) of the photodetector's output current, thus degrading detection performance. In other words, this method does not utilize half of the light illuminating the photodetector (PD), making it unsuitable for long-distance distance measuring devices (1). Furthermore, this method may result in insufficient dynamic range. Insufficient dynamic range can lead to distance measurement failures and can also reduce distance measurement accuracy.
[0109] In contrast, the distance measuring device 1 according to the first embodiment includes a signal processing device 34 capable of switching the signals input to each channel CH using multiple input groups IG1 and IG2. During distance measurement, the signal processing device 34 alternately switches between input groups IG1 and IG2 to perform measurement of the light reception results. In other words, a combination of two consecutive sub-pixels is switched at each measurement timing and used to calculate the distance value of each pixel PX. The measurement unit 40 sets an averaging range that is shifted vertically by half a pixel PX (i.e., a sub-pixel) and performs averaging processing with different combinations of pixel PX between input groups IG1 and IG2. The image processing unit 50 then rearranges the measurement results of the input group IG1 and IG2 pairs to generate multiple pixel PX of the detection region DA.
[0110] As a result, the distance measuring device 1 according to the first embodiment can maintain the number and area of diode APDs used for light detection per channel, and increase the number of pixels in the vertical direction, similar to the interlaced method. In other words, the distance measuring device 1 can utilize the interlaced method, maintain the signal-to-noise ratio of the signal, and suppress a decrease in dynamic range. Since the switch section 341 of the signal processing device 34 is composed of a simple switching circuit, the increase in circuit area can be suppressed compared to when increasing the number of channels of the measurement IC (measurement section 40). Furthermore, in the distance measuring device 1 according to the first embodiment, since the averaging process explained with reference to Figure 16 is performed, for example, the effective resolution in the vertical direction can also be increased. As a result, the distance measuring device 1 according to the first embodiment can reduce the manufacturing cost of the distance measuring device 1 and improve the distance measuring performance.
[0111] The characteristics of the distance measuring device 1 according to the first embodiment will be described below using comparative examples. Figures 18, 19, and 20 are schematic diagrams showing the evaluation conditions for the first comparative example, the second comparative example, and the photodetector according to the first embodiment, respectively. Figures 18, 19, and 20 schematically show the position and size of the object TG placed relative to the planar layout of the pixels PX (cell units CU) used for distance measurement. Figures 18, 19, and 20 also show multiple pixels PX in three consecutive detection regions DA.
[0112] As shown in Figure 18, the photodetector PDx in the first comparative example includes channel units CHUx1 to CHUx3 and a plurality of pixels PX1 to PX3 corresponding to the channel units CHUx. In the first comparative example, each channel unit CHUx is associated with one channel CH. The evaluation conditions for the first comparative example are that the object TG is positioned so as to overlap with pixel PX2 in the central part of Figure 18.
[0113] As shown in Figure 19, the photodetector PDy in the second comparative example includes channel units CHUy1 to CHUy6 and a plurality of pixels PX1 to PX6 corresponding to the channel units CHUy. In the second comparative example, each channel unit CHUy is associated with one channel CH, and the vertical width of channel unit CHUy is set to half that of channel unit CHUx. The evaluation conditions for the second comparative example are that the object TG is positioned so as to overlap with pixels PX3 and PX4 in the central part of Figure 19.
[0114] As shown in Figure 20, the photodetector PD according to the first embodiment includes channel units CHU1 to CHU6 and a plurality of pixels PX1 to PX6 provided corresponding to the channel unit CHUy. In the first embodiment, the vertical width of each channel unit CHU is set to be the same as that of the channel unit CHUy in the second comparative example. In the evaluation conditions of the first embodiment, the object TG is positioned so as to overlap with pixel PX3 in the central part of Figure 20.
[0115] Figure 21 is a graph showing an example of the ranging performance of the first comparative example and the first embodiment. In the graph shown in Figure 21, the horizontal axis represents the subject size (size of the target object TG), and the vertical axis represents the minimum signal value detected by shifting the subject position. The minimum signal value is the main factor determining the LiDAR performance in the worst-case scenario, which is of most importance. Here, all minimum signal values show the results when no averaging processing has been performed.
[0116] As shown in Figure 21, in both the first comparative example and the first embodiment, the minimum signal value increases as the size of the subject increases. When the first embodiment and the first comparative example are designed with the same sensor size (size of the cell unit CU), the minimum signal value is larger in the first embodiment than in the first comparative example. Furthermore, when the vertical and horizontal pixels in the photodetector PD of the first embodiment are multiplied by 1.4 in the same area of the sensor array 32, the minimum signal values of the first embodiment and the first comparative example are approximately the same. Conversely, this means that when the pixels in the photodetector PD of the first embodiment remain unchanged (1x in both vertical and horizontal directions), and the pixels of the first comparative example are reduced to 1 / 1.4 in both vertical and horizontal directions (resulting in a resolution that is 1.4x in both vertical and horizontal directions), the minimum signal values of both will be the same.
[0117] In other words, the interlaced method of the first embodiment shows that the effective vertical resolution is improved by about 1.4 times compared to the first comparative example. In the interlaced method, one measurement result is obtained from two laser emission events, one each from input groups IG1 and IG2. For this reason, the horizontal resolution is considered to be 0.5 times in the interlaced method. In summary, the horizontal resolution becomes 0.5 times × 1.4 times ~ 1 / 1.4, and the number of pixels in the horizontal direction decreases. In contrast, the horizontal pixel count specification of LiDAR is usually more generous than the vertical pixel count specification. In other words, even when the interlaced method is used and the number of horizontal pixels decreases, LiDAR can still meet the required specifications. Therefore, the distance measuring device 1 according to the first embodiment can meet either the vertical or horizontal specifications when used in an in-vehicle application where vertical resolution is prioritized.
[0118] Figure 22 is a graph showing the evaluation results for the first comparative example, the second comparative example, and the first embodiment. In the graph shown in Figure 22, the horizontal axis represents the subject size (size of the target object TG) [mm], and the vertical axis represents the measurable distance [m]. Each evaluation result shows the measurable distance when the laser is emitted at the same frequency and the same number of averaging processes are performed. In this evaluation, since the number of laser emission times (i.e., the number of measurements) is the same, the number of measurements for the first comparative example and the second comparative example is set to twice that of the first embodiment. Taking this into account, the schematic diagram of the first comparative example corresponds to a state in which the pixels are divided in half horizontally compared to Figure 18, as shown in Figure 23. Similarly, the schematic diagram of the second comparative example corresponds to a state in which the pixels are divided in half horizontally compared to Figure 19, as shown in Figure 24. Note that the first comparative example and the first embodiment may use the exact same signal processing circuit 41 and AD conversion circuit 42, including the number of channels.
[0119] As shown in Figure 22, in all of the first comparative example, the second comparative example, and the first embodiment, the measurable distance increases as the subject size increases. Also, because the first comparative example has fewer pixels in the vertical direction than the second comparative example, the measurable distance is shorter when the subject size is 300 to 700 [mm]. The first embodiment can be said to be better than the first comparative example. On the other hand, as shown in Figure 22, the first embodiment has the same number of pixels in the vertical direction as the second comparative example and can achieve a measurable distance close to that of the second comparative example. In other words, the distance measuring device 1 according to the first embodiment can achieve performance close to that of doubling the number of channels by apparent doubling the number of vertical pixels and improving the effective resolution by 1.4 times.
[0120] <2> Second Embodiment The distance measuring device 1 according to the second embodiment includes a photodetector PDa in which three consecutive subchannels SCH are associated with each channel CH, and the combination of these three subchannels SCH can be switched. Details of the distance measuring device 1 according to the second embodiment will be described below.
[0121] <2-1> Composition <2-1-1> Configuration of the photodetector PDa Figure 25 is a block diagram showing an example of the configuration of the photodetector PDa included in the distance measuring device 1 according to the second embodiment. As shown in Figure 25, the photodetector PDa includes a sensor array 32a, a column selector 33a, and a signal processing device 34a. The sensor array 32a includes a plurality of channel units (groups) CHU1 to CHU(n+2) (where n is an integer of 3 or more). The column selector 33a includes a plurality of selection integrators XFR1 to XFR(n+2).
[0122] Multiple channel units CHU1 to CHU(n+2) of the sensor array 32a are each connected to multiple selection integrators XFR1 to XFR(n+2) via output node sets OUT1 to OUT(n+2). Multiple selection integrators XFR1 to XFR(n+2) of the column selector 33a are each connected to the signal processing device 34a via subchannels SCH1 to SCH(n+2). As a result, each selection integrator XFR in the second embodiment can transfer the electrical signal output from the active SPAD contained in the associated channel unit CHU to the signal processing device 34a.
[0123] The signal processing device 34a integrates the signals of three consecutive subchannels SCH and outputs them to the corresponding channel CH. In the second embodiment, electrical signals transferred from three adjacent subpixels (channel units CHU) are used to generate distance data corresponding to one pixel PX. Details of the signal processing device 34a will be described later.
[0124] In the photodetector PDa according to the second embodiment, the number of channel units CHU and the number of selection integrators XFR are designed based on the number of channels N. In the second embodiment, N = n / 3. Specifically, when the number of channels N = 80 (i.e., the photodetector PD has 80 channels of output), the column selector 33a and the signal processing device 34a are connected by 242 subchannels SCH.
[0125] In the following explanation, for the sake of brevity, we will describe the case where N=4, i.e., n=12, and the photodetector PD comprises 4 channels CH1~CH4, 14 subchannels SCH1~SCH14, 14 selection integrators XFR1~XFR14, 14 output node sets OUT1~OUT14, and 14 channel units CHU1~CHU14.
[0126] <2-1-2> Circuit configuration of signal processing device 34a Figure 26 is a circuit diagram showing an example of the circuit configuration of a signal processing device 34a included in the photodetector PDa of the distance measuring device 1 according to the second embodiment. As shown in Figure 8, the signal processing device 34a includes a switch unit 341a and an output unit 342. The switch unit 341a is a circuit that switches between combinations of multiple subchannels SCH. When N=4, the switch unit 341a includes multiple switches SWa1~SWa5 and multiple switches SWb1~SWb5. The output unit 342 is a circuit that, for example, amplifies multiple signals input via the switch unit 341 and outputs each to multiple channels CH. When L=4, the output unit 342 includes multiple output circuits OC1~OC4.
[0127] Switches SWa and SWb are three-way switches, each having an input terminal IT and output terminals OT1 and OT2. Each switch SWa electrically connects the input terminal IT and output terminal OT1, or the input terminal IT and output terminal OT2, based on the control signal GSa. Each switch SWb electrically connects the input terminal IT and output terminal OT1, or the input terminal IT and output terminal OT2, based on the control signal GSb. Control signals GSa and GSb are signals generated by the control circuit 35.
[0128] The input terminal IT of switch SWa1 is connected to subchannel SCH1. The output terminals OT1 and OT2 of switch SWa1 are connected to the ground node GND and node NGa1, respectively. The input terminal IT of switch SWb1 is connected to subchannel SCH2. The output terminals OT1 and OT2 of switch SWb1 are connected to the ground node GND and node NGb1, respectively. Nodes NGa1 and NGb1 (hereinafter also referred to as node NG1) are connected to subchannel SCH3 and to the input terminal of output circuit OC1.
[0129] The input terminal IT of switch SWa2 is connected to subchannel SCH4. The output terminals OT1 and OT2 of switch SWa2 are connected to nodes NGa1 and NGa2, respectively. The input terminal IT of switch SWb2 is connected to subchannel SCH5. The output terminals OT1 and OT2 of switch SWb2 are connected to nodes NGb1 and NGb2, respectively. Nodes NGa2 and NGb2 (hereinafter also referred to as node NG2) are connected to subchannel SCH6 and to the input terminal of output circuit OC2.
[0130] The input terminal IT of switch SWa3 is connected to subchannel SCH7. The output terminals OT1 and OT2 of switch SWa3 are connected to nodes NGa2 and NGa3, respectively. The input terminal IT of switch SWb3 is connected to subchannel SCH8. The output terminals OT1 and OT2 of switch SWb3 are connected to nodes NGb2 and NGb3, respectively. Nodes NGa3 and NGb3 (hereinafter also referred to as node NG3) are connected to subchannel SCH9 and to the input terminal of output circuit OC3.
[0131] The input terminal IT of switch SWa4 is connected to subchannel SCH10. The output terminals OT1 and OT2 of switch SWa4 are connected to nodes NGa3 and NGa4, respectively. The input terminal IT of switch SWb4 is connected to subchannel SCH11. The output terminals OT1 and OT2 of switch SWb4 are connected to nodes NGb3 and NGb4, respectively. Nodes NGa4 and NGb4 (hereinafter also referred to as node NG4) are connected to subchannel SCH12 and to the input terminal of output circuit OC4.
[0132] The input terminal IT of switch SWa5 is connected to subchannel SCH13. The output terminals OT1 and OT2 of switch SWa5 are connected to node NGa4 and the ground node GND, respectively. The input terminal IT of switch SWb5 is connected to subchannel SCH14. The output terminals OT1 and OT2 of switch SWb5 are connected to node NGb4 and the ground node GND, respectively.
[0133] In other words, in the switch section 341a, switch SWak' (2≦k'≦N+1) has an input terminal IT connected to subchannel SCH (3×k'-2), an output terminal OT1 connected to node NG (k'-1), and an output terminal OT2 connected to node NGk'. In the switch section 341a, switch SWbk' has an input terminal IT connected to subchannel SCH (3×k'-1), an output terminal OT1 connected to node NG (k'-1), and an output terminal OT2 connected to node NGk'. In the switch section 341a, the output terminals OT1 of switches SWa and SWb (switches SWa1 and SWb1) assigned to one end and the output terminals OT2 of switches SWa and SWb (for example, switches SWa5 and SWb5) assigned to the other end are, for example, grounded.
[0134] Other configurations of the distance measuring device 1 according to the second embodiment are the same as those of the first embodiment.
[0135] <2-2> Operation of signal processing device 34a In the second embodiment, the switch unit 341a of the signal processing device 34a forms three types of combinations of adjacent subchannels SCH. In the second embodiment, these three types of combinations are called input groups IG1 to IG3, respectively. The operation of the signal processing device 34a (switch unit 341a) at the first to third time points associated with input groups IG1 to IG3 in the distance measurement operation of the distance measuring device 1 will be described in order below.
[0136] (1st time) Figure 27 is a schematic diagram showing an example of the operation of the signal processing device at the first time step of the distance measurement operation of the distance measuring device according to the second embodiment. Figure 27 shows the circuit configuration of the signal processing device 34a when N=4 and an overview of the control of the control circuit 35 at the first time step. As shown in Figure 27, the control circuit 35 of the second embodiment sets the control signals GSa and GSb to the "L" level at the first time step. Then, each switch SWa connects the input terminal IT and the output terminal OT2 based on the control signal GSa. Similarly, each switch SWb connects the input terminal IT and the output terminal OT2 based on the control signal GSb.
[0137] Specifically, subchannels SCH1 and SCH2 are connected to node NG1 (NGa1 and NGb1). The input terminal of output circuit OC1 receives the integrated output currents of subchannels SCH1 to SCH3. Subchannels SCH4 and SCH5 are connected to node NG2 (NGa2 and NGb2). The input terminal of output circuit OC2 receives the integrated output currents of subchannels SCH4 to SCH6. Subchannels SCH7 and SCH8 are connected to node NG3 (NGa3 and NGb3). The input terminal of output circuit OC3 receives the integrated output currents of subchannels SCH7 to SCH9. Subchannels SCH10 and SCH11 are connected to node NG4 (NGa4 and NGb4). The input terminal of output circuit OC4 receives the integrated output currents of subchannels SCH10 to SCH12.
[0138] In the first time step of the second embodiment, switch SWa5 connects subchannel SCH13 and the ground node GND, and switch SWb5 connects subchannel SCH14 and the ground node GND. Therefore, channel unit CHU13 corresponding to subchannel SCH13 and channel unit CHU14 corresponding to subchannel SCH14 are not used for light detection at the first time step.
[0139] As described above, in the first time step, the signal processing device 34a of the second embodiment inputs a signal to the output circuit OCk that combines the output current of subchannel SCH(3×k-2) (1≦k≦N), the output current of subchannel SCH(3×k-1), and the output current of subchannel SCH(3×k), corresponding to the input group IG1. Then, in the first time step, the output circuit OCk outputs a signal to channel CHk based on the signal obtained by integrating the output current of subchannel SCH(3×k-2), the output current of subchannel SCH(3×k-1), and the output current of subchannel SCH(3×k).
[0140] (2nd time) Figure 28 is a schematic diagram showing an example of the operation of the signal processing device at the second time step of the distance measuring operation of the distance measuring device according to the second embodiment. Figure 28 shows the circuit configuration of the signal processing device 34a when N=4 and an overview of the control of the control circuit 35 at the first time step. As shown in Figure 28, the control circuit 35 of the second embodiment sets the control signal GSa to the "H" level and the control signal GSb to the "L" level at the second time step. Then, each switch SWa connects the input terminal IT and the output terminal OT1 based on the control signal GSa. Also, each switch SWb connects the input terminal IT and the output terminal OT2 based on the control signal GSb.
[0141] Specifically, subchannels SCH2 and SCH4 are connected to node NG1 (NGa1 and NGb1). The input terminal of output circuit OC1 receives the integrated output currents of subchannels SCH2 to SCH4. Subchannels SCH5 and SCH7 are connected to node NG2 (NGa2 and NGb2). The input terminal of output circuit OC2 receives the integrated output currents of subchannels SCH5 to SCH7. Subchannels SCH8 and SCH10 are connected to node NG3 (NGa3 and NGb3). The input terminal of output circuit OC3 receives the integrated output currents of subchannels SCH8 to SCH10. Subchannels SCH11 and SCH13 are connected to node NG4 (NGa4 and NGb4). The input terminal of output circuit OC4 receives the integrated output currents of subchannels SCH11 to SCH13.
[0142] In the second time step of the second embodiment, switch SWa1 connects subchannel SCH1 and ground node GND, and switch SWb5 connects subchannel SCH14 and ground node GND. Therefore, channel unit CHU1 corresponding to subchannel SCH1 and channel unit CHU14 corresponding to subchannel SCH14 are not used for light detection in the second time step.
[0143] As described above, in the second embodiment, the signal processing device 34a inputs to the output circuit OCk a signal that combines the output current of subchannel SCH(3×k-1) (1≦k≦N), the output current of subchannel SCH(3×k), and the output current of subchannel SCH(3×k+1), corresponding to the input group IG2, at the second time step. Then, in the second time step, the output circuit OCk outputs to channel CHk a signal based on the signal obtained by integrating the output current of subchannel SCH(3×k-1), the output current of subchannel SCH(3×k), and the output current of subchannel SCH(3×k+1).
[0144] (3rd time) Figure 29 is a schematic diagram showing an example of the operation of the signal processing device at the third time step of the distance measurement operation of the distance measuring device according to the second embodiment. Figure 29 shows the circuit configuration of the signal processing device 34a when N=4 and an overview of the control of the control circuit 35 at the third time step. As shown in Figure 29, the control circuit 35 of the third embodiment sets the control signals GSa and GSb to the "H" level at the third time step. Then, each switch SWa connects the input terminal IT and the output terminal OT1 based on the control signal GSa. Similarly, each switch SWb connects the input terminal IT and the output terminal OT1 based on the control signal GSb.
[0145] Specifically, subchannels SCH4 and SCH5 are connected to node NG1 (NGa1 and NGb1). The input terminal of output circuit OC1 receives the integrated output currents of subchannels SCH3 to SCH5. Subchannels SCH7 and SCH8 are connected to node NG2 (NGa2 and NGb2). The input terminal of output circuit OC2 receives the integrated output currents of subchannels SCH6 to SCH8. Subchannels SCH10 and SCH11 are connected to node NG3 (NGa3 and NGb3). The input terminal of output circuit OC3 receives the integrated output currents of subchannels SCH9 to SCH11. Subchannels SCH13 and SCH14 are connected to node NG4 (NGa4 and NGb4). The input terminal of output circuit OC4 receives the integrated output currents of subchannels SCH12 to SCH14.
[0146] In the third time step of the second embodiment, switch SWa1 connects subchannel SCH1 and the ground node GND, and switch SWb1 connects subchannel SCH2 and the ground node GND. Therefore, channel unit CHU1 corresponding to subchannel SCH1 and channel unit CHU2 corresponding to subchannel SCH2 are not used for light detection in the third time step.
[0147] As described above, in the third time step, the signal processing device 34a of the second embodiment inputs a signal to the output circuit OCk that combines the output currents of subchannel SCH(3×k) (1≦k≦N), subchannel SCH(3×k+1), and subchannel SCH(3×k+2), corresponding to the input group IG3. Then, in the third time step, the output circuit OCk outputs a signal to channel CHk based on the signal obtained by integrating the output currents of subchannel SCH(3×k), subchannel SCH(3×k+1), and subchannel SCH(3×k+2).
[0148] <2-3> How to output distance measurement results Figure 30 is a schematic diagram showing an example of an output method for distance measurement results in the distance measurement operation of the distance measuring device 1 according to the second embodiment. Figure 30 shows the information transferred from the light receiving unit 30a having a photodetector PDa to the measurement unit 40, the information transferred from the measurement unit 40 to the image processing unit 50, and a part of the processing by the image processing unit 50, in the case where the number of channels N=4.
[0149] As shown in Figure 30, the light receiving unit 30a sequentially transfers to the measurement unit 40 the electrical signals of channels CH1 to CH4 generated based on the photodetection result of input group IG1, the electrical signals of channels CH1 to CH4 generated based on the photodetection result of input group IG2, and the electrical signals of channels CH1 to CH4 generated based on the photodetection result of input group IG3, corresponding to the detection region DA described using Figure 4. In other words, for each detection region DA, the output of the light reception result corresponding to input group IG1, the output of the light reception result corresponding to input group IG2, and the output of the light reception result corresponding to input group IG3 are performed. In this way, the light receiving unit 30a transmits (transfers) N × 3 channel information (electrical signals) to the measurement unit 40 for each detection region DA.
[0150] Next, the measurement unit 40 generates measurement results R1 to R4 corresponding to channels CH1 to CH4, respectively, based on the light reception result corresponding to input group IG1 received from the light receiving unit 30a. Similarly, the measurement unit 40 generates measurement results R1 to R4 corresponding to channels CH1 to CH4, respectively, based on the light reception result corresponding to input group IG2 received from the light receiving unit 30. The measurement unit 40 generates measurement results R1 to R4 corresponding to channels CH1 to CH4, respectively, based on the light reception result corresponding to input group IG3 received from the light receiving unit 30. Then, the measurement unit 40 packets the measurement results R1 to R4 of input group IG1, the measurement results R1 to R4 of input group IG2, and the measurement results R1 to R4 of input group IG3, respectively. The measurement unit 40 then forwards packet P1 containing the measurement results R1 to R4 of input group IG1, packet P2 containing the measurement results R1 to R4 of input group IG2, and packet P3 containing the measurement results R1 to R4 of input group IG3 to the image processing unit 50. In the distance measuring device 1 of the second embodiment, a set of packets P1 to P3 is associated with each detection area DA.
[0151] Next, the image processing unit 50 rearranges the set of packets P1 to P3 received from the measurement unit 40 and generates multiple pixels PX associated with the detection region DA. Specifically, the image processing unit 50 inserts data such that three data corresponding to the same channel CH appear consecutively. More specifically, the image processing unit 50 inserts the measurement result R1 of packet P2 after the measurement result R1 of packet P1, the measurement result R1 of packet P3 after the measurement result R1 of packet P2, the measurement result R2 of packet P1 after the measurement result R1 of packet P3, and so on, until it inserts the measurement result R4 of packet P3 after the measurement result R4 of packet P2. In other words, the image processing unit 50 rearranges the measurement results of packet P1, packet P2, and packet P3 so that the measurement results of packets P1 to P3 appear in order. These rearranged measurement results are associated with adjacent subchannel SCH combinations shifted by one position.
[0152] The image processing unit 50 of the second embodiment generates multiple pixels PX based on the rearranged measurement results. In this example, each group of measurement results R1 to R4 of the rearranged packets P1 to P3 corresponds to pixels PX1 to PX12 of the corresponding detection region DA. That is, the number of pixels PX arranged in each detection region DA corresponds to the number of channels N × the number of input groups IG. For example, in the second embodiment, if the photodetector PD is configured with 40 channels (N=40), 40 × 3 = 120 pixels PX are arranged along the Q axis, corresponding to each detection region DA. Furthermore, if a rotating mirror with two reflective surfaces is used, the image mapped by the scan region SA has 120 × 2 = 240 pixels PX arranged along the Q axis.
[0153] Other operations of the distance measuring device 1 according to the second embodiment are the same as those of the first embodiment.
[0154] <2-4> Effects of the second embodiment The distance measuring device 1 according to the second embodiment can improve the number of vertical pixels by an apparent threefold increase. Furthermore, by utilizing the same averaging process as in the first embodiment, the distance measuring device 1 according to the second embodiment can improve the effective resolution without increasing the number of channels. Therefore, the distance measuring device 1 according to the second embodiment can reduce the manufacturing cost of the distance measuring device 1 while improving its performance.
[0155] <3> Third Embodiment The distance measuring device 1 according to the third embodiment includes a photodetector PDb having a signal processing device 34 that integrates the functions of a switch unit 341 and a column selector 33. Details of the distance measuring device 1 according to the third embodiment will be described below.
[0156] <3-1> Composition <3-1-1> Configuration of the photodetector PDb Figure 23 is a block diagram showing an example of the configuration of the photodetector PDb in the distance measuring device 1 according to the third embodiment. As shown in Figure 23, the photodetector PDb includes a sensor array 32b and a signal processing device 34b. The sensor array 32b includes a plurality of channel units (groups) CHU1 to CHU(n+1) (where n is an integer of 2 or more).
[0157] Multiple channel units CHU1 to CHU(n+1) of the sensor array 32b are connected to the signal processing unit 34b via output node sets OUT1 to OUT(n+1). The signal processing unit 34b has the same functions as the column selector 33 and signal processing unit 34 set described in the first embodiment. That is, the signal processing unit 34b selectively activates multiple SPADs contained in each channel unit CHU based on the control of the control circuit 35. The signal processing unit 34a then integrates the signals output from the active output nodes of the three consecutive output node sets OUT and outputs them to the corresponding channel CH. In the third embodiment, as in the first embodiment, electrical signals transferred from two adjacent subpixels (channel units CHU) are used to generate distance data corresponding to one pixel PX. Details of the signal processing unit 34b will be described later.
[0158] In the photodetector PDb according to the third embodiment, the number of channel units CHU is designed based on the number of channels N. In the third embodiment, as in the first embodiment, N = n / 2. For the sake of brevity, the following description will focus on the case where N = 4, i.e., n = 8, and the photodetector PD comprises 4 channels CH1 to CH4, 9 subchannels SCH1 to SCH9, 9 output node sets OUT1 to OUT9, and 9 channel units CHU1 to CHU9.
[0159] <3-1-2> Circuit configuration of signal processing device 34b Figure 32 is a circuit diagram showing an example of the circuit configuration of a signal processing device 34b included in the photodetector PDb of the distance measuring device 1 according to the third embodiment. As shown in Figure 32, the signal processing device 34b includes a switch unit 341b and an output unit 342. The switch unit 341b is a circuit that switches combinations of multiple output node sets OUT. When N=4, the switch unit 341b includes multiple selection integrators XFRa1 to XFRa5, multiple selection integrators XFRb1 to XFRb5, multiple selection integrators XFRc1 to XFRc4, logical AND circuit sets A1 and A2, and logical NOT circuit NC. When N=4, the output unit 342 includes multiple output circuits OC1 to OC4.
[0160] The functions and configurations of the selective integrators XFRa, XFRb, and XFRc are the same as those of the selective integrator XFR described in the first embodiment. The functions and configurations of the output circuit OC are the same as those of the output circuit OC described in the first embodiment. In the following description, the connection between the output node set OUTi (1≦i≦(n+1)) and the input terminal of the selective integrator XFR corresponds to the connection between the output nodes of the multiple cell units CU1~CUm included in the channel unit CHUi and the first terminals of the multiple transistors T1~Tm included in the selective integrator XFR. The connection between the output terminal of the selective integrator XFR and a predetermined node corresponds to the connection between the second terminals of the multiple transistors T1~Tm included in the selective integrator XFR and the predetermined node.
[0161] The input and output terminals of selective integrator XFRa1 are connected to output node set OUT1 and ground node GND, respectively. The input and output terminals of selective integrator XFRb1 are connected to output node set OUT1 and node NGb1, respectively. The input and output terminals of selective integrator XFRc1 are connected to output node set OUT2 and node NGa1, respectively. Nodes NGa1 and NGb1 are connected to the input terminals of output circuit OC1. The output terminal of output circuit OC1 is connected to channel CH1.
[0162] The input and output terminals of selective integrator XFRa2 are connected to output node set OUT3 and node NGa1, respectively. The input and output terminals of selective integrator XFRb2 are connected to output node set OUT3 and node NGb2, respectively. The input and output terminals of selective integrator XFRc2 are connected to output node set OUT4 and node NGa2, respectively. Nodes NGa2 and NGb2 are connected to the input terminals of output circuit OC2. The output terminal of output circuit OC2 is connected to channel CH2.
[0163] The input and output terminals of selective integrator XFRa3 are connected to output node set OUT5 and node NGa2, respectively. The input and output terminals of selective integrator XFRb3 are connected to output node set OUT5 and node NGb3, respectively. The input and output terminals of selective integrator XFRc3 are connected to output node set OUT6 and node NGa3, respectively. Nodes NGa3 and NGb3 are connected to the input terminals of output circuit OC3. The output terminal of output circuit OC3 is connected to channel CH3.
[0164] The input and output terminals of selective integrator XFRa4 are connected to output node set OUT7 and node NGa3, respectively. The input and output terminals of selective integrator XFRb4 are connected to output node set OUT7 and node NGb4, respectively. The input and output terminals of selective integrator XFRc4 are connected to output node set OUT8 and node NGa4, respectively. Nodes NGa4 and NGb4 are connected to the input terminals of output circuit OC4. The output terminal of output circuit OC4 is connected to channel CH4.
[0165] The input and output terminals of the selective integrator XFRa5 are connected to output node set OUT9 and node NGa4, respectively. The input and output terminals of the selective integrator XFRb5 are connected to output node set OUT9 and ground node GND, respectively.
[0166] Each transistor T1 to Tm of the selective integrators XFRa1 to XFRa5 is controlled based on the output signal of the AND circuit set A1. Specifically, the AND circuit set A1 contains m AND gates, the output terminals of which are connected to the gate terminals of each transistor T1 to Tm of each selective integrator XFRa. The first input terminals of each of the m AND gates in the AND circuit set A1 are input to the control signals CS1 to CSm, respectively. The second input terminals of each of the m AND gates in the AND circuit set A1 are input to the control signal GS.
[0167] Each transistor T1 to Tm of the selective integrators XFRb1 to XFRb5 is controlled based on the output signal of the AND circuit set A2. Specifically, the AND circuit set A2 includes m AND circuits, the output terminals of which are connected to the gate terminals of each transistor T1 to Tm of each selective integrator XFRb. The first input terminals of each of the m AND circuits in the AND circuit set A2 are input to the control signals CS1 to CSm, respectively. The second input terminals of each of the m AND circuits in the AND circuit set A2 are input to the inverted signal of the control signal GS. The inverted signal of the control signal GS is generated when the control signal GS is output through the logic negation circuit NC.
[0168] Each of the select integrators XFRc1 to XFRc4 transistors T1 to Tm is controlled based on the control signal CS. Specifically, the control signals CS1 to CSm are input to the gate terminals of each of the transistors T1 to Tm of each select integrator XFRc, similar to the first embodiment.
[0169] As described above, the switch unit 341b includes (N+1) selection integrators XFRa, (N+1) selection integrators XFRb, and N selection integrators XFRc. In the switch unit 341b, the input terminals of the selection integrators XFRak and XFRbk (where k is an integer greater than or equal to 2) are connected to the output node set OUT(2×k-1). The output terminal of the selection integrator XFRak is connected to node NGa(k-1). The output terminal of the selection integrator XFRbk is connected to node NGbk. The input terminal of the selection integrator XFRck is connected to the output node set OUT(2×k). The output terminal of the selection integrator XFRck is connected to node NGak. In the switch section 341b, the output terminal of the selective integrator XFRa (selective integrator XFRa1) assigned to one end and the output terminal of the selective integrator XFRb (for example, selective integrator XFRb5) assigned to the other end are, for example, grounded.
[0170] Other configurations of the distance measuring device 1 according to the third embodiment are the same as those of the first embodiment.
[0171] <3-2> Operation of signal processing device 34b In the third embodiment, the switch unit 341b of the signal processing device 34b forms two types of combinations of adjacent subchannels SCH. In the third embodiment, these two types of combinations are called input groups IG1 and IG2. The operation of the signal processing device 34b (switch unit 341b) at the first time and second time associated with input groups IG1 and IG2, respectively, in the distance measurement operation of the distance measuring device 1 will be described in order below.
[0172] (1st time) Figure 33 is a schematic diagram showing an example of the operation of the signal processing device 34b at the first time step of the distance measurement operation of the distance measuring device according to the third embodiment. Figure 33 shows the circuit configuration of the signal processing device 34b when N=4 and an overview of the control of the control circuit 35 at the first time step. As shown in Figure 33, the control circuit 35 of the third embodiment sets the control signal GS to the "L" level at the first time step. In this case, each AND circuit in the AND circuit set A1 is set to a non-selected state that outputs an "L" level signal based on the "L" level control signal GS. On the other hand, each AND circuit in the AND circuit set A2 is set to a selected state that outputs an "H" level signal when the control signal CS is at the "H" level and outputs an "L" level signal when the control signal CS is at the "L" level, based on the "H" level signal generated when the control signal GS is inverted by the NOT circuit NC.
[0173] Specifically, output node set OUT1 is connected to node NGb1, and output node set OUT2 is connected to node NGa1. The input terminal of output circuit OC1 is input after the sum of the output currents of subchannels SCH1 and SCH2. Output node set OUT3 is connected to node NGb2, and output node set OUT4 is connected to node NGa2. The input terminal of output circuit OC2 is input after the sum of the output currents of subchannels SCH3 and SCH4. Output node set OUT5 is connected to node NGb3, and output node set OUT6 is connected to node NGa3. The input terminal of output circuit OC3 is input after the sum of the output currents of subchannels SCH5 and SCH6. Output node set OUT7 is connected to node NGb4, and output node set OUT8 is connected to node NGa4. The output currents of sub-channels SCH7 and SCH8 are integrated and input to the input terminal of output circuit OC4.
[0174] In the third embodiment, at the first time step, the selection integrator XFRa1 connects the output node set OUT1 and the ground node GND. Therefore, the channel unit CHU1 corresponding to the output node set OUT1 is not used for light detection at the first time step.
[0175] As described above, the signal processing device 34a of the third embodiment, at the first time step, inputs a signal to the output circuit OCk that combines the output current of the output node set OUT(2×k-1)(1≦k≦N) and the output current of the output node set OUT(2×k), corresponding to the input group IG1. Then, the output circuit OCk outputs a signal to channel CHk based on the signal obtained by integrating the output current of the output node set OUT(2×k-1) and the output current of the output node set OUT(2×k), corresponding to the first time step.
[0176] (2nd time) Figure 34 is a schematic diagram showing an example of the operation of the signal processing device 34b at the second time step of the distance measurement operation of the distance measuring device according to the third embodiment. Figure 34 shows the circuit configuration of the signal processing device 34b when N=4 and an overview of the control of the control circuit 35 at the second time step. As shown in Figure 34, the control circuit 35 of the third embodiment sets the control signal GS to the "H" level at the second time step. In this case, each AND circuit in the AND circuit set A1 is set to a selected state that outputs an "H" level signal when the control signal CS is at the "H" level, and outputs an "L" level signal when the control signal CS is at the "L" level, based on the "H" level control signal GS. On the other hand, each AND circuit in the AND circuit set A2 is set to a non-selected state that outputs an "L" level signal based on the "L" level signal generated when the control signal GS is inverted by the NOT circuit NC.
[0177] Specifically, output node set OUT2 is connected to node NGa1, and output node set OUT3 is connected to node NGa1. The input terminal of output circuit OC1 is input after the sum of the output currents of subchannels SCH1 and SCH2. Output node set OUT4 is connected to node NGa2, and output node set OUT5 is connected to node NGa2. The input terminal of output circuit OC2 is input after the sum of the output currents of subchannels SCH4 and SCH5. Output node set OUT6 is connected to node NGa3, and output node set OUT7 is connected to node NGa3. The input terminal of output circuit OC3 is input after the sum of the output currents of subchannels SCH5 and SCH6. Output node set OUT8 is connected to node NGa4, and output node set OUT9 is connected to node NGa4. The output currents of sub-channels SCH8 and SCH9 are integrated and input to the input terminal of output circuit OC4.
[0178] In the third embodiment, at the second time step, the selection integrator XFRb5 connects the output node set OUT1 and the ground node GND. Therefore, the channel unit CHU9, which corresponds to the output node set OUT9, is not used for light detection at the second time step.
[0179] As described above, in the third embodiment, the signal processing device 34a inputs to the output circuit OCk, at the second time step, a signal that combines the output current of output node set OUT(2×k)(1≦k≦N) and the output current of output node set OUT(2×k+1), corresponding to input group IG2. Then, in the first time step, the output circuit OCk outputs to channel CHk a signal based on the signal obtained by integrating the output current of output node set OUT(2×k) and the output current of output node set OUT(2×k+1).
[0180] Other operations of the distance measuring device 1 according to the third embodiment are the same as those of the first embodiment.
[0181] <3-3> Effects of the Third Embodiment The distance measuring device 1 according to the third embodiment has the same effects as the first embodiment. Furthermore, by integrating the functions of the column selector 33 and the switch unit 341, the distance measuring device 1 according to the third embodiment can reduce the number of switches through which the signal output to channel CH passes compared to the first embodiment. As a result, the distance measuring device 1 according to the third embodiment can suppress the degradation of the characteristics of the signal output to channel CH more effectively than the first embodiment, thereby improving the distance measurement accuracy.
[0182] In the third embodiment, the case in which the signal processing device 34 functions as a column selector 33 was described, but the invention is not limited to this. In the distance measuring device 1 according to the third embodiment, the column selector 33 may be considered to function as a switch unit 341 of the signal processing device 34.
[0183] <4> Modifications, etc. The signal processing device of this embodiment processes multiple signals that are intermittently input. The signal processing device includes multiple input terminals (SCH), first to nth output terminals (CH), and a control circuit. Each of the multiple input terminals is configured to accept multiple signals. Each of the first to nth output terminals (N is an integer greater than or equal to 2) is associated with a first to nth group, each containing M consecutive input terminals (M is an integer greater than or equal to 2). The control circuit outputs a signal to the kth output terminal that is the sum of the multiple signals input to each of the M consecutive input terminals of the kth group (k is an integer greater than or equal to 1 or greater than or equal to N), and switches the combination of input terminals assigned as M input terminals so that they are different at each of the first to Mth time points. Furthermore, when the measurement unit 40 calculates the distance value of the target measurement point at the first time step, it uses the measurement results of multiple measurement points included in the first range (AA1) that includes the measurement point, and when calculating the distance value of the target measurement point at the second time step, it uses the measurement results of multiple measurement points included in the second range (AA2) that is shifted vertically by at least half a pixel from the first range (AA1). In addition, the measurement unit 40 accumulates the measurement results of each of the multiple measurement points included in the first range, detects at least one peak of the signal included in the accumulated measurement results, and determines the distance value of the target measurement point from the detected at least one peak based on the confidence information. The measurement unit 40 also transmits a first packet (P1) containing data of multiple distance values corresponding to the first time step and a second packet (P2) containing data of multiple distance values corresponding to the second time step to the image processing circuit (image processing unit 50). The image processing circuit then rearranges the data included in the first packet P1 and the data included in the second packet P2 so that the data output from the same output terminal (channel CH) is continuous. As a result, the image processing circuit generates N × M pixels based on data of multiple distance values corresponding to the first to Mth time points.
[0184] Each embodiment described above can be modified in various ways. In the first and second embodiments, examples were given for cases where there are two and three types of subchannel SCH combinations in the input group IG, respectively, but the embodiment is not limited thereto. For example, there may be four or more types of subchannel SCH combinations in the input group IG, and the signal processing device 34 may be configured to switch between four types of subchannel SCH combinations in the input group IG. In the third embodiment, examples were given for cases where there are two types of output node set OUT combinations in the input group IG, but the embodiment is not limited thereto. For example, there may be three or more types of output node set OUT combinations in the input group IG, and the signal processing device 34 may be configured to switch between three types of output node set OUT combinations in the input group IG.
[0185] The configuration described in the above embodiment may be rephrased as follows. In the distance measuring device 1 according to the above embodiment, the pixels PX are divided vertically into n' (n' is an integer of 2 or more), and the n' consecutive outputs are accumulated each time a measurement is taken. For example, in the case of a 2-way division, the output of an even-numbered subchannel SCH is switched and accumulated with the output of an adjacent subchannel SCH. In other words, the distance measuring device 1 has a configuration that alternately executes a process of accumulating one of the two even-numbered subchannel SCH outputs and a process of accumulating the other of the outputs of the subchannel SCH between two adjacent even-numbered subchannel SCHs. As a result, the distance measuring device 1 is designed so that the number of channels CH connecting the photodetector PD and the measurement unit 40 (measurement IC) is less than the number of subchannel SCH, while still being able to output the same number of vertical pixels as the number of subchannel SCH used in one measurement.
[0186] In the above embodiment, a double-sided mirror was used as the mirror 25 as an example to reduce manufacturing costs, but the invention is not limited to this. If distance measurement accuracy is more important than manufacturing costs, other mirrors such as polygon mirrors may be used as the mirror 25.
[0187] In the above embodiment, the example was given in which the signal processing device 34 is equipped with an output unit 342 (output circuit OC, i.e., an amplification circuit), but it is not limited to this. When the output of the subchannel SCH is large (i.e., when the output current of the SPAD is large), the output unit 342 may be omitted from the signal processing device 34. In other words, when it is not necessary to amplify the output of the subchannel SCH, the amplification circuit may be omitted from the signal processing device 34.
[0188] Figure 35 is a schematic diagram showing an example of a planar layout of the sensor array 32c and column selector 33 included in the modified photodetector PD. As shown in Figure 35, depending on the number of photodetector elements DC arranged in the Y direction, adjacent channel units CHU may not each form a rectangular region. In such cases, for example, cell units CUa1 to CUa6 included in channel unit CHU1 and cell units CUb1 to CUb6 included in channel unit CHU2 may have portions that are arranged alternately in adjacent areas.
[0189] Specifically, channel unit CHU1 includes a plurality of photodetectors DC1 and a plurality of photodetectors DC2 arranged in the X direction. Channel unit CHU2 includes a plurality of photodetectors DC1 and a plurality of photodetectors DC2 arranged in the X direction. A plurality of photodetectors DCx arranged in the X direction are provided in adjacent portions of channel units CHU1 and CHU2. The odd-numbered photodetectors DCx along the X direction are contained in the odd-numbered cell units CUa. The even-numbered photodetectors DCx along the X direction are contained in the even-numbered cell units CUb.
[0190] Thus, when the layout of the photodetector elements DC is asymmetrical in adjacent channel units CHU, it is preferable that the photodetector elements DCx at the boundary are allocated such that the number of photodetector elements DC allocated to one of the adjacent channel units CHU is approximately equal to the number allocated to the other. The allocation of the photodetector elements DCx at the boundary to adjacent channel units CHU does not have to be staggered and can be designed arbitrarily. A layout like the sensor array 32c can also be designed similarly when the signal processing device 34 has a configuration that switches between combinations of three or more input groups IG.
[0191] The classification of each component of the distance measuring device 1 may be any other classification. The measurement unit 40 may be any other classification as long as it can realize the operation described in the above embodiment. The CPU included in the control unit 10 may be any other circuit. For example, an MPU (Micro Processing Unit) may be used instead of a CPU. Also, each of the processes described in each embodiment may be realized by dedicated hardware. There may be a mixture of processes executed by software and processes executed by hardware, or only one or the other. The control unit 10 may be called a control circuit. The measurement unit 40 may be called a measurement circuit. The image processing unit 50 may be called an image processing circuit.
[0192] The logic levels of the control signals used in the description of operation may be set to other values. If transistor T is a MOS (metal-oxide-semiconductor) transistor with p-type polarity, transistor T will turn on when an "H" level control signal is input to the gate terminal. Each switch SW, SWa, and SWb may operate in the same manner as in the above embodiment, based on signals with logic levels opposite to those in the above embodiment.
[0193] In this specification, “connected” means electrically connected, without excluding, for example, the presence of another element in between. “On state” means that a voltage greater than or equal to the threshold voltage of the corresponding transistor is applied to the gate of the corresponding transistor. “Off state” means that a voltage less than the threshold voltage of the corresponding transistor is applied to the gate of the corresponding transistor, without excluding the flow of a small current, for example, the leakage current of the transistor. “First and second ends of the transistor” correspond to the drain or source of the transistor, respectively. “Pixel PX” may also be called a sensor circuit. “Avalanche photodiode (diode APD)” may also be called a sensor. In the signal processing device 34, the subchannel SCH may be called the “input terminal” and the channel CH may be called the “output terminal”.
[0194] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of symbols]
[0195] 1...Distance measuring device, 10...Control unit, 20...Emission unit, 21...Drive circuit, 22...Drive circuit, 23...Light source, 24...Optical system, 25...Mirror, 30...Light receiving unit, 31...Optical system, 32...Sensor array, 33...Column selector, 34...Signal processing unit, 35...Control circuit, 40...Measurement unit, 41...Signal processing circuit, 42...AD conversion circuit, 43...Measurement circuit, 50...Image processing unit, 341...Switch unit, 342...Output unit, XFR...Selection integrator, OC...Output circuit, DA...Detection area, CH...T Channel, SCH... Subchannel, CHU... Channel Unit, CU... Cell Unit, CS... Control Signal, DC... Photodetector, APD... Diode, IG... Input Group, L1... Emitted Light, L2... Reflected Light, MB... Measurement Block, NT... Input Terminal, OT1, OT2... Output Terminals, OUT... Output Node Set, P1~P3... Packet, PX... Pixel, SW... Switch, T1~Tm... Transistor, A1, A2... AND Circuit Set, NC... Logic Negation Circuit, AA1, AA2... Region
Claims
1. A signal processing device that processes multiple signals that are intermittently input, Multiple input terminals configured to accept each of the aforementioned multiple signals, The first to the Nth output terminals are associated with each of the first to Nth groups (N is an integer of 2 or more), each of which contains M consecutive input terminals (M is an integer of 2 or more), A control circuit that outputs a signal based on the sum of multiple signals input to the kth group (where k is an integer between 1 and N) of the first to the Nth group to the kth output terminal of the first to the Nth output terminals, and switches the combination of input terminals assigned as the M input terminals so that they are different at each of the first to the Mth time points, A signal processing device equipped with the following features.
2. When M = 2, The plurality of input terminals include the first input terminal to the (N × 2 + 1)th input terminal, The aforementioned control circuit is At the first time step, a signal based on the sum of multiple signals input to the (k×2-1) input terminal and the (k×2) input terminal of the first to the (N×2+1) input terminals is output to the k output terminal. At the second time step, a signal based on the sum of multiple signals input to the (k×2) input terminal and the (k×2+1) input terminal of the first input terminal to the (N×2+1) input terminal is output to the k output terminal. The signal processing apparatus according to claim 1.
3. Further comprising a first selection circuit and a second selection circuit, When M = 2, The (k x 2) input terminal is connected to the k output terminal, The first selection circuit is configured to connect the third input terminal and the second input terminal of the first input terminal to the (N×2+1) input terminal, or the third input terminal and the fourth input terminal of the first input terminal to the (N×2+1) input terminal. The second selection circuit is configured to connect the fifth input terminal of the first input terminal to the (N×2+1) input terminal to the fourth input terminal, or the fifth input terminal of the first input terminal to the (N×2+1) input terminal to the sixth input terminal. The signal processing apparatus according to claim 2.
4. When M = 2, The aforementioned control circuit is At the first time step, the first selection circuit is controlled to connect the third input terminal and the fourth input terminal, and the second selection circuit is controlled to connect the fifth input terminal and the sixth input terminal. At the second time step, the first selection circuit is controlled to connect the third input terminal and the second input terminal, and the second selection circuit is controlled to connect the fifth input terminal and the fourth input terminal. The signal processing apparatus according to claim 3.
5. When M = 3, The plurality of input terminals include the first input terminal to the (N × 3 + 2)th input terminal, The aforementioned control circuit is At the first time step, a signal based on the sum of multiple signals input to the (k×3-2), (k×3-1), and (k×3) input terminals of the first to the (N×3+2) input terminals is output to the k output terminal. At the second time step, a signal based on the sum of multiple signals input to the (k×3-1) input terminal, the (k×3) input terminal, and the (k×3+1) input terminal of the first input terminal to the (N×3+2) input terminal is output to the k output terminal. At the third time step, a signal based on the sum of multiple signals input to the (k×3) input terminal, the (k×3+1) input terminal, and the (k×3+2) input terminal of the first to the (N×3+2) input terminals is output to the k output terminal. The signal processing apparatus according to claim 1.
6. The system further comprises a first to fourth selection circuit, When M = 3, The (k x 3) input terminal is connected to the k output terminal, The first selection circuit is configured to connect the fourth input terminal and the third input terminal of the first input terminal to the (N×3+2) input terminal, or the fourth input terminal and the sixth input terminal of the first input terminal to the (N×3+2) input terminal, The second selection circuit is configured to connect the fifth input terminal of the first input terminal to the (N×3+2) input terminal to the third input terminal, or the fifth input terminal of the first input terminal to the (N×3+2) input terminal to the sixth input terminal. The third selection circuit is configured to connect the seventh input terminal of the first input terminal to the (N×3+2) input terminal and the sixth input terminal, or the seventh input terminal of the first input terminal to the (N×3+2) input terminal and the ninth input terminal. The fourth selection circuit is configured to connect the eighth input terminal of the first input terminal to the (N×3+2) input terminal to the sixth input terminal, or the eighth input terminal of the first input terminal to the (N×3+2) input terminal to the ninth input terminal. The signal processing apparatus according to claim 5.
7. When M = 3, The aforementioned control circuit is At the first time step, the first selection circuit is controlled to connect the fourth input terminal and the sixth input terminal, the second selection circuit is controlled to connect the fifth input terminal and the sixth input terminal, the third selection circuit is controlled to connect the seventh input terminal and the ninth input terminal, and the fourth selection circuit is controlled to connect the eighth input terminal and the ninth input terminal. At the second time step, the first selection circuit is controlled to connect the fourth input terminal and the third input terminal, the second selection circuit is controlled to connect the fifth input terminal and the sixth input terminal, the third selection circuit is controlled to connect the seventh input terminal and the sixth input terminal, and the fourth selection circuit is controlled to connect the eighth input terminal and the ninth input terminal. At the third time step, the first selection circuit is controlled to connect the fourth input terminal and the third input terminal, the second selection circuit is controlled to connect the fifth input terminal and the third input terminal, the third selection circuit is controlled to connect the seventh input terminal and the sixth input terminal, and the fourth selection circuit is controlled to connect the eighth input terminal and the sixth input terminal. The signal processing apparatus according to claim 6.
8. The signal processing apparatus according to claim 1, A plurality of photodetectors connected to each of the plurality of input terminals, A photodetector equipped with the following features.
9. The plurality of photodetectors include an avalanche photodiode. The photodetector according to claim 8.
10. At each of the first time point through the M time point, a voltage higher than that applied to the anode of the avalanche photodiode is applied to the cannode of the avalanche photodiode. The photodetector according to claim 9.
11. With additional column selectors, The plurality of photodetectors connected to each of the plurality of input terminals are classified into a plurality of cell units, each containing at least one photodetector. The column selector is configured to selectively connect each of the plurality of input terminals to at least one of the plurality of cell units associated with it. The photodetector according to claim 8.
12. The column selector is configured to switch the combination of the input terminals. The photodetector according to claim 11.
13. The photodetector according to claim 8, A light source that emits an optical signal, The system includes a measurement circuit that detects reflected light from the optical signal based on the signal output from the photodetector, and calculates a distance value using the time the light source emitted the optical signal and the time the reflected light was detected. Distance measuring device.
14. It is further equipped with an image processing circuit, The measurement circuit transmits to the image processing circuit a first packet containing data of multiple distance values corresponding to the first time and a second packet containing data of multiple distance values corresponding to the second time. The image processing circuit rearranges the data contained in the first packet and the data contained in the second packet so that the data output from the same output terminal are consecutive. The distance measuring device according to claim 13.
15. The image processing circuit generates N × M pixels based on data of multiple distance values corresponding to the first time to the M time. The distance measuring device according to claim 14.
16. The control circuit repeatedly performs processing at the first time to the M time, and each time processing is performed at the M time, it transmits information based on the outputs of the first output terminal to the N output terminal at each of the first time to the M time to the measurement circuit. The distance measuring device according to claim 13.
17. The aforementioned measurement circuit is When calculating the distance value of the target measurement point at the first time, the measurement results of multiple measurement points included in the first range, which includes the measurement point, are used. When calculating the distance value of the target measurement point at the second time, the measurement results of multiple measurement points included in the second range, which is shifted vertically by at least half a pixel from the first range, are used. The distance measuring device according to claim 13.
18. The measurement circuit accumulates the measurement results of each of the plurality of measurement points included in the first range, detects at least one peak of the signal included in the accumulated measurement results, and determines the distance value of the target measurement point from the detected at least one peak based on the reliability information. The distance measuring device according to claim 17.
19. The system further includes a rotating mirror having two reflective surfaces, which reflects the light signal emitted from the light source to the outside, and the light signal reflected from the external object to the photodetector. The distance measuring device according to claim 13.
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