Power converter

Abstract

The power conversion device includes a converter (1) that converts AC power supplied from an AC power source (6) into DC power and supplies it to DC lines (L1, L3), capacitors (C1~C4) connected to the DC lines (L1, L3), an inverter (3) that converts the DC power received from the DC lines (L1, L3) into AC power and supplies it to a load (8), and a control device (5) that controls the converter (1) so that the DC voltage (VD) of the DC lines (L1, L3) becomes a reference voltage. The control device (5) detects transient changes in the load (8) based on at least one of the DC voltage (VD) of the DC lines (L1, L3) and the load current flowing through the load (8). In response to the detection of a transient change in the load (8), the control device (5) temporarily increases the control responsiveness of the DC voltage (VD) by the converter (1).

Description

Technical Field

[0001] The present disclosure relates to a power conversion device, and more particularly to a power conversion device that converts AC power supplied from an AC power source into DC power, and then converts the DC power into AC power to supply it to a load.

Background Art

[0002] For example, International Publication No. 2020 / 026430 (Patent Document 1) discloses an uninterruptible power supply device including a converter, a capacitor, an inverter, and a control device. The converter converts AC power supplied from an AC power source into DC power and supplies it to a DC line when the AC power source is healthy. The capacitor is connected to the DC line. The inverter converts the DC power received from the DC line into AC power and supplies it to a load. The control device controls the converter so that the DC voltage of the DC line becomes a reference voltage when the AC power source is healthy.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

[0006] On the other hand, miniaturization of capacitors is required from the standpoint of reducing the size and cost of the equipment. However, if the capacitance of the capacitor is reduced by miniaturizing it, a problem may arise in which the capacitance of the capacitor becomes insufficient during transient changes in the load, making it impossible to stabilize the DC voltage of the DC line.

[0007] This disclosure was made to solve these problems, and its purpose is to provide a power conversion device that can stabilize the DC voltage of a DC line even when using a small capacitor. [Means for solving the problem]

[0008] The power conversion device according to this disclosure comprises a converter that converts AC power supplied from an AC power source into DC power and supplies it to a DC line, a capacitor connected to the DC line, an inverter that converts the DC power received from the DC line into AC power and supplies it to a load, and a control device that controls the converter so that the DC voltage of the DC line becomes a reference voltage. The control device detects transient changes in the load based on at least one of the DC voltage of the DC line and the load current flowing through the load. In response to the detection of a transient change in the load, the control device temporarily increases the control responsiveness of the DC voltage by the converter. [Effects of the Invention]

[0009] According to this disclosure, in response to the detection of transient changes in the load, the control responsiveness of the DC voltage by the converter is temporarily increased, thereby allowing the DC voltage of the DC line to quickly follow the reference voltage. This makes it possible to stabilize the DC voltage of the DC line even when using small capacitors. [Brief explanation of the drawing]

[0010] [Figure 1] This is a circuit block diagram showing an example configuration of an uninterruptible power supply to which a power converter according to Embodiment 1 is applied. [Figure 2] This block diagram shows the configuration of the part of the control unit related to the control of the converter. [Figure 3] Figure 2 is a block diagram showing the configuration of the control circuit. [Figure 4] This is a timing chart to illustrate the problems that can arise when using small capacitors. [Figure 5] This block diagram shows a first example configuration of the DC voltage control unit shown in Figure 3. [Figure 6] Figure 5 shows an example of the detector configuration. [Figure 7] Figure 3 is a time chart showing the operation of the control circuit. [Figure 8] This block diagram shows a second example configuration of the DC voltage control unit shown in Figure 3. [Figure 9] This block diagram shows a third example configuration of the DC voltage control unit shown in Figure 3. [Figure 10] This is a circuit block diagram showing another configuration example of an uninterruptible power supply to which a power converter according to Embodiment 1 is applied. [Modes for carrying out the invention]

[0011] The embodiments of this disclosure will be described in detail below with reference to the drawings. In the following, the same or corresponding parts in the drawings will be denoted by the same reference numerals, and their descriptions will not be repeated in principle.

[0012] [Embodiment 1] <Configuration of the uninterruptible power supply device> FIG. 1 is a circuit block diagram showing a configuration example of an uninterruptible power supply device to which a power conversion device according to Embodiment 1 is applied. As shown in FIG. 1, the uninterruptible power supply device includes an input terminal T1, a DC terminal T2, an output terminal T3, a converter 1, current detectors CD1 to CD3, DC lines L1 to L3, capacitors C1 and C2, a bidirectional chopper 2, an inverter 3, an operation unit 4, and a control device 5.

[0013] The input terminal T1 receives an AC voltage VI from a commercial AC power supply 6. The instantaneous value of the AC voltage VI (hereinafter, also referred to as "AC input voltage VI") is detected by the control device 5. Based on the instantaneous value of the AC voltage VI, the presence or absence of a power outage of the commercial AC power supply 6 is determined.

[0014] The DC terminal T2 is connected to a battery 7 (power storage device). The battery 7 stores DC power. A capacitor may be connected instead of the battery 7. The instantaneous value of the DC voltage VB at the DC terminal T2 (that is, the terminal voltage VB of the battery 7) is detected by the control device 5. <(

[0015] The output terminal T3 is connected to a load 8. The load 8 is driven by the AC power supplied from the uninterruptible power supply device. The instantaneous value of the AC voltage VO (hereinafter, also referred to as "AC output voltage VO") appearing at the output terminal T3 is detected by the control device 5.

[0016] Note that the uninterruptible power supply device receives a three-phase AC voltage from the commercial AC power supply 6 and supplies a three-phase AC voltage to the load 8. However, for simplicity of the drawing and description, only a single-phase circuit is shown in FIG. 1.

[0017] Converter 1 has an AC terminal 1a, a positive voltage terminal 1b, a neutral voltage terminal 1c, and a negative voltage terminal 1d. Bidirectional chopper 2 has a DC terminal 2a, a positive voltage terminal 2b, a neutral voltage terminal 2c, and a negative voltage terminal 2d. Inverter 3 has an AC terminal 3a, a positive voltage terminal 3b, a neutral voltage terminal 3c, and a negative voltage terminal 3d.

[0018] The AC terminal 1a of converter 1 is connected to input terminal T1. Current detector CD1 detects the instantaneous value of the current Ii (hereinafter also referred to as "AC input current Ii") flowing between input terminal T1 and AC terminal 1a, and gives a signal Iif indicating the detected value to control device 5.

[0019] The DC terminal 2a of bidirectional chopper 2 is connected to DC terminal T2. Current detector CD2 detects the instantaneous value of the DC current IB flowing between DC terminal T2 and DC terminal 2a, and gives a signal IBf indicating the detected value to control device 5.

[0020] The AC terminal 3a of inverter 3 is connected to output terminal T3. Current detector CD3 detects the instantaneous value of the current Io (hereinafter also referred to as "load current Io") flowing between AC terminal 3a and output terminal T3, and gives a signal Iof indicating the detected value to control device 5.

[0021] The first terminals of DC lines L1 to L3 are respectively connected to the positive voltage terminal 1b, the neutral voltage terminal 1c, and the negative voltage terminal 1d of converter 1. The second terminals of DC lines L1 to L3 are respectively connected to the positive voltage terminal 3b, the neutral voltage terminal 3c, and the negative voltage terminal 3d of inverter 3. Also, DC lines L1 and L3 are respectively connected to the positive voltage terminal 2b and the negative voltage terminal 2d of bidirectional chopper 2.

[0022] Capacitor C1 is connected between DC lines L1 and L2 to stabilize and smooth the DC voltage Ep between DC lines L1 and L2. Capacitor C2 is connected between DC lines L2 and L3 to stabilize and smooth the DC voltage En between DC lines L2 and L3. Capacitors C1 and C2 are connected in series between DC lines L1 and L3 to stabilize and smooth the DC voltage VD = Ep + En between DC lines L1 and L3. The instantaneous values ​​of the DC voltages Ep and En are detected by the control device 5.

[0023] Capacitor C3 is connected between terminals 2b and 2c of the bidirectional chopper 2, stabilizing and smoothing the DC voltage between terminals 2b and 2c. Capacitor C4 is connected between terminals 2c and 2d of the bidirectional chopper 2, stabilizing and smoothing the DC voltage between terminals 2c and 2d. Capacitors C3 and C4 are connected in series between terminals 2b and 2d of the bidirectional chopper 2, stabilizing and smoothing the DC voltage VD = Ep + En between terminals 2b and 2d.

[0024] Converter 1 is a well-known converter comprising multiple transistors and multiple diodes, and is controlled by control device 5. When the AC voltage VI is supplied normally from the commercial AC power supply 6 (i.e., when the commercial AC power supply 6 is healthy), converter 1 converts the AC input voltage VI supplied from the commercial AC power supply 6 via input terminal T1 into three levels of DC voltage V1 to V3, and outputs them to DC lines L1 to L3, respectively. That is, Ep = V1 - V2, En = V2 - V3. When the AC input voltage VI is not supplied normally from the commercial AC power supply 6 (i.e., when the commercial AC power supply 6 is down), the operation of converter 1 is stopped.

[0025] The bidirectional chopper 2 is a well-known type containing multiple transistors and multiple diodes, and is controlled by the control device 5. When the commercial AC power supply 6 is healthy, the bidirectional chopper 2 stores DC power supplied from the converter 1 via DC lines L1 and L3 in the battery 7.

[0026] In the event of a power outage in the commercial AC power supply 6, the bidirectional chopper 2 converts the DC voltage VB of the battery 7 into three levels of DC voltages V1 to V3, outputting them to the positive voltage terminal 2b, the neutral voltage terminal 2c, and the negative voltage terminal 2d, respectively. DC voltages V1 and V3 are supplied to DC lines L1 and L3, respectively. The DC voltage (V1-V3) between DC lines L1 and L3 is divided by capacitors C1 and C2, generating a neutral voltage V2 = (V1-V3) / 2 on DC line L2. The DC voltage V2 on DC line L2 is supplied to the inverter 3.

[0027] The inverter 3 is a well-known inverter containing multiple transistors and multiple diodes, and is controlled by the control device 5. When the commercial AC power supply 6 is healthy, the inverter 3 converts three levels of DC voltages V1 to V3 supplied from the converter 1 via DC lines L1 to L3 into AC output voltage VO and supplies it to the load 8. When the commercial AC power supply 6 fails, the inverter 3 converts three levels of DC voltages V1 to V3 supplied from the battery 7 via the bidirectional chopper 2 and DC lines L1 to L3 into AC output voltage VO and supplies it to the load 8.

[0028] The control unit 4 includes multiple buttons operated by the user of the uninterruptible power supply, an image display unit that displays various information, and other components. By operating the control unit 4, the user can turn the power of the uninterruptible power supply on and off, and set various information.

[0029] The control unit 5 controls the entire uninterruptible power supply based on the AC input voltage VI, AC input current Ii, DC voltages Ep, En, VB, AC output voltage VO, load current Io, and signals from the control unit 4.

[0030] The control device 5 can typically be configured using a microcomputer with a predetermined program pre-stored within it. For example, the control device 5 includes a CPU (Central Processing Unit), memory, and input / output circuits. A program is pre-stored in a portion of the memory, and the CPU can execute this program to realize the various functions described later. Alternatively, at least a portion of the control device 5 can be configured using circuits such as an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit).

[0031] When the commercial AC power supply 6 is functioning properly, the control device 5 controls the converter 1 so that the DC voltage VD = Ep + En between DC lines L1 and L3 becomes the reference voltage VDR, and the difference between DC voltages Ep and En ΔE = Ep - En becomes 0. In the event of a power outage of the commercial AC power supply 6, the control device 5 stops the operation of the converter 1.

[0032] Furthermore, when the commercial AC power supply 6 is functioning properly, the control device 5 controls the bidirectional chopper 2 so that the DC voltage VB becomes the reference voltage VBR. In the event of a power outage of the commercial AC power supply 6, the control device 5 controls the bidirectional chopper 2 so that the DC voltage VD between DC lines L1 and L3 becomes the reference voltage VDR.

[0033] Furthermore, the control device 5 controls the inverter 3 so that the AC output voltage VO becomes a sinusoidal reference voltage VOR.

[0034] <Control of DC voltage VD> In the uninterruptible power supply (UPS) according to this embodiment 1, smaller capacitors C1 to C4 are used than those used in conventional UPSs in order to reduce the size and cost of the device. The capacitance of capacitors C1 to C4 is smaller than that of capacitors used in conventional UPSs. The configuration for controlling the DC voltage VD between DC lines L1 and L3 will be described below. Furthermore, potential problems that may arise when using small capacitors C1 to C4 will be described.

[0035] Figure 2 is a block diagram showing the configuration of the part of the control device 5 related to the control of the converter 1. As shown in Figure 2, the control device 5 is composed of a power failure detector 10, an adder 11, a subtractor 12, and a control circuit 13. The function of each block shown in Figure 2 can be realized by at least one of software processing and hardware processing by the control device 5.

[0036] The power outage detector 10 detects whether a power outage has occurred in the commercial AC power supply 6 based on the AC input voltage VI supplied from the commercial AC power supply 6, and outputs a power outage detection signal φF indicating the detection result. The power outage detection signal φF is set to the deactivation level "L" when the commercial AC power supply 6 is healthy. When a power outage occurs in the commercial AC power supply 6, the power outage detection signal φF is set to the activation level "H". For example, the power outage detector 10 determines that a power outage has occurred in the commercial AC power supply 6 when the AC input voltage VI falls below the lower limit.

[0037] The adder 11 adds the DC voltage between DC lines L1 and L2 (i.e., the terminal voltage of capacitor C1) Ep and the DC voltage between DC lines L2 and L3 (i.e., the terminal voltage of capacitor C2) En to obtain the DC voltage between DC lines L1 and L3, VD = Ep + En. The subtractor 12 subtracts the DC voltage En from the DC voltage Ep to obtain the DC voltage ΔE = Ep - En.

[0038] When the power outage detection signal φF is at the "L" level, the control circuit 13 controls the converter 1 based on the AC input voltage VI, AC input current Ii, DC voltage VD, ΔE, and load current Io, such that the DC voltage VD becomes the reference voltage VDR and the DC voltage ΔE becomes 0.

[0039] If a power outage occurs in the commercial AC power supply 6 and the power outage detection signal φF reaches the "H" level, the control circuit 13 stops the operation of converter 1. When the operation of converter 1 is stopped, all of the transistors included in converter 1 are turned off, and the input terminal T1 and DC lines L1 to L3 are electrically disconnected.

[0040] Figure 3 is a block diagram showing the configuration of the control circuit 13 shown in Figure 2. As shown in Figure 3, the control circuit 13 includes a reference voltage generator 20, subtractors 21 and 25, a DC voltage control unit 22, a sine wave generator 23, a multiplier 24, a current control unit 26, adders 27 and 29, a balance control unit 28, and a PWM (Pulse Width Modulation) control unit 30.

[0041] The reference voltage generation unit 20 generates a reference voltage VDR. The subtractor 21 calculates the voltage ΔVD, which is the difference between the reference voltage VDR and the DC voltage VD from the adder 11.

[0042] The DC voltage control unit 22 determines a current command value IDc to control the current (AC input current Ii) flowing to the input side of the converter 1 so that the voltage ΔVD becomes 0. The DC voltage control unit 22 determines the current command value IDc by, for example, performing a proportional or proportional-integral operation on the voltage ΔVD.

[0043] The sine wave generator 23 outputs a sine wave signal in phase with the AC input voltage VI supplied from the commercial AC power supply 6. The multiplier 24 multiplies the current command value IDc by the sine wave signal to generate a current command value Iic. This generates a current command value Iic that is in phase with the AC input voltage VI supplied from the commercial AC power supply 6.

[0044] The subtractor 25 calculates the difference ΔIi = Iic - Ii between the current command value Iic and the AC input current Ii indicated by the output signal Iif of the current detector CD1.

[0045] The current control unit 26 generates a voltage command value VIAc such that ΔIi becomes 0. The current control unit 26 generates the voltage command value VIAc by, for example, amplifying ΔIi according to proportional control or proportional-integral control. The adder 27 adds the voltage command value VIAc and the AC input voltage VI to generate a voltage command value VI0c.

[0046] The balance control unit 28 generates a voltage command value V1c based on the DC voltage ΔE = Ep - En from the subtractor 12 (Figure 2). For example, the balance control unit 28 generates the voltage command value V1c by performing a proportional or proportional-integral operation on the DC voltage ΔE. If ΔE = Ep - En > 0, the voltage command value V1c is generated such that the charging time of capacitor C1 is shorter than the charging time of capacitor C2. If ΔEp = Ep - En < 0, the voltage command value V1c is generated such that the charging time of capacitor C1 is longer than the charging time of capacitor C2.

[0047] The adder 29 adds the voltage command values ​​VI0c and V1c to generate the voltage command value VIc. The PWM control unit 30 controls the converter 1 based on the sinusoidal voltage command value VIc when the power outage detection signal φF from the power outage detector 10 (Figure 2) is at the deactivation level "L" (when the commercial AC power supply 6 is healthy). As a result, the DC voltage VD = Ep + En is maintained at the reference voltage VDR, and the DC voltage ΔE is maintained at 0.

[0048] Furthermore, the PWM control unit 30 stops the operation of the converter 1 when the power outage detection signal φF is at the activation level "H" (when the commercial AC power supply 6 is shut down). This electrically disconnects the input terminal T1 from the DC lines L1 to L3.

[0049] (Problem) As shown in Figure 3, when the commercial AC power supply 6 is functioning properly, the control circuit 13 controls the converter 1 so that the DC voltage VD between DC lines L1 and L3 becomes the reference voltage VDR. At this time, the control circuit 13 controls the converter 1 so that the current flowing on the input side of the converter 1 (AC input current Ii) is in phase with the AC input voltage VI supplied from the commercial AC power supply 6, that is, so that the input power factor is 1.

[0050] The AC input current Ii contains countless harmonic components in addition to the fundamental wave component. By removing the harmonic components contained in the AC input current Ii, it is possible to prevent the harmonic components from causing interference to other equipment connected to the commercial AC power supply 6 or to nearby communication lines.

[0051] To achieve stable control of the DC voltage VD, the control response of the DC voltage VD is set to a value sufficiently lower than the fundamental frequency (commercial frequency) of the AC input voltage VI supplied from the commercial AC power supply 6. This makes it possible to match the DC voltage VD to the reference voltage VDR on average while making the AC input current Ii a sine wave in phase with the AC input voltage VI.

[0052] The reason the control response of the DC voltage VD was set to a value sufficiently lower than the fundamental frequency (commercial frequency) is that increasing the control response would cause the DC voltage VD to become a constant, smooth DC voltage, which would worsen the distortion of the AC input current Ii, making it difficult to achieve an input power factor of 1.

[0053] Furthermore, the DC current flowing through capacitors C1 to C4 has a pulsating component with a frequency higher than the fundamental frequency (commercial frequency) due to power fluctuations (power ripple) generated by the operation of load 8. By increasing the capacitance of capacitors C1 to C4, this pulsating component can be absorbed by capacitors C1 to C4. In conventional uninterruptible power supplies, the capacitance of capacitors C1 to C4 was set to a sufficiently large value to absorb this pulsating component according to the specifications of load 8. Therefore, depending on the specifications of load 8, it may be necessary to increase the capacitance of capacitors C1 to C4, which raises concerns about the resulting increase in the size of the device.

[0054] Figure 4 is a time chart illustrating the problems that occur when using small capacitors C1 to C4. In Figure 4, (A) shows the waveforms of the AC output voltages VU, VV, and VW of inverter 3, (B) shows the waveform of the DC voltage VD = Ep + En between DC lines L1 and L3, and (C) shows the waveforms of the load currents Iou, Iov, and Iow.

[0055] In reality, an uninterruptible power supply (UPS) receives three-phase AC voltages VR, VS, and VT from a commercial AC power source 6 and supplies three-phase AC voltages VU, VV, and VW to the load 8. However, in Figure 1, only a single-phase circuit is shown for the sake of simplicity in the diagram and explanation.

[0056] In Figure 1, the AC input voltage VI supplied from the commercial AC power supply 6 corresponds to one of the three-phase AC voltages VR, VS, and VT, and the AC output voltage VO supplied to the load 8 corresponds to one of the three-phase AC voltages VU, VV, and VW.

[0057] When the commercial AC power supply 6 is normal, as shown in Fig. 4(A), each of the AC output voltages VU, VV, and VW is generated in a sine wave form by the inverter 3 (time t0 to t1). At this time, the amplitudes of the AC output voltages VU, VV, and VW are set to 1 / 2 times the lower limit voltage VL of the DC voltage VD. The portion of the AC voltages VU, VV, and VW from 0 V to VL / 2 is generated based on the DC voltage Ep, and the portion of the AC voltages VU, VV, and VW from -VL / 2 to 0 V is generated based on the DC voltage En.

[0058] Also, at times t0 to t1, as shown in Fig. 4(B), the converter 1 is controlled so that the DC voltage VD becomes the reference voltage VDR. The reference voltage VDR is set to be higher than the lower limit voltage VL and lower than the upper limit voltage VH.

[0059] The lower limit voltage VL corresponds to a voltage that is twice the amplitude of the AC output voltage VO. The reason for setting VDR > VL is that when the DC voltage VD becomes lower than the voltage that is twice the amplitude of the AC output voltages VU, VV, and VW, the inverter 3 cannot generate a sine wave-shaped AC output voltage VO.

[0060] The upper limit voltage VH corresponds to the maximum value of the DC voltage that the converter 1 can stably output. The reason for setting VDR < VH is to increase the efficiency of the uninterruptible power supply device. When the DC voltage VD is increased, the switching losses of each transistor included in the converter 1, the bidirectional chopper 2, and the inverter 3 increase, resulting in a decrease in the efficiency of the uninterruptible power supply device.

[0061] At times t0 to t1, the load currents Iou, Iov, and Iow are 0 A. That is, at times t0 to t1, the operation of the load 8 is stopped, and the load factor is maintained at 0%.

[0062] At time t1, when load 8 is activated and the load factor (ratio of actual load capacity to maximum load capacity) changes abruptly from 0% to 100%, the load currents Iou, Iov, and Iow are each generated sinusoidally by inverter 3. Converter 1 is also controlled so that the DC voltage VD becomes the reference voltage VDR. However, because the capacitance of capacitors C1 to C4 is insufficient, the DC voltage VD temporarily decreases during the transient change when load 8 changes abruptly, as shown in Figure 2(B).

[0063] When the DC voltage VD falls below the lower limit voltage VL, the waveforms of the peak values ​​of the three-phase AC voltages VU, VV, and VW can no longer be sinusoidal, and the waveforms of the three-phase AC voltages VU, VV, and VW become distorted. When the waveforms of the three-phase AC voltages VU, VV, and VW are distorted, the waveforms of the load currents Iou, Iov, and Iow are also distorted, which may adversely affect the load 8.

[0064] Although not shown in the diagram, for example, if load 8 stops operating and the load factor suddenly changes from 100% to 0%, or if regenerative power is generated in load 8, the capacitance of capacitors C1 to C4 is insufficient, which may cause the DC voltage VD to temporarily rise and exceed the upper limit voltage VH.

[0065] Therefore, in this embodiment 1, during transient changes in the load 8, the control responsiveness of the DC voltage VD by the converter 1 is temporarily increased to prevent the DC voltage VD from falling below the lower limit voltage VL, and to prevent the DC voltage VD from becoming excessively high above the upper limit voltage VH.

[0066] The adjustment of the control responsiveness of the DC voltage VD can be achieved, for example, in the DC voltage control unit 22 shown in Figure 3. Figure 5 is a block diagram showing a first configuration example of the DC voltage control unit 22 shown in Figure 3. As shown in Figure 5, the DC voltage control unit 22 is composed of a first controller 40, a second controller 42, a switching circuit 44, an adder 46, and a detector 50.

[0067] The first controller 40 determines a current command value IDc1 to control the AC input current Ii so that the voltage ΔVD = VDR - VD becomes 0. The first controller 40 determines the current command value IDc1, for example, by performing a proportional-integral operation on the voltage ΔVD.

[0068] Specifically, the first controller 40 includes a proportional controller 400, an integral controller 402, and an adder 404. The proportional controller 400 calculates the proportional control value Pt1 by multiplying the voltage ΔVD by the proportional gain Kp1. The integral controller 402 calculates the integral control value It by integrating the value obtained by multiplying the voltage ΔVD by the integral gain Ki. The adder 404 adds the proportional control value Pt1 and the integral control value It, and outputs the sum as the current command value IDc1. The proportional control value Pt1, the integral control value It, and the current command value IDc1 are given by equations (1) to (3), respectively. Pt1 = Kp1 × ΔVD (1) It = Ki × ΔVD × 1 / s (2) IDc1 = Pt1 + It (3) s is the Laplace operator, and 1 / s represents the integral operation in a continuous system. However, since the first controller 40 is configured to perform calculations discretely for each calculation period, the integral controller 402 actually outputs the value obtained by adding the voltage ΔVD multiplied by the integral gain Ki and the integral control value It calculated in the previous calculation as the current integral control value It. Note that the first controller 40 may also be configured to have only a proportional controller 400.

[0069] The second controller 42 determines a current command value IDc2 to control the AC input current Ii so that the voltage ΔVD = VDR - VD becomes 0. The second controller 42 determines the current command value IDc2 by, for example, performing a proportional calculation on the voltage ΔVD. Specifically, the second controller 42 includes a proportional controller 420. The proportional controller 420 calculates a proportional control value Pt2 by multiplying the voltage ΔVD by a proportional gain Kp2 and outputs the calculation result. The proportional control value Pt2 is given by equation (4). Pt2 = Kp2 × ΔVD (4) The detector 50 is a device for detecting a sudden change in the load 8. The detector 50 detects whether the load 8 is in a steady state where it is relatively stable or in a transient state where the load 8 is changing suddenly based on the detected value of the DC voltage VD and the detected value of the load current Io indicated by the output signal Iof of the current detector CD3, and is configured to output a detection signal φH indicating the detection result. The detection signal φH is set to the "L" level of the deactivation level when the load 8 is in the steady state, and to the "H" level of the activation level when the load 8 is in the transient state.

[0070] FIG. 6 is a block diagram showing a configuration example of the detector 50. As shown in FIG. 6, the detector 50 includes a first detector 52 for detecting whether the DC voltage VD has deviated from the set voltage range, a second detector 54 for detecting a transient change in the load current Io, and an OR (logical sum) circuit 56.

[0071] The first detector 52 compares the detected value of the DC voltage VD with the set voltage range defined by the upper limit voltage VH1 and the lower limit voltage VL1. The upper limit voltage VH1 is set to a value lower than the upper limit voltage VH of the DC voltage VD. The lower limit voltage VL1 is set to a value higher than the lower limit voltage VL of the DC voltage VD.

[0072] When the detected value of the DC voltage VD is within the set voltage range (VL1 ≤ VD ≤ VH1), the first detector 52 outputs a detection signal φH1 of the "L" level of the deactivation level. When the detected value of the DC voltage VD exceeds the upper limit voltage VH (VD > VH1), or when the detected value of the DC voltage VD drops below the lower limit voltage VL (VD < VL1), the first detector 52 detects that the DC voltage VD has deviated from the set voltage range and outputs a detection signal φH1 of the "H" level.

[0073] Also, when the detection signal φH1 is at the "H" level, when the detected value of the DC voltage VD drops below the upper limit voltage VH and returns within the set voltage range, or when the detected value of the DC voltage VD rises above the lower limit voltage VL and returns within the set voltage range, the first detector 52 changes the detection signal φ1 from the "H" level to the "L" level.

[0074] Furthermore, in order to avoid hunting, in which the detection signal φH1 changes continuously in a short period of time, a hysteresis characteristic can be introduced between the determination value used to determine when the DC voltage VD has deviated from the set voltage range and the determination value used to determine when the DC voltage VD has returned to the set voltage range.

[0075] The second detector 54 is configured to extract harmonic components from the load current Io and to detect transient changes in the load current Io based on the extracted harmonic components. Specifically, the second detector 54 includes a moving average circuit 540, a filter 542, a subtractor 544, and a comparator 546.

[0076] The moving average circuit 540 calculates a moving average value of the detected load current Io over a predetermined moving average interval. The filter 542 performs a low-pass filter process to extract oscillation components with frequencies lower than the load current Io frequency (commercial frequency) (for example, around 100 Hz) from the moving average value of the load current Io.

[0077] The subtractor 544 extracts the harmonic components of the load current Io by subtracting the output value of the filter 542 from the moving average value obtained by the moving average circuit 540.

[0078] The comparator 546 compares the harmonic components of the extracted load current Io with a predetermined threshold range. If the harmonic components of the load current Io are within the threshold range, the comparator 546 outputs a detection signal φH2 at the deactivation level "L". If the harmonic components of the load current Io exceed the upper limit of the threshold range, or fall below the lower limit of the threshold range, the comparator 546 detects the transient change in the load current Io and outputs a detection signal φH2 at the activation level "H".

[0079] The OR circuit 56 calculates the logical OR of the detection signal φH1 output from the first detector 52 and the detection signal φH2 output from the second detector 54, and outputs the calculation result as the detection signal φH. The detection signal φH is at the "H" level when at least one of the detection signals φH1 and φH2 is at the "H" level. That is, when it is detected that the DC voltage VD has deviated from the set voltage range (φH1=H), and / or when a transient change in the load current Io is detected (φH2=H), it is detected that the load 8 is in a transient state, and the detection signal φH is set to the "H" level.

[0080] On the other hand, if it is detected that the DC voltage VD is within the set voltage range (φH1=L), and if no transient change in the load current Io is detected (φH2=L), it is detected that the load 8 is in a steady state, and the detection signal φH is set to the "L" level. In Figure 6, the detector 50 is configured to have a first detector 52 and a second detector 54, but the detector 50 may also be configured to have only one of the first detector 52 or the second detector 54.

[0081] The switching circuit 44 receives the proportional control value Pt2 output from the second controller 42 at the first input terminal and the value "0" at the second input terminal. Based on the detection signal φH from the detector 50, the switching circuit 44 selects one of the two input values ​​and outputs the selected input value as the current command value IDc2 to the adder 46. Specifically, the switching circuit 44 selects the proportional control value Pt2 when the detection signal φH is at the "H" level and selects the value "0" when the detection signal φH is at the "L" level.

[0082] The adder 46 adds the current command value IDc1 output from the first controller 40 and the current command value IDc2 output from the switching circuit 44, and outputs the sum as the current command value IDc. The current command value IDc is given by equation (5). IDc = IDc1 + IDc2 (5) In the configuration described above, when the detection signal φH is at the "H" level, that is, when the load 8 is in a transient state, the current command value IDc2 is equal to the proportional control value Pt2, and therefore the current command value IDc is given by equation (6). By substituting equations (1) to (4) into equation (6), the current command value IDc can be expressed as in equation (7). IDc = IDc1 + Pt2 = Pt1 + It + Pt2 (6) IDc=(Kp1+Kp2)×ΔVD+Ki×ΔVD×1 / s (7) In contrast, when the detection signal φH is at the "L" level, that is, when the load 8 is in a steady state, the current command value IDc2 becomes "0", and the current command value IDc is given by equation (8). IDc=IDc1=Pt1+It=Kp1×ΔVD+Ki×ΔVD×1 / s (8) As is clear from comparing equations (7) and (8), when the load 8 is in a transient state, the value of the proportional gain Kp is larger than when the load 8 is in a steady state. As the value of the proportional gain Kp increases, the proportional control value Pt increases, and as a result, it becomes possible to make the DC voltage VD follow the reference voltage VDR at high speed.

[0083] In this embodiment 1, when the load 8 is in a transient state, the value of the proportional gain Kp in the DC voltage control unit 22 is increased to improve the control responsiveness of the DC voltage VD during transient changes in the load 8. As a result, even when using small capacitors C1 to C4, it is possible to prevent the DC voltage VD from falling below the lower limit voltage VL and to prevent the DC voltage VD from becoming excessively high above the upper limit voltage VH.

[0084] Furthermore, since the DC voltage VD can be kept lower than the upper limit voltage VH, the efficiency of the uninterruptible power supply can be increased.

[0085] However, increasing the control responsiveness of the DC voltage VD can worsen the distortion of the AC input current Ii, as the DC voltage VD becomes a constant, smooth DC voltage. Therefore, even when the load 8 is in a steady state, increasing the value of the proportional gain Kp may make it difficult to achieve an input power factor of 1.

[0086] Therefore, in this embodiment 1, when the load 8 is in a steady state, the proportional gain Kp is set to a value that allows the input power factor to be 1, and during transient changes in the load 8, the value of the proportional gain Kp is temporarily increased to temporarily increase the control responsiveness of the DC voltage VD. As a result, in a steady state, the DC voltage VD is kept at 1 while matching the reference voltage VDR on average, and during transient changes in the load 8, the DC voltage VD is made to follow the reference voltage VDR at high speed, thereby suppressing fluctuations in the DC voltage VD.

[0087] In the first configuration example shown in Figure 5, the value of the proportional gain Kp (Kp1) when the load 8 is in a steady state is set so that the response of the feedback control system (closed-loop control system) is slower than the fundamental frequency (commercial frequency) of the AC input voltage VI supplied from the commercial AC power supply 6, with the aim of keeping the input power factor at 1 in a steady state. For example, if the commercial frequency is 60 Hz, the value of the proportional gain Kp (Kp1) is set so that the response is about 1 / 4 of the commercial frequency, around 15 Hz (angular frequency ω = approximately 100 rad / s). The proportional gain Kp1 corresponds to one embodiment of the "first control gain".

[0088] In contrast, a fast response from the feedback control system (closed-loop control system) is required during transient changes in load 8. Therefore, the proportional gain Kp value (Kp1 + Kp2) is set so that the DC voltage VD remains within the voltage range defined by the lower limit voltage VL and the upper limit voltage VH in response to transient changes in load 8. For example, if the calculation period of the feedback control system (closed-loop control system) is 1 kHz, the proportional gain Kp value (Kp1 + Kp2) is set so that the response is approximately 250 Hz (angular frequency ω = approximately 1570 rad / s), which is about 1 / 4 of the calculation period. The proportional gain Kp1 + Kp2 corresponds to one embodiment of the "second control gain".

[0089] Figure 7 is a time chart showing the operation of the control circuit 13 shown in Figure 3. In Figure 7, (A) shows the waveforms of the AC output voltages VU, VV, and VW of the inverter 3, (B) shows the waveform of the DC voltage VD = Ep + En between the DC lines L1 and L3, (C) shows the waveforms of the load currents Iou, Iov, and Iow, and (D) shows the waveform of the detection signal φH of the detector 50.

[0090] When the commercial AC power supply 6 is functioning properly, the AC output voltages VU, VV, and VW are each generated sinusoidally by the inverter 3, as shown in Figure 7(A) (times t0 to t1). The amplitudes of the AC output voltages VU, VV, and VW are set to half the lower limit voltage VL of the DC voltage VD, as shown in Figure 4. The portion of the AC voltages VU, VV, and VW from 0V to VL / 2 is generated based on the DC voltage Ep, and the portion of the AC voltages VU, VV, and VW from -VL / 2 to 0V is generated based on the DC voltage En.

[0091] Furthermore, between times t0 and t1, the converter 1 is controlled so that the DC voltage VD becomes the reference voltage VDR, as shown in Figure 7(B). The reference voltage VDR is set to be higher than the lower limit voltage VL and lower than the upper limit voltage VH, as shown in Figure 4.

[0092] At times t0 to t1, as shown in Figure 7(C), the load currents Iou, Iov, and Iow are 0A. That is, at times t0 to t1, the operation of load 8 is stopped, and the load factor is maintained at 0%.

[0093] At time t1, when load 8 is activated and the load factor changes abruptly from 0% to 100%, the load currents Iou, Iov, and Iow are each generated sinusoidally by inverter 3. In addition, converter 1 is controlled so that the DC voltage VD becomes the reference voltage VDR.

[0094] In response to the sudden change in load 8, as shown in Figure 7(D), when the detection signal φH of the detector 50 changes from the "L" level to the "H" level at time t3, the DC voltage control unit 22 of the control circuit 13 increases the value of the proportional gain Kp by changing the proportional gain Kp used for control calculations for voltage ΔVD from Kp1 to Kp1+Kp2. As a result, the control responsiveness of the DC voltage VD is improved, and as shown in Figure 7(B), the decrease in the DC voltage VD is suppressed to a small extent and maintained at a value higher than the lower limit voltage VL. Therefore, even if the capacitances of capacitors C1 to C4 are set to small values, as shown in Figure 7(A), the waveforms of each of the AC voltages VU, VV, and VW are maintained in a sinusoidal shape.

[0095] [Embodiment 2] Embodiment 2 describes another configuration example of the DC voltage control unit 22 shown in Figure 3.

[0096] Figure 8 is a block diagram showing a second configuration example of the DC voltage control unit 22 shown in Figure 3. As shown in Figure 8, the DC voltage control unit 22 is configured to include a controller 45, a switching circuit 47, and a detector 50.

[0097] The controller 45 includes a proportional controller 450, an integral controller 452, and an adder 454. The proportional controller 450 calculates the proportional control value Pt by multiplying the voltage ΔVD by the proportional gain Kp. The integral controller 452 calculates the integral control value It by integrating the value obtained by multiplying the voltage ΔVD by the integral gain Ki. The adder 454 adds the proportional control value Pt and the integral control value It, and outputs the sum as the current command value IDc.

[0098] Detector 50 has the same configuration and function as the detector 50 shown in Figure 6. As shown in Figure 6, Detector 50 detects whether the load 8 is in a relatively stable steady state or a rapidly changing transient state based on the detected value of the DC voltage VD and the detected value of the load current Io indicated by the output signal Iof of the current detector CD3, and outputs a detection signal φH indicating the detection result. The detection signal φH is set to an inactive level "L" when the load 8 is in a steady state, and to an active level "H" when the load 8 is in a transient state.

[0099] The switching circuit 47 receives a proportional gain KpH at the first input terminal and a proportional gain KpL at the second input terminal. The value of the proportional gain KpH is greater than the value of the proportional gain KpL (KpH > KpL).

[0100] The switching circuit 47 selects one of two input values ​​based on the detection signal φH from the detector 50 and outputs the selected value as a proportional gain Kp to the proportional controller 450. Specifically, the switching circuit 47 selects the proportional gain KpL when the detection signal φH is at the "L" level, i.e., when the load 8 is in a steady state. The switching circuit 47 selects the proportional gain KpH when the detection signal φH is at the "H" level, i.e., when the load 8 is in a transient state.

[0101] In the second configuration example, similar to the first configuration example shown in Figure 5, the DC voltage control unit 22 is configured to temporarily increase the value of the proportional gain Kp during transient changes in the load 8, thereby temporarily improving the control responsiveness of the DC voltage VD.

[0102] In the second configuration example, the value of the proportional gain Kp (KpL) when the load 8 is in a steady state is set, similar to the proportional gain Kp1 in the first configuration example, so that the response of the feedback control system (closed-loop control system) is slower than the fundamental frequency (commercial frequency) of the AC input voltage VI supplied from the commercial AC power supply 6, with the aim of keeping the input power factor at 1 in a steady state. The proportional gain KpL corresponds to one embodiment of the "first control gain".

[0103] In contrast, the value of the proportional gain Kp (KpH) during transient changes of load 8 is set, similar to the proportional gain Kp1 + Kp2 in the first configuration example, so that the DC voltage VD remains within the voltage range defined by the lower limit voltage VL and the upper limit voltage VH in response to transient changes of load 8. The proportional gain KpH corresponds to one embodiment of the "second control gain".

[0104] Therefore, in the second configuration example as well, while maintaining an input power factor of 1 by matching the DC voltage VD to the reference voltage VDR on average during steady-state operation, it is possible to suppress fluctuations in the DC voltage VD by making the DC voltage VD rapidly follow the reference voltage VDR during transient changes in the load 8.

[0105] Figure 9 is a block diagram showing a third configuration example of the DC voltage control unit 22 shown in Figure 3. As shown in Figure 9, the third configuration example differs from the first configuration example shown in Figure 5 in that it includes a timer 60.

[0106] Timer 60 outputs signal φ60 in response to the detection signal φH from detector 50. When the detection signal φH changes from "L" level to "H" level, Timer 60 changes signal φ60 from "L" level to "H" level and starts timing. Timer 60 changes signal φ60 from "H" level to "L" level when a predetermined time has elapsed since the detection signal φH changed to "H" level.

[0107] The switching circuit 44 selects one of two input values ​​based on the output signal φ60 of the timer 60 and outputs the selected input value to the adder 46 as the current command value IDc2. Specifically, the switching circuit 44 selects the proportional control value Pt2 when the output signal φ60 of the timer 60 is at the "H" level, and selects the value "0" when the output signal φ60 of the timer 60 is at the "L" level.

[0108] In the third configuration example, when a sudden change in the load 8 is detected by the detector 50, the value of the proportional gain Kp is increased for a predetermined time to improve the control responsiveness of the DC voltage VD. The predetermined time can be set, for example, by the user of the uninterruptible power supply using the operation unit 4 according to the specifications of the load 8. In the third configuration example as well, while maintaining an input power factor of 1 by matching the DC voltage VD to the reference voltage VDR on average in a steady state, it is possible to suppress fluctuations in the DC voltage VD by making the DC voltage VD follow the reference voltage VDR at high speed during transient changes in the load 8. As a result, the DC voltage VD can be stabilized even when using small capacitors C1 to C4.

[0109] <Effects> As described above, the uninterruptible power supply according to this embodiment is configured to temporarily enhance the control responsiveness of the DC voltage VD by the converter 1 during transient changes in the load 8. This makes it possible to suppress fluctuations in the DC voltage VD during transient changes in the load 8, even when using small capacitors C1 to C4.

[0110] In the embodiments described above, the power conversion device of this disclosure was described in the case where it is applied to a 3-level uninterruptible power supply equipped with three DC lines L1 to L3 and four capacitors C1 to C4. However, it is not limited to this, and the power conversion device of this disclosure can also be applied to a 2-level uninterruptible power supply equipped with two DC lines L1 and L3 and two capacitors C5 and C6, as shown in Figure 10. Alternatively, the power conversion device of this disclosure can also be applied to a motor drive device that drives an AC motor, etc.

[0111] In the uninterruptible power supply shown in Figure 10, the control device 64 controls the converter 61 such that, when the load 8 is in a steady state, the DC voltage VD between DC lines L1 and L3 becomes the reference voltage VDR, and the current flowing on the input side of the converter 61 (AC input current Ii) is in phase with the AC input voltage VI supplied from the commercial AC power supply 6, that is, the input power factor becomes 1.

[0112] Furthermore, during transient changes in the load 8, the control device 64 temporarily enhances the control responsiveness of the DC voltage VD by the converter 61, thereby allowing the DC voltage VD to quickly follow the reference voltage VDR. This prevents the DC voltage VD from falling below the lower limit voltage VL and also prevents the DC voltage VD from becoming excessively high above the upper limit voltage VH. This prevents the DC voltage VD from falling below the lower limit voltage VL and distorting the waveform of the AC output voltage VO. In addition, since the DC voltage VD can be kept at a voltage lower than the upper limit voltage VH, the efficiency of the uninterruptible power supply can be increased.

[0113] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of this disclosure is indicated by the claims and not by the foregoing description, and all modifications within the meaning and scope of the claims are intended to be included. [Explanation of Symbols]

[0114] 1,61 Converter, 1a,3a AC terminals, 1b,2b,3b positive voltage terminals, 1c,2c,3c neutral voltage terminals, 1d,2d,3d negative voltage terminals, 2 bidirectional chopper, 2a,T2 DC terminals, 3 inverter, 4 control unit, 5,64 control unit, 6 commercial AC power supply, 7 battery, 8 load, 10 power failure detector, 11,27,29,46,404,454 adder, 12,21,25,544 subtractor, 13 control circuit, 20 reference voltage generator, 22 DC voltage control unit, 23 sine wave generator, 24 multiplier, 26 current control unit, 28 balance control unit, 30 PWM control unit, 40 first controller, 42 second controller, 44,47 switching circuit, 45 controller, 50 detector, 52 first detector, 54 Second detector, 56 OR circuit, 60 timer, 400, 420, 450 proportional controllers, 402, 452 integrator controllers, 540 moving average circuit, 542 filter, 546 comparator, C1~C6 capacitors, CD1~CD3 current detectors.

Claims

1. A converter that converts AC power supplied from an AC power source into DC power and supplies it to a DC line, A capacitor connected to the DC line, An inverter that converts the DC power received from the DC line into AC power and supplies it to the load, The system includes a control device that controls the converter so that the DC voltage of the DC line becomes a reference voltage, The control device is When the load is in a steady state, the DC voltage of the DC line becomes the reference voltage, and the converter is controlled so that the current flowing on the input side of the converter is in phase with the AC input voltage supplied from the AC power supply. Based on at least one of the DC voltage of the DC line and the load current flowing through the load, a transient change in the load is detected. A power converter that, when a transient change in the load is detected, increases the control responsiveness of the DC voltage by the converter so that the DC voltage of the DC line becomes the reference voltage.

2. The control device is configured to generate a current command value for controlling the current flowing to the input side of the converter by performing a control calculation on the deviation between the reference voltage and the DC voltage. The power conversion device according to claim 1, wherein the control device temporarily increases the control gain used in the control calculation in response to the detection of a transient change in the load.

3. The control device includes a controller that generates the current command value by the control calculation for the deviation, The controller is, When the load is in a steady state, the current command value is generated by performing the control calculation using the first control gain. The power conversion device according to claim 2, wherein, when a transient change in the load is detected, the control calculation is performed using a second control gain that is greater than the first control gain to generate the current command value.

4. The power conversion device according to any one of claims 1 to 3, wherein the control device detects transient changes in the load when the DC voltage of the DC line deviates from a predetermined set voltage range, or when the harmonic components extracted from the load current deviate from a predetermined threshold range.

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