Semiconductor device and method for manufacturing the same

Abstract

Provided are: a semiconductor device in which an electronic element is fixed to a substrate, the semiconductor device being able to improve the connection reliability between the electronic element and the substrate; and a method for manufacturing the semiconductor device. The semiconductor device is configured to comprise: a substrate 10 provided with wiring and a wiring connection unit 12 for connection to the wiring; electronic elements 20, 30, 40, 50 electrically connected to the wiring connection unit 12 and fixed onto the substrate 10; and a resin film 60 that conforms to the shape of the electronic elements 20, 30, 40, 50, that covers the electronic elements 20, 30, 40, 50, and that is laminated onto one surface of the substrate 10.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the same.

Background Art

[0002] In recent years, the concept of the Internet of Things (IoT) has been proposed, and the advent of a society in which sensor devices are installed in everything and networked has been predicted. In such an IoT society, inexpensive and mass-producible devices are required, and an organic thin film transistor (OTFT) using an organic semiconductor (OSC) is regarded as a promising core element. Compared with silicon semiconductors that require a vacuum process, OSCs that can be formed by a low-cost printing method are excellent in processability, and since transistor operation is possible with an extremely thin film of several molecular layers, the material cost is also low. Furthermore, it has flexibility that is strong against mechanical stresses such as bending and distortion, and it is known that minute changes in transistor characteristics associated with this can be applied to sensing. Due to such cost and functional advantages, OTFTs are expected to greatly contribute to the realization of an IoT society.

[0003] A semiconductor device is configured such that various electronic elements such as OTFTs are fixed to a substrate and electrically connected by wiring. A general reflow process for electrically connecting electronic elements on a substrate includes a first step of forming a wiring pattern on the substrate by vapor deposition, plating, printing, etc., a second step of printing a solder paste, a third step of mounting the electronic elements, and a fourth step of melting the solder by heating to establish conduction between the electronic elements and the wiring.

[0004] Patent Document 1 discloses a method of forming a layer of solder paste on the upper surface of an electrode formed on a substrate by screen printing.

[0005] Patent Document 2 discloses a method for applying solder paste into through-holes of a flexible printed circuit board by screen printing. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2019-051667 [Patent Document 2] Japanese Patent Publication No. 2016-127205 [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] Incidentally, in semiconductor devices in which electronic elements are fixed to the above-mentioned substrate, the electrical connection between the electronic elements and the substrate could be impaired when the substrate was bent, when vibrations were applied to the substrate, or when the electronic elements were scratched by an external force. In particular, when the substrate was a flexible substrate, it was more susceptible to the effects of bending and vibration of the substrate.

[0008] In this specification, the reliability of the connection between an electronic element and a substrate when the substrate is bent, when vibration is applied to the substrate, and when the electronic element is scratched are referred to as bending resistance, vibration resistance, and scratch resistance, respectively.

[0009] This invention has been made in view of the above circumstances, and aims to provide a semiconductor device and a method for manufacturing the same that can improve the connection reliability between an electronic element and a substrate in a semiconductor device in which an electronic element is fixed to a substrate. [Means for solving the problem]

[0010] The semiconductor device of the present invention comprises a substrate provided with wiring and wiring connection portions for connecting to the wiring; an electronic element electrically connected to the wiring connection portion and fixed to the substrate; and a resin film laminated on one surface of the substrate, conforming to the shape of the electronic element and covering the electronic element.

[0011] The present invention provides a method for manufacturing a semiconductor device, comprising the steps of: providing wiring and wiring connection portions for connecting to the wiring on a substrate; fixing an electronic element to the substrate by electrically connecting to the wiring connection portions; and laminating a resin film on one surface of the substrate, conforming to the shape of the electronic element and covering the electronic element. [Effects of the Invention]

[0012] According to the present invention, in a semiconductor device in which electronic elements are fixed to a substrate, the reliability of the connection between the electronic elements and the substrate can be improved. [Brief explanation of the drawing]

[0013] [Figure 1] This is a plan view of a semiconductor device according to the first embodiment. [Figure 2] This is a cross-sectional view at A-A' in Figure 1. [Figure 3] This is a cross-sectional view showing the steps of the manufacturing method for a semiconductor device according to the first embodiment. [Figure 4] This is a cross-sectional view showing the process following Figure 3. [Figure 5] This is a cross-sectional view showing the process following Figure 4. [Figure 6] This is a cross-sectional view showing the process following Figure 5. [Figure 7] This is a cross-sectional view of a semiconductor device according to the second embodiment. [Figure 8] This is a cross-sectional view showing the steps of the manufacturing method for a semiconductor device according to the second embodiment. [Figure 9] This is a cross-sectional view showing the steps of the manufacturing method for a semiconductor device according to the first modified example. [Figure 10] This is a cross-sectional view showing the steps of a second modified example of a semiconductor device manufacturing method. [Embodiment for Carrying out the Invention]

[0014] [First Embodiment] (Overall Configuration of Semiconductor Device) FIG. 1 is a plan view of the semiconductor device according to this embodiment. FIG. 2 is a cross-sectional view taken along A-A' of FIG. 1. The semiconductor device 1 includes a substrate 10, electronic elements 20, 30, 40, 50, and a resin film 60.

[0015] (Substrate) The substrate 10 has wirings 11 and wiring connection portions 12 formed thereon. The substrate 10 is, for example, a flexible substrate. The thickness of the substrate 10 is, for example, not less than 10 μm and not more than 300 μm. The substrate 10 is formed of, for example, polyimide (PI: polyimide). Alternatively, the substrate 10 is formed of a general-purpose resin film such as polyethylene naphthalate (PEN: polyethylene naphthalate), polyethylene terephthalate (PET: polyethylene terephthalate), polylactic acid (PLA: polylactic acid), epoxy resin, or acrylic resin, which has lower heat resistance than polyimide. Here, the substrate 10 is not limited to a single-layer substrate. As the substrate 10, a multilayer wiring substrate in which a plurality of flexible substrates each having at least the wiring 11 formed thereon are laminated can be used. Also, as the substrate 10, instead of laminating a plurality of flexible substrates, a multilayer wiring substrate in which a plurality of conductive layers and insulating layers are alternately laminated on a single-layer substrate can also be used. When a multilayer wiring substrate is used as the substrate 10, it is preferable that the wiring connection portion 12 is formed in addition to the wiring 11 on at least the uppermost flexible substrate among the plurality of laminated flexible substrates.

[0016] (Wiring and Wiring Connection Portion) The wiring 11 and the wiring connection part 12 connected to the wiring 11 are provided on the substrate 10. The wiring 11 and the wiring connection part 12 are formed of the same material and, for example, are further formed with the same thickness (height). The wiring 11 and the wiring connection part 12 are, for example, formed simultaneously by one manufacturing process. When the wiring 11 and the wiring connection part 12 are formed simultaneously by one manufacturing process, the wiring 11 and the wiring connection part 12 are formed of the same material and have the same thickness (height). The wiring 11 and the wiring connection part 12 are obtained, for example, by printing a conductive paste in a predetermined wiring pattern with a predetermined thickness of 1 μm or more and 300 μm or less and then curing it. The conductive paste is obtained by dispersing a conductive filler in an organic dispersion medium such as a binder resin or an aqueous dispersion medium such as an aqueous silicate solution, and can be cured by firing, light irradiation, or drying and used as a conductive layer. As the conductive filler, metal particles such as silver, copper, and nickel, carbon flakes, carbon particles, or carbon black such as carbon nanotubes can be used. The particle size of the conductive filler is, for example, 0.1 μm or more and several tens of μm or less. The accuracy of Line / Space by screen printing is, for example, L / S of 50 μm / 50 μm.

[0017] The conductive paste used for the wiring 11 and the wiring connection part 12 of the present embodiment is not particularly limited thereto, but the curing temperature is 130°C or lower, more preferably 100°C or lower. With this configuration, even when a flexible substrate is used as the substrate 10 or when an organic semiconductor element is mounted as the electronic element 50, the wiring connection part 12 and the electronic element 50 can be connected without damaging the substrate 10 or the electronic element 50.

[0018] (Electronic element) Electronic elements 20, 30, 40, and 50 are electrically connected to the wiring connection section 12 and fixed to the substrate 10. Each of the electronic elements 20, 30, 40, and 50 may be an active element such as a transistor and an integrated circuit, or a passive element such as a resistor and a sensor. Electronic elements 20, 30, 40, and 50 may include both active and passive elements. In Figures 1 and 2, electronic elements 20, 40, and 50 represent active elements, and electronic element 30 represents a passive element. The configuration may include multiple electronic elements as shown in Figures 1 and 2, but it may also include only one.

[0019] Electronic elements 20, 30, 40, and 50 may each be either inorganic semiconductor elements formed from silicon or the like, or organic semiconductor elements formed from organic materials. In Figures 1 and 2, electronic elements 20, 30, and 40 represent inorganic semiconductor elements, while electronic element 50 represents an organic semiconductor element.

[0020] (Inorganic semiconductor device) The electronic element 20 includes a semiconductor element 21. The semiconductor element 21 is an inorganic semiconductor element including an active element, and includes, for example, a MOS (Metal-Oxide-Semiconductor) transistor in which a gate electrode is stacked on an active region provided in a silicon semiconductor region via a gate insulating film, and source and drain regions are formed in the silicon semiconductor region on both sides of the gate electrode, sandwiching the active region. It may also include a thin-film transistor (TFT) in which the silicon semiconductor region is a thin-film semiconductor layer provided on a support substrate. Convex electrodes 22 and 23, such as bumps, are formed connected to the semiconductor element 21. Although six electrodes 22 and 23 are shown in the drawing, the number of electrodes is arbitrary. The outermost layer of the semiconductor element 21, except for the portions of electrodes 22 and 23, is sealed with an unillustrated sealing layer made of epoxy resin or the like. Electrodes 22 and 23 are electrically connected and fixed to the wiring connection portion 12.

[0021] The electronic element 30 includes a semiconductor element 31. The semiconductor element 31 is an inorganic semiconductor element including a passive element, and includes, for example, a resistive element having a resistive region provided in a silicon semiconductor region. Electrodes 32 and 33 are formed connected to the semiconductor element 31. Although two electrodes 32 and 33 are shown in the drawing, the number of electrodes is arbitrary. The outermost layer of the semiconductor element 31, except for the portions of electrodes 32 and 33, is sealed with an unillustrated sealing layer made of epoxy resin or the like. Electrodes 32 and 33 are electrically connected and fixed to the wiring connection portion 12.

[0022] The electronic element 40 includes a semiconductor element 41. The semiconductor element 41 is an inorganic semiconductor element including an active element. For example, a semiconductor chip on which a MOS transistor or the like is formed is mounted on a lead frame, the semiconductor chip and leads are connected by bonding wires, and the semiconductor chip and bonding wires are covered and sealed with an unillustrated sealing layer made of epoxy resin or the like. The semiconductor element 41 may also include a TFT. As shown in Figure 2, lead electrodes 42 and 43 extend outward from the semiconductor element 41. Although six lead electrodes 42 and 43 are shown in the drawing, the number of lead electrodes is arbitrary. The lead electrodes 42 and 43 are electrically connected and fixed to the wiring connection part 12.

[0023] (Organic semiconductor device) The electronic element 50 includes a semiconductor element 52 provided on a substrate 51. The semiconductor element 52 is an organic semiconductor element that includes either an active element such as a transistor or integrated circuit, or a passive element such as a resistive element or a sensor. The semiconductor element 52 may include both an active element and a passive element. The semiconductor element 52 includes, for example, an organic thin-film transistor (OTFT) in which a gate electrode is laminated on an active region provided on an organic semiconductor film via a gate insulating film, and source-drain regions are formed on both sides of the gate electrode, sandwiching the active region. Convex electrodes 53 and 54, such as bumps, are formed connected to the semiconductor element 52. Although six electrodes 53 and 54 are shown in the drawing, the number of electrodes is arbitrary. The outermost layer of the semiconductor element 52, except for the portions of electrodes 53 and 54, is sealed with an unillustrated sealing layer made of a barrier film or fluororesin. The electrodes 53 and 54 are electrically connected and fixed to the wiring connection portion 12.

[0024] The semiconductor device 52 is constructed using thin-film transistors, with the active region of the thin-film transistor further formed from an organic semiconductor film. Unlike existing silicon semiconductors, semiconductor devices with an active region formed from an organic semiconductor film can be manufactured using coating and printing processes in air. Thus, the configuration in which the active region of the thin-film transistor is made of an organic semiconductor can be manufactured using a very simple process, making it possible to handle small-volume, high-mix production and, furthermore, enabling the introduction of devices at a very low cost.

[0025] Methods for forming organic semiconductor films using organic semiconductors include PVD (Physical Vapor Deposition) methods, such as vacuum deposition; plated and plateless printing methods using inks containing organic semiconductor materials; and edge casting and continuous edge casting methods using solutions of dissolved organic semiconductor materials. The edge casting method is described in detail, for example, in Japanese Patent Publication No. 2015-185620, and the continuous edge casting method is described in detail, for example, in Japanese Patent Publication No. 2017-147456. When using the PVD method or continuous edge casting method, the shape of the organic semiconductor film may be patterned by photolithography or the like after forming the organic semiconductor film on the entire upper surface of the insulating film, or it may be formed in a patterned state using a mask. The organic semiconductor film is preferably a single crystal film of organic semiconductor.

[0026] Materials for n-type organic semiconductor films include PDI1MPCN2 (N,N'-di((S)-1-methylpentyl)-1,7(6)-dicyano-perylene-3,4:9,10-bis-(dicarboximide)), PDI-FCN2 (N-fluoroalkylated dicyanoperylene-3,4:9,10-bis(dicarboximides)), PDI-C8(N,N'-dioctyl perylene diimide), PDI-C13(N,N'-ditridecyl perylene diimide), PDI-8CN2(N,N'-bis(n-octyl),1,6-dicyanoperylene-3,4:9,10-bis(dicarboximide)), PBI-F2, PBI-F4(fluoro-sub-stituted PBI(Perylene tetracarboxylic acid bisimide) derivatives), F 16Examples include CuPc (Copper hexadecafluoro phthalocyanine), TC-PTCDI (tetra-chloroperylene tetracarboxyldiimide), BPE-PTCDI (N,N‘-bis(2-phenylethyl)perylene-3,4:9:10-bis-(dicarboximide)), 2,9-diphenethylanthra[9,1,2-cde:10,5,6-c'd'e']bis([2,7]naphthyridine)-1,3,8,10(2H,9H)-tetraone, etc.

[0027] Furthermore, examples of materials for p-type organic semiconductor films that can be deposited by vapor deposition include pentacene and copper phthalocyanine. Additionally, examples of materials for p-type organic semiconductor films that can be deposited by plated printing, plateless printing, or edge casting include Tips-Pentacene (6,13-bis(triisopropylsilylethynyl)pentacene), NSFAAP (13,6-N-sulfinylacetamidopentacene), DMP (6,13-Dihydro-6,13-methanopentacene-15-one), and pentacene-N-sulfinyl-n-butylcarbamate adduct. Pentacene precursors such as adduct, pentacene-N-sulfinyl-tert-butylcarbamate, BTBT ([1]benzothieno[3,2-b]benzothiophene), and C10-DNBDT (3,11-didecyldinaphtho[2,3-d:2',3'-d']benzo[1,2-b:4,5-b']dithiophene) are representative of pentacene precursors such as adduct, pentacene-N-sulfinyl-tert-butylcarbamate, BTBT ([1]benzothieno[3,2-b]benzothiophene), and C10-DNBDT (3,11-didecyldinaphtho[2,3-d:2',3'-d']benzo[1,2-b:4,5-b']dithiophene). Examples include low molecular weight compounds such as (3,11-didecyldinaphto[2,3-d:2',3'-d']benzo[1,2-b:4,5-b']dithiophene)) and C9-DNBDT, which has a different side chain length, compounds with a benzobisthiadiazole skeleton, porphyrins, benzoporphyrins, and oligothiophenes having alkyl groups as soluble groups, as well as high molecular weight compounds such as oligomers, polythiophenes, fluorene copolymers, and IDT-BT (indacenodithiophene benzothiadiazole) and CDT-BT (Cyclopentadithiophene benzothiadiazole) which have a DA structure.

[0028] It is also preferable to form the active region, which is an organic semiconductor film, from a semiconductor composed of carbon nanotubes, graphene, oxide semiconductors, or metal compounds such as black phosphorus. Thin-film transistors with carbon nanotubes as the active region are described in detail in, for example, Japanese Patent No. 6005204, "Dong-ming Sun et al., “Flexible high-performance carbon nanotube integrated circuits”, Nature Nanotechnology volume 6, pages 156-161 (2011)", "Donglai Zhong et al., "Gigahertz integrated circuits based on carbon nanotube films”, Nature Electronics volume 1, pages 40-45 (2018)", and "Jianshi Tang et al., “Flexible CMOS integrated circuits based on carbon nanotubes with sub-10 ns stage delays”, Nature Electronics volume 1, pages 191-196 (2018)".

[0029] For thin-film transistors with graphene as the active region, see, for example, Japanese Patent Publication No. 2013-253010, "Seunghyun Le eThis is described in detail in "Flexible and Transparent All-Graphene Circuits for Quaternary Digital Modulations" by et al., Nature Communications volume 3, Article number: 1018 (2012), "Shu-Jen Han1 et al., "Graphene radio frequency receiver integrated circuit" by Nature Communications volume 5, Article number: 3086 (2014), and "Yu-Ming Lin et al., "Wafer-Scale Graphene Integrated Circuit" by Science 10 Jun 2011, Vol. 332, Issue 6035, pp. 1294-1297".

[0030] For thin-film transistors in which the active region is an oxide semiconductor, see, for example, Japanese Patent Publication No. 2017-76789, Japanese Patent Publication No. 2018-50043, and "Hiroaki Ozak i et al., “Wireless operations for 13.56-MHz band RFID tag using amorphous oxide TFTs”, IEICE Electronics Express Volume 8 (2011) Issue 4 Pages 225-231, “Ming-Hao Hung et al., “Ultra Low Voltage IV RFID Tag Implement in a IThis is described in detail in "GZO TFT Technology on Plastic," 2017 IEEE International Conference on RFID (RFID), and "Byung-Do Yang et al., “A Transparent Logic Circuit for RFID Tag in a-IGZO TFT Technology,” ETRI Journal Volume 35, Issue 4 August 2013, Pages 610-616."

[0031] Thin-film transistors in which the active region is a semiconductor made of a black phosphorus metal compound are described in detail, for example, in Japanese Patent Publication No. 2018-14359, Japanese Patent Publication No. 2018-98338, "Xuewei Feng et al., “Complementary Black Phosphorus Nanoribbons Field-Effect Transistors and Circuits” IEEE Transactions on Electron Devices Volume 65, Issue 10, Oct. 2018 Page(s): 4122 - 4128", and "Peng Wu et al., “High Performance Complementary Black Phosphorus FETs and Inverter Circuits Operating at Record-Low VDD down to 0.2V”, 2018 76th Device Research Conference (DRC)".

[0032] The electronic elements 20, 30, 40, and 50 of this embodiment are not particularly limited, but preferably, other materials other than solder and the material constituting the wiring connection part 12 (for example, a predetermined conductive paste) (for example, a conductive paste different from the conductive paste constituting the wiring connection part 12) are electrically connected to the wiring connection part 12 without interposing any material between the wiring connection part 12 and the electrodes of each of the electronic elements 20, 30, 40, and 50.

[0033] (Resin film) In the semiconductor device 1 of this embodiment, the resin film 60 is composed of two resin films 60A and 60B. Resin film 60A conforms to the shape of the electronic elements 20, 30, 40, and 50 and covers them, and is laminated on one surface of the substrate 10. Resin film 60B is further laminated on the other surface of the substrate 10. The thickness of resin films 60A and 60B is, for example, 10 μm to 300 μm. Resin films 60A and 60B are formed from, for example, polyethylene terephthalate (PET), polystyrene (PS), polyamide (PA), polyethylene (PE), polypropylene (PP), polyvinyl chloride (PVC), polymethyl methacrylate (PMMA), etc. The resin film 60A conforms to the shape of the electronic elements 20, 30, 40, and 50 and covers them, but a gap may be left between the substrate 10 and the electronic elements 20, 30, 40, and 50. Here, the gap is a space that exists between the substrate 10 and the electronic elements 20, 30, 40, and 50, and is on the back side of the electronic elements 20, 30, 40, and 50 from the perspective of the resin film 60A, making it difficult to fill with the resin film 60A. Some air bubbles may remain between the substrate 10 and the resin films 60A and 60B, but the fewer the bubbles, the better the adhesion between the substrate 10 and the resin films 60A and 60B, which is preferable. Here, bubbles are spaces between the substrate 10 and the resin films 60A and 60B that could not be filled by the resin films 60A and 60B. The more conformable the resin films 60A and 60B are, the fewer bubbles will remain between the substrate 10 and the resin films 60A and 60B. As described later, the amount of bubbles remaining between the substrate 10 and the resin films 60A and 60B can be controlled by the lamination method and conditions of the resin films 60A and 60B.

[0034] (Method of manufacturing semiconductor devices) The method for manufacturing a semiconductor device according to this embodiment will be described below with reference to Figures 3 to 6. Figures 3 to 6 show each step of the method for manufacturing a semiconductor device according to this embodiment and are cross-sectional views corresponding to Figure 2. First, as shown in Figure 3, a substrate 10 is prepared. Here, for example, a flexible substrate is prepared as the substrate 10.

[0035] Next, as shown in Figure 4, a conductive paste is printed on the substrate 10, for example, by screen printing, to form uncured wiring 11A and uncured wiring connection parts 12A connected to the wiring 11A. Preferably, the wiring 11A and the wiring connection parts 12A are formed from the same material, and more preferably, from the same thickness. This allows the wiring 11A and the wiring connection parts 12A to be formed simultaneously in a single manufacturing process. For example, a conductive paste that will become the wiring 11A and the wiring connection parts 12A is printed to a predetermined thickness of 1 μm to 300 μm. The conductive paste printed with a predetermined wiring pattern can be cured to form a conductive layer of the predetermined pattern, i.e., wiring 11 and wiring connection parts 12. Here, a conductive paste with high viscosity and viscoelasticity is used. The viscosity is, for example, 20 Pa·s or more, more preferably 100 Pa·s or more. When the conductive paste is printed by other printing methods such as spray printing, the viscosity should be appropriate for each printing method. For example, in spray printing, the viscosity is preferably 5 Pa·s or less, for example, 0.5 Pa·s.

[0036] In the semiconductor device manufacturing method of this embodiment, before the conductive paste printed as described above hardens, the electronic elements 20, 30, 40, and 50 are placed on the wiring connection portion 12A as shown in Figure 5. For example, the electronic elements 20, 30, 40, and 50 are each adsorbed by a suction collet and placed in predetermined positions such that each electrode of the electronic elements 20, 30, 40, and 50 is in contact with the upper surface of the wiring connection portion 12A. Due to the viscosity and viscoelasticity of the conductive paste, each electronic element 20, 30, 40, and 50 is temporarily fixed on the wiring connection portion 12A.

[0037] Next, a curing treatment such as firing, light irradiation, or drying is performed to cure the wiring 11A and wiring connection part 12A, which are made of uncured conductive paste. In the case of thermosetting conductive paste, for example, the entire assembly is fired at 130°C or below (100°C or below depending on the type of conductive paste). In the case of photocuring conductive paste, light with wavelengths in the visible to ultraviolet region is irradiated. This allows the conductive paste to be cured into a conductive layer, and as the conductive paste hardens, the electronic elements 20, 30, 40, and 50 can be electrically connected and fixed to the cured wiring connection part 12.

[0038] Next, as shown in Figure 6, a resin film 60A is laminated on one surface of the substrate 10, following the shape of the electronic elements 20, 30, 40, and 50 and covering them. Furthermore, simultaneously with the lamination of resin film 60A, a resin film 60B is laminated on the other surface of the substrate 10. In this embodiment, the lamination of resin films 60A and 60B on the substrate 10 is performed in a vacuum or reduced pressure space indicated by pressure P1. Laminating resin films 60A and 60B in a vacuum or reduced pressure space improves the adhesion between the substrate 10 and the resin films 60A and 60B due to the pressure difference when removed under atmospheric pressure. As a result, laminating resin films 60A and 60B in a vacuum or reduced pressure space reduces the number of air bubbles remaining between the substrate 10 and the resin films 60A and 60B compared to laminating resin films 60A and 60B in the atmosphere, thereby improving the adhesion between the substrate 10 and the resin films 60A and 60B.

[0039] The percentage of the adhesion area is defined as the proportion of the area where the substrate 10 and the resin film 60A face each other, excluding the areas of electronic elements 20, 30, 40, and 50, that is, the area where adhesion to the substrate 10 is possible depending on the conformability of the resin film 60A, and where the adhesion area is actually in contact with the substrate 10. The percentage of the adhesion area increases as the number of air bubbles remaining between the substrate 10 and the resin films 60A and 60B decreases. The percentage of the adhesion area is preferably 80% or more, and more preferably 90% or more. On the back side of the substrate 10 where electronic elements 20, 30, 40, and 50 are not mounted, the percentage of the adhesion area between the resin film 60B and the substrate 10 is approximately 100%, although this depends on the presence or absence of wiring patterns, etc.

[0040] (Effects / Actions) In this embodiment, the semiconductor device has a resin film laminated on one surface of the substrate that conforms to the shape of the electronic elements and covers them, thereby improving the reliability of the connection between the electronic elements and the substrate. In particular, when the substrate is a flexible substrate, the reliability of the connection tends to decrease due to the effects of bending and vibration of the substrate, but in the semiconductor device of this embodiment, bending resistance, vibration resistance, and scratch resistance can be improved, thereby improving the reliability of the connection.

[0041] Using a flexible substrate allows for weight reduction and lower costs compared to using a rigid substrate, but it can sometimes reduce the rigidity of the semiconductor device. As in this embodiment, laminating a resin film can increase the overall rigidity of the semiconductor device. Furthermore, flexible substrates are thinner than rigid substrates, offering advantages such as higher heat dissipation and thermal conductivity. Higher heat dissipation is particularly desirable when mounting electronic components that consume large currents. Also, for example, when mounting a temperature sensor, higher thermal conductivity is preferable for measuring the temperature of the object.

[0042] Furthermore, in the semiconductor device manufacturing method of this embodiment, a conductive paste is printed, electronic elements are placed, and the conductive paste is cured. This allows for the simultaneous formation of wiring and wiring connections, and enables the electronic elements to be electrically connected and fixed to the cured wiring connections.

[0043] In the semiconductor device manufacturing method of this embodiment, the number of steps can be reduced because the solder printing process is not performed. Furthermore, the alignment adjustment between the wiring pattern and the solder printing is omitted, simplifying the process. In addition, since solder is not used, the problem of bonding between the wiring metal material and solder due to oxide film can be avoided. Moreover, fixing and conductivity of electronic elements can be achieved at low temperatures of 130°C or below, and by eliminating high-temperature processes, it becomes possible to select materials with low heat resistance for the substrate. In other words, it becomes possible to use general-purpose resin films such as PEN, PET, PLA, epoxy resin, and acrylic resin, which have lower heat resistance than polyimide. Therefore, these can be used as inexpensive, colorless, transparent flexible substrates. Furthermore, the risk of thermal damage to organic semiconductor elements such as OTFTs during the mounting process can be reduced.

[0044] The wiring 11 and wiring connection 12 can be formed by applying a conductive paste in a predetermined pattern using printing methods such as inkjet printing, spray printing, or screen printing. Screen printing is an inexpensive and simple method for patterning conductive paste, and it offers the following advantages in circuit wiring; therefore, it is preferable to form the wiring 11 and wiring connection 12 by screen printing.

[0045] Screen printing allows for print patterns to be thicker than 10 μm, reducing wiring resistance. Furthermore, the equipment and printing plates are inexpensive, and the paste used for printing can be recovered, resulting in minimal waste and lower costs. The usable conductive filler particle size ranges widely from 0.1 μm to several tens of μm, offering a wide selection of conductive pastes. Screen printing is possible on films, fabrics, glass, metals, and other materials, providing a broad range of printing options. For the curing process of conductive paste, firing at low temperatures of 130°C or below, and even below 100°C depending on the type of paste, is possible. Lamination printing is possible by creating insulating layers between multiple conductive paste layers, enabling multi-layer wiring and intersecting wiring patterns. Line / Space accuracy of 50 μm / 50 μm can be achieved, providing practical accuracy for electronic circuit wiring. Printing is possible from millimeter scale to meter scale, accommodating a wide range of sizes.

[0046] Screen printing can be done using either a metal mask or a mesh screen. The mesh screen method offers the following advantages: higher pattern accuracy than metal masks; the ability to print densely packed patterns and hollow patterns; and high screen durability, allowing for repeated use and making it suitable for mass production.

[0047] [Second Embodiment] Figure 7 is a cross-sectional view of the semiconductor device according to this embodiment. In the semiconductor device 2 of this embodiment, a resin film 60A is laminated only on one side of the substrate 10 on which the electronic elements 20, 30, 40, and 50 are mounted, following the shape of the electronic elements 20, 30, 40, and 50 and covering them. No resin film is laminated on the other side of the substrate 10. Except as described above, it is the same as the first embodiment.

[0048] Figure 8 is a cross-sectional view showing the steps of the semiconductor device manufacturing method according to this embodiment. Similar to the first embodiment, in the step of printing conductive paste that will form wiring and wiring connection parts onto a substrate, arranging electronic elements, curing the conductive paste, and then laminating a resin film, the resin film 60A is laminated only on one side of the substrate 10 on which the electronic elements 20, 30, 40, 50 are mounted, following the shape of the electronic elements 20, 30, 40, 50 and covering them. No resin film is laminated on the other side of the substrate 10. Except for the above, it is the same as the first embodiment.

[0049] In this embodiment, the semiconductor device has a resin film laminated on one surface of the substrate that conforms to the shape of the electronic elements and covers them, thereby improving the reliability of the connection between the electronic elements and the substrate. In particular, when the substrate is a flexible substrate, the reliability of the connection tends to decrease due to the effects of bending and vibration of the substrate, but in the semiconductor device of this embodiment, bending resistance, vibration resistance, and scratch resistance can be improved, thereby improving the reliability of the connection.

[0050] [First variation] Figure 9 is a cross-sectional view showing the steps of the manufacturing method for the semiconductor device according to this modified example. As shown in Figure 9, in the step of laminating resin film 60A on one side of substrate 10 and resin film 60B on the other side of substrate 10, the resin films 60A and 60B are laminated on one side and the other side of substrate 10 while the pressure P1 in the space on the substrate 10 side of resin films 60A and 60B is lower than the pressure P2 in the space on the opposite side of resin films 60A and 60B from substrate 10. That is, the pressure in each space partitioned by resin films 60A and 60B is adjusted by the Three-Dimensional Overlay Method (TOM). For example, the space on the substrate 10 side of resin films 60A and 60B is in a vacuum or reduced pressure atmosphere, and the space on the opposite side of resin films 60A and 60B from substrate 10 is in an atmospheric pressure or pressurized atmosphere. Except for the above, it is the same as the first embodiment.

[0051] As described above, when resin films 60A and 60B are laminated using the TOM method, that is, when the pressure in the space on the substrate side of resin films 60A and 60B is lower than the pressure in the space on the opposite side of resin films 60A and 60B from the substrate, air bubbles remaining between the substrate 10 and resin films 60A and 60B can be almost completely eliminated. The proportion of the adhesion area between the substrate 10 and resin film 60A is increased to over 95%. The conformability of resin film 60A to electronic elements 20, 30, 40, and 50 is improved, and the adhesion of resin film 60A to electronic elements 20, 30, 40, and 50 and the substrate 10 is improved. On the back side of the substrate 10 where electronic elements 20, 30, 40, and 50 are not mounted, the proportion of the adhesion area between resin film 60B and the substrate 10 is almost 100%, although this depends on the presence or absence of wiring patterns, etc.

[0052] [Second variation] Figure 10 is a cross-sectional view showing the steps of the manufacturing method for the semiconductor device according to this modified example. As shown in Figure 10, in the step of laminating the resin film 60A onto one surface of the substrate 10, the resin film 60A is laminated onto one surface of the substrate 10 while the pressure P1 in the space of the resin film 60A on the substrate 10 side is lower than the pressure P2 in the space of the resin film 60A on the opposite side of the substrate 10. Similar to the first modified example, the pressure in each space partitioned by the resin film 60A is adjusted by the TOM method. For example, the space of the resin film 60A on the substrate 10 side is in a vacuum or reduced pressure atmosphere, and the space of the resin film 60A on the opposite side of the substrate 10 is in an atmospheric pressure or pressurized atmosphere. Except for the above, it is the same as the second embodiment.

[0053] As described above, when the resin film 60A is laminated using the TOM method, that is, when the pressure in the space on the substrate side of the resin film 60A is lower than the pressure in the space on the opposite side of the resin film 60A, air bubbles remaining between the substrate 10 and the resin film 60A can be almost completely eliminated. The conformability of the resin film 60A to the electronic elements 20, 30, 40, and 50 is improved, and the adhesion of the resin film 60A to the electronic elements 20, 30, 40, and 50 and the substrate 10 is enhanced.

[0054] [First Embodiment] A film-like substrate (50 μm thick) made of polyimide (PI) was screen-printed with a thermosetting silver paste (viscosity 130 Pa·s) using a metal mask (50 μm thick) to form uncured wiring and wiring connections. Resistors were placed on the uncured wiring connections, and the substrate was baked at 130°C for 30 minutes to cure the uncured wiring and wiring connections. In this way, a module was created on the substrate with wiring and wiring connections formed, and resistors mounted on it.

[0055] We achieved a wiring line / space accuracy of 200μm / 200μm. We measured the resistance values ​​on the circuit with a tester to confirm that they matched the specified resistance values ​​for the resistors, and confirmed that continuity between the resistors, wiring, and wiring connections was ensured. We performed load tests such as bending the substrate with a radius of curvature of 10mm (hereinafter referred to as the "bending test"), generating a 100Hz sine wave using a vibrator and applying an acceleration vibration of about 10G to the substrate for 2 hours (hereinafter referred to as the "vibration test"), and scratching the resistors (specifically pressing the resistors with the tip of tweezers) (hereinafter, tests in which electronic components such as resistors are scratched are referred to as the "scratch test"), but the resistors did not come off. Furthermore, we performed a cross-cut test on the wiring to evaluate the degree of adhesion of the silver paste, but no peeling was observed.

[0056] On the aforementioned substrate, wiring and wiring connections were formed, and a resistor was mounted on the module. A 50 μm thick PET film was then laminated onto both sides of the module in a vacuum. On the resistor mounting side, the PET film conformed to the shape of the resistor and covered it during the lamination process. This further improved the reliability of the connections between the resistor and the wiring and wiring connections.

[0057] [Second Example] A film-like substrate (125 μm thick) made of polyethylene naphthalate (PEN) was screen-printed with a thermosetting silver paste (viscosity 130 Pa·s) using a metal mask (50 μm thick) to form uncured wiring and wiring connections. Seven temperature sensors were placed on the uncured wiring connections, and the substrate was baked at 130°C for 30 minutes to cure the uncured wiring and wiring connections. In this way, a module was created on the substrate with wiring and wiring connections formed, and equipped with seven temperature sensors.

[0058] We achieved a wiring accuracy of L / S of 350μm / 150μm in terms of Line / Space precision. We confirmed that the output of the temperature sensor on the circuit changed in accordance with the ambient temperature, and that continuity between the temperature sensor, wiring, and wiring connections was ensured. The temperature sensor did not detach even after performing various load tests, including bending tests, vibration tests, and scratch tests on the temperature sensor.

[0059] A module with wiring and wiring connections formed on the above substrate, and a temperature sensor mounted on it, was laminated with 50 μm thick PET film on both sides of the module in a vacuum. On the side where the temperature sensor is mounted, the PET film conformed to the shape of the temperature sensor and covered the temperature sensor during lamination. This further improved the reliability of the connection between the temperature sensor and the wiring and wiring connections.

[0060] [Third Embodiment] A film-like substrate (50 μm thick) made of polyimide (PI) was spray-printed with a thermosetting carbon paste (viscosity 0.5 Pa·s) using a metal mask (50 μm thick) to form wiring and wiring connections. Resistors were then connected to the wiring connections using additional carbon paste to create a module in which resistors were mounted on the substrate with the wiring and wiring connections already formed.

[0061] The module obtained as described above achieved a wiring line / space accuracy of L / S of 200 μm / 200 μm. The resistance values ​​on the circuit were measured with a tester to confirm that they matched the specified resistance values ​​for the resistors, and that continuity between the resistors, wiring, and wiring connections was ensured. Even when subjected to bending tests or vibration tests, the resistors remained in place. However, Temperature sensor A scratch test against, or Temperature sensor When we conducted a test to attach it with adhesive tape (adhesion strength 3.93N / 10mm), the resistor came off.

[0062] Wiring and wiring connections were formed on the above substrate, and a module with a resistor mounted on it was laminated with a 50 μm thick PET film on both sides of the module in a vacuum. On the side where the resistor is mounted, the PET film conforms to the shape of the resistor, and Temperature sensor The PET film was covered and laminated. When the PET film was laminated in a vacuum atmosphere as in this embodiment, the number of air bubbles between the substrate and resistors and the PET film was reduced compared to when the PET film was laminated in air. As a result, the adhesion between the PET film and the substrate and resistors was improved. When bending tests or vibration tests were performed on the module laminated with the PET film of this embodiment, the resistors did not come off. Furthermore, in the module laminated with the PET film of this embodiment, Temperature sensor A scratch test against, or Temperature sensor Even when tested by attaching the resistor with adhesive tape (adhesion strength 3.93N / 10mm), the resistor did not come off. In this way, the reliability of the connection between the resistor and the wiring and wiring connections was further improved.

[0063] [Fourth embodiment] In the third embodiment, a module was formed on a substrate with wiring and wiring connections and a resistor mounted on it. A PET film with a thickness of 50 μm was laminated on both sides of the module. In this process of laminating the PET film, the space on the module side of the PET film was in a vacuum atmosphere, and the space on the opposite side of the module was in an atmospheric pressure atmosphere. On the resistor mounting surface, the PET film conformed to the shape of the resistor. Temperature sensor The PET film was covered and laminated. Here, as described above, the space on the module side of the PET film was in a vacuum atmosphere, and the space on the opposite side of the PET film from the module was in an atmospheric pressure atmosphere, so that there were almost no air bubbles remaining between the substrate and resistors and the PET film. On the resistor mounting side of the substrate, the proportion of the contact area between the substrate and the PET film was increased to 95%. As a result, the adhesion between the PET film and the substrate and resistors was further improved. In the module laminated with the PET film of this embodiment, bending tests, vibration tests, Temperature sensor A scratch test against, or Temperature sensor Even when tested by attaching the resistor with adhesive tape (adhesion strength 3.93N / 10mm), the resistor did not come off. In this way, the reliability of the connection between the resistor and the wiring and wiring connections was further improved.

[0064] The embodiments and modifications described above describe semiconductor devices equipped with multiple electronic elements, but the invention is not limited to these, and a semiconductor device equipped with only one electronic element may also be used. The electronic elements described above include electronic elements including active elements such as transistors and electronic elements including passive elements such as resistors, but an electronic element may include both active and passive elements on a single chip. [Explanation of Symbols]

[0065] 1,2 Semiconductor devices 10 circuit boards 11 Wiring 12 Wiring connection section 20, 30, 40, 50 Electronic elements 21, 31, 41, 52 Semiconductor devices 22,23,32,33,53,54 electrode 42,43 Lead electrodes 51 circuit boards 60, 60A, 60B resin film

Claims

1. A flexible circuit board provided with wiring and wiring connection parts for connecting to the wiring, An electronic element that is electrically connected to the wiring connection portion and fixed to the flexible substrate, A resin film is laminated on one surface of the flexible substrate, conforming to the shape of the electronic element and covering the electronic element. Equipped with, The wiring and the wiring connection are formed from the same material and with the same thickness, and are obtained by printing and curing a thermosetting conductive paste with a curing temperature of 130°C or lower. The electronic element is electrically connected to the wiring connection without any material other than the material constituting the wiring connection being interposed between the wiring connection and the electrodes of the electronic element. Semiconductor equipment.

2. The aforementioned electronic element includes an organic semiconductor element. The semiconductor device according to claim 1.

3. The aforementioned flexible circuit board is a multilayer wiring board. The semiconductor device according to claim 1 or 2.

4. The resin film is further laminated on the other surface of the flexible substrate. The semiconductor device according to any one of claims 1 to 3.

5. A step of providing wiring and wiring connection parts for connecting to the wiring on a flexible circuit board, A step of electrically connecting to the wiring connection portion and fixing the electronic element to the flexible substrate, A step of laminating a resin film onto one surface of the flexible substrate, following the shape of the electronic element and covering the electronic element. Equipped with, In the process of providing the wiring and the wiring connection, a thermosetting conductive paste with a curing temperature of 130°C or lower is printed to simultaneously form uncured wiring and uncured wiring connection. In the process of fixing the electronic element to the flexible substrate, the electronic element is placed in the wiring connection portion before the conductive paste hardens, then a hardening process is performed to harden the wiring and the wiring connection portion made of the unhardened conductive paste, and as the conductive paste hardens, the electronic element is fixed to the hardened wiring connection portion while being electrically connected. In the process of laminating the resin film onto one surface of the flexible substrate, the pressure in each space partitioned by the resin film is adjusted by a three-dimensional surface decoration method, and the resin film is laminated onto one surface of the flexible substrate when the pressure in the space of the resin film on the flexible substrate side is lower than the pressure in the space of the resin film on the opposite side of the flexible substrate. A method for manufacturing a semiconductor device.

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