Semiconductor equipment

Abstract

To provide a semiconductor device capable of improving the EM life.SOLUTION: The semiconductor device that makes up an upper and lower arm circuit for one phase includes joints 80 and 81 connected via a solder 104. Each of the multiple solders electrically connected to the main electrode of the semiconductor element includes Cu and Sn. Each solder connection target has a Ni layer. The solder 104 includes Cu and Sn, and the joint parts 80 and 81 have Ni layers 801 and 811. The particle size of the solder 104 is smaller than the particle size of the solder to which the collector electrode is connected.SELECTED DRAWING: Figure 8

Description

Technical Field

[0001] The disclosure in this specification relates to a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a semiconductor device including a semiconductor element constituting an upper arm of an upper and lower arm circuit and a semiconductor element constituting a lower arm. The description of the prior art document is incorporated herein by reference as an explanation of the technical elements in this specification.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The above-described semiconductor device includes a joint conductor that connects, via solder, a conductor connected to a main electrode on the low potential side of a semiconductor element constituting an upper arm and a conductor connected to a main electrode on the high potential side of a semiconductor element constituting a lower arm. The bonding area of the solder joint portion of the joint conductor is small. In Patent Document 1, in order to suppress the EM progress of the solder joint portion of the joint conductor, a Ni layer is provided on the joint conductor. EM is an abbreviation for ElectroMigration.

[0005] Carbon neutrality has been proposed, and as the EV conversion of vehicles progresses, further miniaturization and higher current capacity are required for semiconductor devices. That is, further improvement for improving the EM life is required. From the above viewpoints or other viewpoints not mentioned, further improvement of the semiconductor device is required.

[0006] This disclosure has been made in view of such problems, and an object thereof is to provide a semiconductor device capable of improving the EM life. [Means for solving the problem]

[0007] One of the disclosed items is a semiconductor device. Multiple semiconductor elements (40) having a signal pad and an upper electrode which is the main electrode on the upper surface, and a lower electrode which is the main electrode on the lower surface which is the opposite surface from the upper surface in the thickness direction, and whose area when viewed in plan from the thickness direction is larger than that of the upper electrode, It comprises a plurality of conductors (50, 60, 70, 80, 81, 82, 92) electrically connected to the main electrode via solder, The multiple semiconductor elements include a first semiconductor element (40H) that constitutes the upper arm (9H) of the upper and lower arm circuit (9), and a second semiconductor element (40L) that constitutes the lower arm (9L) of the upper and lower arm circuit and is arranged alongside the first semiconductor element in one direction perpendicular to the thickness direction such that their upper surfaces are on the same side in the thickness direction. Multiple conductors include a first upper conductor (50H, 70H) connected to the upper electrode of the first semiconductor element via a first upper solder (101H, 102H), a first lower conductor (60H) connected to the lower electrode of the first semiconductor element via a first lower solder (103H), a second upper conductor (50L, 70L) connected to the upper electrode of the second semiconductor element via a second upper solder (101L, 102L), a second lower conductor (60L) connected to the lower electrode of the second semiconductor element via a second lower solder (103L), and the first upper conductor and the second lower conductor are connected. 1 Connect via a relay solder (104). 1 Joint conductors (80, 81) and main terminal (92), A second joint conductor (82) electrically connects the second upper conductor and the main terminal via a second relay solder (105), Includes, Each solder contains Cu and Sn. Each of the solder connections has a Ni layer (801, 811), First upper solder, Second upper solder, first relay solder, and second relay solder At least one particle size is smaller than the particle sizes of the first lower solder and the second lower solder, The small solder particles, which are smaller in size than the first and second lower solder particles, have a solidification starting point for reducing the particle size, either inside the small solder particles or on the surface to which the small solder particles are connected. Another disclosure is a semiconductor device, Multiple semiconductor elements (40) having a signal pad and an upper electrode which is the main electrode on the upper surface, and a lower electrode which is the main electrode on the lower surface which is the opposite surface from the upper surface in the thickness direction, and whose area when viewed in plan from the thickness direction is larger than that of the upper electrode, It comprises a plurality of conductors (50, 60, 70, 80, 81, 82, 92) electrically connected to the main electrode via solder, The multiple semiconductor elements include a first semiconductor element (40H) that constitutes the upper arm (9H) of the upper and lower arm circuit (9), and a second semiconductor element (40L) that constitutes the lower arm (9L) of the upper and lower arm circuit and is arranged alongside the first semiconductor element in one direction perpendicular to the thickness direction such that their upper surfaces are on the same side in the thickness direction. Multiple conductors include a first upper conductor (50H, 70H) connected to the upper electrode of the first semiconductor element via a first upper solder (101H, 102H), a first lower conductor (60H) connected to the lower electrode of the first semiconductor element via a first lower solder (103H), a second upper conductor (50L, 70L) connected to the upper electrode of the second semiconductor element via a second upper solder (101L, 102L), and the lower of the second semiconductor element. A second lower conductor (60L) connected to a sub-electrode via a second lower solder (103L), a first joint conductor (80, 81) connecting the first upper conductor and the second lower conductor via a first intermediate solder (104), and a second joint conductor (82) connecting a conductor other than the first upper conductor, first lower conductor, second upper conductor, second lower conductor, and first joint conductor, and the second upper conductor and another conductor via a second intermediate solder (105), Includes, Each solder contains Cu and Sn. Each of the solder connections has a Ni layer (801, 811), First upper solder, Second upper solder, first relay solder, and second relay solder At least one particle size is smaller than the particle sizes of the first lower solder and the second lower solder, The small solder particles, which are smaller in size than the first and second lower solder particles, have a solidification starting point for reducing the particle size, either inside the small solder particles or on the surface to which the small solder particles are connected.

[0008] In a configuration where the upper electrode is smaller than the lower electrode and a joint conductor is provided, the current density in the first upper solder, the second upper solder, and the intermediate solder is higher than the current density in the first lower solder and the second lower solder. According to the disclosed semiconductor device, the particle size of at least one of the first upper solder, the second upper solder, and the intermediate solder, which have high current densities, is smaller than the particle size of the first lower solder and the second lower solder. This can slow down the loss of the Ni layer due to electromagnetism (EM). As a result, a semiconductor device with improved EM lifetime can be provided.

[0009] The various embodiments disclosed in this specification employ different technical means to achieve their respective objectives. The claims and the reference numerals in parentheses in this section are illustrative in their correspondence with the embodiments described later and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings. [Brief explanation of the drawing]

[0010] [Figure 1]It is a diagram showing a schematic configuration of a vehicle drive system to which a semiconductor device according to the first embodiment is applied. [Figure 2] It is a plan view showing a semiconductor device according to the first embodiment. [Figure 3] It is a cross-sectional view taken along line III-III of FIG. 2. [Figure 4] It is a cross-sectional view taken along line IV-IV of FIG. 2. [Figure 5] It is a plan view with the encapsulation omitted. [Figure 6] It is a plan view with the heat sink on the emitter electrode side omitted. [Figure 7] It is a diagram showing output current and reflux current. [Figure 8] It is an enlarged cross-sectional view of region VIII in FIG. 3. [Figure 9] It is an enlarged cross-sectional view of the vicinity of the solder joint surface of the joint part. [Figure 10] It is a cross-sectional view showing a reference example. [Figure 11] It is a reference diagram showing the mechanism of EM propagation. [Figure 12] It is a plan view showing a modified example. [Figure 13] In the semiconductor device according to the second embodiment, it is an enlarged cross-sectional view of the vicinity of the solder joint surface of the joint part. [Figure 14] In the semiconductor device according to the third embodiment, it is a plan view showing a heat sink including a joint part. [Figure 15] It is an enlarged view of region XV in FIG. 14. [Figure 16] In the semiconductor device according to the fourth embodiment, it is a cross-sectional view showing the solder joint structure of the joint part. [Figure 17] It is a cross-sectional view showing a modified example.

Modes for Carrying Out the Invention

[0011] Several embodiments will be described below with reference to the drawings. In each embodiment, the same reference numerals are used for corresponding components, and redundant explanations may be omitted. If only a part of the configuration is described in each embodiment, the configuration of other embodiments described earlier can be applied to the other parts of that configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations from multiple embodiments can be partially combined even if not explicitly stated, as long as there are no particular problems with the combination.

[0012] The semiconductor device of this embodiment is applied, for example, to a power conversion device for a mobile body that uses a rotating electric machine as a drive source. Examples of mobile bodies include electric vehicles such as battery electric vehicles (BEVs), hybrid electric vehicles (HEVs), and plug-in hybrid electric vehicles (PHEVs), as well as aircraft such as electric vertical take-off and landing aircraft and drones, ships, construction machinery, and agricultural machinery. An example of its application to a vehicle will be described below.

[0013] (First Embodiment) First, the general configuration of the vehicle's drive system 1 will be explained based on Figure 1.

[0014] <Vehicle drive system> As shown in Figure 1, the vehicle's drive system 1 includes a DC power supply 2, a motor generator 3, and a power converter 4.

[0015] The DC power supply 2 is a DC voltage source composed of rechargeable secondary batteries. These secondary batteries are, for example, lithium-ion batteries or nickel-metal hydride batteries. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as the vehicle's driving source, i.e., an electric motor. During regeneration, the motor generator 3 functions as a generator. The power converter 4 performs power conversion between the DC power supply 2 and the motor generator 3.

[0016] <Power converter> Next, the circuit configuration of the power converter 4 will be described based on Figure 1. The power converter 4 is equipped with a power conversion circuit. As shown in Figure 1, the power converter 4 is equipped with a smoothing capacitor 5 and an inverter 6 which is a power conversion circuit.

[0017] The smoothing capacitor 5 primarily smooths the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to the P line 7, which is the high-potential power line, and the N line 8, which is the low-potential power line. The P line 7 is connected to the positive terminal of the DC power supply 2, and the N line 8 is connected to the negative terminal of the DC power supply 2. The positive terminal of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. Similarly, the negative terminal is connected to the N line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel to the DC power supply 2.

[0018] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts a DC voltage to a three-phase AC voltage according to switching control by a control circuit (not shown) and outputs it to the motor generator 3. This drives the motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 in response to the rotational force from the wheels to a DC voltage according to switching control by the control circuit and outputs it to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power supply 2 and the motor generator 3.

[0019] The inverter 6 is configured with three phase upper and lower arm circuits 9. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 each have an upper arm 9H and a lower arm 9L. The upper arm 9H and lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via the output line 10. The inverter 6 has six arms. At least a portion of each of the P line 7, N line 8, and output line 10 is made up of conductive material such as a busbar.

[0020] Each arm is composed of an IGBT 11, which is a switching element, and a diode 12 for freewheeling. IGBT is an abbreviation for Insulated Gate Bipolar Transistor. In this embodiment, an n-channel type IGBT 11 is used. Diode 12 is connected in antiparallel to the corresponding IGBT 11. In the upper arm 9H, the collector of IGBT 11 is connected to the P line 7. In the lower arm 9L, the emitter of IGBT 11 is connected to the N line 8. The emitter of IGBT 11 in the upper arm 9H and the collector of IGBT 11 in the lower arm 9L are interconnected. The anode of diode 12 is connected to the emitter of the corresponding IGBT 11, and the cathode is connected to the collector.

[0021] The power converter 4 may further include a converter as a power conversion circuit. The converter is a DC-DC converter circuit that converts a DC voltage to a DC voltage of a different value. The converter is placed between the DC power supply 2 and the smoothing capacitor 5. The converter is configured, for example, with a reactor and the above-described up-and-down arm circuit 9. With this configuration, step-up and step-down voltage conversion is possible. The power converter 4 may also include a filter capacitor to remove power supply noise from the DC power supply 2. The filter capacitor is placed between the DC power supply 2 and the converter.

[0022] The power converter 4 may include a drive circuit for the switching elements that make up the inverter 6, etc. The drive circuit supplies a drive voltage to the gate of the corresponding arm's IGBT 11 based on a drive command from the control circuit. The drive circuit drives the corresponding IGBT 11, i.e., turns it on or off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0023] The power converter 4 may include a control circuit for the switching element. The control circuit generates a drive command to operate the IGBT 11 and outputs it to the drive circuit. The control circuit generates the drive command based on a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. Examples of various sensors include a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the windings 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs a PWM signal as a drive command. The control circuit is configured to include, for example, a processor and memory. ECU is an abbreviation for Electronic Control Unit. PWM is an abbreviation for Pulse Width Modulation.

[0024] <Semiconductor device> Next, the schematic configuration of the semiconductor device 20 will be described based on Figures 2 to 6. Figure 2 is a plan view of the semiconductor device 20. Figure 2 is a top view plan of the semiconductor device 20. Figure 3 is a cross-sectional view along line III-III in Figure 2. Figure 4 is a cross-sectional view along line IV-IV in Figure 2. Figure 5 is a view of Figure 2 with the encapsulant 30 omitted. Figure 6 is a view of Figure 5 with the heat sink 50 on the emitter electrode 42 side omitted.

[0025] For some of the elements constituting the semiconductor device, the letter "H" is added to the end of the code to indicate the upper arm 9H side, and the letter "L" is added to indicate the lower arm 9L side. For some other elements, a common code is assigned to both the upper arm 9H and the lower arm 9L for convenience.

[0026] In the following, the thickness direction of the semiconductor element (semiconductor substrate) will be defined as the Z direction. The direction perpendicular to the Z direction will be defined as the X direction. The direction perpendicular to both the Z and X directions will be defined as the Y direction. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, will be defined as the planar shape. Furthermore, the view from the Z direction will sometimes simply be referred to as the planar view.

[0027] As shown in Figures 2 to 6, the semiconductor device 20 comprises a encapsulant 30, a semiconductor element 40, heat sinks 50 and 60, a conductive spacer 70, joints 80 to 82, and an external connection terminal 90. The semiconductor device 20 further comprises bonding wires 97 and solder 100. The semiconductor device 20 constitutes the above-described upper and lower arm circuit 9 for one phase.

[0028] The encapsulant 30 encapsulates a portion of the other elements that make up the semiconductor device 20. The remaining parts of the other elements are exposed outside the encapsulant 30. The encapsulant 30 is made of, for example, a resin. An example of a resin is an epoxy resin. The encapsulant 30 is molded from resin by, for example, a transfer molding method. Such a encapsulant 30 may be referred to as a resin encapsulant, molded resin, or resin molded body. The encapsulant 30 may also be formed using, for example, a gel. The gel is filled (placed) in the opposing regions of the heat sinks 50 and 60, for example.

[0029] As shown in Figures 2 to 4, the seal 30 has a roughly rectangular shape in plan. The seal 30 has one surface 30a and a back surface 30b which is opposite to the one surface 30a in the Z direction. The one surface 30a and the back surface 30b are, for example, roughly flat surfaces. It also has sides 30c, 30d, 30e, and 30f which are connected to the one surface 30a and the back surface 30b. Side 30c is the surface from which the main terminals 91 to 93 of the external connection terminals 90 protrude. Side 30d is the surface opposite to side 30c in the Y direction. Side 30d is the surface from which the signal terminal 94 protrudes. Sides 30e and 30f are surfaces from which the external connection terminals 90 do not protrude. Side 30e is the surface opposite to side 30f in the X direction.

[0030] The semiconductor element 40 comprises a semiconductor substrate 41, an emitter electrode 42, a collector electrode 43, and a pad 44. The semiconductor element 40 is sometimes referred to as a semiconductor chip. The semiconductor substrate 41 is made of materials such as silicon (Si) or a wide-bandgap semiconductor with a wider bandgap than silicon, and a vertical element is formed from it. Examples of wide-bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond.

[0031] The vertical element is configured to conduct the main current in the thickness direction, i.e., the Z direction, of the semiconductor substrate 41 (semiconductor element 40). In this embodiment, the vertical element consists of an IGBT 11 and a diode 12 that constitute a single arm. The vertical element is an IGBT with the diode 12 connected in antiparallel, i.e., an RC-IGBT. RC is an abbreviation for Reverse Conducting. The vertical element is a heating element that generates heat when current is passed through it. A gate electrode (not shown) is formed on the semiconductor substrate 41. The gate electrode has, for example, a trench structure.

[0032] The semiconductor substrate 41 has a substantially rectangular shape in planar form. One of the main electrodes, the emitter electrode 42, is located on one surface of the semiconductor substrate 41. The other main electrode, the collector electrode 43, is located on the back surface of the semiconductor substrate 41. One surface of the semiconductor substrate 41 is the surface on the side 30a of the sealant 30 in the thickness direction of the semiconductor substrate 41. The back surface of the semiconductor substrate 41 is the surface on the side 30b of the back surface 30 of the sealant 30 in the thickness direction of the semiconductor substrate 41.

[0033] When the IGBT 11 is turned on, a current (main current) flows between the main electrodes, that is, between the emitter electrode 42 and the collector electrode 43. The emitter electrode 42 also serves as the anode electrode of the diode 12. The collector electrode 43 also serves as the cathode electrode of the diode 12. The collector electrode 43 is formed on almost the entire back surface of the semiconductor substrate 41. The emitter electrode 42 is formed on a portion of one side of the semiconductor substrate 41. In other words, in a plan view, the collector electrode 43 has a larger area than the emitter electrode 42. The emitter electrode 42 corresponds to the upper electrode, and the collector electrode 43 corresponds to the lower electrode.

[0034] The emitter electrode 42 has a Ni layer formed using a material mainly composed of Ni (nickel). In this embodiment, the emitter electrode 42 is formed using a material mainly composed of Al (aluminum) and has an Al layer and a Ni layer laminated on the Al layer. The collector electrode 43 also has an Al layer and a Ni layer, similar to the emitter electrode 42.

[0035] The pads 44 are electrodes for signals. The pads 44 are formed on one surface of the semiconductor substrate 41 in a region different from the region where the emitter electrode 42 is formed. In the Y direction, the pads 44 are formed at the end opposite to the region where the emitter electrode 42 is formed. The pads 44 are provided alongside the emitter electrode 42 in the Y direction. The number of pads 44 is not particularly limited. The pads 44 include at least one pad for the gate electrode.

[0036] As an example, the semiconductor element 40 has five pads 44. Specifically, these include pads for the gate electrode, for detecting the emitter potential, for detecting the cathode potential of a temperature-sensitive diode (not shown) provided in the semiconductor element 40, for detecting the anode potential of the same diode, and for sensing current. The five pads 44 are arranged along the X direction.

[0037] The semiconductor device 20 comprises two semiconductor elements 40. Specifically, it comprises a semiconductor element 40H that constitutes the upper arm 9H and a semiconductor element 40L that constitutes the lower arm 9L. The semiconductor element 40H is sometimes referred to as the first semiconductor element, upper arm element, etc. The semiconductor element 40L is sometimes referred to as the second semiconductor element, lower arm element, etc. The semiconductor elements 40H and 40L have similar specifications to each other, that is, they are common components. The semiconductor elements 40H and 40L are aligned in the X direction. The semiconductor elements 40H and 40L are positioned at approximately the same location in the Z direction. The semiconductor elements 40H and 40L are positioned such that one side of each other, that is, the emitter electrodes 42, are on the same side in the Z direction.

[0038] The heatsink 50 is electrically connected to the emitter electrode 42 and provides a wiring function. Similarly, the heatsink 60 is electrically connected to the collector electrode 43 and provides a wiring function. The heatsinks 50 and 60 provide a heat dissipation function to dissipate the heat generated by the semiconductor element 40. For this reason, the heatsinks 50 and 60 are sometimes referred to as wiring members, conductive members, heat dissipation members, etc. The heatsinks 50 and 60 are arranged so as to sandwich the semiconductor element 40 in the Z direction. The heatsinks 50 and 60 are arranged so that at least a portion of them faces each other in the Z direction. In a plan view, the heatsinks 50 and 60 enclose the semiconductor element 40.

[0039] The heat sinks 50 and 60 are metal plates made of a metal with good conductivity, such as Cu or a Cu alloy. The metal plates are provided, for example, as part of a lead frame. The heat sinks 50 and 60 have a Ni layer formed on their surface by plating or the like. The heat sinks 50 and 60 have the Ni layer at least on the solder joint surface.

[0040] As a wiring component, instead of the heat sinks 50 and 60, a substrate in which metal bodies are arranged on both sides of an insulating substrate such as ceramic or resin may be used. In this case, the metal body on the semiconductor element 40 side corresponds to the conductor to which it is soldered, i.e., the upper conductor and the lower conductor. The metal body on the semiconductor element 40 side has a Ni layer on its surface.

[0041] The heat sink 50 has a facing surface 50a, which is the side facing the semiconductor element 40, and a back surface 50b, which is the side opposite to the facing surface 50a. Similarly, the heat sink 60 also has a facing surface 60a and a back surface 60b. The back surfaces 50b and 60b of the heat sinks 50 and 60, respectively, are exposed from the encapsulation body 30. The back surfaces 50b and 60b are sometimes referred to as the heat dissipation surface or exposed surface. The back surface 50b of the heat sink 50 is approximately flush with one surface 30a of the encapsulation body 30. The back surface 60b of the heat sink 60 is approximately flush with the back surface 30b of the encapsulation body 30.

[0042] The semiconductor device 20 is equipped with two heat sinks 50. Specifically, it is equipped with a heat sink 50H that constitutes the upper arm 9H and a heat sink 50L that constitutes the lower arm 9L. Heat sink 50H corresponds to the first main body of the first upper conductor, and heat sink 50L corresponds to the second main body of the second upper conductor.

[0043] As shown in Figure 5, the heat sinks 50H and 50L have a roughly rectangular shape in plan. The heat sinks 50H and 50L are aligned in the X direction. As shown in Figures 3 and 4, the heat sinks 50H and 50L have approximately the same thickness and are positioned approximately the same in the Z direction. In plan view, the heat sinks 50H and 50L enclose the corresponding semiconductor elements 40 and conductive spacers 70. Grooves 51 for catching excess solder are formed on the opposing surfaces 50a of the heat sinks 50H and 50L. The grooves 51 surround the solder joint on the opposing surfaces 50a. The grooves 51 are formed, for example, in an annular shape. The back surfaces 50b of the heat sinks 50H and 50L exposed from the encapsulant 30 are aligned in the X direction.

[0044] The semiconductor device 20 is equipped with two heat sinks 60. Specifically, it is equipped with a heat sink 60H that constitutes the upper arm 9H and a heat sink 60L that constitutes the lower arm 9L. Heat sink 60H corresponds to the first lower conductor, and heat sink 60L corresponds to the second lower conductor.

[0045] As shown in Figure 6, the heat sinks 60H and 60L have a roughly rectangular shape in plan. The heat sinks 60H and 60L are aligned in the X direction. As shown in Figures 3 and 4, the heat sinks 60H and 60L have approximately the same thickness and are positioned approximately at the same location in the Z direction. In plan view, the heat sinks 60H and 60L enclose the corresponding semiconductor elements 40. The back surfaces 60b of the heat sinks 60H and 60L exposed from the encapsulant 30 are aligned in the X direction.

[0046] The conductive spacer 70 is interposed between the semiconductor element 40 and the heat sink 50 in the Z direction. The conductive spacer 70 provides a spacer function to ensure a predetermined distance between the semiconductor element 40 and the heat sink 50. For example, the conductive spacer 70 ensures height for electrically connecting the corresponding signal terminal 94 to the pad 44 of the semiconductor element 40. The conductive spacer 70 is located in the middle of the electrical and thermal conduction path between the emitter electrode 42 of the semiconductor element 40 and the heat sink 50, and provides wiring and heat dissipation functions. The conductive spacer 70, together with the heat sink 50, constitutes the upper conductor.

[0047] The conductive spacer 70 is a metal component made of a metal with good electrical and thermal conductivity, such as Cu. The conductive spacer 70 is sometimes referred to as a terminal, terminal block, or metal block. The conductive spacer 70 has a Ni layer formed on its surface by plating or the like. The conductive spacer 70 has the Ni layer at least on the solder joint surface. In this embodiment, the conductive spacer 70 is a columnar body with a planar shape that is approximately the same size as the emitter electrode 42 in a plan view.

[0048] The semiconductor device 20 is equipped with two conductive spacers 70. Specifically, it is equipped with a conductive spacer 70H that constitutes the upper arm 9H and a conductive spacer 70L that constitutes the lower arm 9L. Conductive spacer 70H corresponds to the first spacer portion of the first upper conductor, and conductive spacer 70L corresponds to the second spacer portion of the second upper conductor.

[0049] The joints 80-82 connect the elements that make up the upper and lower arm circuit 9. The joints 80-82 connect the elements that make up the semiconductor device 20. The joints 80-82 are metal members made of a metal with good electrical and thermal conductivity, such as Cu. The joints 80-82 have a Ni layer formed on their surface by plating or the like. The joints 80-82 have the Ni layer at least on the solder joint surface.

[0050] As shown in Figures 3 and 6, the joint portion 80 is connected to the heat sink 60L. The thickness of the joint portion 80 is thinner than that of the heat sink 60L. The joint portion 80 is connected to the opposite surface (side surface) of the heat sink 60H, for example, in a state that is substantially flush with the opposite surface 60a of the heat sink 60L. The joint portion 80 has two bends, so it is substantially crank-shaped in the ZX plane. The joint portion 80 is covered by the sealant 30.

[0051] The joint portion 80 may be provided integrally with the heat sink 60L in a continuous manner, or it may be provided as a separate component and connected by joining. In this embodiment, the joint portion 80 is provided integrally with the heat sink 60L as part of the lead frame. The Ni layer is provided integrally with the heat sink 60L and the joint portion 80 in a continuous manner.

[0052] As shown in Figures 3, 4, and 5, the joints 81 and 82 are connected to the corresponding heat sink 50. Joint 81 is connected to heat sink 50H. Joint 82 is connected to heat sink 50L. The thickness of the joints 81 and 82 is thinner than that of the corresponding heat sink 50. The joints 81 and 82 are covered by a sealant 30.

[0053] The joint portions 81 and 82 may be provided continuously and integrally with respect to the heat sink 50, or they may be provided as separate components and connected by joining. In this embodiment, the joint portions 81 and 82 are provided integrally with the corresponding heat sinks 50H and 50L. The joint portions 81 and 82 extend in the X direction from the mutually opposing sides of the heat sinks 50H and 50L. The Ni layer is provided continuously and integrally with respect to the heat sink 50H and the joint portion 81. The Ni layer is provided continuously and integrally with respect to the heat sink 50L and the joint portion 82. As an example, the heat sink 50H including the joint portion 81 and the heat sink 50L including the joint portion 82 are common components. The arrangement of the heat sink 50H including the joint portion 81 and the heat sink 50L including the joint portion 82 is symmetrical twice with the Z-axis as the axis of rotation. Solder is interposed between the opposing surfaces of the joint portion 80 and the joint portion 81, forming a solder joint. As shown in Figure 5, the joint portions 81 and 82 are positioned between the heat sinks 50H and 50L in a plan view. The joint portions 81 and 82 are aligned in the Y direction between the heat sinks 50H and 50L.

[0054] A groove 83 is formed on the joint surface of joint portions 81 and 82 to contain excess solder. The groove 83 is formed in an annular shape so as to surround the solder joint. The groove 83 is formed, for example, by press working. Joint portions 80 and 81 correspond to the joint conductor and the first joint conductor, respectively. Joint portion 82 corresponds to the second joint conductor.

[0055] The external connection terminal 90 is a terminal for electrically connecting the semiconductor device 20 to an external device. The external connection terminal 90 is formed using a metal material with good conductivity, such as copper. The external connection terminal 90 is, for example, a plate. The external connection terminal 90 is sometimes referred to as a lead. The external connection terminal 90 includes main terminals 91, 92, and 93 and a signal terminal 94. The main terminals 91, 92, and 93 are external connection terminals 90 that are electrically connected to the main electrodes of the semiconductor element 40.

[0056] As shown in Figures 5 and 6, the main terminal 91 is electrically connected to the collector electrode 43 of the semiconductor element 40H. The main terminal 91 is electrically connected to the positive terminal of the smoothing capacitor 5. The main terminal 91 is sometimes referred to as the P terminal, high-potential power terminal, etc. The main terminal 91 is connected to the collector electrode 43 of the semiconductor element 40H via the heat sink 60H. The main terminal 91 is connected to one end of the heat sink 60H in the Y direction. The thickness of the main terminal 91 is thinner than that of the heat sink 60H. The main terminal 91 is connected to the heat sink 60H, for example, so as to be substantially flush with the opposing surface 60a. The main terminal 91 may be connected to the heat sink 60H by being continuously and integrally provided with respect to the heat sink 60H, or it may be provided as a separate component and connected by joining.

[0057] In this embodiment, the main terminal 91 is provided integrally with the heat sink 60H as part of the lead frame. The main terminal 91 extends in the Y direction from the heat sink 60H and protrudes to the outside from the side surface 30c of the sealant 30. The main terminal 91 has a bent portion in the middle of the part covered by the sealant 30 and protrudes from near the center in the Z direction on the side surface 30c.

[0058] As shown in Figures 5 and 6, the main terminal 92 is electrically connected to the emitter electrode 42 of the semiconductor element 40L. The main terminal 92 is electrically connected to the negative terminal of the smoothing capacitor 5. The main terminal 92 is sometimes referred to as the N terminal, low-potential power terminal, etc. The main terminal 92 is connected to the emitter electrode 42 of the semiconductor element 40L via the joint 82, the heat sink 50L, and the conductive spacer 70L. The main terminal 92 extends in the Y direction and protrudes out of the seal 30 from the same side surface 30c as the main terminal 91.

[0059] The main terminal 92 has a connection portion 920 with the joint portion 82 near one end in the Y direction. A portion of the main terminal 92, including the connection portion 920, is covered by the sealant 30, and the remaining portion protrudes from the sealant 30. The connection portion 920 is thicker than the portion protruding from the sealant 30. The thickness of the connection portion 920 is, for example, approximately the same as that of the heat sink 50L. The main terminal 92 also has a bent portion, similar to the main terminal 91, which protrudes from near the center in the Z direction on the side surface 30c. The main terminal 92 has a Ni layer formed on its surface by plating or the like. The main terminal 92 has the Ni layer at least on the solder joint surface of the connection portion 920.

[0060] The main terminal 93 is connected to the connection point between the upper arm 9H and the lower arm 9L. The main terminal 93 is electrically connected to the emitter electrode 42 of the semiconductor element 40H and the collector electrode 43 of the semiconductor element 40L. The main terminal 93 is electrically connected to the winding 3a of the corresponding phase of the motor generator 3. The main terminal 93 is sometimes referred to as the output terminal, AC terminal, O terminal, etc. The main terminal 93 is electrically connected to the emitter electrode 42 of the semiconductor element 40H via the heat sink 60L, joints 80, 81, heat sink 50H, and conductive spacer 70H. The main terminal 93 is connected to the collector electrode 43 of the semiconductor element 40L via the heat sink 60L.

[0061] The main terminal 93 is connected to one end of the heat sink 60L in the Y direction. The thickness of the main terminal 93 is thinner than that of the heat sink 60L. The main terminal 93 is connected to the heat sink 60L, for example, so as to be substantially flush with the opposing surface 60a. The main terminal 93 may be connected to the heat sink 60L by being continuously and integrally provided with respect to it, or it may be provided as a separate component and connected by joining.

[0062] In this embodiment, the main terminal 93 is provided integrally with the heat sink 60L as part of the lead frame. The main terminal 93 extends from the heat sink 60L in the Y direction and protrudes out of the seal 30 from the same side surface 30c as the main terminal 91. The main terminal 93 also has a bent portion, similar to the main terminal 91, and protrudes from near the center in the Z direction on the side surface 30c. The three main terminals 91 to 93 are arranged in the order of main terminal 91, main terminal 92, and main terminal 93 in the X direction.

[0063] The signal terminals 94 are electrically connected to the corresponding pads 44 of the semiconductor element 40. In this embodiment, the signal terminals 94 are electrically connected to the pads 44 via bonding wires 97. The signal terminals 94 extend in the Y direction and protrude outward from the side surface 30d of the encapsulant 30. The semiconductor device 20 has five signal terminals 94 for each semiconductor element 40, for a total of ten signal terminals 94. The multiple signal terminals 94 are arranged side by side in the X direction. The signal terminals 94 are configured on a common lead frame, for example, with the heat sink 60 and the main terminals 91-93.

[0064] The semiconductor device 20 is equipped with suspension leads 95. The heat sink 60 (60H, 60L), the joint portion 81, the main terminals 91-93, and the signal terminal 94 are all part of a common lead frame. The lead frame is a shaped strip with varying thicknesses in different sections. The signal terminal 94 is supported by the suspension leads 95 via tie bars (not shown) before cutting. Unnecessary parts of the lead frame, such as tie bars and the outer frame, are cut (removed) after the sealing body 30 is formed.

[0065] The semiconductor device 20 is provided with a plurality of solders 100 for connecting elements. The solders 100 include solders 101H, 101L, 102H, 102L, 103H, 103L, 104, and 105. Solder 101H is interposed between the emitter electrode 42 of the semiconductor device 40H and the conductive spacer 70H, joining the emitter electrode 42 and the conductive spacer 70H. Solder 102H is interposed between the conductive spacer 70H and the heat sink 50H, joining the conductive spacer 70H and the heat sink 50H. Solders 101H and 102H correspond to the first upper solder. Solder 103H is interposed between the collector electrode 43 of the semiconductor device 40H and the heat sink 60H, joining the collector electrode 43 and the heat sink 60H. Solder 103H corresponds to the first lower solder.

[0066] Solder 101L is interposed between the emitter electrode 42 of the semiconductor element 40L and the conductive spacer 70L, joining the emitter electrode 42 and the conductive spacer 70L. Solder 102L is interposed between the conductive spacer 70L and the heat sink 50L, joining the conductive spacer 70L and the heat sink 50L. Solders 101L and 102L correspond to the second upper solder. Solder 103L is interposed between the collector electrode 43 of the semiconductor element 40L and the heat sink 60L, joining the collector electrode 43 and the heat sink 60L. Solder 103L corresponds to the second lower solder.

[0067] Note that solder 101H and 101L are sometimes referred to as solder on the component. Solder 102H and 102L are sometimes referred to as solder on the spacer. Solder 103H and 103L are sometimes referred to as solder underneath the component.

[0068] Solder 104, together with joints 80 and 81, electrically connects the heat sink 50H and the heat sink 60L. In this embodiment, solder 104 is interposed between joint 80 connected to the heat sink 60L and joint 81 connected to the heat sink 50H, joining the joints 80 and 81. Solder 104 corresponds to the intermediate solder, or first intermediate solder. Solder 105, together with joint 82, electrically connects the heat sink 50L and the main terminal 92. In this embodiment, solder 105 is interposed between joint 82 connected to the heat sink 50L and the connection portion 920 of the main terminal 92, joining the joint 82 and the main terminal 92. Solder 105 corresponds to the second intermediate solder.

[0069] Each of the multiple solders 100 contains Cu and Sn. Solder 100 is a multicomponent lead-free solder that includes, for example, Cu, Bi, Sb, etc., with the remainder being Sn. The thickness of each solder 100 is, for example, about 100 μm.

[0070] As described above, in the semiconductor device 20, multiple semiconductor elements 40 constituting one phase of the upper and lower arm circuit 9 are sealed by a encapsulant 30. The encapsulant 30 integrally seals the multiple semiconductor elements 40, a portion of each of the heat sinks 50, a portion of each of the heat sinks 60, the conductive spacers 70, the joints 80-82, the main terminals 91-93, and a portion of each of the signal terminals 94.

[0071] The semiconductor element 40 is positioned between the heat sinks 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched between the opposing heat sinks 50 and 60. This allows the heat from the semiconductor element 40 to be dissipated on both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of the heat sink 50 is substantially flush with one surface 30a of the encapsulant 30. The back surface 60b of the heat sink 60 is substantially flush with the back surface 30b of the encapsulant 30. Since the back surfaces 50b and 60b are exposed surfaces, heat dissipation can be enhanced.

[0072] Furthermore, an Au layer may be provided on the above-mentioned Ni layer by plating or other means. Au, for example, suppresses the oxidation of Ni and improves wettability with solder. Since Au diffuses into the solder during soldering, it is present in the state before joining and absent in the state after joining.

[0073] <Output current and return current> Next, the output current and return current will be explained based on Figure 7. Figure 7 shows the output current and return current for semiconductor element 40H on the upper arm 9H side as an example. In Figure 7, the output current is indicated by a dashed arrow, and the return current is indicated by a dashed arrow.

[0074] The output current (main current) flows when the IGBT is operating. The output current on the upper arm 9H flows from the main terminal 91 to the motor generator 3 via the IGBT 11 of the semiconductor element 40H and the main terminal 93. Specifically, as shown by the dashed arrow in Figure 7, the current flows through the following path: main terminal 91 (P terminal) → heat sink 60H → semiconductor element 40H (IGBT 11) → conductive spacer 70H → heat sink 50H → joint 81 → joint 80 → heat sink 60L → main terminal 93 (O terminal).

[0075] The return current flows when the diode is operating. The return current on the upper arm 9H side flows in the opposite direction to the output current, that is, from the main terminal 93, through the diode 12 of the semiconductor element 40H and the main terminal 91 to the DC power supply 2 side. Specifically, as shown by the dashed arrow in Figure 7, the current flows through the following path: main terminal 93 (O terminal) → heat sink 60L → joint 80 → joint 81 → heat sink 50H → conductive spacer 70H → semiconductor element 40H (diode 12) → heat sink 60H → main terminal 91 (P terminal).

[0076] The same applies to the lower arm 9L. The output current flows through the path from main terminal 93 → IGBT11 of semiconductor element 40L → main terminal 92. The return current flows through the path from main terminal 92 → diode 12 of semiconductor element 40L → main terminal 93.

[0077] <Joint structure and solder particle size> Next, the joint structure and solder particle size will be described based on Figures 8 to 10. Figure 8 is a cross-sectional view showing the joint structure of the joint portions 80 and 81 in the semiconductor device 20 according to this embodiment. Figure 8 is an enlarged cross-sectional view of region VIII shown by the dashed line in Figure 3. For convenience, the wire piece 120 is omitted in Figure 8. Figure 9 is a cross-sectional view showing the wire piece 120 provided on the surface of the joint portion 80. For convenience, the alloy layer 110 is omitted in Figure 9. Figure 10 is a cross-sectional view showing a reference example. Figure 10 corresponds to Figure 8. In the reference example, the reference numerals of each element are obtained by adding 'r' to the end of the reference numeral of the related element of the semiconductor device 20.

[0078] As shown in Figure 8, the joint portion 80 has a Cu-based base material 800 and a Ni layer 801 provided on the base material 800. Similarly, the joint portion 81 also has a Cu-based base material 810 and a Ni layer 811 provided on the base material 810. As an example, the Ni layers 801 and 811 are NiP formed by electroless plating. The Ni layers 801 and 811 are Ni plating films containing P.

[0079] The semiconductor device 20 includes an alloy layer 110 interposed between the Ni layer 801 and the solder 104, and an alloy layer 111 interposed between the Ni layer 801 and the solder 104. The alloy layers 110 and 111 are sometimes referred to as IMC. IMC is an abbreviation for Intermetallic Compound. The alloy layers 110 and 111 are formed during soldering. The alloy layers 110 and 111 contain Ni, Cu, and Sn. The composition of the alloy layers 110 and 111 is, for example, (Ni-Cu)3Sn4.

[0080] The semiconductor device 20 further comprises P-rich layers 802 and 812. P-rich layer 802 is formed on the surface of Ni layer 801. P-rich layer 812 is formed on the surface of Ni layer 811. P-rich layers 802 and 812 are formed when a portion of the Ni in Ni layers 801 and 811 diffuses to the solder 104 side during bonding. P-rich layers 802 and 812 are layers that are richer in phosphorus than Ni layers 801 and 811 (NiP). The composition of P-rich layers 802 and 812 is, for example, Ni3P.

[0081] As shown in Figure 9, at least one of the joints 80, 81 has a plurality of wire pieces 120 on its solder joint surface. The wire pieces 120 are small pieces of bonding wire. The wire pieces 120 are sometimes referred to as projections or stud bonding. The wire pieces 120 are arranged within the solder 104. A plurality of wire pieces 120 are distributed within the solder 104. By appropriately setting the height of the wire pieces 120, it is possible to guarantee the minimum thickness of the solder 104. The plurality of wire pieces 120 are fixed (bonded) to a first opposing surface, which is one of the opposing surfaces constituting the solder joint, and protrude toward a second opposing surface, which is the other opposing surface. As an example, in this embodiment, wire pieces 120 are provided on the solder joint surface of the joint 80. The wire pieces 120 are provided, for example, at a predetermined pitch.

[0082] The presence of the wire piece 120 gives the surface of the joint 80 an uneven shape. The solder 104 begins to grow grains when it solidifies, starting from the wire piece 120. The collision of adjacent grains forms grain boundaries 106. The crystal grains grow starting from the corners of the wire piece 120, for example, the upper corner. For this reason, the particle size of the solder 104 is smaller than, for example, the particle size of the solder 103H and 103L. As described above, the thickness of the solder 104 is about 100 μm. The particle size of the solder 104 is smaller than the thickness of the solder 104, i.e., 100 μm.

[0083] In the comparative example shown in Figure 10, no wire pieces are provided on the solder joint surfaces of the joint portions 80r and 81r. In other words, the particle size of the solder 104 is not controlled. The other configurations are the same as those of the semiconductor device 20 in this embodiment. In this case, the particle size of the solder 104r is approximately 100 μm. There are one or two crystal grains of solder 104r in the thickness direction (Z direction) of the solder 104.

[0084] In this embodiment, wire pieces 120 are not placed on solder 103H and 103L among the multiple solders 100. The particle sizes of solder 103H and 103L are the same as those of the comparative example shown in Figure 10. The particle sizes of solder 103H and 103L are larger than those of solder 104 on which wire pieces 120 are placed.

[0085] <em> Next, electromigration (EM) will be explained based on Figure 11. Figure 11 is a reference diagram showing the mechanism of EM progression. In Figure 11, the symbols of each element are the same as those of the related elements of the semiconductor device 20 with 'r' added to the end. In the example shown in the reference diagram, the particle size of the solder 104r is not controlled, similar to the configuration shown in Figure 10. The other configurations are the same as those of the semiconductor device 20 in this embodiment.

[0086] Figure 11, labeled "1st," shows the initial stage before current is applied. An alloy layer 110r is interposed between the Ni layer 801r and the solder 104r. Additionally, a P-rich layer 802r is formed on the surface of the Ni layer 801r.

[0087] Figures 11, 2nd, 3rd, and 4th show the process when an output current is applied. The dashed arrows indicate the direction of electron (e-) flow. As shown in Figure 11, 2nd, the Cu and other metals in the alloy layer 110r move (diffuse) towards the joint 81r side as electrons move. Specifically, the metals such as Cu are ionized and move towards the joint 81r side. As a result, the alloy layer 110r gradually thins and disappears, as shown in Figure 11, 3rd.

[0088] When the alloy layer 110r disappears, as shown in the 3rd position of Figure 11, the Ni in the Ni layer 801r moves (diffuses) towards the joint portion 81r due to electron movement, causing the Ni layer 801r to decrease and the P-rich layer 802r to increase. Then, as shown in the 4th position of Figure 11, the Ni layer 801r disappears and the P-rich layer 802r reaches the base material 800r. In other words, the P-rich layer 802r is replaced by the Ni layer 801r.

[0089] After the P-rich layer 802r reaches the base material 800r, the adhesion decreases over time, and voids may form. Furthermore, cracks may develop along the interface, starting from these voids. Cracks may also form in the P-rich layer 802r.

[0090] As described above, in a configuration where the solder particle size is not controlled (see Figure 10), the solder particle size 104r is large. There are few grain boundaries in the Cu migration path. Therefore, Cu in the alloy layer 110r moves easily along with electron movement.

[0091] Although an example of output current was shown, the same applies to recirculation current. When recirculation current is applied, the alloy layer 111r on the joint portion 81r side disappears first, and then the P-rich layer 812r is replaced by the Ni layer 811r. After the P-rich layer 812r reaches the base material 810r, the adhesion decreases as time passes, and voids or cracks may occur. Because the particle size of the solder 104r is large, the Cu in the alloy layer 111r easily moves along with the movement of electrons.

[0092] On the other hand, in the configuration of this embodiment (see Figure 8), the particle size of solder 104 at the joints of the joints 80 and 81, where the current density is high, is smaller than the particle size of solder 103H and 103L, where the solder particle size is not controlled. Therefore, the Cu in the alloy layers 110 and 111 is less likely to move with the movement of electrons. In other words, the alloy layers 110 and 111 are less likely to disappear. The time it takes for the alloy layers 110 and 111 to disappear is increased. As a result, the time it takes for the Ni layers 801 and 811 to become P-rich layers 802 and 812 and begin to decrease is delayed. The time it takes for the Ni layers 801 and 811 to disappear is increased.

[0093] <Summary of the First Embodiment> In a plan view, the area of ​​the collector electrode 43, which is the main electrode on the high-potential side, is larger than the area of ​​the emitter electrode 42, which is the main electrode on the low-potential side. Furthermore, in order to miniaturize the semiconductor device 20, it is difficult to make the area of ​​the solder joints of the joints 80 and 81 and the solder joint of the joint 82 large. As a result, in the semiconductor device 20 that constitutes the upper and lower arm circuit 9 for one phase, the current density of solders 101H, 101L, 102H, 102L, 104, and 105 is higher than the current density of solders 103H and 103L. In other words, among the multiple solders 100, EM is more likely to propagate at the joints of solders 101H, 101L, 102H, 102L, 104, and 105. Among the multiple solders 100, EM is less likely to propagate at the joints of solders 103H and 103L.

[0094] As an example, in this embodiment, the particle size of solder 104 (intermediate solder, first intermediate solder) is smaller than the particle size of solder 103H and 103L (first lower solder and second lower solder). Solder 104 has more grain boundaries 106 between the connected objects. The grain boundaries 106 inhibit the movement of Cu. Therefore, Cu in alloy layers 110 and 111 is less likely to move with the movement of electrons. Thus, the time required for alloy layers 110 and 111 to disappear can be extended. In addition, the time required for Ni layers 801 and 811 to disappear can be extended. As a result, the EM life can be improved.

[0095] The current density of the semiconductor device 20, that is, the current density of the current-carrying path connected to the main electrode, is maximized, for example, at the solder joints of the joints 80 and 81. In this embodiment, the EM life can be improved by reducing the particle size of the solder 104.

[0096] The effect of the solder particle size 104 has been confirmed in prototypes. It was confirmed that reducing the particle size of solder 104 slows down the disappearance of alloy layers 110 and 111, that is, slows down the progression of EM. At this time, Ni layers 801 and 811 were formed by electroless NiP plating. The composition of alloy layers 110 and 111 was (Ni-Cu)3Sn4.

[0097] In this embodiment, the joint portion 80 has a plurality of wire pieces 120 on the solder joint surface. The solder 104 solidifies starting from the wire pieces 120. The wire pieces 120 are the starting points for solidification. By providing the wire pieces 120, the particle size of the solder 104 can be reduced, and the EM life can be improved.

[0098] <Variation> An example has been shown in which the wire piece 120 is provided on the joint portion 80, but the method is not limited to this. The wire piece 120 may also be provided on the solder joint surface of the joint portion 81. In this case as well, the solder 104 will solidify and granule starting from the wire piece 120. The wire piece 120 may also be provided on both the joint portions 80 and 81. In other words, it is sufficient to provide it on at least one of the objects to be connected.

[0099] While solder 104 is shown as an example of a small-particle solder, the invention is not limited to this. As a small-particle solder, at least one of the multiple solders 100, excluding solders 103H and 103L, can be used.

[0100] For example, solder 105 may be made of small-grain solder. By providing multiple wire pieces 120 on the solder joint surface of the joint portion 82 and / or the connection portion 920 of the main terminal 92, the particle size of solder 105 can be made smaller than the particle size of solder 103H and 103L. This makes it possible to suppress the progression of EM at the joint of solder 105.

[0101] For example, the solders 101H and 101L may be small-grain solders. By providing multiple wire pieces 120 on the solder joint surface of the emitter electrode 42 and / or conductive spacer 70, the particle size of the solders 101H and 101L can be made smaller than that of the solders 103H and 103L. This makes it possible to suppress the propagation of EM at the joint of the solders 101H and 101L. This is effective in miniaturizing the semiconductor device 40.

[0102] For example, solder particles 102H and 102L may be small-grained solder. By providing multiple wire pieces 120 on the solder joint surface of the conductive spacer 70 and / or heat sink 50, the particle size of solder particles 102H and 102L can be made smaller than that of solder particles 103H and 103L. This suppresses the progression of EM at the joint of solder particles 102H and 102L. Similar to reducing the particle size of solder particles 101H and 101L, this is effective in miniaturizing the semiconductor device 40.

[0103] The arrangement of the multiple wire pieces 120 is not particularly limited. For example, as shown in Figure 12, the multiple wire pieces 120 may be provided in a portion of the solder joint surface of the conductive spacer 70 that overlaps with the vicinity of the center of the semiconductor element 40. EM progresses as the temperature and current density increase. By providing the wire pieces 120 in a portion that overlaps with the vicinity of the center of the element in a plan view, particle reduction can be reliably achieved in areas where the temperature is high. Therefore, the progression of EM can be suppressed. Alternatively, the multiple wire pieces 120 may be provided in a portion of the solder joint surface of the conductive spacer 70 that overlaps with the four corners of the emitter electrode 42. The four corners have lower temperatures, and the solder solidifies easily. This promotes particle reduction.

[0104] The arrangement of the wire pieces 120 shown in Figure 12 is not limited to the conductive spacer 70. In the emitter electrode 42, they may be placed near the center of the element or at the four corners. In the heat sink 50, they may be placed in a part that overlaps with the area near the center of the element or at the four corners.

[0105] An example has been shown in which the semiconductor device 20 is equipped with a conductive spacer 70, but it is not limited to this. Instead of the conductive spacer 70, a protrusion that provides a spacer function may be provided on the heat sink 50. In this case, the heat sink 50 corresponds to the upper conductor. The upper solder is interposed between the emitter electrode 42 and the heat sink 50, joining the emitter electrode 42 and the heat sink 50. To make the upper solder finer, a plurality of wire pieces 120 may be provided on the solder joint surface of the emitter electrode 42 and / or the heat sink 50.

[0106] Although an example has been shown in which the semiconductor device 20 includes a joint portion 82, it is not limited to this. The heat sink 50L, the joint portion 82, and the main terminal 92 may be provided continuously and integrally. In other words, the semiconductor device 20 may be configured without solder 105.

[0107] Although an example has been shown in which the semiconductor device 20 has two joints 80 and 81 for connecting the upper arm 9H and the lower arm 9L, it is not limited to this. Only one of the joints 80 and 81 may be provided. For example, the device may have only the joint 80, and the joint 80 may be connected to the heat sink 50H via solder 104. Alternatively, the device may have only the joint 81, and the joint 81 may be connected to the heat sink 60L via solder 104.

[0108] (Second Embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, multiple wire pieces were provided as the starting point for solidification. Alternatively, a textured oxide film created by laser irradiation may be provided.

[0109] <Uneven oxide film> Figure 13 is a cross-sectional view showing the uneven oxide film 803 provided on the surface of the joint portion 80 in the semiconductor device 20 according to this embodiment. Figure 13 corresponds to Figure 9. In Figure 13, for convenience, the P-rich layer 802 and the alloy layer 110 are omitted.

[0110] As described above, the joint portion 80 has a base material 800 and a Ni layer 801 provided on the surface of the base material 800. As shown in Figure 13, the joint portion 80 further has a textured oxide film 803 provided on the Ni layer 801. The textured oxide film 803 is dispersed at multiple locations on the solder joint surface of the joint portion 80 by irradiating the Ni layer 801 with laser light.

[0111] The uneven oxide film 803 is an oxide film mainly composed of Ni. For example, of the components that make up the uneven oxide film 803, 80% is Ni2O3, 10% is NiO, and 10% is Ni.

[0112] The recesses 801a on the surface of the Ni layer 801 are formed by irradiation with pulsed laser light. One recess 801a is formed with each pulse. The uneven oxide film 803 is formed by the melting, vaporization, and deposition of the surface portion of the Ni layer 801 upon irradiation with laser light. The uneven oxide film 803 is an oxide film derived from the Ni layer 801. The uneven oxide film 803 is a film of oxide of the metal (Ni), which is the main component of the Ni layer 801. The uneven oxide film 803 is formed following the surface irregularities of the Ni layer 801, which has recesses 801a. The surface of the uneven oxide film 803 has irregularities formed at a pitch finer than the width of the recesses 801a. In other words, very fine irregularities (roughened areas) are formed.

[0113] The pulsed laser beam is adjusted so that its energy density is greater than 0 J / cm² but less than or equal to 100 J / cm², and its pulse width is less than or equal to 1 μs. To meet these conditions, YAG lasers, YVO4 lasers, fiber lasers, etc., can be used. For example, in the case of a YAG laser, an energy density of 1 J / cm² or higher is sufficient. In the case of electroless nickel plating, for example, a density of around 5 J / cm² is sufficient to process the Ni layer 801.

[0114] <Void> The oxide film (uneven oxide film 803) has lower wettability to solder compared to the metal film. Because the uneven oxide film 803 has fine irregularities on its surface, the contact area with the solder is reduced, and some of the solder becomes spherical due to surface tension. In other words, the contact angle is increased, resulting in low wettability to solder.

[0115] As described above, the uneven oxide film 803 has low wettability with respect to the solder 104. For this reason, as shown in Figure 13, voids 121 are formed so as to cover the uneven oxide film 803. The voids 121 are formed around the uneven oxide film 803. In the semiconductor device 20, multiple voids 121 exist near the solder joint surface of the joint portion 80. The other configurations are the same as those described in the prior embodiment.

[0116] <Summary of the second embodiment> The configuration described in this embodiment can achieve the same effects as the configuration described in the prior embodiment. Specifically, multiple voids 121 originating from the uneven oxide film 803 exist within the solder 104. When the solder 104 solidifies, grain growth occurs starting from the voids 121. The voids 121 are the starting points for solidification. By providing the uneven oxide film 803 and, consequently, the voids 121, the particle size of the solder 104 can be made smaller than the particle size of the solder 103H and 103L, thereby improving the EM life.

[0117] <Variation> An example of providing the textured oxide film 803 on the joint portion 80 has been shown, but it is not limited to this. It can be provided on conductors other than the heat sink 60 among the conductors to be connected. For example, the textured oxide film may be provided on the solder joint surface of the joint portion 81. The textured oxide film may be provided on both the joint portions 80 and 81. The textured oxide film may be provided on the solder joint surface of the heat sink 50. The textured oxide film may be provided on the solder joint surface of the conductive spacer 70.

[0118] The arrangement of the uneven oxide film is not particularly limited. It may be dispersed at a predetermined pitch. As shown in Figure 12, it may be provided in the heat sink 50 or conductive spacer 70 in the area near the center of the element, or in the area that overlaps with the four corners.

[0119] (Third embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, the solder particle size was reduced by providing wire pieces or an uneven oxide film. Alternatively, the inner circumferential edge of the groove that contains the overflowed solder may be provided with irregularities.

[0120] Figure 14 is a plan view of the heat sink 50H including the joint portion 81 in the semiconductor device 20 according to this embodiment. Figure 14 is a plan view as seen from the opposing surface 50a side. Figure 15 is an enlarged view of the region XV shown by the dashed line in Figure 14. Figure 15 shows the solder 104 placed on the joint portion 81. Figure 15 shows only a portion of the grain boundary 106.

[0121] Similar to the prior embodiment, the joint portion 81 is provided integrally and continuously with respect to the heat sink 50H. As shown in Figure 14, the heat sink 50H has a groove 51. The joint portion 81 also has a groove 83. As shown in Figure 15, in a plan view, the inner circumferential end 830 of the groove 83 has a continuous uneven surface. The joint portion 81 has an uneven portion 831 on the inner circumferential end 830 of the groove 83. As an example, the uneven portion 831 is provided along the entire length of the groove 83.

[0122] During solidification, the solder 104 undergoes grain growth starting from the recesses and / or protrusions of the uneven portion 831 provided on the inner circumferential end 830 of the groove 83. Because the growth starts from these uneven surfaces, the crystal grains in the solder 104 become smaller. The other configurations are the same as those described in the prior embodiment.

[0123] <Summary of the third embodiment> The configuration described in this embodiment can achieve the same effects as the configuration described in the prior embodiment. Specifically, the inner circumferential end 830 of the groove 83 that contains the overflowed solder 104 has a continuous uneven surface. When the solder 104 solidifies, it grows from the uneven surface of the inner circumferential end 830 as the starting point. The uneven portion 831 is the starting point for solidification. By making the inner circumferential end 830 of the groove 83 uneven, the particle size of the solder 104 can be made smaller than the particle size of the solder 103H and 103L, thereby improving the EM life.

[0124] An example has been shown in which the uneven portion 831 is provided along the entire length of the groove 83, but the invention is not limited to this. The uneven portion 831 only needs to be provided along at least a portion of the entire length of the groove 83. By making at least a portion of the inner circumference end 830 of the groove 83 uneven, the particle size of the solder 104 can be made smaller than the particle size of the solder 103H and 103L.

[0125] Furthermore, if the heat sink 50H including the joint portion 81 and the heat sink 50L including the joint portion 82 are common components, the joint portion 82 will also have a recessed portion 831 on the inner circumference end 830 of the groove 83. In this case, the solder 105 can also be made smaller.

[0126] <Variation> An example has been shown in which the uneven portion 831 is provided in the groove 83, but the invention is not limited to this. The uneven portion may be provided at the inner circumferential end of the groove 51 of the heat sink 50. It may be provided at the inner circumferential end of the groove 51 of the heat sink 50H, or at the inner circumferential end of the groove 51 of the heat sink 50L. The uneven portion may be provided in both the groove 51 and the groove 83.

[0127] (Fourth Embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, the solder particle size was reduced by modifying the object to be connected with solder. Alternatively, the solder particle size may be reduced by modifying the solder itself.

[0128] Figure 16 is a cross-sectional view showing the joining structure of the joints 80 and 81 in the semiconductor device 20 according to this embodiment. Figure 16 corresponds to Figure 8.

[0129] As shown in Figure 16, conductive balls 122 are added to the solder 104. The balls 122 are mainly composed of Ni or Cu. Such balls 122 are sometimes called Ni balls or Cu balls. By appropriately setting the diameter of the balls 122, it is possible to guarantee, for example, the minimum thickness of the solder 104.

[0130] The presence of balls 122 causes the solder 104 to grow grains starting from the balls 122 during solidification. Because the grains start from the balls 122, the crystal grains of the solder 104 are smaller compared to a configuration in which balls 122 are not added. The other configurations are the same as those described in the prior embodiment.

[0131] <Summary of the fourth embodiment> The configuration described in this embodiment can achieve the same effects as the configuration described in the prior embodiment. Specifically, balls 122 are added to the solder 104. When the solder 104 solidifies, grain growth occurs starting from the balls 122. The balls 122 are the starting points for solidification. By providing the balls 122, the particle size of the solder 104 can be made smaller than the particle size of the solder 103H and 103L, thereby improving the EM life.

[0132] Furthermore, the effect of ball 122 has also been confirmed in prototypes. It was confirmed that adding ball 122 reduces the particle size of solder 104. It was also confirmed that the disappearance of alloy layers 110 and 111 is slowed, meaning that the progression of EM can be slowed. At this time, Ni layers 801 and 811 were formed by electroless NiP plating. The composition of alloy layers 110 and 111 was (Ni-Cu)3Sn4.

[0133] <Variation> The solder 104 may have a multilayer structure, and the occupancy rate of balls 122 per unit volume may differ depending on the layer. In the example shown in Figure 17, the solder 104 has a first layer 104a and a second layer 104b. The first layer 104a is the layer on the joint portion 80 side, and the second layer 104b is the layer on the joint portion 81 side. Figure 17 corresponds to Figure 16. In Figure 17, the grain boundary 106 is omitted for convenience.

[0134] In the example shown in Figure 17, the occupancy rate of balls 122 in the first layer 104a is higher than that of balls 122 in the second layer 104b. The first layer 104a has a larger quantity of balls 122 than the second layer 104b. With this configuration, the particle size of the second layer 104b can be reduced while further reducing the particle size of the first layer 104a. Therefore, in a configuration where EM is easily advanced by the output current, the EM lifespan can be improved.

[0135] Furthermore, by making the diameter of the balls 122 different in the first layer 104a and the second layer 104b, the occupancy rate of the balls 122 in the first layer 104a may be higher than that of the balls 122 in the second layer 104b. The quantity and diameter of the balls may also be different.

[0136] The occupancy rate of balls 122 in the second layer 104b may be higher than the occupancy rate of balls 122 in the first layer 104a. With this configuration, the particle size of the second layer 104b can be made smaller while simultaneously reducing the particle size of the first layer 104a. Therefore, in a configuration where EM is easily propagated by recirculating current, the EM lifespan can be improved.

[0137] The two-layer structure of solder 104 can be achieved, for example, by arranging two layers of solder foil with different ball content. Alternatively, three layers of ball-free solder foil may be stacked, with different amounts and / or diameters of balls 122 placed between each layer of solder foil. The number of layers of solder 104 is not limited to two; it may be three or more.

[0138] An example in which the ball 122 is placed on solder 104 has been shown, but the invention is not limited to this. The ball 122 may be placed on at least one of the solders 100 other than solders 103H and 103L.

[0139] (Other embodiments) The disclosures in this specification and drawings are not limited to the exemplary embodiments. The disclosures include the exemplary embodiments and variations thereof by those skilled in the art. For example, the disclosures are not limited to combinations of parts and / or elements shown in the embodiments. The disclosures are implementable in a variety of combinations. The disclosures may have additional parts that can be added to the embodiments. The disclosures include those in which parts and / or elements of the embodiments have been omitted. The disclosures include substitutions or combinations of parts and / or elements between one embodiment and another. The scope of the disclosed technical areas is not limited to the descriptions of the embodiments. Some of the scope of the disclosed technical areas are indicated by the claims and should be understood to include all modifications within the meaning and scope equivalent to the claims.

[0140] The disclosures in the specification and drawings are not limited by the claims. The disclosures in the specification and drawings encompass the technical ideas described in the claims and extend to a wider and more diverse range of technical ideas than those described in the claims. Therefore, a variety of technical ideas can be extracted from the disclosures in the specification and drawings without being bound by the claims.

[0141] When an element or layer is referred to as “on top of,” “connected to,” “connected to,” or “joined,” it may be directly on top of, connected to, connected to, or joined to another element or layer, and there may also be an intervening element or layer. In contrast, when an element is referred to as “directly on top of,” “directly connected to,” “directly connected to,” or “directly joined to” another element or layer, there is no intervening element or layer. Other words used to describe relationships between elements should be interpreted in a similar manner (e.g., “between” vs. “directly between,” “adjacent” vs. “directly adjacent,” etc.). As used in this specification, the term “and / or” includes any combination with respect to one or more of the enumerated items relating to the relationship, and all combinations thereof.

[0142] Spatially relative terms such as "inside," "outside," "back," "below," "low," "above," and "high" are used here to facilitate descriptions of the relationship between one element or feature and other elements or features, as illustrated. Spatially relative terms may be intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the drawings. For example, if the device in the drawing is turned upside down, an element described as "below" or "directly below" another element or feature will be oriented "above" the other element or feature. Thus, the term "below" can encompass both up and down orientations. The device may also be oriented in other directions (it may be rotated 90 degrees or in other directions), and the spatially relative descriptors used in this specification will be interpreted accordingly.

[0143] The vehicle's drive system 1 is not limited to the configuration described above. For example, although an example with one motor generator 3 has been shown, it is not limited to this. It may have multiple motor generators. The power conversion device 4 is shown as having an inverter 6 as a power conversion unit, but it is not limited to this. For example, it may have a configuration with multiple inverters. It may have a configuration with at least one inverter and a converter. It may have only a converter.

[0144] The switching element is not limited to IGBT11. For example, a MOSFET may be used. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. In the case of an n-channel MOSFET, the source electrode corresponds to the upper electrode and the drain electrode corresponds to the lower electrode. In the case of a MOSFET, a parasitic diode (body diode) may be used as a freewheeling diode, or an external diode may be used.

[0145] Although an example has been shown in which the semiconductor device 20 has only one semiconductor element 40 that constitutes each arm, it is not limited to this. The semiconductor device 20 may have multiple semiconductor elements 40 that constitute each arm. That is, multiple semiconductor elements 40H may be connected in parallel to each other to form one arm 9H, and multiple semiconductor elements 40L may be connected in parallel to each other to form one arm 9L.

[0146] The example shown involves the back surfaces 50b and 60b of the heat sinks 50 and 60 being exposed from the sealant 30, but this is not the only example. At least one of the back surfaces 50b and 60b may be covered by the sealant 30. At least one of the back surfaces 50b and 60b may be covered by an insulating member (not shown) separate from the sealant 30. The semiconductor device 20 may also be configured without a sealant 30.

[0147] Although an example has been shown in which the semiconductor device 20 includes a encapsulant 30, the semiconductor device is not limited to this. A configuration without the encapsulant 30 is also possible.

[0148] (Disclosure of technical ideas) This specification discloses several technical concepts, as listed in the following paragraphs. Some paragraphs are written in a multiple dependent form, where subsequent paragraphs optionally refer to preceding paragraphs. Furthermore, some paragraphs are written in a multiple dependent form, referring to other multiple dependent forms. These paragraphs written in multiple dependent forms define several technical concepts.

[0149] <Technical philosophy 1> A plurality of semiconductor elements (40) having a signal pad and an upper electrode which is the main electrode on the upper surface, and a lower electrode which is the main electrode on the lower surface which is the opposite surface in the thickness direction from the upper surface, and the area when viewed in plan from the thickness direction is larger than that of the upper electrode, It comprises a plurality of conductors (50, 60, 70, 80, 81, 82, 92) electrically connected to the main electrode via solder, The plurality of semiconductor elements include a first semiconductor element (40H) that constitutes the upper arm (9H) of the upper arm circuit (9), and a second semiconductor element (40L) that constitutes the lower arm (9L) of the upper arm circuit and is arranged alongside the first semiconductor element in one direction perpendicular to the thickness direction such that the upper surfaces are on the same side in the thickness direction. The plurality of conductors include: first upper conductors (50H, 70H) connected to the upper electrode of the first semiconductor element via first upper solder (101H, 102H); first lower conductor (60H) connected to the lower electrode of the first semiconductor element via first lower solder (103H); second upper conductors (50L, 70L) connected to the upper electrode of the second semiconductor element via second upper solder (101L, 102L); second lower conductor (60L) connected to the lower electrode of the second semiconductor element via second lower solder (103L); and connecting conductors (80, 81) connecting the first upper conductor and the second lower conductor via intermediate solder (104). Each solder contains Cu and Sn. Each of the solder connections has a Ni layer (801, 811), A semiconductor device in which the particle size of at least one of the first upper solder, the second upper solder, and the intermediate solder is smaller than the particle size of the first lower solder and the second lower solder.

[0150] <Technical philosophy 2> The first upper conductor has a first main body portion (50H) and a first spacer portion (70H) interposed between the upper electrode of the first semiconductor element and the first main body portion. The second upper conductor has a second main body portion (50L) and a second spacer portion (70L) interposed between the upper electrode of the second semiconductor element and the second main body portion. The first upper solder is interposed between the upper electrode of the first semiconductor element and the first spacer portion, and between the first spacer portion and the first main body portion, The semiconductor device according to Technical Concept 1, wherein the second upper solder is interposed between the upper electrode of the second semiconductor element and the second spacer portion, and between the second spacer portion and the second main body portion.

[0151] <Technical philosophy 3> The aforementioned joint conductor is a first joint conductor that connects the first upper conductor and the second lower conductor via the first relay solder, which is the relay solder. The plurality of conductors include a main terminal (92) and a second connecting conductor (82) that connects the second upper conductor and the main terminal via a second relay solder (105). A semiconductor device according to Technical Idea 1 or Technical Idea 2, wherein the particle size of the second relay solder is smaller than the particle size of the first lower solder and the second lower solder.

[0152] <Technical philosophy 4> A semiconductor device according to any one of the technical ideas 1 to 3, wherein the small-grain solder, which is smaller in particle size than the first lower solder and the second lower solder, has a solidification initiation point for reducing particle size inside, or on the surface to which the small-grain solder is connected.

[0153] <Technical philosophy 5> The semiconductor device according to technical concept 4, wherein the starting point portion is a plurality of wire pieces (120) arranged within the small solder particles and fixed to the surface to which the small solder particles are to be connected.

[0154] <Technical philosophy 6> The conductor to be connected by the small solder grains has a textured oxide film (803) on the Ni layer, the Ni layer being mainly composed of Ni and having a continuously uneven surface. The starting point is a void (121) covering the uneven oxide film, as described in technical concept 4, for the semiconductor device.

[0155] <Technical philosophy 7> The conductor to which the small solder particles are connected has a groove (83) for accommodating the overflowed solder. The inner circumferential end of the groove has a continuous uneven surface. The semiconductor device according to technical concept 4, wherein the starting point is a recess and / or convex portion at the inner circumferential end of the groove.

[0156] <Technical philosophy 8> Conductive balls (122) are added to the aforementioned small solder particles. The starting point is the ball, as described in Technical Concept 4, for the semiconductor device.

[0157] <Technical philosophy 9> The aforementioned ball comprises Ni or Cu, as described in Technical Idea 8, for the semiconductor device. <Technical Thought 10> A plurality of semiconductor elements (40) having a signal pad and an upper electrode which is the main electrode on the upper surface, and a lower electrode which is the main electrode on the lower surface which is the opposite surface in the thickness direction from the upper surface, and the area when viewed in plan from the thickness direction is larger than that of the upper electrode, It comprises a plurality of conductors (50, 60, 70, 80, 81, 82, 92) electrically connected to the main electrode via solder, The plurality of semiconductor elements include a first semiconductor element (40H) that constitutes the upper arm (9H) of the upper arm circuit (9), and a second semiconductor element (40L) that constitutes the lower arm (9L) of the upper arm circuit and is arranged alongside the first semiconductor element in one direction perpendicular to the thickness direction such that the upper surfaces are on the same side in the thickness direction. The plurality of conductors include: first upper conductors (50H, 70H) connected to the upper electrode of the first semiconductor element via first upper solder (101H, 102H); first lower conductor (60H) connected to the lower electrode of the first semiconductor element via first lower solder (103H); second upper conductors (50L, 70L) connected to the upper electrode of the second semiconductor element via second upper solder (101L, 102L); second lower conductor (60L) connected to the lower electrode of the second semiconductor element via second lower solder (103L); and connecting conductors (80, 81) connecting the first upper conductor and the second lower conductor via intermediate solder (104). Each solder contains Cu and Sn. Each of the solder connections has a Ni layer (801, 811), The particle size of at least one of the first upper solder, the second upper solder, and the intermediate solder is smaller than the particle size of the first lower solder and the second lower solder. A semiconductor device having a solidification initiation point for reducing particle size within the small solder particles, which are smaller in particle size than the first lower solder and the second lower solder, or on the surface to which the small solder particles are connected. [Explanation of Symbols]

[0158] 1…Drive system, 2…DC power supply, 3…Motor generator, 3a…Winding, 4…Power converter, 5…Smoothing capacitor, 6…Inverter, 7…P line, 8…N line, 9…Upper and lower arm circuit, 9H…Upper arm, 9L…Lower arm, 10…Output line, 11…IGBT, 12…Diode, 20…Semiconductor device, 30…Encapsulation, 30a…One side, 30b…Back side, 30c, 30d, 30e, 30f…Side, 40, 40H, 40L…Semiconductor element, 41…Semiconductor substrate, 42…Emitter electrode, 43…Collector electrode, 44…Pad, 50, 50H, 50L…Heat sink, 50a…Opposite side, 50b…Back side, 51…Groove, 60, 60H, 60L…Heat sink, 60 a...Opposite surface, 60b...Back surface, 70, 70H, 70L...Conductive spacer, 80, 81, 82...Joint part, 800, 810...Base material, 801, 811...Ni layer, 801a...Recess, 802, 812...P-rich layer, 803...Uneven oxide film, 83...Groove, 830...Inner circumference end, 831...Uneven part, 90...External connection terminal, 91, 92, 93...Main terminal, 9 20...connection part, 94...signal terminal, 95...hanging lead, 97...bonding wire, 100, 101H, 101L, 102H, 102L, 103H, 103L, 104, 105...solder, 104a...first layer, 104b...second layer, 106...grain boundary, 110, 111...alloy layer, 120...wire piece, 121...void, 122...ball< / em>

Claims

1. A plurality of semiconductor elements (40) having a signal pad and an upper electrode which is the main electrode on the upper surface, and a lower electrode which is the main electrode on the lower surface which is the opposite surface in the thickness direction from the upper surface, and whose area when viewed in plan from the thickness direction is larger than that of the upper electrode, It comprises a plurality of conductors (50, 60, 70, 80, 81, 82, 92) electrically connected to the main electrode via solder, The plurality of semiconductor elements include a first semiconductor element (40H) that constitutes the upper arm (9H) of the upper arm circuit (9), and a second semiconductor element (40L) that constitutes the lower arm (9L) of the upper arm circuit and is arranged alongside the first semiconductor element in one direction perpendicular to the thickness direction such that the upper surfaces are on the same side in the thickness direction. The plurality of conductors include: first upper conductors (50H, 70H) connected to the upper electrode of the first semiconductor element via first upper solder (101H, 102H); first lower conductor (60H) connected to the lower electrode of the first semiconductor element via first lower solder (103H); second upper conductors (50L, 70L) connected to the upper electrode of the second semiconductor element via second upper solder (101L, 102L); second lower conductor (60L) connected to the lower electrode of the second semiconductor element via second lower solder (103L); first joint conductors (80, 81) connecting the first upper conductor and the second lower conductor via first intermediate solder (104); main terminal (92); and second joint conductor (82) electrically connecting the second upper conductor and the main terminal via second intermediate solder (105). Each solder contains Cu and Sn, Each of the soldering targets has a Ni layer (801, 811), The particle size of at least one of the first upper solder, the second upper solder, the first intermediate solder, and the second intermediate solder is smaller than the particle size of the first lower solder and the second lower solder. A semiconductor device having a solidification initiation point for reducing particle size within the small solder particles, which are smaller in particle size than the first lower solder and the second lower solder, or on the surface to which the small solder particles are connected.

2. A plurality of semiconductor elements (40) having a signal pad and an upper electrode which is the main electrode on the upper surface, and a lower electrode which is the main electrode on the lower surface which is the opposite surface in the thickness direction from the upper surface, and whose area when viewed in plan from the thickness direction is larger than that of the upper electrode, It comprises a plurality of conductors (50, 60, 70, 80, 81, 82, 92) electrically connected to the main electrode via solder, The plurality of semiconductor elements include a first semiconductor element (40H) that constitutes the upper arm (9H) of the upper arm circuit (9), and a second semiconductor element (40L) that constitutes the lower arm (9L) of the upper arm circuit and is arranged alongside the first semiconductor element in one direction perpendicular to the thickness direction such that the upper surfaces are on the same side in the thickness direction. The plurality of conductors include a first upper conductor (50H, 70H) connected to the upper electrode of the first semiconductor element via a first upper solder (101H, 102H), a first lower conductor (60H) connected to the lower electrode of the first semiconductor element via a first lower solder (103H), a second upper conductor (50L, 70L) connected to the upper electrode of the second semiconductor element via a second upper solder (101L, 102L), and a second upper conductor connected to the lower electrode of the second semiconductor element. It includes a second lower conductor (60L) connected via a lower solder (103L), a first joint conductor (80, 81) connecting the first upper conductor and the second lower conductor via a first intermediate solder (104), a conductor other than the first upper conductor, the first lower conductor, the second upper conductor, the second lower conductor, and the first joint conductor, and a second joint conductor (82) connecting the second upper conductor and the other conductor via a second intermediate solder (105), Each solder contains Cu and Sn, Each of the soldering targets has a Ni layer (801, 811), The particle size of at least one of the first upper solder, the second upper solder, the first intermediate solder, and the second intermediate solder is smaller than the particle size of the first lower solder and the second lower solder. A semiconductor device having a solidification initiation point for reducing particle size within the small solder particles, which are smaller in particle size than the first lower solder and the second lower solder, or on the surface to which the small solder particles are connected.

3. The first upper conductor has a first main body portion (50H) and a first spacer portion (70H) interposed between the upper electrode of the first semiconductor element and the first main body portion. The second upper conductor has a second main body portion (50L) and a second spacer portion (70L) interposed between the upper electrode of the second semiconductor element and the second main body portion. The first upper solder is interposed between the upper electrode of the first semiconductor element and the first spacer portion, and between the first spacer portion and the first main body portion, The semiconductor device according to claim 1 or claim 2, wherein the second upper solder is interposed between the upper electrode of the second semiconductor element and the second spacer portion, and between the second spacer portion and the second main body portion.

4. The semiconductor device according to claim 1 or claim 2, wherein the starting point portion is a plurality of wire pieces (120) arranged within the small solder particles and fixed to the surface to which the small solder particles are to be connected.

5. The conductor to be connected by the small solder grains has a textured oxide film (803) on the Ni layer, the Ni layer being mainly composed of Ni and having a continuously uneven surface. The semiconductor device according to claim 1 or claim 2, wherein the starting point is a void (121) covering the uneven oxide film.

6. The conductor to which the small solder particles are connected has a groove (83) for accommodating the overflowed solder. The inner circumferential end of the groove has a continuous uneven surface. The semiconductor device according to claim 1 or claim 2, wherein the starting point is a recess and / or convex portion at the inner circumferential end of the groove.

7. Conductive balls (122) are added to the aforementioned small solder particles. The semiconductor device according to claim 1 or claim 2, wherein the starting point is the ball.

8. The semiconductor device according to claim 7, wherein the ball comprises Ni or Cu.

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