Method and apparatus for inspecting electronic components
The method enhances inspection accuracy by imaging, binarizing, and enlarging wiring regions to detect defects and pseudo-short circuits in curved wiring patterns, ensuring precise defect identification.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- YASUNAGA CORP
- Filing Date
- 2021-10-01
- Publication Date
- 2026-04-28
AI Technical Summary
Existing methods struggle to accurately determine defects and distances between curved wiring patterns on electronic components, particularly in identifying pseudo-short circuits, due to variations in distance and location of defects.
An inspection method involving imaging, binarization, and controlled enlargement of wiring regions to detect the shortest distance between adjacent wirings, incorporating non-wiring conductive areas to account for potential pseudo-short circuits.
Improves inspection accuracy by precisely determining the shortest distance and potential defects in curved wiring patterns, minimizing pseudo-short circuits.
Smart Images

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Abstract
Description
Technical Field
[0001] The technology disclosed herein belongs to the technical field related to inspection methods and inspection devices for electronic components.
Background Art
[0002] In recent years, electronic components have been miniaturized, and accordingly, the wiring formed on the substrate has become denser. For this reason, the distance between the wirings of electronic components has become considerably shorter. When the distance between the wirings becomes extremely short, there is a risk of a so-called pseudo short circuit where current flows between the wirings. Therefore, methods for inspecting whether the distance between the wirings is appropriately maintained have been studied.
[0003] For example, Patent Document 1 discloses a method of detecting a defective part by photographing an inspection object on which a stripe-shaped pattern is formed, binarizing the photographed image, expanding the region including the stripe-shaped part on the binarized image, and then shrinking the expanded region in the pattern arrangement direction to erase the stripe-shaped part.
[0004] Also, Patent Document 2 discloses a method of imaging a circuit configuration part of a printed wiring board, performing binarization processing on the imaged image, expanding the circuit configuration part until the circuit configuration part is short-circuited with respect to the binarized processed image, and determining the pass or fail of the circuit configuration part based on the color area of the expanded circuit configuration part.
Prior Art Documents
Patent Documents
[0005]
Patent Document 1
Patent Document 2
Summary of the Invention
Problems to be Solved by the Invention
[0006] However, wiring patterns on substrates are almost always curved, not just simple stripe patterns like those covered in Patent Documents 1 and 2. In wiring patterns that include curves, the distance between wires often varies depending on the position of the curve, making it difficult to accurately determine defects with a simple process of expanding the wiring pattern as described in Patent Documents 1 and 2.
[0007] Furthermore, even if the presence or absence of a defect can be determined using a method like that described in Patent Document 2, it is difficult to accurately detect the location of the defect or the distance between wires at the location of the defect.
[0008] The technology disclosed herein was developed in view of these points, and its purpose is to improve the inspection accuracy of wiring in electronic components. [Means for solving the problem]
[0009] To solve the aforementioned problems, the technology disclosed herein relates to an inspection method for an electronic component having multiple wirings formed by etching a metal layer arranged on a substrate, and includes an image acquisition step of acquiring a planar image by imaging the portion of the electronic component on which the wirings are arranged from a direction perpendicular to the surface of the substrate so as to include multiple wirings; a binarization step of acquiring a binarized image by binarizing the planar image so as to distinguish between an insulating region which is the region of the substrate and a conductive region which is the region of the metal layer; an enlargement step of repeatedly enlarging the peripheral portion of the wiring region which is the region containing the wiring within the conductive region of the binarized image toward the adjacent insulating region by a predetermined amount until the enlarged region which is the enlarged region comes into contact with another wiring region or an enlarged region which has been enlarged from another wiring region; and a determination step of determining whether or not there is a defect in the electronic component based on the number of times the enlargement process is performed.
[0010] In this configuration, when an enlarged area extended from one wiring area comes into contact with another wiring area or an enlarged area extended from another wiring area, the portion containing the contact point corresponds to the portion with the shortest distance between adjacent wirings in the insulating area. Once the portion with the shortest insulating area is clearly identified, the shortest distance can be determined from the number of times the enlargement process is performed and the amount of enlargement. In particular, because the wiring area of the binarized image is enlarged two-dimensionally, even if the boundary of the wiring area is curved, the portion with the shortest distance in the insulating area can be detected. As a result, the inspection accuracy of wiring in electronic components can be improved.
[0011] In one embodiment of the method for inspecting the electronic component, the magnification step is a step in which the magnification process is performed on one specific wiring region selected from a plurality of wiring regions included in the binarized image, while the magnification process is not performed on the other wiring regions, and the magnification process is repeated until the magnified region, which has been magnified from the specific wiring region, comes into contact with the other wiring regions.
[0012] This configuration allows for the determination of the shortest distance between adjacent wiring regions for each wiring region included in the binarized image. This improves the accuracy of inspections of wiring in electronic components.
[0013] In another embodiment of the method for inspecting the electronic component, the magnification step is a step of performing the magnification process on all of the plurality of wiring regions included in the binarized image, and repeating the magnification process until the magnified regions come into contact with each other.
[0014] This configuration minimizes the number of magnification steps. This improves both inspection accuracy and inspection speed.
[0015] In the above-mentioned method for inspecting electronic components, the plurality of wirings are bonded to the substrate with a conductive material, the binarization step is a step of binarizing the planar image with the region of the conductive material in addition to the region of the metal layer as the conductive region, and the magnification step is a step in which, if the binarized image includes a non-wiring region which is a region of the conductive region that does not include the wiring, and the magnified region comes into contact with the non-wiring region during the magnification process, the non-wiring region is included as a part of the magnified region, and the peripheral edge of the non-wiring region is treated as a part of the peripheral edge of the magnified region, and the magnification process is performed again.
[0016] In other words, if conductive material is scattered between the wires, a conductive area is formed between the wires that is not part of the wiring area. When such an area is formed, it becomes a path for current, causing a pseudo-short circuit between the wires. For this reason, it is desirable to consider areas consisting solely of such conductive material. In the above configuration, the conductive non-wiring area is included in the enlarged area and the enlargement process is performed. This makes it possible to accurately determine the shortest distance of the insulating area. As a result, the inspection accuracy of the wiring of electronic components can be further improved.
[0017] Another aspect of the technology disclosed herein relates to an inspection apparatus for an electronic component having a plurality of wirings formed by etching a metal layer disposed on a substrate. Specifically, the inspection apparatus comprises an image acquisition unit that images a portion of the electronic component on which the wirings are arranged from a direction perpendicular to the surface of the substrate so as to include a plurality of the wirings, and acquires a planar image; and a control unit that performs a plurality of processes on the planar image. The control unit is configured to perform a binarization control that binarizes the planar image to acquire a binarized image so as to distinguish between an insulating region which is the region of the substrate and a conductive region which is the region of the metal layer; an enlargement control that enlarges the peripheral portion of the wiring region which is the region containing the wiring within the conductive region of the binarized image by a predetermined amount toward the adjacent insulating region, and repeats this enlarged region until the enlarged region comes into contact with another wiring region or an enlarged region enlarged from another wiring region; and a determination control that determines whether or not there is a defect in the electronic component based on the number of times the enlargement process is performed.
[0018] Even with this configuration, it is possible to determine the portion with the shortest distance in the insulating area and the shortest distance in that insulating area, thereby improving the inspection accuracy of the wiring of electronic components.
[0019] In the aforementioned electronic component inspection apparatus, the plurality of wirings are bonded to the substrate with a conductive material, the binarization control binarizes the planar image with the conductive material region in addition to the metal layer region as the conductive region, and the control unit, when the binarized image includes a non-wiring region which is a region of the conductive region that does not include the wirings, and when the magnification control brings the magnified region into contact with the non-wiring region due to the magnification process, includes the non-wiring region as part of the magnified region, and performs the next magnification process with the portion of the non-wiring region's periphery excluding the part that came into contact with the magnified region considered as part of the periphery of the magnified region.
[0020] Even with this configuration, an expansion process is performed by including a conductive non-wiring region in the expansion region. As a result, the shortest distance of the insulating region can be accurately grasped. As a result, the inspection accuracy of the wiring of the electronic component can be further improved.
Effect of the Invention
[0021] As described above, according to the technology disclosed herein, the inspection accuracy of the wiring of the electronic component can be improved.
Brief Description of the Drawings
[0022] [Figure 1] FIG. 1 is a diagram showing an electronic component to be inspected by the inspection method according to Embodiment 1, where (a) is a plan view of the electronic component, and (b) is a cross-sectional view taken along a plane corresponding to line B-B. [Figure 2] FIG. 2 is a schematic diagram of an inspection apparatus according to Embodiment 1. [Figure 3] FIG. 3 is a schematic diagram showing the periphery of the camera of the inspection apparatus. [Figure 4] FIG. 4 is a block diagram showing the control system of the inspection apparatus. [Figure 5] FIG. 5 is a diagram showing a planar image and a binarized image captured by the camera. [Figure 6] FIG. 6 is a diagram showing a state where the expansion process is performed once on the first wiring region. [Figure 7] FIG. 7 is a diagram showing a state where the expansion process is performed three times on the first wiring region. [Figure 8] FIG. 8 is a diagram showing a state where the expansion process is performed five times on the first wiring region. [Figure 9] FIG. 9 is a diagram showing a state where expansion control is performed on the second wiring region. [Figure 10] FIG. 10 is a diagram showing a state where expansion control is performed on the third wiring region. [Figure 11] FIG. 11 is a diagram showing contact points with the wiring region where the number of expansion processes is the same. [Figure 12]Figure 12 illustrates a case where the enlarged region and the wiring region make vertex contact. [Figure 13] Figure 13 shows a case where the non-wiring region has a unique shape, and it represents the state after the first wiring region has undergone one enlargement process. [Figure 14] Figure 14 shows the state after the enlargement process has been performed from the state in Figure 13 until the enlarged region comes into contact with the third wiring region. [Figure 15] Figure 15 shows a case where the non-wiring region has a unique shape, and illustrates the state after expansion control has been applied to the third wiring region. [Figure 16] Figure 16 shows the case where the contact points with the wiring area are connected by line segments for the same number of enlargement processes. [Figure 17] Figure 17 is a flowchart showing the processing operation of the controller during visual inspection. [Figure 18] Figure 18 is a flowchart showing the processing operation of the controller in scaling control. [Figure 19] Figure 19 shows the state in which the magnification process has been performed once on all wiring areas in the inspection method according to Embodiment 2. [Figure 20] Figure 20 shows the state in which the magnification process has been performed until the magnified areas come into contact with each other, according to the inspection method of Embodiment 2. [Modes for carrying out the invention]
[0023] The following describes exemplary embodiments in detail with reference to the drawings. Note that the forward / backward, up / down, and left / right directions in the following description are defined for convenience to simplify the explanation and do not limit the actual usage conditions.
[0024] [Embodiment 1] (Electronic components) Figure 1 schematically shows an electronic component (hereinafter referred to as workpiece W) to be inspected by the inspection device 1 (see Figure 2) according to this embodiment 1. Figure 1(a) is a plan view of workpiece W, and Figure 1(b) is a cross-sectional view taken along the plane corresponding to line BB in Figure 1(a).
[0025] The workpiece W has wiring 101 formed on an insulating substrate 100, consisting of a brazing material 101a and a metal layer 101b. This wiring 101 is formed in the pattern shown in Figure 1(a) by laminating the brazing material 101a and the metal layer 101b on the insulating substrate 100 and then etching it. The insulating substrate 100 is made of, for example, ceramics, and the metal layer 101b is made of, for example, copper. The adhesive layer between the insulating substrate 100 and the metal layer 101b is not limited to a conductive material such as the brazing material 101a, but may also be made of a non-conductive material such as epoxy resin. Alternatively, the structure may be one in which the metal layer 101b is placed on the insulating substrate 100 without an adhesive layer.
[0026] Figure 1 illustrates a case where the wiring 101 is formed on only one side of the insulating substrate 100, but the wiring 101 may also be formed on both sides of the insulating substrate 100.
[0027] (Inspection device) Figures 2 and 3 are schematic diagrams of the inspection device 1 according to this embodiment 1.
[0028] The inspection device 1 has a box-shaped housing 2. Inside the housing 2 are three tray storage sections 4, 5, and 6 and one inspection section 3. The tray storage sections 4, 5, and 6 include a pre-inspection tray storage section 4 for storing trays containing workpieces W before inspection, a good product tray storage section 5 for storing trays containing workpieces W determined to be free of defects, and a defective product tray storage section 6 for storing trays containing workpieces W determined to be defective. Details of the inspection section 3 will be described later. The arrangement of the three tray storage sections 4, 5, and 6 and the inspection section 3 is not particularly limited.
[0029] Above each tray storage section 4, 5, 6 and inspection section 3, a rail 7 is provided that extends in the direction in which each tray storage section 4, 5, 6 and inspection section 3 are aligned. An arm 8 for holding a workpiece W is supported on the rail 7 so as to be slidable along the rail 7. At the tip of the arm 8 (in this case, the lower end), a holding section 8a is provided for actually holding the workpiece W. The holding section 8a holds the workpiece W by vacuum suction. The holding section 8a is configured to be movable in the vertical direction. By moving along the rail 7, the arm 8 transports the workpiece W held by the holding section 8a from the pre-inspection tray storage section 4 to the inspection section 3, the good product tray storage section 5, or the defective product tray storage section 6. The arm 8 holds the workpiece W so that the side with the wiring 101 is facing downwards. The arm 8 is controlled by the arm control section 51 of the controller 50, which will be described later.
[0030] The trays stored in each tray storage section 4, 5, and 6 are configured to be movable by a conveyor (not shown) in directions perpendicular to both the rail 7 and the vertical direction. This conveyor allows for alignment of the arm 8 and the trays. Alternatively, the rail 7 may be configured to be movable in directions perpendicular to both the rail 7 and the vertical direction, and the alignment of the arm 8 and the trays may be achieved by moving the rail 7.
[0031] The inspection unit 3 has a rectangular tubular wall portion 3a. Inside the wall portion 3a, the inspection unit 3 is equipped with one camera 10 for acquiring an image of the workpiece W and a plurality (in this case, four) of illumination devices 20 for illuminating the inspection area of the workpiece W with light.
[0032] In this embodiment 1, only one camera 10 is provided for each inspection unit 3. That is, the inspection unit 3 of the visual inspection device 1 is equipped with a single camera as an image acquisition device. The camera 10 photographs the workpiece W held by the arm 8. The camera 10 is a camera capable of acquiring a color image of the workpiece W. The camera 10 can be an IR (Infrared) camera, a CCD (Charge Coupled Device) camera, a CMOS (Complementary Metal Oxide Semiconductor) camera, a line sensor camera, etc. As shown in Figure 4, the camera 10 is configured to communicate with the controller 50 and is controlled by the optical system control unit 52 of the controller 50.
[0033] As shown in Figure 3, the multiple lighting devices 20 are arranged to surround the camera 10. Each lighting device 20 is configured to emit light in the visible light range. Specifically, it emits light of different wavelengths, such as white light, red light, green light, and blue light, either as a single color or in combination. Each lighting device 20 is supported by the wall portion 3a. The angle of incidence of the light emitted by each lighting device 20 onto the workpiece W, and the amount of light, are independently adjusted by the optical system control unit 52 of the controller 50. That is, the controller 50 can operate only some of the lighting devices 20 and stop the others, or operate all of the lighting devices 20 and make the light intensity of each lighting device 20 different. The number and arrangement of the lighting devices 20 are not particularly limited, as long as there are two or more lighting devices 20. In particular, the lighting devices 20 may be arranged along the entire circumferential direction of the inner surface of the wall portion 3a so as to surround the entire area around the camera 10. Each lighting device 20 is composed of an LED light or a fluorescent lamp.
[0034] The inspection device 1 includes a display device 30 (see Figure 4) that can display images captured by the camera 10 and the results of the visual inspection described later. The display device 30 displays images and the like that sent via the controller 50. The display device 30 may be configured to display icons for operating the camera 10 and the lighting device 20.
[0035] <Control System> The inspection device 1 is operated and controlled by a controller 50. The controller 50 has a processor with a CPU, a memory containing multiple modules, etc. The controller 50 has a function to inspect the workpiece W based on images captured by the camera 10. In particular, the controller 50 inspects for the possibility of a short circuit in the workpiece W. Such a function is stored as software in a memory module. The number of processors and memories is not limited to one, and the controller 50 may have two or more processors and memories. Also, the controller 50 may have separate circuits for each function to perform it.
[0036] As shown in Figure 4, the controller 50 includes an arm control unit 51 that controls the movement of the arm 8, an optical system control unit 52 that controls the camera 10 and each lighting device 20, an image processing unit 53 that performs predetermined processing on the image acquired by the camera 10, and a determination unit 54 that determines whether or not there is a possibility of a short circuit based on the image. The arm control unit 51, the optical system control unit 52, the image processing unit 53, and the determination unit 54 are each examples of modules stored in memory.
[0037] The arm control unit 51 controls the movement of the arm 8, the operation of the holding unit 8a, etc. The arm control unit 51 acquires information about the position of the arm 8 from a position sensor (not shown) provided on the arm 8. Based on the information from the position sensor, the arm control unit 51 moves the arm 8 so that it is positioned in the desired location. The arm control unit 51 controls the vertical movement and suction operation of the holding unit 8a so that the workpiece W is transported appropriately.
[0038] The optical system control unit 52 adjusts the focus of the camera 10 and the position, angle, light intensity, and color of the light emitted by each illumination device 20. The camera 10 acquires an image of the workpiece W according to the control signals from the optical system control unit 52. In this embodiment 1, the camera 10 images the portion of the workpiece W where the wiring 101 is arranged from a direction perpendicular to the surface of the insulating substrate 100 so that multiple wirings 101 are included, and acquires a planar image P1 as shown in the upper diagram of Figure 5. Each illumination device 20 irradiates the workpiece W with white light. Based on the control signals from the optical system control unit 52, the camera 10 acquires an image of the workpiece W irradiated with white light by each illumination device 20.
[0039] The image processing unit 53 binarizes the planar image P1 acquired by the camera 10 so that the insulating region IR and the conductive region MR are distinguished, thereby generating a binarized image P2. In this case, the region of the insulating substrate 100 is designated as the insulating region IR, and the regions of the brazing material 101a and the metal layer 101b are designated as the conductive region MR. In this embodiment 1, as shown in the lower part of Figure 5, the image processing unit 53 binarizes the image so that the insulating region IR becomes black and the conductive region MR becomes white.
[0040] The image processing unit 53 performs magnification control on the binarized image P2 by repeatedly magnifying the peripheral portion of the wiring region LR, which is the region containing the wiring 101 within the conductive region MR of the binarized image P2, by a predetermined magnification amount toward the adjacent insulating region IR. The predetermined magnification amount is set based on pixels, for example, it is set to 1 pixel. In other words, the image processing unit 53 magnifies the peripheral portion of the wiring region LR toward the insulating region IR by 1 pixel in each magnification process. Details of the magnification process will be described later.
[0041] The determination unit 54 determines whether or not there is a possibility of a short circuit in the workpiece W based on the processing results of the image processing unit 53. The determination made by the determination unit 54 will be described later.
[0042] The controller 50 outputs a control signal to the display device 30 to display the calculation result of the determination unit 54.
[0043] (inspection) The processing of the image processing unit 53 and the determination unit 54 will be described in detail.
[0044] As described above, the image processing unit 53 binarizes the planar image P1 to generate a binarized image P2 in which the insulating region IR and the conductive region MR are distinguished. As shown in Figure 5, the binarized image P2 based on the planar image P1 exemplified here contains three wiring regions. In addition, this binarized image P2 includes a non-wiring region NLR, which is a region of the conductive region MR that does not contain wiring 101. This non-wiring region NLR is a region consisting only of brazing material 101a that was formed when brazing material 101a was scattered during the manufacturing of the workpiece W. Hereinafter, the wiring region in the upper center of the binarized image P2 will be called the first wiring region LR1, the wiring region in the lower center will be called the second wiring region LR2, and the wiring region extending from the top to the left will be called the third wiring region LR3. Note that the image processing unit 53 may automatically determine whether the conductive region MR is a wiring region LR or a non-wiring region NLR based on the size of the conductive region MR, or it may be set by the operator.
[0045] The image processing unit 53 selects one wiring region from the first to third wiring regions LR1 to LR3. Here, we assume that the first wiring region LR1 is selected.
[0046] The image processing unit 53 performs scaling control on the first wiring region LR1. The image processing unit 53 does not perform scaling control on the second wiring region LR2 and the third wiring region LR3 at this time. As shown in Figure 6, the image processing unit 53 expands the periphery of the first wiring region LR1 by one pixel toward the insulating region IR adjacent to the periphery. As a result of this scaling process, the position of the periphery of the first wiring region LR1 expands by one pixel toward the insulating region IR. Note that "insulating region IR adjacent to the periphery" refers to the pixels of the insulating region IR that are adjacent by a line segment to the pixels constituting the periphery, and does not include pixels of the insulating region IR that are adjacent only at the vertices. In other words, unless adjacent by line segments in both the vertical and horizontal directions, scaling will not occur diagonally from the corners of the wiring region LR.
[0047] The image processing unit 53, for subsequent enlargement processes, assumes that the periphery of the enlarged region ER is the periphery of the first wiring region LR, and enlarges the region from the enlarged region ER toward the adjacent insulating region IR by one pixel.
[0048] Figure 7 shows the state after three magnification processes. As shown in Figure 7, after three magnification processes, the magnified region ER comes into contact with the unwired region NLR. When the magnified region ER comes into contact with the unwired region NLR, the image processing unit 53 includes the unwired region NLR as part of the magnified region ER. The image processing unit 53 then performs the next magnification process, treating the portion of the unwired region NLR excluding the part that came into contact with the magnified region ER as part of the periphery of the magnified region ER. The unwired region NLR is a conductive region MR and becomes a current path during a short circuit. Therefore, the current path during a short circuit is first wiring region LR1 → unwired region NLR → third wiring region LR3. By including the unwired region NLR as part of the magnified region ER when the magnified region ER comes into contact with it, the unwired region NLR is no longer counted as an insulating region IR. This allows the current path through the unwired region NLR to be taken into consideration, enabling the shortest insulating distance to be calculated with greater accuracy.
[0049] Figure 8 shows the state after the magnification process has been performed five times. As shown in Figure 8, after the magnification process has been performed five times, the magnified region ER comes into contact with the third wiring region LR3. The image processing unit 53 terminates the magnification process when the magnified region ER comes into contact with a wiring region other than the first wiring region LR1 (in this case, the third wiring region LR3). In other words, in this embodiment 1, the image processing unit 53 is configured to repeatedly perform the magnification process until the magnified region ER, which has been magnified from the selected wiring region (in this example, the first wiring region LR1), comes into contact with another wiring region (in this example, the third wiring region LR3).
[0050] After the image processing unit 53 finishes the magnification process, it stores the contact position (coordinates of the contact position) between the magnified area ER and other wiring areas, and the number of times the magnification process was performed, in the storage unit 40.
[0051] After completing the expansion control of the first wiring area LR1, the image processing unit 53 similarly performs expansion control on the second wiring area LR2 and the third wiring area LR3, and stores the contact position (coordinates of the contact position) between the expanded area ER and the other wiring areas, and the number of times the expansion process is performed, in the storage unit 40.
[0052] Figure 9 shows the results of the inspection of the second wiring area LR2. In the inspection of the second wiring area LR, after 8 magnification processes, it came into contact with the third wiring area LR3. Figure 10 shows the results of the inspection of the third wiring area LR. In the inspection of the third wiring area LR3, after 5 magnification processes, it came into contact with the first wiring area LR1.
[0053] The determination unit 54 determines whether there are defects based on the number of times the expansion process was performed on each of the first wiring area LR1, the second wiring area LR2, and the third wiring area LR, after expansion control has been performed on each wiring area LR. Here, the determination unit 54 determines whether there is a possibility of a short circuit between the wiring areas LR, and in particular whether there is a possibility of a pseudo-short circuit. More specifically, the determination unit 54 determines whether there are defects based on whether the number of expansion processes is equal to or greater than a threshold. The threshold for whether there are defects can be set by determining the shortest distance of the insulating area that may be prone to a pseudo-short circuit through experiments, etc., and dividing this distance by the size of one pixel in the expansion process.
[0054] In the scaling process, the wiring region L and R are scaled one pixel at a time. Therefore, the shortest distance of the insulating region IR between the wiring regions L and R (hereinafter referred to as the shortest insulating distance) can be calculated using the following formula.
[0055] Minimum insulation distance = Pixel size × Number of magnification processes until contact is made Furthermore, this shortest insulation distance corresponds to the shortest electrical distance. In other words, the shortest insulation distance corresponds to the distance of the insulation area included in the shortest electrical distance when adjacent wires are hypothetically short-circuited.
[0056] In the above formula, the pixel size during the magnification process is constant. Therefore, the shortest insulation distance is automatically determined as long as the number of magnification processes until contact with an adjacent wiring area is known. Consequently, the possibility of a pseudo-short circuit (presence or absence of a defect) can be determined from the number of magnification processes without actually calculating the shortest insulation distance. Alternatively, the determination unit 54 may actually calculate the shortest insulation distance based on the above formula and determine the presence or absence of a defect based on this shortest insulation distance.
[0057] When the controller 50 determines that a defect exists by the determination unit 54, it displays on the display device 30 the contact positions of items that have undergone the same number of magnification processes. For example, suppose that 5 magnification processes result in a value below the threshold, and 8 magnification processes result in a value above the threshold. In this case, a defect is determined to exist between the first wiring area LR1 and the third wiring area LR3. As shown in Figure 11, the controller 50 displays the contact position between the third wiring area LR3 when the first wiring area LR1 is magnified, and the contact position between the first wiring area LR1 when the third wiring area LR3 is magnified. This clarifies the location of the defect. The display device 30 may also display line segments connecting the contact positions.
[0058] Figure 12 illustrates a case where the enlarged region ER and the wiring region LR come into contact at their vertices. The controller 50 determines that the enlarged region ER has come into contact with the wiring region LR even when the vertices of the enlarged region ER and the vertices of the wiring region LR come into contact. As shown in Figure 12, in a wiring region having a curved portion such as the third wiring region LR3, if there is a lot of excess solder, the vertices of the enlarged region ER and the vertices of the wiring region LR may come into contact, and the shortest direction between the wiring regions LR may be diagonal. Even in this case, the determination is made based on the number of enlargement processes.
[0059] Figures 13 to 16 show cases where the non-wiring area (NLR) has an unusual shape. When the non-wiring area (NLR) has an unusual shape, the coordinates of the contact position may shift in both the vertical and horizontal directions, as shown in Figures 14 and 15. Even in this case, the determination is calculated based on the number of magnification steps. That is, as mentioned above, the non-wiring area (NLR) can become a current path when short-circuited. Therefore, if the non-wiring area (NLR) is present, the coordinates of the start and end points of the current path may shift in both the vertical and horizontal directions. In this case, as shown in Figure 16, if the contact positions are connected by line segments and the distance between those coordinates is taken as the shortest insulation distance, the current path through the non-wiring area (NLR) is not easily considered, and the accuracy decreases. Therefore, determining the determination based on the number of magnification steps that zoom towards the insulation area (IR) improves inspection accuracy.
[0060] Figure 17 is a flowchart showing the processing operation of the controller 50 during the inspection of workpiece W.
[0061] First, in step S1, the controller 50 moves the workpiece W to the position of the inspection unit 3.
[0062] Next, in step S2, the controller 50 acquires a planar image P1 of the workpiece W.
[0063] Next, in step S3, the controller 50 binarizes the acquired planar image P1 so that the insulating region IR and the conductive region MR are distinguished, and acquires a binarized image P2.
[0064] Next, in step S4, the controller 50 distinguishes between the wiring region LR and the non-wiring region NLR of the conductive region MR included in the binarized image P2. The controller 50 distinguishes between the wiring region LR and the non-wiring region NLR based, for example, on the size of their area.
[0065] Next, in step S5, the controller 50 performs augmentation control. Details of the augmentation control will be described later.
[0066] After the aforementioned magnification control, in step S6, the controller 50 calculates the minimum number of magnification operations.
[0067] Next, in step S7, the controller 50 determines whether the minimum number of steps calculated in step S6 is less than or equal to a threshold. If the controller 50 determines that the minimum number of steps is less than or equal to the threshold (YES), it proceeds to step S8. If the controller determines that the minimum number of steps is greater than the threshold (NO), it proceeds to step S10.
[0068] In step S8, the controller 50 determines that there is a defect in the workpiece W. Then, in the next step S9, it displays the contact position for the same number of magnification processes, that is, the magnified area ER, the wiring area LR, and the contact position when the number of magnification processes is the minimum. After step S9, it returns.
[0069] In step S10, the controller 50 determines whether the inspection of the entire workpiece W has been completed. If the controller 50 determines that the inspection of the entire workpiece W has been completed (YES), it proceeds to step S11. If the controller 50 determines that the inspection of the entire workpiece W has not been completed (NO), it returns to step S1.
[0070] In step S11, the controller 50 determines that there are no defects in the workpiece W. After step S11, the system returns to its original state.
[0071] Figure 18 is a flowchart showing the processing operation of the controller 50 in the aforementioned scaling control.
[0072] First, in step S51, the controller 50 selects one wiring region from the wiring regions LR included in the binarized image P2.
[0073] Next, in step S52, the controller 50 performs an expansion process. The controller 50 expands the peripheral edge of the selected wiring region LR by one pixel toward the insulating region IR adjacent to the peripheral edge, as described above.
[0074] Next, in step S53, the controller 50 determines whether the enlarged area ER has come into contact with the other wiring area LR. If the controller 50 determines that the enlarged area ER has come into contact with the other wiring area LR (YES), it proceeds to step S54. If the controller 50 determines that the enlarged area ER has not come into contact with the other wiring area LR (NO), it proceeds to step S56.
[0075] In step S54, the controller 50 stores the number of times the expansion process is performed and the contact position (coordinates of the contact position) between the expanded area ER and the other wiring area LR.
[0076] In the next step S55, the controller 50 determines whether or not expansion control has been completed for all wiring areas LR. The controller 50 returns if the answer is YES, meaning expansion control has been completed for all wiring areas LR. On the other hand, if the answer is NO, meaning expansion control has not been completed for at least one wiring area LR, the controller 50 proceeds to step S57.
[0077] In step S56, the controller 50 considers the periphery of the enlarged area ER as the periphery of the wiring area LR, returns to step S52, and performs the enlargement process again.
[0078] In step S57, the controller 50 selects the wiring area LR that has not undergone expansion control, returns to step S52, and performs the expansion process.
[0079] Therefore, in this embodiment 1, the portion of the workpiece W where the wiring 101 is arranged is imaged from a direction perpendicular to the surface of the insulating substrate 100 so that multiple wirings 101 are included, and a planar image P1 is obtained. The planar image P1 is binarized to obtain a binarized image P2 so that the insulating region IR, which is the region of the insulating substrate 100, and the conductive region MR, which is the region of the brazing material 101a and the metal layer 101b are distinguished from the planar image P1. An enlargement process is performed on the peripheral portion of the wiring region LR, which is the region containing the wiring 101 within the conductive region MR of the binarized image P2, by a predetermined enlargement amount toward the adjacent insulating region IR. This process is repeated until the enlarged region ER, which is the enlarged region, comes into contact with another wiring region, and the presence or absence of defects is determined based on the number of enlargement processes. As a result, when the enlarged region ER, which is extended from one wiring region LR, comes into contact with another wiring region LR, the portion including the contact point corresponds to the shortest insulating region IR in the binarized image. Also, since the enlargement amount is constant, the number of enlargement processes represents the shortest distance of the insulating region IR between the wiring regions LR. This allows for accurate determination of the possibility of a pseudo-short circuit occurring between wiring regions L and R. In particular, by expanding the wiring region L and R of the binarized image P2 two-dimensionally, even if the boundary between the wiring region L and R and the insulation region IR is curved, as illustrated in this embodiment, the portion with the shortest insulation distance can be detected. This allows for accurate determination of whether or not there is a possibility of a pseudo-short circuit between the wiring. Therefore, the inspection accuracy of the wiring of the workpiece W can be improved.
[0080] Furthermore, in this embodiment 1, while an enlargement process is performed on one wiring region LR selected from a plurality of wiring regions LR included in the binarized image P2, the enlargement process is not performed on the other wiring regions LR. The enlargement process is repeated until the enlarged region ER, which is enlarged from one wiring region LR, comes into contact with the other wiring regions LR. This makes it possible to determine the shortest distance of the insulating region IR between adjacent wiring regions LR for each wiring region LR included in the binarized image P2. This further improves the inspection accuracy of the wiring 101 of the workpiece W.
[0081] Furthermore, in this embodiment 1, if the binarized image P2 includes a non-wiring region NLR, which is a region within the conductive region MR that does not include wiring 101, and the magnified region ER comes into contact with the non-wiring region NLR during the magnification process, the non-wiring region NLR is included as part of the magnified region ER, and the peripheral edge of the non-wiring region NLR is treated as part of the peripheral edge of the magnified region ER for the next magnification process. As a result, parts consisting only of solder 101a, such as solder 101a scattered between wiring 101, are taken into consideration, making it possible to determine the shortest distance of the insulating region IR in the current path when a pseudo-short circuit occurs between wiring regions LR. As a result, the inspection accuracy of the wiring 101 of the workpiece W can be further improved.
[0082] (Embodiment 2) Embodiment 2 will now be described in detail with reference to the drawings. In the following description, parts common to Embodiment 1 will be denoted by the same reference numerals, and their detailed descriptions will be omitted.
[0083] In Embodiment 2, the processing by the image processing unit 53 differs from that in Embodiment 1. Specifically, in Embodiment 2, as shown in Figure 19, the image processing unit 53 performs an enlargement process on all of the multiple wiring regions (here, the first wiring region LR1, the second wiring region LR2, and the third wiring region LR3) included in the binarized image P2. The image processing unit 53 then repeats the enlargement process until the enlarged regions come into contact with each other. In the following description, the enlarged region enlarged from the first wiring region LR1 is referred to as the first enlarged region ER1, the enlarged region enlarged from the second wiring region LR2 is referred to as the second enlarged region ER2, and the enlarged region enlarged from the third wiring region LR3 is referred to as the third enlarged region ER3.
[0084] Figure 20 shows the result of the image processing unit 53 performing the magnification process three times. In this embodiment 2 as well, when the magnified region ER comes into contact with the non-wiring region NLR, the image processing unit 53 includes the non-wiring region NLR as part of the magnified region ER. Furthermore, the image processing unit 53 performs the next magnification process by treating the portion of the non-wiring region NLR excluding the part that came into contact with the magnified region ER as part of the periphery of the magnified region ER. As a result, as shown in black in Figure 20, the first magnified region ER1 and the third magnified region ER3 come into contact by one pixel after the three magnification processes. This makes it possible to clearly identify the position of the shortest insulating distance in the binarized image P2.
[0085] The determination unit 54 determines the possibility of a short circuit between the wiring area L and R based on the direction in which the shortest insulation distance portion extends and the number of times the expansion process is performed.
[0086] Thus, in this second embodiment, the magnification process is performed on all of the multiple wiring regions LR included in the binarized image P2, and the magnification process is repeated until the magnified regions ER come into contact with each other. Even in this way, it is possible to determine the portion where the distance between the wiring regions LR is shortest and the shortest distance of the insulating region IR. In particular, in this embodiment, the number of magnification processes performed on a single binarized image P2 can be minimized, thereby improving both inspection accuracy and inspection speed.
[0087] (Other embodiments) The technologies disclosed herein are not limited to the embodiments described above and may be substituted insofar as they do not depart from the spirit of the claims.
[0088] For example, in the aforementioned Embodiment 1, the presence or absence of defects was determined only after the expansion control of all wiring regions LR was completed. However, the presence or absence of defects may be determined based on the expansion process of one wiring region LR after the expansion control of that region is completed. In this case, if a defect is determined to exist when the expansion control of some wiring regions LR is completed, the inspection may be terminated without performing expansion processing on the remaining wiring regions LR.
[0089] Furthermore, the embodiments 1 and 2 described above illustrate the case where there is only one portion with the shortest insulation distance. However, the system is not limited to this, and there may be two or more portions with the shortest insulation distance. In this case, the controller 50 displays each of the portions with the shortest insulation distance on the display device 30.
[0090] The embodiments described above are merely illustrative and should not be interpreted as limiting the scope of this disclosure. The scope of this disclosure is defined by the claims, and any variations or modifications within the equivalent scope of the claims are all within the scope of this disclosure. [Industrial applicability]
[0091] The technology disclosed herein is useful for inspecting the possibility of short circuits between wirings in an electronic component having multiple wirings formed by etching a metal layer placed on a substrate. [Explanation of Symbols]
[0092] 1. Inspection device 101 Wiring 101a Brazing material 101b Metal layer ER expansion area IR isolation region LR wiring area MR conductive area NLR non-routing area P1 Planar image P2 binarized image
Claims
1. A method for inspecting an electronic component having multiple wirings formed by etching a metal layer placed on a substrate, Image acquisition step: Captures a planar image of the portion of the electronic component in which the wiring is arranged, from a direction perpendicular to the surface of the substrate, such that multiple wirings are included in the image. A binarization step is performed to obtain a binarized image by binarizing the planar image so that the insulating region, which is the region of the substrate, and the conductive region, which is the region of the metal layer, can be distinguished from the planar image. The process of expanding the peripheral edge of the wiring region, which is a region containing the wiring, within the conductive region of the binarized image, by a predetermined amount toward the adjacent insulating region, is repeated until the expanded region comes into contact with another wiring region or an expanded region expanded from another wiring region. A determination step of determining whether or not the electronic component has defects based on the number of times the magnification process is performed, A method for inspecting electronic components, characterized by including [a certain element].
2. In the method for inspecting electronic components according to claim 1, A method for inspecting electronic components, characterized in that the magnification step is performed on one specific wiring region selected from a plurality of wiring regions included in the binarized image, while the magnification process is not performed on the other wiring regions, and the magnification process is repeated until the magnified region, which has been magnified from the specific wiring region, comes into contact with the other wiring regions.
3. In the method for inspecting electronic components according to claim 1, The method for inspecting electronic components is characterized in that the magnification step is a step of performing the magnification process on all of the plurality of wiring regions included in the binarized image, and repeating the magnification process until the magnified regions come into contact with each other.
4. In the method for inspecting electronic components according to any one of claims 1 to 3, The plurality of wires are bonded to the substrate with a conductive material. A method for inspecting electronic components, characterized in that the binarization step is a step of binarizing the planar image with the region of the conductive material, in addition to the region of the metal layer, as the conductive region.
5. A method for inspecting an electronic component having a plurality of wirings formed by etching a metal layer placed on a substrate, Image acquisition step: Captures a planar image of the portion of the electronic component in which the wiring is arranged, from a direction perpendicular to the surface of the substrate, such that multiple wirings are included in the image. A binarization step is performed to obtain a binarized image by binarizing the planar image so that the insulating region, which is the region of the substrate, and the conductive region, which is the region of the metal layer, can be distinguished from the planar image. The process of expanding the peripheral edge of the wiring region, which is a region containing the wiring, within the conductive region of the binarized image, by a predetermined amount toward the adjacent insulating region, is repeated until the expanded region comes into contact with another wiring region or an expanded region expanded from another wiring region. A determination step of determining whether or not the electronic component has defects based on the number of times the magnification process is performed, Includes, The plurality of wires are bonded to the substrate with a conductive material. The binarization step is a step of binarizing the planar image by treating the region of the conductive material, in addition to the region of the metal layer, as the conductive region. A method for inspecting electronic components, characterized in that the magnification step includes a non-wiring region which is a region of the conductive region that does not include the wiring, and when the magnification process brings the magnified region into contact with the non-wiring region, the non-wiring region is included as a part of the magnified region, and the peripheral edge of the non-wiring region is treated as a part of the peripheral edge of the magnified region when performing the next magnification process.
6. An inspection apparatus for an electronic component having multiple wirings formed by etching a metal layer placed on a substrate, An image acquisition unit acquires a planar image by imaging the portion of the electronic component in which the wiring is arranged from a direction perpendicular to the surface of the substrate so as to include multiple such wirings. The system comprises a control unit that performs a plurality of processes on the planar image, The control unit, A binarization control is performed to obtain a binarized image by binarizing the planar image so that the insulating region, which is the region of the substrate, and the conductive region, which is the region of the metal layer, can be distinguished from the planar image. The expansion control involves expanding the peripheral portion of the wiring region, which is the region containing the wiring, within the conductive region of the binarized image, by a predetermined amount toward the adjacent insulating region, and repeating this expansion process until the expanded region, which is the expanded region, comes into contact with another wiring region or an expanded region that has been expanded from another wiring region. A determination control that determines whether or not the electronic component has defects based on the number of times the aforementioned magnification process is performed, An electronic component inspection apparatus characterized by being configured to perform the following.
7. In the electronic component inspection apparatus according to claim 6, The plurality of wires are bonded to the substrate with a conductive material. The inspection apparatus for electronic components is characterized in that the binarization control binarizes the planar image by treating the region of the conductive material, in addition to the region of the metal layer, as the conductive region.
8. An inspection apparatus for an electronic component having a plurality of wirings formed by etching a metal layer placed on a substrate, An image acquisition unit acquires a planar image by imaging the portion of the electronic component in which the wiring is arranged from a direction perpendicular to the surface of the substrate so as to include multiple such wirings. The system comprises a control unit that performs a plurality of processes on the planar image, The control unit, A binarization control is performed to obtain a binarized image by binarizing the planar image so that the insulating region, which is the region of the substrate, and the conductive region, which is the region of the metal layer, can be distinguished from the planar image. The expansion control involves expanding the peripheral portion of the wiring region, which is the region containing the wiring, within the conductive region of the binarized image, by a predetermined amount toward the adjacent insulating region, and repeating this expansion process until the expanded region, which is the expanded region, comes into contact with another wiring region or an expanded region that has been expanded from another wiring region. A determination control that determines whether or not the electronic component has defects based on the number of times the aforementioned magnification process is performed, It is configured to be executable, The plurality of wires are bonded to the substrate with a conductive material. The binarization control binarizes the planar image by treating the region of the conductive material as the conductive region in addition to the region of the metal layer. The control unit is characterized in that the binarized image includes a non-wiring region which is a region of the conductive region that does not include the wiring, and when the magnified region comes into contact with the non-wiring region due to the magnification process in the magnification control, it includes the non-wiring region as a part of the magnified region and performs the next magnification process with the portion of the periphery of the non-wiring region excluding the portion that came into contact with the magnified region considered as a part of the periphery of the magnified region.
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