Chip systems and electronic devices

Abstract

The present disclosure provides a chip system and an electronic device, which belongs to the field of electronic technology. The chip system includes a BGA chip (1), a PCB (2), a signal source module (3), and a detection module (4). A functional pin (111) of the BGA chip (1) is soldered to a functional solder pad (21) of the PCB (2) by using a first solder ball (6), and a detection pin (112) of the BGA chip (1) is soldered to a detection solder pad (22) of the PCB (2) by using a second solder ball (7). The designed life of the second solder ball (7) is shorter than the designed life of the first solder ball (6). A detection path (10) is formed between the BGA chip (1) and the PCB (2), and the detection path (10) includes the second solder ball (7). The signal source module (3) is configured to transmit a detection signal to the detection module (4) via the detection path (10), and the detection module (4) is configured to determine a status of the detection path (10) based on the received detection signal.

Description

Technical Field

[0001] The present disclosure relates to the field of electronic technology, particularly to chip systems and electronic devices.

Background Art

[0002] A ball grid array (BGA) chip is soldered to a printed circuit board (PCB) by using solder balls, and signals can be transmitted between the BGA chip and the PCB by using the solder balls.

[0003] However, in the process of using a BGA chip, the solder balls can crack due to various types of stress, which can affect the quality of the transmitted signals and even cause signal interruption.

Summary of the Invention

[0004] The present disclosure provides a chip system and an electronic device. The chip system provided by the present disclosure can predict the status of the first solder balls between the functional pins of the BGA chip and the functional solder pads of the PCB by monitoring the status of the second solder balls between the detection pins of the BGA chip and the detection solder pads of the PCB. As a result, timely measures can be taken to delay or even avoid cracking of the first solder balls, thereby improving the reliability of the chip system. The technical solutions of the chip system and the electronic device are described as follows.

[0005] According to a first aspect, the present disclosure provides a chip system. The chip system includes a ball grid array (BGA) chip, a printed circuit board (PCB), a signal source module, and a detection module. The BGA chip has a plurality of function pins and at least one detection pin, and the PCB has a plurality of function solder pads and at least one detection solder pad. The function pins are soldered to the function solder pads by using first solder balls, and the detection pins are soldered to the detection solder pads by using second solder balls. At least one detection path is formed between the BGA chip and the PCB, and the detection path includes one or more unit circuits connected in series, and the unit circuits include sequentially connected detection pins, second solder balls, and detection solder pads. The signal source module is configured to transmit detection signals to the detection module via at least one detection path, and the detection module is configured to determine the status of at least one detection path based on the received detection signals.

[0006] The functional pins of a BGA chip may be pins used to implement the basic functions of the BGA chip, such as power pins, ground pins, and function pins. Power pins are pins that provide connections for the power supply of the BGA chip, ground pins are pins that provide connections for the grounding of the BGA chip, and function pins are pins that provide connections for signals required by the BGA chip. If a crack occurs in the first solder ball between the function pins and the function solder pads, the function or performance of the BGA chip may be affected.

[0007] The detection pin on the BGA chip may be a pin specifically used to monitor the status of the second solder ball. The detection pin 112 may have no other function besides status monitoring. If a crack occurs in the second solder ball between the detection pin and the detection solder pad, the BGA chip may still operate normally.

[0008] On a PCB, a functional solder pad refers to a solder pad soldered to a functional pin, while a detection solder pad refers to a solder pad soldered to a detection pin.

[0009] The first solder ball is located between the function pin and the function solder pad, and the second solder ball is located between the detection pin and the detection solder pad. The designed lifespan of the second solder ball is shorter than that of the first solder ball. Therefore, under normal circumstances, the second solder ball may crack before the first solder ball. Thus, the status of the first solder ball can be predicted by monitoring the status of the second solder ball.

[0010] The signal source module is configured to generate a detection signal and to transmit the detection signal to the detection module via the detection path. The detection module is configured to receive the detection signal via the detection path and to determine the status of the detection path based on the received detection signal, in other words, to determine the status of the second solder ball included in the detection path.

[0011] According to the technical solution provided in this disclosure, a detection path is formed between the BGA chip and the PCB of a chip system, and the detection path includes a second solder ball. A signal source module may transmit a detection signal to a detection module via the detection path, and the detection module may determine the status of the second solder ball included in the detection path based on the received detection signal; in other words, the detection module may monitor the status of the second solder ball.

[0012] The designed lifespan of the second solder ball is shorter than that of the first solder ball. Therefore, under normal circumstances, the second solder ball may crack before the first solder ball. Consequently, if a crack in the second solder ball is detected, timely measures to delay or prevent cracking of the first solder ball can be taken, thereby improving the reliability of the chip system.

[0013] In a possible implementation, a BGA chip includes a substrate and a die. The substrate has function pins and sense pins, and a signal source module and a sense module are integrated into the die, which includes at least one signal transmit terminal and at least one signal receive terminal. The sense path includes at least two unit circuits connected in series, both ends of the sense path being sense pins, and the signal transmit terminal and the signal receive terminal are electrically connected to the two ends of the sense path, respectively.

[0014] According to the technical solution provided in this disclosure, both the signal source module and the detection module are integrated into the die, and as a result the die can transmit and receive detection signals, no additional hardware circuitry is required on the PCB, and only a few detection solder pads on the PCB need to be electrically connected together to implement the series connection of the unit circuits. This makes the chip system provided in this disclosure easier to implement.

[0015] In possible implementations, the signal source module and the detection module are located on the PCB. The detection path includes at least two unit circuits connected in series, with both ends of the detection path being detection solder pads, and the signal source module and the detection module are electrically connected to the two ends of the detection path, respectively.

[0016] In possible implementations, a BGA chip includes a substrate and a die. The substrate has function pins and sensing pins, the signal source module is integrated into the die, and the sensing module is located on the PCB. One end of the sensing path is the sensing pins, and the other end is the sensing solder pad. The die is electrically connected to the sensing pins at one end of the sensing path, and the sensing module is electrically connected to the sensing solder pad at the other end of the sensing path.

[0017] In possible implementations, the signal source module is located on the PCB, the BGA chip includes a substrate and a die, the substrate has function pins and detection pins, and the detection module is integrated into the die. One end of the detection path is a detection solder pad, and the other end is a detection pin. The signal source module is electrically connected to the detection solder pad at one end of the detection path, and the die is electrically connected to the detection pin at the other end of the detection path.

[0018] In possible implementations, the detection pins are closer to the edge of the BGA chip than the function pins.

[0019] In possible implementations, the detection pins are closer to the corners of the BGA chip than the function pins.

[0020] In possible implementations, the second solder ball is closer to the edge of the BGA chip than the first solder ball.

[0021] According to the technical solutions provided in this disclosure, stress damage to the BGA chip typically occurs at the edges of the BGA chip. Therefore, the second solder ball is positioned closer to the edge and the first solder ball is positioned closer to the center, and as a result, the designed lifespan of the second solder ball may be shorter than that of the first solder ball.

[0022] In possible implementations, the second solder ball is closer to the corner of the BGA chip than the first solder ball.

[0023] According to the technical solutions provided in this disclosure, in the case of edges, stress damage to the BGA chip is more likely to occur at the corners of the BGA chip. Therefore, if the second solder ball is located at a corner of the BGA chip and the first solder ball is located at a non-corner location, the designed lifespan of the second solder ball may be shorter than that of the first solder ball.

[0024] In possible implementations, the outer diameter of the second solder ball is smaller than the outer diameter of the first solder ball.

[0025] According to the technical solution provided by the present disclosure, the first solder ball has a lower possibility of cracking than the second solder ball based on the above-described arrangement. As a result, the designed life of the second solder ball is shorter than the designed life of the first solder ball.

[0026] In a possible implementation, the strength of the material of the second solder ball is smaller than the strength of the material of the first solder ball.

[0027] According to the technical solution provided by the present disclosure, the strength of the material of the second solder ball is smaller than the strength of the material of the first solder ball. Therefore, the second solder ball has a higher possibility of cracking than the first solder ball. As a result, the designed life of the second solder ball is shorter than the designed life of the first solder ball.

[0028] In a possible implementation, N levels of detection paths are formed between the BGA chip and the PCB, and the designed life of the second solder ball included in the (M - 1)th level of detection path is shorter than the designed life of the second solder ball included in the Mth level of detection path.

[0029] N is an integer greater than 1, and M is an arbitrary integer greater than 1 and not greater than N.

[0030] According to the technical solution provided by the present disclosure, N levels of detection paths are set, and the designed lives of the second solder balls included in the N levels of detection paths are different. As a result, the cracking process of the solder balls can be traced based on the status of the second solder balls included in the N levels of detection paths, the status of the first solder ball can be predicted more accurately. As a result, corresponding measures for delaying or even avoiding the cracking of the first solder ball can be accurately taken in a more timely manner, thereby further improving the reliability of the chip system.

[0031] In possible implementations, a first-level detection path and a second-level detection path are formed between the BGA chip and the PCB, with one or more first-level detection paths and one or more second-level detection paths. The designed lifespan of a second solder ball included in the first-level detection path is shorter than the designed lifespan of a second solder ball included in the second-level detection path.

[0032] In possible implementations, the detection pins included in the (M-1) level detection path are closer to the edge of the BGA chip than the detection pins included in the M level detection path.

[0033] In possible implementations, the detection pins included in the (M-1) level detection path are closer to the corners of the BGA chip than the detection pins included in the M level detection path.

[0034] In possible implementations, a second solder ball included in the (M-1) level detection path is closer to the edge of the BGA chip than a second solder ball included in the M level detection path.

[0035] According to the technical solutions provided in this disclosure, stress damage to the BGA chip is more likely to occur at the edges of the BGA chip. Therefore, the designed lifespan of a second solder ball included in the (M-1) level detection path may be shorter than that of a second solder ball included in the M level detection path, based on the aforementioned arrangement.

[0036] In possible implementations, a second solder ball included in the (M-1) level detection path is closer to the corner of the BGA chip than a second solder ball included in the M level detection path.

[0037] According to the technical solutions provided in this disclosure, in the case of edges, stress damage to the BGA chip is more likely to occur at the corners of the BGA chip. Therefore, the designed lifespan of a second solder ball included in the (M-1) level detection path may be shorter than that of a second solder ball included in the M level detection path, based on the aforementioned arrangement.

[0038] In possible implementations, the outer diameter of the second solder ball included in the (M-1) level detection path is smaller than the outer diameter of the second solder ball included in the M level detection path.

[0039] According to the technical solution provided in this disclosure, the second solder ball included in the M-level detection path is less likely to crack than the second solder ball included in the (M-1)-level detection path based on the aforementioned arrangement, and as a result, the designed lifespan of the second solder ball included in the (M-1)-level detection path is shorter than that of the second solder ball included in the M-level detection path.

[0040] In possible implementations, the strength of the material of the second solder ball included in the (M-1) level detection path is less than the strength of the material of the second solder ball included in the M level detection path.

[0041] According to the technical solution provided in this disclosure, the strength of the material of the second solder ball included in the (M-1) level detection path is less than the strength of the material of the second solder ball included in the M level detection path. Therefore, the second solder ball included in the (M-1) level detection path is more likely to crack than the second solder ball included in the M level detection path, and as a result, the designed lifespan of the second solder ball included in the (M-1) level detection path is shorter than the designed lifespan of the second solder ball included in the M level detection path.

[0042] In possible implementations, both M and N are 2.

[0043] In possible implementations, the designed lifespan of second solder balls belonging to the same level of detection path is the same.

[0044] In a possible implementation, the detection module is configured to determine that if no detection signal is received via the target detection path, a crack occurs in a second solder ball included in the target detection path, where the target detection path is any detection path.

[0045] In a possible implementation, the chip system further includes a control module, which is configured to adjust the temperature of the BGA chip based on the status of the detection path determined by the detection module.

[0046] In a possible implementation, the control module is configured to reduce the degree of temperature fluctuation of the BGA chip if it is determined that a crack has occurred in the second solder ball included in the at least one detection path.

[0047] The degree of temperature fluctuation of a BGA chip may be understood as the temperature range of the BGA chip.

[0048] In possible implementations, the control module is configured to: reduce the degree of temperature fluctuation of the BGA chip by a first action if it is determined that a crack has occurred in a second solder ball included in the (M-1) level detection path; and reduce the degree of temperature fluctuation of the BGA chip by a second action if it is determined that a crack has occurred in a second solder ball included in the M level detection path.

[0049] The degree of temperature fluctuation of the BGA chip obtained by the second operation is smaller than the degree of temperature fluctuation of the BGA chip obtained by the first operation.

[0050] According to the technical solution provided in this disclosure, the reduced degree of temperature fluctuation of the BGA chip is adapted to the status of the first solder balls based on the aforementioned arrangement. This not only prevents the rapid deterioration of the status of the first solder balls caused by insufficient reduction of the degree of temperature fluctuation, but also prevents an excessive increase in the power consumption of the chip system caused by a significant reduction in the degree of temperature fluctuation.

[0051] In a possible implementation, the control module is configured to report a status message indicating that the BGA chip is abnormal if it determines that a crack has occurred in a second solder ball included in the Nth level detection path.

[0052] In a possible implementation, the control module is configured to report status information indicating that the BGA chip is abnormal if it determines that a crack has formed in a second solder ball that has been included in at least two levels of detection paths within the target duration.

[0053] In a possible implementation, the control module is configured to report status information indicating that the BGA chip is abnormal if it determines that a crack has formed in a second solder ball included in any level of detection path.

[0054] In a possible implementation, the control module is configured to control the range of change in power consumption of the operating BGA chip to a narrower range if it determines that a crack has occurred in a second solder ball included in at least one detection path.

[0055] According to the technical solutions provided in this disclosure, when the range of change in the power consumption of the BGA chip is narrowed, the range of change in heat generated by the operating BGA chip is also narrowed, which helps to reduce the degree of temperature fluctuation of the BGA chip.

[0056] In a possible implementation, the control module is configured to reduce the frequency with which the BGA chip switches between operating and non-operating states if it is determined that a crack has occurred in the second solder ball included in the at least one detection path.

[0057] Non-operating states may include sleep mode or power-off state. Power consumption by the BGA chip in a non-operating state is very low or even zero. Consequently, the BGA chip in a non-operating state generates very little or no heat, which is significantly different from the heat generated in an operating state.

[0058] According to the technical solutions provided in this disclosure, the frequency of switching between operating and non-operating states of the BGA chip is reduced, and as a result, the number of times the heat generated by the BGA chip increases significantly and the number of times the heat generated by the BGA chip decreases significantly is reduced, which helps to reduce the degree of temperature fluctuation of the BGA chip.

[0059] In a possible implementation, the control module is configured to control the range of change in power consumption of the target heat source device in operation if it determines that a crack has occurred in a second solder ball included in at least one detection path.

[0060] A target heat source device is a device whose generated heat can affect the temperature of the BGA chip.

[0061] According to the technical solutions provided in this disclosure, when the range of change in power consumption of the target heat source device is narrow, the range of change in heat emitted by the target heat source device in the operating state is also narrow. As a result, the temperature of the BGA chip does not change significantly due to the target heat source device, which helps to reduce the degree of temperature fluctuation of the BGA chip.

[0062] In a possible implementation, the control module is configured to reduce the frequency with which the target heat source device switches between operating and non-operating states if it is determined that a crack has occurred in the second solder ball included in the at least one detection path.

[0063] According to the technical solutions provided in this disclosure, the frequency of switching between operating and non-operating states of the target heat source device is reduced, and as a result, the number of times the heat generated by the target heat source device increases significantly and the number of times the heat generated by the target heat source device decreases significantly is reduced, which helps to reduce the degree of temperature fluctuation of the BGA chip.

[0064] In a possible implementation, the control module is configured to activate a constant temperature protection circuit if it determines that a crack has occurred in the second solder ball included in the at least one detection path.

[0065] In a possible implementation, the control module is configured to adjust the heat dissipation efficiency of the heat dissipation system if it determines that a crack has occurred in the second solder ball included in the at least one detection path.

[0066] In possible implementations, the control module and the detection module are integrated into the same component.

[0067] According to a second aspect, the disclosure provides a chip system. The chip system includes a BGA chip and a PCB. The BGA chip has a plurality of function pins and at least one detection pin, and the PCB has a plurality of function solder pads and at least one detection solder pad. The function pins are soldered to the function solder pads by using first solder balls, and the detection pins are soldered to the detection solder pads by using second solder balls. The designed lifespan of the second solder balls is shorter than the designed lifespan of the first solder balls. At least one detection path is formed between the BGA chip and the PCB. The detection path includes at least two unit circuits connected in series, each unit circuit including sequentially connected detection pins, second solder balls, and detection solder pads, and both ends of the detection path are detection pins. The BGA chip includes at least one signal transmit end and at least one signal receive end, the signal transmit end and the signal receive end being electrically connected to the two ends of the detection path, respectively. The BGA chip is configured to transmit a detection signal via a signal transmitting end and to determine the status of at least one detection path based on the detection signal received by the signal receiving end.

[0068] According to the technical solution provided in this disclosure, a detection path is formed between the BGA chip and the PCB of the chip system, and the detection path includes a second solder ball. The signal transmitting end of the BGA chip can transmit a detection signal to the signal receiving end of the BGA chip via the detection path, and the BGA chip can determine the status of the second solder ball included in the detection path based on the detection signal received by the signal receiving end; in other words, the BGA chip can monitor the status of the second solder ball. The designed lifespan of the second solder ball is shorter than that of the first solder ball. Therefore, under normal circumstances, the second solder ball may crack before the first solder ball. Therefore, if a crack in the second solder ball is detected, the reliability of the chip system can be improved by taking timely measures to delay or avoid cracking of the first solder ball.

[0069] In possible implementations, the signal transmitting and receiving ends are located on the die of the BGA chip.

[0070] According to a third aspect, the present disclosure provides a chip system. The chip system includes a BGA chip, a PCB, a signal source module, and a detection module. The BGA chip has a plurality of function pins and at least one detection pin, and the PCB has a plurality of function solder pads and at least one detection solder pad. The function pins are soldered to the function solder pads by using first solder balls, and the detection pins are soldered to the detection solder pads by using second solder balls. The designed lifespan of the second solder balls is shorter than the designed lifespan of the first solder balls. At least one detection path is formed between the BGA chip and the PCB, where the detection path includes at least two unit circuits connected in series, each unit circuit including sequentially connected detection pins, second solder balls, and detection solder pads, and both ends of the detection path are detection solder pads. The signal source module and the detection module are located on the PCB, and the signal source module and the detection module are electrically connected to the two ends of the detection path, respectively. The signal source module is configured to transmit a detection signal to a detection module via at least one detection path, and the detection module is configured to determine the status of at least one detection path based on the received detection signal.

[0071] According to the technical solution provided in this disclosure, a detection path is formed between the BGA chip and the PCB of the chip system, and the detection path includes a second solder ball. A signal source module may transmit a detection signal to a detection module via the detection path, and the detection module may determine the status of the second solder ball included in the detection path based on the received detection signal; in other words, the detection module may monitor the status of the second solder ball. The designed lifespan of the second solder ball is shorter than that of the first solder ball. Therefore, under normal circumstances, the second solder ball may crack before the first solder ball. Thus, if a crack in the second solder ball is detected, the reliability of the chip system can be improved by taking timely measures to delay or prevent cracking of the first solder ball.

[0072] According to a fourth aspect, the present disclosure provides a chip system. The chip system includes a BGA chip, a PCB, and a detection module. The BGA chip has a plurality of function pins and at least one detection pin, and the PCB has a plurality of function solder pads and at least one detection solder pad. The function pins are soldered to the function solder pads by using first solder balls, and the detection pins are soldered to the detection solder pads by using second solder balls. The designed lifespan of the second solder balls is shorter than the designed lifespan of the first solder balls. At least one detection path is formed between the BGA chip and the PCB, where the detection path includes one or more unit circuits connected in series, and the unit circuits include sequentially connected detection pins, second solder balls, and detection solder pads. One end of the detection path is the detection pins, and the other end is the detection solder pad. The die of the BGA chip is electrically connected to the detection pins at one end of the detection path, and the detection module is located on the PCB and is electrically connected to the detection solder pad at the other end of the detection path. The die is configured to transmit a detection signal to a detection module via at least one detection path, and the detection module is configured to determine the status of at least one detection path based on the received detection signal.

[0073] According to the technical solution provided in this disclosure, a detection path is formed between the BGA chip and the PCB of the chip system, and the detection path includes a second solder ball. The die may transmit a detection signal to a detection module via the detection path, and the detection module may determine the status of the second solder ball included in the detection path based on the received detection signal; in other words, the detection module may monitor the status of the second solder ball. The designed lifespan of the second solder ball is shorter than that of the first solder ball. Therefore, under normal circumstances, the second solder ball may crack before the first solder ball. Thus, if a crack in the second solder ball is detected, the reliability of the chip system can be improved by taking timely measures to delay or prevent cracking of the first solder ball.

[0074] According to a fifth aspect, the present disclosure provides a chip system. The chip system includes a BGA chip, a PCB, and a signal source module. The BGA chip has a plurality of function pins and at least one detection pin, and the PCB has a plurality of function solder pads and at least one detection solder pad. The function pins are soldered to the function solder pads by using first solder balls, and the detection pins are soldered to the detection solder pads by using second solder balls. The designed lifespan of the second solder balls is shorter than the designed lifespan of the first solder balls. At least one detection path is formed between the BGA chip and the PCB, where the detection path includes one or more unit circuits connected in series, and the unit circuits include sequentially connected detection pins, second solder balls, and detection solder pads. One end of the detection path is a detection solder pad, and the other end is a detection pin. The signal source module is located on the PCB and is electrically connected to the detection solder pad at one end of the detection path, and the die of the BGA chip is electrically connected to the detection pin at the other end of the detection path. The signal source module is configured to transmit a detection signal to the die via at least one detection path, and the die is configured to determine the status of at least one detection path based on the received detection signal.

[0075] According to the technical solution provided in this disclosure, a detection path is formed between the BGA chip and the PCB of the chip system, and the detection path includes a second solder ball. A signal source module may transmit a detection signal to a die via the detection path, and the die may determine the status of the second solder ball included in the detection path based on the received detection signal; in other words, the die may monitor the status of the second solder ball. The designed lifespan of the second solder ball is shorter than that of the first solder ball. Therefore, under normal circumstances, the second solder ball may crack before the first solder ball. Thus, if a crack in the second solder ball is detected, the reliability of the chip system can be improved by taking timely measures to delay or prevent cracking of the first solder ball.

[0076] According to the sixth aspect, the disclosure provides an electronic device having a chip system in any one of the first to fifth aspects.

[0077] In possible implementations, the electronic device may be a communication device, a terminal device, a storage device, or a server. [Brief explanation of the drawing]

[0078] [Figure 1] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0079] [Figure 2] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0080] [Figure 3] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0081] [Figure 4] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0082] [Figure 5] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0083] [Figure 6] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0084] [Figure 7] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0085] [Figure 8] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0086] [Figure 9]This is a diagram of a chip system according to an embodiment of the present disclosure.

[0087] [Figure 10] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0088] [Figure 11] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0089] [Figure 12] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0090] [Figure 13] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0091] [Figure 14] This is a diagram showing the arrangement of pins on a BGA chip according to an embodiment of the present disclosure.

[0092] [Figure 15] This is a diagram of the architecture of a chip system according to an embodiment of this disclosure.

[0093] [Figure 16] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0094] [Figure 17] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0095] [Figure 18] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0096] [Figure 19] This is a diagram of a chip system according to an embodiment of the present disclosure.

[0097] Reference sign 1. BGA chip; 10. Detection path; 100. Unit circuit; 11. Board; 111. Function pins; 112. Detection pins; 113. Other pins; 12. Die; 2. PCB; 21. Function solder pads; 22. Detection solder pads; 3. Signal source module; 4. Detection module; 5. Control module; 6. First solder ball; 7. Second solder ball; a. Signal transmitting end; and b. Signal receiving end. [Modes for carrying out the invention]

[0098] Ball grid array (BGA) chips are soldered to a printed circuit board (PCB) using solder balls, and signals can be transmitted between the BGA chip and the PCB using solder balls.

[0099] In processes using BGA chips, solder balls are subjected to various types of stress. For example, since the substrate and PCB of a BGA chip have different coefficients of thermal expansion (CTEs), when the temperature of the BGA chip and PCB changes, the degree of expansion of the substrate and PCB will differ, and this exposes the solder balls to shear forces. Under the action of various types of stress, solder balls can be damaged or even cracked, which affects the quality of the transmitted signal and can even cause signal interruptions.

[0100] To evaluate the conditions of solder balls, chip systems formed by BGA chips and PCBs are typically modeled and simulated in the relevant technology to assess the stress on the solder balls.

[0101] However, the modeling parameters and operating conditions involved in modeling and simulation are complex, making it difficult to guarantee the accuracy of the simulation results. In addition, based on the modeling and simulation methods, the cracking process of solder balls cannot be effectively predicted or tracked, and corresponding protective measures cannot be taken.

[0102] In terms of the aforementioned technical problems, embodiments of the present disclosure provide a chip system. As shown in Figures 1 to 13, the chip system includes a BGA chip 1, a PCB 2, a signal source module 3, and a detection module 4. The BGA chip 1 has a plurality of function pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of function solder pads 21 and at least one detection solder pad 22. The function pins 111 are soldered to the function solder pads 21 by using first solder balls 6, and the detection pins 112 are soldered to the detection solder pads 22 by using second solder balls 7. The designed lifespan of the second solder balls 7 is shorter than the designed lifespan of the first solder balls 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes one or more unit circuits 100 connected in series, the unit circuits 100 include sequentially connected detection pins 112, second solder balls 7, and detection solder pads 22. The signal source module 3 is configured to transmit a detection signal to the detection module 4 via at least one detection path 10, and the detection module 4 is configured to determine the status of at least one detection path 10 based on the received detection signal.

[0103] The function pins 111 of the BGA chip 1 may be pins used to implement the basic functions of the BGA chip 1, such as power pins, ground pins, and function pins. The power pins are pins that provide connections for the power supply of the BGA chip 1, the ground pins are pins that provide connections for the grounding of the BGA chip 1, and the function pins are pins that provide connections for signals required by the BGA chip 1. If a crack occurs in the first solder ball 6 between the function pins 111 and the function solder pad 21, the function or performance of the BGA chip 1 may be affected.

[0104] The detection pin 112 of the BGA chip 1 may be a pin specifically used to monitor the status of the second solder ball 7. The detection pin 112 may have no other function other than status monitoring. If a crack occurs in the second solder ball 7 between the detection pin 112 and the detection solder pad 22, the BGA chip 1 may still operate normally. For example, the detection pin 112 may be an original unused pin on the BGA chip 1, which is also referred to as an NC (Not Connected) pin.

[0105] The functional solder pad 21 of PCB2 refers to the solder pad soldered to the functional pin 111, and the detection solder pad 21 of PCB2 refers to the solder pad soldered to the detection pin 112.

[0106] The first solder ball 6 is located between the function pin 111 and the function solder pad 21, and the second solder ball 7 is located between the detection pin 112 and the detection solder pad 22. The designed lifespan of the second solder ball 7 is shorter than that of the first solder ball 6. Therefore, under normal circumstances, the second solder ball 7 may crack before the first solder ball 6. Thus, the status of the first solder ball 6 can be predicted by monitoring the status of the second solder ball 7.

[0107] The signal source module 3 is configured to generate a detection signal and to transmit the detection signal to the detection module 4 via the detection path 10. The detection module 4 is configured to receive the detection signal via the detection path and to determine the status of the detection path 10 based on the received detection signal, in other words, to determine the status of the second solder ball 7 included in the detection path 10. In some examples, the detection module 4 is configured to determine that the second solder ball 7 included in the detection path 10 is cracked if no detection signal is received via the detection path 10.

[0108] According to the technical solution provided in the embodiments of this disclosure, a detection path 10 is formed between a BGA chip 1 and a PCB 2 of a chip system, and the detection path 10 includes a second solder ball 7. A signal source module 3 may transmit a detection signal to a detection module 4 via the detection path 10, and the detection module 4 may determine the status of the second solder ball 7 included in the detection path 10 based on the received detection signal, in other words, the detection module 4 may monitor the status of the second solder ball 7.

[0109] The designed lifespan of the second solder ball 7 is shorter than that of the first solder ball 6. Therefore, cracks may occur in the second solder ball 7 before those in the first solder ball 6. Consequently, if a crack is detected in the second solder ball 7, it can be predicted that a crack may occur in the first solder ball 6 following it. Therefore, taking timely measures to delay or prevent cracking of the first solder ball 6 can improve the reliability of the BGA chip 1.

[0110] The type of detection signal is not limited to the embodiments of this disclosure. The detection signal may be any signal that satisfies the interface arrangement between the signal source module 3 and the detection module 4. For example, the detection signal may be a fixed-level signal or a flipped signal. A flipped signal is a signal whose level changes over time and may also be called a time-varying signal.

[0111] The locations of the signal source module 3 and the detection module 4 are not limited to the embodiments of this disclosure. Both the signal source module 3 and the detection module 4 may be integrated into the BGA chip 1, or located on the PCB 2, or one may be integrated into the BGA chip 1 and the other on the PCB 2.

[0112] The following sections will explain in more detail, using examples, the specific locations of the signal source module 3 and the detection module 4, as well as the corresponding cases for the detection path 10.

[0113] (1) In some examples, as shown in Figures 1 to 4, the BGA chip 1 includes a substrate 11 and a die 12. The substrate 11 has function pins 111 and detection pins 112, and a signal source module 3 and a detection module 4 are integrated into the die 12, which includes at least one signal transmitting end a and at least one signal receiving end b. The detection path 10 includes at least two unit circuits 100 connected in series, both ends of the detection path 10 being detection pins 112, and the signal transmitting end a and the signal receiving end b are electrically connected to the two ends of the detection path 10, respectively.

[0114] According to the technical solution provided in the embodiments of this disclosure, both the signal source module 3 and the detection module 4 are integrated into the die 12, so that the die 12 can transmit and receive detection signals, no additional hardware circuitry is required on the PCB 2, and only a few detection solder pads 21 on the PCB 2 need to be electrically connected together to implement the series connection of the unit circuits 100. This makes the chip system provided in the embodiments of this disclosure easier to implement.

[0115] In some examples, as shown in Figure 1, there is one detection path 10, and the die 12 includes one signal transmitting end a and one signal receiving end b. Signal transmitting end a is electrically connected to a detection pin 112 at one end of the detection path 10, and signal receiving end b is electrically connected to a detection pin 112 at the other end of the detection path 10.

[0116] In some examples, as shown in Figure 2, there are multiple (e.g., two) detection paths 10, and the die 12 includes multiple (e.g., two) signal transmitting ends a and multiple (e.g., two) signal receiving ends b. The multiple signal transmitting ends a are electrically connected to the detection pins 112 at the ends of the multiple detection paths 10, and the multiple signal receiving ends b are electrically connected to the detection pins 112 at the other ends of the multiple detection paths 10.

[0117] To reduce the number of signal transmitting terminals a and conserve resources on the BGA chip 1, in some other examples, as shown in Figure 3, there are multiple (e.g., two) detection paths 10, and the die 12 includes one signal transmitting terminal a and multiple (e.g., two) signal receiving terminals b, where one signal transmitting terminal a is electrically connected to all detection pins 112 at one end of the multiple detection paths 10, and each of the multiple signal receiving terminals b is electrically connected to the detection pins 112 at the other end of the multiple detection paths 10.

[0118] In addition to the aforementioned technical solution in which the same number of signal transmitting terminals as those of the detection path 10 are arranged and one signal transmitting terminal a is arranged, in some other examples, if there are multiple detection paths 10, multiple signal transmitting terminals a may be arranged, but the number of multiple signal transmitting terminals a is less than the number of detection paths 10, and it should be noted that at least one signal transmitting terminal a is electrically connected to the detection pin 112 at at least two ends of the detection path 10. Thus, the number of signal transmitting terminals a is reduced, and the problem of excessive complexity in the cable routing on the board 11, which occurs because an excess of detection pins 112 are connected to the same signal transmitting terminal a, is avoided.

[0119] The following examples illustrate possible implementations of the signal transmitting end a and the signal receiving end b.

[0120] In some examples, as shown in Figures 1 to 4, the signal transmission terminal a is a bump on die 12.

[0121] In some examples, as shown in Figures 1 to 3, the bumps may be specially reserved on the die 12 and used to generate detection signals.

[0122] In some examples, as shown in Figure 4, the bump may alternatively be a bump electrically connected to the function pin 111 and capable of generating a detection signal. For example, if the bump is used to transmit a clock signal, the detection signal is a time-varying signal. In another example, if the bump is used for power supply, the detection signal is a fixed-level signal.

[0123] In some examples, the signal transmitting end a does not have to be a bump on the die 12. For example, the signal transmitting end a could be a power module on the die 12, which is electrically connected to the detection pin 112 at one end of the detection path 10. In this case, the detection signal is a fixed-level signal.

[0124] In some examples, as shown in Figures 1 to 4, the signal receiving terminal b is a bump on the die 12. In addition, since the die 12 (or detection module 4) needs to distinguish between detection signals from multiple detection paths 10, the number of signal receiving terminals b is the same as the number of detection paths 10, and there is a one-to-one correspondence between the signal receiving terminals b and the detection paths 10.

[0125] In addition, since it is necessary to ensure that both ends of the detection path 10 are detection pins 112, it can be understood that each detection path 10 must include an even number of unit circuits 100.

[0126] Please note that the chip systems shown in Figures 1 to 4 can be described alternatively as follows.

[0127] Embodiments of the present disclosure provide a chip system. As shown in Figures 1 to 4, the chip system includes a BGA chip 1 and a PCB 2. The BGA chip 1 has a plurality of function pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of function solder pads 21 and at least one detection solder pad 22. The function pins 111 are soldered to the function solder pads 21 by using first solder balls 6, and the detection pins 112 are soldered to the detection solder pads 22 by using second solder balls 7. The designed lifespan of the second solder balls 7 is shorter than the designed lifespan of the first solder balls 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes at least two unit circuits 100 connected in series, the unit circuits 100 include sequentially connected detection pins 112, second solder balls 7, and detection solder pads 22, and both ends of the detection path 10 are detection pins 112. The BGA chip 1 includes at least one signal transmitting end a and at least one signal receiving end b, each of which is electrically connected to two ends of the detection path 10. The BGA chip 1 is configured to transmit a detection signal via the signal transmitting end a and to determine the status of the detection path 10 based on the detection signal received by the signal receiving end b.

[0128] (2) In some examples, the signal source module 3 and the detection module 4 are located on the PCB 2, as shown in Figures 5 and 6. The detection path 10 includes at least two unit circuits 100 connected in series, and both ends of the detection path 10 are detection solder pads 22. The signal source module 3 and the detection module 4 are each electrically connected to the two ends of the detection path 10.

[0129] In some examples, as shown in Figure 5, there is one detection path 10, and the signal source module 3 is electrically connected to the detection solder pad 22 at one end of the detection path 10, and the detection module 4 is electrically connected to the detection solder pad 22 at the other end of the detection path 10.

[0130] In some other examples, as shown in Figure 6, there are multiple (e.g., two) detection paths 10, and the signal source module 3 is electrically connected to the detection solder pads 22 at the ends of the multiple detection paths 10, and the detection module 4 is electrically connected to the detection solder pads 22 at the other ends of the multiple detection paths 10.

[0131] In some examples, the signal source module 3 and the detection module 4 are one or two circuits integrated into the PCB 2, such as an integrated circuit (IC) chip or a discrete device. The signal source module 3 and the detection module 4 may be newly added hardware circuits specifically for monitoring the status of the detection path 10, or they may be existing hardware circuits on the PCB 2. This is not limited to the embodiments of this disclosure.

[0132] In addition, since it is necessary to ensure that both ends of the detection path 10 are detection solder pads 22, it can be understood that each detection path 10 must include an even number of unit circuits 100.

[0133] Please note that the chip systems shown in Figures 5 and 6 can be described alternatively as follows.

[0134] Embodiments of the present disclosure provide a chip system. As shown in Figures 5 and 6, the chip system includes a BGA chip 1, a PCB 2, a signal source module 3, and a detection module 4. The BGA chip 1 has a plurality of function pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of function solder pads 21 and at least one detection solder pad 22. The function pins 111 are soldered to the function solder pad 21 by using first solder balls 6, and the detection pins 112 are soldered to the detection solder pad 22 by using second solder balls 7. The designed lifespan of the second solder balls 7 is shorter than the designed lifespan of the first solder balls 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes at least two unit circuits 100 connected in series, each unit circuit 100 including sequentially connected detection pins 112, a second solder ball 7, and a detection solder pad 22, with both ends of the detection path 10 being the detection solder pad 22. A signal source module 3 and a detection module 4 are located on the PCB 2, and the signal source module 3 and the detection module 4 are electrically connected to the two ends of the detection path 10, respectively. The signal source module 3 is configured to transmit a detection signal to the detection module 4 via at least one detection path 10, and the detection module 4 is configured to determine the status of at least one detection path 10 based on the received detection signal.

[0135] (3) In some examples, as shown in Figures 7 to 10, the signal source module 3 is integrated into the die 12, and the detection module 4 is located on the PCB 2. One end of the detection path 10 is the detection pin 112, and the other end is the detection solder pad 22. The die 12 is electrically connected to the detection pin 112 at one end of the detection path 10, and the detection module 4 is electrically connected to the detection solder pad 22 at the other end of the detection path 10.

[0136] In some examples, as shown in Figure 7, there is one detection path 10, which includes one unit circuit 100, and the die 12 includes one signal transmitting terminal a. The signal transmitting terminal a is electrically connected to a detection pin 112 at one end of the detection path 10, and the detection module 4 is electrically connected to a detection solder pad 22 at the other end of the detection path 10.

[0137] In some examples, as shown in Figure 8, there is one detection path 10, which includes three unit circuits 100 connected in series, and the die 12 includes one signal transmitting terminal a. The signal transmitting terminal a is electrically connected to a detection pin 112 at one end of the detection path 10, and the detection module 4 is electrically connected to a detection solder pad 22 at the other end of the detection path 10.

[0138] In some examples, as shown in Figure 9, there are multiple (e.g., two) detection paths 10, and the die 12 includes one signal transmitting terminal a. The signal transmitting terminal a is electrically connected to a detection pin 112 at one end of the multiple detection paths 10, and the detection module 4 is electrically connected to a detection solder pad 22 at the other end of the multiple detection paths 10.

[0139] The number of signal transmission terminals a is reduced based on the above arrangement (disposition), saving resources on the BGA chip 1.

[0140] In some other examples, there are multiple detection paths 10, and the die 12 includes multiple signal transmitting terminals a. The multiple signal transmitting terminals a are electrically connected to detection pins 112 at the ends of the multiple detection paths 10, and the detection module 4 is electrically connected to detection solder pads 22 at the other ends of the multiple detection paths 10.

[0141] In addition to the aforementioned technical solution in which the same number of signal transmitting terminals as those of the detection path 10 are arranged and one signal transmitting terminal a is arranged, in some other examples, if there are multiple detection paths 10, multiple signal transmitting terminals a may be arranged, but the number of multiple signal transmitting terminals a is less than the number of detection paths 10, and it should be noted that at least one signal transmitting terminal a is electrically connected to the detection pin 112 at at least two ends of the detection path 10. Thus, the number of signal transmitting terminals a is reduced, and the problem of excessive complexity in the cable routing on the board 11, which occurs because an excess of detection pins 112 are connected to the same signal transmitting terminal a, is avoided.

[0142] The following examples illustrate possible implementations of signal transmitting end a.

[0143] In some examples, the signal transmission end a is a bump on die 12.

[0144] In some examples, as shown in Figures 7 to 9, the bumps may be specially reserved on the die 12 and used to generate detection signals.

[0145] In some other examples, as shown in Figure 10, the bump may alternatively be a bump electrically connected to the function pin 111 and capable of generating a detection signal. For example, if the bump is used to transmit a clock signal, the detection signal is a time-varying signal. In another example, if the bump is used for power supply, the detection signal is a fixed-level signal.

[0146] In some examples, the signal transmitting end a does not have to be a bump on the die 12. For example, the signal transmitting end a could be a power module on the die 12, which is electrically connected to the detection pin 112 at one end of the detection path 10. In this case, the detection signal is a fixed-level signal.

[0147] In some examples, the detection module 4 is a circuit integrated into the PCB 2, such as an IC chip or a discrete device. The detection module 4 may be a newly added hardware circuit specifically for monitoring the status of the detection path 10, or it may be an existing hardware circuit on the PCB 2. This is not limited to the embodiments of this disclosure.

[0148] In addition, since it is necessary to ensure that one end of the detection path 10 is the detection pin 112 and the other end is the detection solder pad 22, it can be understood that each detection path 10 must include an odd number of unit circuits 100.

[0149] Please note that the chip systems shown in Figures 7 to 10 can be described alternatively as follows.

[0150] Embodiments of the present disclosure provide a chip system. As shown in Figures 7 to 10, the chip system includes a BGA chip 1, a PCB 2, and a detection module 4. The BGA chip 1 has a plurality of function pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of function solder pads 21 and at least one detection solder pad 22. The function pins 111 are soldered to the function solder pads 21 by using first solder balls 6, and the detection pins 112 are soldered to the detection solder pads 22 by using second solder balls 7. The designed lifespan of the second solder balls 7 is shorter than the designed lifespan of the first solder balls 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes one or more unit circuits 100 connected in series, the unit circuits 100 include sequentially connected detection pins 112, second solder balls 7, and detection solder pads 22. One end of the detection path 10 is a detection pin 112, and the other end is a detection solder pad 22. The die 12 of the BGA chip 1 is electrically connected to the detection pin 112 at one end of the detection path 10, and the detection module 4 is located on the PCB 2 and is electrically connected to the detection solder pad 22 at the other end of the detection path 10. The die 12 is configured to transmit a detection signal to the detection module 4 via at least one detection path 10, and the detection module 4 is configured to determine the status of at least one detection path 10 based on the received detection signal.

[0151] (4) In some examples, as shown in Figures 11 to 13, the signal source module 3 is located on the PCB 2 and the detection module 4 is integrated into the die 12. One end of the detection path 10 is a detection solder pad 22 and the other end is a detection pin 112. The signal source module 3 is electrically connected to the detection solder pad 22 at one end of the detection path 10, and the die 12 is electrically connected to the detection pin 112 at the other end of the detection path 10.

[0152] In some examples, as shown in Figure 11, there is one detection path 10 which includes one unit circuit 100, and the die 12 includes one signal receiving terminal b. The signal source module 3 is electrically connected to a detection solder pad 22 at one end of the detection path 10, and the signal receiving terminal b is electrically connected to a detection pin 112 at the other end of the detection path 10.

[0153] In some examples, as shown in Figure 12, there is one detection path 10 which includes three unit circuits 100 connected in series, and the die 12 includes one signal receiving terminal b. The signal source module 3 is electrically connected to a detection solder pad 22 at one end of the detection path 10, and the signal receiving terminal b is electrically connected to a detection pin 112 at the other end of the detection path 10.

[0154] In some examples, as shown in Figure 13, there are multiple (e.g., two) detection paths 10, and the die 12 includes multiple (e.g., two) signal receiving terminals b. The signal source module 3 is electrically connected to detection solder pads 22 at the ends of the multiple detection paths 10, and each of the multiple signal receiving terminals b is electrically connected to detection pins 112 at the other ends of the multiple detection paths 10.

[0155] In some examples, the signal receiving terminal b is a bump on the die 12. In addition, since the die 12 (or detection module 4) needs to distinguish between detection signals from multiple detection paths 10, the number of signal receiving terminals b is the same as the number of detection paths 10.

[0156] In some examples, the signal source module 3 is a circuit integrated into the PCB 2, such as an IC chip or a discrete device. The signal source module 3 may be a newly added hardware circuit specifically for monitoring the status of the detection path 10, or it may be an existing hardware circuit on the PCB 2. This is not limited to the embodiments of this disclosure.

[0157] In addition, since it is necessary to ensure that one end of the detection path 10 is the detection solder pad 22 and the other end is the detection pin 112, it can be understood that each detection path 10 must include an odd number of unit circuits 100.

[0158] Please note that the chip systems shown in Figures 11 to 13 can be described alternatively as follows.

[0159] Embodiments of the present disclosure provide a chip system. As shown in Figures 11 to 13, the chip system includes a BGA chip 1, a PCB 2, and a signal source module 3. The BGA chip 1 has a plurality of function pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of function solder pads 21 and at least one detection solder pad 22. The function pins 111 are soldered to the function solder pads 21 by using first solder balls 6, and the detection pins 112 are soldered to the detection solder pads 22 by using second solder balls 7. The designed lifespan of the second solder balls 7 is shorter than the designed lifespan of the first solder balls 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes one or more unit circuits 100 connected in series, the unit circuits 100 include sequentially connected detection pins 112, second solder balls 7, and detection solder pads 22. One end of the detection path 10 is a detection solder pad 22, and the other end is a detection pin 112. The signal source module 3 is located on PCB 2 and is electrically connected to the detection solder pad 22 at one end of the detection path 10, and the die 12 of the BGA chip 1 is electrically connected to the detection pin 112 at the other end of the detection path 10. The signal source module 3 is configured to transmit a detection signal to the detection module 4 via at least one detection path 10, and the die 12 is configured to determine the status of at least one detection path 10 based on the received detection signal.

[0160] In the chip system provided in embodiments of this disclosure, the designed lifespan of the second solder ball 7 is shorter than that of the first solder ball 6. Therefore, the status of the first solder ball 6 can be predicted by monitoring the status of the second solder ball 7. Implementations in which the designed lifespan of the second solder ball 7 is shorter than that of the first solder ball 6 are not limited to embodiments of this disclosure. Several possible implementations are provided below.

[0161] In some cases, the second solder ball 7 is closer to the edge of the BGA chip 1 than the first solder ball 6.

[0162] Stress damage to the BGA chip 1 is most likely to occur at the edges of the BGA chip 1. Therefore, the second solder ball 7 is positioned closer to the edge and the first solder ball 6 is positioned closer to the center, and as a result, the designed lifespan of the second solder ball 7 may be shorter than that of the first solder ball 6.

[0163] In some cases, the second solder ball 7 is closer to the corner of the BGA chip 1 than the first solder ball 6.

[0164] Furthermore, in the case of edges, stress damage to the BGA chip 1 is more likely to occur at the corners of the BGA chip 1. Therefore, if the second solder ball 7 is located at a corner of the BGA chip 1 and the first solder ball 6 is located at a non-corner position, the designed lifespan of the second solder ball 7 may be shorter than that of the first solder ball 6.

[0165] Figure 14 shows the arrangement of pins on the BGA chip 1. It can be seen from the figure that the detection pin 112 is closer to the corner of the BGA chip 1 than the function pin 111, the first solder ball 6 is soldered to the function pin 111, and the second solder ball 7 is soldered to the detection pin 112. Therefore, the second solder ball 7 is closer to the corner of the BGA chip 1 than the first solder ball 6.

[0166] In addition, it can be seen from Figure 14 that, in addition to the function pin 111 and the detection pin 112, the BGA chip 1 has yet another pin 113. The other pin 113 may be understood as being of the same type as the detection pin 112, but not used to monitor the status of the second solder ball 7. The other pin 113 may be closer to the corner of the BGA chip 1 than the detection pin 112, or closer to the center of the BGA chip 1 than the detection pin 112. This is not limited to the embodiments of this disclosure.

[0167] Naturally, the second solder ball 7 provided in the embodiments of this disclosure does not necessarily have to be closer to the edge or corner of the BGA chip 1 than the first solder ball 6, and the second solder ball 7 may be closer to the center of the BGA chip 1 than the first solder ball 6. For example, if the pins at the edge or corner of the BGA chip 1 are not suitable for use as detection pins 112 due to excessive connections or other reasons, some pins located in the center may be used as detection pins 112, in other words, the second solder ball 7 may alternatively be located closer to the center of the BGA chip 1. Naturally, in this case, other methods will need to be used to set the designed lifespan of the second solder ball 7 to be shorter than the designed lifespan of the first solder ball 6.

[0168] In some cases, the outer diameter of the second solder ball 7 is smaller than that of the first solder ball 6. Therefore, the first solder ball 6 is less likely to crack than the second solder ball 7, and as a result, the designed lifespan of the second solder ball 7 is shorter than that of the first solder ball 6.

[0169] In some cases, the strength of the material of the second solder ball 7 is less than the strength of the material of the first solder ball 6.

[0170] The strength of the material of the second solder ball 7 is less than that of the material of the first solder ball 6. Therefore, the second solder ball 7 is more likely to crack than the first solder ball 6, and as a result, the designed lifespan of the second solder ball 7 is shorter than that of the first solder ball 6.

[0171] For example, the material of the second solder ball 7 is solder tin, and the material of the first solder ball 6 is solder tin and an additive (e.g., an alloy).

[0172] In another example, the materials of both the second solder ball 7 and the first solder ball 6 are solder tin and additives (e.g., alloys), but the ratio of additives in the second solder ball 7 is different from the ratio of additives in the first solder ball 6.

[0173] It should be noted that some of the aforementioned implementations may be used separately or in any combination; this is not limited to the embodiments of this disclosure.

[0174] The chip system provided in the embodiments of this disclosure may include a plurality of detection paths 10, and the relationship between the designed lifetimes of the second solder balls 7 included in different detection paths 10 is not limited to the embodiments of this disclosure.

[0175] In some cases, the designed lifespan of the second solder ball 7 included in all detection paths 10 is the same.

[0176] In some other examples, N levels of detection paths 10 are formed between the BGA chip 1 and the PCB 2, and the designed lifespan of a second solder ball 7 included in the (M-1) level detection path 10 is shorter than the designed lifespan of a second solder ball 7 included in the M level detection path 10.

[0177] N is an integer greater than 1, and M is any integer greater than 1 and not greater than N, for example, both N and M are 2. As shown in Figure 14, two levels of detection paths 10 are formed between the BGA chip 1 and the PCB 2, and the designed lifespan of the second solder ball 7 included in the first level detection path is shorter than the designed lifespan of the second solder ball 7 included in the second level detection path.

[0178] According to the technical solution provided in the embodiments of this disclosure, N levels of detection paths 10 are set, and the designed lifetimes of the second solder balls 7 included in the N levels of detection paths 10 are different. As a result, the cracking process of the solder balls can be tracked based on the status of the second solder balls 7 included in the N levels of detection paths 10, and the status of the first solder balls 6 can be predicted more accurately. As a result, the reliability of the chip system can be further improved by taking appropriate measures to delay or even avoid cracking of the first solder balls 6 in a more timely and accurate manner.

[0179] For example, after a crack is detected in the second solder ball 7 included in the first level detection path, appropriate measures may be taken to delay the cracking of the first solder ball 6. In addition, the effectiveness of these measures can be recognized by monitoring the status of another level detection path 10, and the status of the first solder ball 6 can be predicted by continuing to monitor the status of the other level detection path 10. The measures taken may reduce the degree of temperature fluctuation of the BGA chip 1.

[0180] If it is detected that no cracks have formed in the second solder ball 7, which is included in another level of detection path 10, this indicates that the previously taken measures were effective.

[0181] After it is detected that a crack is continuously forming in the second solder ball 7 included in another level of detection path 10, more effective measures (e.g., continuously reducing the degree of temperature fluctuation of the BGA chip 1) can be taken to delay the cracking of the first solder ball 6 until no more cracks form in the second solder ball 7 included in the next level of detection path 10, or until cracks form in the second solder ball 7 included in the final level of detection path.

[0182] If a crack also occurs in the second solder ball 7, which is included in the final level detection path, the status of the first solder ball 6 becomes unpredictable, and a final, effective measure may be taken to delay the cracking of the first solder ball 6. Alternatively, for example, the chip system may be directly repaired or replaced.

[0183] In addition, if, after appropriate measures have been taken, a crack is detected in the second solder ball 7 included in the next level detection path 10 or in the second solder ball 7 included in several of the next level detection paths 10 within the target duration, the final measures may be taken even if no crack has yet occurred in the second solder ball 7 included in the final level detection path.

[0184] A crack in the second solder ball 7, or in the second solder ball 7, that is included in the next level detection path 10 within the target duration, or in any of the next level detection paths 10, indicates that the status of the first solder ball 6 is rapidly deteriorating and that immediate final action is needed to prevent cracking of the first solder ball 6. The specific value of the target duration is not limited to the embodiments of this disclosure, and such specific value of the target duration may be set by a staff member based on actual requirements.

[0185] It should be noted that appropriate measures taken to delay the cracking of the first solder ball 6, such as reducing the degree of temperature fluctuation of the BGA chip 1, may cause certain damage to the chip system or the electronic device containing the chip system. For example, to reduce the degree of temperature fluctuation of the BGA chip 1, it may be necessary to reduce the number of times the BGA chip 1 sleeps and increase the power consumption of the BGA chip 1.

[0186] According to the technical solution provided in the embodiments of this disclosure, N levels of detection paths 10 are set up, and after a crack occurs in a second solder ball included in a higher level detection path 10, the strength of the action taken is higher (resulting in greater damage to the chip system, or electronic device including the chip system), and as a result the strength of the action taken is adapted to the status of the first solder ball 6, and the strength of the action taken can be adjusted accordingly based on the status of the first solder ball 6. This avoids cases where a stronger action is taken when the first solder ball 6 is in good condition, and cases where a weaker action is still taken when the first solder ball 6 is in poor condition.

[0187] If the measures taken are to reduce the degree of temperature fluctuation of BGA chip 1, then stronger measures indicate a smaller degree of temperature fluctuation of BGA chip 1.

[0188] Implementations in which the designed lifespan of the second solder ball 7 included in the (M-1) level detection path 10 is shorter than the designed lifespan of the second solder ball 7 included in the M level detection path 10 are not limited to the embodiments of this disclosure. Several possible implementations are provided below.

[0189] In some cases, the second solder ball 7 included in the (M-1) level detection path 10 is closer to the edge of the BGA chip 1 than the second solder ball 7 included in the M level detection path 10.

[0190] Stress damage to the BGA chip 1 is most likely to occur at the edges of the BGA chip 1. Therefore, the designed lifespan of the second solder ball 7 included in the (M-1) level detection path 10 may be shorter than the designed lifespan of the second solder ball 7 included in the M level detection path 10, based on the aforementioned arrangement.

[0191] In some cases, the second solder ball 7 included in the (M-1) level detection path 10 is closer to the corner of the BGA chip 1 than the second solder ball 7 included in the M level detection path 10.

[0192] Furthermore, in the case of edges, stress damage to the BGA chip 1 is more likely to occur at the corners of the BGA chip 1. Therefore, the designed lifespan of the second solder ball 7 included in the (M-1) level detection path 10 may be shorter than that of the second solder ball 7 included in the M level detection path 10, based on the aforementioned arrangement.

[0193] For example, Figure 14 shows the arrangement of pins on the BGA chip 1. From the figure, it can be seen that the detection pin 112 included in the first level detection path is closer to the corner of the BGA chip 1 than the detection pin 112 included in the second level detection path. Therefore, the second solder ball 7 included in the first level detection path is also closer to the corner of the BGA chip 1 than the second solder ball 7 included in the second level detection path.

[0194] Naturally, the second solder ball 7 included in the (M-1) level detection path 10 does not necessarily need to be closer to the edge or corner of the BGA chip 1 than the second solder ball 7 included in the M level detection path 10. Instead, the designed lifespan of the second solder ball 7 included in the (M-1) level detection path 10 can be set shorter than the designed lifespan of the second solder ball 7 included in the M level detection path 10 by using other methods.

[0195] In some cases, the outer diameter of the second solder ball 7 included in the (M-1) level detection path 10 is smaller than the outer diameter of the second solder ball 7 included in the M level detection path 10. The second solder ball 7 included in the M level detection path 10 is less likely to crack than the second solder ball 7 included in the (M-1) level detection path 10, and as a result, the designed lifespan of the second solder ball 7 included in the (M-1) level detection path 10 is shorter than the designed lifespan of the second solder ball 7 included in the M level detection path 10.

[0196] In some cases, the strength of the material of the second solder ball 7 included in the (M-1) level detection path 10 is less than the strength of the material of the second solder ball 7 included in the M level detection path 10.

[0197] The strength of the material of the second solder ball 7 included in the (M-1) level detection path 10 is less than the strength of the material of the second solder ball 7 included in the M level detection path 10. Therefore, the second solder ball 7 included in the (M-1) level detection path 10 is more likely to develop cracks than the second solder ball 7 included in the M level detection path 10.

[0198] For example, the material of the second solder ball 7 included in the (M-1) level detection path 10 is solder tin, and the material of the second solder ball 7 included in the M level detection path 10 is solder tin and an additive (e.g., an alloy).

[0199] In another example, the materials of the second solder ball 7 are both solder tin and additives (e.g., alloy), but the ratio of additives in the second solder ball 7 included in the (M-1) level detection path 10 is different from the ratio of additives in the second solder ball 7 included in the M level detection path 10.

[0200] It should be noted that some of the aforementioned implementations may be used separately or in any combination; this is not limited to the embodiments of this disclosure.

[0201] In addition, for the same level of detection path 10, the designed lifespan of the second solder ball 7 belonging to the same level of detection path 10 may be the same.

[0202] For example, as shown in Figure 14, the distance from multiple detection pins 112 included in the first level detection path to the edge of the corner of the BGA chip 1 is basically the same, and the distance from multiple detection pins 112 included in the second level detection path to the edge of the corner of the BGA chip 1 is basically the same.

[0203] The measures taken after a crack is detected in the second solder ball 7 are not limited to the embodiments of this disclosure. In some examples, after determining that a crack has occurred in the second solder ball 7, the detection module 4 instructs staff members to take appropriate action by controlling the transmission of an instruction message.

[0204] In some other examples, the chip system provided in the embodiments of this disclosure may further include a control module 5. The control module 5 is configured to perform corresponding operations based on status information determined by the detection module 4.

[0205] Figure 15 shows the architecture of the chip system. The signal source module 3 transmits detection signals to the detection module 4 via each detection path 10 in the detection network. The detection module 4 determines the status of the detection path 10 based on the received detection signals and transmits the determined status of the detection path 10 to the control module 5. The controller 5 performs the corresponding operation based on the status of the detection path 10.

[0206] The location of the control module 5 is not limited to the embodiments of this disclosure. In some examples, as shown in Figures 16 to 19, the control module 5 and the detection module 4 are integrated into the same component. Alternatively, the control module 5 and the detection module 4 may be understood as the same module.

[0207] For example, as shown in Figure 16, the signal source module 3, the detection module 4, and the control module 5 are all integrated into the die 12.

[0208] In another example, as shown in Figure 17, the signal source module 3, all detection modules 4, and control module 5 are located on the PCB board 2.

[0209] In another example, as shown in Figure 18, the signal source module 3 is integrated into the die 12, and both the detection module 4 and the control module 5 are located on the PCB board 2.

[0210] In another example, as shown in Figure 19, the signal source module 3 is located on the PCB board 2, and the detection module 4 and control module 5 are integrated into the die 12.

[0211] In some other examples, the control module 5 and the detection module 4 do not have to be located in the same component. For example, the BGA chip 1 may be located on a service board or switchboard within a communication device, and the control module 5 may be located on the main control board. Thus, the control module 5 can receive status information of the detection path 10, which is fed back by the detection module 4 on all service boards and switchboards, and perform the corresponding operation.

[0212] The following describes in more detail, using an example, the actions performed by the control module 5 based on the status of the detection path 10.

[0213] In some examples, the control module 5 is configured to adjust the temperature of the BGA chip 1 based on the status of the detection path 10 determined by the detection module 4.

[0214] In actual applications, it has been observed that when the temperature changes significantly and frequently, the stress on the first solder ball 6 and the second solder ball 7 increases and changes frequently, significantly increasing the likelihood of cracking. Therefore, the stress on the first solder ball 6 and the second solder ball 7 can be controlled by adjusting the temperature of the BGA chip 1.

[0215] If the temperature of BGA chip 1 is adjusted, the power consumption of BGA chip 1 may be adjusted to adjust the heat generated by BGA chip 1, or the power consumption of the target heat source device may be adjusted. A target heat source device is a device whose generated heat can affect the temperature of BGA chip 1.

[0216] If it is determined that a crack has formed in the second solder ball 7, which is included in at least one detection path 10, the control module 5 is configured to reduce the degree of temperature fluctuation in the BGA chip 1 in order to delay the cracking of the first solder ball 6. In this way, the stress on the first solder ball 6 can be reduced.

[0217] The degree of temperature variability of BGA chip 1 can be indicated by the temperature dispersion of BGA chip 1. The degree of temperature variability of BGA chip 1 may also be understood as the temperature difference range of BGA chip 1 and the number of temperature changes. The number of temperature changes is the number of times the temperature change is greater than the target temperature threshold. Reducing the degree of temperature variability of BGA chip 1 can be understood as narrowing the temperature difference range of BGA chip 1 and / or reducing the number of temperature changes of BGA chip 1.

[0218] In addition, if there are N levels of detection paths 10, and if cracks occur in the second solder balls 7 included in different levels of detection paths 10, the degree of temperature fluctuation of the BGA chip 1 reduced by the control module 5 may also differ.

[0219] In some examples, the control module 5 is configured to: reduce the degree of temperature fluctuation of the BGA chip 1 by a first action when it is determined that a crack has occurred in the second solder ball 7 included in the (M-1) level detection path 10; and reduce the degree of temperature fluctuation of the BGA chip 1 by a second action when it is determined that a crack has occurred in the second solder ball 7 included in the M level detection path 10.

[0220] The temperature fluctuation of BGA chip 1 obtained by the second operation is smaller than the temperature fluctuation of BGA chip 1 obtained by the first operation. It can be understood that, normally, cracks occur in the second solder ball 7 included in the (M-1) level detection path 10 before cracks occur in the second solder ball 7 included in the M level detection path 10.

[0221] In other words, if a crack occurs in the second solder ball 7 in the higher level detection path 10, the degree of temperature fluctuation of the BGA chip 1 will be smaller after operation has been performed.

[0222] In some examples, the control module 5 is configured to report a status message indicating that the BGA chip 1 is abnormal if it determines that a crack has occurred in the second solder ball 7 included in the Nth level detection path 10. In this way, staff members can be reminded to replace or repair the chip system.

[0223] In some cases, if a crack occurs in the second solder ball 7 included in the Nth level detection path 10, the control module 5 no longer needs to further reduce the temperature fluctuation of the BGA chip 1. In some other cases, if the BGA chip 1 reports status information indicating an abnormality, the control module 5 may instead continue to reduce the temperature fluctuation of the BGA chip 1.

[0224] In some other examples, the control module 5 is configured to report status information indicating that the BGA chip 1 is abnormal if it determines that a crack has formed in the second solder ball 7, which has been included in at least two levels of detection paths 10 within the target duration.

[0225] If a crack develops in the second solder ball 7, which is included in at least two levels of detection path 10, within the target duration, it indicates that the status of the first solder ball 6 has rapidly deteriorated. In this case, the status information may be reported in a timely manner to remind staff members to repair or replace the chip system. The specific value of the target duration is not limited to the embodiments of this disclosure, and such specific value of the target duration may be set by staff members based on actual requirements.

[0226] In some other examples, the control module 5 is configured to report status information indicating that the BGA chip 1 is abnormal if it determines that a crack has formed in a second solder ball 7 included in any level of detection path 10. In addition, the status information may further retain the level of detection path 10 to which the cracked second solder ball 7 belongs. In this way, staff members can better understand the status of the BGA chip 1.

[0227] The implementation of the control module 5 in reducing the degree of temperature fluctuation of the BGA chip 1 is not limited to the embodiments of this disclosure. Several possible implementations are provided below.

[0228] In some examples, the control module 5 is configured to control the range of change in the power consumption of the BGA chip 1 while it is operating, so as to narrow the range of change.

[0229] When the range of change in the power consumption of BGA chip 1 narrows, the range of change in heat generated by BGA chip 1 while it is operating also narrows, which helps to reduce the degree of temperature fluctuation of BGA chip 1.

[0230] In some examples, the control module 5 is configured to reduce the frequency with which the BGA chip 1 switches between operating and non-operating states.

[0231] Non-operating states may include sleep mode or power-off state. In a non-operating state, the BGA chip 1 consumes very little or no power. Therefore, in a non-operating state, the BGA chip 1 generates very little or no heat, which is significantly different from the heat generated in an operating state.

[0232] According to the technical solutions provided in the embodiments of this disclosure, the frequency at which the BGA chip 1 switches between operating and non-operating states is reduced, and as a result, the number of times the heat generated by the BGA chip 1 increases significantly and the number of times the heat generated by the BGA chip 1 decreases significantly is reduced, which helps to reduce the degree of temperature fluctuation of the BGA chip 1.

[0233] In some examples, the control module 5 is configured to control the range of change in the power consumption of the target heat source device while it is operating, so as to narrow the range of change.

[0234] When the range of change in power consumption of the target heat source device is narrow, the range of change in heat emitted by the target heat source device during operation is also narrow. As a result, the temperature of the BGA chip 1 does not change significantly due to the target heat source device, which helps to reduce the degree of temperature fluctuation of the BGA chip 1.

[0235] In some examples, the control module 5 is configured to reduce the frequency with which the target heat source device switches between operating and non-operating states.

[0236] The frequency with which the target heat source device switches between operating and non-operating states is reduced, which in turn reduces the number of times the heat generated by the target heat source device increases significantly and the number of times the heat generated by the target heat source device decreases significantly, thereby helping to reduce the degree of temperature fluctuation of the BGA chip 1.

[0237] In some examples, the control module 5 is configured to enable a constant temperature protection circuit. In this way, the temperature of the BGA chip 1 is kept as constant as possible.

[0238] In some examples, the control module 5 is configured to adjust the heat dissipation efficiency of the heat dissipation system, for example, by adjusting the rotation speed of the heat dissipation fan, thereby keeping the temperature of the BGA chip 1 as constant as possible.

[0239] It should be noted that some of the aforementioned implementations may be used separately or in any combination. This is not limited to the embodiments of this disclosure. The temperature of the BGA chip 1 may be understood as the temperature of the environment in which the BGA chip 1 is located.

[0240] Embodiments of this disclosure further provide electronic devices, each having a chip system in any one of the aforementioned implementations.

[0241] The type of electronic device is not limited to the embodiments of this disclosure. The electronic device may be any electronic device having a BGA chip. For example, the electronic device may be a communication device, a terminal device, a storage device, or a server.

[0242] The foregoing description is merely an optional embodiment of the Disclosure, but is not intended to limit the Disclosure. Any modifications, equivalent substitutions, or improvements made without departing from the principles of the Disclosure should be included within the scope of the Disclosure. 。 [Other possible items] [Claim 1] A chip system comprising a ball grid array BGA chip (1), a printed circuit board (PCB) (2), a signal source module (3), and a detection module (4), The BGA chip (1) has a plurality of function pins (111) and at least one detection pin (112), the PCB (2) has a plurality of function solder pads (21) and at least one detection solder pad (22), the function pins (111) are soldered to the function solder pads (21) by using first solder balls (6), the detection pins (112) are soldered to the detection solder pads (22) by using second solder balls (7), the designed lifespan of the second solder balls (7) is shorter than the designed lifespan of the first solder balls (6); At least one detection path (10) is formed between the BGA chip (1) and the PCB (2), and the detection path (10) has one or more unit circuits (100) connected in series, the unit circuits (100) include the detection pins (112), the second solder ball (7), and the detection solder pad (22) connected in sequence; The signal source module (3) is configured to transmit a detection signal to the detection module (4) via the at least one detection path (10); The detection module (4) is configured to determine the status of the at least one detection path (10) based on the received detection signal, in a chip system. [Claim 2] The BGA chip (1) comprises a substrate (11) and a die (12), the substrate (11) including the function pins (111) and the detection pins (112), the signal source module (3) and the detection module (4) being integrated into the die (12), the die (12) including at least one signal transmitting end (a) and at least one signal receiving end (b); The chip system according to claim 1, wherein the detection path (10) has at least two unit circuits (100) connected in series, both ends of the detection path (10) are detection pins (112), and the signal transmitting end (a) and the signal receiving end (b) are electrically connected to the two ends of the detection path (10), respectively. [Claim 3] The signal source module (3) and the detection module (4) are located on the PCB (2); The chip system according to claim 1, wherein the detection path (10) has at least two unit circuits (100) connected in series, both ends of the detection path (10) are detection solder pads (22), and the signal source module (3) and the detection module (4) are each electrically connected to the two ends of the detection path (10). [Claim 4] The BGA chip (1) comprises a substrate (11) and a die (12), the substrate (11) includes the function pins (111) and the detection pins (112), the signal source module (3) is integrated into the die (12), and the detection module (4) is located on the PCB (2); The chip system according to claim 1, wherein one end of the detection path (10) is the detection pin (112) and the other end is the detection solder pad (22); the die (12) is electrically connected to the detection pin (112) at one end of the detection path (10); and the detection module (4) is electrically connected to the detection solder pad (22) at the other end of the detection path (10). [Claim 5] The signal source module (3) is located on the PCB (2), the BGA chip (1) has a substrate (11) and a die (12), the substrate (11) includes the function pins (111) and the detection pins (112), and the detection module (4) is integrated into the die (12); The chip system according to claim 1, wherein one end of the detection path (10) is the detection solder pad (22) and the other end is the detection pin (112); the signal source module (3) is electrically connected to the detection solder pad (22) at one end of the detection path (10); and the die (12) is electrically connected to the detection pin (112) at the other end of the detection path (10). [Claim 6] The chip system according to any one of claims 1 to 5, wherein the second solder ball (7) is closer to the edge of the BGA chip (1) than the first solder ball (6). [Claim 7] The chip system according to any one of claims 1 to 6, wherein the second solder ball (7) is closer to the corner of the BGA chip (1) than the first solder ball (6). [Claim 8] The chip system according to any one of claims 1 to 7, wherein the outer diameter of the second solder ball (7) is smaller than the outer diameter of the first solder ball (6). [Claim 9] The chip system according to any one of claims 1 to 8, wherein the strength of the material of the second solder ball (7) is less than the strength of the material of the first solder ball (6). [Claim 10] A chip system according to any one of claims 1 to 9, wherein N levels of detection paths (10) are formed between the BGA chip (1) and the PCB (2), and the designed life (7) of a second solder ball included in the (M-1) level detection path (10) is shorter than the designed life (7) of a second solder ball included in the M level detection path (10), where N is an integer greater than 1 and M is any integer greater than 1 and not less than N. [Claim 11] The chip system according to claim 10, wherein the second solder ball (7) included in the detection path (10) of the (M-1) level is closer to the edge of the BGA chip (1) than the second solder ball (7) included in the detection path (10) of the M level. [Claim 12] The chip system according to claim 10 or 11, wherein the second solder ball (7) included in the detection path (10) of the (M-1) level is closer to the corner of the BGA chip (1) than the second solder ball (7) included in the detection path (10) of the M level. [Claim 13] The chip system according to any one of claims 10 to 12, wherein the outer diameter of the second solder ball (7) included in the detection path (10) of the (M-1) level is smaller than the outer diameter of the second solder ball (7) included in the detection path (10) of the M level. [Claim 14] The chip system according to any one of claims 10 to 13, wherein the strength of the material of the second solder ball (7) included in the detection path (10) of the (M-1) level is less than the strength of the material of the second solder ball (7) included in the detection path (10) of the M level. [Claim 15] The chip system according to any one of claims 10 to 14, wherein the designed lifespan of the second solder ball (7) belonging to the same level detection path (10) is the same. [Claim 16] The aforementioned detection module (4) is: If no detection signal is received via the target detection path, it is determined that a crack has formed in the second solder ball (7) included in the target detection path, where the target detection path is any detection path (10). A chip system according to any one of claims 1 to 15, configured to perform the following: [Claim 17] The chip system according to any one of claims 1 to 16, further comprising a control module (5), the control module (5) configured to adjust the temperature of the BGA chip (1) based on the status of the detection path (10) determined by the detection module (4). [Claim 18] The chip system according to claim 17, wherein the control module (5) is configured to reduce the degree of temperature fluctuation of the BGA chip (1) when it is determined that a crack has occurred in the second solder ball (7) included in the at least one detection path (10). [Claim 19] The N levels of detection paths (10) are formed between the BGA chip (1) and the PCB (2), and the designed lifespan of the second solder ball (7) included in the (M-1) level detection path (10) is shorter than the designed lifespan of the second solder ball (7) included in the M level detection path (10), where N is an integer greater than 1 and M is any integer greater than 1 and not greater than N; The control module (5) is: If it is determined that a crack has formed in the second solder ball (7) included in the detection path (10) of the (M-1) level, the first operation reduces the degree of temperature fluctuation of the BGA chip (1); and If it is determined that a crack has formed in the second solder ball (7) included in the detection path (10) of the M level, the second operation reduces the degree of temperature fluctuation of the BGA chip (1), where the degree of temperature fluctuation of the BGA chip (1) obtained by the second operation is smaller than the degree of temperature fluctuation of the BGA chip (1) obtained by the first operation. The chip system according to claim 18, configured to perform the following: [Claim 20] The chip system according to claim 19, wherein the control module (5) is configured to report a status message indicating that the BGA chip (1) is abnormal if it is determined that a crack has occurred in the second solder ball (7) included in the Nth level detection path (10). [Claim 21] If the control module (5) determines that a crack has occurred in the second solder ball (7) included in the at least one detection path (10), it performs the following actions, namely: Control the power consumption range of the BGA chip (1) in operation so that it is narrowed; To reduce the frequency at which the BGA chip (1) switches between the operating state and the non-operating state; Control the power consumption range of the target heat source device in operation to be narrowed, where the target heat source device is a device whose emitted heat can affect the BGA chip (1); To reduce the frequency with which the target heat source device switches between the operating state and the non-operating state; and Enable the constant temperature protection circuit. A chip system according to any one of claims 17 to 20, configured to perform one or more of the following: [Claim 22] An electronic device, wherein the electronic device has a chip system as described in any one of claims 1 to 21.

Claims

1. A chip system comprising a ball grid array (BGA) chip, a printed circuit board (PCB), a signal source module, and a detection module, The BGA chip has a plurality of function pins and at least one detection pin, the PCB has a plurality of function solder pads and at least one detection solder pad, the function pins are soldered to the function solder pads using first solder balls, and the detection pins are soldered to the detection solder pads using second solder balls; At least one detection path is formed between the BGA chip and the PCB, the detection path having one or a plurality of unit circuits connected in series, the unit circuits including the detection pins, the second solder ball, and the detection solder pad connected in sequence; The signal source module is configured to transmit a detection signal to the detection module via the at least one detection path; The detection module is configured to determine that a crack occurs in a second solder ball included in one of the at least one detection paths if no detection signal is received through that one detection path, where the one detection path is any of the at least one detection paths. The chip system further comprises a control module, the control module configured to adjust the temperature of the BGA chip based on the status of the detection path determined by the detection module.

2. The BGA chip comprises a substrate and a die, the substrate including the function pins and the detection pins, the signal source module and the detection module being integrated into the die, and the die including at least one signal transmit terminal and at least one signal receive terminal; The chip system according to claim 1, wherein the detection path has at least two unit circuits connected in series, both of the two ends of the detection path are detection pins, and the signal transmission end and the signal reception end are electrically connected to the two ends of the detection path, respectively.

3. The signal source module and the detection module are located on the PCB; The chip system according to claim 1, wherein the detection path has at least two unit circuits connected in series, both ends of the detection path are detection solder pads, and the signal source module and the detection module are each electrically connected to the two ends of the detection path.

4. The BGA chip comprises a substrate and a die, the substrate including the function pins and the detection pins, the signal source module integrated into the die, and the detection module located on the PCB; The chip system according to claim 1, wherein one end of the detection path is the detection pin and the other end is the detection solder pad; the die is electrically connected to the detection pin at one end of the detection path; and the detection module is electrically connected to the detection solder pad at the other end of the detection path.

5. The signal source module is located on the PCB, the BGA chip has a substrate and a die, the substrate includes the function pins and the detection pins, and the detection module is integrated into the die; The chip system according to claim 1, wherein one end of the detection path is the detection solder pad and the other end is the detection pin; the signal source module is electrically connected to the detection solder pad at one end of the detection path; and the die is electrically connected to the detection pin at the other end of the detection path.

6. The second solder ball is closer to the edge of the BGA chip than the first solder ball; The second solder ball is closer to the corner of the BGA chip than the first solder ball; or The outer diameter of the second solder ball is smaller than the outer diameter of the first solder ball. The chip system according to any one of claims 1 to 5.

7. The chip system according to any one of claims 1 to 5, wherein N levels of designed lifetimes of detection paths are formed between the BGA chip and the PCB, and the designed lifetime of a second solder ball included in the (M-1) level detection path is shorter than the designed lifetime of a second solder ball included in the M level detection path, where N is an integer greater than 1 and M is any integer greater than 1 and not greater than N.

8. The second solder ball included in the detection path at the (M-1) level is closer to the edge of the BGA chip than the second solder ball included in the detection path at the M level; The second solder ball included in the detection path at the (M-1) level is closer to the corner of the BGA chip than the second solder ball included in the detection path at the M level; or The outer diameter of the second solder ball included in the detection path at the (M-1) level is smaller than the outer diameter of the second solder ball included in the detection path at the M level. The chip system according to claim 7.

9. The chip system according to any one of claims 1 to 8, wherein the control module is configured to reduce the degree of temperature fluctuation of the BGA chip when it is determined that a crack has occurred in the second solder ball included in the at least one detection path.

10. N levels of detection paths are formed between the BGA chip and the PCB, and the designed lifespan of the second solder ball included in the (M-1) level detection path is shorter than the designed lifespan of the second solder ball included in the M level detection path, where N is an integer greater than 1 and M is any integer greater than 1 and not greater than N; The aforementioned control module is: If it is determined that a crack has occurred in the second solder ball included in the detection path of the (M-1) level, the first operation reduces the degree of temperature fluctuation of the BGA chip; and If it is determined that a crack has occurred in the second solder ball included in the detection path of the M level, the second operation reduces the degree of temperature fluctuation of the BGA chip, wherein the degree of temperature fluctuation of the BGA chip obtained by the second operation is smaller than the degree of temperature fluctuation of the BGA chip obtained by the first operation. The chip system according to claim 9, configured to perform the following:

11. If the control module determines that a crack has occurred in the second solder ball included in the at least one detection path, it performs the following actions, namely: Control the power consumption range of the BGA chip while it is in operation to be narrowed; To reduce the frequency at which the BGA chip switches between the operating state and the non-operating state; Controlling the power consumption range of a target heat source device in operation to be narrowed, where the target heat source device is a device whose emitted heat can affect the BGA chip; To reduce the frequency with which the target heat source device switches between the operating state and the non-operating state; and Enable the constant temperature protection circuit. A chip system according to any one of claims 1 to 10, configured to perform one or more of the following:

12. The chip system according to any one of claims 1 to 5, wherein the designed lifespan of the second solder ball is shorter than the designed lifespan of the first solder ball.

13. An electronic device, wherein the electronic device is The chip system comprises a ball grid array (BGA) chip, a printed circuit board (PCB), a signal source module, and a detection module. The BGA chip has a plurality of function pins and at least one detection pin, the PCB has a plurality of function solder pads and at least one detection solder pad, the function pins are soldered to the function solder pads using first solder balls, and the detection pins are soldered to the detection solder pads using second solder balls; At least one detection path is formed between the BGA chip and the PCB, the detection path having one or a plurality of unit circuits connected in series, the unit circuits including the detection pins, the second solder ball, and the detection solder pad connected in sequence; The signal source module is configured to transmit a detection signal to the detection module via the at least one detection path; The detection module is configured to determine that a crack occurs in a second solder ball included in one of the at least one detection paths if no detection signal is received through that one detection path, where the one detection path is any of the at least one detection paths. The chip system further comprises a control module, the control module configured to adjust the temperature of the BGA chip based on the status of the detection path determined by the detection module, an electronic device.

14. The electronic device according to claim 13, wherein the designed lifespan of the second solder ball is shorter than the designed lifespan of the first solder ball.

15. The BGA chip comprises a substrate and a die, the substrate including the function pins and the detection pins, the signal source module integrated into the die, and the detection module located on the PCB; The electronic device according to claim 13, wherein one end of the detection path is the detection pin and the other end is the detection solder pad; the die is electrically connected to the detection pin at one end of the detection path; and the detection module is electrically connected to the detection solder pad at the other end of the detection path.

16. The signal source module is located on the PCB, the BGA chip has a substrate and a die, the substrate includes the function pins and the detection pins, and the detection module is integrated into the die; The electronic device according to claim 13, wherein one end of the detection path is the detection solder pad and the other end is the detection pin; the signal source module is electrically connected to the detection solder pad at one end of the detection path; and the die is electrically connected to the detection pin at the other end of the detection path.

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