Semiconductor module

Abstract

To provide a semiconductor module in which a power route and a signal route can be surely electrically insulated.SOLUTION: A semiconductor module 10 houses a semiconductor element 30 and a heat dissipation member 40 by a resin member 9. At least a part of the heat discharge member 40 is exposed to an external part from the resin member 9. A signal pad 35 of the semiconductor element 30 and a signal terminal 61 are connected by a flexible substrate as a wiring member 80. The wiring member 80 is housed in a resin member 20, and is a member softer than the signal terminal 61. The wiring member 80 includes: electric insulation resin layers 81 and 83; and a metal layer 82 supported by resin layers 81 and 83.SELECTED DRAWING: Figure 3

Description

Technical Field

[0006] , , ,

[0001] The disclosure in this specification relates to a semiconductor module.

Background Art

[0002] Patent Document 1 discloses a semiconductor module that houses a semiconductor element including a switching element. This semiconductor module includes a wiring sheet. The wiring sheet is formed of a flexible printed circuit board. The wiring sheet of Patent Document 1 includes a land portion that solder-connects an electrode and a terminal as a power path of the switching element. Further, the wiring sheet of Patent Document 1 includes a control wiring connected to the control electrode of the switching element. The description of the prior art document is incorporated by reference as an explanation of the technical elements in this specification.

Prior Art Documents

Patent Documents

[0003] <�

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The wiring sheet of Patent Document 1 has difficulty in electrical insulation between the power path and the control wiring. Therefore, it has been difficult to provide a semiconductor module that satisfies a practical level from the viewpoints of electrical insulation and physical size. From the above viewpoints or other viewpoints not mentioned, further improvements are required for the semiconductor module.

[0005] One object to be disclosed is to provide a semiconductor module in which reliable electrical insulation between a power path and a signal path is provided.

Means for Solving the Problems

[0006] The semiconductor module disclosed herein is A semiconductor element (30) having a signal pad (35) for a signal path and a power pad (33) for a power path for power greater than the power of the signal pad on its first surface, and another power pad (34) on a second surface opposite the first surface, A heat dissipation member including a first heat dissipation member (41) and a second heat dissipation member (42) thermally bonded to a semiconductor element (30), A resin member (20) that houses a semiconductor element so as to expose a part of the heat dissipation member, A metal signal terminal (61) is positioned so as to be exposed from the resin component, A wiring member (80) is housed in a resin component and is more flexible than a signal terminal, comprising an electrically insulating resin layer (81, 83) and a metal layer (82) supported by the resin layer, the metal layer having a first joint (80a) connected to a signal pad and a second joint (80b) connected to a signal terminal, A first joining member (71) joins the power pad (33) and the first heat dissipation member on the first surface, A second joining member (72) joins the other power pads (34) on the second surface to the second heat dissipation member, A third joining member (73) joins the signal pad (35) on the first surface and the metal layer of the wiring member at the first joint (80a), The first heat dissipation member (41), the semiconductor element (30), the wiring member (80), and the second heat dissipation member (42) are arranged in a stacked manner with respect to the thickness direction. The first heat dissipation member, the semiconductor element, and the wiring member overlap at the first junction. The thickness of the wiring member in the thickness direction is less than or equal to the thickness of the first joining member in the thickness direction. the law of nature, The wiring component is insulated from the metal layer that serves as the signal line and includes an additional metal layer (E90) to adjust the rigidity of the wiring component. The additional metal layer (E90) is positioned to overlap with the metal layer and is grounded to the reference potential of the semiconductor device, functioning as an electromagnetic shielding layer for the metal layer. ru. The semiconductor module disclosed herein is A semiconductor element (30) having a signal pad (35) for a signal path and a power pad (33) for a power path for power greater than the power of the signal pad on its first surface, and another power pad (34) on a second surface opposite the first surface, A heat dissipation member including a first heat dissipation member (41) and a second heat dissipation member (42) thermally bonded to a semiconductor element (30), A resin member (20) that houses a semiconductor element so as to expose a part of the heat dissipation member, A metal signal terminal (61) is positioned so as to be exposed from the resin component, A wiring member (80) is housed in a resin component and is more flexible than a signal terminal, comprising an electrically insulating resin layer (81, 83) and a metal layer (82) supported by the resin layer, the metal layer having a first joint (80a) connected to a signal pad and a second joint (80b) connected to a signal terminal, A first joining member (71) joins the power pad (33) and the first heat dissipation member on the first surface, A second joining member (72) joins the other power pads (34) on the second surface to the second heat dissipation member, A third joining member (73) joins the signal pad (35) on the first surface and the metal layer of the wiring member at the first joint (80a), The first heat dissipation member (41), the semiconductor element (30), the wiring member (80), and the second heat dissipation member (42) are arranged in a stacked manner with respect to the thickness direction. The first heat dissipation member, the semiconductor element, and the wiring member overlap at the first junction. The thickness of the first bonding member in the thickness direction on the power pad and the thickness of the third bonding member in the thickness direction on the signal pad are different from each other. Occasionally, The wiring component is insulated from the metal layer that serves as the signal line and includes an additional metal layer (E90) to adjust the rigidity of the wiring component. The additional metal layer (E90) is positioned to overlap with the metal layer and is grounded to the reference potential of the semiconductor device, functioning as an electromagnetic shielding layer for the metal layer. ru.

[0007] The disclosed semiconductor module houses semiconductor elements within a resin component. Furthermore, the semiconductor module includes metal signal terminals positioned to be exposed from the resin component. The signal pads of the semiconductor elements and the signal terminals are connected within the resin component by a wiring member. The wiring member is housed within the resin component. The wiring member is more flexible than the signal terminals. The wiring member includes an electrically insulating resin layer and a metal layer supported by the resin layer. The wiring member has a first junction where the metal layer is connected to the signal pads, and a second junction where the metal layer is connected to the signal terminals. The semiconductor module provides ease of connection by including signal terminals. Moreover, the wiring member can improve the ease of connection of the signal path even within the resin component. The wiring member, with its electrically insulating resin layer, contributes to the electrical insulation between the power path and the signal path. As a result, a semiconductor module is provided in which electrical insulation between the power path and the signal path is ensured. The various embodiments disclosed in this specification employ different technical means to achieve their respective purposes. The claims and the reference numerals in parentheses in this section are illustrative in their correspondence with parts of the embodiments described later and are not intended to limit the technical scope. The purposes, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings. [Brief explanation of the drawing]

[0008] [Figure 1] This is a block diagram of the electric system according to the first embodiment. [Figure 2] This is a perspective view of the semiconductor module. [Figure 3] This is a schematic cross-sectional view of a semiconductor module. [Figure 4] This is a partial cross-sectional view along the line IV-IV in Figure 3. [Figure 5] This is a perspective view of the semiconductor module according to the second embodiment. [Figure 6] This is a partial cross-sectional view of a semiconductor module according to the third embodiment. [Figure 7] Perspective view of the semiconductor module of the fourth embodiment. [Figure 8] Perspective view of the semiconductor module of the fifth embodiment. [Figure 9] Cross-sectional view of the semiconductor module of the sixth embodiment. [Figure 10] Cross-sectional view of the semiconductor module of the seventh embodiment. [Figure 11] Planar view of the wiring member of the eighth embodiment. [Figure 12] Planar view of the wiring member of the ninth embodiment. [Figure 13] Planar view of the wiring member of the tenth embodiment. [Figure 14] Cross-sectional view of the semiconductor module of the eleventh embodiment. [Figure 15] Cross-sectional view of the semiconductor module of the twelfth embodiment. [Figure 16] Exploded perspective view showing the semiconductor module. [Figure 17] Cross-sectional view of the semiconductor module of the thirteenth embodiment. [Figure 18] Enlarged cross-sectional view of the semiconductor module of the fourteenth embodiment. [Figure 19] Cross-sectional view of the semiconductor module of the fifteenth embodiment. [Figure 20] Cross-sectional view in the bonding process of the sixteenth embodiment. [Figure 21] Planar view showing the wiring member. [Figure 22] Cross-sectional view in the bonding process of the seventeenth embodiment. [Figure 23] Cross-sectional view in the bonding process of the eighteenth embodiment. [Figure 24] Cross-sectional view of the semiconductor module of the nineteenth embodiment. [Figure 25] Cross-sectional view of the semiconductor module of the twentieth embodiment. [Figure 26] Planar view of the semiconductor module of the twenty-first embodiment. [Figure 27] Planar view of the wiring member of the twenty-second embodiment. [Figure 28] This is a plan view of the wiring member of the 23rd embodiment. [Figure 29] This is a perspective view of the wiring member of the 24th embodiment. [Figure 30] This is a cross-sectional view of a semiconductor module according to the 25th embodiment. [Figure 31] This is a partial cross-sectional view of a semiconductor module. [Figure 32] This is a cross-sectional view of a semiconductor module according to the 26th embodiment. [Figure 33] This is a cross-sectional view of a semiconductor module. [Figure 34] This is a cross-sectional view of a semiconductor module according to the 27th embodiment. [Figure 35] This is a cross-sectional view of a semiconductor module according to the 28th embodiment. [Figure 36] This is a cross-sectional view of a semiconductor module according to the 29th embodiment. [Figure 37] This is a cross-sectional view of a semiconductor module according to the 30th embodiment. [Figure 38] This is a cross-sectional view of a semiconductor module according to the 31st embodiment. [Modes for carrying out the invention]

[0009] Multiple embodiments are described with reference to the drawings. In some embodiments, functionally and / or structurally corresponding parts and / or related parts may be given the same reference numeral or reference numerals differing by hundreds or more digits. For corresponding parts and / or related parts, refer to the description of other embodiments.

[0010] First Embodiment In Figure 1, the electric system 1 comprises a power supply unit 2, a rotating electric machine (RM) 3, and a power conversion circuit 4. The power supply unit 2 is a rechargeable DC power supply. The power supply unit 2 may be supplied by a DC power supply including a lithium-ion battery, a fuel cell system, or a solar cell system. Alternatively, the power supply unit 2 may be supplied by a power generation system that generates electricity from a power source such as an internal combustion engine. The rotating electric machine 3 is supplied by an electric motor or a motor-generator. The rotating electric machine 3 is a multiphase AC rotating electric machine. In the illustrated example, the rotating electric machine 3 is a three-phase rotating electric machine. The rotating electric machine 3 is used as a power source for a mobile body, or as a power source for machinery such as a generator or a water pump. Here, the mobile body includes vehicles, aircraft, ships, ride-on amusement equipment, and ride simulation equipment.

[0011] The power conversion circuit 4 is electrically connected to the power supply unit 2 and the rotating electric machine 3. The power conversion circuit 4 converts at least one element of power between the power supply unit 2 and the rotating electric machine 3. The elements of power include the direction of current, DC / AC, voltage, current, and phase. The power conversion circuit 4 is capable of operation in the motoring direction, supplying power from the power supply unit 2 to the rotating electric machine 3, and / or in the regenerative direction, charging power from the rotating electric machine 3 to the power supply unit 2. In this embodiment, the power conversion circuit 4 provides at least bidirectional voltage conversion and bidirectional DC / AC conversion.

[0012] The power conversion circuit 4 includes a converter circuit 5, a smoothing capacitor 6, an inverter circuit 7, and a control device 8. The power conversion circuit 4 may further include inductive elements and / or capacitive elements that provide a filter circuit. The converter circuit 5 is electrically located between the power supply unit 2 and the rotating electric machine 3. The converter circuit 5 provides bidirectional voltage conversion. The converter circuit 5 may boost or step down the voltage output by the power supply unit 2 and output it externally. The converter circuit 5 boosts or steps down an externally supplied voltage and supplies it to the power supply unit 2. The inverter circuit 7 is electrically located between the power supply unit 2 and the rotating electric machine 3. The inverter circuit 7 is electrically located between the converter circuit 5 and the rotating electric machine 3. The inverter circuit 7 provides bidirectional DC-AC conversion. When power is supplied from the power supply unit 2 to the rotating electric machine 3, the inverter circuit 7 provides AC-to-DC conversion. When power is supplied from the rotating electric machine to the power supply unit 23, the inverter circuit 7 provides AC-to-DC conversion. The smoothing capacitor 6 is located between the converter circuit 5 and the inverter circuit 7. The smoothing capacitor 6 provides part of a filter circuit that smooths the DC power.

[0013] The inverter circuit 7 comprises a plurality of switching elements 10 (SW elements 10), a plurality of power lines 50, and a plurality of signal lines 60. The plurality of SW elements 10 include, for example, SW elements 11 and 12 for the U phase, SW elements 13 and 14 for the V phase, and SW elements 15 and 16 for the W phase. The plurality of SW elements 10, together with the power lines 50, constitute a polyphase bridge circuit. The polyphase bridge circuit constitutes a plurality of switching arms 18, the number of which corresponds to the plurality of phases. For example, the U phase switching arm includes an SW element 11 providing an upper arm and an SW element 12 providing a lower arm. The V phase switching arm includes an SW element 13 providing an upper arm and an SW element 14 providing a lower arm. The W phase switching arm includes an SW element 15 providing an upper arm and an SW element 16 providing a lower arm.

[0014] The power lines 50 include a positive electrode line 52 and a negative electrode line 54. The positive electrode line 52 and the negative electrode line 54 are also called a pair of DC buses. Furthermore, the power lines 50 include a connecting line 56 and a phase line 58. The connecting line 56 connects the SW element that provides the upper arm and the SW element that provides the lower arm. The phase line 58 connects the connecting line 56 to one of the phase windings of the rotating electric machine 3. Thus, the inverter circuit 7 comprises a plurality of switching arms 18 arranged between the pair of DC buses. The signal lines 60 are electrically connected to each of the plurality of SW elements 10. The signal lines 60 may include drive signal lines for switching the SW elements 10 and a plurality of detection signal lines for current values, temperature, etc.

[0015] The converter circuit 5 may also include a switching arm. In this case, the converter circuit 5 is configured as a chopper circuit including an inductance element.

[0016] Multiple SW elements 10 have identical or similar configurations. One SW element 10 comprises a semiconductor element 30. The semiconductor element 30 is a semiconductor that is currently or will be available, such as one made of Si or SiC. The semiconductor element 30 includes a transistor element 31 and a diode element 32. The transistor element 31 is a currently or will be available element that can be switched in response to a control signal, such as an IGBT (Insulated-Gate Bipolar Transistor) or a MOS-FET (Metal-Oxide-Semiconductor Field-Effect Transistor). The diode element 32 is a reverse-connected diode. One SW element 10 may comprise one transistor element, or multiple transistor elements connected in series and / or parallel.

[0017] A single SW element 10 is also called a single semiconductor module 10 or a semiconductor package. The semiconductor module 10 is provided by encapsulating at least one SW element 10 in a resin member 20 described later. The semiconductor module 10 may also be provided by encapsulating a single switching arm 18 in a resin member 20. In this case, the semiconductor module 10 has a plurality of externally exposed signal terminals, a pair of externally exposed power terminals, and a single power terminal that provides a phase line 58. Furthermore, a single semiconductor module 10 may house a plurality of switching arms 18.

[0018] The control device 8 is composed of electrical circuits. The control device 8 controls the converter circuit 5 and the inverter circuit 7. The control device 8 is electrically connected to the converter circuit 5 and the inverter circuit 7. The control device 8 and the inverter circuit 7 are connected by a plurality of signal lines 60. The control device 8 generates and outputs control signals for controlling at least the inverter circuit 7.

[0019] The control device 8 in this specification may also be called an electronic control unit (ECU). The control device 8 or control system is provided by (a) an algorithm as a set of logics called if-then-else forms, or (b) an algorithm as a trained model tuned by machine learning, such as a neural network.

[0020] The control device 8 is provided by a control system including at least one computer. The control system may include multiple computers linked by a data communication device. The computer includes at least one hardware processor (hardware processor). The hardware processor can be provided by (i), (ii), or (iii) below.

[0021] (i) A hardware processor may be at least one processor core 8a (CPU) that executes a program stored in at least one memory 8b (MMR). In this case, the computer is provided by at least one memory and at least one processor core. A processor core is also called a CPU: Central Processing Unit, GPU: Graphics Processing Unit, RISC-CPU, etc. Memory is also called a storage medium. Memory is a non-transitional and tangible storage medium that non-temporarily stores "programs and / or data" that can be read by a processor. Storage mediums are provided by semiconductor memory, magnetic disks, or optical disks, etc. A program may be distributed on its own or as a storage medium on which a program is stored.

[0022] (ii) A hardware processor may be a hardware logic circuit. In this case, the computer is provided by a digital circuit that includes a large number of programmed logic units (gate circuits). Digital circuits are also called logic circuit arrays, e.g., ASIC: Application-Specific Integrated Circuit, FPGA: Field Programmable Gate Array, SoC: System on a Chip, PGA: Programmable Gate Array, CPLD: Complex Programmable Logic Device, etc. Digital circuits may have memory that stores programs and / or data. A computer may be provided by analog circuits. A computer may be provided by a combination of digital and analog circuits.

[0023] (iii) A hardware processor may be a combination of (i) and (ii) above. (i) and (ii) may be located on different chips or on a common chip. In these cases, the (ii) portion is also called an accelerator.

[0024] Control devices, signal sources, and controlled objects provide a variety of elements. At least some of these elements can be called blocks, modules, or sections. Furthermore, elements included in a control system are called functional means only when intentionally used.

[0025] The semiconductor module 10 is described in detail below with reference to several drawings. In the drawings and the description of the specification below, the dimensions of several components, such as thickness, width, height, and length, are schematically illustrated and explained to aid in understanding the relative arrangement and positional relationships of the components. The thickness of the first bonding member 71 in the X direction, as described later, can be set to approximately 0.2 millimeters, as a non-limiting example. The dimensions of each part should be understood as having a numerical range that is obvious to those skilled in the art in the current and future semiconductor technology field. In addition, some drawings show the three axial directions. The X direction is called the thickness direction, the Y direction is called the width direction, and the Z direction is called the height direction. These designations do not reflect the orientation of the semiconductor module 10 in use. These designations should be understood as being for convenience only.

[0026] In Figure 2, the semiconductor module 10 has a flat, plate-like outer shape. The outer shape is mainly defined by a resin member 20. The resin member 20 is a component obtained by molding a molten resin material into the required shape using a mold and then curing it again. An example of the resin member 20, though not limited to this, is epoxy resin. The semiconductor module 10 encapsulates the semiconductor element 30 with the resin member 20. The semiconductor element 30 is a semiconductor chip. The semiconductor element 30 is a plate-shaped component.

[0027] The semiconductor module 10 has at least one pair of power terminals 51 exposed to the outside of the resin member 20. The pair of power terminals 51 includes a positive terminal P and a negative terminal N. The semiconductor module 10 has a plurality of signal terminals 61 exposed to the outside of the resin member 20. In addition to the pair of power terminals 51, the semiconductor module 10 may also have power terminals as input / output terminals of a switching arm. The power terminals 51 and the signal terminals 61 can be clearly distinguished by the difference in the power flowing through them. The power terminals 51 carry the power of the rotating electric machine 3 as the controlled object. On the other hand, the signal terminals 61 carry the control signals of the semiconductor element 30 and the transistor element 31, or the power of the signal level of the control device 8.

[0028] The power terminals 51 and signal terminals 61 are partially embedded inside the resin member 20, with the remainder exposed to the outside of the resin member 20. The power terminals 51 are provided by a metal plate material such as copper or iron. The signal terminals 61 are provided by a metal plate material such as copper or iron. The power terminals 51 and signal terminals 61 are provided by a metal plate called a lead frame. The power terminals 51 and signal terminals 61 extend from the outer edge of the semiconductor module 10, or from one of the four sides of the outer edge when viewed as a plate. The power terminals 51 and signal terminals 61 have sufficient hardness to maintain their shape in a normal temperature environment.

[0029] Furthermore, the semiconductor module 10 has a heat dissipation member 40 exposed to the outside of the resin member 20. The heat dissipation member 40 is thermally coupled to the semiconductor element 30. The semiconductor module 10 is air-cooled or liquid-cooled. The semiconductor module 10 has at least one heat dissipation member 40 for dissipating heat from the semiconductor element 30. The semiconductor module 10 may be positioned with the exposed surface of the heat dissipation member 40 in contact with a cooling liquid pipe. In this case, the semiconductor module 10 dissipates heat indirectly from the heat dissipation member 40 to the cooling liquid pipe. The semiconductor module 10 may be positioned in a passage of cooling liquid. In this case, the semiconductor module 10 dissipates heat directly to the cooling liquid from the contact surface with the cooling liquid (including the heat dissipation member 40).

[0030] The heat dissipation member 40 has two heat dissipation members 41 and 42 exposed on both sides of the semiconductor module 10. Heat dissipation member 41 is sometimes called the first heat dissipation member. Heat dissipation member 42 is sometimes called the second heat dissipation member. In this case, the semiconductor module 10 is called a double-sided heat dissipation package. The semiconductor module 10 may be positioned between two coolant pipes, with the exposed surface of the first heat dissipation member 41 in contact with one coolant pipe and the exposed surface of the second heat dissipation member 42 in contact with the other coolant pipe. The semiconductor module 10 indirectly dissipates heat from one plate-shaped surface of the semiconductor element 30 to the coolant pipe via the first heat dissipation member 41. The semiconductor module 10 indirectly dissipates heat from the other plate-shaped surface of the semiconductor element 30 to the coolant pipe via the second heat dissipation member 42. The semiconductor module 10 may be positioned in a coolant passage. In this case, the semiconductor module 10 directly dissipates heat to the coolant from the contact surface with the coolant (including the two heat dissipation members 41 and 42).

[0031] The semiconductor module 10 includes a wiring member 80. The wiring member 80 provides at least one signal path. The wiring member 80 is also called a wiring sheet. The wiring member 80 is housed in a resin member 20. The wiring member 80 is plate-shaped. The wiring member 80 includes an electrically insulating resin layer and a metal layer supported by the resin layer. The wiring member 80 comprises one or more metal layers. The thickness of the wiring member 80 is less than or equal to the thickness of the first bonding member 71. The wiring member 80 extends substantially parallel to the YZ plane, intersecting the thickness direction X. The wiring member 80 is more flexible than the signal terminal 61. Due to its flexibility, the wiring member 80 may be arranged in a slightly curved shape.

[0032] The wiring member 80 electrically connects the signal pad and signal terminal 61 of the semiconductor element 30. The wiring member 80 is positioned and fixed by bonding at joints 80a and 80b and by contact with the resin member 20. In the illustrated example, the wiring member 80 is completely embedded in the resin member 20 and is not exposed to the outside. The wiring member 80 may be supplied by a flexible printed circuit board (FPC). The wiring member 80 may be supplied by a single-sided FPC, a double-sided FPC, or a multilayer FPC. The resin layer may be supplied by polyimide resin or liquid crystal polymer resin (LPC), among other things, as a non-limiting example. The metal layer may be supplied by copper foil or silver paste, among other things, as a non-limiting example.

[0033] The wiring member 80 allows for diverse arrangements of a single metal layer, such as proximity, dispersion, and bypass. Furthermore, the wiring member 80 allows for diverse variations in the area of ​​the metal layer. In addition, the resin layer provides stable electrical insulation between the electrical connections provided by the wiring member 80 and other adjacent components. In a typical example, a single wiring member 80 comprises multiple metal layers. These multiple metal layers provide multiple electrical connections between multiple signal pads and multiple signal terminals 61. In this case, the wiring member 80 allows for reduced manufacturing time to provide multiple electrical connections. Moreover, in this case, the wiring member 80 provides stable electrical insulation between the multiple electrical connections. The wiring member 80 allows for the arrangement of metal layers within the wiring member 80 via diverse paths. The wiring member 80 allows for diverse arrangements of multiple metal layers, such as crossing, connecting, and branching. Furthermore, the relative positions of the multiple metal layers are fixed by the resin layer. As a result, the fluctuation in mutual coupling inductance between signal paths is smaller compared to wire bonding. Consequently, the wiring member 80 contributes to the stable driving of the semiconductor element 30.

[0034] Figure 3 shows a cross-section of the semiconductor module 10 in the XZ plane. In the semiconductor module 10, the resin member 20 houses the semiconductor element 30. The semiconductor element 30 is joined to the heat dissipation member 40 on both sides by bonding members 70. The bonding member 70 has a flattened polygonal prism shape. The bonding member 70 has a columnar shape with a slightly trapezoidal cross-section. This joining provides both electrical connection and thermal coupling. The semiconductor element 30 has a power pad 33 on its first surface, which is the top surface in the figure. The power pad 33 provides a path for the main power controlled by the semiconductor element 30. The power pad 33 is joined to the first heat dissipation member 41 by a first bonding member 71. The semiconductor element 30 has a power pad 34 on its second surface, which is the bottom surface in the figure. The power pad 34 provides a path for the main power controlled by the semiconductor element 30. The power pad 34 is joined to the second heat dissipation member 42 by a second bonding member 72. The power pads 33 and 34 may be referred to by names indicating their application, such as power electrodes, collector electrodes, and emitter electrodes. The bonding member 70 can be provided by a material commonly known as solder.

[0035] The heat dissipation member 40 has a flat, plate-like shape. The heat dissipation member 40 provides high thermal conductivity (more precisely, heat transfer coefficient) between its two surfaces. The heat dissipation member 40 is also called a terminal member that provides a power path. The heat dissipation member 40 provides high electrical insulation between its two surfaces. The heat dissipation member 40 is also called an electrically insulating substrate. The heat dissipation member 40 comprises an electrically insulating resin plate placed between a pair of metal plates.

[0036] The first heat dissipation member 41 comprises an outer metal plate 43 that provides a heat dissipation surface and an inner metal plate 45 that provides a bonding surface. The inner metal plate 45 provides part of the power path. The inner metal plate 45 is electrically bonded to one terminal that provides the power line 50. At least a portion of the surface of the outer metal plate 43 is exposed to the outside from the resin member 20. One surface of the outer metal plate 43 provides a heat dissipation surface. The first heat dissipation member 41 comprises a resin plate 44 as an electrical insulating layer disposed between the outer metal plate 43 and the inner metal plate 45.

[0037] The second heat dissipation member 42 comprises an outer metal plate 46 that provides a heat dissipation surface and an inner metal plate 48 that provides a bonding surface. The inner metal plate 48 provides part of the power path. The inner metal plate 48 is electrically bonded to one terminal that provides the power line 50. At least a portion of the surface of the outer metal plate 46 is exposed to the outside from the resin member 20. One surface of the outer metal plate 46 provides a heat dissipation surface. The second heat dissipation member 42 comprises a resin plate 47 as an electrical insulating layer disposed between the outer metal plate 46 and the inner metal plate 48.

[0038] The semiconductor element 30 has signal pads 35 on its first surface. The signal pads 35 are positioned on the outer edge of the semiconductor element 30 so as to enable the formation of relatively large power pads 33 on the first surface. The signal pads 35 have a significantly smaller current-carrying area than the power pads 33 and 34. In a typical example, the semiconductor element 30 has multiple signal pads 35. The signal pads 35 may be referred to by names indicating their application, such as signal electrodes, sensor electrodes, or gate electrodes.

[0039] The wiring member 80 is positioned away from the heat dissipation member 40. The wiring member 80 may be positioned in contact with the surface of the semiconductor element 30. The signal pad 35 and the signal terminal 61 are electrically connected by the wiring member 80. The wiring member 80 is positioned inside the resin member 20 to bridge the gap between the signal pad 35 and the signal terminal 61. The wiring member 80 has a resin layer 81 made of an electrically insulating resin material. The wiring member 80 has a resin layer 83 made of an electrically insulating resin material. The resin layers 81 and 83 may be made of a continuous resin material. The wiring member 80 may have an electrically insulating coating on the outside of the resin layers 81 and 83. The insulating coating contributes to improving the electrical insulation between the wiring member 80 and other components.

[0040] The wiring member 80 has a metal layer 82 positioned between a resin layer 81 and a resin layer 83. The metal layer 82 is positioned on the wiring member 80 in a linear or ribbon-like form. The metal layer 82 is made of metal. The metal layer 82 may also be called a conductive member or signal line for signal transmission. The metal layer 82 is positioned continuously from one end to the other.

[0041] The wiring member 80 includes a first joint 80a for enabling electrical connection between the metal layer 82 and the signal pad 35. A second joint 80b is provided at one end of the metal layer 82. The wiring member 80 has a second joint 80b for enabling electrical connection between the metal layer 82 and the signal terminal 61. The second joint 80b is provided at the other end of the metal layer 82. The first joint 80a and the second joint 80b are separated by a window formed in the resin layers 81 and 83. The window exposes a portion of the metal layer 82 from the resin layers 81 and 83. The first joint 80a and the second joint 80b may also be considered as part of the metal layer 82. At the first joint 80a, the signal pad 35 of the semiconductor element 30 and one end of the metal layer 82 are electrically connected by a third joint member 73. At the second joint 80b, the other end of the metal layer 82 and the signal terminal 61 are electrically connected by the fourth joint member 74.

[0042] Figure 4 is a partial cross-sectional view taken along line IV-IV in Figure 3, with the resin member 20 removed. The heat dissipation member 40, semiconductor element 30, wiring member 80, and signal terminal 61 are arranged in a stacked manner with respect to the X direction. The heat dissipation member 40, semiconductor element 30, wiring member 80, and signal terminal 61 are parallel to each other. The heat dissipation member 40 and semiconductor element 30 are arranged parallel to each other so as to overlap. The semiconductor element 30 and wiring member 80 are arranged parallel to each other so as to overlap only at the first joint 80a. The wiring member 80 and signal terminal 61 are arranged parallel to each other so as to overlap only at the second joint 80b. The heat dissipation member 40, semiconductor element 30, wiring member 80, and signal terminal 61 are plate-shaped. The heat dissipation member 40, semiconductor element 30, wiring member 80, and signal terminal 61 are arranged so that their plate surfaces are parallel to the YZ plane. Therefore, the signal terminal 61 extends from the side of the resin member 20 parallel to the YZ plane.

[0043] The semiconductor element 30 is placed on and bonded to the second heat dissipation member 42. The power pad 33 of the semiconductor element 30 is bonded to the first heat dissipation member 41 (not shown) by a first bonding member 71. The semiconductor element 30 has a plurality of signal pads 35. In the illustration, the power pad 33 and signal pads 35 are represented by rectangular shapes. The pads of the semiconductor element 30 can be provided in a variety of shapes, such as circular, elliptical, rounded polygonal, and polygonal.

[0044] Multiple signal pads 35 are arranged apart from each other at the outer edge of the upper surface of the semiconductor element 30. Multiple signal pads 35 are arranged in rows along the outer edge. Multiple signal pads 35 may be arranged at the corners of the upper surface of the semiconductor element 30. Multiple signal pads 35 may be arranged dispersedly on the upper surface of the semiconductor element 30 to form multiple groups. Multiple signal pads 35 are arranged with a pad pitch Pp. The pad pitch Pp is the minimum pad pitch among the multiple signal pads 35. Multiple signal pads 35 are arranged within a width Wp range.

[0045] The multiple signal terminals 61 have a shape that can be described as a long, slender rod or ribbon. The multiple signal terminals 61 are arranged parallel to each other. The multiple signal terminals 61 are arranged so that one end of each is aligned in a straight line. The multiple signal terminals 61 may have different thicknesses. The multiple signal terminals 61 may have different lengths. The multiple signal terminals 61 are arranged with a terminal pitch Pi. The terminal pitch Pi is the minimum terminal pitch among the multiple signal terminals 61. The multiple signal terminals 61 are arranged within a width Wi.

[0046] The terminal pitch Pi is greater than or equal to the pad pitch Pp (Pi ≥ Pp). In the illustrated example, the terminal pitch Pi is greater than the pad pitch Pp (Pi > Pp). The terminal pitch Pi and the pad pitch Pp are different. There is a difference Dp (Dp = Pi - Pp) between the terminal pitch Pi and the pad pitch Pp. The terminal pitch Pi and the pad pitch Pp may be equal.

[0047] The width Wi is greater than or equal to the width Wp (Wi≧Wp). In the illustrated example, the width Wi is greater than the width Wp (Wi>Wp). The width Wi and width Wp are different. There is a difference Dw (Dw=Wi-Wp) between the width Wi and width Wp. The width Wi and width Wp can be equal.

[0048] The wiring member 80 is positioned between the signal pads 35 and the signal terminals 61. The wiring member 80 is positioned to bridge the multiple signal pads 35 and the multiple signal terminals 61. The wiring member 80 has resin layers 81 and 83 and a metal layer 82. The wiring member 80 has multiple metal layers 82 that are electrically independent of each other. Each of the multiple metal layers 82 is electrically connected to each of the multiple signal pads 35 and each of the multiple signal terminals 61. The multiple metal layers 82 are insulated from other members by the resin layers 81 and 83 in portions other than the joints 80a and 80b.

[0049] The wiring member 80 includes a first joint portion 80a for connecting the metal layer 82 and the signal pad 35. The first joint portion 80a is formed by exposing the metal layer 82 from the resin layer 81 and / or the resin layer 83. The first joint portion 80a is formed by a window portion partitioned in the resin layer 81 and / or the resin layer 83, and an exposed portion of the metal layer 82 exposed in the window portion. The window portion is an opening of a predetermined area in the resin layer 81 and / or the resin layer 83. The exposed portion has an area and shape that allows it to be joined with the signal pad 35.

[0050] The wiring member 80 includes a second joint portion 80b for connecting the metal layer 82 and the signal terminal 61. The second joint portion 80b is formed by exposing the metal layer 82 from the resin layer 81 and / or the resin layer 83. The second joint portion 80b is formed by a window portion partitioned in the resin layer 81 and / or the resin layer 83, and an exposed portion of the metal layer 82 exposed in the window portion. The window portion is an opening of a predetermined area in the resin layer 81 and / or the resin layer 83. The exposed portion has an area and shape that allows it to be joined to the signal terminal 61.

[0051] The laying paths of the multiple metal layers 82 in the wiring member 80 are configured to provide electrical connections while allowing a difference Dp and / or a difference Dw. The width over which the multiple metal layers 82 are laid is wider on the signal terminal 61 side than on the signal pad 35 side than on the signal pad 35 side. The shape of the wiring member 80 is also configured to provide electrical connections while allowing a difference Dp and / or a difference Dw. The width of the wiring member 80 itself is wider on the signal terminal 61 side than on the signal pad 35 side.

[0052] The shapes of the multiple metal layers 82 in the YZ plane are approximately parallel to each other. However, the shapes of the multiple metal layers 82 in the YZ plane are formed so that the difference between width Wi and width Wp is absorbed by the change in the distance between the multiple metal layers 82. The shapes of the multiple metal layers 82 are set so that the distance between them changes. The distance between the multiple metal layers 82 can also be called the metal layer pitch. The metal layer pitch is equal to the terminal pitch Pi on the signal terminal 61 side. The metal layer pitch is equal to the pad pitch Pp on the signal pad side. The metal layer pitch decreases from the terminal pitch Pi towards the pad pitch Pp. In the illustrated example, the metal layer pitch changes in a stepwise manner. Alternatively, the metal layer pitch may change gradually.

[0053] The manufacturing method for the semiconductor module 10 includes a preparation step for preparing several components. The preparation step is a step for preparing the main components. The preparation step includes preparing the resin material 20 before molding, the semiconductor element 30, the heat dissipation member 40, the lead frame providing the power terminals 51, the lead frame providing the signal terminals 61, the bonding member 70, and the wiring member 80.

[0054] A method for manufacturing a semiconductor module 10 includes a bonding step for electrically and / or thermally and mechanically bonding a plurality of components. The bonding step includes a semiconductor bonding step for bonding a heat dissipation member 40 and a semiconductor element 30 using bonding members 71 and 72. The semiconductor bonding step includes a first bonding member step for bonding a first heat dissipation member 41 and a semiconductor element 30 using a first bonding member 71. The semiconductor bonding step includes a second bonding member step for bonding a second heat dissipation member 42 and a semiconductor element 30 using a second bonding member 72. The first bonding member step and the second bonding member step may be performed after the second bonding member step. The first bonding member step and the second bonding member step may be performed simultaneously.

[0055] The bonding process includes a power terminal bonding process for bonding the heat dissipation member 40 and the power terminal 51. The bonding process includes a signal path bonding process for connecting the signal pad 35 and the signal terminal 61 via a wiring member 80. The signal path bonding process includes a third bonding member process for bonding the signal pad 35 and the wiring member 80 with a third bonding member 73. The signal path bonding process includes a fourth bonding member process for bonding the signal terminal 61 and the wiring member 80 with a fourth bonding member 74. The third bonding member process and the fourth bonding member process can be performed simultaneously. The third bonding member process and the fourth bonding member process may be performed in numerical order or in reverse numerical order. The semiconductor bonding process and the signal path bonding process can be performed simultaneously. Furthermore, the power terminal bonding process may be performed simultaneously with these.

[0056] The semiconductor bonding process, the power terminal bonding process, and the signal path bonding process can be carried out by a temporary heating process that melts and re-hardens the solder, for example, when solder is used as the bonding member 70. For example, at least the second bonding member process and the third bonding member process, and / or at least the second bonding member process and the fourth bonding member process may be carried out simultaneously by a temporary heating process. In this case, in the arrangement process preceding the heating process, the second heat dissipation member 42, the second bonding member 72, and the semiconductor element 30 are arranged in a stacked manner. In the arrangement process, the signal pad 35, the third bonding member 73, and the first bonding portion 80a are arranged in a stacked manner. Furthermore, in the arrangement process, the signal terminal 61, the fourth bonding member 74, and the second bonding portion 80b are arranged in a stacked manner. In the heating process, by melting the bonding members 72, 73, and 74, the bonding of the semiconductor element 30 to the second heat dissipation member 42 and the bonding of the wiring member 80 can be carried out simultaneously. In addition, the semiconductor element 30, the first bonding member 71, and the first heat dissipation member 41 may be arranged in a stacked manner during the arrangement process. In this case, during the heating process, the bonding members 71, 72, 73, and 74 are melted simultaneously. The bonding process is performed to bond all bonding locations. The bonding process includes a curing process to harden the bonding members. Multiple members are joined together through the bonding process.

[0057] The manufacturing method for the semiconductor module 10 includes a resin molding step in which the intermediate product, joined by the bonding step, is encased in a resin member 20. The resin molding step is carried out so as to provide the intended electrical insulation by having the resin member penetrate the gaps between the members of the intermediate product. The resin molding step is a step of molding the resin member 20 so as to cover the semiconductor element 30, exposing the heat dissipation member 40, power terminals 51, and signal terminals 61. The resin molding step includes an arrangement step in which the multiple bonded parts are placed in a mold. The resin molding step includes an injection step in which the molten resin member 20 is injected into the mold. The resin molding step includes a curing step in which the molten resin member 20 is cured. The resin molding step includes an extraction step in which the molded product is removed from the mold. The resin molding step further includes a finishing step, which includes a step of cutting the lead frame and a step of removing resin burrs.

[0058] According to the embodiments described above, the wiring member 80 provides an electrical connection between the signal pad 35 and the signal terminal 61 of the semiconductor element 30. The wiring member 80 enables an easy joining process. Furthermore, the wiring member 80 itself has electrical insulation properties due to the resin layers 81 and 83. Therefore, the wiring member 80 improves the reliability of electrical insulation between the metal layer 82 and other members. If the wiring member 80 has multiple metal layers 82, it improves the reliability of electrical insulation between the multiple metal layers 82.

[0059] Furthermore, the wiring member 80 is encased, fixed, and supported by the resin member 20. This prevents foreign matter from entering the semiconductor module 10 from the outside. Foreign matter includes liquids such as water and corrosive gases. In other words, the wiring member 80 and the resin member 20 provide high sealing performance.

[0060] Second Embodiment This embodiment is a modification based on the preceding embodiment. In the above embodiment, the multiple signal pads 35 are distributed along one short side of the semiconductor element 30. Instead, in this embodiment, multiple signal pads 235 are concentrated in a part of the semiconductor element 30. It is desirable for the semiconductor element 30 to have a relatively large active region where it exhibits activity as a switching element. A relatively large active region enables the control of large currents. This embodiment provides a semiconductor element 30 that can have a relatively large active region.

[0061] Figure 5 shows a perspective view of the multiple components in a state where the resin member 20 and the first heat dissipation member 41 have been removed. The semiconductor element 30 is plate-shaped with a rectangular surface. The semiconductor element 30 is approximately square. The semiconductor element 30 has a plurality of signal pads 235 in a rectangular region of its surface near the corners of the outer edge. The plurality of signal pads 235 are concentrated in the rectangular region. The plurality of signal pads 235 are arranged in a row along the outer edge of the surface. The plurality of signal pads 235 are arranged with a pad pitch Pp2 in the row direction. The pad pitch Pp2 is smaller than the pad pitch Pp of the previous embodiment. The pad pitch Pp2 is set to a value that can be called fine compared to the size of the semiconductor element 30.

[0062] The wiring member 80 has a plurality of first joints 80a and a plurality of second joints 80b. Each of the plurality of first joints 80a is joined to each of the plurality of signal pads 235. Thus, the plurality of signal pads 35 are arranged to form a pad pitch Pp2 with respect to the row direction. The plurality of second joints 80b are arranged to form a terminal pitch Pi with respect to the row direction. Each of the plurality of second joints 80b is joined to each of the plurality of signal terminals 61. The plurality of metal layers 82 are arranged to expand the fine pad pitch Pp2 to the terminal pitch Pi. The plurality of metal layers 82 are laid in a meandering manner between the first joints 80a and the second joints 80b.

[0063] The wiring member 80 has an outer edge portion 284 positioned along the outer edge of the surface of the semiconductor element 30 where the signal pads 235 are not located. The outer edge portion 284 is positioned along the longitudinal direction of the outer edge. The outer edge portion 284 is positioned on the outer edges of three of the four outer edges of the surface of the semiconductor element 30 where the signal pads 235 are not located. As a result, the wiring member 80 is positioned on the surface of the semiconductor element 30 so as to surround the power pads 33 for carrying the main current. In other words, the wiring member 80 is positioned so as to surround the first bonding member 71. The wiring member 80 demarcates the opening 285. The outer edge portion 284 is formed only of the resin layer 81 or the resin layer 83. The outer edge portion 284 may also include a metal layer 82. The outer edge portion 284 facilitates the positioning of the wiring member 80 relative to the semiconductor element 30. As a result, even with a fine pad pitch Pp2, multiple signal pads 235 and multiple first joint portions 80a can be accurately and easily positioned. The outer edge portion 284 improves the electrical insulation of the outer circumference of the semiconductor element 30. The wiring member 80 improves the electrical insulation between components such as electrodes that serve as power paths for the semiconductor element 30 and components such as electrodes that serve as signal paths. The outer edge portion 284 may define the shape of the first joint member 71.

[0064] A fine pad pitch Pp2 makes it possible to relatively reduce the area occupied by the multiple signal pads 235. As a result, the area occupied by the bonding member 70 on the semiconductor element 30, and / or the area of ​​the active region for current flow, can be relatively increased. In the illustrated example, the active region extends to approximately the area where the first bonding member 71 is located. The active region extends to be adjacent to all four sides of the semiconductor element 30. One side of the semiconductor element 30 is shared by the area occupied by the multiple signal pads 235 and the area occupied by the active region. The area occupied by the multiple signal pads 235 is less than 2 / 3 or less than 1 / 2 of one side of the semiconductor element 30. From one perspective, a fine pad pitch Pp2 enables suppression of current density and / or improvement of heat transfer by increasing the area of ​​the bonding member 70 on the surface of the semiconductor element 30. From another perspective, increasing the size of the active region within the semiconductor element 30 allows for a reduction in the overall size of the semiconductor element 30, and / or a reduction in cost due to the reduction in element size.

[0065] Third Embodiment This embodiment is a modification based on the preceding embodiment. In the above embodiment, one semiconductor module 10 comprises one semiconductor element 30. Alternatively, one semiconductor module 10 can comprise two or more semiconductor elements. This embodiment is an example of a case where multiple semiconductor elements are provided. This embodiment provides a semiconductor module 10 that accommodates multiple semiconductor elements 30 arranged in parallel or in series.

[0066] In Figure 6, the semiconductor module 10 has two semiconductor elements 30a and 30b stacked on the second heat dissipation member 42. The two semiconductor elements 30a and 30b have the same or similar shape. The two semiconductor elements 30a and 30b are arranged rotationally symmetrically on the second heat dissipation member 42. In this embodiment, the two semiconductor elements 30a and 30b are arranged in parallel in the power path. Semiconductor element 30a has a power pad 33a and a plurality of signal pads 35a. Semiconductor element 30a and the bonding member 71a are arranged stacked. Semiconductor element 30b has a power pad 33b and a plurality of signal pads 35b. Semiconductor element 30b and the bonding member 71b are arranged stacked.

[0067] The two semiconductor elements 30a and 30b may be arranged in series in the power path. For example, one of the semiconductor elements 30a and 30b may be used as an upper arm, and the other as a lower arm. In this case, one semiconductor module 10 provides one switching arm 18.

[0068] The wiring member 80 is provided by the wiring member 380. The wiring member 380 comprises a plurality of first junctions 80a for semiconductor element 30a. The wiring member 380 comprises a plurality of first junctions 80a for semiconductor element 30b. Furthermore, the wiring member 380 comprises a common second junction 80b for the plurality of semiconductor elements 30a, 30b. In this embodiment, the plurality of metal layers 82 have independent metal layers 382a and a common metal layer 382c. The independent metal layer 382a is bonded to only one of the plurality of signal pads 35a, 35b. The common metal layer 382c is commonly bonded to one signal pad 35a of semiconductor element 30a and one signal pad 35b of semiconductor element 30b. The metal layers 382a, 382c are bonded to the signal terminal 61 at the second junction 80b.

[0069] The multiple signal terminals 61 include a dedicated signal terminal 61a for semiconductor element 30a only, a dedicated signal terminal 61b for semiconductor element 30b only, and a signal terminal 61c common to both semiconductor elements 30a and 30b. For example, the dedicated signal terminals 61a and 61b are used as sensor terminals for temperature, current, etc., of the semiconductor elements 30a and 30b. The common signal terminal 61c is used as a gate terminal for driving multiple semiconductor elements 30a and 30b at the same timing. In the illustrated example, the dedicated signal terminals 61a and 61b are arranged on both sides of the row of multiple signal terminals 61, and the common signal terminal 61c is located in the center of the row of multiple signal terminals 61.

[0070] The wiring member 80 can provide dedicated and common connections within itself by having an independent metal layer 382a and a common metal layer 382c. The wiring member 80 can accommodate different arrangements of multiple signal pads 35a, 35b by changing the laying pattern of the multiple metal layers 82. Furthermore, the wiring member 80 can change the arrangement of dedicated signal terminals 61a, 61b and common signal terminal 61c by changing the laying pattern of the multiple metal layers 82.

[0071] Fourth Embodiment This embodiment is a modification based on a prior embodiment. This embodiment is an example of a case in which multiple semiconductor elements are provided. One semiconductor module 10 includes multiple semiconductor elements 30a, 30b, 30c, and 30d.

[0072] In Figure 7, the four semiconductor elements 30a, 30b, 30c, and 30d are stacked in parallel relative to the second heat dissipation member 42. The multiple semiconductor elements 30 have the same or similar shapes. The multiple semiconductor elements 30 are arranged such that the signal pads 35 are located on one side of the second heat dissipation member 42. The multiple semiconductor elements 30 are dispersed in a grid pattern.

[0073] The wiring member 80 is provided by the wiring member 480. The wiring member 480 has an area that extends over a plurality of semiconductor elements 30a, 30b, 30c, and 30d. The wiring member 480 has an outer edge 484 and openings 485. The outer edge 484 extends in a grid pattern. As a result, the wiring member 480 has four openings 485. Each of the four openings 485 is located at a position corresponding to each of the four semiconductor elements 30. The openings 485 provide openings for the first bonding member 71 to pass through.

[0074] The wiring member 480 has a plurality of metal layers 82. The plurality of metal layers 82 include a dedicated metal layer 82a and a common metal layer 82c. The metal layers 82 are laid to bypass the semiconductor element 30 and extend continuously between the first junction 80a and the second junction 80b.

[0075] Fifth Embodiment This embodiment is a modification based on a prior embodiment. This embodiment is an example of a case in which multiple semiconductor elements are provided. One semiconductor module 10 includes multiple semiconductor elements 30a, 30b, 30c, and 30d.

[0076] In Figure 8, the four semiconductor elements 30a, 30b, 30c, and 30d are arranged in a square. Furthermore, the four semiconductor elements 30a, 30b, 30c, and 30d are arranged rotationally symmetrically with respect to the central axis AXC. Each of the multiple semiconductor elements 30 has a signal pad 35 located at its corner. The multiple semiconductor elements 30 are arranged such that the signal pads 35 are located near the central axis AXC.

[0077] The wiring member 80 is provided by the wiring member 580. The wiring member 580 has a metal layer 82c. The wiring member 580 comprises four first junctions 80a. The wiring member 580 comprises a second junction 80b connected to a common terminal member. The metal layer 82c has a portion extending between the second junction 80b and the central axis AXC, and a plurality of branch portions extending radially from the central axis AXC and reaching the first junctions 80a. The common metal layer 82c provides a common electrical connection to the plurality of semiconductor elements 30a, 30b, 30c, and 30d. The common metal layer 82c provides signal paths of approximately equal length from the second junction 80b to the plurality of signal pads 35. Approximately equal length means that the electrical characteristics are approximately equal, or any differences are negligible due to the nature of the signals. For example, the signal pads 35 can be pads for drive signals such as gate signals. In this case, it becomes possible to suppress the difference in the drive signals supplied to multiple semiconductor elements 30.

[0078] Sixth Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member 80 is positioned away from the heat dissipation member 40. Instead, in this embodiment, the wiring member 680 is positioned in contact with both the semiconductor element 30 and the first heat dissipation member 41. Furthermore, the wiring member 680 includes a recess 86. The recess 86 functions as a volume adjustment unit for adjusting the volume of the first bonding member 71 to an appropriate amount for bonding the power pad 33 of the semiconductor element 30 and the first heat dissipation member 41. The recess 86 is provided by a recess 686. This embodiment provides a semiconductor module 10 that can stabilize the size of the first bonding member 71.

[0079] In Figure 9, the semiconductor module 10 includes a semiconductor element 30 disposed between a first heat dissipation member 41 and a second heat dissipation member 42. The semiconductor module 10 also includes a wiring member 680. The wiring member 80 is provided by the wiring member 680. The wiring member 680 is positioned between the semiconductor element 30 and the first heat dissipation member 41. The wiring member 680 is positioned in contact with both the semiconductor element 30 and the first heat dissipation member 41. The wiring member 680 electrically connects the signal pad 35 and the signal terminal 61 of the semiconductor element 30. The wiring member 680 has resin layers 81 and 83. Each of the resin layers 81 and 83 is formed by an assembly of multiple resin layers arranged in a stacked manner. The resin layers 81 and 83 may also be formed by a single resin layer made of a continuous resin material.

[0080] The wiring member 680 has an outer edge portion 684 positioned along the edge of the first joining member 71. The outer edge portion 684 surrounds the first joining member 71 in the YZ plane. As a result, the outer edge portion 684 defines an opening 685 that defines the position and maximum extent of the first joining member 71 in the YZ plane. The wall surface of the opening 685 may form a small gap with the first joining member 71, or it may come into contact with the first joining member 71. When the wall surface of the opening 685 comes into contact with the first joining member 71, the opening 685 demarcates the extent of the first joining member 71.

[0081] The wiring member 680 includes a recess 686. The recess 686 opens into the wall surface that defines the opening 685. The recess 686 is formed by a notch that penetrates at least one of the multiple resin layers that make up the resin layers 81, 83. Therefore, the recess 686 has a thickness in the X direction corresponding to at least one resin layer. In the illustrated embodiment, the recess 686 is provided by the resin layer located at the outermost end of the multiple resin layers. Therefore, the recess 686 also opens into the end face of the wiring member 680 in the X direction (thickness direction). The recess 686 defines an expansion chamber that communicates with the opening 685. The recess 686 provides the side wall of the expansion chamber. The wall surface of the expansion chamber in the X direction is provided by other resin layers. The recess 686 is located in only a portion of the wall surface of the opening 685. The recess 686 has a shape that can also be called a notch of the wiring member 680. The recess 686 expands the volume of the opening 685 in only a portion of the YZ plane. The recess 686 expands the volume of the opening 685 in only a portion of the XZ plane. The volume expansion chamber partitioned by the recess 686 may accommodate the excess portion of the first joining member 71. The excess portion of the first joining member 71 flows into the recess 686 either by being pushed out or by its own fluidity, hardens, and remains in the recess 686. The figure shows the excess portion 675 remaining in the recess 686.

[0082] When a large number of semiconductor modules 10 are manufactured, there will be products in which the volume expansion chamber accommodates the excess portion 675 of the first bonding member 71, and products in which the volume expansion chamber does not accommodate the excess portion 675 of the first bonding member 71. The volume expansion chamber functions as a relief capacity to absorb the excess amount of the first bonding member 71 when an excess amount of the first bonding member 71 is present in the opening 685.

[0083] The recess 686 is positioned so as to demarcate the expanded volume chamber by a portion of the surface of the first heat dissipation member 41. The recess 686 is positioned adjacent to the first heat dissipation member 41. The recess 686 is provided in only a portion of the numerous resin layers. In the illustrated example, the recess 686 is provided only in the resin layer closest to the first heat dissipation member 41. As a result, one surface of the expanded volume chamber provided by the recess 686 is demarcated by the first heat dissipation member 41. The recess 686 is provided so as not to reach the metal layer 82. The recess 686 is formed so as to maintain good electrical insulation between the first bonding member 71 and the metal layer 82. The recess 686 is provided so as to provide a predetermined electrical insulation distance from the metal layer 82.

[0084] The wiring member 680 has a thickness TF1. Thickness TF1 is the thickness at which the wiring member 80 contacts the surface of the semiconductor element 30 and the first heat dissipation member 41. Thickness TF1 is a thickness that defines the thickness of the first bonding member 71 and is equal to the thickness of the first bonding member 71.

[0085] A method for manufacturing a semiconductor module 10 includes a first bonding step in which a first heat dissipation member 41 and a semiconductor element 30 are bonded together by a first bonding member 71. The manufacturing method includes a placement step prior to the first bonding step. In the placement step, the first heat dissipation member 41, the wiring member 680, and the semiconductor element 30 are arranged in a stacked manner. At this time, the first bonding member 71, before bonding (before melting and re-hardening), is placed in the opening 685. The first bonding member 71 in the placement step has a thickness equal to or greater than the thickness TF1.

[0086] Following the placement process, a first bonding process is performed. In the first bonding process, the first bonding member 71 melts and flows. In the first bonding process, the first bonding member 71 bonds the first heat dissipation member 41 and the semiconductor element 30, and then hardens again. In the process of melting and hardening the first bonding member 71 in the first bonding process, the thickness of the first bonding member 71 changes. In most cases, the thickness of the first bonding member 71 decreases from before the bonding process to after the bonding process. Furthermore, in the first bonding process, pressure may be applied in a direction that brings the first heat dissipation member 41 and the semiconductor element 30 closer together. This pressure also reduces the thickness of the first bonding member 71.

[0087] In the first bonding process, the wiring member 680 comes into contact with the first heat dissipation member 41 and the semiconductor element 30. At the same time, the opening 685 suppresses the flow of the first bonding member 71. If there is an excess of the first bonding member 71 during the process of melting and then hardening, the distance between the first heat dissipation member 41 and the semiconductor element 30 may not be stable. In this case, the excess portion of the first bonding member 71 is pushed out toward the recess 686. In some cases, the excess portion of the first bonding member 71 may flow into the recess 686 without being pushed out. The excess portion of the first bonding member 71 hardens again and remains in the recess 686 as an excess portion 675. As a result, the excess portion 675 is retained in the recess 686. It can also be said that the recess 686 provides relief capacity for the first bonding member 71.

[0088] In this case, the recess 686 is adjacent to the first heat dissipation member 41. Therefore, the excess portion 675 contacts the first heat dissipation member 41, contributing to the provision of a wide bonding cross-sectional area. Providing a wide bonding cross-sectional area enhances the heat transfer performance in the first bonding member 71 and enables the suppression of current density.

[0089] Furthermore, if gaseous components are mixed into the first joining member 71 during the joining process, or if gaseous components are generated when the first joining member 71 melts, these gaseous components may flow into the recess 686. These gaseous components may create voids inside the first joining member 71 once it has hardened again. The inflow of gaseous components into the recess 686 may suppress the formation of voids in the first joining member 71. It can be said that the recess 686 also provides an escape capacity for gaseous components during the joining process.

[0090] In this embodiment, the volume provided by the recess 686 is provided as an additional volume to the standard volume for the first bonding member 71 provided by the opening 685. As a result, if the first bonding member 71 is about to overflow from the standard volume, it flows into the additional volume provided by the recess 686. Even after the first bonding member 71 has cured again, some of the first bonding member 71 may remain in the additional volume provided by the recess 686. As a result, an appropriate volume of the first bonding member 71 remains in the standard volume provided by the opening 685. The first bonding member 71 remaining in the opening 685 provides an appropriate bonding state between the semiconductor element 30 and the first heat dissipation member 41. For example, the recess 686 suppresses tilting, unstable bonding, and unintended leakage of the first bonding member 71 between the semiconductor element 30 and the first heat dissipation member 41.

[0091] In this embodiment, the entire wiring member 680 has a thickness TF1. Alternatively, the wiring member 680 may be configured to have a thickness TF1 only in the portion located between the semiconductor element 30 and the first heat dissipation member 41. For example, the wiring member 680 may be configured to have a thickness thinner than TF1 in the portion positioned to bridge the gap between the semiconductor element 30 and the signal terminal 61. Such a configuration provides the flexibility required for the portion positioned to bridge the gap between the semiconductor element 30 and the signal terminal 61.

[0092] Seventh Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the metal layer 82 of the wiring member 80 only connects the signal pad 35 and the signal terminal 61. Instead, in this embodiment, the wiring member 780 includes a metal layer 787 bonded to the first bonding member 71. In one view, this embodiment provides a semiconductor module 10 in which the thickness of the bonding member can be stably adjusted to a predetermined value. In another view, this embodiment provides a semiconductor module 10 in which the position of the wiring member 780 can be stably set.

[0093] In Figure 10, the wiring member 80 is provided by the wiring member 780. The wiring member 780 is positioned between the signal pad 35 and the signal terminal 61. The wiring member 780 is positioned to overlap with the signal pad 35 in the X direction. Furthermore, the wiring member 780 is positioned to overlap with the power pad 33 in the X direction. The wiring member 780 extends to overlap with both the signal pad 35 and the power pad 33. In other words, the wiring member 780 extends into the region where the first connecting member 71 is positioned.

[0094] The wiring member 780 has an outer edge 784 positioned along the first joint member 71. The outer edge 784 encloses the area where the first joint member 71 is to be installed. The outer edge 784 demarcates an opening 785 in the resin layers 81, 83 corresponding to the area of ​​the first joint member 71. The wiring member 780 includes a metal layer 787 exposed in the opening 785. The opening 785 is also called a notch that exposes the metal layer 787 from the resin layers 81, 82. The metal layer 787 is formed of the same material as the metal layer 82. The metal layer 787, which provides the power path, is electrically insulated from the metal layer 82, which provides the signal path. The metal layer 787 is exposed from the wiring member 780 over at least the area of ​​the first joint member 71 in the YZ plane.

[0095] The metal layer 787 is placed and joined within the first joining member 71. As a result, the metal layer 787 divides the first joining member 71 into a first layer 71c and a second layer 71d. The first layer 71c joins the power pad 33 of the semiconductor element 30 to the metal layer 787. The second layer 71d joins the metal layer 787 to the first heat dissipation member 41. In other words, the metal layer 787 is embedded within the first joining member 71. The metal layer 787, or the opening 785, may have a communication opening to form the first layer 71c and the second layer 71d as a continuous joining member. For example, the opening 785 can form a communication opening between the resin layers 81, 83 and the metal layer 787. Alternatively or additionally, the metal layer 787 may have notches or holes as communication openings that connect both sides of the metal layer 787.

[0096] The metal layer 787 is positioned to be embedded within the first joining member 71. As a result, the position of the wiring member 780 is stabilized by the first joining member 71. Furthermore, the wiring member 780 is subjected to the flow and pressure of the resin during the molding process of forming the resin member 20. However, the wiring member 780, with the metal layer 787 embedded within the first joining member 71, is less prone to deformation during the molding process and maintains its predetermined shape. For example, the wiring member 780 is less likely to warp even when subjected to the pressure of the resin.

[0097] A thickness adjustment member 776 is positioned between the metal layer 787 and the first heat dissipation member 41 to adjust the thickness of the first layer 71c. The thickness adjustment member 776 can be provided by nickel balls (Ni balls), bonding pads, or wire ear pads. The thickness adjustment member 776 is provided by a conductive member or a conductive metal member that functions together with the first layer 71c as the first bonding member 71. The thickness adjustment member 776 is also positioned between the metal layer 787 and the semiconductor element 30. The thickness adjustment member 776 contributes to adjusting the thickness of the first layer 71c and the second layer 71d to a predetermined thickness. As a result, the thickness of the first layer 71c and the second layer 71d is suppressed from becoming excessively large, i.e., the thickness of the first bonding member 71 is suppressed from becoming excessively large. As a result, for example, fluctuations in thermal resistance and / or electrical resistance are suppressed. Furthermore, stabilizing the thickness of the first layer 71c and the second layer 71d improves the reliability of the aluminum-silicon electrode (Al-Si electrode) in the power pad 33 on the semiconductor element 30. In addition, when thermal repetition cycles are applied, the deformation direction of the metal layer 787 and the deformation direction of the resin member 20 become the same, which may improve the reliability of the aluminum-silicon electrode.

[0098] Eighth Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member 80 is plate-shaped, providing a continuous surface. From one perspective, the plate-shaped wiring member 80 may interfere with the flow of resin during the molding process of the resin member 20, such as by hindering the flow of resin. From another perspective, the plate-shaped wiring member 80 may be subjected to forces from the flow of resin, such as by being deformed by the flow of resin. Instead, in this embodiment, the wiring member 880 has a connecting portion 88 that allows the flow of resin member 20 during the molding process. As a result, the resin member 20 penetrates the plate-shaped wiring member 880 through the connecting portion 88 and exists as a continuous resin material. From one perspective, this embodiment provides a semiconductor module 10 that can improve the flow of resin during the molding process. From another perspective, this embodiment provides a semiconductor module 10 that can suppress the forces acting on the wiring member 880 during the molding process.

[0099] In Figure 11, the wiring member 80 is provided by a wiring member 880. The wiring member 880 can be used in one of the embodiments described in this specification. The wiring member 880 includes a connecting portion 88 that connects both sides of the wiring member 880. The resin member 20 penetrates the connecting portion 88. The connecting portion 88 is formed by a hole located adjacent to the metal layer 82. The hole penetrates the resin layers 81 and 83 in the front-back direction. The wiring member 880 has one or more connecting portions 88. The wiring member 880 may have a hole 888a located between a plurality of metal layers 82. The wiring member 880 may have a hole 888b located between the metal layer 82 and the outer edge of the wiring member 880.

[0100] The connecting portion 88 allows the resin member 20 to flow through the connecting portion 88 during the molding process. The resin member 20 can flow from the front to the back and from the back to the front of the wiring member 880, even if the wiring member 880 is present. As a result, the molding quality of the resin member 20 is improved. In addition, the force acting on the wiring member 880 due to the flow of the resin member 20 is suppressed. As a result, displacement of the wiring member 880 or deformation of the wiring member 880 is suppressed. Furthermore, the occurrence of bonding defects, including bonding failure at the first joint portion 80a and / or the second joint portion 80b, is suppressed.

[0101] Ninth Embodiment This embodiment is a modification based on the preceding embodiment. This embodiment shows an example of a communication portion 88.

[0102] In Figure 12, the wiring member 80 is provided by the wiring member 980. The wiring member 980 includes a communication portion 88. The communication portion 88 is provided by a single hole 988 in the wiring member 980. In this embodiment, the multiple metal layers 82 are arranged to bypass the hole 988. According to this embodiment, a hole 988 with a relatively large area can be provided at a predetermined position in the wiring member 980. As a result, in the molding process, a relatively large amount of resin member 20 can be flowed at the location where the flow of resin member 20 is required. The position of the hole 988 is set so as to obtain the necessary flow of resin material. For example, the position of the hole 988 is set considering the gate position for injecting the resin member 20 into the mold in the molding process. In addition, the same effects as in the prior embodiment can be obtained in this embodiment as well.

[0103] Tenth Embodiment This embodiment is a modification based on the preceding embodiment. This embodiment shows an example of a communication portion 88.

[0104] In Figure 13, the wiring member 80 is provided by a wiring member A80. The wiring member A80 includes a communication portion 88. The communication portion 88 is provided by a notch A88 provided in the wiring member A80. The notch A88 is formed as an omega-shaped notch that is continuous with the outer edge of the wiring member A80. The notch A88 opens toward the outer edge. The notch A88 may divide the wiring member A80 into a plurality of sub-members, as shown by the dashed line. Between the plurality of sub-members, a communication portion 88 is formed that allows the flow of resin during the molding process. In this embodiment as well, the same effects and advantages as in the prior embodiment can be obtained.

[0105] Eleventh Embodiment This embodiment is a modification based on the preceding embodiment. In the preceding embodiment, the thickness of the wiring member 80 is less than or equal to the thickness of the first joining member 71. Instead, in this embodiment, the thickness of the wiring member B80 is greater than the thickness of the first joining member 71. Furthermore, the thickness of the wiring member B80 is less than or equal to the distance between the first heat dissipation member 41 and the second heat dissipation member 42. In the preceding embodiment, a jig may be used in the joining process to appropriately maintain the distance between multiple members. Also, in the joining process, the joining member 70 may adhere to unintended locations due to leakage, splashing, etc. In this embodiment, the wiring member B80 is in contact with both the first heat dissipation member 41 and the second heat dissipation member 42. Furthermore, the wiring member B80 has an opening B85 for defining the position and shape of the first joining member 71 and the second joining member 72. In one respect, this embodiment provides a semiconductor module 10 in which the shapes of the first bonding member 71 and the second bonding member 72 can be precisely controlled. In another respect, this embodiment provides a semiconductor module 10 in which the spacing between the first heat dissipation member 41 and the second heat dissipation member 42 can be precisely controlled.

[0106] In Figure 14, the semiconductor module 10 includes a first heat dissipation member 41 and a second heat dissipation member 42. The wiring member 80 is provided by wiring member D80. The wiring member B80 has a thickness TF2. The thickness TF2 is such that the wiring member B80 is in contact with the first heat dissipation member 41 and also in contact with the second heat dissipation member 42. The gap between the first heat dissipation member 41 and the second heat dissipation member 42 is defined by the thickness TF2 of the wiring member B80.

[0107] The wiring member B80 has an outer edge B84. The wiring member B80 has an opening B85. The outer edge B84 extends so as to surround the opening B85. The opening B85 has a stepped inner wall surface. The inner wall surface is a stepped surface that alternates between a side surface facing the Y or Z direction and a plane facing the X direction. The inner wall surface makes it possible to stack the first heat dissipation member 41, the first bonding member 71, the semiconductor element 30, the second bonding member 72, and the second heat dissipation member 42 inside the opening B85 in this order.

[0108] The inner wall surface of the opening B85 is in contact with at least the side surface of the first heat dissipation member 41 on the side of the first heat dissipation member 41. Specifically, the inner wall surface of the opening B85 is in contact with at least the side surface of the internal metal plate 45 on the side of the first heat dissipation member 41. As a result, the wiring member B80 positions the first heat dissipation member 41 in the Y and Z directions. The inner wall surface of the opening B85 is in contact with the outer edge portion of the surface (bottom surface in the figure) of the internal metal plate 45 of the first heat dissipation member 41. As a result, the wiring member B80 positions the first heat dissipation member 41 in the X direction.

[0109] The inner wall surface of the opening B85 is in contact with at least the side surface of the second heat dissipation member 42 on the side of the second heat dissipation member 42. Specifically, the inner wall surface of the opening B85 is in contact with at least the side surface of the internal metal plate 48 on the side of the second heat dissipation member 42. As a result, the wiring member B80 positions the second heat dissipation member 42 in the Y and Z directions. The inner wall surface of the opening B85 is in contact with the outer edge portion of the surface (upper surface in the figure) of the internal metal plate 48 of the second heat dissipation member 42. As a result, the wiring member B80 positions the second heat dissipation member 42 in the X direction.

[0110] The inner wall surface of the opening B85 is in contact with the side surface of the semiconductor element 30 at approximately its center. This allows the wiring member B80 to position the semiconductor element 30 in the Y and Z directions. The inner wall surface of the opening B85 is also in contact with the outer edge of the surface (top surface in the figure) of the semiconductor element 30 at approximately its center. This allows the wiring member B80 to position the semiconductor element 30 in the X direction.

[0111] The inner wall surface of the opening B85 is in contact with at least the side surface of the first joining member 71 at the position where the first joining member 71 is placed. This contact is achieved by the inner wall surface preventing the flow of the first joining member 71 during the molding process. At the same time, the inner wall surface defines the shape of the first joining member 71. The wiring member B80 positions the first joining member 71 in the Y and Z directions. The inner wall surface of the opening B85 is in contact with at least the side surface of the second joining member 72 at the position where the second joining member 72 is placed. This contact is achieved by the inner wall surface preventing the flow of the second joining member 72 during the molding process. At the same time, the inner wall surface defines the shape of the second joining member 72. The wiring member B80 positions the second joining member 72 in the Y and Z directions.

[0112] The inner wall surface in the area where the first joining member 71 is placed defines a volume chamber having a size that defines the size of the first joining member 71. The inner wall surface in the area where the second joining member 72 is placed defines a volume chamber having a size that defines the size of the second joining member 72. During the joining process, when the joining member 70 is melted and then hardened again, the inner wall surface of the opening B85 suppresses leakage and scattering of the first joining member 71. Furthermore, the inner wall surface of the opening B85 defines the size and shape of the first joining member 71 during its melting and hardening processes. During the joining process, when the joining member 70 is melted and then hardened again, the inner wall surface of the opening B85 suppresses leakage and scattering of the second joining member 72. Furthermore, the inner wall surface of the opening B85 defines the size and shape of the second joining member 72 during its melting and hardening processes.

[0113] In this embodiment, the gap between the first heat dissipation member 41 and the second heat dissipation member 42 is defined by the wiring member B80. As a result, the use of additional jigs is suppressed, and the shape of the semiconductor module 10 can be defined by effectively utilizing the wiring member B80. However, this embodiment does not completely eliminate the use of jigs. Furthermore, this embodiment may be used in combination with the recess 686 described in the sixth embodiment. In this embodiment as well, the wiring member B80 may be configured to have a thickness TF2 only in the portion located between the first heat dissipation member 41 and the second heat dissipation member 42. For example, the wiring member 680 may be configured to have a thickness thinner than the thickness TF2 in the portion arranged to bridge the semiconductor element 30 and the signal terminal 61. Such a configuration provides the flexibility required for the portion arranged to bridge the semiconductor element 30 and the signal terminal 61.

[0114] Twelfth Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member 80 only reaches the periphery of the semiconductor element 30. When the semiconductor module 10 is used as a device that handles large currents, placing the current-carrying member on the positive side and the current-carrying member on the negative side close together contributes to suppressing the inductance component. However, placing the current-carrying member on the positive side and the current-carrying member on the negative side close together may impair electrical insulation between the members. In this embodiment, the wiring member C80 is placed as an insulating member between a pair of power terminals 51. In one view, this embodiment provides a semiconductor module 10 with improved electrical insulation. In another view, this embodiment provides a semiconductor module 10 with suppressed inductance component.

[0115] Figure 15 shows the vicinity of a pair of power terminals 51 of the semiconductor module 10. Each of the pair of power terminals 51 is electrically connected to the first heat dissipation member 41 and the second heat dissipation member 42, respectively. One power terminal 51a is joined to the internal metal plate 45 by a joining member C77. The other power terminal 51b is joined to the internal metal plate 48 by a joining member C78. One power path is provided by power terminal 51a, joining member C77 and internal metal plate 45. The other power path is provided by power terminal 51b, joining member C78 and internal metal plate 48. For example, power terminal 51a is connected to the positive electrode wire 52, and power terminal 51b is connected to the negative electrode wire 54. The relationship between power terminals 51a and 51b and the positive and negative electrodes may be reversed.

[0116] In this embodiment, the wiring member 80 is provided by a wiring member C80. The wiring member C80 connects the signal pad 35 and the signal terminal 61 of the semiconductor element 30. Furthermore, the wiring member C80 also reaches between a pair of power terminals 51a and 51b. A portion of the wiring member C80 is positioned between the pair of power terminals 51a and 51b. The wiring member C80 is stacked so that the pair of power terminals 51a and 51b overlap on both sides of the wiring member C80. Between the pair of power terminals 51a and 51b is a resin layer C89 of the wiring member C80. The resin layer C89 is formed as an extension extending from the main portion of the wiring member C80, which is positioned to bridge the gap between the signal pad 35 and the signal terminal 61. The resin layer C89 extends in a tongue shape from the main portion, which includes the metal layer 82. The power terminals 51a and 51b have an embedded portion that is embedded within the resin member 20 and an exposed portion that is exposed from the resin member 20. The resin layer C89 is positioned between the power terminals 51a and 51b, extending over the entire area of ​​the embedded portion of the power terminals 51a and 51b. The resin layer C89 extends slightly into the exposed portion of the power terminals 51a and 51b.

[0117] In the buried portion, electrical insulation between power terminals 51a and 51b is provided by the resin layer C89. In the buried portion, the resin member 20 does not penetrate between power terminals 51a and 51b. Furthermore, even in the exposed portion, the resin member 20 does not penetrate between power terminals 51a and 51b. To provide this condition, the resin layer C89 is positioned to be exposed from the resin member 22 between power terminals 51a and 51b. The resin member 20, which is molded by flowing and curing during the molding process, contains many elements that make it unstable in terms of electrical insulation compared to the resin layer C89, such as thickness, density, and amount of foreign matter mixed in. In this embodiment, electrical insulation between the pair of power terminals 51a and 51b is provided solely by the resin layer C89 of the wiring member C80. As a result, even if the pair of power terminals 51a and 51b are placed in close proximity, stable electrical insulation is provided.

[0118] Power terminals 51a and 51b are positioned close enough to exert mutual electromagnetic and electrical effects. A resin layer C89 is stacked between power terminals 51a and 51b. Power terminals 51a and 51b are positioned close together, separated only by the thickness of the resin layer C89. Since current flows in opposite directions between power terminals 51a and 51b, their mutual electromagnetic and electrical effects suppress the inductance component. The inductance component generates surges during high-speed switching of the semiconductor module 10. Therefore, the semiconductor module 10 needs to be used with a suppressed switching speed. Suppressing the inductance component suppresses surges and enables high-speed switching. As a result, this embodiment provides a semiconductor module 10 capable of high-frequency drive.

[0119] The configuration of this embodiment can be used in a semiconductor module 10 having a single semiconductor element 30. Furthermore, the configuration of this embodiment can also be used in a semiconductor module 10 having multiple semiconductor elements 30 and housing a single switching arm. In this case, the multiple semiconductor elements 30 within the semiconductor module 10 can be arranged to provide diverse current flow paths. For example, the multiple semiconductor elements 30 can be arranged so that current flows in an N-shape within the semiconductor module 10, or so it can be arranged so that current flows in a U-shape within the semiconductor module 10.

[0120] Figure 16 is an exploded perspective view showing a semiconductor module 10 providing a single switching arm. The illustrated example shows an arrangement in which current flows in an N-shape within the semiconductor module 10. The semiconductor module 10 includes four heat dissipation members C40a, C40b, C40c, and C40d within a resin member 20. These heat dissipation members may be designated as the first to fourth. The semiconductor module 10 includes power terminals 51, including a positive power terminal 51a, a negative power terminal 51b, and an AC terminal 51c. These power terminals may be designated as the first to third. The semiconductor module 10 includes two semiconductor elements 30a and 30b. Furthermore, the semiconductor module 10 includes a wiring member C80d for semiconductor element 30a and a wiring member C80e for semiconductor element 30b. The wiring members C80d and C80e may be integrally formed from a continuous resin material. One signal terminal 61 is shown as an example in the diagram.

[0121] Heat dissipation members C40a and C40b are joined via semiconductor element 30a. Heat dissipation members C40c and C40d are joined via semiconductor element 30b. These joinings are provided by joining member 70. Heat dissipation members C40b and C40c have overlapping portions that are positioned in overlapping order with respect to the stacking direction (X direction). The overlapping portion is provided by protruding portions that protrude from parts of heat dissipation members C40b and C40c. In the overlapping portion, heat dissipation members C40b and C40c are joined by joining member 70. Heat dissipation member C40a and power terminal 51a are joined by joining member C77. Heat dissipation member C40c and power terminal 51b are joined by joining member C78.

[0122] The wiring member C80 for the semiconductor element 30a has a tongue-shaped resin layer C89. The resin layer C89 is interposed between power terminals 51a and power terminals 51b. The resin layer C89 and power terminals 51a face each other on their opposing surfaces C89a. The resin layer C89 and power terminals 51a are in close contact on their opposing surfaces C89a. The resin layer C89 and power terminals 51b face each other on their opposing surfaces C89b. The resin layer C89 and power terminals 51b are in close contact on their opposing surfaces C89b. The close contact between the resin layer C89 and power terminals 51a and 51b prevents the intrusion of resin member 20 during the molding process. The close contact between the resin layer C89 and power terminals 51a and 51b also prevents the intrusion of foreign matter even after the semiconductor module 10 is completed.

[0123] In the figure, for example, the current path when current flows from power terminal 51a to power terminal 51b is illustrated by a thick dashed arrow. Power terminals 51a and 51b are electrically insulated by the resin layer C89. Because the current flowing through power terminal 51a and the current flowing through power terminal 51b are positioned in close proximity by the resin layer C89, the inductance component is suppressed by their mutual electromagnetic interaction. Heat dissipation members C40a and C40d have overlapping portions that are positioned in the stacking direction (X direction). The overlapping portion is provided by protruding portions that protrude from parts of heat dissipation members C40a and C40d. In the overlapping portion, the resin layer C89 is positioned between heat dissipation member C40a and heat dissipation member C40d. As a result, the resin layer C89 improves the electrical insulation between heat dissipation member C40a and heat dissipation member C40d in the overlapping portion.

[0124] According to this embodiment, the inductance component in the pair of power terminals 51 is suppressed. As a result, this embodiment provides a semiconductor module 10 capable of high-frequency drive.

[0125] 13th Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the semiconductor element 30 and the first heat dissipation member 41 are joined only by a bonding member 70. In this case, if the thickness of the bonding member 70 is small, the flow of the resin member 20 during the molding process may be hindered. Also, the thickness of the bonding member 70 may allow the semiconductor element 30 to tilt, which may impair electrical insulation. In this embodiment, in addition to the bonding member 70, a spacer member D77 having a predetermined thickness is placed between the semiconductor element 30 and the first heat dissipation member 41. In one view, this embodiment provides a semiconductor module 10 that is properly molded by the resin member 20. In another view, this embodiment provides a semiconductor module 10 in which the thickness of the bonding member 70 is suppressed and the tilt of the semiconductor element 30 is suppressed.

[0126] In Figure 17, the semiconductor module 10 has a bonding member 70 and a spacer member D77 between the semiconductor element 30 and the first heat dissipation member 41. The spacer member D77 is made of a material that has high electrical conductivity and high thermal conductivity. In this embodiment, the spacer member D77 is made of a copper or aluminum metal plate. The spacer member D77 is provided in the first bonding member 71 between the semiconductor element 30 and the first heat dissipation member 41. The spacer member D77 may also be called a terminal member for the semiconductor element 30. The first bonding member 71 includes a first layer 71c located between the power pad 33 of the semiconductor element 30 and the spacer member D77, and a second layer 71d located between the spacer member D77 and the first heat dissipation member 41. It can also be said that the spacer member D77 divides the first bonding member 71 into the first layer 71c and the second layer 71d. Furthermore, the first layer 71c and the second layer 71d may be continuous on the side surface of the spacer member D77.

[0127] The spacer member D77 adjusts the distance between the semiconductor element 30 and the first heat dissipation member 41 to a predetermined value or greater. The predetermined value is a gap sufficient to maintain good fluidity of the resin member 20 during the molding process. By providing a gap greater than the predetermined value, the resin member 20 can flow into the gap between the semiconductor element 30 and the first heat dissipation member 41. For example, the resin member 20 can flow into the vicinity of the first joint portion 80a of the wiring member 80. As a result, the formation of voids in the resin member 20 is suppressed, and the resin member 20 is properly molded. The properly molded resin member 20 stably supports and fixes multiple components in predetermined positions. Furthermore, the properly molded resin member 20 provides the required electrical insulation.

[0128] The spacer member D77 suppresses the thickness of the bonding member 70 between the semiconductor element 30 and the first heat dissipation member 41. The thickness of the first bonding member 71 is suppressed to the thickness of the first layer 71c and the thickness of the second layer 71d. As a result, the tilt of the semiconductor element 30 and the tilt of the first heat dissipation member 41 are suppressed.

[0129] 14th Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member 80 is formed of resin layers 81 and 83 and a metal layer 82. The wiring member 80 may deform during the molding process. The wiring member 80 may undergo warping deformation, for example, causing residual stress at the joints 80a and 80b. Furthermore, a flexible wiring member 80 may experience unintended deterioration of electrical insulation due to deformation during the molding process. In this embodiment, a wiring member E80 is used that includes an additional metal layer E90 to induce plastic deformation to the extent that it maintains a predetermined shape. The additional metal layer E90 provides the wiring member E80 with mechanical strength that allows it to maintain a predetermined shape while possessing flexibility that allows it to deform through reversible plastic deformation. This embodiment provides a semiconductor module 10 in which unintended deformation of the wiring member 80 is suppressed.

[0130] Figure 18 shows an enlarged cross-sectional view of the first joint 80a. The wiring member 80 is provided by the wiring member E80. The semiconductor element 30 has a signal pad 35. The metal layer 82 is joined to the signal pad 35 at the first joint 80a. In the figure, a joining means E70 for joining the metal layer 82 and the signal pad 35 is illustrated by a triangular symbol. The joining means E70 includes various joining means available for the electrical connection of the metal layer 82. The joining means E70 includes the joining member 70 described in a prior embodiment. The joining means E70 includes welding joining such as laser welding and electric welding.

[0131] The wiring member E80 comprises resin layers 81 and 82, a metal layer 82 as an electrical conductive member, and an additional metal layer E90. The additional metal layer E90 is provided additionally to the wiring member E80. The additional metal layer E90 is made of, for example, stainless steel. The additional metal layer E90 is bonded to the resin layer 83. The additional metal layer E90 is located only on the surface of the resin layer 83 and is not attached to the exposed portion of the metal layer 82. The additional metal layer E90 is electrically insulated from the metal layer 82 as a signal path. A resin layer may be provided additionally to cover the additional metal layer E90.

[0132] The added metal layer E90 has rigidity that allows for reversible plastic deformation. As a result, the wiring member E80 is more flexible than the signal terminal 61, but has enough rigidity to maintain its shape under the pressure of the resin member 20 during the molding process. The wiring member E80 suppresses deformation during the molding process. As a result, warping deformation at the first joint 80a or the second joint 80b is suppressed. Suppression of warping deformation suppresses stress that could destabilize or break the joint at the first joint 80a or the second joint 80b. As a result, this embodiment provides a highly reliable semiconductor module 10.

[0133] The wiring member E80 is deformed to curve away from the surface of the semiconductor element 30. In the figure, a comparative example wiring member E80c is shown by a dashed line. The comparative example wiring member E80c is flat. The comparative example wiring member E80c is placed in contact with the surface of the semiconductor element 30. In this case, the comparative example wiring member E80c may undergo dielectric breakdown. The wiring member E80, which has a curved shape away from the surface of the semiconductor element 30, can suppress the possibility of dielectric breakdown. For example, the curved shape of the wiring member E80 allows the resin member 20 to flow into the gap between the wiring member E80 and the surface of the semiconductor element 30. The resin member 20 that flows into the gap suppresses the possibility of dielectric breakdown.

[0134] Embodiment 15 This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member E80 includes an additional metal layer E90 that undergoes plastic deformation. When the wiring member E80 is used, its end face is positioned near the semiconductor element 30. In this case, noise may be generated in the metal layer 82 due to the influence of the large current flowing through the semiconductor element 30. In this embodiment, the additional metal layer E90 is used as a shielding layer against electromagnetic noise.

[0135] In Figure 19, the wiring member 80 is provided by the wiring member E80. The additional metal layer E90 is positioned to overlap with the metal layer 82 for the signal path. The additional metal layer E90 extends over the entire plate-like area of ​​the wiring member E80. The wiring member E80 includes a grounding member F91 that electrically grounds the additional metal layer E90. A non-exclusive example of the grounding member F91 grounds the additional metal layer E90 to the reference potential of the semiconductor element 30. If the semiconductor element 30 has a signal pad 35 at the reference potential, the grounding member F91 grounds the additional metal layer E90 to the signal pad 35 at the reference potential. The reference potential is the Kelvin emitter potential (KE potential) if the SW element is an IGBT, and the Kelvin source potential (KS potential) if the SW element is a MOSFET. The additional metal layer E90 functions as an electromagnetic shielding layer to the metal layer 82. The additional metal layer E90 suppresses noise associated with the metal layer 82 contained in the wiring member E80. As a result, according to this embodiment, a semiconductor module 10 with suppressed noise is provided.

[0136] Embodiment 16 This embodiment is a modification based on a prior embodiment. In the prior embodiment, the bonding process is performed after the bonding member 70 is placed between the signal pad 35 and the metal layer 82, or between the signal terminal 61 and the metal layer 82. In this case, it was difficult to accurately control the volume of the bonding member 70. If the volume of the bonding member 70 is insufficient compared to the appropriate amount, a bonding failure occurs. If the volume of the bonding member 70 is excessive compared to the appropriate amount, unintended bonding may occur. In addition, the placed bonding member 70 may leak before the bonding process. This embodiment makes it possible to reliably and easily control the volume of the bonding member 70 in the first bonding portion 80a and / or the second bonding portion 80b.

[0137] In Figure 20, the wiring member 80 is provided by the wiring member G80. The figure shows an intermediate state in a manufacturing method relating to a third joining step and / or a fourth joining step related to the wiring member G80. The intermediate product 10a is placed and held in a jig G92 used in the manufacturing method. The jig G92 is provided by a holder that can be positioned in a melting furnace for melting the joining member 70, or by a conveyor for transporting the intermediate product 10a. The intermediate product 10a comprises a second heat dissipation member 42 and a semiconductor element 30 joined to the second heat dissipation member 42 by the second joining member 72. Furthermore, the intermediate product 10a comprises a power terminal 51 and a signal terminal 61. The power terminal 51 and the signal terminal 61 are held in the jig G92. The intermediate product 10a further comprises the wiring member G80. The wiring component G80 is positioned and held in place using alignment marks provided on both the wiring component G80 and the semiconductor element 30. The alignment marks can be provided near the signal pad 35 of the semiconductor element 30.

[0138] The wiring member G80 has a first surface G80f facing the semiconductor element 30 and a second surface G80g opposite to the first surface G80f. The wiring member G80 has an opening G80h in the first joint 80a from which the third joint member G73 can be supplied from above in the direction of gravity. The wiring member G80 has an opening G80i in the second joint 80b from which the fourth joint member G74 can be supplied from above in the direction of gravity.

[0139] Figure 21 is a plan view showing the wiring member G80 in this embodiment. The wiring member G80 has an opening G80h and a metal layer 82 exposed to the opening G80h at the first joint 80a. The metal layer 82 has a gap G93 between it and the opening G80h, which serves as a communication portion. A portion of the third joint member G73 supplied from above passes through the gap G93 and joins the metal layer 82 and the signal pad 35. The metal layer 82 has a hole G94 that communicates with the opening G80h and opens on both sides of the metal layer 82, which serves as a communication portion. A portion of the third joint member G73 supplied from above passes through the hole G94 and joins the metal layer 82 and the signal pad 35. As shown, either the gap G93 or the hole G94 may be provided. In either configuration, a communication portion is provided at the opening G80h that connects the front and back sides of the metal layer 82.

[0140] The wiring member G80 has an opening G80i and a metal layer 82 exposed to the opening G80i at the second joint 80b. The metal layer 82 has a gap G93 between it and the opening G80i, which serves as a communication portion. A portion of the fourth joint member G74 supplied from above passes through the gap G93 and joins the metal layer 82 and the signal terminal 61. The metal layer 82 has a hole G94 that communicates with the opening G80i and opens on both sides of the metal layer 82, which serves as a communication portion. A portion of the fourth joint member G74 supplied from above passes through the hole G94 and joins the metal layer 82 and the signal terminal 61. As shown in the figure, either the gap G93 or the hole G94 may be provided. In either configuration, a communication portion is provided at the opening G80i that connects the front and back sides of the metal layer 82.

[0141] Returning to Figure 20, in the joining process, the supply of the third joining member G73 from above in the direction of gravity can be carried out by a manufacturing method in which the molten fourth joining member G74 is dropped. After being dropped, the third joining member G73 flows through the communication portion between the metal layer 82 and the signal pad 35, joining them and hardening. In the joining process, the supply of the fourth joining member G74 from above in the direction of gravity can be carried out by a manufacturing method in which the molten fourth joining member G74 is dropped. After being dropped, the fourth joining member G74 flows through the communication portion between the metal layer 82 and the signal terminal 61, joining them and hardening.

[0142] The joining process may include a supply process and a heating process. In the supply process, a paste-like or solid third joining member G73 is supplied from above in the direction of gravity to the opening G80h. In the heating process, the third joining member G73 is melted. As a result, the third joining member G73 flows through the communication section between the metal layer 82 and the signal pad 35, joining them and hardening. In the supply process, a paste-like or solid fourth joining member G74 is supplied from above in the direction of gravity to the opening G80i. In the heating process, the fourth joining member G74 is melted. As a result, the fourth joining member G74 flows through the communication section between the metal layer 82 and the signal terminal 61, joining them and hardening.

[0143] According to this embodiment, the third joining member G73 or the fourth joining member G74 can be supplied to the opening G80h or opening G80i from above in the direction of gravity. This makes volume control easier.

[0144] Embodiment 17 This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member 80 is joined by a joining member 70 that has been melted and then hardened. Instead, this embodiment employs a contact-type welding method as the joining means.

[0145] In Figure 22, the wiring member 80 is provided by the wiring member H80. The intermediate product 10a is mounted and held in a jig H92 used in the manufacturing method. The jig H92 is provided by a holder suitable for welding the metal layer 82 of the wiring member H80 to the signal pad 35 and the signal terminal 61, or by a conveyor for transporting the intermediate product 10a. The welding of the metal layer 82 is performed by welding fixtures H73 and H74. Welding fixtures H73 and H74 are welding fixtures that involve physical contact. If the welding is ultrasonic welding, welding fixtures H73 and H74 are provided by an ultrasonic oscillator and a horn. Ultrasonic welding welds the metal layer 82 to the signal pad 35. Ultrasonic welding welds the metal layer 82 to the signal terminal 61. If the welding is electric welding, welding fixtures H73 and H74 are provided by welding electrodes. The jig H92 provides a current path for carrying the welding current. Electric welding is performed to weld the metal layer 82 to the signal pad 35. Electric welding is also performed to weld the metal layer 82 to the signal terminal 61.

[0146] Embodiment 18 This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member 80 is joined by a joining member 70 that has been melted and then hardened. Instead, this embodiment employs a non-contact welding method as the joining means.

[0147] In Figure 23, the wiring member 80 is provided by the wiring member I80. The intermediate product 10a is placed and held in a fixture I92 used in the manufacturing method. The fixture I92 is provided by a holder suitable for welding the metal layer 82 of the wiring member I80 to the signal pad 35 and the signal terminal 61, or by a conveyor for transporting the intermediate product 10a. The welding of the metal layer 82 is performed by supplying high energy from welding fixtures I73 and I74. Welding fixtures I73 and I74 are non-contact welding fixtures that do not involve physical contact. If the welding is laser welding, welding fixtures I73 and I74 are provided by a laser oscillator and a laser guide. Laser welding welds the metal layer 82 to the signal pad 35. Laser welding welds the metal layer 82 to the signal terminal 61.

[0148] 19th Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the semiconductor element 30 may be joined only by the bonding member 70. The bonding member 70 is a material that hardens after melting. As a result, the semiconductor element 30 may be fixed in an inclined state. The inclination of the semiconductor element 30 raises concerns about a decrease in electrical insulation or a decrease in heat transfer. This embodiment provides a semiconductor module 10 with the desired electrical characteristics by suppressing the inclination of the semiconductor element 30 with respect to the heat dissipation member 40.

[0149] In Figure 24, a tilt suppression member J76 is placed inside the bonding member 70 between the semiconductor element 30 and the heat dissipation member 40 to suppress the tilting of the semiconductor element 30. The tilt suppression member J76 can be provided by a metal ball or the like having high electrical conductivity and high thermal conductivity. The metal ball can be made of copper, nickel, or the like. These metal balls do not hinder the melting and hardening of the bonding member 70. In the illustrated example, the tilt suppression member J76 is provided in the first bonding member 71, the second bonding member 72, the third bonding member 73, and the fourth bonding member 74. From the viewpoint of suppressing the tilting of the semiconductor element 30, it is preferable that the tilt suppression member J76 be provided in the first bonding member 71 and / or the second bonding member 72. Since the tilt suppression member J76 adjusts the thickness of the bonding member 70 to a predetermined range, it can also be called a thickness setting member.

[0150] An unspecified example of the tilt suppression member J76 is provided by a metal ball as described in this embodiment. An unspecified example of the tilt suppression member J76 can be provided by a wiring member 80 disposed on the outside of the semiconductor element 30. In this case, the wiring member 80 may include a frame-like portion surrounding the semiconductor element 30. An unspecified example of the tilt suppression member J76 can be provided by a protrusion partially projecting from the heat dissipation member 40 toward the semiconductor element 30. In this case, the heat dissipation member 40 may include a plurality of protrusions. The tilt suppression member J76 can be provided, for example, by stud bonding projecting from the heat dissipation member 40 toward the semiconductor element 30. An unspecified example of the tilt suppression member J76 can be provided by a groove provided on the heat dissipation member 40 corresponding to the outer periphery of the semiconductor element 30. An unspecified example of the tilt suppression member J76 can be provided by an insulating film disposed on the surface of the heat dissipation member 40 facing the semiconductor element 30.

[0151] The wiring member 80 shown in Figure 9 or Figure 14 is also effective as a tilt suppression member J76. In these examples, the wiring member 80 is positioned to surround the semiconductor element 30, thereby defining the thickness of the bonding member 70. Therefore, the wiring member 80 in these examples acts as a tilt suppression member J76.

[0152] 20th Embodiment This embodiment is a modification based on a prior embodiment. This embodiment shows an example of a tilt suppression member.

[0153] In Figure 25, the semiconductor element 30 is provided with a tilt suppression member K76 on at least one surface. The tilt suppression member K76 suppresses the tilt of the semiconductor element 30 relative to the heat dissipation member 40. The tilt suppression member K76 is provided by stud bonding formed on at least one surface of the semiconductor element 30. The stud bonding provides conductive protrusions on the surface of the semiconductor element 30. Stud bonding is sometimes also called stud bumps. Stud bonding is made of metal such as gold, copper, or aluminum.

[0154] In the illustrated example, the semiconductor element 30 is provided with a plurality of tilt suppression members K76 on both of its surfaces. On one surface, the tilt suppression members K76 are formed to be located within the first bonding member 71. The tilt suppression members K76 are provided by a plurality of stud bondings formed, for example, within the range of the power pad 33 and protruding from the semiconductor element 30 toward the first heat dissipation member 41. On the other surface, the tilt suppression members K76 are formed to be located within the second bonding member 72. The tilt suppression members K76 are provided by a plurality of stud bondings formed, for example, within the range of the power pad 34 and protruding from the semiconductor element 30 toward the second heat dissipation member 42.

[0155] In the bonding process of the manufacturing method, excessive proximity between the heat dissipation member 40 and parts other than the power pads 33 and 34, such as the sides of the semiconductor element 30, may result in unintended deterioration of the insulation state or even destruction. Excessive proximity is a concern when the thickness of the bonding member 70 in contact with the semiconductor element 30 is partially or entirely smaller than a predetermined minimum thickness.

[0156] According to this embodiment, when the bonding member 70 is in a molten state, the tilt suppression member K76 suppresses the tilt of the semiconductor element 30 relative to the heat dissipation member 40. In another view, the tilt suppression member K76 is also called a thickness defining member that defines the thickness of the bonding member 70. Furthermore, the tilt suppression member K76 is positioned within the bonding member 70. The tilt suppression member K76 is made of a metal that readily conforms to and readily bonds with the molten bonding member 70. Therefore, the tilt suppression member K76 prevents the bonding member 70 from flowing away from the surface of the semiconductor element 30 during the bonding process of the manufacturing method. In other words, the tilt suppression member K76 acts to keep the bonding member 70 above and / or below the surface of the semiconductor element 30. In this view, the tilt suppression member K76 is also called a flow suppression member that suppresses the flow of the bonding member 70.

[0157] In the joining process of the manufacturing method, when the joining member 70 is in a molten state, the tilt suppression member K76 prevents the thickness of the joining member 70 in contact with the semiconductor element 30 from becoming smaller than a predetermined minimum thickness. As a result, the tilting of the semiconductor element 30 is suppressed. In other words, the situation in which parts of the semiconductor element 30 other than the power pads 33 and 34, such as the sides, come too close to the heat dissipation member 40 is suppressed.

[0158] 21st Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member 80 electrically connects the signal pad 35 and the signal terminal 61 of the semiconductor element 30. In the manufacturing method, the wiring member 80 may be positioned relative to the signal pad 35. In this case, due to misalignment, dimensional errors, etc., of the semiconductor element 30, the signal terminal 61, and the wiring member 80, the signal terminal 61 and the wiring member 80 may not be positioned in the intended positional relationship. The reverse case is also conceivable. In the manufacturing method, the wiring member 80 may be positioned relative to the signal terminal 61. In this case, due to misalignment, dimensional errors, etc., of the semiconductor element 30, the signal terminal 61, and the wiring member 80, the signal pad 35 and the wiring member 80 may not be positioned in the intended positional relationship. This problem is particularly pronounced when multiple signal pads 35 are arranged with a relatively small pad pitch. In this embodiment, the opening L80h in the first joint 80a is formed to be smaller than the opening L80i in the second joint 80b. This shape allows for a relatively small pad pitch while tolerating misalignment and dimensional errors of the components. As a result, a semiconductor module 10 is provided that allows for the formation of electrical connections by the wiring member 80 while tolerating error components, including misalignment and dimensional errors of the components.

[0159] In FIG. 26, this embodiment is a modified example based on the embodiment of FIG. 6. The wiring member 80 is provided by the wiring member L80. The wiring member L80 includes an opening L80h for joining the signal pads 35a and 35b and the metal layer 82. The wiring member L80 includes an opening L80i for joining the signal terminal 61 and the metal layer 82. The openings L80h and L80i are window portions provided in the resin layers 81 and 83, exposing a part of the metal layer 82. The openings L80h and L80i are provided as holes. The openings L80h and L80i may be provided as cutouts. The area Ah of the opening L80h is smaller than the area Ai of the opening L80i (Ah < Ai). The difference between the area Ah and the area Ai allows for error components of a plurality of components in the joining process and enables joining at the second joining portion 80b. Here, the shape of the opening L80i is set according to the error components. For example, when the error components include many error components in the Y direction, the shape of the opening L80i is set to a shape having a longitudinal direction in the Y direction. Also, for example, when the error components include many error components in the Z direction, the shape of the opening L80i is set to a shape having a longitudinal direction in the Z direction. Note that as error components, component misalignment in the placement process and / or component dimensional errors in the preparation process can be assumed.

[0160] The placement step in the manufacturing method is performed so that the first joint portion 80a aligns with the multiple signal pads 35a and 35b. That is, the placement step is performed so that the opening L80h of the wiring member L80 is precisely positioned relative to the signal pads 35a and 35b. As a result, when the joining step is performed after the placement step, multiple signal pads 35a and 35b and multiple metal layers 82 can be joined together, even if the pad pitch is small. Furthermore, in the placement step, the second joint portion 80b is positioned near the multiple signal terminals 61. At this time, the second joint portion 80b, which has a relatively large opening L80i, is positioned to align with the multiple signal terminals 61, even with error components. At this time, the large opening L80i allows for error components and positions the multiple signal terminals 61 and the multiple metal layers 82 in a positional relationship that allows them to be joined together. For example, a single signal terminal 61 is positioned within the range of the opening L80i. As a result, when the bonding process is performed after the placement process, even if there are error components, these error components are tolerated, and multiple bonding portions are formed between each of the multiple signal terminals 61 and each of the multiple metal layers 82.

[0161] According to this embodiment, even with error components, the wiring member L80 can provide multiple electrical connections between the multiple signal pads 35a and 35b and the multiple signal terminals 61. In particular, this embodiment can perform the joining of the multiple signal pads 35a and 35b with high positional accuracy, even when the multiple signal pads 35a and 35b have a small pad pitch. This configuration is effective, for example, when the active region of the semiconductor element 30 as an element is relatively increased by a small pad pitch.

[0162] 22nd Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member 80 includes a metal layer 82 for electrical connection. The wiring member 80 may deform flexibly during the arrangement process, the joining process, and the molding process. On the other hand, if the wiring member 80 deforms excessively, it may result in an unintended decrease in electrical insulation. From another perspective, if the amount of deformation of the wiring member 80 is less than the intended amount of deformation, there is a concern that desirable electrical characteristics may not be obtained. This embodiment imparts appropriate rigidity to the wiring member 80. This suppresses excessive deformation of the wiring member 80. From another perspective, this embodiment imparts different rigidity to different parts of the wiring member 80. This makes it possible to induce desirable deformation in one part of the wiring member 80 while suppressing deformation in other parts.

[0163] In Figure 27, the wiring member 80 is provided by a wiring member M80. The wiring member M80 includes a metal layer 82 for electrical connection. Furthermore, the wiring member M80 includes additional metal layers M95 and M96 on one side of the metal layer 82, on both sides of the metal layer 82, or between multiple metal layers 82. The additional metal layers M95 and M96 increase the rigidity of the wiring member M80 compared to a wiring member 80 that does not have them.

[0164] The wiring member M80 may have an additional metal layer on only a portion of it, and not on the rest. As a non-limiting example, an additional metal layer M95 is shown. The additional metal layer M95 is placed only at the first joint 80a and / or the second joint 80b. In this case, the additional metal layer M95 adjusts the rigidity of the wiring member M80 at the first joint 80a and / or the second joint 80b to be higher than the rigidity of the wiring member M80 in the other parts. The high rigidity of the wiring member M80 only at the first joint 80a and / or the second joint 80b improves the accuracy of positioning during the placement process at the first joint 80a and / or the second joint 80b. Furthermore, the high rigidity of the wiring member M80 only at the first joint 80a and / or the second joint 80b improves the reliability of the joining process. As a result, the high rigidity of the wiring member M80 in the first joint 80a and / or the second joint 80b improves the reliability of the joint and enhances the reliability of the semiconductor module 10.

[0165] The wiring member M80 may have an additional metal layer parallel to the metal layer 82. As a non-limiting example, an additional metal layer M96 is shown. The additional metal layer M96 adjusts the rigidity of the wiring member M80 to be high over the entire area between the first joint 80a and the second joint 80b.

[0166] In one aspect, this embodiment provides a wiring member M80 with desirable rigidity. In another aspect, this embodiment provides a wiring member M80 with partially different rigidity. These configurations allow for the planned setting of the deformation of the wiring member M80. As a result, this embodiment provides a highly reliable semiconductor module 10 associated with the wiring member M80.

[0167] 23rd Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the wiring member 80 comprises a plurality of metal layers 82 arranged at equal intervals from each other. The shape of the plurality of metal layers 82 in the wiring member 80 affects the inductance component in the signal path. The wiring member N80 of this embodiment comprises signal lines N82g and N82s arranged in close proximity to suppress the inductance component. This embodiment provides a semiconductor module 10 capable of increasing the switching speed.

[0168] In Figure 28, the wiring member 80 is provided by the wiring member N80. The wiring member N80 comprises a plurality of metal layers 82. The plurality of metal layers 82 include a metal layer 82 that provides a drive signal line N82g and a metal layer 82 that provides a reference potential signal line N82s. When the semiconductor device 30 provides a MOSFET, the drive signal line N82g is the gate line. In this case, the reference potential signal line N82s is the source line. When the semiconductor device 30 provides an IGBT, the drive signal line N82g is the base line. In this case, the reference potential signal line N82s is the emitter line. When aiming to increase the switching speed of the semiconductor device 30, the inductance of the loop circuit including the drive signal line and the reference potential signal line hinders the speed increase. In particular, in the case of a SiC semiconductor device 30 where high speed is expected, suppressing the inductance in the signal path is an important issue.

[0169] Multiple metal layers 82 are arranged at the first joint 80a to provide the pad pitch Pp of multiple signal pads. Multiple metal layers 82 are arranged at the second joint 80b to provide the terminal pitch Pi of multiple signal terminals 61. Furthermore, the drive signal line N82g and the reference potential signal line N82s are arranged between the first joint 80a and the second joint 80b to form an inter-line pitch Pn. The inter-line pitch Pn is smaller than the terminal pitch Pi (Pi > Pn). The inter-line pitch Pn is smaller than the pad pitch Pp (Pp > Pn). At least one of the drive signal line N82g and the reference potential signal line N82s is arranged in a detour in the YZ plane so as to move closer to the other to form an inter-line pitch Pn. In this embodiment, both the drive signal line N82g and the reference potential signal line N82s are arranged in a detour so as to move closer to each other. Both the drive signal line N82g and the reference potential signal line N82s are arranged symmetrically with respect to an intermediate line CTL located midway between the two signal lines. The detour arrangement is provided by a shape that includes an oblique section extending diagonally near the first junction 80a, a linear section extending linearly between the first junction 80a and the second junction 80b, and an oblique section extending diagonally near the second junction 80b.

[0170] In this embodiment, the line pitch Pn increases the mutual inductance M between the drive signal line N82g and the reference potential signal line N82s. The mutual inductance M is greater than when the line pitch is equal to the terminal pitch Pi or pad pitch Pp. This reduces the inductance component of the loop circuit formed by the drive signal line N82g and the reference potential signal line N82s.

[0171] Furthermore, the drive signal line N82g and the reference potential signal line N82s are provided by a metal layer 82 fixed by resin layers 81 and 83. Therefore, the distance between the drive signal line N82g and the reference potential signal line N82s is less prone to fluctuation compared to wire bonding. As a result, the inductance of the signal lines is stable, and consequently, the SW element provided by the semiconductor element 30 can operate stably at high speed.

[0172] 24th Embodiment This embodiment is a modification based on the preceding embodiment. In the preceding embodiment, the drive signal line N82g and the reference potential signal line N82s only suppress the inductance of the loop circuit by increasing the mutual inductance M. In this embodiment, the drive signal line N82g and the reference potential signal line N82s are further provided by a laminate of multiple metal layers that are electrically connected in parallel, in order to further reduce the inductance of the loop circuit. This embodiment also provides a semiconductor module 10 that is capable of increasing the switching speed.

[0173] In Figure 29, the wiring member 80 is provided by the wiring member o80. The drive signal line o82g and the reference potential signal line o82s are provided by a laminate of multiple metal layers electrically connected in parallel. Each of the drive signal line N82g and the reference potential signal line N82s includes multiple metal layers 82 arranged in a stack with respect to the thickness direction X of the wiring member 80. The multiple metal layers 82 are connected in parallel at the first joint 80a and the second joint 80b. The illustration shows three metal layers 82 as a non-limiting example. For example, the drive signal line o82g is provided by a laminate of metal layer o82p, metal layer o82q, and metal layer o82r. The multiple metal layers o82p, o82q, and o82r are stacked at a distance Gp by insulating layers provided by resin layers 81 and 83. Similarly, the reference potential signal line o82s is also provided by a laminate of three metal layers. Furthermore, in this embodiment, a laminate of multiple metal layers providing the drive signal line o82g and a laminate of multiple metal layers providing the reference potential signal line o82s are arranged to form an inter-line pitch Pn with respect to each other.

[0174] This embodiment makes it possible to suppress the inductance of the loop circuit. One configuration for suppressing inductance is to bring the drive signal line o82g and the reference potential signal line o82s close together by a line pitch Pn. This increases the mutual inductance between the drive signal line o82g and the reference potential signal line o82s, thereby suppressing the inductance of the loop circuit. Another configuration for suppressing inductance is to provide the drive signal line o82g and the reference potential signal line o82s, respectively, with a laminate of multiple metal layers that are electrically parallel. This suppresses both the inductance of the drive signal line o82g and the inductance of the reference potential signal line o82s. As a result, in this embodiment, the SW element provided by the semiconductor element 30 can be operated at high speed.

[0175] In this embodiment, the drive signal line o82g and the reference potential signal line o82s may be arranged without being close together. In this case as well, the laminated metal layers suppress the inductance.

[0176] 25th Embodiment This embodiment is a modification based on the preceding embodiment. In the embodiment shown in Figure 9, the recess 686 has the thickness of at least one resin layer. In this embodiment, the wiring member P80 is formed by a single resin layer 81. The wiring member P80 demarcates the recess 86 by only a portion of the resin layer 81. The recess 86 includes a recess P86a and a recess P86b. In this embodiment as well, the recesses P86a and P86b allow the intrusion of excess bonding member 70 during the bonding process. As a result, a semiconductor module 10 is provided in which performance degradation due to excess bonding member 70 is suppressed.

[0177] In Figure 30, the semiconductor module 10 includes a wiring member P80. The wiring member P80 is provided by a metal layer 82 that electrically connects the signal pad 35 and the signal terminal 61. The wiring member P80 is formed by a single resin layer 81. The resin layer 81 defines an opening P85 for the first bonding member 71. The opening P85 functions as a molded wall that defines the shape of the first bonding member 71 in a fluid state during the bonding process and defines the shape of the first bonding member 71 when it hardens again. The first bonding member 71 is polygonal prism-shaped.

[0178] The resin layer 81 has a recess P86a that opens to the opening P85 and communicates with the opening P85. The resin layer 81 also has a recess P86b that opens to the opening P85 and communicates with the opening P85. The recesses P86a and P86b open at different positions toward the opening P85. The recesses P86a and P86b are positioned to open opposite each other.

[0179] Figure 31 is a partial cross-sectional view taken along the line XXXI-XXXI in Figure 30, with the resin member 20 removed. The opening P85 partitioned by the wiring member P80 is polygonal prism-shaped. In the illustrated example, the opening P85 is partitioned in a way that could be described as a quadrilateral prism-shaped or quadrilateral prism-shaped. The recesses P86a and P86b are located on different wall surfaces among the multiple wall surfaces that partition the opening P85. At least one of the recesses P86a and 86b opens over almost the entire width in the Y direction (width direction) of the wall surface that partitions the opening P85. Alternatively, at least one of the recesses P86a and 86b may open over only a portion of the entire width of the wall surface that partitions the opening P85. The recesses P86a and 86b are formed in a groove-like shape with a longitudinal direction in the Y direction by extending elongated only in the Y direction.

[0180] Recesses P86a and P86b surround the opening P85 and are located on wall surfaces that face each other. Recesses P86a and P86b can be formed on at least one of the multiple wall surfaces that demarcate the opening P85. Furthermore, recesses P86a and P86b may open in a continuous groove shape that surrounds the opening P85.

[0181] The manufacturing method for the semiconductor module 10 includes a placement step in which the semiconductor element 30, the wiring member P80, and the first heat dissipation member 41 are arranged in a stacked manner. In the placement step, the first bonding member 71 is placed in the opening P85. Furthermore, the manufacturing method for the semiconductor module 10 includes a bonding step after the placement step in which the semiconductor element 30 and the first heat dissipation member 41 are bonded by melting the first bonding member 71 and then hardening it again. In the bonding step, the opening P85 is shaped to the form of the first bonding member 71. If the amount of first bonding member 71 is appropriate in the bonding step, the first bonding member 71 will bond the semiconductor element 30 and the first heat dissipation member 41 without flowing into the recesses P86a and P86b. On the other hand, if an excessive amount of first bonding member 71 is placed, the molten first bonding member 71 in the bonding step will be pushed out toward the recesses P86a and P86b and flow into the recesses P86a and P86b.

[0182] Furthermore, in this embodiment, the wiring member P80 defines the distance and parallelism between the semiconductor element 30 and the first heat dissipation member 41. This suppresses unintended tilting of the semiconductor element 30 relative to the first heat dissipation member 41. The wiring member P80 enables highly accurate control of the distance and parallelism of the semiconductor element 30 relative to the first heat dissipation member 41. As a result, good electrical connections can be provided in the power pad 33 and the signal pad 35.

[0183] According to this embodiment, performance degradation of the semiconductor module 10 caused by an excessive amount of the first bonding member 71 is suppressed. As a result, a semiconductor module 10 is provided in which performance degradation caused by an excessive amount of the first bonding member 71 is suppressed.

[0184] 26th Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the recesses P86a and P86b are groove-shaped and elongated in the Y direction. The recess 86 can be provided in a variety of shapes. In this embodiment, the recess 86 is provided by a recess Q86. The recess Q86 includes two grooves having longitudinal directions in both the Y direction (width direction) and the X direction (thickness direction). This embodiment shows a non-limiting example of the opening shape of the recess. The recess can have a variety of opening shapes, such as circular, polygonal, and the cross shape shown.

[0185] In Figure 32, the wiring member 80 is provided by the wiring member Q80. The wiring member Q80 is positioned between the semiconductor element 30 and the first heat dissipation member 41 so as to overlap them. The wiring member Q80 defines an opening Q85 for housing the first bonding member 71. Furthermore, the wiring member Q80 has a recess Q86 on the wall surface of the opening Q85.

[0186] Figure 33 shows a cross-section along the line XXXIII-XXXIII in Figure 32. The recess Q86 has a horizontal groove portion that extends elongated in the Y direction and a vertical groove portion that extends elongated in the X direction. Note that the terms vertical and horizontal are for convenience only and do not indicate the installation state of the semiconductor module 10. The horizontal groove portion is a groove with a longitudinal direction in the Y direction and communicates with the opening Q85 through an elongated opening. The vertical groove portion is a groove with a longitudinal direction in the X direction and communicates with the opening Q85 through an elongated opening. The horizontal groove portion and the vertical groove portion intersect. The horizontal groove portion and the vertical groove portion communicate with each other in their respective groove portions.

[0187] 27th Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the recess Q86 extends straight in the principal direction away from the opening, i.e., in the depth direction. In this embodiment, the recess 86 is provided by a recess R86. The recess R86 also extends in a secondary direction intersecting the principal direction away from the opening R85. It includes two grooves having longitudinal directions in both the Y direction (width direction) and the X direction (thickness direction). This embodiment shows a non-limiting example of the internal shape of the recess. The recess can have an internal shape with various branching parts such as F-shape, T-shape, or cross-shape, or an internal shape with various curves such as J-shape or L-shape.

[0188] In Figure 34, the wiring member 80 is provided by the wiring member R80. The wiring member R80 defines the opening R85 for the first joining member 71. The wiring member R80 has a recess R86. The recess R86 opens into the inner wall surface of the opening R85. The recess R86 extends away from the opening R85. The direction away from the opening R85 can also be called the depth direction of the recess R86. Furthermore, the recess R86 has branch portions that branch off from the depth direction at positions away from the opening R85. The recess R86 may comprise one or more branch portions. The branch portions may include an upward branch that extends upward in the direction of gravity with respect to the orientation in the joining process. In this case, the upward branch may be suitable for the purpose of accumulating gaseous components. The gaseous components accumulated in the upward branch may regulate the pressure within the recess R86 and regulate the inflow of the joining member 70 into the recess R86. The branch portion may include a downward branch that extends downward in the direction of gravity with respect to the orientation during the joining process. In this case, the downward branch may be suitable for quickly accumulating the joining member 70 in a flowing state. The downward branch may accumulate the joining member 70 in the early stages of the joining process and limit the amount of joining member 70 that flows into the recess R86 in the later stages of the joining process.

[0189] 28th Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the amount of bonding member placed in the opening during the arrangement process may be less than the appropriate amount. In this case, the bonding member after the bonding process may contain voids. Voids may cause current concentration, heat concentration, reduced heat transfer, reduced mechanical strength of the bonding member, and stress concentration in the bonding member. These defects caused by voids may also affect the performance of the semiconductor module 10. This embodiment suppresses defects caused by insufficient bonding member. In this embodiment, the recess 86 is provided by recess S86.

[0190] In Figure 35, the wiring member S80 defines an opening S85 for the first bonding member 71. The wiring member S80 has a recess S86. The recess S86 houses a pre-bonding member S79. The pre-bonding member S79 is used to bond the semiconductor element 30 and the first heat dissipation member 41 when the main first bonding member 71 is insufficient in quantity. The pre-bonding member S79 is a bonding member provided in advance to supplement any shortage of the main first bonding member 71. In the bonding process of the manufacturing method, the pre-bonding member S79 may mix with the first bonding member 71 to form a continuous bonding member 70. In this case, the pre-bonding member S79 does not remain in the recess S86 in the finished semiconductor module 10. Rarely, the pre-bonding member S79 may remain in the recess S86 in the finished semiconductor module 10. The illustrated example shows the case where the pre-bonding member S79 remains. Alternatively, the illustrated example may be interpreted as showing a pre-joining member S79 before melting in the joining process.

[0191] The pre-joining member S79 is placed in the recess S86 before the joining process in the manufacturing method. In a typical example, the pre-joining member S79 is placed in the recess S86 during the preparation process. The pre-joining member S79 is placed before the joining process so as not to completely fill the recess S86. The pre-joining member S79 is placed before the joining process so as to leave a cavity inside the recess S86. The cavity is used to accommodate excess material if the first joining member 71 is in excess. The pre-joining member S79 is also called a preform joining member. If the joining member 70 is solder, the pre-joining member S79 is also called a preform solder.

[0192] In the preparation or placement step of the manufacturing method, the preliminary joining member S79 is positioned in the recess S86. In the placement step, the preliminary joining member S79 is positioned so as to face the first joining member 71 before melting through the recess S86. In this state, the preliminary joining member S79 and the first joining member 71 are separate blocks of the joining member 70.

[0193] In the first half of the joining process, the pre-joining member S79 and the first joining member 71 are heated and transition to a molten state. The molten pre-joining member S79 can flow within the recess S86. Simultaneously, the first joining member 71 flows into the recess S86 and can flow within it. When the flowing pre-joining member S79 and the flowing first joining member 71 meet, they mix together and transition to a continuous state. In the second half of the joining process, when the pre-joining member S79 and the first joining member 71 are cooled, they harden again.

[0194] In the bonding process, if the amount of the first bonding member 71 is less than the appropriate amount, the reserve bonding member S79 compensates for the shortage of the first bonding member 71. As a result, a good bonding state is formed between the semiconductor element 30 and the first heat dissipation member 41. On the other hand, if there is an excess of the first bonding member 71, the excess portion flows into the recess S86. As a result, a good bonding state is formed between the semiconductor element 30 and the first heat dissipation member 41. Thus, according to this embodiment, a good bonding state can be formed whether there is an excess or a shortage of the first bonding member 71.

[0195] 29th Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the recess 86 is provided to open into an opening that accommodates the first joining member 71. The recess 86 can be provided in various positions to absorb the excess amount of the joining member 70. This embodiment shows a non-limiting example of the position in which the recess is provided. The recess 86 includes a recess T86a that opens into an opening that accommodates the third joining member 73.

[0196] In Figure 36, the wiring member 80 is provided by a wiring member T80. The wiring member T80 includes a recess T86. The recess T86 is open to communicate with an opening T85 that accommodates the first joining member 71. Furthermore, the wiring member T80 includes a recess T86a. The recess T86a is open to communicate with an opening that accommodates the third joining member 73. The opening that accommodates the third joining member 73 is provided by the first joining portion 80a, or by a window portion formed in the resin layer 81 to form the first joining portion 80a. The recess T86a can accommodate the excess amount of the third joining member 73.

[0197] 30th Embodiment This embodiment is a modification based on the preceding embodiment. In the preceding embodiment, the resin member 20 completely encloses the wiring member 80, which is positioned between the signal pad 35 and the signal terminal 61 of the semiconductor element 30. In other words, at least a portion of the signal terminal 61 is contained within the resin member 20. Alternatively, a portion of the wiring member 80 may extend from the resin member 20.

[0198] In Figure 37, the wiring member 80 is provided by the wiring member U80. The wiring member U80 extends from the resin member 20. At the second joint 80b, the wiring member U80 is joined to the signal terminal U61 by the fourth joint member 74. The signal terminal U61 is a terminal that provides a signal path. The signal terminal U61 can be provided, for example, by a terminal provided on a printed circuit board, a land on a printed circuit board, or an insulated wire connected to a printed circuit board.

[0199] 31st Embodiment This embodiment is a modification based on a prior embodiment. In the prior embodiment, the signal terminal 61 and the wiring member 80 are arranged parallel to the semiconductor element 30 so as to partially overlap. Therefore, the signal terminal 61 extends parallel to the YZ plane. Alternatively, the signal terminal 61 may be arranged parallel to the XY plane. In this case, the flexibility of the wiring member 80 can be used to bend the direction of the signal path inside the resin member 20.

[0200] In Figure 38, the wiring member 80 is provided by a wiring member V80. The wiring member V80 has a nearly right-angle bend V98 within the resin member 20. The semiconductor module 10 includes a plurality of signal terminals 61. The plurality of signal terminals 61 extend from the resin member 20 parallel to the XY plane. The plurality of signal terminals 61 extend parallel to the X direction. The plurality of signal terminals 61 are arranged in a row along the Y direction. The wiring member 80 is positioned between the plurality of signal pads 35 and the plurality of signal terminals 61 via the bend V98. In this embodiment, the flexibility of the wiring member V80 can be used to adjust the direction of extension of the signal terminals 61 within the resin member 20.

[0201] Other Embodiments The disclosures in this specification and drawings are not limited to the exemplary embodiments. The disclosures include the exemplary embodiments and variations thereof by those skilled in the art. For example, the disclosures are not limited to combinations of parts and / or elements shown in the embodiments. The disclosures are implementable in a variety of combinations. The disclosures may have additional parts that can be added to the embodiments. The disclosures include those in which parts and / or elements of an embodiment have been omitted. The disclosures include substitutions or combinations of parts and / or elements between one embodiment and another. The scope of the disclosed technical areas is not limited to the descriptions of the embodiments. Some of the scope of the disclosed technical areas are indicated by the claims and should be understood to include all modifications within the meaning and scope equivalent to the claims.

[0202] The disclosures in the specification and drawings are not limited by the claims. The disclosures in the specification and drawings encompass the technical ideas described in the claims and extend to a wider and more diverse range of technical ideas than those described in the claims. Therefore, a variety of technical ideas can be extracted from the disclosures in the specification and drawings without being bound by the claims.

[0203] In the embodiments described in this specification, the semiconductor module 10 has heat dissipation members 40 exposed on both sides of its plate-like outer shape. Alternatively, the heat dissipation members 40 may be placed on only one side of the semiconductor module 10. For example, only the first heat dissipation member 41 or only the second heat dissipation member 42 may be placed. Furthermore, the heat dissipation member 40 serves as both a member responsible for heat dissipation and a member providing a power path. Alternatively, the heat dissipation member 40 may be used solely as a member responsible for heat dissipation, or solely as a member responsible for a power path. For example, the spacer member D77 can be used as a power terminal. [Explanation of symbols]

[0204] 10 semiconductor modules, 20 Resin components, 30 semiconductor devices, 40 Heat dissipation components, 61 signal terminals, 70 Joining members, 80 Wiring components.

Claims

1. A semiconductor element (30) having a signal pad (35) for a signal path and a power pad (33) for a power path for power greater than the power of the signal pad on its first surface, and having another power pad (34) on a second surface opposite to the first surface, A heat dissipation member including a first heat dissipation member (41) and a second heat dissipation member (42) that are thermally bonded to the semiconductor element (30), A resin member (20) that houses the semiconductor element, such that a part of the heat dissipation member is exposed, A metal signal terminal (61) is arranged to be exposed from the resin member, A wiring member (80) is housed in the resin member and is more flexible than the signal terminal, comprising an electrically insulating resin layer and a metal layer supported by the resin layer, the metal layer having a first joint (80a) connected to the signal pad and a second joint (80b) connected to the signal terminal, A first joining member (71) joins the power pad (33) and the first heat dissipation member on the first surface, A second joining member (72) joins the other power pad (34) and the second heat dissipation member on the second surface, In the first joint portion (80a), a third joint member (73) joins the signal pad (35) on the first surface and the metal layer of the wiring member, The first heat dissipation member (41), the semiconductor element (30), the wiring member (80), and the second heat dissipation member (42) are arranged in a stacked manner with respect to the thickness direction. The first heat dissipation member, the semiconductor element, and the wiring member overlap at the first joint. The thickness of the wiring member in the thickness direction is less than or equal to the thickness of the first joining member in the thickness direction. The wiring member is insulated from the metal layer which serves as a signal line, and includes an additional metal layer (E90) for adjusting the rigidity of the wiring member. The additional metal layer (E90) is arranged to overlap with the metal layer and is grounded to the reference potential of the semiconductor element, functioning as an electromagnetic shielding layer for the metal layer in this semiconductor module.

2. A semiconductor element (30) having a signal pad (35) for a signal path and a power pad (33) for a power path for power greater than the power of the signal pad on its first surface, and having another power pad (34) on a second surface opposite to the first surface, A heat dissipation member including a first heat dissipation member (41) and a second heat dissipation member (42) that are thermally bonded to the semiconductor element (30), A resin member (20) that houses the semiconductor element, such that a part of the heat dissipation member is exposed, A metal signal terminal (61) is arranged to be exposed from the resin member, A wiring member (80) is housed in the resin member and is more flexible than the signal terminal, comprising an electrically insulating resin layer and a metal layer supported by the resin layer, the metal layer having a first joint (80a) connected to the signal pad and a second joint (80b) connected to the signal terminal, A first joining member (71) joins the power pad (33) and the first heat dissipation member on the first surface, A second joining member (72) joins the other power pad (34) and the second heat dissipation member on the second surface, In the first joint portion (80a), a third joint member (73) joins the signal pad (35) on the first surface and the metal layer of the wiring member, The first heat dissipation member (41), the semiconductor element (30), the wiring member (80), and the second heat dissipation member (42) are arranged in a stacked manner with respect to the thickness direction. The first heat dissipation member, the semiconductor element, and the wiring member overlap at the first joint. The thickness of the first bonding member on the power pad in the thickness direction and the thickness of the third bonding member on the signal pad in the thickness direction are different from each other. The wiring member is insulated from the metal layer which serves as a signal line, and includes an additional metal layer (E90) for adjusting the rigidity of the wiring member. The additional metal layer (E90) is arranged to overlap with the metal layer and is grounded to the reference potential of the semiconductor element, functioning as an electromagnetic shielding layer for the metal layer in this semiconductor module.

3. The semiconductor module according to claim 1 or claim 2, wherein the thickness of the first bonding member on the power pad in the thickness direction is greater than the thickness of the third bonding member on the signal pad in the thickness direction.

4. The semiconductor module according to any one of claims 1 to 3, wherein the first joining member has a columnar shape with a trapezoidal cross-section.

5. The semiconductor module according to claim 4, wherein the trapezoidal cross-section has a shape in which the length of the power pad of the semiconductor element is longer than the length of the first heat dissipation member.

6. The semiconductor module according to claim 4 or claim 5, wherein the first joining member and the wiring member are separated.

7. The wiring member (80) has the metal layer (82) disposed between the resin layer (81) and the resin layer (83), Furthermore, the semiconductor module according to any one of claims 1 to 6, further comprising a fourth joining member (74) that joins the metal layer of the wiring member and the signal terminal at the second joining portion (80b).

8. The semiconductor element (30) has a plurality of signal pads (35), The semiconductor module according to any one of claims 1 to 7, wherein the plurality of signal pads are arranged in a row along the outer edge of the semiconductor element.

9. Furthermore, it has a plurality of the aforementioned signal terminals (61), The multiple signal terminals are arranged with a terminal pitch (Pi), Multiple signal pads are arranged with a pad pitch (Pp), The semiconductor module according to claim 8, wherein the terminal pitch is larger than the pad pitch.

10. Furthermore, it includes a pair of power terminals, including a power terminal (51) joined to the first heat dissipation member (41), The semiconductor module according to any one of claims 1 to 9, wherein the wiring member (80) is located between the first surface of the semiconductor element and the power terminal.

11. The semiconductor module according to claim 10, wherein the signal terminal and the power terminal extend from the semiconductor element (30) to the opposite side.

12. The first heat dissipation member (41) is An external metal plate (43) that provides a heat dissipation surface, An internal metal plate (45) that provides part of the power path, The system comprises an electrical insulating layer (44) disposed between the outer metal plate and the inner metal plate, The second heat dissipation member (42) is An external metal plate (46) that provides a heat dissipation surface, An internal metal plate (48) that provides part of the power path, A semiconductor module according to any one of claims 1 to 11, comprising an electrical insulating layer (47) disposed between the outer metal plate and the inner metal plate.

13. The semiconductor module according to any one of claims 1 to 12, wherein the semiconductor element comprises a plurality of semiconductor elements, and the plurality of semiconductor elements are connected to the signal terminal by the wiring member.

14. The semiconductor module according to any one of claims 1 to 13, wherein the wiring member has a communication portion (88) through which the resin member penetrates.

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