Dielectric compositions and multilayer ceramic electronic components

Abstract

To provide a dielectric composition that is resistant to cracking and chipping, and a laminated ceramic electronic component containing the dielectric composition.SOLUTION: A dielectric composition includes dielectric particles containing Ca or / and Sr, at least one selected from Ca and Sr, and a segregation phase containing Mn, Si, and O.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a dielectric composition and a multilayer ceramic electronic component containing the dielectric composition. [Background technology]

[0002] As shown in Patent Document 1, multilayer ceramic electronic components having a ceramic layer made of a dielectric composition are known. In these multilayer ceramic electronic components, cracks may occur inside the substrate containing the dielectric composition, or the corners of the substrate may chip. Possible factors causing cracks and chips include bending of the mounting substrate, the difference in the coefficient of thermal expansion between the ceramic layer and the internal electrode layer, or impacts and stresses applied to the substrate from the outside. When cracks or chips occur in the substrate, the properties of the multilayer ceramic electronic component deteriorate, so there is a need to improve the fracture toughness strength of the dielectric composition and suppress the occurrence of cracks and chips. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] International Publication No. 2002 / 000568 [Overview of the project] [Problems that the invention aims to solve]

[0004] This invention has been made in view of the above circumstances, and its objective is to provide a dielectric composition that is less prone to cracking or chipping, and a multilayer ceramic electronic component containing the dielectric composition. [Means for solving the problem]

[0005] To achieve the above objective, the dielectric composition according to the present invention Dielectric particles containing Ca and / or Sr, It comprises at least one selected from Ca and Sr, and a segregated phase containing Mn, Si, and O.

[0006] As a result of intensive studies, the inventors of the present invention have found that a dielectric composition having the above characteristics can obtain high fracture toughness strength and suppress the generation of cracks and chipping.

[0007] Preferably, the dielectric particles contain a perovskite compound represented by ABO3, In the perovskite compound, the A site contains Ca or / and Sr, and the B site contains Zr or / and Ti, The total molar ratio of Ca and Sr to 1 mol of the A site is 0.8 or more, The molar ratio of Zr to 1 mol of the B site is 0.8 or more.

[0008] It is preferable that the content ratios of a predetermined element in the segregation phase and the dielectric particles are controlled within a predetermined range. In the description regarding the content ratios shown below, Ca, Sr, Zr, Mn, Si, Al, Ti, and Hf are specified elements, and the total content of the specified elements in the segregation phase is taken as 100 mol%, and the content ratio of the predetermined element in the segregation phase is shown. Also, taking the total content of the specified elements in the dielectric particles as 100 mol%, the content ratio of the predetermined element in the dielectric particles is shown.

[0009] Preferably, the content ratio of Mn in the segregation phase is 5 mol% or more, and the content ratio of Mn in the dielectric particles is 2 mol% or less. By controlling the content ratio of Mn in the segregation phase and the dielectric particles within the above range, cracks and chipping can be more effectively suppressed, and a high dielectric breakdown voltage can be obtained.

[0010] Preferably, the total content ratio of Ca and Sr in the segregation phase is 60 mol% or more.

[0011] Preferably, the content ratio of Si in the segregation phase is 20 mol% or more.

[0012] Preferably, the content ratio of the segregation phase is 0.05 pieces / μm2 More than 0.5 pieces / μm 2 The following is true: By controlling the segregation phase content within the above range, cracks and chipping can be suppressed more effectively, and a high dielectric breakdown voltage can be obtained.

[0013] Preferably, the average particle size of the segregated phase is 0.05 μm or more and 1.00 μm or less. By controlling the average particle size of the segregated phase within the above range, cracks and chipping can be suppressed more effectively, and a high dielectric breakdown voltage can be obtained.

[0014] The multilayer ceramic electronic component containing the dielectric composition of the present invention described above exhibits high durability against external stress and impact. In other words, the multilayer ceramic electronic component of the present invention can sufficiently suppress the occurrence of defects such as cracks and fractures in the base material. [Brief explanation of the drawing]

[0015] [Figure 1] Figure 1 is a schematic diagram showing a cross-section of a multilayer ceramic capacitor according to one embodiment of the present invention. [Figure 2] Figure 2 is an enlarged cross-sectional view of the ceramic layer 10 shown in Figure 1. [Modes for carrying out the invention]

[0016] In this embodiment, a multilayer ceramic capacitor 2 shown in Figure 1 will be described as an example of a ceramic electronic component according to the present invention. The multilayer ceramic capacitor 2 has an element body 4 and a pair of external electrodes 6 formed on the outer surface of the element body 4.

[0017] The shape of the element body 4 shown in Figure 1 is typically a roughly rectangular parallelepiped, having two opposing end faces 4a in the X-axis direction, two opposing side faces 4b in the Y-axis direction, and two opposing side faces 4b in the Z-axis direction. However, the shape of the element body 4 is not particularly limited and may be elliptical, cylindrical, or other prismatic shapes. Furthermore, the external dimensions of the element body 4 are not particularly limited; for example, the length L0 in the X-axis direction can be 0.4 mm to 5.7 mm, the width W0 in the Y-axis direction can be 0.2 mm to 5.0 mm, and the height T0 in the Z-axis direction can be 0.2 mm to 3.0 mm. In this embodiment, the X-axis, Y-axis, and Z-axis are perpendicular to each other.

[0018] The element body 4 has a ceramic layer 10 and an internal electrode layer 12 that are substantially parallel to a plane including the X and Y axes, and inside the element body 4, the ceramic layer 10 and the internal electrode layer 12 are stacked alternately along the Z axis. Here, "substantially parallel" means that most of the parts are parallel, but there may be some parts that are not parallel, and the ceramic layer 10 and the internal electrode layer 12 may have some irregularities or be tilted.

[0019] The ceramic layer 10 is composed of a dielectric composition described later. The average thickness per layer of the ceramic layer 10 (interlayer thickness) is not particularly limited and can be, for example, 100 μm or less, preferably 30 μm or less. The number of layers of the ceramic layer 10 can be determined according to the desired characteristics and is not particularly limited. For example, it can be 20 layers or more, more preferably 50 layers or more.

[0020] On the other hand, the internal electrode layer 12 is laminated between each ceramic layer 10, and the number of layers is determined according to the number of ceramic layers 10. The average thickness of each layer of the internal electrode layer 12 is not particularly limited and can be, for example, 3.0 μm or less. The average thickness of the ceramic layer 10 and the average thickness of the internal electrode layer 12 can be calculated by observing the cross-section as shown in Figure 1 using a metallurgical microscope and measuring the thickness of each layer (10, 12) at at least five locations.

[0021] Furthermore, the internal electrode layers 12 are stacked such that one end of each layer alternately exposes two opposing end faces 4a of the element body 4 in the X-axis direction. A pair of external electrodes 6 are formed on one end face 4a of the element body 4 and are electrically connected to the exposed ends of the alternately arranged internal electrode layers 12. By forming the internal electrode layers 12 and external electrodes 6 in this way, a capacitor circuit is formed by the external electrodes 6 and the internal electrode layers 12. That is, the ceramic layer 10 located within the capacitance region is sandwiched between internal electrode layers 12 with different polarities, and a voltage can be applied to the ceramic layer 10.

[0022] The internal electrode layer 12 is made of a conductive material, preferably containing Ni as the main component. Specifically, the conductive material of the internal electrode layer 12 is preferably pure Ni or a Ni-based alloy containing 85 wt% or more Ni, and the Ni-based alloy may contain one or more elements selected from Mn, Cu, Cr, etc. In addition to the conductive material mentioned above, the internal electrode layer 12 may also contain particles of a perovskite-type compound having a composition similar to that of the main component of the ceramic layer 10 as a co-material. Furthermore, the internal electrode layer 12 may contain trace amounts of nonmetallic components such as S and P (for example, about 0.1 mass% or less), and may also contain voids. When co-materials or voids are included in the internal electrode layer 12, discontinuous portions where electrodes (conductive material) are absent may be formed in the internal electrode layer 12.

[0023] The pair of external electrodes 6 may include a baked electrode layer, a resin electrode layer, a plated electrode layer, etc., and may consist of a single electrode layer or multiple electrode layers stacked together. For example, the external electrode 6 can have a three-layer structure (stacked in the order described) of a baked electrode layer containing Cu, a Ni plated layer, and a Sn plated layer. When this three-layer structure of external electrode 6 is formed, the Sn plated layer is located on the outermost surface of the external electrode 6, resulting in good solder wettability of the external electrode 6.

[0024] Further, as shown in FIG. 1, the external electrode 6 integrally includes an end face portion formed on the end face 4a of the element body 4 in the X-axis direction and an extension portion formed at the end in the X-axis direction on the four side faces 4b of the element body 4. That is, the pair of external electrodes 6 are each formed so as to wrap around from the end face 4a of the element body 4 to the side face 4b and are insulated from each other so as not to contact in the X-axis direction.

[0025] Note that the extension portion of the external electrode 6 is not essential, and the external electrode 6 may be composed of only the end face portion. Alternatively, when the multilayer ceramic capacitor 2 is surface-mounted on a substrate, the extension portion of the external electrode 6 need only be formed on at least the side face 4b facing the mounting surface of the substrate, and it is not necessary to form it on the side face 4b opposite to the mounting surface.

[0026] Next, the dielectric composition of the ceramic layer 10 will be described in detail.

[0027] The dielectric composition of the ceramic layer 10 contains a main component containing Ca or / and Sr, and the main component is preferably a perovskite-type compound represented by the general formula ABO3. Here, the main component of the ceramic layer 10 (the main component of the dielectric composition) means a component that occupies 80 mol% or more in the ceramic layer 10. Examples of perovskite compounds include barium titanate, calcium titanate, strontium titanate, calcium zirconate, strontium zirconate, calcium strontium zirconate, and the like.

[0028] In the present embodiment, the perovskite-type compound as the main component has a composition formula (Ca 1- α - β Srα Baβ ) m (Zr 1- γ - δ Tiγ Hfδ )O3 is preferably satisfied. In the above composition formula, the symbols α, β, γ, δ, m each indicate an element ratio.

[0029] m represents the elemental ratio of site A to site B, and can be in the range of 1.0 to 1.1.

[0030] α represents the elemental ratio of Sr in the A site, and β represents the elemental ratio of Ba in the A site. In this embodiment, it is preferable that the A site is mainly composed of Ca and / or Sr. Specifically, the total ratio of Ca and Sr in the A site (1-β) is preferably 0.8 or more. Furthermore, the elemental ratio of Ca in the A site (1-α-β) is preferably 0.5 or more and 1.0 or less, and more preferably 0.6 or more and 1.0 or less. α is preferably 0 or more and 0.5 or less, and more preferably 0 or more and 0.4 or less. β is preferably 0 or more and 0.2 or less, and more preferably 0.1 or less.

[0031] γ represents the elemental ratio of Ti in the B site, and δ represents the elemental ratio of Hf in the B site. In this embodiment, it is preferable that the B site is mainly composed of Zr. Specifically, the elemental ratio of Zr in the B site (1-γ-δ) is preferably 0.8 or more and 1.0 or less, and preferably 0.9 or more and 1.0 or less. γ is preferably 0 or more and 0.2 or less, and more preferably 0.1 or less. Hf is usually an unavoidable impurity, and δ is preferably 0.03 or less.

[0032] Furthermore, the elemental ratio of oxygen (O) in the above compositional formula may deviate slightly from the stoichiometric composition.

[0033] Furthermore, the ceramic layer 10 may contain minor components in addition to the main components described above. Examples of minor components include Mn compounds, Mg compounds, Cr compounds, Ni compounds, compounds containing rare earth elements, Si compounds, Li compounds, B compounds, V compounds, Al compounds, Ca compounds, etc., and the type and combination of minor components, as well as the amount added, are not particularly limited.

[0034] The component composition of the ceramic layer 10 can be analyzed using methods such as inductively coupled plasma atomic emission spectrometry (ICP), laser ablation ICP mass spectrometry (LA-ICP-MS), X-ray fluorescence analysis (XRF), energy-dispersive X-ray analysis (EDX), or an electron beam microanalyzer (EPMA) equipped with a wavelength-dispersive X-ray spectrometer (WDS).

[0035] The ceramic layer 10 containing the above components has an internal structure as shown in Figure 2, and the ceramic layer 10 includes dielectric particles 20 which are the matrix phase, a segregated phase 21 having predetermined characteristics, and grain boundaries 22 located between the dielectric particles 20. The grain boundaries 22 include grain boundary multipoints 22a located between three or more dielectric particles 20, and two-particle grain boundaries 22b located between two dielectric particles 20.

[0036] The dielectric particles 20 are composed of the main component (perovskite-type compound) of the ceramic layer 10 described above. If the ceramic layer 10 contains a secondary component, the dielectric particles 20 may have the secondary component dissolved in addition to the main component. Furthermore, the dielectric particles 20 may have a core-shell structure due to the solid solution of the secondary component. The average particle size of the dielectric particles 20 can be 5 μm or less, and is preferably 0.10 μm to 2.00 μm.

[0037] The average particle size of the dielectric particles 20 can be measured by observing a cross-section of the ceramic layer 10, as shown in Figure 2, using a scanning transmission electron microscope (STEM) or scanning electron microscope (SEM), and performing image analysis on the resulting cross-sectional photograph. For example, the average particle size of the dielectric particles 20 can be calculated by measuring the equivalent circular diameter of at least five dielectric particles 20.

[0038] As shown in Figure 2, the ceramic layer 10 of this embodiment contains a segregated phase 21. The segregated phase 21 contains at least one element selected from Ca and Sr, along with Mn, Si, and O (oxygen). That is, the segregated phase 21 is a phase containing a ternary composite oxide (Ca-Mn-Si-O, or Sr-Mn-Si-O) or a quaternary composite oxide (Ca-Sr-Mn-Si-O). In addition to the above elements, the segregated phase 21 may also contain Ba, Zr, Ti, Hf, Al, and minor elemental elements. By having a segregated phase 21 containing predetermined elements in the dielectric composition, the fracture toughness strength of the dielectric composition is improved, and defects such as cracks and chips in the ceramic layer 10 can be suppressed. It is preferable that the segregated phase 21 exists at grain boundary multipoints 22a rather than at two-particle grain boundaries 22b.

[0039] The segregated phase 21 can be identified by mapping analysis using STEM-EDS, STEM-WDS, SEM-EDX, or SEM-WDS. For example, mapping analysis is performed on a cross-section of the device body 4 as shown in Figure 2 to obtain mapping images of each element constituting the dielectric composition. In the mapping images, regions with a high abundance of a predetermined element, i.e., regions where the predetermined element is segregated, can be identified by the intensity of the color tones. In particular, in the segregated phase 21, the concentrations of Ca and / or Sr, Mn, and Si are higher than the concentrations in the dielectric particles 20. Therefore, by superimposing the mapping images of Ca, Sr, Mn, and Si, regions where Ca and / or Sr, Mn, and Si are segregated in overlapping areas can be identified, and these regions can be designated as the segregated phase 21 in this embodiment.

[0040] Furthermore, to more accurately determine whether or not Ca and Sr are present in the segregated phase 21, it is preferable to perform point analysis in conjunction with the mapping analysis described above. Specifically, point analysis using STEM-EDS, STEM-WDS, SEM-EDX, or SEM-WDS is performed in the specific region identified as the segregated phase 21 by the mapping analysis. Ca and Sr are elements that constitute the main components of the ceramic layer 10, and point analysis of a specific region is affected by the dielectric particles 20 present around that region. Therefore, when investigating whether or not Ca and Sr are present in the segregated phase 21 using EDX or WDS, the molar ratio of Ca to the sum of Zr and Ti (Ca / (Zr+Ti)) and the molar ratio of Sr to the sum of Zr and Ti (Sr / (Zr+Ti)) are measured.

[0041] Specifically, the Ca / (Zr+Ti) ratio in a specific region and the Ca / (Zr+Ti) ratio in the dielectric particle 20 are measured and compared. If the Ca / (Zr+Ti) ratio in the specific region is higher than that in the dielectric particle 20, it can be determined that the specific region contains Ca, and that this specific region is the segregation phase 21 in this embodiment. Similarly, the Sr / (Zr+Ti) ratio in a specific region and the Sr / (Zr+Ti) ratio in the dielectric particle 20 are measured and compared. If the Sr / (Zr+Ti) ratio in the specific region is higher than that in the dielectric particle 20, it can be determined that the specific region contains Sr, and that this specific region is the segregation phase 21 in this embodiment.

[0042] In the segregated phase 21, it is preferable that the content of the constituent elements is controlled within a predetermined range. In the following description of "content," Ca, Sr, Zr, Mn, Si, Al, Ti, and Hf are designated as specific elements, and the total content of these specific elements in the segregated phase 21 is set to 100 mol%, indicating the content of the specified elements in the segregated phase 21. Similarly, the total content of these specific elements in the dielectric particles 20 is set to 100 mol%, indicating the content of the specified elements in the dielectric particles 20.

[0043] First, regarding Mn, a constituent element of the segregated phase 21, it is preferable that the Mn content in the segregated phase 21 be 5 mol% or more, and that the Mn content in the dielectric particles 20 be 2 mol% or less. By controlling the Mn content within the above range in both the segregated phase 21 and the dielectric particles 20, cracks and chipping can be suppressed more effectively, and a high dielectric breakdown voltage can be obtained. The Mn content in the segregated phase 21 is more preferably 7 mol% or more, and there is no particular upper limit. For example, the Mn content in the segregated phase 21 can be 15 mol% or less, and is preferably 10 mol% or less. Furthermore, the Mn content in the dielectric particles 20 is more preferably 1 mol% or less, and even more preferably 0.5 mol% or less.

[0044] The total content of Ca and Sr in the segregated phase 21 is preferably 60 mol% or more. By satisfying this requirement, cracks and chipping can be more effectively suppressed while maintaining a high dielectric breakdown voltage. The upper limit of the total content of Ca and Sr in the segregated phase 21 is not particularly limited, but for example, it is preferably 70 mol% or less. Furthermore, when both Ca and Sr are contained in the segregated phase 21, the Ca / Sr ratio in the segregated phase 21 is preferably 1.5 or more, and more preferably 1.5 or more and 8 or less.

[0045] The Si content in the segregated phase 21 is preferably 20 mol% or more, and more preferably 22 mol% or more. By satisfying this requirement, cracks and chipping can be more effectively suppressed while maintaining a high dielectric breakdown voltage. The upper limit of the Si content in the segregated phase 21 is not particularly limited; for example, it is preferably 35 mol% or less, and more preferably 31 mol% or less.

[0046] The detailed composition of the segregated phase 21 is not particularly limited, but the crystal structure of the segregated phase 21 is preferably orthorhombic. An example of a composite oxide having such a crystal structure is (Ca,Sr,Mn)2SiO4. In this composite oxide, Ca, Sr, and Mn share the same sites.

[0047] The average particle size of the segregated phase 21 is preferably 0.05 μm or more and 1.00 μm or less, and more preferably 0.08 μm or more and 0.85 μm or less. Furthermore, the average particle size of the segregated phase 21 is preferably within the range of 0.05 to 0.5 times the average particle size of the dielectric particles 20. This average particle size of the segregated phase 21 can be calculated by identifying at least 5 or more segregated phases 21 by EDX or WDS, and then measuring the equivalent circular diameter of the identified segregated phases 21 by image analysis.

[0048] Furthermore, in this embodiment, the content of segregated phase 21 in the dielectric composition (i.e., ceramic layer 10) is defined as the number of segregated phase 21 particles contained in a unit cross-sectional area of ​​the dielectric composition (unit: particles / μm). 2 ) is defined as follows. The content of segregated phase 21 is 0.01 particles / μm 2 This can be achieved at a rate of 0.05 particles / μm 2 More than 0.50 pieces / μm 2 The following is preferable. The content of the segregated phase 21 is determined by observing the cross-section of the ceramic layer 10 as shown in Figure 2 using STEM or SEM in multiple fields of view, and finding that the total content is at least 1000 μm. 2 This can be calculated by measuring the number of segregated phases 21 present in the cross-section described above.

[0049] By ensuring that the average particle size and content of the segregated phase 21 meet the above-mentioned preferred range, cracks and chipping can be more effectively suppressed while maintaining a high dielectric breakdown voltage.

[0050] As described above, the ceramic layer 10 (dielectric composition) of this embodiment contains a predetermined segregation phase 21, and this segregation phase 21 can improve the fracture toughness of the device body 4. In addition to the segregation phase 21 described above, the ceramic layer 10 may also contain other segregation phases or voids. Examples of other segregation phases include segregation phases containing Zr, or segregation phases containing minor component elements such as Mg, Al, or rare earth elements. Furthermore, the grain boundaries 22 that exist between the dielectric particles 20 are composed of the main component elements and minor component elements, and the other segregation phases described above may exist at the grain boundaries 22.

[0051] Next, an example of a manufacturing method for the multilayer ceramic capacitor 2 shown in Figure 1 will be described.

[0052] First, let's explain the manufacturing process for the element body 4. In the manufacturing process for the element body 4, a dielectric paste that will become the ceramic layer 10 after firing and an internal electrode paste that will become the internal electrode layer 12 after firing are prepared.

[0053] The dielectric paste is manufactured using a perovskite-type compound powder (hereinafter referred to as the main component powder), which is the main component of the dielectric composition, and a segregation powder that becomes the segregation phase 21 after calcination. The main component powder can be manufactured by solid-phase method, hydrothermal synthesis method, or sol-gel method. For example, in the solid-phase method, the main component powder is obtained by uniformly mixing starting materials such as CaCO3 powder, SrCO3 powder, ZrO2 powder, and TiO2 powder by means of wet mixing, and then calcining. At this time, the calcined main component powder may be subjected to appropriate processing such as grinding or classification.

[0054] The segregation powder is obtained by mixing a compound powder containing Ca (e.g., CaCO3 powder) and / or a compound powder containing Sr (e.g., SrCO3 powder), a compound powder containing Mn (e.g., MnCO3 powder), and a compound powder containing Si (e.g., SiO2 powder) in a predetermined ratio and then calcining the mixture. The composition of the segregation phase 21 can be controlled by the mixing ratio of each compound powder used as the starting material. Furthermore, when manufacturing the segregation powder, it is preferable to control the particle size of the segregation phase 21 by performing appropriate grinding treatments. As each compound powder, oxide powders, carbonate powders, nitrate powders, sulfate powders, etc., can be used, and it is sufficient to use powders of compounds that become oxides after calcination.

[0055] The dielectric paste is obtained by adding the above-mentioned main component powder and segregation powder to an organic vehicle and kneading them together. Here, the organic vehicle is a binder dissolved in an organic solvent. The binder used is not particularly limited and can be appropriately selected from various binders such as polyvinyl butyral, acrylic, and ethylcellulose. The organic solvent used is also not particularly limited and can be appropriately selected from various organic solvents such as methyl ethyl ketone, methanol, ethanol, acetone, toluene, terpineol, and butyl carbitol.

[0056] Although the dielectric paste described above is an organic paint, the dielectric paste may also be an aqueous paint prepared by kneading a mixed powder with an aqueous vehicle. In this case, the aqueous vehicle is prepared by dissolving a water-soluble binder or dispersant in water. The water-soluble binder used is not particularly limited; for example, polyvinyl alcohol, water-soluble acrylic resin, water-soluble polyvinyl butyral resin, etc., can be used. The content of the segregated phase 21 can be controlled by adjusting the mixing ratio of the segregation powder in the dielectric paste. The dielectric paste may also contain additives selected from various dispersants, plasticizers, dielectrics, minor component compounds, glass frit, etc., as needed.

[0057] On the other hand, the paste for the internal electrodes can be prepared by kneading conductive materials such as pure Ni powder or Ni alloy powder, or various oxides, organometallic compounds, and resinates that become Ni or Ni alloys after firing, together with the organic vehicle described above. In this case, the main component powder contained in the dielectric paste may be added to the internal electrode paste as a co-material. The co-material has the effect of suppressing the sintering of the conductive powder during the firing process.

[0058] Next, a ceramic green sheet is obtained by forming a dielectric paste into a sheet using a method such as the doctor blade method. Then, an internal electrode paste is applied to this ceramic green sheet in a predetermined pattern using various printing methods such as screen printing or transfer methods. Furthermore, a mother laminate is obtained by stacking multiple layers of green sheets with the internal electrode pattern formed on them and then pressing them in the stacking direction. At this time, the ceramic green sheet and the internal electrode pattern are stacked so that the ceramic green sheet is located on the top and bottom surfaces of the mother laminate in the stacking direction.

[0059] The mother laminate obtained through the above process is cut to predetermined dimensions by dicing or press cutting to obtain multiple green chips. The green chips may be solidified and dried as needed to remove plasticizers, etc., or they may be barrel polished using a horizontal centrifugal barrel machine or the like after solidification and drying. In barrel polishing, the green chips are placed in a barrel container along with media and polishing fluid, and the barrel container is subjected to rotational motion or vibration. This barrel polishing polishes away unwanted parts such as burrs generated during cutting and forms rounded corners (corner radius) on the corners of the green chips. After barrel polishing, the green chips are washed with a cleaning solution such as water and dried. Note that this barrel polishing may also be performed after the firing of the green chips.

[0060] Next, the green chips obtained above are subjected to a binder removal process and a firing process to obtain the element body 4.

[0061] The conditions for the binder removal process can be appropriately determined according to the main component composition of the ceramic layer 10 and the main component composition of the internal electrode layer 12, and are not particularly limited. For example, the heating rate is preferably 5 to 300°C / hour, the holding temperature is preferably 180 to 400°C, and the temperature holding time is preferably 0.5 to 24 hours. The binder removal atmosphere is air or a reducing atmosphere.

[0062] The firing conditions can be appropriately determined according to the main component composition of the ceramic layer 10 and the main component composition of the internal electrode layer 12, and are not particularly limited. For example, the holding temperature during firing is preferably 1200 to 1350°C, more preferably 1220 to 1300°C, and the holding time is preferably 0.5 to 8 hours, more preferably 1 to 3 hours. Furthermore, the firing atmosphere is preferably a reducing atmosphere, and as the atmosphere gas, for example, a humidified mixed gas of N2 and H2 can be used. In addition, when the internal electrode layer 12 is made of a base metal such as Ni or a Ni alloy, the oxygen partial pressure in the firing atmosphere should be 1.0 × 10⁻⁶ -14 ~1.0×10 -10 It is preferable to use MPa.

[0063] Furthermore, annealing may be performed after firing as needed. Annealing is a process to re-oxidize the ceramic layer 10, and it is preferable to perform annealing when the firing process is carried out in a reducing atmosphere. The conditions for the annealing process can be appropriately determined according to the main component composition of the ceramic layer 10, and are not particularly limited. For example, it is preferable to set the holding temperature to 650 to 1150°C, the holding time to 0 to 20 hours, and the heating rate and cooling rate to 50 to 500°C / hour. In addition, it is preferable to use dry N2 gas or humidified N2 gas as the atmospheric gas. Furthermore, annealing may be performed multiple times.

[0064] In the debinding, firing, and annealing processes described above, a wetter or similar device can be used to humidify the N2 gas or mixed gas, and in this case, a water temperature of approximately 5 to 75°C is preferable. Furthermore, the debinding, firing, and annealing processes may be performed continuously or independently.

[0065] Furthermore, in order to keep the Mn content in the dielectric particles 20 low, to 2 mol% or less, the partial pressure of oxygen in the firing atmosphere should be set to 1.0 × 10⁻⁶ -12 It is preferable to keep the oxygen partial pressure in the firing atmosphere below MPa. Alternatively, the oxygen partial pressure in the firing atmosphere should be 1.0 × 10⁻⁶. -12 It is preferable to keep the pressure below MPa and to perform annealing two or more times.

[0066] In each of the above heat treatments (binder removal, firing, and annealing (re-oxidation)), the green chips are placed on a plate-shaped refractory setter and heated. After the heat treatment, the fired element body 4 is dropped from the setter for recovery. In this embodiment, the ceramic layer 10 is composed of a dielectric composition having a segregated phase 21, making it difficult for cracks or chips to occur in the element body 4 even when subjected to impacts such as dropping. In other words, cracks and chips can be suppressed when recovering the fired element body 4 from the setter, thereby reducing the defect rate in the manufacturing process.

[0067] Next, a pair of external electrodes 6 are formed on the outer surface of the element body 4 obtained above. The method for forming the external electrodes 6 is not particularly limited. For example, when forming baked electrodes as external electrodes 6, a conductive paste containing glass frit is applied to the end face of the element body 4 by a dip method, and then the element body 4 is heated to a predetermined temperature. Alternatively, when forming resin electrodes as external electrodes 6, a conductive paste containing thermosetting resin is applied to the end face of the element body 4, and then the element body 4 is heated to a temperature at which the thermosetting resin hardens. Furthermore, after forming baked electrodes or resin electrodes by the above method, sputtering, vapor deposition, electrolytic plating, or electroless plating may be performed to form external electrodes 6 having a multilayer structure.

[0068] Through the above process, a multilayer ceramic capacitor 2 having an external electrode 6 is obtained.

[0069] (Summary of the embodiments) The multilayer ceramic capacitor 2 according to this embodiment has an element body 4 in which ceramic layers 10 made of a predetermined dielectric composition and internal electrode layers 12 are alternately stacked. The dielectric composition of the ceramic layer 10 has dielectric particles 20 containing Ca and / or Sr, at least one selected from Ca and Sr, and a segregation phase 21 containing Mn, Si, and O.

[0070] The dielectric composition of the ceramic layer 10, having the above-described characteristics, improves fracture toughness. The reason for the improved fracture toughness is not entirely clear, but it is thought to be due to the improved bonding strength between dielectric particles caused by the segregation phase 21 containing a predetermined element. Furthermore, even if a crack initiation point occurs within the dielectric composition, it is thought that the segregation phase 21 can suppress the propagation of the crack. In the multilayer ceramic capacitor 2 of this embodiment, since the ceramic layer 10 is composed of a dielectric composition with high fracture toughness, the occurrence of cracks and chips in the element body 4 can be sufficiently suppressed. In addition, the multilayer ceramic capacitor 2 exhibits high durability against external stress and impact.

[0071] In particular, by controlling the content of each constituent element in the segregated phase 21, the average particle size of the segregated phase 21, and the content of the segregated phase 21 within a predetermined range, it is possible to more effectively suppress cracks and chipping while maintaining a high dielectric breakdown voltage.

[0072] While embodiments of the present invention have been described above, the present invention is not limited in any way to the embodiments described above, and can be modified in various ways without departing from the spirit of the invention.

[0073] For example, in this embodiment, a multilayer ceramic capacitor 2 is exemplified as a multilayer ceramic electronic component, but the multilayer ceramic electronic component of the present invention may be, for example, a bandpass filter, a multilayer three-terminal filter, a thermistor, a varistor, or the like.

[0074] Furthermore, in this embodiment, the ceramic layer 10 and the internal electrode layer 12 are stacked in the Z-axis direction, but the stacking direction may be the X-axis direction or the Y-axis direction. In that case, the external electrode 6 should be formed in line with the exposed surface of the internal electrode layer 12. Alternatively, the internal electrode layer 12 may be brought out to the outer surface of the element body 4 via a through-hole electrode, in which case the through-hole electrode and the external electrode 6 are electrically joined. [Examples]

[0075] The present invention will be described below based on more detailed examples, but the present invention is not limited to these examples.

[0076] (Experiment 1) In Experiment 1, capacitor samples relating to Examples 1-3 and Comparative Examples 1-5 were prepared using the following procedure.

[0077] Example 1 First, the main component powder, which is the raw material for the dielectric paste, and the segregation powder were prepared. Specifically, the main component powder was manufactured by a solid-phase method (Ca 0.7 Sr 0.3 )(Zr 0.96 Ti 0.04 )O3 powder was used. On the other hand, the segregation powder was obtained by wet mixing CaCO3 powder, MnCO3 powder, and SiO2 powder in a predetermined ratio, calcining, and then grinding with a ball mill. In other words, in Example 1, a ternary composite oxide of Ca-Mn-Si-O was used as the segregation powder.

[0078] Next, a dielectric paste was obtained by kneading the main component powder, segregation powder, organic vehicle, and auxiliary component powder (Al2O3 powder). Additionally, a paste for internal electrodes was obtained by kneading Ni powder and organic vehicle.

[0079] Next, a green chip was manufactured using the dielectric paste and internal electrode paste described above by the sheet method. The green chip was then subjected to a binder removal treatment, firing treatment, and annealing treatment to obtain an element body 4 with dimensions L0 × W0 × T0 = 3.2 mm × 2.5 mm × 2.5 mm. In the obtained element body 4, the number of layers of ceramic layer 10 sandwiched between internal electrode layers 12 was set to 150, the average thickness of the ceramic layer 10 was set to 12 μm, and the average thickness of the internal electrode layer 12 was set to 1.4 μm. Through the above steps, a capacitor sample according to Example 1 was obtained.

[0080] Example 2 In Example 2, SrCO3 powder, MnCO3 powder, and SiO2 powder were wet-mixed in a predetermined ratio, calcined, and then ground in a ball mill to obtain segregation powder. In other words, in Example 2, the type of segregation powder was changed from that in Example 1, and a ternary composite oxide of Sr-Mn-Si-O was used as the segregation powder. The experimental conditions other than those mentioned above were the same as in Example 1 to obtain the capacitor sample according to Example 2.

[0081] Example 3 In Example 3, CaCO3 powder, SrCO3 powder, MnCO3 powder, and SiO2 powder were wet-mixed in a predetermined ratio, calcined, and then ground in a ball mill to obtain a segregation powder. In other words, in Example 3, the type of segregation powder was changed from Example 1, and a quaternary composite oxide of Ca-Sr-Mn-Si-O was used as the segregation powder. The experimental conditions other than those mentioned above were the same as in Example 1 to obtain the capacitor sample according to Example 3.

[0082] Comparative Example 1 In Comparative Example 1, a dielectric paste was prepared without using segregation powder. That is, the dielectric paste in Comparative Example 1 was (Ca 0.7 Sr 0.3 )(Zr 0.96 Ti 0.04The main component powder consisting of )O3, the secondary component powder (the same secondary component as in Example 1), and the organic vehicle were mixed together to prepare the sample. The experimental conditions in Comparative Example 1 were the same as in Example 1, except for the conditions mentioned above, to obtain the capacitor sample for Comparative Example 1.

[0083] Comparative Example 2 In Comparative Example 2, MnCO3 powder was added to the dielectric paste without using segregation powder. That is, the dielectric paste in Comparative Example 2 was (Ca 0.7 Sr 0.3 )(Zr 0.96 Ti 0.04 The main component powder consisting of )O3, MnCO3 powder, other minor component powders (the same minor components as in Example 1), and an organic vehicle were mixed together to prepare the sample. The experimental conditions in Comparative Example 2 were the same as in Example 1, except for the conditions mentioned above, to obtain the capacitor sample for Comparative Example 2.

[0084] Comparative Example 3 In Comparative Example 3, MnCO3 powder and SiO2 powder were added to the dielectric paste without using segregation powder. That is, in Comparative Example 3, (Ca 0.7 Sr 0.3 )(Zr 0.96 Ti 0.04 A dielectric paste was prepared by mixing a main component powder consisting of )O3, MnCO3 powder, SiO2 powder, other minor component powders (the same minor components as in Example 1), and an organic vehicle. The experimental conditions in Comparative Example 3 were the same as in Example 1, except for the conditions mentioned above, to obtain a capacitor sample according to Comparative Example 3.

[0085] Comparative Example 4 In Comparative Example 4, CaCO3 powder and SiO2 powder were added to the dielectric paste without using segregation powder. That is, in Comparative Example 4, (Ca 0.7 Sr 0.3 )(Zr 0.96 Ti 0.04A dielectric paste was prepared by mixing a main component powder consisting of )O3, CaCO3 powder, SiO2 powder, other minor component powders (the same minor components as in Example 1), and an organic vehicle. The experimental conditions for Comparative Example 4 were the same as in Example 1, except for the conditions mentioned above, to obtain a capacitor sample for Comparative Example 4.

[0086] Comparative Example 5 In Comparative Example 5, SrCO3 powder and SiO2 powder were added to the dielectric paste without using segregation powder. That is, in Comparative Example 5, (Ca 0.7 Sr 0.3 )(Zr 0.96 Ti 0.04 A dielectric paste was prepared by mixing a main component powder consisting of 2O3, SrCO3 powder, SiO2 powder, other minor component powders (the same minor components as in Example 1), and an organic vehicle. The experimental conditions for Comparative Example 5 were the same as in Example 1, except for the conditions mentioned above, to obtain a capacitor sample for Comparative Example 5.

[0087] The following evaluations were performed on the capacitor samples related to each example and comparative example in Experiment 1.

[0088] Analysis of segregation The segregated phase present in the ceramic layer was analyzed using STEM-EDX. First, a thin section sample was taken from the ceramic layer 10 located near the center of the device body using a microsampling method with a focused ion beam (FIB). This thin section sample was then processed to a thickness of 100 nm or less to obtain an analytical sample for cross-sectional observation. The analytical sample was then observed using STEM, and mapping analysis and point analysis were performed using EDX to identify the constituent elements of the segregated phase present inside the ceramic layer 10. The measurement results for each example and comparative example are shown in Table 1.

[0089] Impact resistance test In Experiment 1, impact resistance tests were conducted on the fired samples (element bodies) of each example and comparative example. Specifically, the fired element bodies were dropped from a predetermined height, and the appearance of the element bodies after the drop was examined. Stereomicroscope The tests were conducted using the following method. In Condition 1, the drop height was set to 0.5m, and impact resistance tests were performed on 100 samples for each example and comparative example. In Condition 2, the drop height was set to 2.0m, and impact resistance tests were performed on 100 samples for each example and comparative example. After the tests, the number of samples with cracks or chips on the corners of the element body was measured during the visual inspection, and the defect rate (%) was calculated. If the defect rate in Condition 1 was 0%, it was judged as "pass," and if the defect rate in Condition 2 was 0%, the impact resistance was judged as "particularly good." The test results for each example and comparative example are shown in Table 1.

[0090] Dielectric breakdown voltage In Experiment 1, the dielectric breakdown voltage of the capacitor samples for each example and comparative example was measured. Specifically, the capacitor samples were placed in silicone oil at room temperature, and a DC current was applied to the capacitor samples at a boost rate of 100 V / sec. The voltage value at which the leakage current exceeded 200 mA was measured as the dielectric breakdown voltage (V). Samples with a dielectric breakdown voltage of 1400 V or higher were judged as "good," and samples with a dielectric breakdown voltage of 1450 V or higher were judged as "particularly good." The evaluation results for each example and comparative example are shown in Table 1.

[0091] [Table 1]

[0092] As shown in Table 1, in Comparative Example 1, which did not contain a segregation phase, and in Comparative Examples 2-5, which contained segregation consisting of a monochromatic or binary oxide phase, samples were found to have cracks or chips when dropped from 0.5m, indicating insufficient impact resistance. On the other hand, in Examples 1-3, a segregation phase 21 containing at least one selected from Ca and Sr, along with Mn, Si, and O, was identified, and in these examples, no cracks or chips occurred when dropped from 0.5m. From these results, it was found that including a segregation phase 21 in the dielectric composition constituting the ceramic layer 10 can suppress the occurrence of cracks or chips in the device body 4.

[0093] Furthermore, comparing Examples 1 to 3, Example 3 exhibited the best impact resistance. From this result, it was found that it is preferable for the segregated phase 21 to contain both Ca and Sr, rather than just one of them. In all Examples 1 to 3, it was confirmed that the segregated phase 21 was present at the grain boundary multipoints 22a.

[0094] Experiment 2 In Experiment 2, capacitor samples corresponding to Examples 4 to 14 were prepared by changing the ratio of constituent elements in the segregated phase 21.

[0095] (Examples 4-8) In Examples 4-8, the Mn content in the dielectric particles 20 and the segregation phase 21 was changed. The Mn content in the segregation phase 21 was controlled by adjusting the mixing ratio of the starting materials (CaCO3 powder, SrCO3 powder, MnCO3 powder, SiO2 powder) when manufacturing the segregation powder. The Mn content in the dielectric particles 20 was controlled by adjusting the oxygen partial pressure in the firing atmosphere. Other than the above, the experimental conditions were the same as in Example 3 of Experiment 1, and capacitor samples for Examples 4-8 were manufactured. The Mn content in each of Examples 4-8 was measured using STEM-EDX, and the capacitor samples of Examples 4-8 were evaluated in the same way as in Experiment 1. The evaluation results for Examples 4-8 are shown in Table 2.

[0096] (Examples 9-11) In Examples 9-11, the total content of Ca and Sr in the segregation phase 21 was changed. The total content of Ca and Sr was controlled by adjusting the mixing ratio of the starting materials (CaCO3 powder, SrCO3 powder, MnCO3 powder, SiO2 powder) when manufacturing the segregation powder. Except for the above, the experimental conditions were the same as in Example 3 of Experiment 1, and capacitor samples for Examples 9-11 were manufactured. The total content of Ca and Sr in each of Examples 9-11 was measured using STEM-EDX, and the capacitor samples of Examples 9-11 were evaluated in the same way as in Experiment 1. The evaluation results for Examples 9-11 are shown in Table 3.

[0097] (Examples 12-14) In Examples 12-14, the Si content in the segregated phase 21 was changed. The Si content was controlled by adjusting the mixing ratio of the starting materials (CaCO3 powder, SrCO3 powder, MnCO3 powder, SiO2 powder) when manufacturing the segregation powder. Other than the above, the experimental conditions were the same as in Example 3 of Experiment 1, and capacitor samples for Examples 12-14 were manufactured. The total Si content in each of Examples 12-14 was measured using STEM-EDX, and the same evaluation as in Experiment 1 was performed on the capacitor samples of Examples 12-14. The evaluation results for Examples 12-14 are shown in Table 4.

[0098] [Table 2]

[0099] [Table 3]

[0100] [Table 4]

[0101] From the evaluation results of Examples 4 to 8 shown in Table 2, it was found that by setting the Mn content in the segregation phase 21 to 5 mol% or more, impact resistance was particularly good, and cracks and chips could be more effectively suppressed. Furthermore, from the evaluation results of Examples 4 to 8, it was found that by setting the Mn content in the dielectric particles 20 to 2 mol% or less, the dielectric breakdown voltage was further improved.

[0102] From the evaluation results of Examples 9 to 11 shown in Table 3, it was found that by setting the total content of Ca and Sr in the segregated phase 21 to 60 mol% or more, impact resistance was particularly good, and cracks and chips could be suppressed more effectively.

[0103] From the evaluation results of Examples 12-14 shown in Table 4, it was found that by setting the Si content in the segregated phase 21 to 20 mol% or more, impact resistance was particularly good, and cracks and chips could be suppressed more effectively.

[0104] Experiment 3 In Experiment 3, capacitor samples corresponding to Examples 15-19 with different segregation phase 21 content were prepared. The segregation phase 21 content was controlled by the mixing ratio of segregation powder in the dielectric paste. In Experiment 3, capacitor samples corresponding to Examples 20-24 with different average particle sizes of segregation phase 21 were also prepared. The average particle size of segregation phase 21 was controlled by the grinding conditions when grinding the segregation powder with a ball mill after calcination. The total segregation phase 21 content was determined using STEM-EDX to be 10 μm. 2 The segregated phase 21 contained in the cross-section (cross-section of the ceramic layer 10) was identified and calculated. The average particle size of the segregated phase 21 was calculated by measuring the equivalent circular diameter of 20 segregated phases 21.

[0105] Other than the conditions mentioned above, the experimental conditions in Experiment 3 were the same as those in Example 3 of Experiment 1. The evaluation results for Examples 15-19 are shown in Table 5, and the evaluation results for Examples 20-24 are shown in Table 6.

[0106] [Table 5]

[0107] [Table 6]

[0108] From the results of Examples 15-19 shown in Table 5, the segregation phase 21 content was found to be 0.05 particles / μm 2 More than 0.50 pieces / μm 2 It was found that by keeping the voltage within the following range, cracks and chips can be more effectively suppressed while maintaining a high dielectric breakdown voltage.

[0109] The results from Examples 20-24 shown in Table 6 indicate that by setting the average particle size of the segregated phase 21 within the range of 0.05 μm to 1.00 μm, cracks and chipping can be more effectively suppressed while maintaining a high dielectric breakdown voltage. [Explanation of symbols]

[0110] 2… Multilayer ceramic capacitor 4… Click this button on the main body 4a … End face 4b…side 10… Ceramic layer 12 … Internal electrode layer 20… Dielectric particles 21 … segregated phase 22 … Grain boundary 22a … Grain boundary multiple points 22b … Two-grain grain boundary 6 … External electrode

Claims

1. Dielectric particles containing Ca and / or Sr, and further containing Al, A dielectric composition having at least one selected from Ca and Sr, and a segregation phase containing Mn, Si, and O, The dielectric particles are ABO 3 It contains a perovskite-type compound represented by, In the perovskite-type compound, site A contains Ca and / or Sr, and site B contains Zr and / or Ti. The molar ratio of the total amount of Ca and Sr to 1 mole of site A is 0.8 or greater. A dielectric composition having a molar ratio of Zr to 1 mole of B site of 0.8 or higher.

2. Ca, Sr, Zr, Mn, Si, Al, Ti, and Hf are specified elements. Assuming the total content of the specified element in the segregated phase is 100 mol%, The Mn content in the segregated phase is 5 mol% or more. Assuming the total content of the specified element in the dielectric particles is 100 mol%, The dielectric composition according to claim 1, wherein the Mn content in the dielectric particles is 2 mol% or less.

3. Ca, Sr, Zr, Mn, Si, Al, Ti, and Hf are specified elements. Assuming the total content of the specified element in the segregated phase is 100 mol%, The dielectric composition according to claim 1 or 2, wherein the total content of Ca and Sr in the segregated phase is 60 mol% or more.

4. Ca, Sr, Zr, Mn, Si, Al, Ti, and Hf are specified elements. Assuming the total content of the specified element in the segregated phase is 100 mol%, The dielectric composition according to any one of claims 1 to 3, wherein the Si content in the segregated phase is 20 mol% or more.

5. The segregated phase content is 0.05 particles / μm 2 More than 0.5 pieces / μm 2 The dielectric composition according to any one of claims 1 to 4 below.

6. The dielectric composition according to any one of claims 1 to 5, wherein the average particle size of the segregated phase is 0.05 μm or more and 1.00 μm or less.

7. A multilayer ceramic electronic component comprising the dielectric composition according to any one of claims 1 to 6.

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