Power supply device

Abstract

To provide a power supply device that can detect and notify the occurrence of an open state or a short state in any of a plurality of output terminals.SOLUTION: A power supply device having a plurality of first current control elements respectively connected between an input terminal and a plurality of output terminals and a control circuit for controlling the first current control elements, includes: an abnormality detection circuit having a plurality of voltage comparison circuits and detecting an open or short circuit at each of the plurality of output terminals; and a voltage conversion circuit for generating a threshold voltage according to the voltage generated by passing a current through a current setting resistor, and is configured to notify the outside of the abnormal state detected by the abnormality detection circuit.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a DC power supply device such as a voltage regulator or a DC-DC converter that converts a DC voltage and includes a current control element connected between an input terminal and an output terminal, and relates to a technique effective for detecting an open abnormality or a short abnormality of a plurality of output terminals to which a load is connected or the load.

Background Art

[0002] There is a series regulator (hereinafter abbreviated as a regulator) as a power supply device that controls a transistor provided between a DC voltage input terminal and an output terminal to output a DC voltage of a desired potential. In an automobile equipped with a terrestrial digital (terrestrial digital television broadcast) tuner, power is supplied to in-vehicle electronic devices such as a terrestrial digital antenna by an in-vehicle regulator. Further, in an in-vehicle terrestrial digital tuner compatible with full segment, in order to optimize the reception situation by adjusting the reception sensitivity and switching between full segment / one segment with the tuner, a diversity antenna, which is a 4-channel (channel) equivalent antenna, is generally used as the terrestrial digital antenna.

[0003] On the other hand, since in-vehicle tuners and antennas are connected to an in-vehicle regulator via a connector, the connector may come off due to the vibration of the vehicle body, causing the output terminal of the power supply to open, or disconnection or short circuit may occur inside the load. Therefore, some in-vehicle regulators have a function to detect such abnormal states. Note that there are inventions described in Patent Documents 1 and 2 regarding a semiconductor integrated circuit for a regulator (IC for regulator) configured to provide an open abnormality detection comparator for detecting an open state of an output terminal and a short abnormality detection comparator for detecting a short state, generate an abnormality detection signal, and output it from the output terminal.

Prior Art Documents

Patent Documents

[0004] [Patent Document 1] Japanese Patent Publication No. 2010-10527 [Patent Document 2] Japanese Patent Publication No. 2017-45096 [Overview of the project] [Problems that the invention aims to solve]

[0005] Traditionally, in in-vehicle digital terrestrial television systems equipped with multiple antennas, it was common practice to supply power to all antennas from a common regulator. In this case, even if one channel antenna becomes open, the system will continue to operate without detecting the abnormality because it will receive signals on other channels. On the other hand, it is conceivable to provide a regulator with an open-circuit abnormality detection function for each antenna as a load, in order to detect when one channel antenna becomes open. However, this would require multiple regulators, leading to a significant increase in cost and mounting area.

[0006] Therefore, as shown in Figure 4, a power supply IC can be conceived that provides two series regulators (LDOs) and two output terminals within a single IC chip to supply power to two loads, and is configured to detect open-circuit or short-circuit abnormalities in the output terminals of each regulator. Note that the power supply IC shown in Figure 4 is not publicly known and was conceived by the inventor by applying the open-circuit and short-circuit abnormality detection circuits in the power supply IC described in Patent Document 2. Furthermore, the regulator ICs and semiconductor devices described in Patent Documents 1 and 2 are assumed to be connected to a single load.

[0007] The power supply IC shown in Figure 4 has the advantage of being able to detect either an open-circuit or short-circuit abnormality at different threshold values ​​for each of its two output terminals. However, when used as a regulator to supply power to two antennas in an in-vehicle digital terrestrial television system, if two loads with the same characteristics, such as diversity antennas, are connected to the two output terminals, there is no need to individually set different threshold values ​​for each output terminal. Therefore, there is a waste of terminals and external resistors, which is a disadvantage in terms of miniaturizing the IC and reducing costs.

[0008] This invention was made in view of the above-mentioned problems, and its purpose is to enable a power supply device equipped with multiple output terminals to which multiple loads are connected to to detect when an open or short condition occurs in any of the multiple loads and to output a signal indicating an abnormality. [Means for solving the problem]

[0009] To achieve the above objective, the present invention A power supply device comprising one input terminal and multiple output terminals, multiple first current control elements connected between the input terminal and the multiple output terminals, and a control circuit for controlling the multiple first current control elements, The circuit includes multiple voltage comparison circuits that compare voltages proportional to the voltages of the multiple output terminals with a predetermined threshold voltage, and an abnormality detection circuit that detects an abnormal state in which each of the multiple output terminals is open or short-circuited. The system includes a voltage conversion circuit that generates a predetermined threshold voltage, which is applied in common to one of the input terminals of the plurality of voltage comparison circuits, in accordance with the potential difference across the current setting resistor caused by passing current through the current setting resistor. The abnormal condition detected by the abnormality detection circuit is configured to be notified to an external party.

[0010] With a power supply having the above configuration, current can be supplied to loads connected to each of the multiple voltage output terminals. Furthermore, if the multiple loads connected to the multiple voltage output terminals have the same characteristics, by providing only one current setting resistor, it is possible to detect if an open or short condition occurs at any of the output terminals or loads and notify the outside of the abnormal condition. In addition, by appropriately setting the resistance value of the current setting resistor, the threshold for determining whether an open or short condition occurs can be easily changed. [Effects of the Invention]

[0011] According to the present invention, in a power supply device equipped with multiple output terminals to which multiple loads are connected, if an open or short-circuit condition occurs in any of the multiple loads, it has the effect of being able to detect this and output a signal to indicate an abnormality. [Brief explanation of the drawing]

[0012] [Figure 1] This is a circuit diagram showing one embodiment of a regulator IC to which the present invention is applied. [Figure 2] Figure 1 is a circuit diagram showing a specific example of a current amplifier that constitutes a voltage converter in the regulator of the embodiment shown. [Figure 3] This is a circuit diagram showing a modified example of the regulator IC in the embodiment of Figure 1. [Figure 4] This is a circuit diagram showing an example of a regulator IC that utilizes a known power supply IC equipped with circuits for detecting open-circuit and short-circuit anomalies. [Modes for carrying out the invention]

[0013] Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. Figure 1 shows one embodiment in which the present invention is applied as a series regulator in a DC power supply device. In Figure 1, the area enclosed by the dashed line is formed as a semiconductor integrated circuit (hereinafter referred to as regulator IC) 10 on a semiconductor chip such as single-crystal silicon.

[0014] In the regulator IC10 of this embodiment, as shown in Figure 1, one voltage input terminal IN to which a DC voltage VDD is applied and two output terminals OUT1 and OUT2 are provided as external terminals. P-channel MOS transistors Q11 and Q21 are connected between the voltage input terminal IN and the respective output terminals OUT1 and OUT2, and capacitors Co1 and Co2 are connected to the output terminals OUT1 and OUT2, so that it functions as a DC power supply device that supplies two stable DC output voltages Vout1 and Vout2 to the outside. LD1 and LD2 represent load devices such as antennas connected to the output terminals OUT1 and OUT2.

[0015] Furthermore, between the output terminals OUT1 and OUT2 and the ground line to which the ground potential GND is applied, bleeder resistors R11 and R12 and resistors R21 and R22 are connected in series, respectively, to divide the output voltages Vout1 and Vout2. If an external terminal is provided that is connected to the midpoint of resistors R11 and R12, or to the midpoint of R21 and R22, then R11, R12, R21, and R22 can be provided outside the regulator IC10. The voltage VFB1 divided by the resistors R11 and R12 for output voltage division is fed back to the non-inverting input terminal of an error amplifier 11A as an error amplification circuit that controls the gate terminal of the transistor Q11, and the voltage VFB2 divided by the resistors R21 and R22 is fed back to the non-inverting input terminal of an error amplifier 11B that controls the gate terminal of the transistor Q21. The error amplifiers 11A and 11B control the transistors Q11 and Q21 according to the potential difference between the feedback voltages VFB1 and VFB2 of the output and a predetermined reference voltage Vref, and control the flow of a current according to the load so that the output voltages Vout1 and Vout2 become desired potentials. Thereby, the transistors Q11 and Q21 function as current control elements and voltage control elements.

[0016] Furthermore, the regulator IC10 of the present embodiment is provided with a reference voltage circuit 12 for generating the reference voltage Vref applied to the inverting input terminals of the error amplifiers 11A and 11B, and a bias circuit 13 for flowing an operating current to the error amplifiers 11A and 11B and the reference voltage circuit 12. [[ID=q]]The reference voltage circuit 12 can be composed of a bandgap reference circuit, a series resistor, a Zener diode, and the like.

[0017] Furthermore, in the regulator IC10 of the present embodiment, transistors Q12 and Q@2 that form current mirror circuits with Q11 and Q21 respectively are provided in parallel with the transistors Q11 and Q21 for current control, and the same voltage as the voltage applied to the gate terminals of the transistors Q11 and Q21, that is, the output voltages of the error amplifiers 11A and 11B, is applied to the gate terminals as control terminals of these transistors Q12 and Q22. Thereby, a current (current of 1 / N) proportional to the drain current of Q11 and Q21 flows through Q12 and Q22 according to the element size ratio N. When the transistors Q11 and Q21 are configured by connecting N transistors of the same size in parallel, and Q12 and Q22 are each composed of one transistor, it is set so that a current proportional to the number of elements flows.

[0018] Furthermore, in the regulator IC 10 of the present embodiment, resistors R13 and R23 as current-voltage conversion elements are provided which are connected in series with the current mirror transistors Q12 and Q22 respectively, and convert the current flowing through Q12 and Q22 into a voltage. Also, an external terminal P1 for connecting a resistor Rdet for voltage-current conversion outside the chip, a voltage converter 14 for generating a voltage Vth corresponding to the voltage Vdet generated at the external terminal P1, and a comparator CMP1 and CMP2 for comparing the voltage Vth generated by the voltage converter 14 with the voltages converted by the resistors R13 and R23 to detect any abnormality such as an open abnormality or a short abnormality of the output terminals OUT1 and OUT2 are provided. Therefore, the voltage Vth serves as a threshold for determining an open abnormality or a short abnormality.

[0019] When the output terminal OUT1 or OUT2 is open, almost no current flows through the transistors Q11 or Q21 and Q12 or Q22, so the voltage of the resistor R13 or R23 also becomes low. Therefore, when the comparators CMP1 and CMP2 are to function as open abnormality detection means, a resistor Rdet with a large resistance value is connected to the external terminal P1, and the voltage converter 14 generates a relatively low voltage Vtho for detecting an open abnormality. On the other hand, when the output terminal OUT1 or OUT2 is shorted, a current larger than the load current flows through the transistors Q11 or Q21 and Q12 or Q22, so the voltage of the resistor R13 or R23 becomes high. Therefore, when the comparators CMP1 and CMP2 are to function as short abnormality detection means, a resistor Rdet with a small resistance value is connected to the external terminal P1, and the voltage converter 14 generates a relatively high voltage Vths (>Vtho) for detecting a short abnormality.

[0020] Furthermore, when comparators CMP1 and CMP2 are used as open-circuit anomaly detection devices, a voltage is generated at one input terminal (+ or -) of comparators CMP1 and CMP2 by passing the currents Iout1' and Iout2' of Q12 and Q22 through resistors R13 and R23, and a threshold voltage Vtho is generated at the other input terminal (- or +). On the other hand, when comparators CMP1 and CMP2 are used as short-circuit anomaly detection devices, a voltage is generated at one input terminal (- or +) of comparators CMP1 and CMP2 by passing the currents Iout1' and Iout2' of Q12 and Q22 through resistors R13 and R23, and a threshold voltage Vths is generated at the other input terminal (+ or -). Note that the inverting / non-inverting input terminals (- or +) of comparators CMP1 and CMP2 that generate Vtho or Vths can be either determined by the logic of the subsequent logic circuit. The input switching described above can be achieved, for example, by configuring the input signal wiring or logic circuit to be switchable using a mask option. Furthermore, it is preferable to use comparators CMP1 and CMP2 that have hysteresis characteristics.

[0021] Furthermore, the regulator IC 10 of this embodiment is provided with a logic circuit 15 that takes the outputs of the abnormality detection comparators CMP1 and CMP2 as inputs. Furthermore, an N-channel MOS transistor Q5 is provided, to which the output of the logic circuit 15 is input at its gate terminal. An external terminal P3 is also provided for outputting an abnormality detection signal Err to an external CPU or the like in an open-drain format, and the drain terminal of transistor Q5 is connected to external terminal P3. Instead of the open-drain transistor Q5, an output circuit consisting of a CMOS inverter may be provided.

[0022] The logic circuit 15 described above is configured as a circuit with OR logic functionality when the outputs of the anomaly detection comparators CMP1 and CMP2 are high levels, indicating an abnormal state and outputting it as a low-level anomaly detection signal ERR. When the outputs of the anomaly detection comparators CMP1 and CMP2 are low levels, indicating an abnormal state and outputting it as a low-level anomaly detection signal ERR, the circuit is configured as a circuit with NAND logic functionality, and when the outputs of CMP1 and CMP2 are low levels, indicating an abnormal state and outputting it as a high-level anomaly detection signal ERR, the circuit is configured as a circuit with NOR logic functionality.

[0023] Furthermore, two external terminals for outputting anomaly detection signals may be provided, and 2-bit anomaly detection signals corresponding to the outputs of comparators CMP1 and CMP2 may be output externally. In this case, the logic circuit 15 can be configured, for example, as a delay circuit. Furthermore, while the above description states that comparators CMP1 and CMP2 are configured to switch input signal wiring using a mask option depending on whether an open or short circuit abnormality is detected in output terminals OUT1 and OUT2, instead of switching the input signal wiring of comparators CMP1 and CMP2, the logic configuration of logic circuit 15 may be switched using a mask option.

[0024] As shown in Figure 1, the voltage converter 14 comprises a current buffer 14a consisting of an amplifier AMP, to which an inverting input terminal is connected to the external terminal P1 to which a resistor Rdet is connected and to which a reference voltage Vdet_in is applied, and an N-channel MOS transistor Qa, to which the source terminal is connected to the external terminal P1 and to which an inverting input terminal is connected and to which the output voltage of the amplifier AMP is applied, a current mirror circuit 14b that folds back the current Idet generated by the current buffer 14a and flowing through the resistor Rdet, and a resistor Rth that converts the secondary current (transfer current) Idet' of the current mirror circuit 14b into a voltage, and the voltage converted by resistor Rth is supplied to the comparators CMP1 and CMP2 as a comparison reference voltage Vth.

[0025] The current buffer 14a of the voltage converter 14 has the output terminal of the amplifier AMP connected to the gate terminal of transistor Qa, and the source terminal of transistor Qa connected to the inverting input terminal of amplifier AMP. As a result, amplifier AMP functions as a voltage follower and operates transistor Qa so that the source voltage of transistor Qa (potential at external terminal P1) is equal to the input voltage of the non-inverting input terminal (reference voltage Vdet_in).

[0026] The above-mentioned amplifier (AMP) is configured as, for example, as shown in Figure 2, by a differential amplifier circuit consisting of differential input transistors Q31 and Q32 and active load transistors Q33 and Q34, to which the reference voltage Vdet_in and the voltage Vdet from external terminal P1 are input to the gate terminals, and a constant current source CC1. The gate terminal of transistor Qa is connected to the connection node N1 between transistors Q32 and Q34, thereby operating as a current buffer that allows a predetermined drain current to flow through transistor Qa. Note that the circuit shown in Figure 2 is just one example and is not limited to such a configuration.

[0027] Here, we will describe the characteristics of the voltage converter 14 mentioned above. In the voltage converter 14 of this embodiment, due to the function of the current buffer 14a, the voltage Vdet at the external terminal P1 is equal to the reference voltage Vdet_in, that is, Vdet = Vdet_in. Therefore, the current Idet that flows through the external resistor Rdet due to the current buffer 14a is, Idet = Vdet / Rdet = Vdet_in / Rdet Therefore, the comparison reference voltage Vth, which is generated by the transformation of the current Idet' obtained by folding Idet through the current mirror circuit 14b by the resistor Rth through which it flows, is given by the following equation (1), where m is the current mirror ratio. Vth=Rth*Idet'=Rth*Idet / m ……(1) It is represented as follows.

[0028] On the other hand, the output current Iout1 of the output terminal OUT1 is converted to a voltage Vout1' by passing the current Iout1' generated by the current mirror (n) of transistors Q11 and Q12 through resistor R13. Therefore, if the ratio of Q11 to Q12 is n, then equation (2) is given by the following equation. Vout1'=R13*Iout1'=R13*Iout1 / n ……(2) This will be represented as follows. Comparator CMP1 compares the voltage given by equation (1) with the voltage given by equation (2) above, determining that it is an open circuit if Vout1' ≤ Vtho, and a short circuit if Vout1' ≥ Vths. Therefore, by connecting an external resistor Rdet with a resistance value such that Vth = Vtho to the external terminal P1, comparator CMP1 can function as an open circuit abnormality detection means, and by connecting an external resistor Rdet with a resistance value such that Vth = Vths to the external terminal P1, comparator CMP1 can function as a short circuit abnormality detection means.

[0029] Here, since both the internal resistance R13 and Rth of the IC are on-chip elements, their relative ratio is good (approximately ±0.5%), and variations in temperature characteristics due to manufacturing variations are canceled out. On the other hand, the reference voltage Vdet_in of the voltage converter 14 can generate a highly accurate reference voltage using a band gap, etc., and the external resistor Rdet that generates Idet is a discrete component with good accuracy and temperature characteristics, and highly accurate resistors (resistance accuracy of about ±1%, temperature characteristics of about ±100 ppm / °C) can be manufactured or obtained. Therefore, a highly accurate comparison reference voltage Vth can be set, and the accuracy of open-circuit anomaly detection or short-circuit anomaly detection can be improved.

[0030] The same applies to the output current Iout2 of output terminal OUT2, and the voltage converter 14 and comparator CMP2 enable highly accurate detection of open-circuit or short-circuit abnormalities. Furthermore, if the loads connected to output terminals OUT1 and OUT2 have the same characteristics and draw the same current, the same comparison reference voltage Vth can be used for comparators CMP1 and CMP2. In this case, the voltage converter 14 can be shared, as in the regulator IC10 of this embodiment, and the comparison reference voltage Vth can be set by providing one external terminal P1 and one external resistor Rdet.

[0031] As described above, in the regulator IC10 of this embodiment, when equivalent loads are connected to the output terminals OUT1 and OUT2, an open circuit or short circuit abnormality can be detected by simply providing one external terminal to which an external resistor Rdet is connected, thus reducing the chip size. Furthermore, the reduction in terminals and components allows for the use of a small and inexpensive package, achieving space savings and cost reduction in the power supply unit. Furthermore, by changing the resistance value of the external resistor Rdet, the threshold for detecting open-circuit or short-circuit abnormalities can be easily changed, thus expanding the applications of the IC.

[0032] Although not shown in Figure 1, a current limit circuit connected to the gate terminals of transistors Q11 and Q21 to limit the output current, and a thermal shutdown circuit that stops the operation of error amplifiers 11A and 11B and turns off transistors Q11 and Q21 when the chip temperature rises above a predetermined temperature may be provided. The operating signals of the current limit circuit and the thermal shutdown circuit are also supplied to the logic circuit 15, and the logic is taken with the output signals of comparators CMP1 and CMP2 to generate, for example, a 2-bit or 3-bit abnormality detection signal Err, which is then output to the outside of the chip. Alternatively, the regulator IC 10 may be provided with an external terminal CE to which a signal for turning the IC's operation on or off is input, and the bias circuit 13 may be provided with a function to supply or cut off bias current to the error amplifiers 11A and 11B in response to a control signal input to the external terminal CE from an external microcontroller (CPU) or the like.

[0033] (modified version) Next, a modified example of the regulator IC of the above embodiment will be described with reference to Figure 3. In the regulator IC of the above embodiment (Figure 1), one external terminal P1 for connecting an external resistor Rdet and one voltage converter 14 are provided, and two comparators CMP1 and CMP2 are used to detect either an open or short circuit of the two output terminals OUT1 and OUT2. In contrast, in the regulator IC of this modified example (Figure 3), two external terminals for connecting an external resistor Rdet and two voltage converters 14 are provided, and four comparators CMP1 to CMP4 are used to detect both an open and a short circuit of the two output terminals OUT1 and OUT2, and a 2-bit abnormality detection signal Err is output from the logic circuit 15.

[0034] Specifically, the output terminal OUT1 is connected to a transistor Q11 for output current control, and two output current detection transistors Q12 and Q13 are connected via a current mirror. The output terminal OUT2 is connected to a transistor Q21 for output current control, and two output current detection transistors Q22 and Q23 are connected via a current mirror. On-chip resistors R13, R14 and R23, R24 for current-to-voltage conversion are connected in series with transistors Q12, Q13 and transistors Q22, Q23.

[0035] Furthermore, external terminals P1 and P2 for connecting resistors Rdet1 and Rdet2, and voltage converters 14A and 14B are provided, as well as four comparators CMP1 to CMP4. Comparators CMP1 and CMP3 are configured to compare the comparison reference voltage Vths for short-circuit detection generated by voltage converter 14A with the voltage converted by resistors R13 and R23, while comparators CMP2 and CMP4 are configured to compare the comparison reference voltage Vtho for open-circuit detection generated by voltage converter 14B with the voltage converted by resistors R14 and R24.

[0036] Furthermore, two open-drain output transistors Q5 and Q6 and external terminals P3 and P4 are provided to output anomaly detection signals. The logic circuit 15 is configured to receive the output signals from comparators CMP1 to CMP4, detect one-channel open, two-channel open, one-channel short, and two-channel short states, and distinguish and output them using two-bit anomaly detection signals Err_1 and Err_2. In this modified example, a current limit circuit and a thermal shutdown circuit may be provided, connected to the gate terminals of transistors Q11 and Q21 to limit the output current. The operating signals of the current limit circuit and the thermal shutdown circuit are also supplied to the logic circuit 15, and a 3-bit abnormality detection signal is generated by taking logic with the output signals of comparators CMP1 to CMP4 and outputting it to the outside of the chip.

[0037] Although the present inventors' invention has been described in detail above based on embodiments, the present invention is not limited to the above embodiments. For example, in the above embodiments, a MOS transistor was used as the transistor constituting the internal circuit of the regulator IC 10, but a bipolar transistor may be used instead of a MOS transistor.

[0038] Furthermore, although the above embodiment of the regulator IC was described assuming a configuration as an in-vehicle power supply for digital terrestrial television with an antenna connected as a load to the output terminal OUT, the load is not limited to an antenna, and the power supply can also be applied to power supplies to which two or more loads with the same current consumption are connected. Furthermore, although the above embodiments described the case in which the present invention is applied to a regulator IC, the present invention is not limited to regulator ICs, and can also be applied to ICs that constitute a switching regulator type DC-DC converter or to high-side switch ICs. [Explanation of symbols]

[0039] 10…Regulator IC, 11…Error amplifier, 12…Reference voltage circuit, 13…Bias circuit, 14, 14A, 14B…Voltage converter, 14a…Current buffer (voltage-current conversion circuit), 14b…Current mirror circuit, 15…Logic circuit, CMP1, CMP2…Open / short anomaly detection comparators, Q11, Q21…Current control transistors, Q12, Q13, Q22, Q23…Current mirror transistors, Q5, Q6…Anomaly detection signal output transistors, P1, P2…External terminals (resistor connection terminals), P3, P4…External terminals (detection result output terminals)

Claims

1. A power supply device comprising one input terminal and multiple output terminals, multiple first current control elements connected between the input terminal and the multiple output terminals, and a control circuit for controlling the multiple first current control elements, The circuit includes multiple voltage comparison circuits that compare voltages proportional to the voltages of the multiple output terminals with a predetermined threshold voltage, and an abnormality detection circuit that detects an abnormal state in which each of the multiple output terminals is open or short-circuited. The system includes a voltage conversion circuit that generates a predetermined threshold voltage, which is applied in common to one of the input terminals of the plurality of voltage comparison circuits, in accordance with the potential difference across the current setting resistor caused by passing current through the current setting resistor. A power supply device characterized by being configured to notify an external party of the abnormal condition detected by the abnormality detection circuit.

2. The abnormality detection circuit includes a plurality of second current control elements that supply a current proportionally reduced to the current flowing through each of the plurality of first current control elements, and a plurality of current-voltage conversion elements that convert the current flowing through the second current control elements into a voltage, and the plurality of voltage comparison circuits compare the voltages converted by the plurality of current-voltage conversion elements with a predetermined threshold voltage and output a result of magnitude or magnitude, as described in claim 1.

3. The power supply device according to claim 1, characterized in that the voltage conversion circuit comprises a voltage-current conversion circuit that generates a current corresponding to the current setting resistor, a current mirror circuit that transfers the current generated by the voltage-current conversion circuit, and a current-voltage conversion element that converts the output current of the current mirror circuit into a voltage.

4. The power supply device according to claim 3, characterized in that the first terminal of the current setting resistor is connected to ground potential.

5. The aforementioned voltage-current conversion circuit is A differential amplifier circuit in which the potential of the second terminal of the current setting resistor is applied to the inverting input terminal and a predetermined constant voltage is applied to the non-inverting input terminal, A transistor is provided in which the source terminal is connected to the second terminal of the current setting resistor, the output voltage of the differential amplifier circuit is applied to the gate terminal, and the current mirror circuit is connected to the drain terminal, The power supply device according to claim 4, characterized by having the following features.

6. The system comprises two of the aforementioned voltage conversion circuits, The voltage conversion circuit generates the threshold voltage for detecting the open state of the plurality of output terminals, The other voltage conversion circuit generates the threshold voltage for detecting a short-circuit state of the plurality of output terminals, as described in claim 1.

7. It is equipped with multiple abnormal condition output terminals for notifying the aforementioned abnormal condition to the outside, The power supply device according to claim 1, further comprising a logic circuit that receives the output signals of the plurality of voltage comparison circuits, distinguishes between the open state and the short state of each of the plurality of output terminals, and generates a plurality of bit output signals for outputting to the outside from the plurality of abnormal state output terminals.

8. The power supply device according to claim 1, characterized in that each of the plurality of output terminals is a tuner or an antenna.

9. The current is varied according to the resistance value of the current setting resistor. By setting the resistance value of the current setting resistor to a large value, a low threshold voltage is generated, thereby detecting an open state. The power supply device according to claim 1, characterized in that a short circuit condition is detected by generating a high threshold voltage by setting the resistance value of the current setting resistor to a small value.

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