Apparatus for splitting processed wafers and method for splitting processed wafers

Abstract

To suppress cracking when dividing processed wafers.SOLUTION: A processed wafer dividing device includes a housing 110 that accommodates a processed wafer 10 and is filled with a working fluid 170, a closing portion 160 that is slidable along the axial direction of the housing 110 while closing the other end side of the housing 110, a first seal member holder 130 that is disposed at the bottom of the housing 110 and includes a seal member 120 that is in close contact with the first main surfaces 10a, 10b of the processed wafer at a portion outside the through hole 111a in the axial direction, and a second seal member holding portion 150 in which a seal member 140 is disposed on the side of the housing 110 so as to be slidable along the axial direction and is in close contact with the second main surfaces 10a, 10b of the processed wafer 10, and the processed wafer 10 is divided starting from an altered layer 15 by using the working fluid in the housing 110.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to a processing wafer splitting apparatus and a processing wafer splitting method for splitting a processed wafer made of gallium nitride (hereinafter also simply referred to as GaN). [Background technology]

[0002] Conventionally, a method has been proposed for manufacturing semiconductor chips by dividing a processed wafer made of GaN (see, for example, Patent Document 1). Specifically, in this manufacturing method, after preparing the processed wafer, a modified layer is formed by irradiating it with laser light. Then, a holding jig is placed so as to sandwich the processed wafer, and tensile stress or the like is applied in the thickness direction of the processed wafer by the holding jig, thereby dividing the processed wafer with the modified layer as the starting point for division. In this manufacturing method, one portion divided from the processed wafer is used as a chip-constituting wafer, and a semiconductor chip is constructed using this chip-constituting wafer. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2021-170596 [Overview of the project] [Problems that the invention aims to solve]

[0004] However, in this manufacturing method, when separating the chip component wafer from the processed wafer, tensile stress and other stresses are applied in the thickness direction of the processed wafer using a holding jig, so a large stress is applied to the processed wafer at the moment of separation. Therefore, if macroscopic scratches or defects exist in the processed wafer, stress will concentrate in those areas along with the altered layer, potentially causing the processed wafer to crack.

[0005] In view of the above, the present invention aims to provide a processing wafer splitting apparatus and a processing wafer splitting method that can suppress cracking. [Means for solving the problem]

[0006] Claim 1 for achieving the above objective is a splitting apparatus for splitting a processed wafer (10) having a modified layer (15) formed inside that is more brittle than the surrounding portion, comprising: a cylindrical housing (110) having a through hole (111a) formed at the bottom (111) of one end and an opening (113) at the other end, and a side portion (112) connecting the one end and the other end, which houses the processed wafer having a modified layer formed inside in a direction intersecting the thickness direction and is filled with working fluid (170, 190); and a housing that closes the other end of the housing, The device comprises a slidable closing portion (160) along the axial direction of the jigging, a first seal member holding portion (130) located at the bottom of the housing and having a seal member (120) positioned in close contact with the first main surfaces (10a, 10b) of the processed wafer in the axial direction, outside the through-hole, and a second seal member holding portion (150) located on the side of the housing and having a seal member (140) positioned in close contact with the second main surfaces (10a, 10b) of the processed wafer, and uses a working fluid within the housing to split the processed wafer starting from the altered layer.

[0007] According to this, since the splitting device divides the processed wafer by pressurizing the working fluid, the pressure applied to the processed wafer is static pressure. Therefore, compared to cases where tensile stress or the like is applied in the thickness direction of the processed wafer to split it, it is possible to suppress the instantaneous stress that is applied becoming too large. Consequently, it is possible to suppress the occurrence of cracks in the processed wafer when splitting it.

[0008] Claim 5 is a method for dividing a processed wafer (10) having a modified layer (15) formed inside that is more brittle than the surrounding portion, comprising: providing a cylindrical housing (110) having a through hole (111a) formed at the bottom (111) of one end and an opening (113) at the other end, and having a side portion (112) connecting the one end and the other end, which houses the processed wafer and is filled with working fluid (170, 190); and a first main surface (10a, 10b) Prepare a processed wafer having a second main surface (10a, 10b) opposite to the first main surface, and having a modified layer formed inside along a direction intersecting the thickness direction; place the processed wafer at the bottom of the housing such that a portion of the first main surface (10a, 10b) of the processed wafer is exposed through the through hole; fill the housing with working fluid (170, 190); and use the working fluid in the housing to divide the processed wafer starting from the modified layer.

[0009] According to this method, since the wafer is divided by pressurizing the working fluid, the pressure applied to the wafer is static pressure. Therefore, compared to the method of dividing the wafer by applying tensile stress in the thickness direction of the wafer, it is possible to suppress the instantaneous stress that is applied. Consequently, it is possible to suppress the occurrence of cracks in the wafer when dividing it.

[0010] The reference numerals in parentheses attached to each component indicate an example of the correspondence between that component and the specific components described in the embodiments described later. [Brief explanation of the drawing]

[0011] [Figure 1A] This is a cross-sectional view showing the manufacturing process of semiconductor chips. [Figure 1B] This is a cross-sectional view showing the semiconductor chip manufacturing process, following Figure 1A. [Figure 1C] This is a cross-sectional view showing the semiconductor chip manufacturing process, following Figure 1B. [Figure 1D] This is a cross-sectional view showing the semiconductor chip manufacturing process, following Figure 1C. [Figure 1E] It is a cross-sectional view showing the manufacturing process of a semiconductor chip following FIG. 1D. [Figure 1F] It is a cross-sectional view showing the manufacturing process of a semiconductor chip following FIG. 1E. [Figure 1G] It is a cross-sectional view showing the manufacturing process of a semiconductor chip following FIG. 1F. [Figure 1H] It is a cross-sectional view showing the manufacturing process of a semiconductor chip following FIG. 1G. [Figure 1I] It is a cross-sectional view showing the manufacturing process of a semiconductor chip following FIG. 1H. [Figure 1J] It is a cross-sectional view showing the manufacturing process of a semiconductor chip following FIG. 1I. [Figure 2] It is a schematic diagram showing the state of the altered layer. [Figure 3] It is a view showing the positional relationship between the processed wafer and the first sealing member. [Figure 4] It is a cross-sectional view showing the manufacturing process of a semiconductor chip in the second embodiment. [Figure 5] It is a cross-sectional view showing the manufacturing process of a semiconductor chip in the third embodiment. [Figure 6] It is a cross-sectional view showing the manufacturing process of a semiconductor chip in the fourth embodiment. [Figure 7] It is a cross-sectional view showing the manufacturing process of a semiconductor chip in the fifth embodiment. [Figure 8] It is an enlarged schematic view of part XIII in FIG. 7. [Figure 9] It is a cross-sectional view showing the manufacturing process of a semiconductor chip in the sixth embodiment. [Figure 10] It is a cross-sectional view showing the manufacturing process of a semiconductor chip in the seventh embodiment. [Figure 11] It is a plan view showing the manufacturing process of a semiconductor chip in the eighth embodiment. [Figure 12] It is a cross-sectional view showing the manufacturing process of a semiconductor chip in other embodiments.

Embodiments for Carrying Out the Invention

[0012] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are identical or equivalent to each other will be described with the same reference numerals.

[0013] (First Embodiment) The first embodiment will be described while referring to the drawings. Hereinafter, a method for manufacturing a semiconductor chip S1 including a method for dividing a processing wafer 10 formed of GaN will be described.

[0014] First, as shown in FIG. 1A, a GaN wafer 1 having one surface 1a and the other surface 1b and having a bulk wafer shape is prepared. For example, the GaN wafer 1 is doped with silicon, oxygen, germanium, etc., and has an impurity concentration of 5×10 17 ~5×10 19 cm -3 and is used. The thickness of the GaN wafer 1 is arbitrary, but for example, a wafer having a thickness of about 400 μm is prepared. In addition, in the GaN wafer 1 of the present embodiment, one surface 1a is a gallium surface and the other surface 1b is a nitrogen surface. Further, after performing the manufacturing process of the semiconductor chip S1 described below, the GaN wafer 1 is prepared by reusing the recycling wafer 40 shown in FIG. 1L described later.

[0015] Next, as shown in FIG. 1B, an epitaxial film 3 formed of GaN having a thickness of about 10 to 100 μm is formed on one surface 1a of the GaN wafer 1, thereby preparing a processing wafer 10 in which a plurality of chip formation regions RA are partitioned by a dicing line DL. In the present embodiment, the epitaxial film 3 is composed of an n + -type epitaxial layer 3a and an n - -type epitaxial layer 3b formed in this order from the GaN wafer 1 side. For example, the n + -type epitaxial layer 3a is doped with silicon, oxygen, germanium, etc., and has an impurity concentration of 5×10 17 ~5×10 19 cm -3 or so. The n -The type epitaxial layer 3b is dopanted with silicon, etc., and has an impurity concentration of 1 × 10⁻⁶ 17 ~4×10 17 cm -3 It is considered to be of a certain degree.

[0016] Note that n - The epitaxial layer 3b is the portion where the one-sided element component portion 11, such as the diffusion layer 12 described later, is formed, and for example, its thickness is about 8 to 10 μm. + The type epitaxial layer 3a is a part that secures the thickness of the semiconductor chip S1, which will be described later, and for example, its thickness is about 40 to 100 μm. + Type epitaxial layers 3a and n - The thickness of the epitaxial layer 3b is arbitrary, but here, to ensure the thickness of the semiconductor chip S1, n + Type epitaxial layer 3a n - It is thicker than the type epitaxial layer 3b.

[0017] In the following, the side of the processed wafer 10 facing the epitaxial film 3 will be referred to as one side 10a of the processed wafer 10, and the side of the processed wafer 10 facing the GaN wafer 1 will be referred to as the other side 10b of the processed wafer 10. Each chip formation region RA is then configured on the side of the processed wafer 10 facing 10a.

[0018] Next, as shown in Figure 1C, a surface-side process, which is a process applied to one side 10a of a typical semiconductor manufacturing process, is performed. Specifically, as a surface-side process, ion implantation, evaporation, wet processes, etc., are performed as appropriate to form one-side element components 11 of a semiconductor element in each chip formation region RA, such as a diffusion layer 12, a gate electrode 13, surface electrodes (not shown), wiring patterns, and passivation films. Various types of semiconductor elements are used here, for example, power devices such as vertical MOS transistors, optical semiconductor elements such as light-emitting diodes, and semiconductor lasers. After that, if necessary, a surface protective film composed of a resist or the like is formed on one side 10a of the processed wafer 10.

[0019] Next, as shown in Figure 1D, a groove 16 is formed in the dicing line DL. The groove 16 may be formed with a dicing blade or by irradiating it with laser light. Furthermore, the depth of this groove 16 is adjusted so that when the altered layer 15, which will be described later, is formed, the altered layer 15 intersects with the groove 16.

[0020] Next, as shown in Figure 1E, a holding member 20 is placed on one side 10a of the processed wafer 10. The holding member 20 is, for example, a dicing tape having a support base 21 and an adhesive 22. The support base 21 is made of a material that is resistant to warping during the manufacturing process, such as glass, a silicon substrate, or ceramics. The adhesive 22 is made of a material whose adhesive strength can be changed, such as one whose adhesive strength changes with temperature or light. The adhesive 22 is made of, for example, an ultraviolet curing resin, wax, or double-sided tape.

[0021] Next, as shown in Figure 1F, laser light L is irradiated from the other side 10b of the processed wafer 10 to form a modified layer 15 along the plane direction of the processed wafer 10 at a predetermined depth D from one side 10a of the processed wafer 10. That is, a modified layer 15 is formed that extends in a direction intersecting the thickness direction of the processed wafer 10.

[0022] Specifically, a laser apparatus is prepared that includes a laser light source that emits laser light L (not shown), a dichroic mirror positioned to change the optical axis (i.e., direction of the optical path) of the laser light, a focusing lens for focusing the laser light, and a displaceable stage. When forming the altered layer 15, the position of the stage and other components is adjusted so that the focal point of the laser light L is scanned relatively along the plane direction of the processed wafer 10. As a result, an altered layer 15 is formed on the processed wafer 10 along the plane direction. More specifically, by irradiating with laser light L, nitrogen evaporates as gas and gallium is deposited to form an altered layer 15. In this case, as shown in Figure 2, the altered layer 15 has an irradiation mark La formed at the focal point of the laser light L, and cracks Lb are generated around the irradiation mark La. Depending on the spacing of the irradiation marks La, the cracks Lb consist of a mixture of areas where the cracks Lb are connected and areas where they are not connected. Therefore, the processed wafer 10 has areas where the part on one side 10a of the altered layer 15 and the part on the other side 10b of the altered layer 15 are connected, and areas where they are not connected.

[0023] In this embodiment, although not particularly limited, the laser light L used to form the altered layer 15 has wavelengths ranging from infrared to visible light and is set considering the transmittance of the target wafer (i.e., the transmittance of GaN). In this embodiment, the altered layer 15 is formed by appropriately adjusting the processing point output and pulse width of such laser light L.

[0024] Furthermore, the predetermined depth D for forming the altered layer 15 is set according to the ease of handling and voltage resistance of the semiconductor chip S1, as described later, and is approximately 10 to 200 μm. In this case, the location where the altered layer 15 is formed changes according to the thickness of the epitaxial film 3, and is formed either inside the epitaxial film 3, at the boundary between the epitaxial film 3 and the GaN wafer 1, or inside the GaN wafer 1. In Figure 1E, an example is shown in which the altered layer 15 is formed at the boundary between the epitaxial film 3 and the GaN wafer 1.

[0025] However, this altered layer 15 is formed so as to intersect with the groove 16. Also, as will be described later, at least a portion of the GaN wafer 1 in the processed wafer 10 is reused as a recycled wafer 40. For this reason, it is preferable that the altered layer 15 be formed inside the epitaxial film 3 or at the boundary between the epitaxial film 3 and the GaN wafer 1. Furthermore, when the altered layer 15 is formed inside the GaN wafer 1, it is preferable that the altered layer 15 be formed on one side 1a of the GaN wafer 1. And when the altered layer 15 is formed inside the epitaxial film 3, the altered layer 15 is formed on n that constitute the semiconductor element. - It is not type epitaxial layer 3b, but n + It is preferable that it be formed inside the type epitaxial layer 3a.

[0026] Next, as shown in Figure 1G, the holding member 20 is detached from the processed wafer 10, and then the processed wafer 10 is placed inside the splitting device 100. The detachment of the holding member 20 is performed by a process that reduces the adhesive strength of the adhesive 22, for example, by UV irradiation if the adhesive 22 is made of UV resin adhesive. In this embodiment, an example is described in which the processed wafer 10 is placed inside the splitting device 100 after the holding member 20 has been detached, but the holding member 20 may remain attached to the processed wafer 10. The splitting device 100 of this embodiment will be described below.

[0027] The splitting device 100 of this embodiment has a housing 110, which is a member for housing the processed wafer 10. The housing 110 is cylindrical in shape, having a bottom portion 111 at one end and an opening 113 at the other end, with a side portion 112 connecting the two ends. The housing 110 has a substantially circular through hole 111a formed in the bottom portion 111. The splitting device 100 also has a first seal member holding portion 130 provided at the bottom portion 111 of the housing 110, which has a groove portion 131 formed to match the shape of the first seal member 120. The first seal member 120 is made of an O-ring or the like, and the groove portion 131 is formed in an annular shape to match the shape of the O-ring.

[0028] The splitting device 100 is held on the side portion 112 of the housing 110 so as to be slidable along the axial direction of the housing 110 (i.e., the vertical direction of the paper), and includes a second seal member holding portion 150 with a groove portion 151 formed therein that matches the shape of the second seal member 140. The second seal member 140 is made of an O-ring or the like, and the groove portion 151 is formed in an annular shape to match the shape of the O-ring. In addition, a communication hole 152 is formed in the second seal member holding portion 150 on the outer edge side of the groove portion 151. The communication hole 152 is formed inside the housing 110 to connect the portion on the bottom portion 111 side with the portion on the opening portion 113 side, with the second seal member holding portion 150 in between, and in this embodiment, multiple communication holes are formed.

[0029] Furthermore, the splitting device 100 is slidably mounted along the side portion 112 and has a closing portion 160 that closes the opening 113. The above describes the configuration of the splitting device 100 in this embodiment.

[0030] When the processed wafer 10 is placed in the splitting device 100, the processed wafer 10 is positioned so that one side 10a of the processed wafer 10 is located on the bottom side 111. Specifically, the chip formation region RA is arranged on the inner edge side of the processed wafer 10, as shown in Figure 3. The processed wafer 10 is then positioned so that the first sealing member 120 is pressed against the outer edge of one side 10a, and the second sealing member 140 is pressed against the outer edge of the other side 10b.

[0031] Figure 3 shows the positional relationship on one side 10a of the processed wafer 10, but the other side 10b of the processed wafer 10 has a similar positional relationship. That is, the first sealing member 120 and the second sealing member 140 are arranged approximately symmetrically with respect to the processed wafer 10. The outer edge side of the processed wafer 10 refers to the side of the outer edge that will become the chip formation region RA. The portion of the processed wafer 10 exposed through the through hole 111a is subjected to a pressure P2, which is atmospheric pressure. In this embodiment, one side 10a of the processed wafer 10 corresponds to the first main surface, and the other side 10b of the processed wafer 10 corresponds to the second main surface.

[0032] Subsequently, in this embodiment, the splitting device 100 is filled with liquid 170 as a working fluid. In this embodiment, a communication hole 152 is formed in the second seal member holding portion 150, and the inside of the housing 110 is filled with liquid 170 through the communication hole 152 up to the bottom 111 side. As a result, a pressure P1 of liquid 170 is applied to the other side 10b of the processed wafer 10.

[0033] Next, as shown in Figure 1H, the closure portion 160 is slid toward the bottom portion 111, compressing the liquid 170 so that the pressure P1 becomes greater than the pressure P2. In other words, the working fluid is pressurized. As a result, the processed wafer 10 deforms so that one side 10a becomes convex. At this time, a modified layer 15 is formed inside the processed wafer 10, and since the modified layer 15 has a collapsed crystal structure and is more brittle than the surrounding part, it is divided starting from the modified layer 15. In this embodiment, since a groove 16 is formed in the dicing line DL, by dividing the processed wafer 10 at the modified layer 15, individual semiconductor chips S1 as shown in Figure 1I are produced. Note that the pressure P1 applied to the other side 10b of the processed wafer 10 in this process is a static pressure due to the compression of the liquid 170. Therefore, compared to, for example, the case where the processed wafer 10 is divided by applying tensile stress in the thickness direction of the processed wafer 10, it is possible to suppress the stress applied instantaneously to the processed wafer 10 from becoming too large. Therefore, when dividing the processed wafer 10, it is possible to suppress the occurrence of cracks in the processed wafer 10.

[0034] In the following steps from Figure 1I onward, the divided side of the semiconductor chip S1 obtained by dividing the processed wafer 10 will be described as the back surface 30b. The portion of the processed wafer 10 on the other side 10b from the altered layer 15 will be described as the recycled wafer 40, and the divided side of the recycled wafer 40 will be described as the first surface 40a. In each of the figures from Figure 1I onward, the altered layer 15 and other elements remaining on the back surface 30b of the semiconductor chip S1 and the first surface 40a of the recycled wafer 40 will be omitted as appropriate.

[0035] Next, as shown in Figure 1I, the remaining semiconductor manufacturing process involves a back-side process in which the other-side element component portion 60 of the semiconductor element, such as the metal film 61 constituting the back electrode, is formed on the back surface 30b of the semiconductor chip S1. In this way, a semiconductor chip S1 with the desired semiconductor element is manufactured. Note that the process in Figure 1I was explained using a single semiconductor chip S1 as an example. However, when the processed wafer 10 is divided with the holding member 20 in place, each semiconductor chip S1 is held integrally by the holding member 20. In this case, the process in Figure 1I is performed integrally for each semiconductor chip S1 held by the holding member 20.

[0036] Furthermore, prior to the process of forming the other-side element component portion 60, a process of planarizing the back surface 30b of the semiconductor chip S1 by CMP (chemical mechanical polishing) or the like may be performed as needed. Figure 1I shows a diagram of the semiconductor chip S1 after the back surface 30b has been planarized. After the process of forming the other-side element component portion 60, a heat treatment such as laser annealing may be performed as needed to create ohmic contact between the metal film 61 and the semiconductor chip S1.

[0037] Furthermore, as shown in Figure 1J, the recycled wafer 40 configured in Figure 1H is planarized by performing a CMP method on one surface 40a using a polishing device 70 or the like. The planarized recycled wafer 40 is then made into a GaN wafer 1, and the processes from Figure 1A onwards are repeated. As a result, the GaN wafer 1 can be used multiple times to construct a semiconductor chip S1.

[0038] According to the embodiment described above, when dividing the processed wafer 10, static pressure is applied to divide the wafer 10. Therefore, compared to the case where tensile stress or the like is applied in the thickness direction of the processed wafer 10 to divide the wafer 10, it is possible to suppress the instantaneous stress from becoming too large. Consequently, when dividing the processed wafer 10, it is possible to suppress the occurrence of cracks in the processed wafer 10.

[0039] (1) In this embodiment, water is used as the liquid 170 that becomes pressure P1, and atmospheric pressure is used as pressure P2. Therefore, compared to the case in which pressures P1 and P2 are made of special materials, the configuration of the splitting device 100 and the manufacturing process can be simplified.

[0040] (2) In this embodiment, the processed wafer 10 is divided by deforming the processed wafer 10 so that one surface 10a of the processed wafer 10 is exposed from the liquid 170 and the surface 10a side becomes convex. Therefore, it is not necessary to consider the effect of the liquid 170 on the semiconductor elements formed on the surface 10a side, and the configuration of the dividing device 100 and the manufacturing process can be simplified.

[0041] (3) In this embodiment, the processed wafer 10 is placed inside the splitting device 100 and the processed wafer 10 is split. In this case, by forming multiple through holes 111a, multiple processed wafers 10 can be placed inside the splitting device 100 at the same time. For this reason, a batch type can be used to split multiple processed wafers 10 at the same time, thereby improving throughput.

[0042] (4) In this embodiment, grooves 16 are formed in the dicing line DL before the processed wafer 10 is divided. Therefore, when the processed wafer 10 is deformed so that one side 10a becomes convex, it is pushed in a direction that widens the spacing between semiconductor chips S1 (i.e., chip formation region RA), making it easier to divide at the altered layer 15.

[0043] (Second Embodiment) A second embodiment will now be described. This embodiment differs from the first embodiment in that the method of applying static pressure when dividing the processed wafer 10 is changed. Other aspects are the same as in the first embodiment, so a detailed explanation will be omitted here.

[0044] The basic configuration of the dividing device 100 in this embodiment is the same as that of the first embodiment described above. However, as shown in Figure 4, the dividing device 100 in this embodiment has a housing 110 and is equipped with a heating device 180 capable of heating the housing 110 (i.e., the liquid 170). In this embodiment, the heating device 180 is configured as a heating furnace. The configuration of the heating device 180 can be changed as appropriate. For example, the heating device 180 may be configured as a heating resistance heater or the like, which is placed inside the housing 110 and directly heats the liquid 170.

[0045] In this embodiment, when dividing the processed wafer 10 starting from the altered layer 15, the liquid 170 is heated in the heating device 180 so that the pressure P1 of the liquid 170 becomes greater than the pressure P2. As a result, the processed wafer 10 deforms so that one side 10a becomes convex, and is divided starting from the altered layer 15. When heating the liquid 170, it is preferable to heat the processed wafer 10 to a temperature of approximately 30°C or higher, which is the melting point of metallic gallium. This lowers the pressure required for the metallic gallium present in the altered layer 15 to liquefy and divide, making it easier to divide the processed wafer 10. Furthermore, even if the liquid 170 is heated in this way and its pressure P1 is increased, the pressure applied to the other side 10b of the processed wafer 10 remains static pressure.

[0046] As described above in this embodiment, even if the liquid 170 is heated in the heating device 180 so that the pressure P1 of the liquid 170 becomes greater than the pressure P2, the pressure applied to the other surface 10b of the processed wafer 10 becomes a static pressure, and the same effects as in the first embodiment can be obtained.

[0047] (1) In this embodiment, the processed wafer 10 can be easily divided by heating the liquid 170 to a temperature above the melting point of metallic gallium.

[0048] (Third embodiment) A third embodiment will now be described. This embodiment differs from the first embodiment in that the working fluid used when dividing the processed wafer 10 is changed. Other aspects are the same as in the first embodiment, so a detailed explanation will be omitted here.

[0049] The basic configuration of the splitting device 100 of this embodiment is the same as that of the first embodiment described above. However, in the splitting device 100 of this embodiment, as shown in Figure 5, the housing 110 is filled with a gas 190 as a working fluid. The gas may be air or a noble gas.

[0050] In this embodiment, when dividing the processed wafer 10 starting from the altered layer 15, the closure portion 160 is slid to compress the gas 190, causing the pressure P1 of the gas 190 to become greater than the pressure P2. As a result, the processed wafer 10 deforms so that one side 10a becomes convex, and is divided starting from the altered layer 15. Note that even if the gas 190 is compressed in this way and its pressure P1 is increased, the pressure applied to the other side 10b of the processed wafer 10 remains static pressure.

[0051] As described above in this embodiment, even if the working fluid is a gas 190, the pressure applied to the other surface 10b of the processed wafer 10 becomes a static pressure, and the same effects as in the first embodiment can be obtained.

[0052] (Fourth Embodiment) A fourth embodiment will now be described. This embodiment is different from the first embodiment in that the splitting device 100 is equipped with an imaging unit. Other aspects are the same as in the first embodiment, so a detailed explanation will be omitted here.

[0053] The basic configuration of the splitting apparatus 100 in this embodiment is the same as that of the first embodiment described above. However, the splitting apparatus 100 in this embodiment is equipped with a camera 200 as an imaging unit, as shown in Figure 6. In this embodiment, since GaN is generally transparent, when splitting the processed wafer 10 starting from the altered layer 15, the state of the crack Lb in the altered layer 15 is checked using the camera 200.

[0054] According to the embodiment described above, static pressure is applied when the processed wafer 10 is divided, so the same effects as in the first embodiment can be obtained.

[0055] (1) In this embodiment, when dividing the processed wafer 10 starting from the altered layer 15, the process is carried out while checking the state of the crack Lb in the altered layer 15 with the camera 200. This makes it easier to determine when the division of the processed wafer 10 is complete, and simplifies the manufacturing process.

[0056] (Fifth embodiment) A fifth embodiment will now be described. This embodiment modifies the principle for dividing the processed wafer 10 compared to the first embodiment. Other aspects are the same as in the first embodiment, so a detailed explanation will be omitted here.

[0057] In this embodiment, when the processed wafer 10 is placed in the splitting device 100, the processed wafer 10 is positioned so that the other side 10b of the processed wafer 10 is located towards the bottom 111, as shown in Figure 7. Then, in this embodiment, the housing 110 is filled with liquid 170 as the working fluid. At this time, the liquid 170 also enters the grooves 16 formed in the processed wafer 10. In this embodiment, the other side 10b of the processed wafer 10 corresponds to the first main surface, and the one side 10a of the processed wafer 10 corresponds to the second main surface. In this embodiment, for example, water is used as the liquid 170.

[0058] Subsequently, when dividing the processed wafer 10 starting from the altered layer 15, the closure portion 160 is slid to compress the liquid 170, causing the pressure P1 of the liquid 170 to become greater than the pressure P2. As a result, as shown in Figure 8, pressure P1 is also applied to the liquid 170 that has entered the dicing line DL, and as pressure P1 becomes greater than pressure P2, the liquid 170 also enters the altered layer 15. Then, due to the static pressure of the liquid 170, the crack portion Lb propagates within the altered layer 15, and the processed wafer 10 is divided starting from the altered layer 15. Note that the gate electrode 13 is omitted in Figure 8.

[0059] As described above in this embodiment, even if the processed wafer 10 is divided by the altered layer 15 by impregnating it with liquid 170, the same effects as in the first embodiment can be obtained because the pressure applied to the altered layer 15 is static pressure.

[0060] (Modified version of the fifth embodiment) In the fifth embodiment described above, an example was given in which water is used as the working fluid, liquid 170. However, liquid 170 may be something other than water; for example, a liquid with a lower surface tension than water and a chemically stable composition may be used. For example, since water has a surface tension of 72.8 mN / m at a temperature of 20°C, ethanol with a surface tension of 22.6 mN / m, hexane with a surface tension of 18.4 mN / m, or the inert liquid Fluorinert with a surface tension of 15-16 mN / m may be used. Because these liquids have lower surface tension than water, it becomes easier to fill the dicing line DL with liquid 170, and it becomes easier for the liquid 170 to penetrate the altered layer 15. Therefore, even if a deep groove 16 with a high aspect ratio is formed, it can be easily accommodated.

[0061] (Sixth Embodiment) A sixth embodiment will now be described. This embodiment is different from the fifth embodiment in that the dividing device 100 is equipped with a support portion. Other aspects are the same as in the fifth embodiment, so a detailed explanation will be omitted here.

[0062] The basic configuration of the splitting apparatus 100 of this embodiment is the same as that of the first embodiment described above. However, as shown in Figure 9, the splitting apparatus 100 of this embodiment is provided with a support portion 114 that supports the other surface 10b of the processed wafer 10. The support portion 114 of this embodiment has a base portion 114a provided in the through hole 111a and a rod-shaped support rod 114b provided on the base portion 114a and protruding along the axial direction of the housing 110. The support rod 114b extends to a portion where the position of the tip in the protruding direction is approximately the same as that of the first sealing member 120.

[0063] When the processed wafer 10 is placed in the splitting device 100, it is positioned so that the other side 10b is in contact with the support portion 114.

[0064] When dividing the processed wafer 10 starting from the altered layer 15, the same process as in the fifth embodiment is performed. In this case, since the processed wafer 10 is supported by the support rod 114b, it is possible to suppress the warping of the processed wafer 10 so that it becomes convex toward the other surface 10b. Therefore, if a defect such as a crack different from the altered layer 15 occurs in the processed wafer 10, it is possible to suppress it from cracking from that defect. In addition, since the warping of the processed wafer 10 is suppressed, the warping of the chip formation region RA is also suppressed, and fluctuations in the characteristics of the manufactured semiconductor chip S1 can be suppressed.

[0065] Furthermore, the portion of the processed wafer 10 supported by the support portion 114 is subjected to the same pressure P1 as that applied to one side 10a of the processed wafer 10. Therefore, the altered layer 15 located on the portion supported by the support portion 114 is not penetrated by the liquid 170 and is less prone to splitting. Accordingly, in this embodiment, the one-side element component portion 11 is not formed in the chip formation region RA on the portion supported by the support portion 114.

[0066] According to the embodiment described above, static pressure is applied when the processed wafer 10 is divided, so the same effects as in the first embodiment can be obtained.

[0067] (1) In this embodiment, the other side 10b of the processed wafer 10 is supported by the support portion 114. Therefore, when the processed wafer 10 is divided, it is possible to suppress the processed wafer 10 from warping so that it becomes convex toward the other side 10b. Consequently, if a defect such as a crack different from the altered layer 15 occurs in the processed wafer 10, it is possible to suppress it from cracking from the defect. In addition, since the warping of the processed wafer 10 is suppressed, the warping of the chip formation region RA is also suppressed, and fluctuations in the characteristics of the manufactured semiconductor chip S1 can be suppressed.

[0068] (Seventh Embodiment) A seventh embodiment will now be described. In this embodiment, a holding sheet is placed when dividing the processed wafer 10, compared to the fifth embodiment. Other aspects are the same as in the fifth embodiment, so a detailed explanation will be omitted here.

[0069] First, in the division method of the fifth embodiment described above, since the processed wafer 10 is divided by the altered layer 15 after forming a groove 16 along the dicing line DL, there is a possibility that each piece will float separately in the liquid 170 after division. For this reason, in this embodiment, as shown in Figure 10, a retaining sheet 210 that does not obstruct the infiltration of the liquid 170 into the groove 16 is placed on one surface 10a of the processed wafer 10. Such a retaining sheet 210 is one that can maintain communication between the space inside the groove 16 and the space outside the groove 16, and for example, a mesh-like adhesive sheet or an adhesive sheet with holes formed in the part facing the groove 16 can be used.

[0070] According to the embodiment described above, static pressure is applied when the processed wafer 10 is divided, so the same effects as in the first embodiment can be obtained.

[0071] (1) In this embodiment, the retaining sheet 210 is placed on one side 10a of the processed wafer 10. Therefore, even after the processed wafer 10 is divided, each piece adheres to the retaining sheet 210, which prevents each piece from floating around in the liquid 170.

[0072] (Eighth embodiment) The eighth embodiment will now be described. This embodiment specifies the details of the altered layer 15 formed on the processed wafer 10, compared to the fifth embodiment. Other aspects are the same as in the fifth embodiment, so their explanation will be omitted here.

[0073] A modified layer 15 is formed on the processed wafer 10 in the same manner as in the first embodiment described above. In this embodiment, as shown in Figure 11, the modified layer 15 is formed in the chip formation region RA such that the irradiation marks La are denser on the outer edge on the groove 16 side than on the inner edge.

[0074] According to the embodiment described above, static pressure is applied when the processed wafer 10 is divided, so the same effects as in the third embodiment can be obtained.

[0075] (1) In this embodiment, in the chip formation region RA, the altered layer 15 is formed such that the irradiation marks La are denser on the outer edge on the groove 16 side than on the inner edge. As a result, there are many irradiation marks La in the part where the liquid 170 begins to penetrate from the dicing line DL, making it easier for cracks Lb to propagate and thus easier to divide the processed wafer 10.

[0076] (Other embodiments) This disclosure is described in accordance with embodiments, but it is understood that this disclosure is not limited to such embodiments or structures. This disclosure also includes various modifications and variations within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms that include only one, more, or fewer of those elements, fall within the scope and idea of ​​this disclosure.

[0077] For example, in each of the above embodiments, the epitaxial film 3 is n - It may consist only of type epitaxial layer 3b.

[0078] Furthermore, in each of the above embodiments, in the process shown in Figure 1I, the metal film 61 may be formed without polishing the back surface 30b of the semiconductor chip S1. For example, when forming an optical semiconductor element as a semiconductor device, by forming an uneven structure on the other side of the semiconductor chip S1, it becomes possible to effectively extract light from the other side. Immediately after the processed wafer 10 is divided, the back surface 30b of the semiconductor chip S1 has the altered layer 15 remaining, and minute irregularities are formed. For this reason, when forming an optical semiconductor element, the back surface 30b of the semiconductor chip S1 may not be polished, and the irregularities of the altered layer 15 may be utilized.

[0079] Furthermore, in each of the above embodiments, in the step of forming the epitaxial film 3 shown in Figure 1B, the epitaxial film may also be formed on the other side 1b of the GaN wafer 1. This makes it easier to leave a thickness of a predetermined or greater thickness as a recycled wafer 40, even when forming the altered layer 15 within the GaN wafer 1, thereby increasing the number of times it can be reused.

[0080] Furthermore, in each of the above embodiments, an example of forming grooves 16 along each dicing line DL has been described. However, it is also possible to divide the processed wafer 10 without forming grooves 16 before dividing it, and then divide the processed wafer 10 starting from the altered layer 15, make the portion opposite to the recycled wafer 40 into a chip-constituting wafer, and then divide it into chip units after forming a metal film 61 or the like on the chip-constituting wafer. In the case of dividing the processed wafer 10 in this way, in the fifth and sixth embodiments described above, the altered layer 15 is formed up to the side surface of the processed wafer 10, so that the liquid 170 penetrates from that side surface and is divided at the altered layer 15.

[0081] Furthermore, in the fifth embodiment described above, when dividing the processed wafer 10 starting from the altered layer 15, the processed wafer 10 may be divided by cooling (i.e., rapidly cooling) and solidifying the liquid 170. That is, when the liquid 170 solidifies, its volume expands, so by cooling and solidifying the liquid 170, the volume of the liquid 170 that has entered the altered layer 15 through the dicing line DL expands, thereby applying static pressure to the altered layer 15. For this reason, the processed wafer 10 may be divided by cooling and solidifying the liquid 170. In this case, as in the fifth embodiment described above, the liquid 170 may be solidified while being compressed.

[0082] Furthermore, in each of the above embodiments, for example, as shown in Figure 12, grooves 16 may be formed only on the outermost portion of the dicing line DL. In addition, although not specifically shown, grooves 16 may be formed only on a specific portion of the dicing line DL.

[0083] Furthermore, the above embodiments can be combined. For example, the first embodiment and the second embodiment may be combined to heat the liquid 170 while compressing it. Alternatively, the fifth to eighth embodiments may be combined with the second to fourth embodiments. That is, as in the second embodiment, the pressure P1 may be increased by heating the liquid 170. As in the third embodiment, the working fluid may be a gas. As in the fourth embodiment, a camera 200 may be included. [Explanation of Symbols]

[0084] 10 processed wafers 10a one side 10b Other side 15 Altered layer 110 Housing 111 Bottom 111a Through hole 112 Side 120 sealing member 130 First seal member holding part 140 sealing member 150 Second sealing member holding part 170 Liquid (working fluid)

Claims

1. A processing wafer splitting apparatus for splitting a processed wafer (10) in which a modified layer (15) that is more brittle than the surrounding area has been formed inside, A housing (110) is formed in a cylindrical shape, having a through hole (111a) at the bottom (111) of one end and an opening (113) at the other end, with a side portion (112) connecting the one end and the other end, and containing the processed wafer in which the altered layer is formed along a direction intersecting the thickness direction, and filled with working fluid (170, 190), A closing portion (160) that closes the other end of the housing and is slidable along the axial direction of the housing, A first seal member holding portion (130) is provided, which is located at the bottom of the housing and has a seal member (120) that is in close contact with the first main surface (10a, 10b) of the processed wafer in the axial direction, outside the through hole, The housing comprises a second seal member holding portion (150) which is slidably positioned along the axial direction on the side of the housing and which holds a seal member (140) that is in close contact with the second main surface (10a, 10b) of the processed wafer, A device for splitting a processed wafer, which uses a working fluid in the housing to split the processed wafer starting from the altered layer.

2. The processed wafer is arranged such that the side on which the semiconductor element is formed is designated as one side (10a), and the side opposite to the first main surface is designated as the other side (10b), and the first main surface, the first side, faces the bottom. The apparatus for dividing a processed wafer according to claim 1, wherein the working fluid inside the housing is pressurized, thereby bending the processed wafer so that one side becomes convex, and thereby dividing the processed wafer.

3. The processed wafer is arranged such that the side on which the semiconductor element is formed is designated as one side (10a), and the side opposite to the first side is designated as the other side (10b), and the other side, which is the first main surface, faces the bottom. The apparatus for splitting a processed wafer according to claim 1, wherein the working fluid in the housing is pressurized, thereby causing the working fluid to penetrate the altered layer, and the processed wafer is split using the altered layer as the starting point for splitting.

4. A wafer splitting apparatus according to any one of claims 1 to 3, wherein the working fluid is compressed so that the pressure (P1) applied to the second main surface of the processed wafer from the working fluid is greater than the pressure (P2) applied to the first main surface of the processed wafer from the through hole.

5. A wafer splitting apparatus according to any one of claims 1 to 3, wherein the working fluid is heated so that the pressure (P1) applied to the second main surface of the processed wafer from the working fluid becomes greater than the pressure (P2) applied to the first main surface of the processed wafer from the through hole.

6. The apparatus for splitting a processed wafer according to claim 5, wherein when the working fluid is heated, the processed wafer is heated to a temperature above the melting point of metallic gallium.

7. The processed wafer is arranged such that the side on which the semiconductor element is formed is designated as one side (10a), and the side opposite to the first side is designated as the other side (10b), and the other side, which is the first main surface, faces the bottom. The apparatus for dividing a processed wafer according to claim 1, wherein the volume of the working fluid that has penetrated the altered layer of the processed wafer is increased by cooling and solidifying the working fluid in the housing, thereby dividing the processed wafer with the altered layer as the starting point for division.

8. The processing wafer splitting apparatus according to claim 3, further comprising a support portion (114) that supports the first main surface exposed through the through hole.

9. The processing wafer splitting apparatus according to any one of claims 1 to 3, wherein the working fluid is water.

10. The processing wafer splitting apparatus according to claim 3, wherein the working fluid is a material with a lower surface tension than water.

11. The processing wafer splitting apparatus according to any one of claims 1 to 3, wherein the working fluid is a gas.

12. A processing wafer splitting apparatus according to any one of claims 1 to 3, further comprising an imaging unit (200) for imaging the processing wafer.

13. A method for dividing a processed wafer (10) in which a modified layer (15) that is more brittle than the surrounding area has been formed inside, A housing (110) is provided that has a through hole (111a) formed at the bottom (111) of one end, an opening (113) at the other end, and a side portion (112) connecting the one end and the other end, and which houses the processed wafer and is filled with working fluid (170, 190). The processed wafer is prepared having a first main surface (10a, 10b) and a second main surface (10a, 10b) opposite to the first main surface, and having the altered layer formed inside in a direction intersecting the thickness direction. The processed wafer is positioned at the bottom of the housing such that a portion of the first main surface (10a, 10b) of the processed wafer is exposed through the through hole. Filling the housing with working fluid (170, 190), A method for dividing a processed wafer, comprising dividing the processed wafer starting from the altered layer using the working fluid in the housing.

14. In preparing the processed wafer, if the side on which the semiconductor element is formed is designated as one side (10a) and the side opposite to the one side is designated as the other side (10b), then the processed wafer is prepared in which the first main surface is the one side. In arranging the processed wafer, the processed wafer is positioned such that the one side, which serves as the first main surface, faces the bottom. The method for dividing a processed wafer according to claim 13, wherein the dividing involves pressurizing the working fluid in the housing to bend the processed wafer so that one side becomes convex, thereby dividing the processed wafer.

15. In preparing the aforementioned processed wafer, if the side on which semiconductor elements are formed is designated as one side (10a) and the side opposite to the one side is designated as the other side (10b), then a plurality of chip formation regions (RA) demarcated by dicing lines (DL) are formed on the one side, and the first main surface is configured to be the other side, In arranging the processed wafer, the processed wafer is positioned such that the other side, which serves as the first main surface, faces the bottom. The method for dividing a processed wafer according to claim 13, wherein the processed wafer is divided by pressurizing the working fluid in the housing and allowing it to penetrate the altered layer.

16. In preparing the aforementioned processed wafer, if the side on which semiconductor elements are formed is designated as one side (10a) and the side opposite to the one side is designated as the other side (10b), then a plurality of chip formation regions (RA) demarcated by dicing lines (DL) are formed on the one side, and the first main surface is configured to be the other side, In arranging the processed wafer, the processed wafer is positioned such that the other side, which serves as the first main surface, faces the bottom. The method for dividing a processed wafer according to claim 13, wherein the division involves increasing the volume of the working fluid that has penetrated the altered layer of the processed wafer by cooling and solidifying the working fluid in the housing, thereby dividing the processed wafer.

17. The method for dividing a processed wafer according to claim 15 or 16, wherein the processed wafer is prepared such that grooves (16) reaching the altered layer are formed in the dicing line.

18. The method for dividing a processed wafer according to claim 17, wherein the division involves arranging a retaining sheet (210) on one surface of the processed wafer, which holds the plurality of chip formation regions, while maintaining communication between the space inside the groove and the space outside the groove.

19. The process of preparing the processed wafer involves irradiating the processed wafer with laser light (L) from the second main surface to form the altered layer. The method for dividing a processed wafer according to claim 17, wherein the laser light is irradiated such that the laser irradiation marks (La) are formed more densely on the outer edge on the groove side of the chip formation region than on the inner edge on the opposite side of the groove.

Images