Semiconductor light-emitting element and method for manufacturing a semiconductor light-emitting element
The semiconductor light-emitting element with a quantum well-type light-emitting layer of AlGaInAs 1-x P x and AlGaInAs 1-y P y layers addresses the need for improved luminous efficiency and reverse current characteristics, achieving better light emission and current characteristics.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- DOWA ELECTRONICS MATERIALS CO LTD
- Filing Date
- 2024-12-24
- Publication Date
- 2026-06-15
AI Technical Summary
There is a need for improved luminous efficiency and reverse current characteristics in semiconductor light-emitting devices using III-V compound semiconductors.
A semiconductor light-emitting element with a quantum well-type light-emitting layer composed of AlGaInAs 1-x P x and AlGaInAs 1-y P y layers, where the composition wavelength difference is 500 nm or more, the well depth on the conduction band side is greater than on the valence band side, and the lattice constant difference is between 4.0% and 6.0%, enhancing light emission and reverse current characteristics.
The solution results in improved light-emitting characteristics and enhanced reverse current characteristics compared to conventional devices.
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Abstract
Description
[Technical Field] 【0001】 The present invention relates to a semiconductor light-emitting element and a method for manufacturing a semiconductor light-emitting element. [Background technology] 【0002】 III-V compound semiconductors such as InGaAsP, InGaAlAs, and InAsSbP are used as semiconductor materials for the semiconductor layer in semiconductor light-emitting devices. By adjusting the composition ratio of the light-emitting layer formed by III-V compound semiconductor materials, it is possible to broadly adjust the emission wavelength of the semiconductor light-emitting device from green to infrared. For example, infrared-emitting semiconductor light-emitting devices with emission wavelengths in the infrared region of 750 nm or higher are widely used in applications such as sensors, gas analysis, surveillance cameras, and communications. 【0003】 Patent Document 1 describes a semiconductor light-emitting element having a light-emitting layer having a stacked structure in which a first III-V compound semiconductor layer and a second III-V compound semiconductor layer having different composition ratios are repeatedly stacked, wherein the difference in composition wavelength between the composition wavelength of the first III-V compound semiconductor layer and the composition wavelength of the second III-V compound semiconductor layer is 50 nm or less, and the ratio of the difference in lattice constant between the lattice constant of the first III-V compound semiconductor layer and the lattice constant of the second III-V compound semiconductor layer is 0.05% or more and 0.60% or less. 【0004】 Patent Document 2 describes a semiconductor light-emitting element having a light-emitting layer comprising a laminate in which a first III-V compound semiconductor semiconductor and a second III-V compound semiconductor having different composition ratios are repeatedly stacked, wherein the difference in composition wavelength between the composition wavelength of the first III-V compound semiconductor and the composition wavelength of the second III-V compound semiconductor is 70 nm or more, the well depth on the conduction band side (Dc) in the band structure of the laminate is greater than the well depth on the valence band side (Dv), and the ratio of the well depth on the conduction band side (Dc) formed by the difference in composition wavelengths to the sum of the well depths on the conduction band side (Dc) and the well depth on the valence band side (Dv) (Dc / (Dc+Dv)) is 65% or more. [Prior art documents] [Patent Documents] 【0005】 [Patent Document 1] Japanese Patent Publication No. 2020-109817 [Patent Document 2] Japanese Patent Publication No. 2024-014794 [Overview of the Initiative] [Problems that the invention aims to solve] 【0006】 In recent years, there has been a demand for further improvements in the luminous efficiency of light-emitting devices, as well as improvements in their reverse current characteristics. The present inventors conducted research with the aim of improving luminous efficiency and reverse current characteristics compared to Patent Documents 1 and 2. Therefore, the present invention aims to obtain a semiconductor light-emitting device that has better luminous characteristics and improved reverse current characteristics compared to conventional light-emitting devices. [Means for solving the problem] 【0007】 The inventors have diligently conducted research to achieve the above-mentioned objectives and have completed the present invention described below. 【0008】 In other words, the gist of the present invention is as follows: (1) A semiconductor light-emitting element comprising a quantum well type light-emitting layer of a III-V compound semiconductor in which a barrier layer and a well layer are repeatedly stacked, The aforementioned barrier layer is AlGaInAs 1-x P x (0 <x<1)からなり、 The aforementioned well layer is AlGaInAs 1-y P y It consists of (0≦y≦x), The composition wavelength λ of the well layer w and the composition wavelength λ of the barrier layer b A semiconductor light-emitting element characterized by having a compositional wavelength difference of 500 nm or more. 【0009】 (2) The well depth (Dc) on the conduction band side in the band structure of the quantum well-type luminescent layer is greater than the well depth (Dv) on the valence band side, and the ratio (Dc / (Dc+Dv)) of the well depth (Dc) on the conduction band side formed by the composition wavelength difference to the sum of the well depths (Dc) on the conduction band side and the well depth (Dv) on the valence band side is 65% or more and 75% or less. The lattice constant a of the well bed w and the lattice constant a of the barrier layer b The semiconductor light-emitting element described in (1) above, wherein the value obtained by dividing the absolute value of the difference between the two lattice constants by the average value of the two lattice constants is 4.0% or more and 6.0% or less. 【0010】 (3) The semiconductor light-emitting device according to (1) or (2) above, wherein the well layer is made of AlGaInAs. 【0011】 (4) A method for manufacturing a semiconductor light-emitting element as described in (1) to (3) above, The process includes a light-emitting layer formation step for forming the quantum well-type light-emitting layer, The light-emitting layer formation step includes a barrier layer formation step of forming the barrier layer using raw material gases of an Al source, a Ga source, an In source, an As source, and a P source, and a well layer formation step of forming the well layer at a gas phase ratio (P amount / As amount) that is the same as or smaller than the gas phase ratio (P amount / As amount) at the time of barrier layer formation, where the gas phase ratio is the ratio of the amount of P in the raw material gas of the P source to the amount of As in the raw material gas of the As source. The quantum well-type light-emitting layer is formed by repeating these steps. A method for manufacturing a semiconductor light-emitting device. 【Effects of the Invention】 【0012】 According to the present invention, it is possible to provide a semiconductor light-emitting device having better light-emitting characteristics and improved reverse current characteristics compared with conventional light-emitting devices. 【Brief Description of the Drawings】 【0013】 [Figure 1] It is a diagram showing an example of the band structure in the quantum well-type light-emitting layer of the present embodiment calculated using simulation software. [Figure 2] It is a schematic cross-sectional view showing one aspect of the quantum well-type light-emitting layer in the semiconductor light-emitting device according to the present invention. [Figure 3] It is a schematic cross-sectional view showing a semiconductor light-emitting device according to an embodiment of the present invention. [Figure 4] It is a schematic cross-sectional view showing a manufacturing method of a semiconductor light-emitting device according to an embodiment of the present invention using a bonding method. 【Embodiments for Carrying Out the Invention】 【0014】 Prior to the description of the embodiments according to the present invention, various definitions in this specification will be described. 【0015】 <III-V group compound semiconductor layer> First, when simply referred to as "III-V group compound semiconductor" in this specification, its composition is generally represented by the general formula: (Al a Ga b In c )(As d P e) It is represented by. Here, the following relationships hold for the composition ratios of each element. For group III elements, c = 1 - a - b, 0 ≤ a ≤ 1, 0 ≤ b ≤ 1, 0 ≤ c ≤ 1. For group V elements, d = 1 - e, 0 ≤ d ≤ 1, 0 ≤ e ≤ 1. When omitting the composition ratios a, b, c of group III elements and setting the composition ratio e of P as x or y in the above general formula, AlGaInAs 1-x P x or AlGaInAs 1-y P y can be expressed as follows. 【0016】 Regarding the quantum well type light emitting layer of the group III-V compound semiconductor according to this embodiment, the group V element of the barrier layer contains As including P 1-x P x and 0 < x < 1. Furthermore, the group V element of the well layer is As 1-y P y and is subject to the condition of 0 ≤ y ≤ x. It is preferable that the group V element of the well layer satisfies 0 ≤ y < x, and y = 0 is also acceptable. Since wavelength uniformity within the wafer surface is easier when y = 0 or y is close to 0, the well layer is more preferably AlGaInAs. Note that when describing a group III-V compound semiconductor as AlGaInAs without listing Sb and P as elements of the group V compound semiconductor, this means that no intentional introduction of group V elements other than As is made, but it does not exclude the diffusion of group V elements from adjacent layers. 【0017】 Also, regarding the quantum well type light emitting layer of the group III-V compound semiconductor according to this embodiment, the group III elements are preferably composed of one or more selected from the group consisting of Al, Ga, and In, and the composition ratios of each element are as described above and have the following relationships. For the group III elements of the quantum well type light emitting layer, c = 1 - a - b, 0 ≤ a ≤ 1, 0 ≤ b ≤ 1, 0 ≤ c ≤ 1. 【0018】 In a quantum well-type light-emitting layer, when the group V element is either one type of As or two types of As and P, it is preferable that the group III elements be composed of two or more elements, and more preferably three elements. Using a total of four or more elements in the quantum well-type light-emitting layer makes it easier to obtain a desired emission wavelength. It is even more preferable that the barrier layer be composed of a total of five elements: Al, Ga, In, As, and P. 【0019】 <Lattice constants based on composition> This specification explains how to calculate the lattice constant of a mixed crystal. There are two types of lattice constants: one perpendicular to the substrate plane (growth direction) and one horizontal to the substrate plane (in-plane direction). In this specification, the value in the perpendicular direction is used. First, the simple lattice constant of the mixed crystal is calculated according to Beggart's law. AlInGaAsP system (i.e., general formula: (Al a Ga b In c )(As d P e For example, the physical constant A abcde (The lattice constant according to Beggart's law) is the physical property constant B of the six binary mixed crystals that form the basis of the pseudo-pentacrystalline mixed crystal, given that each composition ratio (solid phase ratio) is known. ad B bd B cd B ae B be B ce Based on (the lattice constants of the literature values in Table 1 below), the following formula <1> It is calculated by [this method]. A abcde = a × d × B ad +b×d×B bd +c × d × B cd +a×e×B ae +b×e×B be +c×e×B ce ... <1> 【0020】 [Table 1] 【0021】 Next, the elastic constant C 11 , C 12Regarding the above formula <1> Similarly, (Al a Ga b In c )(As d P e The elastic constant C of ) 11abcde , C 12abcde Calculate each of the following. The lattice constant of the growth substrate is a s Therefore, considering the lattice deformation based on the elastic properties of the semiconductor crystal, the following equation <2> Applying this, the lattice constant a (in the vertical direction) considering lattice deformation is applied. abcde It can be sought. a abcde =A abcde -2 × (a s -A abcde )×C 12abcde / C 11abcde ... <2> In this embodiment, since InP is used as the growth substrate, the lattice constant a of the growth substrate s The lattice constant of InP can be used for this. 【0022】 In the case of a pseudo-ternary mixed crystal, the general formula is: (Al a Ga b In c Taking )(As)) as an example, the following formula <3> and <4> From the band gap Eg abcd and the lattice constant A according to Beggart's law abcd It is possible to calculate this. 【number】 A abcd = a × B ad +b×B bd +c × B cd ... <4> 【0023】 Furthermore, even when the III-V compound semiconductor is a ternary or pentary system, the composition wavelength and lattice constant can be determined by rearranging the equations according to the same reasoning as described above. For binary systems, the values described in the above-mentioned literature can be used. 【0024】 <Well depth on the conduction band side (Dc) and well depth on the valence band side (Dv) based on composition, and compositional wavelength> The band structure of the quantum well-type emissive layer was calculated using simulation software (SiLENSe_Version 6.4) manufactured by STRJapan, by inputting the composition ratio values of each layer in the initial settings. Figure 1 shows an example of the band structure of the quantum well-type emissive layer of this embodiment calculated using the said simulation software. The horizontal line near the center of the figure represents the Fermi level. Using this simulation software, the band structure is displayed, and the energy band gap Eg (eV) of each layer, the well depth (Dc, in eV), which is the band gap difference between the conduction band barrier layer and the well layer, and the well depth (Dv, in eV), which is the band gap difference between the valence band barrier layer and the well layer, are calculated. From the energy band gap Eg, the following equation is used: <5> Eg = 1239.8 / λ ··· <5> The composition wavelengths of each layer, expressed as wavelength λ converted by the formula, were calculated. 【0025】 <Film thickness and composition of each layer> The total thickness of each layer formed in this embodiment can be measured using an optical interference film thickness measuring instrument. Further, the thickness of each layer can be calculated from the cross-sectional observation of the growth layer by an optical interference film thickness measuring instrument and a transmission electron microscope. Also, when the thickness of each layer is as small as about several nm to the extent similar to a superlattice structure, the thickness can be measured using TEM-EDS. For the composition ratio (solid phase ratio) of each layer in this specification, the value obtained by SIMS analysis will be used. For the composition ratio (solid phase ratio) of each layer of the quantum well type light emitting layer in this specification, after exposing the vicinity of the uppermost layer of the quantum well type light emitting layer by etching, the value obtained by performing SIMS analysis (quadrupole type) in the thickness direction of the quantum well type light emitting layer will be used. Note that, for the SIMS analysis results, the value of the average element concentration in the half thickness range of each layer at the central part in the thickness direction of each layer will be used. During manufacturing, for a single film grown, the growth conditions for obtaining the target composition ratio are determined by calculating the solid phase ratio using the lattice constant by XRD measurement and the value obtained by converting the emission center wavelength by PL (Photo Luminescent) measurement to Eg, and layers with the target composition ratio can be laminated using these growth conditions. 【0026】 <p-type, n-type and i-type as well as dopant concentration> In this specification, a layer that functions electrically as a p-type is referred to as a p-type layer, and a layer that functions electrically as an n-type is referred to as an n-type layer. On the other hand, when specific impurities such as Si, Zn, S, Sn, Mg, etc. are not intentionally added and it does not function electrically as a p-type or n-type, it is called "i-type" or "undoped". An undoped III-V group compound semiconductor layer may have unavoidable impurity incorporation during the manufacturing process. Specifically, when the dopant concentration is low (for example, 7.6×10 15 atoms / cm 3If it is less than, it is considered "undoped" and will be handled in this specification. The values of impurity concentrations such as Si, Zn, S, Sn, Mg, etc. are based on SIMS analysis. Similarly, the values of the impurity concentrations ( "dopant concentrations") of the n-type dopants (e.g., Si, S, Te, Sn, Ge, O, etc.) in the active layer are also based on SIMS analysis. Note that since the values of the dopant concentrations change significantly near the boundaries of each semiconductor layer, the value of the dopant concentration at the center in the thickness direction is taken as the value of the dopant concentration of that layer. 【0027】 Hereinafter, embodiments of the present invention will be illustrated and described in detail with reference to the drawings. In principle, the same reference numerals are assigned to the same components, and redundant descriptions are omitted. In each figure, for convenience of explanation, the vertical and horizontal ratios of the substrate and each layer are exaggerated from the actual ratios. 【0028】 (Semiconductor light-emitting device) Referring to FIG. 2 showing one aspect of the present invention. The semiconductor light-emitting device according to the present invention includes a quantum well type light-emitting layer 50 of a III-V group compound semiconductor in which barrier layers 51 and well layers 52 are repeatedly stacked. The barrier layer 51 and the well layer 52 have different composition ratios from each other. In the semiconductor light-emitting device according to the present invention, the barrier layer 51 is AlGaInAs containing P 1-x P x (0 < x < 1), and the well layer 52 is AlGaInAs 1-y P y (0 ≤ y ≤ x). Hereinafter, the quantum well type light-emitting layer 50 may be simply abbreviated as the light-emitting layer 50. 【0029】 In the present invention, the composition wavelength λ b of the barrier layer 51 and the composition wavelength λ w of the well layer 52 have a composition wavelength difference of 500 nm or more. The well depth (Dc) on the conduction band side formed by the composition wavelength difference is larger than the well depth (Dv) on the valence band side, and the ratio (Dc / (Dc + Dv)) of the well depth (Dc) on the conduction band side formed by the composition wavelength difference to the sum of the well depth (Dv) on the conduction band side and the well depth (Dv) on the valence band is preferably 65% or more and 75% or less in percentage. Also, the lattice constant a of the barrier layer 51w And the lattice constant a of well layer 52 b The absolute value of the difference between the two lattice constants in the given structure, divided by the average value of the two lattice constants (hereinafter referred to as the "ratio of lattice constant differences"), is preferably greater than 4.0% and less than or equal to 6.0% in percentage terms, and more preferably between 4.5% and 5.5%. By satisfying the above conditions, the light emission characteristics of the semiconductor light-emitting element can be improved compared to conventional semiconductor light-emitting elements. In particular, the inventors have experimentally confirmed that the light emission output can be increased and the reverse current characteristics can be improved. 【0030】 The reason why the composition wavelength difference satisfies the above conditions, and why making the well depth on the conduction band side (Dc) larger than the well depth on the valence band side (Dv) so that the above conditions are met, can increase the light emission output and improve the reverse current characteristics, is not clear, but the inventors believe it to be as follows. 【0031】 Composition wavelength λ of barrier layer 51 b and the composition wavelength λ of well layer 52 w As mentioned above, the wavelength difference between the compositional elements is 500 nm or more. It is preferable that this wavelength difference be 700 nm or less. Furthermore, for improved luminescence efficiency, it is more preferable that the wavelength difference between the compositional elements be 510 nm or more and 650 nm or less. 【0032】 The ratio (Dc / (Dc+Dv)) of the well depth on the conduction band side (Dc) formed by the compositional wavelength difference to the sum of the well depths on the conduction band side (Dc) and the valence band side (Dv) is preferably 65% to 75% and more preferably 70% to 75% as a percentage, as described above. The well depth on the valence band side (Dv) is preferably 0.11 eV or less, more preferably 0.20 eV or less, and even more preferably 0.01 eV to 0.15 eV. The well depth on the conduction band side (Dc) is greater than the well depth on the valence band side (Dv), preferably 0.20 eV or more and more preferably 0.24 eV or more. There is no particular upper limit to the well depth on the conduction band side (Dc), but the upper limit can be half the value of the band gap between the conduction band and the valence band of the barrier layer. The ratio (Dc / (Dc+Dv)) is more preferably less than 72%, and even more preferably 71.4% or less. 【0033】 The group V element in the well layer 52 is preferably As. Also, as mentioned above, the group V element in the barrier layer 51 is P. The presence of P only in the barrier layer 51 has the effect of making wavelength shift less likely. However, it is acceptable for P to be inevitably mixed into the well layer 52 during the manufacturing process, or for P contained in the barrier layer 51 to diffuse into the well layer 52. By limiting the group V element in the well layer 52 to only As, the diffusion phenomenon of group V elements at the boundary between the barrier layer 51 and the well layer 52 can be suppressed. By eliminating the diffusion region of group V elements, the boundary between the barrier layer 51 and the well layer 52 can be made steeper, thereby greatly enhancing the effects of the present invention. 【0034】 Various modifications are possible as long as the effects of the present invention are achieved. For example, not only in the case where the semiconductor laminate of the barrier layer 51 and the well layer 52 extends over the entire quantum well type light-emitting layer, as in this embodiment, the laminate of the barrier layer 51 and the well layer 52 may be only a part of the quantum well type light-emitting layer, and peaks and valleys may be created in the band structure by combining it with other laminates. 【0035】 <Quantum well-type luminescent layer> The details of each component of the quantum well-type light-emitting layer 50 in the embodiments of the present invention will be further described below. 【0036】 -film thickness- The overall thickness of the quantum well-type light-emitting layer 50 is not limited, but can be, for example, between 1 μm and 8 μm. Similarly, the thickness of each layer, the barrier layer 51 and the well layer 52, in the laminate of the quantum well-type light-emitting layer 50 is not limited, but can be, for example, between 1 nm and 15 nm. The thicknesses of each layer may be the same or different. Furthermore, the thicknesses of the barrier layers 51 within the laminate may be the same or different. The same applies to the thicknesses of the well layers 52. However, making the thicknesses of the barrier layers 51 and the well layers 52 the same to form a superlattice structure of the quantum well-type light-emitting layer 50 is one of the preferred embodiments of the present invention. 【0037】 -Number of stacked sets- Refer to Figure 2. Although there is no limit to the number of sets of both the barrier layer 51 and the well layer 52, they can be, for example, between 3 and 50 sets. One end of the laminate can be the barrier layer 51 and the other end the well layer 52. In this case, the number of sets of the barrier layer 51 and the well layer 52 is denoted as n sets (where n is a natural number). 【0038】 Alternatively, one end of the laminate may be a barrier layer 51, and the other end may be a barrier layer 51 with a repeating structure of well layer 52 and barrier layer 51. Or, conversely, both ends may be well layers 52. In this case, the number of sets of barrier layer 51 and well layer 52 is denoted as n (where n is a natural number), meaning there are n.5 sets. Figure 2 illustrates the laminate with barrier layers 51 at both ends. 【0039】 -Composition ratio- As long as the above-mentioned relationship between the composition ratios x and y of P (0 ≤ y ≤ x) is satisfied, and the conditions for composition wavelength difference and lattice constant difference are met, the general formula for each layer of the barrier layer 51 and well layer 52 is: (Al a Ga b In c )(As d P eThe compositional ratios a, b, c, d, and e of the III-V compound semiconductor represented by ) are not limited. 【0040】 However, in order to suppress deterioration of the crystallinity of the quantum well type light-emitting layer, it is preferable that the range of composition ratios be such that the ratio of the lattice constant difference between the growth substrate and the barrier layer 51 and the well layer 52 in the quantum well type light-emitting layer is 4% or less. That is, it is preferable that the value obtained by dividing the absolute value of the lattice constant difference between the growth substrate and the barrier layer by the average value of the growth substrate and the barrier layer, and the value obtained by dividing the absolute value of the lattice constant difference between the growth substrate and the well layer by the average value of the growth substrate and the well layer, are both 4% or less. 【0041】 For example, if the emission center wavelength is to be between 1000 nm and 1900 nm, and the growth substrate is an InP substrate, the composition ratio a of In in each layer can be set to 0.0 to 1.0, the composition ratio b of Ga to 0.0 to 1.0, the composition ratio c of Al to 0.0 to 0.35, the composition ratio d of As to 0.15 to 1.0, and the composition ratio e of P to 0.0 to 0.85. These can be appropriately set from within these ranges to satisfy the conditions for the ratio of the composition wavelength difference and the lattice constant difference. The above emission center wavelength is merely an example; for example, in the case of an InGaAsP-based semiconductor or an InGaAlAs-based semiconductor, the emission center wavelength can be in the range of 1000 nm to 2200 nm, and it is preferable to set the emission center wavelength to 1300 nm or higher, and more preferably to 1400 nm or higher. 【0042】 -Dopant- Although the dopants in each layer of the quantum well-type light-emitting layer 50 are not limited, it is preferable to use i-type dopants in both the barrier layer 51 and the well layer 52 in order to reliably obtain the effects of the present invention. However, each layer may be doped with an n-type or p-type dopant. 【0043】 The following describes specific embodiments of the semiconductor light-emitting element of the present invention, without intending to limit its specific configuration. First, a semiconductor light-emitting element 100 according to one embodiment of the present invention will be described with reference to Figure 3. Then, a semiconductor light-emitting element 200 using a bonding method as shown in Figure 4 will be described. 【0044】 A semiconductor light-emitting element 100 according to one embodiment of the present invention comprises at least a quantum well type light-emitting layer 50 having the above-described laminate, and preferably further comprises a desired configuration in this order from a support substrate 10, an intervening layer 20, a first conductivity type III-V compound semiconductor layer 30, a first spacer layer 41, a second spacer layer 42, and a second conductivity type III-V compound semiconductor layer 70. Furthermore, a second conductivity type electrode 80 may be provided on the second conductivity type III-V compound semiconductor layer 70 of the semiconductor light-emitting element 100, and a first conductivity type electrode 90 may be provided on the back surface of the support substrate 10. Note that if the first conductivity type is n type, the second conductivity type will be p type, and conversely, if the first conductivity type is p type, the second conductivity type will be n type. The following describes an embodiment in which the first conductivity type is n type and the second conductivity type is p type. In the following, for the sake of explanation, the first conductivity type III-V compound semiconductor layer 30 will be referred to as the n-type semiconductor layer 30, and the second conductivity type III-V compound semiconductor layer 70 will be referred to as the p-type semiconductor layer 70. This embodiment will be described according to this specific example. The quantum well type light-emitting layer 50 is sandwiched between the n-type semiconductor layer 30 and the p-type semiconductor layer 70, and when current is passed to the quantum well type light-emitting layer 50, electrons and holes combine within the quantum well type light-emitting layer 50 and emit light. 【0045】 <Growth substrate> The growth substrate can be appropriately selected from compound semiconductor substrates such as InP substrates, InAs substrates, GaAs substrates, GaSb substrates, and InSb substrates, depending on the composition of the quantum well type light-emitting layer 50. The conductivity type of each substrate is preferably matched to the conductivity type of the semiconductor layer on the growth substrate. Examples of compound semiconductor substrates applicable to this embodiment include n-type InP substrates and n-type GaAs substrates. 【0046】 <Support substrate> As the support substrate 10, a growth substrate on which a quantum well light-emitting layer 50 is grown can be used. When using the bonding method described later, various substrates different from the growth substrate may be used as the support substrate 110 (see FIG. 4). 【0047】 <Intervening layer> An intervening layer 20 may be provided on the support substrate 10. When using a growth substrate as the support substrate 10, the intervening layer 20 can be a III-V compound semiconductor layer. It can be used as an initial growth layer for epitaxially growing a semiconductor layer on the support substrate 10 as a growth substrate. Also, for example, it can be used as a buffer layer for relaxing the lattice strain between the support substrate 10 as a growth substrate and the n-type semiconductor layer 30. Further, by changing the semiconductor composition while lattice-matching the growth substrate and the intervening layer 20, it can also be used as an etching stop layer. For example, when the support substrate 10 is an n-type InP substrate, it is preferable that the intervening layer 20 is an n-type InGaAs layer. In this case, in order to lattice-match the intervening layer 20 with the InP growth substrate, the In composition ratio in the group III element is preferably 0.3 or more and 0.7 or less, and more preferably 0.5 or more and 0.6 or less. Also, if the composition ratio is such that the lattice constant is close to that of the InP substrate to the same extent as the above InGaAs, it may be AlInAs or AlInGaAs, InGaAsP. The intervening layer 20 may be a single layer or a composite layer (for example, a superlattice layer) with other layers. When using the bonding method described later, the intervening layer 20 may be a layer including a metal reflection layer 122 or a metal bonding layer 121 (see FIG. 4) having a function of reflecting light from the light-emitting layer. 【0048】 <n-type semiconductor layer> An n-type semiconductor layer 30 can be provided on the support substrate 10 and, if necessary, on the intervening layer 20, and the n-type semiconductor layer 30 can be used as an n-type cladding layer. The composition of the III-V compound semiconductor of the n-type semiconductor layer 30 can be appropriately determined according to the composition of the III-V compound semiconductor of the quantum well light-emitting layer 50. When the quantum well light-emitting layer 50 is composed of an InGaAsP-based semiconductor or an AlGaInAs-based semiconductor, for example, an n-type InP layer can be used. The n-type semiconductor layer 30 may have a single-layer structure or may be a composite layer in which a plurality of layers are stacked. The thickness of the n-type cladding layer can be exemplified as 1 μm or more and 5 μm or less. 【0049】 <Spacer layer> It is also preferable to provide a first spacer layer 41 and a second spacer layer 42 between the n-type semiconductor layer 30 and the p-type semiconductor layer 70 and the quantum well light-emitting layer 50, respectively. The first spacer layer 41 can be an undoped or n-type III-V compound semiconductor layer, and for example, it is preferable to use an i-type InP spacer layer. On the other hand, the second spacer layer 42 on the p side is preferably an undoped III-V compound semiconductor layer, and for example, an i-type InP spacer layer can be used. By providing the undoped spacer layer 42, the diffusion of unnecessary dopants between the quantum well light-emitting layer 50 and the p-type layer can be prevented. The thickness of each of the spacer layers 41 and 42 is not limited, but for example, it may be 5 nm or more and 500 nm or less. 【0050】 <p-type semiconductor layer> A p-type semiconductor layer 70 can be provided on the quantum well-type light-emitting layer 50 and, if necessary, on the second spacer layer 42. The p-type semiconductor layer 70 may comprise a p-type cladding layer 71 and a p-type contact layer 73, in that order from the quantum well-type light-emitting layer 50 side. It is also preferable to provide an intermediate layer 72 between the p-type cladding layer 71 and the p-type contact layer 73. By providing the intermediate layer 72, lattice mismatch between the p-type cladding layer 71 and the p-type contact layer 73 can be mitigated. The composition of the III-V compound semiconductor in the p-type semiconductor layer 70 can be appropriately determined according to the composition of the III-V compound semiconductor in the quantum well-type light-emitting layer 50. When the quantum well-type light-emitting layer 50 is composed of an AlGaInAsP-based semiconductor, p-type InP can be used as the p-type cladding layer 71, p-type InGaAsP as the intermediate layer 72, and p-type InGaAs without P as the p-type contact layer 73. Although the film thickness of each layer of the p-type semiconductor layer 70 is not particularly limited, the film thickness of the p-type cladding layer 71 can be exemplified as 1 μm to 5 μm, the film thickness of the intermediate layer 72 can be exemplified as 10 nm to 200 nm, and the film thickness of the p-type contact layer 73 can be exemplified as 50 nm to 200 nm. 【0051】 <Electrode> A second conductivity type electrode 80 and a first conductivity type electrode 90 can be provided on the p-type semiconductor layer 70 and on the back surface of the support substrate 10, respectively. The metal material used to constitute each electrode can be a common metal such as Ti, Pt, Au, or a metal that forms a eutectic alloy with gold (such as Sn). Furthermore, the electrode pattern of each electrode is arbitrary and not limited in any way. 【0052】 While embodiments have been described in which a compound semiconductor substrate is used as a growth substrate and this is used as the support substrate 10, the present invention is not limited thereto. As a support substrate for the semiconductor light-emitting element of the present invention, after forming each semiconductor layer on the growth substrate, the growth substrate can be removed by a bonding method, and various submount substrates such as a semiconductor substrate such as a Si substrate, a metal substrate such as Mo, W, or Kovar registered trademark (Fe-29Ni-17Co alloy), or AlN can be bonded to it and used as the support substrate (hereinafter referred to as the "bonding method," and refer to Japanese Patent Publication No. 2018-006495 and Japanese Patent Publication No. 2019-114650). The semiconductor light-emitting element 200 when the bonding method is used will be described below with reference to Figure 4. Note that the last two digits of the reference numerals in the figure are the same as in the previously described configuration, and redundant explanations will be omitted. 【0053】 When using the bonding method, for example, each semiconductor layer is formed on the growth substrate 10, and after each semiconductor layer is formed, the metal reflective layer 122 and the metal bonding layer 121 provided on the support substrate 110 are bonded together, and then the growth substrate 10 is removed. Embodiments of the manufacturing method will be described later. The configuration of the semiconductor light-emitting element 200 after the removal of the growth substrate 10 will be described in more detail. In addition to each electrode, the semiconductor light-emitting element 200 may have layers other than III-V compound semiconductors. For example, when using the bonding method, the support substrate 110 made of a Si substrate can be formed to include a metal bonding layer 121 for bonding to the support substrate instead of the initial growth layer described above, and a p-type semiconductor layer 170, a quantum well-type light-emitting layer 150, and an n-type semiconductor layer 130 are sequentially arranged on this. A metal reflective layer 122 can be provided on the metal bonding layer 121. Furthermore, in addition to a III-V compound semiconductor layer, ohmic electrode portions 181 and dielectric layers 160 surrounding the island-like ohmic electrode portions 181 may be provided on the metal reflective layer 122 as needed. Examples of dielectric materials include SiO2, SiN, and ITO. 【0054】 As mentioned above, although the above embodiment was explained using the case where the first conductivity type semiconductor layer is n-type and the second conductivity type semiconductor layer is p-type as an example, it is naturally understood that the n-type / p-type conductivity of each layer can be reversed compared to the above embodiment. 【0055】 (Method of manufacturing semiconductor hibi) The above-mentioned method for manufacturing a semiconductor light-emitting element according to the present invention includes at least a light-emitting layer formation step for forming a quantum well type light-emitting layer 50. This light-emitting layer formation step is performed by repeatedly performing a barrier layer formation step for forming a barrier layer 51 using Al source, Ga source, In source, As source, and P source raw material gases, and a well layer formation step for forming a well layer 52 with a gas phase ratio (amount of P / amount of As) which is the ratio of the amount of P in the raw material gas of the P source to the amount of As in the raw material gas of the As source, the same as or smaller than the gas phase ratio used during barrier layer formation, thereby forming the aforementioned quantum well type light-emitting layer. 【0056】 Furthermore, the process may include, if necessary, the steps for forming each layer of the semiconductor light-emitting element 100 as described with reference to Figure 3. The III-V compound semiconductor materials that can be used as the barrier layer 51 and the well layer 52, as well as the conditions for their composition, wavelength difference and lattice constant difference, and the respective film thicknesses and number of stacks, are as previously described and will not be repeated. 【0057】 Each layer of the III-V compound semiconductor layer can be formed by a known thin film growth method such as, for example, the metal organic chemical vapor deposition (MOCVD) method, the molecular beam epitaxy (MBE) method, or the sputtering method. In the case of an AlGaInAsP-based semiconductor, for example, trimethylaluminum (TMA) as an Al source, trimethylindium (TMIn) as an In source, trimethylgallium (TMGa) as a Ga source, arsine (AsH3) as an As source, phosphine (PH3) as a P source, etc. are flowed onto a growth substrate while using a carrier gas so as to have a predetermined mixing ratio. Thereby, a single crystal can be vapor grown on the growth substrate, and the AlGaInAsP-based semiconductor layer can be epitaxially grown to a desired thickness according to the growth time. Further, when doping each semiconductor layer into a p-type or n-type, a gas of a dopant source containing Si, Zn, etc. as constituent elements may be further used as desired. General formula: (Al a Ga b In c )(As d P e ) The solid phase ratio represented by the composition ratios a, b, c, d, e of the III-V compound semiconductor can be mainly controlled by the gas phase ratio of each element contained in the raw material gas of each element source. For example, during the vapor growth of the quantum well type light emitting layer 50, if conditions such as the furnace pressure and the temperature of the growth substrate are kept constant, the solid phase ratio can be changed by changing the gas phase ratio by adjusting the flow rate of the raw material gas. The gas phase ratio, which is the ratio of the amount of P in the P source raw material gas to the amount of As in the As source raw material gas when forming the well layer 52, is made smaller than when forming the barrier layer 51. Thereby, the solid phase ratio y of P in the well layer 52 and the solid phase ratio x of P in the barrier layer 51 can be made to satisfy the relationship of 0≦y<x. Also, if the same gas phase ratio as when forming the barrier layer 51 is used, y = x can be achieved. In addition, it is preferable that the gas phase ratio when forming the well layer 52 has less P amount than the gas phase ratio when forming the barrier layer 51, and the P source raw material gas may not be flowed when forming the well layer 52. 【0058】 Furthermore, known methods can be used to form the metal layers such as the first conductivity type electrode 90 and the second conductivity type electrode 80, for example, sputtering, electron beam deposition, or resistance heating. If a dielectric layer is to be formed when using a bonding method, known film deposition methods such as plasma CVD or sputtering can be applied, and if necessary, known etching methods can be used to form irregularities. 【0059】 When forming the element shown in Figure 4 using a bonding method (see Japanese Patent Publication No. 2018-006495 and Japanese Patent Publication No. 2019-114650 mentioned earlier), the semiconductor light-emitting element 200 can be manufactured, for example, as follows. 【0060】 First, the layers of a III-V compound semiconductor layer, including an etching stop layer 120, an n-type semiconductor layer 130, a quantum well-type light-emitting layer 150, a p-type cladding layer 171, an intermediate layer 172, and a p-type contact layer 173, are sequentially formed on the growth substrate 10 (Note that Figure 4 is inverted as it shows the state after bonding). Next, p-type ohmic electrode portions 181 are formed on the p-type contact layer 173, dispersed in an island-like manner. Subsequently, a resist mask is formed on the p-type ohmic electrode portions 181 and their surroundings, and the p-type contact layer 173 other than the area where the p-type ohmic electrode portions 181 are formed is removed by wet etching or the like, exposing the intermediate layer 172. Then, a dielectric layer 160 is formed on the intermediate layer 172. Furthermore, the dielectric layer 160 is partially etched to expose the intermediate layer 172 above the p-type ohmic electrode portions 181 and the area surrounding the p-type ohmic electrode portions 181. The metal reflective layer 122 is formed over the entire surface, including the p-type ohmic electrode portion 181, the intermediate layer 172 exposed around the p-type ohmic electrode portion 181, and the dielectric layer 160 in the areas that have not been removed. 【0061】 On one hand, a conductive Si substrate or the like is used as the support substrate 110, and a metal bonding layer 121 is formed on the support substrate. The metal reflective layer 122 and the metal bonding layer 121 are arranged opposite to each other and joined by heating and compression or the like. Then, the growth substrate is etched and removed to expose the etching stop layer 120. An n-type electrode 190 is formed on the etching stop layer 20, and the etching stop layer 120 other than the location where the n-type electrode is formed is etched and removed, or after etching and removing a part other than a part of the etching stop layer 120, an n-type electrode 190 is formed on a part of the etching stop layer 120, thereby obtaining a bonded semiconductor light-emitting device 200. As described above, the n-type / p-type conductivity type of each layer may be reversed from the above example. 【0062】 Hereinafter, the present invention will be described in more detail using examples, but the present invention is not limited to the following examples at all. 【Example】 【0063】 With the target emission center wavelength being 1450 nm, semiconductor light-emitting devices according to the following Example 1, 2 and Comparative Examples 1 to 8 were fabricated by a bonding method. 【0064】 (Example 1) Regarding each structure of the III-V compound semiconductor layer of the semiconductor light-emitting device 200 according to ExampleAn As layer (each serving as an initial growth layer and an etching stop layer 120), an n-type InP layer with a thickness of 3500 nm (an n-type semiconductor layer 130 as an n-type cladding layer), an i-type InP layer with a thickness of 100 nm (a first spacer layer 141), a quantum well type (MQW: Multi Quantum Well) light-emitting layer 150 whose details will be described later, an i-type InP layer with a thickness of 320 nm (a second spacer layer 142), a p-type InP layer with a thickness of 2400 nm (a p-type cladding layer 171), a p-type In 0.5 Ga 0.2 As 0.5 P 0.5 layer (an intermediate layer 172), a p-type In 0.57 Ga 0.43 As layer (a p-type contact layer 173) were sequentially formed by the MOCVD method. The n-type InP layer and the n-type InGaAs layer (each serving as an initial growth layer and an etching stop layer 120), and the n-type InP layer (the n-type semiconductor layer 130 as an n-type cladding layer) were Si-doped, and the dopant concentration was 5.0×10 17 atoms / cm 3 . The p-type InP layer (the p-type cladding layer 171) was Zn-doped, and the dopant concentration was 7.0×10 17 atoms / cm 3 . The p-type InGaAsP layer (the intermediate layer 172) and the p-type InGaAs layer (the p-type contact layer 173) were Zn-doped, and the dopant concentration was 1.5×10 19 atoms / cm 3 . 【0065】 When forming the quantum well type light-emitting layer 150, an i-type Al a1 Ga b1 In c1 As 1-x P x serving as a barrier layer 151 was first formed, and then an i-type Al a2 Ga b2 In c2 As 1-y P y serving as a well layer 152 and an i-type Al a1 Ga b1 In c1 As 1-x P xThey were alternately stacked in groups of 10 layers to form 10.5 sets of quantum well light-emitting layers 150. That is, both ends of the quantum well light-emitting layer 150 are barrier layers 151. The barrier layer 151 is Al 0.171 Ga 0.386 In 0.443 As 0.857 P 0.143 That is, the Al composition ratio (a1) is 0.171, the Ga composition ratio (b1) is 0.386, the In composition ratio (c1) is 0.443, the As composition ratio (1 - x) is 0.857, and the P composition ratio (x) is 0.143. Also, the well layer 152 is Al 0.104 Ga 0.191 In 0.705 As. That is, the Al composition ratio (a2) is 0.104, the Ga composition ratio (b2) is 0.191, the In composition ratio (c2) is 0.705, and the As composition ratio (y) is 1.000. That is, P was not contained in the well layer 152 of Example 1. The gas phase ratio (P amount / As amount) during the growth of the barrier layer 151 was 0.5, and the gas phase ratio during the growth of the well layer 152 was 0. Then, as described above, the lattice constant was calculated, and the band structure was calculated using simulation software (SiLENSe) manufactured by STR Japan. The thickness, composition ratio, composition wavelength, and lattice constant values of the barrier layer 151 and the well layer 152 are shown in Table 3. The composition wavelength difference in the composition ratio of the quantum well light-emitting layer 150 of Example 1 was 529.3 nm, and the value obtained by dividing the absolute value of the difference between the two lattice constants by the average value of the two lattice constants (lattice constant difference ratio) was 4.55% in percentage. Also, the ratio (Dc / (Dc + Dv)) of the well depth (Dc) on the conduction band side to the total of the well depth (Dc) on the conduction band side and the well depth (Dv) of the valence band was 70.5% in percentage. These values are shown in Table 4. Also, the total film thickness of the quantum well light-emitting layer 150 is 180 nm. Note that each composition of each layer in Example 1 described above is a value measured by SIMS analysis. Note that for each layer of the quantum well light-emitting layer 150, after exposing the quantum well light-emitting layer 150, SIMS analysis was performed to confirm the solid phase ratio of each layer. 【0066】 【Table 2】 【0067】 Island-like dispersed p-type ohmic electrode portions 181 (Au / AuZn / Au, total thickness: 530 nm) were formed on the p-type contact layer. The island-like pattern was formed by first creating a resist pattern, then depositing the ohmic electrode 181, and allowing the resist pattern to lift off. The ratio of the p-type ohmic electrode area to the chip area (contact area ratio) was 0.95%, and the chip size was 280 μm square. 【0068】 Next, a resist mask was formed on the p-type ohmic electrode portion 181 and its surrounding area. The p-type contact layer 173, excluding the area where the ohmic electrode portion 181 was formed, was removed by wet etching with a tartaric acid-hydrogen peroxide system, exposing the intermediate layer 172. Subsequently, a dielectric layer 160 (thickness: 700 nm) made of SiO2 was formed over the entire surface of the intermediate layer 172 by plasma CVD. Then, a window pattern with a width of 3 μm added in the width direction and longitudinal direction was formed with resist in the upper region of the p-type ohmic electrode portion 181. The dielectric layer 160 on the p-type ohmic electrode portion 181 and its surrounding area was removed by wet etching with BHF, exposing the upper part of the p-type ohmic electrode portion 181 and the intermediate layer 172 around the p-type ohmic electrode portion (not shown). 【0069】 Next, a metal reflective layer 122 was formed by vapor deposition over the entire surface of the intermediate layer 172 (the upper part of the p-type ohmic electrode portion 181, the upper part of the dielectric layer 60, and the exposed intermediate layer 172 around the p-type ohmic electrode portion). The thicknesses of each metal layer of the metal reflective layer (Ti / Au / Pt / Au) were 2 nm, 650 nm, 100 nm, and 900 nm, respectively. Meanwhile, a metal junction layer 121 was formed on a conductive Si substrate (thickness: 200 μm) which served as the support substrate. The thicknesses of each metal layer of the metal junction layer (Ti / Pt / Au) were 650 nm, 10 nm, and 900 nm, respectively. 【0070】 These metal reflective layers 122 and metal bonding layers 121 were placed facing each other and heat-compression bonding was performed at 315°C. Then, the n-type InP substrate 110 was removed by wet etching with a diluted hydrochloric acid solution. 【0071】 On the n-type etching stop layer 120, an n-type electrode 190 (Au (thickness: 10 nm) / Ge (thickness: 33 nm) / Au (thickness: 57 nm) / Ni (thickness: 34 nm) / Au (thickness: 800 nm) / Ti (thickness: 100 nm) / Au (thickness: 1000 nm)) was formed as the wiring portion of the upper electrode by resist pattern formation, n-type electrode deposition, and resist pattern lift-off. Furthermore, a pad portion (Ti (thickness: 150 nm) / Pt (thickness: 100 nm) / Au (thickness: 2500 nm)) was formed on the n-type electrode to form the pattern of the upper electrode. Then, the n-type etching stop layer 120, except for the area directly beneath and near the n-type electrode 190, was removed by wet etching, and the exposed surface of the n-type semiconductor layer 130 was roughened. Subsequently, a dielectric protective film (not shown) was formed on the upper and side surfaces of the semiconductor light-emitting element 200, excluding the current-carrying area on the upper surface of the pad. 【0072】 (Example 2) The composition of the barrier layer 151 is Al 0.171 Ga 0.386 In 0.443 As 0.857 P 0.143 From, Al 0.171 Ga 0.386 In 0.443 As 0.720 P 0.280 A semiconductor light-emitting element according to Example 2 was obtained in the same manner as in Example 1, except for the change made to the same element. The vapor phase ratio (amount of P / amount of As) during the growth of the barrier layer 151 was 0.7, and the vapor phase ratio during the growth of the well layer 152 was 0. The thickness, composition ratio, composition wavelength, and lattice constant values of the barrier layer 151 and the well layer 152 are shown in Table 3. The composition wavelength difference in the composition ratio of the quantum well-type light-emitting layer 150 of Example 2 was 619.0 nm, and the value obtained by dividing the absolute value of the difference between the two lattice constants by the average value of the two lattice constants (ratio of lattice constant difference) was 5.48%. In addition, the ratio of the well depth on the conduction band side (Dc) to the sum of the well depth on the conduction band side (Dc) and the well depth on the valence band side (Dv) (Dc / (Dc+Dv)) was 70.8%. These values are shown in Table 4. 【0073】 (Comparative Examples 1-8) Semiconductor light-emitting elements according to Comparative Examples 1 to 8 were obtained in the same manner as in Example 1, except that the composition of the barrier layer 151 and the composition and thickness of the well layer 152 were changed as shown in Table 3. 【0074】 Furthermore, for the examples and comparative examples, the composition wavelengths and lattice constants calculated from the composition of the barrier layer 151 and the well layer 152 are listed in Table 3. The difference in composition wavelengths between the barrier layer 151 and the well layer 152, the absolute value of the difference between the two lattice constants divided by the average value of the two lattice constants (ratio of lattice constant differences), the calculated well depths of the conduction band (Dc) and valence band (Dv), and the ratio (Dc / (Dc+Dv)) to the sum of the well depths of the conduction band (Dc) and valence band (Dv) are listed in Table 4. Additionally, PL measurements using excitation light were performed on semiconductor layers grown on growth substrates using Onto Innovation Inc.'s RPMBlue at three locations on the OF side, center, and anti-OF side of the substrate. The average values of the PL intensity and PL peak wavelength λp obtained from these PL measurements are listed in Table 4. A higher PL intensity correlates to a higher emission output when current is applied. 【0075】 [Table 3] 【0076】 [Table 4] 【0077】 Next, Comparative Example 1, in which P was not added to the well layer 152 and barrier layer 151, and Examples 1 and 2, in which P was added to the barrier layer 151 and the PL intensity was high, were processed to become semiconductor light-emitting elements 200. Ten semiconductor light-emitting elements 200 were selected from each of Examples 1 and 2 and Comparative Example 1, and the emission output Po (mW), forward voltage Vf (V), and emission center wavelength λp (nm) measured by an integrating sphere were measured when currents of 20 mA and 36 mA were passed using a constant current voltage power supply. The average values of the measurement results for each of the two examples and one comparative example (10 samples) were calculated. The average values of the reverse voltage Vr when currents of 0.1 μA and 1 μA were passed were also calculated. The measurement results for each are shown in Table 5, along with evaluations of the emission center wavelength, emission output, and reverse voltage. 【0078】 [Table 5] 【0079】 From the results in Table 4, it can be seen that the examples that possess both the compositional wavelength difference and the (Dc / (Dc+Dv)) value according to the present invention have significantly higher PL intensity. From the results in Table 5, comparing Comparative Example 1 with Examples 1 and 2, it can be seen that Examples 1 and 2 have higher light emission output and higher reverse voltage in the semiconductor light-emitting element. [Industrial applicability] 【0080】 According to the present invention, it is possible to provide a semiconductor light-emitting element and a method for manufacturing the same that have better light-emitting characteristics compared to conventional light-emitting elements, and this is useful. [Explanation of symbols] 【0081】 10 Support substrate 20 Intervening layer 30 n-type semiconductor laminate 41 First Spacer Layer 42 Second Spacer Layer 50 Quantum well type light-emitting layer 51 1st layer 52 2nd layer 60 Dielectric layer 70 p-type semiconductor layer 71 p-type cladding layer 72 Middle Class 73 p-type contact layer 80 Second conductivity type electrode 90 1st conductivity type electrode 100 Semiconductor light-emitting elements
Claims
[Claim 1] A semiconductor light-emitting element comprising a quantum well type light-emitting layer of a III-V compound semiconductor in which a barrier layer and a well layer are repeatedly stacked, The barrier layer is AlGaInAs 1-x P x (0 < x < 1) The aforementioned well layer is AlGaInAs 1-y P y It consists of (0 ≤ y ≤ x), The difference in compositional wavelength between the compositional wavelength λw of the well layer and the compositional wavelength λb of the barrier layer is 500 nm or more. In the band structure of the quantum well-type luminescent layer, the well depth (Dc) on the conduction band side is greater than the well depth (Dv) on the valence band side, and the ratio (Dc / (Dc+Dv)) of the well depth (Dc) on the conduction band side, formed by the compositional wavelength difference, to the sum of the well depths (Dc) on the conduction band side and (Dv) on the valence band side is 65% or more and 75% or less. A semiconductor light-emitting element characterized in that the absolute difference between the lattice constant aw of the well layer and the lattice constant ab of the barrier layer, divided by the average value of the two lattice constants, is 4.0% or more and 6.0% or less. [Claim 2] The semiconductor light-emitting element according to claim 1, wherein the well layer is made of AlGaInAs. [Claim 3] A method for manufacturing a semiconductor light-emitting element as described in claim 1, The process includes a light-emitting layer formation step for forming the quantum well-type light-emitting layer, A method for manufacturing a semiconductor light-emitting element, wherein the light-emitting layer formation step involves repeatedly performing a barrier layer formation step in which the barrier layer is formed using raw material gases from an Al source, a Ga source, an In source, an As source, and a P source, and a well layer formation step in which the well layer is formed with a gas phase ratio (amount of P / amount of As) that is the same as or smaller than that used during barrier layer formation, thereby forming the quantum well type light-emitting layer.