Method for forming a circuit pattern on a substrate using metal foil with low surface roughness

Abstract

A method is provided for forming a circuit pattern on a substrate by a process for forming the circuit pattern, such as semi-additive process (SAP) or modified semi-additive process (mSAP), using a thin metal foil with low surface roughness.

Description

[Technical Field]

[0001] The present invention relates to a method for forming a circuit pattern on a substrate using a thin metal foil with low surface roughness by a process for circuit pattern formation, such as a semi-additive process (SAP) or a modified semi-additive process (mSAP). [Background technology]

[0002] In the manufacturing of printed circuit boards, various processes for forming circuit patterns on the substrate are known, such as subtractive processes, additive processes, fully additive processes, semi-additive processes, and modified semi-additive processes.

[0003] According to the semi-additive process (SAP), via holes are fabricated on a substrate in which a metal base is bonded to an insulating base, electroless copper plating is performed, a dry film is bonded, exposed, developed, and then copper electroplating is performed to form a circuit pattern. However, it is difficult to ensure sufficient adhesion to the insulating base by electroless copper plating. Before electroless copper plating, the surface of the insulating base is generally roughened, and sufficient adhesion to the insulating base is ensured by a desmear process, but there are limits to the roughening of the insulating base surface, which results in greater variety in type and properties. In other words, when electroless copper plating is performed on the insulating base in which via holes are formed for subsequent copper electroplating, the copper seed layer formed by the electroless copper plating does not show sufficient adhesion (bonding) to the insulating base, which negatively affects the formation of the desired circuit pattern.

[0004] Therefore, existing processes have difficulty ensuring sufficient adhesion to the insulating base. Furthermore, the uneven roughness of the insulating base makes it difficult to form microcircuits. Consequently, there is a need to develop a method to ensure sufficient adhesion to the insulating base in order to facilitate the control of the process of forming fine circuit patterns. [Overview of the project] [Problems that the invention aims to solve]

[0005] The present invention provides a method for forming a circuit pattern on a substrate using a thin metal foil with low surface roughness, by a circuit pattern formation process such as SAP or mSAP. [Means for solving the problem]

[0006] One aspect of the present invention provides a method for forming a circuit pattern on a substrate, comprising: preparing a substrate in which a metal base is bonded to an insulating base; bonding a metal foil having one or more protrusions with a flat upper end onto the insulating base; and transferring the surface roughness of the metal foil to the insulating base.

[0007] In one embodiment, the metal foil may be joined onto the insulating base such that the projection with a flat upper end faces the surface of the insulating base.

[0008] In one embodiment, each of the projections with a flat upper end may include a projection having a frustoconical or polygonal frustoconical shape, and a flat portion formed at the upper end of the projection.

[0009] In one embodiment, the protruding portion may have a plurality of micro-protrusions formed on its surface.

[0010] In one embodiment, the surface roughness (Rz) of the metal foil may be 0.05 to 1.5 μm.

[0011] In one embodiment, the thickness of the metal foil may be 5 μm or less.

[0012] In one embodiment, the metal foil may be formed by electroless plating.

[0013] In one embodiment, the unit area (μm²) 2 ) 1 to 100 holes per surface may be formed on the insulating base to which the roughness is transferred.

[0014] The present invention also provides a method for forming a circuit pattern on a substrate, which includes preparing a substrate in which a metal base is bonded to an insulating base, bonding a metal foil having one or more protrusions with a flat upper end onto the insulating base, forming one or more via holes penetrating the insulating base and the metal foil, forming seed portions on the inner walls of the via holes, placing a dry film on the metal foil and patterning the dry film, and forming a circuit pattern by electroplating the via holes exposed by the patterning.

[0015] The present invention also provides a method for forming a circuit pattern on a substrate, comprising: preparing a substrate in which a metal base is bonded to an insulating base; bonding a metal foil having one or more protrusions with a flat upper end onto the insulating base; peeling off the metal foil having a surface roughness formed by the protrusions and transferring the surface roughness of the metal foil to the insulating base; forming one or more via holes penetrating the insulating base; forming seed portions on the surface of the insulating base having the via holes and on the inner walls of the via holes; placing a dry film on the insulating base on which the seed portions are formed and patterning the dry film; and electroplating the via holes exposed by the patterning to form a circuit pattern. [Effects of the Invention]

[0016] According to each method of the present invention, a circuit pattern is formed on a substrate by bonding a thin metal foil with a low surface roughness to an insulating base, forming via holes, and performing electroless plating and / or electroplating. Therefore, the circuit pattern can be formed at low cost while ensuring sufficient adhesion strength (bonding strength) to the insulating base and facilitating process control. [Brief explanation of the drawing]

[0017] [Figure 1]FIG. 1 is a flowchart showing a method of forming a circuit pattern on a substrate according to an embodiment of the present invention. [Figure 2] FIG. 2 is a reference diagram for explaining the metal foil used in the method of the present invention. [Figure 3] FIG. 3 is a reference diagram for explaining the metal foil used in the method of the present invention. [Figure 4] FIG. 4 is a flowchart showing a method of forming a circuit pattern on a substrate according to a further embodiment of the present invention. [Figure 5] FIG. 5 is an image for explaining Experimental Example 1. [Figure 6] FIG. 6 is an image for explaining Experimental Example 1. [Figure 7] FIG. 7 is an image for explaining Experimental Example 2. [Figure 8] FIG. 8 shows a method of forming a circuit using a primer according to an embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

[0018] The terms and words used in this specification and claims are not to be construed as having a general and dictionary meaning, but should be understood as having a meaning and concept corresponding to the technical spirit of the present invention in view of the principle that the inventor can appropriately define the concepts of the terms and words in order to describe the inventor's invention in the best way.

[0019]

[0020] The individual steps described in this specification may be performed sequentially, in reverse order, or by appropriately changing the order during processing.

[0021] The present invention relates to a method for forming a circuit pattern on a substrate, comprising: preparing a substrate in which a metal base is bonded to an insulating base; bonding a metal foil having one or more protrusions with a flat upper end onto the insulating base; and transferring the surface roughness of the metal foil to the insulating base.

[0022] Referring specifically to Figure 1, the insulating base is bonded to the upper surface of the metal base to prepare the base portion of the substrate.

[0023] The metal base 10 ensures the heat dissipation performance of the substrate and serves to electrically connect the multilayer circuit patterns. The metal base 10 may contain one or more metal components that are commonly known in the art. Specifically, the metal base 10 may contain one or more metals selected from the group consisting of copper (Cu) and titanium (Ti).

[0024] The insulating base 20 serves to ensure the insulating performance of the substrate. The insulating base 20 may be made from a material commonly known in the art, specifically an insulating resin such as epoxy resin or polyimide resin, impregnated into a fiber base such as carbon fiber or glass fiber, in a prepreg.

[0025] A metal foil 30 having one or more flat protrusions at its upper end is bonded onto an insulating base 20.

[0026] To bond the metal foil 30 onto the insulating base 20, any conventional method for laminating metal foil may be used without particular limitation. Specifically, the metal foil may be bonded at a temperature of 100°C and at a density of 5 kg / m². 2 The material is initially laminated by pressurizing it at a pressure of 5 kg / m² for 60 seconds, followed by a temperature of 100°C and a pressure of 5 kg / m². 2 The layers are secondarily laminated by applying pressure for 60 seconds at a certain pressure. After applying pressure, curing may be carried out at 130°C for 30 minutes and then at 165°C for 30 minutes.

[0027] The formation of one or more, i.e., multiple, flat upper ends of protrusions gives the metal foil 30 a specific surface feature (structure). Referring specifically to Figure 2, the metal foil 30 may have a structure in which multiple surface protrusions 31 are present (formed) on its surface. The protrusions 31 may be metal crystal particles that project vertically upward from the surface of the metal foil 30. Specifically, each of the protrusions 31 may have a protruding portion 31b and a flat portion 31a.

[0028] The protruding portion 31b of the projection 31 is a part that protrudes from the surface of the metal foil 30 and may have a frustoconical shape or a frustoconical shape. Specifically, as shown in Figure 3, the protruding portion 31b has a frustoconical shape with a flat surface (outer surface) or a frustoconical shape with a angular surface. This shape enhances the adhesion of the metal foil to the insulating base 20 so that the metal foil 30 can be bonded to the insulating base 20, which has high adhesive strength. More specifically, the protruding portion 31b may have at least one frustoconical shape selected from the group consisting of a frustoconical shape, a frustoconical shape, a frustoconical shape, a frustoconical shape, and an frustoconical shape.

[0029] Each of the protrusions 31b may have a plurality of micro-protrusions 31b' to enhance adhesion to the insulating base 20 by increasing the surface area of ​​the insulating base 20. The formation of micro-protrusions 31b' makes it possible for the protrusions 31b to have a surface roughness (Ra) of 0.05 to 0.3 μm, particularly 0.08 to 0.2 μm. Here, the surface roughness (Ra) of the protrusions 31b can be defined as the surface roughness (Ra) of the outer surface of the protrusions 31b other than the flat portion 31a.

[0030] On the other hand, the ratio of the height (b) of each projection 31b to the length (a) of the base of the projection 31b may be in the range of 0.4 to 1.5 (b / a), particularly 0.6 to 1.2 (b / a). When the ratio (b / a) is within the range defined above, the adhesion between the metal foil 30 and the insulating base 20 can be enhanced.

[0031] The flat portion 31a of the projection 31 is the flat surface at the upper end of the projection 31. The flat portion 31a may be the upper surface of the projection 31b, which has a frustoconical or polygonal frustoconical shape. Specifically, the flat portion 31a may have a circular, elliptical, or polygonal shape. A flat surface may also be provided that can be considered to be formed by a dense concentration of fine irregularities and is contained within the range of the flat portion 31a.

[0032] In each of the projections 31, the ratio of the length (c) of the flat portion 31a to the length (a) of the base of the projection 31b may be in the range of 0.1 to 0.7 (c / a), particularly 0.2 to 0.6 (c / a). When the ratio (c / a) is within the range defined above, the adhesion between the metal foil 30 and the insulating base 20 can be enhanced. The length (c) of the flat portion 31a refers to the maximum length of the flat portion 31a in the plane.

[0033] Considering the adhesion between the metal foil 30 and the insulating base 20, the resolution of the circuit pattern, etc., the unit area of ​​the metal foil 30 (1 μm) 2 The number of protrusions 31 per ) may be 25 or less, in particular 5 to 20, and even more particularly 7 to 15.

[0034] A metal foil 30 including one or more protrusions 31 may be formed by electroless plating. Specifically, after forming the metal foil 30 by forming a metal seed foil by electroless plating, crystal grains grow continuously on the metal seed foil to form multiple protrusions 31 on the surface. By electroless plating, the metal foil 30 has less thickness, less surface roughness, and greater porosity than that formed by electroplating. The metal foil 30 formed by electroless plating can be efficiently introduced into a process for forming a circuit pattern on a substrate.

[0035] The composition of the electroless plating solution used to form the metal foil 30 is not particularly limited, but may include a metal ion source and a nitrogen compound.

[0036] The metal ion source may specifically be a copper ion source selected from the group consisting of copper sulfate, copper chloride, copper nitrate, copper hydroxide, copper sulfamate, and mixtures thereof. The metal ion source may be present at a concentration of 0.5 to 300 g / L, particularly 100 to 200 g / L.

[0037] The nitrogen compound diffuses metal ions to form a plurality of protrusions 31 on the surface of the metal seed foil formed by the metal ion source. Specifically, the nitrogen compound may be selected from the group consisting of purines, adenine, guanine, hypoxanthine, xanthine, pyridazine, methylpiperidine, 1,2-di-(2-pyridyl)ethylene, 2,2'-dipyridylamine, 2,2'-bipyridyl, 2,2'-bipyrimidine, 6,6'-dimethyl-2,2'-dipyridyl, di-2-furylketone, N,N,N',N'-tetraethylenediamine, 1,8-naphthyridine, 1,6-naphthyridine, terpyridine, and mixtures thereof. The nitrogen compound may be present at a concentration of 0.01 to 10 g / L, particularly 0.05 to 1 g / L.

[0038] The electroless plating solution may further contain one or more additives selected from the group consisting of chelating agents, pH adjusters, and reducing agents.

[0039] Specifically, the chelating agent may be selected from the group consisting of tartaric acid, citric acid, acetic acid, malic acid, malonic acid, ascorbic acid, oxalic acid, lactic acid, succinic acid, sodium potassium tartrate, dipotassium tartrate, hydantoin, 1-methylhydantoin, 1,3-dimethylhydantoin, 5,5-dimethylhydantoin, nitrilotriacetic acid, triethanolamine, ethylenediaminetetraacetic acid, tetrasodium ethylenediaminetetraacetic acid, N-hydroxyethylenediamine triacetate, pentahydroxypropyldiethylenetriamine, and mixtures thereof. The chelating agent may be present at a concentration of 0.5 to 600 g / L, specifically 300 to 450 g / L.

[0040] Specifically, the pH adjusting agent may be selected from the group consisting of sodium hydroxide, potassium hydroxide, lithium hydroxide, and mixtures thereof. The pH adjusting agent can adjust the pH of the electroless plating solution to 8 or higher, particularly 10-14, and even more particularly 11-13.5.

[0041] Specifically, the reducing agent may be selected from the group consisting of formaldehyde, sodium hypophosphate, sodium hydroxymethanesulfinate, glyoxylic acid, hydrogen boride, dimethylamine borane, and mixtures thereof. The reducing agent may be present at a concentration of 1 to 20 g / L, particularly 5 to 20 g / L.

[0042] The conditions for electroless plating to form the metal foil 30 may be adjusted as appropriate depending on the thickness of the metal foil 30. Specifically, the electroless plating temperature may be 20 to 60°C, particularly 30 to 40°C, and the electroless plating time may be 2 to 30 minutes, particularly 5 to 20 minutes.

[0043] The thickness of the metal foil 30 formed by electroless plating may be 5 μm or less, and in particular, 0.1 to 1.2 μm. When the thickness of the metal foil 30 is 5 μm or less, the response capability for forming microcircuit patterns (controlling the line / space (L / S) to 10 to 15 μm) can be enhanced.

[0044] The surface roughness (Rz) of the metal foil 30 is 0.05 to 1.5 μm, preferably 0.05 to 1.0 μm, and more preferably 0.05 to 0.4 μm. As described above, the surface roughness of the metal foil is transferred to the surface of the insulating base. As a result, the surface area of ​​the insulating base is increased, and sufficient adhesion is ensured. If sufficient adhesion is not ensured, subsequent processes may not proceed, or separation or peeling may occur during pattern formation. Furthermore, since the surface roughness of the metal foil used in the present invention is lower than that of the metal foil used in previous inventions, the transmission loss due to skin depth is small, which is more advantageous for 5G communication using high frequencies.

[0045] The composition of the metal foil 30 is not particularly limited. Specifically, the metal may be selected from the group consisting of copper, silver, gold, nickel, aluminum, and mixtures thereof.

[0046] To bond the metal foil 30 to the insulating base 20, the metal foil 30 is positioned on the insulating base 20 such that the multiple protrusions 31 on the metal foil 30 face the insulating base 20. That is, the surface of the metal foil 30 on which the multiple protrusions 31 are located is bonded to the insulating base 20. This ensures strong adhesion between the metal foil 30 and the insulating base 20.

[0047] Multiple protrusions formed on the surface of the metal foil are bonded to the surface of the insulating base so that the surface roughness of the metal foil can be transferred to the insulating base. As described above, the metal foil may be laminated by pressurization under constant pressure. In this process, the surface roughness of the metal foil can be transferred to the surface of the insulating base.

[0048] Specifically, as a result of this transfer, the insulating base may have the same surface roughness as the metal foil, with a unit area (μm). 2 ) 2 to 100 particles per unit, especially 5 to 20 particles / μm 2 Furthermore, especially 7-15 particles / μm 2 It may have holes. The holes can ensure high adhesive strength of the insulating base.

[0049] As described above, the metal foil may be directly attached to the substrate surface to form pores. Alternatively, a primer may be attached to the surface of the metal foil, the primer-coated metal foil may be attached to the substrate surface, and the metal foil may be removed to roughen the substrate. In other words, the primer attached to the metal foil can be used to roughen the substrate surface. If it is not possible to use metal foil to roughen the substrate surface, the use of a primer can be chosen. Any material that can be attached to the substrate surface and that can transfer the roughness of the metal foil may be used as the primer. For subsequent processes, the use of a polymer resin is more preferable (see Figure 8).

[0050] The present invention uses a process for forming circuit patterns on a substrate, such as a semi-additive process (SAP) or a modified semi-additive process (mSAP), to form a circuit pattern on a substrate. Unlike the conventional technique, which involves forming via holes in the substrate and then performing electroless plating or sputtering to form a seed layer for electroplating on the substrate surface and within the via holes, the present invention is characterized by bonding a metal foil having specific surface properties to the substrate before forming the via holes. The features of the present invention will be described in detail with reference to the drawings.

[0051] A method for forming a circuit pattern on a substrate according to one embodiment of the present invention includes: preparing a substrate in which a metal base is bonded to an insulating base (step (a)); bonding a metal foil having one or more protrusions with a flat upper end onto the insulating base (step (b)); forming one or more via holes penetrating the insulating base and the metal foil (step (c)); forming seed portions on the inner walls of the via holes (step (d)); placing a dry film on the metal foil and patterning the dry film (step (e)); and forming a circuit pattern by electroplating the via holes exposed by patterning (step (f)).

[0052] In step (a), a substrate is prepared in which a metal base 10 is bonded to an insulating base 20. In step (b), a metal foil 30 having one or more protrusions with a flat upper end is bonded onto the insulating base 20. Steps (a) and (b) are the same as those described above, and their detailed explanation is omitted.

[0053] In step (c), one or more via holes H are formed in the substrate to which the metal base 10 is bonded to the insulating base 20. The via holes H penetrate the metal foil 30 and the insulating base 20, rather than the metal base 10. The via holes H can be formed by suitable techniques commonly known in the art, such as drilling or laser processing. The method of the present invention may further include, after forming the via holes (H), roughening the inner walls of the via holes (H) (desmear, e.g., plasma desmear) and / or removing impurities (e.g., ash) present on the surface of the metal foil 30 or inside the via holes H.

[0054] In step (d), a seed portion is formed on the inner wall of the via hole H. The seed portion 40 enables subsequent electroplating or filling of the via hole H. The seed portion 40 may be formed using a conductive material. The seed portion 40 may be formed by coating the inner wall of the via hole H with a conductive resin composition, or by electroless plating with an electroless plating solution. The conductive resin composition may include a conductive resin commonly known in the art, and the electroless plating solution may include a copper ion source and be commonly known in the art.

[0055] In step (e), the dry film 50 is patterned according to the desired circuit pattern. Specifically, the dry film 50 is patterned by placing the dry film 50 on the metal foil 30, exposing the dry film 50, and developing it to form the desired circuit pattern. The exposure and development of the dry film 50 may be carried out by suitable processes generally known in the art.

[0056] In step (f), the surface of the metal foil 30 exposed by patterning and the via holes H are electroplated to form a circuit pattern. The composition of the electroplating solution used for electroplating is not particularly limited and may include a metal ion source, a strong acid, a halogen ion source, a brightener, a leveling agent, and a support.

[0057] The metal ion source may be a copper ion source, specifically copper sulfate pentahydrate.

[0058] The strong acid may be selected from the group consisting of sulfuric acid, hydrochloric acid, methanesulfonic acid, ethanesulfonic acid, propanesulfonic acid, trifluoromethanesulfonic acid, sulfonic acid, hydrobromic acid, fluoroboric acid, and mixtures thereof.

[0059] The halogen ion source may be a chloride ion source, specifically hydrochloric acid.

[0060] The glossing agent may be selected from the group consisting of bis(3-sulfopropyl) disulfide (sodium salt), 3-mercapto-1-propanesulfonic acid (sodium salt), 3-amino-1-propanesulfonic acid, O-ethyl-S-(3-sulfopropyl)dithiocarbonate (sodium salt), 3-(2-benzthiazolyl-1-thio)-1-propanesulfonic acid (sodium salt), N,N-dimethyldithiocarbamate-(3-sulfopropyl) ester (sodium salt), and mixtures thereof.

[0061] The carrier may be made of a material commonly known in the art. Specifically, the carrier may be made of a metal or a polymer resin. A carrier made of metal can effectively discharge static electricity generated during the storage and transport of the metal foil. A carrier made of polymer resin can be easily separated from the metal foil. Therefore, the material for the carrier can be appropriately selected according to each process and user choice.

[0062] Electroplating of the exposed surface of the metal foil 30 and the via holes H with an electroplating solution minimizes the formation of defects such as voids, while ensuring the uniformity and reliability of the final circuit pattern.

[0063] The method may further include, after step (f), peeling off the patterned dry film 50 and etching the remaining portion of the metal foil 30 exposed by the peeling off of the dry film 50 with an etching composition to form a desired circuit pattern on the substrate (step (g)). The etching composition may be any of those commonly known in the art.

[0064] A further embodiment of the present invention provides a method for forming a circuit pattern on a substrate. Specifically, the method includes preparing a substrate in which a metal base is bonded to an insulating base (step (a')), bonding a metal foil having one or more protrusions with a flat upper end onto the insulating base (step (b')), peeling off the metal foil having a surface roughness formed by the protrusions and transferring the surface roughness of the metal foil to the insulating base (step (c')), forming one or more via holes penetrating the insulating base (step (d')), forming seed portions on the surface of the insulating base having the via holes and on the inner walls of the via holes (step (e')), placing a dry film on the insulating base with the seed portions formed and patterning the dry film (step (f')), and electroplating the via holes exposed by the patterning to form a circuit pattern (step (g')).

[0065] Referring specifically to Figure 4, a substrate is prepared in which a metal base 10 is bonded to an insulating base 20 (step (a')), and a metal foil 30 is bonded onto the insulating base 20 (step (b')). Steps (a') and (b') are the same as those described above, and their detailed explanation is omitted.

[0066] In step (c'), the surface roughness of the metal foil 30 is transferred to the insulating base 20. Specifically, the metal foil 30, which has a surface roughness formed by one or more protrusions 31 and is bonded to the insulating base 20, is peeled off from the insulating base 20. As a result, the surface roughness of the metal foil 30 is transferred to the surface of the insulating base 20, and the surface of the insulating base 20 is roughened. The metal foil 30 may be peeled off by copper etching, which is a common method used to peel off metal foils, specifically by using a copper etching solution or by half etching. By transferring the surface roughness of the metal foil 30, the surface of the insulating base 20 is roughened to 2 to 100 protrusions / μm, similar to those described above. 2 This makes it possible to form pores.

[0067] By forming surface roughness on the insulating base 20 with the metal foil 30, the adhesion between the seed portion formed on the insulating base 20 and the insulating base for subsequent electroplating can be increased, thereby increasing the possibility of forming microcircuit patterns.

[0068] In step (d'), one or more via holes H are formed in a substrate including an insulating base 20 having a surface roughness. The via holes H penetrate the insulating base 20, not the metal base 10. The via holes H can be formed by suitable techniques commonly known in the art, such as drilling or laser processing. The method of the present invention may further include, after forming the via holes (H), roughening the inner walls of the via holes (H) (desmear, e.g., plasma desmear) and / or removing impurities (e.g., ash) present on the surface of the insulating base 20 or within the via holes H.

[0069] In step (e'), seed portions 40 are formed on the surface of the insulating base 20 and on the inner walls of the via holes H. The seed portions 40 enable subsequent electroplating of the via holes H to plate the surface of the insulating base 20. The seed portions 40 may be formed using a conductive material. The seed portions 40 may also be formed by electroless plating with an electroless plating solution. The electroless plating solution may contain a copper ion source and may be one that is commonly known in the art.

[0070] In step (f'), the dry film 50 is patterned according to the desired circuit pattern. Specifically, the dry film 50 is patterned by placing the dry film 50 on an insulating base 20 on which the seed portion 40 is formed, exposing the dry film 50, and developing it to form the desired circuit pattern. The exposure and development of the dry film 50 may be carried out by a suitable process generally known in the art.

[0071] In step (g'), the surface of the seed portion 40 and via holes H exposed by patterning are electroplated to form a circuit pattern. The composition of the electroplating solution used for electroplating is not particularly limited and may include a metal ion source, a strong acid, a halogen ion source, a brightener, a leveling agent, and a support. The composition of the electroplating solution is the same as described above, and a detailed explanation is omitted.

[0072] The method may further include, after step (g'), peeling off the patterned dry film 50 and etching the remaining portion of the seed portion 40 exposed by the peeling off of the dry film 50 with an etching composition to form a desired circuit pattern on the substrate (step (h')). The etching composition may be any of those commonly known in the art.

[0073] As described above, the present invention uses a metal foil having a specific surface structure. Unlike conventional techniques that use electroless plating or sputtering to form circuit patterns on a substrate, this invention ensures high adhesion strength (bonding strength) to the insulating base and allows for the formation of circuit patterns on the substrate in a simple and economical manner. The use of metal foil enables the formation of microcircuit patterns, increasing the uniformity and reliability of the circuit patterns, which contributes to the manufacture of boards that require the transmission of high-frequency signals (for example, circuit boards applied to 5G devices).

[0074] The present invention will be described in more detail with reference to the following examples. However, these examples are provided for illustrative purposes only and are not intended to limit the scope of the invention. It will be apparent to those skilled in the art that various modifications and changes are possible without departing from the scope and spirit of the invention.

[0075] [Preparation Example 1] A laminate consisting of a Cu foil support and a release layer (consisting of a nickel-molybdenum alloy layer and a sodium mercaptobenzotriazole organic layer) was placed in an electroless plating bath. As a result of electroless plating, a 1 μm thick metal foil (copper foil) was formed on the release layer. For electroless plating, an electroless plating solution containing 190-200 g / L of a metal ion source (CuSO4·5H2O), 0.01-0.1 g / L of a nitrogen compound (guanine), 405-420 g / L of a chelating agent (sodium potassium tartrate), a pH adjuster (NaOH), and a reducing agent (28% formaldehyde) was used. Electroless plating was performed at 30°C for 10 minutes.

[0076] [Experimental Example 1] The surface and cross-section of the metal foil formed in Preparation Example 1 were analyzed using a scanning electron microscope (SEM) and a cross-sectional polisher (CP), respectively. The results are shown in Figures 5 and 6.

[0077] Referring to Figures 5 and 6, multiple protrusions with flat upper ends were formed on the surface of the metal foil prepared in Preparation Example 1.

[0078] [Example 1] Using the method illustrated in claim 9 and FIG. 1, a circuit pattern was formed.

[0079] [Experimental Example 2] When the circuit pattern was formed in Example 1, the metal foil of Preparation Example 1 was bonded to the insulating base, peeled off, and the surface roughness of the metal foil was transferred to the insulating base. Next, the surface of the insulating base was analyzed with a scanning electron microscope (SEM). The SEM image is shown in FIG. 7.

[0080] Referring to FIG. 7, the surface of the insulating base was roughened corresponding to the surface structure of the metal foil.

[0081] [Experimental Example 3] Nanotus Cu foil The Nanotus Cu foil was laminated on a 100×100 mm test piece (ABF GL-103, Ajinomoto).

[0082] The Cu foil was laminated once at a temperature of 100°C and a pressure of 5 kg / m 2 for 60 seconds, laminated twice at a temperature of 100°C and a pressure of 5 kg / m 2 for 60 seconds, and cured at a temperature of 130°C for 30 minutes and at a temperature of 165°C for 30 minutes.

[0083] After lamination, the carrier copper foil was removed, and copper electroplating (20 μm) was performed with Nanotus Cu.

[0084] The adhesive strength was evaluated under the following conditions: peeling test area of 10 mm, test speed of 50 mm / min, and angle of 90°.

[0085] [Table 1]

Claims

1. A method for forming a circuit pattern on a substrate, comprising: preparing a substrate in which a metal base is bonded to an insulating base; bonding a metal foil having one or more protrusions with a flat upper end onto the insulating base; and transferring the surface roughness of the metal foil to the insulating base, wherein each of the protrusions with a flat upper end has a frustoconical or polygonal frustoconical shape, and includes a flat portion formed at the upper end of the frustoconical or polygonal frustoconical shape, and an outer surface, wherein only the outer surface of the flat portion and the outer surface has a plurality of minute protrusions formed on its surface.

2. The method according to claim 1, wherein the metal foil is joined onto the insulating base such that the projection with a flat upper end faces the surface of the insulating base.

3. The method according to claim 1, wherein the surface roughness (Rz) of the metal foil is 0.05 to 1.5 μm.

4. The method according to claim 1, wherein the thickness of the metal foil is 5 μm or less.

5. The method according to claim 1, wherein the metal foil is formed by electroless plating.

6. Unit area (μm ２ The method according to claim 1, wherein 2 to 100 holes are formed per surface of the insulating base to which the roughness is transferred.

7. A method for forming a circuit pattern on a substrate, comprising: preparing a substrate in which a metal base is bonded to an insulating base; bonding a metal foil having one or more protrusions with a flat upper end onto the insulating base; forming one or more via holes penetrating the insulating base and the metal foil; forming seed portions on the inner walls of the via holes; placing a dry film on the metal foil and patterning the dry film; and electroplating the via holes exposed by patterning to form a circuit pattern, wherein each of the protrusions with a flat upper end has a frustoconical or polygonal frustoconical shape, and includes a flat portion and an outer surface formed at the upper end of the frustoconical or polygonal frustoconical shape, and of the flat portion and the outer surface, only the outer surface has a plurality of minute protrusions formed on its surface.

8. A method for forming a circuit pattern on a substrate, comprising: preparing a substrate in which a metal base is bonded to an insulating base; bonding a metal foil having one or more protrusions with a flat upper end onto the insulating base; peeling off the metal foil having a surface roughness formed by the protrusions and transferring the surface roughness of the metal foil to the insulating base; forming one or more via holes penetrating the insulating base; forming seed portions on the surface of the insulating base having the via holes and on the inner walls of the via holes; placing a dry film on the insulating base where the seed portions are formed and patterning the dry film; and electroplating the via holes exposed by patterning to form a circuit pattern, wherein each of the protrusions with a flat upper end has a frustoconical or polygonal frustoconical shape, and includes a flat portion and an outer surface formed at the upper end of the frustoconical or polygonal frustoconical shape, and of the flat portion and the outer surface, only the outer surface has a plurality of minute protrusions formed on its surface.

Images