Substrate processing method and substrate processing system

Abstract

The present invention provides a substrate processing method for processing a substrate, the method comprising: a step in which one surface of the substrate is ground so as to form a recess wherein the central part of the one surface is recessed from the outer peripheral part; a step in which the thickness distribution of the substrate is acquired by measuring the thickness of the substrate after the grinding; a step in which the optimum etching conditions for optimizing the etching amount deviation distribution during the etching of the one surface are calculated on the basis of the thickness distribution; and a step in which the one surface is etched by supplying an etching liquid from an etching liquid supply unit to the one surface of the substrate after the grinding on the basis of the optimum etching conditions.

Description

Technical Field

[0001] The present disclosure relates to a substrate processing method and a substrate processing system.

Background Art

[0002] Patent Document 1 discloses a method for manufacturing a semiconductor wafer, which includes a step of planarizing at least the front surface of a wafer obtained by slicing a semiconductor ingot, and a step of etching the front surface of the planarized wafer by spin etching.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The technology according to the present disclosure appropriately controls the surface shape of a substrate during an etching process.

Means for Solving the Problems

[0005] One aspect of the present disclosure is a substrate processing method for processing a substrate, including grinding one surface of the substrate to form a concave portion in which a central portion of the one surface is recessed from an outer peripheral portion, measuring a thickness of the substrate after grinding to obtain a thickness distribution of the substrate, calculating optimum etching conditions for optimizing an etching amount deviation distribution when etching the one surface based on the thickness distribution, and supplying an etching solution from an etching solution supply unit to the one surface of the substrate after grinding and etching the one surface based on the optimum etching conditions. Furthermore, the height of the recess is less than or equal to the difference between the maximum and minimum values ​​of the etching amount deviation distribution that can be controlled when etching the surface.

Effects of the Invention

[0006] According to this disclosure, the surface shape of the substrate during the etching process can be appropriately controlled. [Brief explanation of the drawing]

[0007] [Figure 1] This is a plan view showing the schematic configuration of the wafer processing system. [Figure 2] This is a side view showing a schematic configuration of the etching apparatus. [Figure 3] This is an explanatory diagram showing how the nozzle moves in the radial direction. [Figure 4] This is a side view showing a schematic configuration of the grinding unit. [Figure 5] This is an explanatory diagram showing how the wafer surface is ground using a grinding unit. [Figure 6] This is a flowchart showing the main steps in wafer processing. [Figure 7] This is an explanatory diagram showing the main steps in wafer processing. [Figure 8] This is an explanatory diagram showing an example of the etching amount deviation distribution. [Figure 9] This flowchart shows the main steps in the method for optimizing the etching amount deviation distribution. [Figure 10] This is an explanatory diagram showing an example of multiple parts. [Figure 11] This is an explanatory diagram showing an example of parts used for overlapping. [Figure 12] This is an explanatory diagram showing an example of stacking multiple optimized parts. [Figure 13] This is a flowchart showing the main steps in wafer processing. [Figure 14] This is a flowchart showing the main steps in wafer processing. [Figure 15] This is an explanatory diagram showing the main steps in wafer processing. [Figure 16] This is a flowchart showing the main steps in wafer processing. [Figure 17] This is an explanatory diagram showing the main steps in wafer processing. [Figure 18] This is a flowchart showing the main steps in wafer processing. [Figure 19] It is an explanatory diagram showing the main processes of wafer processing. [Figure 20] It is an explanatory diagram showing an example of the etching amount deviation distribution. [Figure 21] It is an explanatory diagram showing an example of the shape of the first surface of the wafer after grinding. [Figure 22] It is an explanatory diagram showing an example of a plurality of parts.

Mode for Carrying Out the Invention

[0008] In the manufacturing process of semiconductor devices, the cut surface of a disk-shaped silicon wafer (hereinafter simply referred to as "wafer") obtained by cutting out from a single crystal silicon ingot with a wire saw or the like is flattened and smoothed to make the thickness of the wafer uniform. The flattening of the cut surface is performed, for example, by surface grinding or lapping. The smoothing of the cut surface is performed, for example, by spin etching in which an etching solution is supplied from above the cut surface of the wafer while rotating the wafer.

[0009] Patent Document 1 described above discloses that at least the front surface of a wafer obtained by slicing a semiconductor ingot is flattened by surface grinding or lapping, and then the front surface is etched by spin etching. In the spin etching process described in Patent Document 1, at the start of the spin etching, the injection nozzle is moved above the outer peripheral portion of the wafer, and then the position of the injection nozzle is fixed above the central portion of the wafer whose outer peripheral portion has been etched, and an etching solution is supplied for spin etching.

[0010] However, the present inventors have found that when the etching solution is supplied with the nozzle fixed above the center of the wafer using the method disclosed in Patent Document 1, it becomes impossible to properly control the surface shape of the wafer after etching, particularly directly below the discharge of the etching solution. Specifically, they found that the amount of etching in the center of the wafer, directly below the discharge of the etching solution, is smaller than the amount of etching in the outer periphery surrounding the center. In the outer periphery of the wafer, the etching solution supplied to the center is pushed through by centrifugal force and etching proceeds. On the other hand, in the center, directly below the discharge of the etching solution, the supplied etching solution is pushed out by centrifugal force, and the flow (flow velocity and flow rate of the etching solution) necessary for etching to proceed on the wafer surface cannot be formed during this removal by centrifugal force.

[0011] The technology described herein has been developed in view of the above-mentioned findings and appropriately controls the surface shape of the substrate during etching. Hereinafter, the wafer processing system as a substrate processing system and the wafer processing method as a substrate processing method according to this embodiment will be described with reference to the drawings. In this specification and the drawings, elements having substantially the same functional configuration are denoted by the same reference numerals to avoid redundant explanations.

[0012] In the wafer processing system 1 according to this embodiment, a wafer W, which is a substrate obtained by cutting from an ingot, is subjected to a process to improve the in-plane uniformity of its thickness. Hereinafter, the cut surface of the wafer W will be referred to as the first surface Wa and the other surface Wb. The first surface Wa is the surface opposite to the second surface Wb. In addition, the first surface Wa and the second surface Wb may be collectively referred to as the surface of the wafer W.

[0013] As shown in Figure 1, the wafer processing system 1 has a configuration in which an loading / unloading station 10 and a processing station 11 are integrally connected. The loading / unloading station 10 loads / unloads cassettes C capable of accommodating multiple wafers W to and from the outside, for example. The processing station 11 is equipped with various processing devices that perform desired processing on the wafers W.

[0014] The loading / unloading station 10 is equipped with a cassette mounting platform 20. In the illustrated example, the cassette mounting platform 20 is configured to accommodate multiple cassettes, for example, two cassettes C, in a single row along the Y-axis.

[0015] The processing station 11 is provided with, for example, three processing blocks G1 to G3. The first processing block G1, the second processing block G2, and the third processing block G3 are arranged in this order from the negative X-axis side (towards the loading / unloading station 10) to the positive X-axis side.

[0016] The first processing block G1 is equipped with inversion devices 30, 31, a thickness measuring device 40, etching devices 50, 51, and a wafer transport device 60. The inversion devices 30 and the etching device 50 are arranged in this order from the negative X-axis side to the positive X-axis side. The inversion devices 30, 31 and the thickness measuring device 40 are stacked in this order from the bottom in the vertical direction, for example. The etching devices 50, 51 are stacked in this order from the bottom in the vertical direction, for example. The wafer transport device 60 is located on the positive Y-axis side of the etching devices 50, 51. Note that the number and arrangement of the inversion devices 30, 31, the thickness measuring device 40, the etching devices 50, 51, and the wafer transport device 60 are not limited to these.

[0017] The inversion devices 30 and 31 invert the first surface Wa and the second surface Wb of the wafer W in the vertical direction. The configuration of the inversion devices 30 and 31 is arbitrary.

[0018] The thickness measuring device 40, in one example, comprises a measuring unit (not shown) and a calculation unit (not shown). The measuring unit includes sensors that measure the thickness of the wafer W at multiple points after grinding or etching. The calculation unit obtains the thickness distribution of the wafer W from the measurement results (wafer W thickness) obtained by the measuring unit and further calculates the flatness (TTV: Total Thickness Variation) of the wafer W. Note that the calculation of the wafer W thickness distribution and flatness may be performed by the control device 140 described later instead of the calculation unit. In other words, the calculation unit (not shown) may be provided within the control device 140 described later. Note that the configuration of the thickness measuring device 40 is not limited to this and can be configured arbitrarily.

[0019] The etching devices 50 and 51 are connected to the processing device 110 described later. evening The silicon (Si) on the first surface Wa or the second surface Wb after grinding is etched.

[0020] As shown in Figure 2, the etching apparatuses 50 and 51 each include a wafer holder 52 as a substrate holder, a rotating mechanism 53, and a nozzle 54 as an etching solution supply unit. The wafer holder 52 holds the outer edge of the wafer W at multiple points, in this embodiment, at three points. The configuration of the wafer holder 52 is not limited to the illustrated example; for example, the wafer holder 52 may include a chuck that holds the wafer W from below by suction. The rotating mechanism 53 rotates the wafer W held by the wafer holder 52 around a vertical rotation center line 52a.

[0021] The nozzle 54 supplies etching solution E to the first surface Wa or the second surface Wb of the wafer W held in the wafer holding section 52. The nozzle 54 is connected to an etching solution supply source (not shown) that supplies the etching solution E to the nozzle 54. The nozzle 54 is located above the wafer holding section 52 and is configured to be movable in the horizontal and vertical directions by a moving mechanism 55. In one example, the nozzle 54 is configured to reciprocate (scan) through the rotational centerline 52a of the wafer holding section 52, that is, above the center of the wafer W as shown in Figure 3.

[0022] Etching solution E contains at least hydrofluoric acid or nitric acid to properly etch the silicon on the wafer W that may be etched. Etching solution E may also contain phosphoric acid or sulfuric acid.

[0023] As shown in Figure 1, the wafer transport device 60 has, for example, two transport arms 61 that hold and transport the wafer W. Each transport arm 61 is configured to be movable in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. The wafer transport device 60 is configured to transport the wafer W to the cassette C of the cassette mounting table 20, the inversion devices 30, 31, the thickness measuring device 40, the etching devices 50, 51, the buffer device 70 (described later), the cleaning device 80 (described later), and the inversion device 90 (described later).

[0024] The second processing block G2 is provided with a buffer device 70, a cleaning device 80, an inversion device 90, and a wafer transport device 100. The buffer device 70, cleaning device 80, and inversion device 90 are stacked in this order from the bottom in the vertical direction, for example. The wafer transport device 100 is located on the negative Y-axis side of the buffer device 70, cleaning device 80, and inversion device 90. The number and arrangement of the buffer device 70, cleaning device 80, inversion device 90, and wafer transport device 100 are not limited to these.

[0025] The buffer device 70 temporarily holds the wafer W before processing, which is being transferred from the first processing block G1 to the second processing block G2. The configuration of the buffer device 70 is arbitrary.

[0026] The cleaning device 80 cleans the first surface Wa or the second surface Wb after grinding by the processing device 110, which will be described later. For example, a brush is brought into contact with the first surface Wa or the second surface Wb to clean it. Pressurized cleaning fluid may be used to clean the first surface Wa or the second surface Wb. The cleaning device 80 may also be configured to clean the first surface Wa and the second surface Wb simultaneously when cleaning the wafer W.

[0027] The inversion device 90, like the inversion devices 30 and 31, inverts the first surface Wa and the second surface Wb of the wafer W in the vertical direction. The configuration of the inversion device 90 is arbitrary.

[0028] The wafer transport device 100 has, for example, two transport arms 101 that hold and transport wafers W. Each transport arm 101 is configured to be movable in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. The wafer transport device 100 is configured to transport wafers W to etching devices 50, 51, buffer device 70, cleaning device 80, inversion device 90, and processing device 110, which will be described later.

[0029] The third processing block G3 is equipped with processing devices 110. However, the number and arrangement of processing devices 110 are not limited to this.

[0030] The processing apparatus 110 has a rotary table 111. The rotary table 111 is configured to rotate freely around a vertical rotation centerline 112 by a rotation mechanism (not shown). Four chucks 113 for adsorbing and holding wafers W are provided on the rotary table 111. Of the four chucks 113, two first chucks 113a are used for grinding at the first processing position B1. These two first chucks 113a are positioned point-symmetrically with respect to the rotation centerline 112. The remaining two second chucks 113b are used for grinding at the second processing position B2. These two second chucks 113b are also positioned point-symmetrically with respect to the rotation centerline 112. In other words, the first chucks 113a and the second chucks 113b are arranged alternately in the circumferential direction.

[0031] A porous chuck, for example, is used for the chuck 113. The surface of the chuck 113, i.e., the wafer holding surface W, has a convex shape in the center that protrudes more than the edges when viewed from the side. Although this central protrusion is minute, in Figure 4, the central protrusion of the chuck 113 is shown enlarged for clarity of explanation.

[0032] As shown in Figure 4, the chuck 113 is held in place by the chuck base 114. The chuck base 114 is provided with a tilt adjustment section 115 that adjusts the relative inclination between the chuck 113 and the grinding wheels 121 and 131 of the grinding units 120 and 130, which will be described later. The tilt adjustment section 115 has a fixed shaft 116 provided on the lower surface of the chuck base 114 and multiple, for example, two, lifting shafts 117. Each lifting shaft 117 is configured to be extendable and retractable, raising and lowering the chuck base 114. This tilt adjustment section 115 allows the chuck 113 and the chuck base 114 to be tilted by raising and lowering the other end of the outer circumference of the chuck base 114 vertically using the lifting shaft 117, with one end (corresponding to the fixed shaft 116) as the pivot point. This allows for adjustment of the relative inclination between the surfaces of the grinding wheels 121 and 131, which are provided by each of the grinding units 120 and 130 at processing positions B1 to B2 (described later), and the surface of the chuck 113.

[0033] As shown in Figure 1, the four chucks 113 can move to the transfer positions A1-A2 and the machining positions B1-B2 as the rotary table 111 rotates. In addition, each of the four chucks 113 is configured to rotate around a vertical axis by a rotation mechanism (not shown).

[0034] The first transfer position A1 is located on the negative X-axis and positive Y-axis side of the rotary table 111, and the wafer W is transferred to the first chuck 113a when grinding the first surface Wa. The second transfer position A2 is located on the negative X-axis and negative Y-axis side of the rotary table 111, and the wafer W is transferred to the second chuck 113b when grinding the second surface Wb.

[0035] The first processing position B1 is located on the positive X-axis and negative Y-axis side of the rotary table 111, where the first grinding unit 120 is positioned. The first grinding unit 120 grinds, for example, the first surface Wa or the second surface Wb of the wafer W held in the first chuck 113a. The second processing position B2 is located on the positive X-axis and positive Y-axis side of the rotary table 111, where the second grinding unit 130 is positioned. The second grinding unit 130 grinds, for example, the second surface Wb or the first surface Wa of the wafer W held in the second chuck 113b.

[0036] Furthermore, thickness measuring devices (not shown) for measuring the thickness of the wafer W after grinding may be provided at the handover positions A1, A2 or processing positions B1, B2.

[0037] As shown in Figure 4, the first grinding unit 120 includes a grinding wheel 122 with an annular grinding wheel 121 on its lower surface, a mount 123 that supports the grinding wheel 122, a spindle 124 that rotates the grinding wheel 122 via the mount 123, and a drive unit 125 that incorporates, for example, a motor (not shown). The first grinding unit 120 is also configured to be movable vertically along the support column 126 shown in Figure 1.

[0038] The second grinding unit 130 has the same configuration as the first grinding unit 120. That is, the second grinding unit 130 has a grinding wheel 132 equipped with an annular grinding wheel 131, a mount 133, a spindle 134, a drive unit 135, and a support column 136.

[0039] As shown in Figure 5, when grinding the first surface Wa using the first grinding unit 120, the first chuck 113a is tilted so that the first surface Wa of the wafer W held in the first chuck 113a and the surface of the grinding wheel 121 are at an arbitrary angle. For example, if the first surface Wa and the surface of the grinding wheel 121 are parallel, the first surface Wa can be ground flat after grinding. Alternatively, for example, if the surface of the grinding wheel 121 is tilted upward radially outward relative to the first surface Wa, the first surface Wa can be ground in a V-shape in cross-sectional view after grinding. Furthermore, the first grinding unit 120 can also grind the first surface Wa in an A-shape, M-shape, or W-shape in longitudinal cross-sectional view after grinding. Then, the annular grinding wheel 121 and the wafer W come into contact in an arc shape from the center to the outer edge, and by rotating the first chuck 113a and the grinding wheel 122 in this state, the entire surface of the first surface Wa is ground. The same procedure is followed when grinding the second surface Wb using the second grinding unit 130.

[0040] As shown in Figure 1, the wafer processing system 1 is equipped with a control device 140. The control device 140 is a computer equipped with, for example, a CPU and memory, and has a program storage unit (not shown). The program storage unit stores a program that controls the processing of wafer W in the wafer processing system 1. The control device 140 may also have a calculation unit (not shown) for obtaining the thickness distribution of wafer W from the measurement results (thickness of wafer W) of the thickness measuring device 40 and for calculating the flatness of wafer W. The above program may have been recorded on a storage medium H that is readable by the computer and installed from the storage medium H to the control device 140. The storage medium H may be temporary or permanent.

[0041] Next, we will describe wafer processing performed using the wafer processing system 1 configured as described above. In this embodiment, a wafer W, which has been cut from an ingot using a wire saw or the like and wrapped, is subjected to processing to improve the in-plane uniformity of its thickness.

[0042] First, a cassette C containing multiple wafers W is placed on the cassette tray 20 of the loading / unloading station 10. In the cassette C, the wafers W are stored with the first surface Wa facing upwards and the second surface Wb facing downwards. Next, the wafer transport device 60 removes the wafers W from the cassette C and transports them to the buffer device 70.

[0043] Next, the wafer W is transported to the processing apparatus 110 by the wafer transport device 100 and transferred to the first chuck 113a at the first transfer position A1. At the first chuck 113a, the second surface Wb of the wafer W is held by suction.

[0044] Next, the rotary table 111 is rotated to move the wafer W to the first processing position B1. Then, the first surface Wa of the wafer W is ground by the first grinding unit 120 (step S101 in Figure 6). In step S101, the control device 140 controls the processing device 110 to grind the first surface Wa into a V-shape, so that a recessed area War is formed on the ground surface Wa, with its center recessed from the outer edge, as shown in Figure 7(a). Details of this V-shape will be described later.

[0045] Next, the rotary table 111 is rotated to move the wafer W to the first transfer position A1. At the first transfer position A1, the first surface Wa of the ground wafer W may be cleaned by a cleaning unit (not shown).

[0046] Next, the wafer W is transported to the cleaning device 80 by the wafer transport device 100. In the cleaning device 80, the first surface Wa and the second surface Wb of the wafer W are cleaned (step S102 in Figure 6).

[0047] Next, the wafer W is transported to the inversion device 90 by the wafer transport device 100. In the inversion device 90, the first surface Wa and the second surface Wb of the wafer W are inverted vertically (step S103 in Figure 6). That is, the wafer W is inverted so that the first surface Wa faces downwards and the second surface Wb faces upwards.

[0048] Next, the wafer W is transported to the processing apparatus 110 by the wafer transport device 100 and transferred to the second chuck 113b at the second transfer position A2. At the second chuck 113b, the first surface Wa of the wafer W is held by suction.

[0049] Next, the rotary table 111 is rotated to move the wafer W to the second processing position B2. Then, the second surface Wb of the wafer W is ground by the second grinding unit 130 (step S104 in Figure 6). In step S104, the control device 140 controls the processing device 110 to grind the second surface Wb into a V-shape so that a recess Wbr is formed on the ground surface Wb, with the center recessed from the outer edge, as shown in Figure 7(b). Details of this V-shape will be described later.

[0050] Next, the rotary table 111 is rotated to move the wafer W to the second transfer position A2. At the second transfer position A2, the second surface Wb of the ground wafer W may be cleaned by a cleaning unit (not shown).

[0051] Next, the wafer W is transported to the cleaning device 80 by the wafer transport device 100. In the cleaning device 80, the second surface Wb and the first surface Wa of the wafer W are cleaned (step S105 in Figure 6).

[0052] Next, the wafer W is transported to the thickness measuring device 40 by the wafer transport device 60. The thickness measuring device 40 measures the thickness of the wafer W after grinding on both the first surface Wa and the second surface Wb (step S106 in Figure 6). If the processing device 110 is equipped with a thickness measuring device, the thickness of the wafer W after grinding may be measured using the thickness measuring device of the processing device 110.

[0053] In step S106, the thickness measuring device 40 obtains the thickness distribution of the wafer W after grinding by measuring the thickness of the wafer W at multiple points, and further calculates the flatness of the wafer W. The calculated thickness distribution and flatness of the wafer W are output to, for example, the control device 140.

[0054] The control device 140 determines the optimal etching conditions for the subsequent etching process of the first surface Wa and the second surface Wb based on the thickness distribution and flatness of the output wafer W, and optimizes the etching amount deviation distribution (step S107 in Figure 6). The detailed method for optimizing the etching amount deviation distribution in the control device 140 will be described later. The etching amount deviation is the value (deviation) obtained by subtracting the average value of the etching amount from the etching amount on the wafer surface. The average value of the etching amount is the value of the etching amount averaged across the wafer surface.

[0055] Next, the wafer W is transported to the etching apparatus 51 by the wafer transport device 60. In the etching apparatus 51, the second surface Wb of the wafer W is etched with the etching solution E under the optimal etching conditions determined in step S107 (step S108 in Figure 6).

[0056] In step S108, first, the wafer W is held in the wafer holding unit 52 with the second surface Wb facing upwards (towards the nozzle 54). Next, the wafer holding unit 52 (wafer W) is rotated around the vertical rotation centerline 52a, and the dispensing of etching solution E from the nozzle 54 is started, initiating etching of the second surface Wb.

[0057] During etching of the second surface Wb, while continuing to discharge the etching solution E from the nozzle 54, the nozzle 54 is moved back and forth (scanned) above the rotation center of the wafer W, i.e., passing through the rotation center line 52a, with the rotation center line 52a as the intermediate point, as shown in Figure 3. The detailed method for determining etching conditions such as the rotation speed of the wafer W, the scan width of the nozzle 54, and the scan speed when moving the nozzle 54 back and forth will be described later.

[0058] Once etching of the second surface Wb under optimal etching conditions is complete, the supply of etching solution E from the nozzle 54 is stopped, the second surface Wb of the wafer W is rinsed with pure water, and then shaken dry. After that, the rotation of the wafer holder 52 (wafer W) is stopped, and the etching of the wafer W is completed.

[0059] Here, the optimal etching conditions for wafer W are determined in step S107, as described above, based on the thickness distribution and flatness of the wafer W after grinding. Specifically, the optimal etching conditions are determined based on the difference between the measured values ​​of the thickness distribution and flatness of wafer W measured by the thickness measuring device 40 and the thickness distribution and flatness of the target surface shape of wafer W after etching (hereinafter referred to as the "target shape"). Then, in step S108, the etching amount deviation distribution is optimized by etching the second surface Wb with the optimal etching conditions, and the second surface Wb is processed to the target shape, which in this embodiment is flat, as shown in Figure 7(c).

[0060] Next, the wafer W is transported to the inversion device 31 by the wafer transport device 60. In the inversion device 31, the first surface Wa and the second surface Wb of the wafer W are inverted vertically (step S109 in Figure 6). That is, the wafer W is inverted so that the first surface Wa faces upwards and the second surface Wb faces downwards.

[0061] Next, the wafer W is transported to the etching apparatus 50 by the wafer transport device 60. In the etching apparatus 50, the first surface Wa of the wafer W is etched with the etching solution E under the optimal etching conditions determined in step S107 (step S110 in Figure 6).

[0062] In step S110, the first surface Wa is etched in the same way as the second surface Wb in step S108. That is, first, the wafer W is held in the wafer holder 52 with the first surface Wa facing upwards. Next, the wafer holder 52 (wafer W) is rotated, and the discharge of etching solution E from the nozzle 54 is started, and etching of the first surface Wa is started. After that, while continuing to discharge the etching solution E from the nozzle 54, the nozzle 54 is moved back and forth (scanned) with the rotation center line 52a as the midpoint, as shown in Figure 3, to etch the first surface Wa.

[0063] In this step S110, as in step S108, the etching amount deviation distribution is optimized by etching the first surface Wa under optimal etching conditions, and the first surface Wa is processed to the target shape, which in this embodiment is flat, as shown in Figure 7(d). That is, the target shape of the wafer W is flat, and the thickness distribution of the wafer W becomes uniform.

[0064] Next, the wafer W is transported to the thickness measuring device 40 by the wafer transport device 60. The thickness measuring device 40 measures the thickness of the etched wafer W on both sides, the first surface Wa and the second surface Wb (step S111 in Figure 6).

[0065] In step S111, the thickness measuring device 40 obtains the thickness distribution of the wafer W after etching by measuring the thickness of the wafer W at multiple points after double-sided etching, and further calculates the flatness of the wafer W. The calculated thickness distribution and flatness of the wafer W are output to, for example, the control device 140, and are used, for example, in the processing of other wafers W that will be processed next by the wafer processing system 1.

[0066] Subsequently, the wafer W, having undergone all processing, is transported by the wafer transport device 60 to the cassette C on the cassette mounting table 20. This completes the series of wafer processing in the wafer processing system 1. Note that the wafer W processed in the wafer processing system 1 may be polished outside of the wafer processing system 1.

[0067] Next, we will explain in detail the grinding of the first surface Wa (step S101), the grinding of the second surface Wb (step S104), and the optimization of the etching amount deviation distribution between the first surface Wa and the second surface Wb (step S107).

[0068] As described above, in step S108, the wafer W is rotated, and the nozzle 54 is moved back and forth (scanned) in the radial direction passing through the center of the wafer W, while the nozzle 54 is used to transfer fluid from the wafer W to the wafer W. Second surface Wb The etching solution E is supplied to the Second surface Wb Etching is performed. Hereafter, this type of etching may be referred to as "scan etching". Also, in step S110, wafer W First surface Wa It is scanned and etched.

[0069] Here, in order to control the surface shape of the wafer W after etching, it is necessary to optimize the etching amount deviation distribution (etching profile) in the wafer radial direction. In step S107, the etching amount deviation distribution is optimized by adjusting the etching conditions (etching recipe), such as the rotation speed (rotation speed) of the wafer W, the scan speed during the reciprocating movement of the nozzle 54, and the scan width.

[0070] On the other hand, due to the nature of the process, the etching amount deviation distribution in scan etching tends to have a smaller etching amount deviation near the center of the wafer W (0 on the horizontal axis), as shown in Figure 8, resulting in a V-shaped shape that is depressed downwards. The horizontal axis in Figure 8 shows the radial position from the center of the wafer (0 on the horizontal axis) to the outer edge (±R on the horizontal axis), and the vertical axis shows the etching deviation (difference from the average value of the etching amount). In other words, the wafer surface after etching tends to have an A-shaped shape that protrudes upwards. For this reason, if, for example, the shape of the wafer surface after grinding is not V-shaped, and an attempt is made to flatten the wafer surface by optimizing the etching amount deviation distribution in step S107, the desired etching amount deviation may not be generated in the optimization calculation, and the wafer surface after etching may not be flat. That is, if the shape of the wafer surface after grinding is not V-shaped, the error in optimizing the etching amount deviation distribution in step S107 may be large. Therefore, it is preferable to form the shape of the wafer surface after grinding into a V-shape.

[0071] Furthermore, due to the nature of the process, the etching amount deviation distribution in scan etching has an upper limit on the height He of the V-shape. This limit height He of the etching amount deviation distribution is the difference between the maximum and minimum values ​​of the etching amount deviation distribution, and is the upper limit that can be controlled during etching. For this reason, for example, if the height of the V-shape on the wafer surface after grinding is large, attempting to flatten the wafer surface by optimizing the etching amount deviation distribution in step S107 may result in the inability to generate the desired etching amount deviation in the optimization calculation, potentially leading to an uneven wafer surface after etching. In other words, if the height of the V-shape after grinding is large, the error in optimizing the etching amount deviation distribution in step S107 may increase. Therefore, it is preferable to keep the height of the V-shape on the wafer surface after grinding below the limit height He of the etching amount deviation distribution.

[0072] In light of the above, in step S101, the control device 140 controls the processing device 110 to grind the first surface Wa in a V-shape so that a recess War is formed on the first surface Wa after grinding, with the center recessed from the outer edge, as shown in Figure 7(a). The height Ha of the recess War is set to be less than or equal to the limit height He of the etching amount deviation distribution. This limit height He is determined based on etching conditions, such as the supply time of the etching solution E, the rotation speed of the wafer W, the scan speed during the reciprocating movement of the nozzle 54, and the scan width. The limit height He is, for example, 1.0 μm or less.

[0073] Similarly, in step S104, the control device 140 controls the processing device 110 to create a recess in the second surface Wb after grinding, as shown in Figure 7(b), where the center is recessed compared to the outer periphery. Wbr The second surface Wb is ground in a V-shape to form a recess. The height Hb of the recess Wbr is then set to be less than or equal to the limit height He of the etching amount deviation distribution.

[0074] In this way, by grinding the first surface Wa and the second surface Wb into shapes that can be controlled by etching in steps S101 and S104, the etching amount deviation distribution of the first surface Wa and the second surface Wb in steps S108 and S110 can be appropriately optimized.

[0075] In step S107, the optimal etching conditions for the subsequent etching process of the first surface Wa and the second surface Wb are determined from the thickness distribution and flatness of the wafer W after double-sided grinding obtained in step S106, and the etching amount deviation distribution is optimized.

[0076] In determining the optimal etching conditions (optimization of the etching amount deviation distribution), prior to processing the wafer W in the wafer processing system 1, several parts used in the optimization process described later are acquired (step S107-0 in Figure 9). These parts represent the etching amount deviation distribution of the wafer W for a given etching condition.

[0077] In step S107-0, etching is performed on the dummy wafer under multiple different etching conditions. Specifically, the dummy wafer is etched by changing, for example, the rotation speed of the dummy wafer during etching, the scanning speed of the nozzle 54, or the scanning width of the nozzle 54 (see scanning width L in Figure 3). In this case, the etching processing time for each dummy wafer is the same. The etching of the dummy wafer is performed by rotating the dummy wafer, similar to the etching in steps S108 and S110. and In both cases, etching solution E is supplied from the nozzle 54 to the dummy wafer while the nozzle 54 is moved back and forth. In the following description, the back-and-forth movement of the nozzle 54 between both ends of the dummy wafer is considered one loop.

[0078] The etching of the dummy wafer under each etching condition is performed for a predetermined desired time (desired number of loops). The etching amount deviation distribution of the dummy wafer is then acquired and output to the control device 140. Furthermore, the control device 140 compresses the output etching amount deviation distribution for each etching condition into an etching amount deviation distribution per unit time (unit number of loops), and stores each of these compressed etching amount deviation distributions as the above-mentioned parts.

[0079] Figure 10 shows an example of multiple parts. In Figure 10, the horizontal axis represents the radial position from the center of the wafer (0 on the horizontal axis) to the outer edge (±R on the horizontal axis), and the vertical axis represents the etching deviation. The example shown in Figure 10 is when a total of 36 types of parts are stored in the control device 140, or in other words, it is an example of obtaining the etching amount deviation distribution under a total of 36 different etching conditions.

[0080] The above unit time (unit loop count) can be set arbitrarily depending on the purpose, but it is desirable that the unit time (unit loop count) be short in order to appropriately obtain the target etching amount deviation distribution in the overlapping of parts described later. In one example, the unit time of the parts stored in the control device 140 may be the time of one loop (one round trip of the scan width L shown in Figure 3), preferably 0.5 loops (half a round trip of the scan width L shown in Figure 3).

[0081] In the above explanation, the case of obtaining the above parts by etching a dummy wafer was used as an example, but the etching target for obtaining parts is not limited to a dummy wafer. Specifically, for example, the etching result of the wafer W that is actually processed by the wafer processing system 1 may be stored as the above parts.

[0082] During wafer processing using the wafer processing system 1 described herein, the optimal etching conditions are determined using the multiple parts obtained in this manner (Figure 10).

[0083] First, the target etching amount deviation distribution in the etching process of steps S108 and S110 is obtained based on the thickness distribution of the target shape of the wafer W after etching and the thickness distribution of the surface shape of the wafer W after grinding (hereinafter referred to as the "measured shape") obtained in step S106 (step S107-1 in Figure 9). In this embodiment, the target shapes of the first surface Wa and the second surface Wb are both flat. The target etching amount deviation distributions of the first surface Wa and the second surface Wb can be obtained, for example, by taking half the difference between the thickness distribution of the target shape of the wafer W and the thickness distribution of the measured shape, and subtracting the average value of that difference. Specifically, the target etching amount deviation distributions of the first surface Wa and the second surface Wb are V-shaped, as shown in Figure 8.

[0084] Next, multiple parts are stacked on top of each other, and an optimization method is used to optimize the parts used for stacking and the number of times those parts are stacked, so that the target etching amount deviation distribution obtained in step S107-1 above is achieved (step S107-2 in Figure 9).

[0085] In step S107-2, for example, the control of the etching amount deviation distribution is applied to the knapsack problem to optimize the number of times parts are superimposed. For example, the etching amount deviation distribution is the knapsack in the knapsack problem, and the parts are the items in the knapsack problem. Then, the number of times parts are superimposed is optimized so that the difference between the superimposed etching amount deviation distribution and the target etching amount deviation distribution is minimized.

[0086] For example, genetic algorithms or dynamic programming can be used as optimization methods. Then, by performing the optimization calculation, from the multiple parts shown in Figure 10, 11 Select one or more parts to be used for superimposition as shown in Figure 12, and then superimpose the selected parts as shown in Figure 12. The resulting superimposed etching amount deviation distribution (solid line in Figure 12) will approximate the target etching amount deviation distribution (dashed line in Figure 12).

[0087] Furthermore, in this optimization calculation, the number of times parts are overlapped is optimized so that the supply time of the etching solution E from the nozzle 54 to the wafer W during the etching process is minimized. As described above, in this embodiment, so-called multi-objective optimization is performed, which optimizes both the etching amount deviation distribution, i.e., etching accuracy, and the supply time of the etching solution E. Specifically, the optimization is performed using the following equation (1). Note that the etching accuracy is the accuracy of the etching amount deviation distribution within the wafer surface.

[0088]

number

[0089] In step S107-2, as shown in equation (1) above, the loss function of the etching amount deviation distribution (etching accuracy) is calculated as a weighted linear sum of the flatness of the measured shape and the variability of the thickness distribution of the measured shape. For example, in equation (1) above, if the coefficient α is 0.5, the flatness (TTV) and the variability of the thickness distribution (RMSE) have the same weight. On the other hand, if the coefficient α is 1, for example, the algorithm will be one that emphasizes flatness, and if the coefficient α is 0 (zero), the algorithm will be one that emphasizes the variability of the thickness distribution.

[0090] In step S107-2, when optimizing the number of overlaps of the parts, the number of overlaps may be optimized in units of 0.5 loops. In this case, for example, it becomes possible to start and end the supply of the etching solution E at the center of the wafer W.

[0091] Once the number of overlaps between parts is optimized, the etching conditions corresponding to the parts optimized in step S107-2 are integrated to determine the optimal etching conditions (step S107-3 in Figure 9). Specifically, the multiple etching conditions are integrated so that the selected etching conditions are performed with the optimized number of overlaps, thereby determining the optimal etching conditions. These optimal etching conditions include, for example, the rotation speed of the wafer W during etching, the scanning speed of the nozzle 54, or the scanning width of the nozzle 54.

[0092] As described above, the optimal etching conditions for the first surface Wa and the second surface Wb are determined, and the etching amount deviation distribution for the first surface Wa and the second surface Wb is optimized.

[0093] According to the above embodiment, in steps S101 and S104, the first surface Wa and the second surface Wb are ground into a V-shape, and the heights Ha and Hb of the recesses War and Wbr are made less than or equal to the limit height He of the etching amount deviation distribution. By grinding the first surface Wa and the second surface Wb into an etching-controllable shape in steps S101 and S104 in this way, the accuracy of optimizing the etching amount deviation distribution of the first surface Wa and the second surface Wb in steps S108 and S110 can be improved.

[0094] Furthermore, in step S107, the optimal etching conditions for the subsequent etching process of the first surface Wa and the second surface Wb are determined from the thickness distribution and flatness of the wafer W after double-sided grinding obtained in step S106, thereby optimizing the etching amount deviation distribution.

[0095] Furthermore, in step S107, an optimization method is used to optimize the overlapping parts and the number of times the parts are overlapped, thereby determining the optimal etching conditions. Subsequently, in steps S108 and S110, the first surface Wa and the second surface Wb can be etched using these optimal etching conditions. This makes it possible to bring the etching amount deviation distribution in the etching process closer to the target etching amount deviation distribution, and as a result, the surface shape of the wafer W after etching can be made into the target shape. In other words, the optimal etching conditions can be determined from undefined etching conditions, and the surface shape of the wafer W after etching can be appropriately controlled.

[0096] Furthermore, since steps S101 to S111 are performed for each individual wafer W, the surface shape of the wafer W after etching can be controlled on a per-wafer basis.

[0097] In the above embodiment, in step S107, the optimal etching conditions for the subsequent etching process of the first surface Wa and the second surface Wb are determined from the thickness distribution and flatness of the wafer W after double-sided grinding obtained in step S106, and the etching amount deviation distribution is optimized. In this regard, the thickness distribution and flatness of the wafer W may be obtained each time before optimizing the etching amount deviation distribution of the first surface Wa and the second surface Wb.

[0098] Specifically, as shown in Figure 13, steps S201 to S206 are performed to carry out double-sided grinding, double-sided cleaning, and thickness measurement. These steps S201 to S206 are the same as steps S101 to S106 in the above embodiment. In steps S201 and S204, the first surface Wa and the second surface Wb are ground into a V-shape as shown in Figures 7(a) and (b).

[0099] In step S207, the optimal etching conditions for the second surface Wb are determined from the thickness distribution and flatness of the wafer W obtained in step S206, and the etching amount deviation distribution of the second surface Wb is optimized. Then, in step S208, the second surface Wb is etched using the optimal etching conditions as shown in Figure 7(c). Steps S207 and S208 are the same as steps S107 and S108 in the above embodiment. Subsequently, in step S209, the first surface Wa and the second surface Wb are reversed. This step S209 is the same as step S109 in the above embodiment.

[0100] In step S210, the thickness of the wafer W is measured at multiple points, the thickness distribution of the wafer W after grinding is obtained, and the flatness of the wafer W is calculated. Then, in step S211, the optimal etching conditions for the first surface Wa are determined from the thickness distribution and flatness of the wafer W, and the etching amount deviation distribution of the first surface Wa is optimized. Then, in step S212, the first surface Wa is etched under the optimal etching conditions. Steps S210 to S212 are the same as steps S106, S107, and S110 of the above embodiment.

[0101] In step S213, the thickness of the wafer W is measured at multiple points, the thickness distribution of the wafer W after grinding is obtained, and the flatness of the wafer W is calculated. This step S213 is the same as step S111 in the above embodiment. In this case, the first surface Wa and the second surface Wb can be precisely etched.

[0102] In the above embodiment, both sides of the wafer W were ground into a V-shape, and then the etching amount deviation distribution on both sides was optimized. However, the grinding shape of the wafer W and the optimization of the etching amount deviation distribution may be in other patterns.

[0103] As shown in Figures 14 and 15, after grinding both sides of the wafer W into a V-shape, the etching amount deviation distribution on only one side may be optimized.

[0104] Steps S301 to S305 are performed to carry out double-sided grinding and double-sided cleaning. These steps S301 to S305 are the same as steps S101 to S105 in the above embodiment. In step S301, as shown in Figure 15(a), the first surface Wa is ground in a V-shape so that a recessed War is formed on the first surface Wa after grinding, with the center recessed from the outer circumference. In step S304, as shown in Figure 15(b), the second surface Wb is ground in a V-shape so that a recessed Wbr is formed on the second surface Wb after grinding, with the center recessed from the outer circumference.

[0105] In step S306, the second surface Wb is etched as shown in Figure 15(c). At this time, the etching amount deviation of the second surface Wb is uniform within the surface, that is, the etching amount deviation distribution is uniform. Subsequently, in step S307, the first surface Wa and the second surface Wb are reversed. This step S307 is the same as step S109 in the above embodiment.

[0106] In step S308, the thickness of the wafer W is measured at multiple points, the thickness distribution of the wafer W after grinding is obtained, and the flatness of the wafer W is calculated. In step S309, the optimal etching conditions for the etching process of the first surface Wa are determined from the thickness distribution and flatness of the wafer W obtained in step S308, and the etching amount deviation distribution is optimized. Steps S308 and S309 are the same as steps S106 and S107 of the above embodiment.

[0107] In step S310, as shown in Figure 15(d), the first surface Wa is etched using the optimal etching conditions determined in step S309. That is, in this embodiment after etching, the thickness distribution of the wafer W becomes uniform. Step S310 is the same as step S110 in the above embodiment.

[0108] Subsequently, in step S311, the thickness of the wafer W is measured at multiple points, the thickness distribution of the wafer W after grinding is obtained, and the flatness of the wafer W is calculated. This step S311 is the same as step S111 in the above embodiment.

[0109] In this embodiment, when steps S301 to S311 are performed consecutively on multiple wafers W, the etching amount deviation of the second surface Wb is uniform within the surface in step S306. In other words, the second surface Wb is etched on multiple wafers W under the same etching conditions.

[0110] As shown in Figures 16 and 17, one side of the wafer W may be ground into a V-shape, and the other side may be ground flat, after which the etching amount deviation distribution on both sides may be optimized.

[0111] Steps S401 to S406 are performed to carry out double-sided grinding, double-sided cleaning, and thickness measurement. These steps S401 to S406 are the same as steps S101 to S106 in the above embodiment, but the second surface Wb is ground flat. In step S401, as shown in Figure 17(a), the first surface Wa is ground into a V shape so that a recess War is formed on the first surface Wa after grinding, with the center recessed from the outer circumference. Step S 404 As shown in Figure 17(b), the second surface Wb is ground flat.

[0112] In step S407, the optimal etching conditions for the etching process of the second surface Wb are determined from the thickness distribution and flatness of the wafer W after double-sided grinding obtained in step S406, and the etching amount deviation distribution is optimized. This step S407 is the same as step S107 in the above embodiment.

[0113] In step S408, as shown in Figure 17(c), the second surface Wb is etched using the optimal etching conditions determined in step S407. Then, in step S409, the first surface Wa and the second surface Wb are reversed. These steps S408 and S409 are the same as steps S108 and S109 in the above embodiment.

[0114] In step S410, the thickness of the wafer W is measured at multiple points, the thickness distribution of the wafer W after grinding is obtained, and the flatness of the wafer W is calculated. In step S411, the optimal etching conditions for the etching process of the first surface Wa are determined from the thickness distribution and flatness of the wafer W obtained in step S410, and the etching amount deviation distribution is optimized. These steps S410 and S411 are the same as steps S106 and S107 of the above embodiment.

[0115] In step S412, as shown in Figure 17(d), the first surface Wa is etched using the optimal etching conditions determined in step S411. That is, in this embodiment after etching, the thickness distribution of the wafer W becomes uniform. Step S412 is the same as step S110 in the above embodiment.

[0116] Subsequently, in step S413, the thickness of the wafer W is measured at multiple points, the thickness distribution of the wafer W after grinding is obtained, and the flatness of the wafer W is calculated. This step S413 is the same as step S111 in the above embodiment.

[0117] As shown in Figures 18 and 19, one side of the wafer W may be ground into a V-shape, and the other side may be ground flat, after which the etching amount deviation distribution on only one side may be optimized.

[0118] Steps S501 to S505 are performed to carry out double-sided grinding and double-sided cleaning. These steps S501 to S505 are the same as steps S101 to S105 in the above embodiment, but the second surface Wb is ground flat. In step S501, as shown in Figure 19(a), the first surface Wa after grinding to The first surface Wa is ground in a V-shape to form a recess War, where the center is recessed compared to the outer periphery. In step S504, the second surface Wb is ground flat as shown in Figure 19(b).

[0119] In step S506, the second surface Wb is etched as shown in Figure 19(c). At this time, the etching amount deviation of the second surface Wb is uniform within the surface, that is, the etching amount deviation distribution is uniform. After that, step S 507 In this step, the first surface Wa and the second surface Wb are inverted. This step S507 is the same as step S109 in the above embodiment.

[0120] In step S508, the thickness of the wafer W is measured at multiple points, the thickness distribution of the wafer W after grinding is obtained, and the flatness of the wafer W is calculated. In step S509, the optimal etching conditions for the etching process of the first surface Wa are determined from the thickness distribution and flatness of the wafer W obtained in step S508, and the etching amount deviation distribution is optimized. Steps S508 and S509 are the same as steps S106 and S107 in the above embodiment.

[0121] In step S510, as shown in Figure 19(d), the first surface Wa is etched using the optimal etching conditions determined in step S509. That is, in this embodiment after etching, the thickness distribution of the wafer W becomes uniform. 510 This is the same as step S110 of the above embodiment.

[0122] Subsequently, in step S511, the thickness of the wafer W is measured at multiple points, the thickness distribution of the wafer W after grinding is obtained, and the flatness of the wafer W is calculated. This step S511 is the same as step S111 in the above embodiment.

[0123] In this embodiment, when steps S501 to S511 are performed consecutively on multiple wafers W, the etching amount deviation of the second surface Wb is uniform within the surface in step S506. In other words, the second surface Wb is etched on multiple wafers W under the same etching conditions.

[0124] The pattern used for grinding and etching, as shown in Figures 7, 15, 17, and 19 above, can be arbitrarily selected based on the target shape after etching, the processing time for grinding and etching, the amount of etching solution E consumed, etc.

[0125] Here, as described above, in the grinding in steps S101 and S104, the shape can be controlled up to the outermost edge of the wafer W surface. On the other hand, in the scan etching in steps S108 and S110, in order to prevent splashing of the etching solution E, the etching amount deviation distribution can be controlled only in the area inside the scan width L as shown in Figure 20, but in the area outside the scan width L, the etching amount deviation distribution may become flat and uncontrollable. In such cases, the error in optimizing the etching amount deviation distribution in step S107 may become large.

[0126] Therefore, in step S101, as shown in Figure 21, the first surface Wa after grinding may have a recessed portion War in its center that is lower than the outer circumference, and a flat portion Waf provided around the recessed portion War. The recessed portion War has a V-shape in cross-section and is formed in a circular shape having the same center as the first surface Wa in plan view. The diameter D of the recessed portion War is less than or equal to the scan width L. The flat portion Waf is formed in an annular shape having the same center as the first surface Wa in plan view. The boundary point between the recessed portion War and the flat portion Waf is determined, for example, according to the inflection point of grinding in the processing device 110.

[0127] Similarly, in step S104, the second surface Wb after grinding may have a recess Wbr in its center that is lower than the outer periphery, and a flat portion Wbf provided around the recess Wbr.

[0128] In step S107, when optimizing the etching amount deviation distribution of the first surface Wa, multiple steps are performed as shown in Figure 22 in step S107-0. no pa The parts are obtained. The subsequent steps of the target etching amount deviation distribution in step S107-1, the optimization of the number of overlaps with the parts in step S107-2, and the determination of the optimal etching conditions in step S107-3 are the same as in the above embodiment.

[0129] According to this embodiment, by grinding the first surface Wa and the second surface Wb into shapes controllable by etching in steps S101 and S104, the accuracy of optimizing the etching amount deviation distribution of the first surface Wa and the second surface Wb in steps S108 and S110 can be further improved.

[0130] In step S101, if a recessed portion War and a flat portion Waf are formed on the first surface Wa after grinding, the processing apparatus 110 may have two types of grinding units (grinding shafts). For example, in this embodiment, the entire surface of the first surface Wa is made flat in the first grinding unit 120, and then the area around the center of the first surface Wa is ground in the second grinding unit 130 to form the recessed portion War.

[0131] In the embodiments described above, the etching process of the first surface Wa and the second surface Wb of the wafer W was controlled based on the etching amount deviation distribution (the distribution of values ​​obtained by subtracting the average value of the etching amount from the etching amount on the wafer surface). However, it may also be controlled based on the distribution of the etching amount (absolute value). For example, optimizing the etching amount deviation distribution allows for precise control of the shape (profile) of the wafer W after etching, and optimizing the etching amount allows for precise control of the shape of the wafer W after etching, as well as precise control of the thickness of the wafer W. It should be noted that controlling the shape of the wafer W based on the etching amount deviation distribution allows for more precise control than controlling based on the etching amount. Therefore, if you want to control the shape of the wafer W more precisely, it is preferable to choose to control based on the etching amount deviation distribution. If you want to precisely control the thickness of the wafer W in accordance with the shape of the wafer W, it is preferable to control based on the etching amount. Furthermore, in the etching process of the first surface Wa and the second surface Wb of the wafer W, control based on the etching amount deviation distribution and control based on the etching amount may be combined.

[0132] In the embodiments described above, the example was given of applying various treatments to both sides (the first surface Wa and the second surface Wb) of a wafer W that has been cut from an ingot using a wire saw or the like and wrapped. However, the various treatments may be applied to only one side of the wafer W.

[0133] Furthermore, although the above embodiments have described the case in which various processes are applied to a wafer W that has been cut from an ingot using a wire saw or the like and then wrapped, the technology of this disclosure can also be applied to post-processing steps in the manufacturing process of semiconductor devices, for example. Specifically, the technology of this disclosure can also be applied, for example, in a polymerized wafer formed by joining a first wafer and a second wafer, when the first wafer is ground and then the surface of the ground first wafer is etched.

[0134] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The above embodiments may be omitted, replaced, or modified in various ways without departing from the scope and spirit of the appended claims. [Explanation of Symbols]

[0135] 1. Wafer Processing System 40 Thickness measuring device 50, 51 Etching equipment 54 nozzles 110 Processing equipment 140 Control device W wafer War recess

Claims

1. A substrate processing method for processing a substrate, Grinding one surface of the substrate to form a recess in which the center of the surface is lower than the outer periphery, The thickness of the substrate after grinding is measured to obtain the thickness distribution of the substrate, Based on the aforementioned thickness distribution, the optimal etching conditions are calculated to optimize the etching amount deviation distribution when etching one surface. Based on the aforementioned optimal etching conditions, the process includes supplying an etching solution from an etching solution supply unit to one surface of the substrate after grinding to etch that surface, A substrate processing method wherein the height of the recess is less than or equal to the difference between the maximum and minimum values ​​of the etching amount deviation distribution that can be controlled when etching the surface.

2. The substrate processing method according to claim 1, wherein the difference is determined based on the etching conditions of the one surface.

3. The substrate processing method according to claim 2, wherein the difference is 1.0 μm or less.

4. After grinding, the aforementioned surface is formed with the aforementioned recess and a flat portion provided in an annular shape around the recess. The substrate processing method according to any one of claims 1 to 3, wherein the diameter of the recess is less than or equal to the scan width when the etching solution supply unit is moved back and forth radially through the center of the surface.

5. Grinding the aforementioned surface is To grind the aforementioned surface to a flat surface, The substrate processing method according to claim 4, further comprising grinding the area around the center of the flat surface to form the recess.

6. The substrate processing method according to claim 1, wherein the optimization of the etching amount deviation distribution is performed based on at least one of the rotation speed when rotating the substrate, the scan speed when reciprocating the etching solution supply unit, and the scan width when reciprocating the etching solution supply unit.

7. Optimizing the etching amount deviation distribution means Obtain the distribution of etching amount deviations on the said surface when etching the said surface under multiple different etching conditions, A substrate processing method according to claim 1, comprising using an optimization method to superimpose the etching amount deviation distributions corresponding to the plurality of etching conditions, and optimizing the combination of the etching amount deviation distribution used for superimposition and the number of times the etching amount deviation distributions are superimposed so that the shape of the one surface becomes the target shape.

8. The substrate processing method according to claim 1, wherein the other surface of the substrate is ground before etching the one surface.

9. Based on the aforementioned thickness distribution, other optimal etching conditions are calculated to optimize the etching amount deviation distribution when etching the other surface. The substrate processing method according to claim 8, further comprising etching the other surface after grinding based on the other optimal etching conditions described above.

10. The substrate processing method according to claim 1, wherein, before etching the one surface, the other surface of the substrate is ground to form a recess in which the center of the other surface is recessed compared to the outer periphery.

11. The process includes grinding the other surface of the substrate before etching the aforementioned surface, The grinding of the other surface and the grinding of the one surface are performed continuously on multiple substrates. The substrate processing method according to claim 1, wherein etching of the other surface is performed on the plurality of substrates under the same etching conditions.

12. A substrate processing method for processing a substrate, Grinding one surface of the substrate to form a recess in which the center of the surface is lower than the outer periphery, The thickness of the substrate after grinding is measured to obtain the thickness distribution of the substrate, Based on the aforementioned thickness distribution, the optimal etching conditions are calculated to optimize the etching amount deviation distribution when etching one surface. Based on the aforementioned optimal etching conditions, the process includes supplying an etching solution from an etching solution supply unit to one surface of the substrate after grinding to etch that surface, Optimizing the etching amount deviation distribution means Obtain the distribution of etching amount deviations on the said surface when etching the said surface under multiple different etching conditions, A substrate processing method comprising: using an optimization method to superimpose the etching amount deviation distributions corresponding to the plurality of etching conditions, and optimizing the combination of the etching amount deviation distribution used for superimposition and the number of times the etching amount deviation distribution is superimposed, so that the shape of the one surface becomes the target shape.

13. A substrate processing method for processing a substrate, Grinding one surface of the substrate to form a recess in which the center of the surface is lower than the outer periphery, Before etching the aforementioned one surface, the other surface of the substrate is ground, The thickness of the substrate after grinding is measured to obtain the thickness distribution of the substrate, Based on the aforementioned thickness distribution, the optimal etching conditions are calculated to optimize the etching amount deviation distribution when etching one surface. Based on the aforementioned optimal etching conditions, the process includes supplying an etching solution from an etching solution supply unit to one surface of the substrate after grinding to etch that surface, The grinding of the other surface and the grinding of the one surface are performed continuously on multiple substrates. A substrate processing method in which etching of the other surface is performed on the plurality of substrates under the same etching conditions.

14. A substrate processing system for processing substrates, A processing apparatus for grinding one surface of the substrate to form a recess in which the center of the surface is lower than the outer periphery, A thickness measuring device for measuring the thickness of the aforementioned substrate, An etching apparatus that supplies etching solution from an etching solution supply unit to the aforementioned surface and etches the said surface, It has a control device, The control device is The thickness distribution of the substrate is obtained from the thickness of the substrate measured by the thickness measuring device after grinding, Based on the aforementioned thickness distribution, the optimal etching conditions are calculated to optimize the etching amount deviation distribution when etching one surface. Using the etching apparatus, the following is performed: etching the surface based on the optimal etching conditions: A substrate processing system in which the control device controls the height of the recess to be less than or equal to the difference between the maximum and minimum values ​​of the etching amount deviation distribution that can be controlled when etching one surface.

15. The substrate processing system according to claim 14, wherein the control device determines the difference based on the etching conditions of the one surface.

16. The control device is Using the processing apparatus, control is performed to form the recess and a flat portion provided in an annular shape around the recess on the surface after grinding. The substrate processing system according to claim 14 or 15, wherein the diameter of the recess is less than or equal to the scan width when the etching solution supply unit is moved back and forth radially through the center of the surface.

17. The control device uses the processing apparatus to The control is performed to grind the aforementioned surface flat, The substrate processing system according to claim 16, which performs the following actions: controlling the process to further grind the area around the center of the flat surface to form the recess.

18. The substrate processing system according to claim 14, wherein the control device optimizes the etching amount deviation distribution based on at least one of the rotational speed when rotating the substrate, the scan speed when reciprocating the etching solution supply unit, and the scan width when reciprocating the etching solution supply unit.

19. The control device is When optimizing the etching amount deviation distribution, Obtain the distribution of etching amount deviations on the said surface when etching the said surface under multiple different etching conditions, A substrate processing system according to claim 14, comprising using an optimization method to superimpose the etching amount deviation distributions corresponding to the plurality of etching conditions, and optimizing the combination of the etching amount deviation distribution used for superimposition and the number of times the etching amount deviation distribution is superimposed so that the shape of the one surface becomes the target shape, and performing the optimization.

20. A substrate processing system for processing substrates, A processing apparatus for grinding one surface of the substrate to form a recess in which the center of the surface is lower than the outer periphery, A thickness measuring device for measuring the thickness of the aforementioned substrate, An etching apparatus that supplies etching solution from an etching solution supply unit to the aforementioned surface and etches the said surface, It has a control device, The control device is The thickness distribution of the substrate is obtained from the thickness of the substrate measured by the thickness measuring device after grinding, Based on the aforementioned thickness distribution, the optimal etching conditions are calculated to optimize the etching amount deviation distribution when etching one surface. Using the etching apparatus, the following is performed: etching the surface based on the optimal etching conditions: When optimizing the etching amount deviation distribution, Obtain the distribution of etching amount deviations on the said surface when etching the said surface under multiple different etching conditions, A substrate processing system that uses an optimization method to superimpose the etching amount deviation distributions corresponding to the multiple etching conditions, and optimizes the combination of the etching amount deviation distribution used for superimposition and the number of times the etching amount deviation distribution is superimposed, so that the shape of one surface becomes the target shape.

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