Power converter

The power conversion device addresses magnetic core bias and power transmission failures in DC/DC converters by compensating drive pulse phase and width to reduce DC components in the transformer current, ensuring stable operation.

JP7893357B1Active Publication Date: 2026-07-22FUJI ELECTRIC CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
FUJI ELECTRIC CO LTD
Filing Date
2025-10-23
Publication Date
2026-07-22

AI Technical Summary

Technical Problem

Conventional DC/DC converters with isolation transformers experience magnetic core bias and power transmission failures due to superimposed DC components in the current flowing through the transformer.

Method used

A power conversion device with a control device that compensates the pulse width and phase of drive pulses to reduce DC components in the current flowing through the isolation transformer, using phase and pulse width commands to suppress magnetic core bias.

Benefits of technology

The solution effectively suppresses magnetic core bias and prevents power transmission failures by minimizing DC components in the transformer current, thereby ensuring stable power transmission.

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Abstract

To suppress the bias of the isolation transformer. [Solution] A power conversion device comprising: an isolation transformer; a first bridge circuit connected to the primary side of the isolation transformer; a second bridge circuit connected to the secondary side of the isolation transformer; and a control device that reduces the DC component superimposed on the current flowing through the isolation transformer by compensating a pulse width command that changes the pulse width of the drive pulse in accordance with the amount of change in the phase command that changes the phase of the drive pulse that operates the first bridge circuit or the second bridge circuit, or by compensating both the phase command and the pulse width command.
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Description

Technical Field

[0001] This disclosure relates to a power conversion device.

Background Art

[0002] Conventionally, as a type of DC / DC converter, a bidirectional isolated DC / DC converter (DAB converter) called DAB (Dual Active Bridge) is known. This DAB converter has a configuration in which two single-phase bridge circuits are connected via a high-frequency isolation transformer (see, for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in a conventional DAB converter, when a DC component is superimposed on the current flowing through the isolation transformer connected between the bridge circuits, phenomena such as magnetic core bias of the isolation transformer and inability to transmit power may occur.

[0005] This disclosure aims to suppress the bias of the isolation transformer.

Means for Solving the Problems

[0006] This disclosure provides an isolation transformer, a first bridge circuit connected to the primary side of the isolation transformer, a second bridge circuit connected to the secondary side of the isolation transformer, A control device that reduces the DC component superimposed on the current flowing through the isolation transformer by compensating a pulse width command that changes the pulse width of the drive pulse in accordance with the amount of change in the phase command that changes the phase of the drive pulse that operates the first bridge circuit or the second bridge circuit, or by compensating both the phase command and the pulse width command, We provide a power conversion device equipped with the following features. [Effects of the Invention]

[0007] According to this disclosure, the bias of the isolation transformer can be suppressed. [Brief explanation of the drawing]

[0008] [Figure 1] This is a circuit diagram showing one example configuration of a power conversion device according to the first embodiment. [Figure 2] This figure shows an example of the operating waveform of a DAB converter. [Figure 3] This is a diagram showing the equivalent circuit of the isolation transformer section. [Figure 4] This is a control block diagram showing one example configuration of a control device. [Figure 5] This is an operating waveform diagram when the phase command change is negative in the absence of a pulse compensation unit. [Figure 6] This is an operating waveform diagram when the phase command change is negative, in the case of a pulse compensation unit. [Figure 7] This is an operating waveform diagram when the phase command change is positive and there is no pulse compensation unit. [Figure 8] This is an operating waveform diagram when the phase command change is positive, in the case of a pulse compensation unit. [Figure 9] This is a control block diagram showing one example configuration of the pulse compensation unit. [Figure 10] This figure shows an example of the adjustment edge selection rule. [Figure 11] This is a block diagram showing a first example configuration of the phase calculation unit. [Figure 12] This is an operating waveform diagram when the phase calculation unit is as in the first configuration example and there is no pulse compensation unit. [Figure 13] It is an operation waveform diagram when there is a pulse compensation unit when the phase calculation unit is in the first configuration example. [Figure 14] It is a block diagram showing a second configuration example of the phase calculation unit. [Figure 15] It is an operation waveform diagram when there is no pulse compensation unit when the phase calculation unit is in the second configuration example. [Figure 16] It is an operation waveform diagram when there is a pulse compensation unit when the phase calculation unit is in the second configuration example.

Embodiments for Carrying Out the Invention

[0009] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0010] FIG. 1 is a diagram showing a configuration example of a power conversion device according to a first embodiment. The power conversion device 100 shown in FIG. 1 includes a bidirectional insulated DC / DC converter (insulated DC / DC converter 110) in which bridge circuits are provided on both sides of an isolation transformer 102. The power conversion device 100 supplies power bidirectionally between the first bridge circuit 111 and the second bridge circuit 112.

[0011] The power conversion device 100 includes an isolation transformer 102, a first bridge circuit 111, a second bridge circuit 112, and a control device 106.

[0012] The isolation transformer 102 has a primary winding 31 and a secondary winding 32, and is a transformer in which the primary winding 31 and the secondary winding 32 are magnetically coupled. The turns ratio of the primary winding 31 and the secondary winding 32 is set as appropriate. The isolation transformer 102 has a magnetic core 33 around which the primary winding 31 and the secondary winding 32 are wound.

[0013] In this specification, unless otherwise specified, the winding ratio between the primary winding 31 and the secondary winding 32 may be considered as 1:1. However, when the turns ratio between the primary winding 31 and the secondary winding 32 is other than 1:1, the voltage value on the secondary side or the primary side may be converted into the voltage value on the primary side or the secondary side, and the current value on the secondary side or the primary side may be converted into the current value on the primary side or the secondary side. For example, in the following description, the secondary-side DC voltage E2 and the secondary-side AC voltage V2 mean the voltage values converted to the primary side. That is, when the number of turns of the primary winding 31 of the isolation transformer 102 is n1 and the number of turns of the secondary winding 32 is n2, the voltage value obtained by multiplying the actual secondary-side DC voltage by the coefficient n1 / n2 (the voltage value converted to the primary side) is the secondary-side DC voltage E2. The same applies to the secondary-side AC voltage V2. Also, in the following description, the low-voltage side and the high-voltage side mean the side where low voltage is generated and the side where high voltage is generated among the primary side and the secondary side of the isolation DC / DC converter 110. For example, if there is a relationship of E1 < E2 between the primary-side DC voltage E1 and the secondary-side DC voltage E2 converted to the primary-side value, the primary side is the low-voltage side and the secondary side is the high-voltage side; if there is a relationship of E1 > E2, the primary side is the high-voltage side and the secondary side is the low-voltage side.

[0014] In the power conversion device 100, the first bridge circuit 111 and the second bridge circuit 112 output the primary-side AC voltage V1 and the secondary-side AC voltage V2 having the same period (wavelength). In the following description, the terms phase angle or phase difference are used, and the phase angle or phase difference means the relative lengths of various periods expressed with one period (one wavelength) of the primary-side AC voltage V1 and the secondary-side AC voltage V2 being 2π.

[0015] The first bridge circuit 111 is a primary-side bridge circuit connected to the primary side of the isolation transformer 102, and exchanges power with the primary winding 31 of the isolation transformer 102. The first bridge circuit 111 has a positive terminal 41p and a negative terminal 41n as primary-side DC terminals electrically connected to an external device (not shown). The first bridge circuit 111 exchanges power with an external device connected to the primary-side DC terminals.

[0016] The first bridge circuit 111 has a positive bus 43p and a negative bus 43n as a primary-side DC bus pair. The positive bus 43p is connected to the positive terminal 41p. The negative bus 43n is connected to the negative terminal 41n. The first bridge circuit 111 applies a voltage V1 to the primary side of the isolation transformer 102. The first bridge circuit 111 switches the polarity of the voltage V1 applied to the primary winding 31 of the isolation transformer 102 by the primary-side DC bus pair 43p,43n. Voltage V1 is an example of a first voltage.

[0017] The first bridge circuit 111 is a full bridge circuit having multiple legs 11 and 12 in parallel.

[0018] The first bridge circuit 111 has, for example, a leg 11 in which a high-side arm Q1 and a low-side arm Q2 are connected in series, and a leg 12 in which a high-side arm Q3 and a low-side arm Q4 are connected in series. Arm Q1 is an example of a first arm, arm Q2 is an example of a second arm, arm Q3 is an example of a third arm, and arm Q4 is an example of a fourth arm. Leg 11 is an example of a first leg, and leg 12 is an example of a second leg. The high-side arm and the low-side arm are sometimes collectively referred to as the upper and lower arms.

[0019] The first bridge circuit 111 is a full bridge circuit in which the primary winding 31 of the isolation transformer 102 is provided in the bridge section 21 that connects the intermediate connection point a1 between arm Q1 and arm Q2 and the intermediate connection point b1 between arm Q3 and arm Q4. The first bridge circuit 111 may also have a reactor 104a connected in series with the primary winding 31 of the isolation transformer 102 in the bridge section 21. Intermediate connection point a1 is an example of a first connection point. Intermediate connection point b1 is an example of a second connection point. Bridge section 21 is an example of a first bridge section.

[0020] The first bridge circuit 111 includes a capacitor C1 and arms Q1 to Q4.

[0021] Capacitor C1 is connected between the primary DC bus pair 43p and 43n, and smooths the voltage between the DC bus pair 43p and 43n (the voltage across capacitor C1).

[0022] Arms Q1 to Q4 are primary-side switching elements. Specific examples include semiconductor switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors).

[0023] Leg 11 includes a configuration in which arms Q1 and Q2 are connected in series between DC bus pairs 43p and 43n, and Leg 12 includes a configuration in which arms Q3 and Q4 are connected in series between DC bus pairs 43p and 43n. Arms Q1 to Q4 each have a first main terminal, a second main terminal, and a control terminal. For example, the first main terminal corresponds to the drain or collector, the second main terminal corresponds to the source or emitter, and the control terminal corresponds to the gate. Arms Q1 to Q4 may include diodes connected in reverse between the main terminals. If arms Q1 to Q4 are MOSFETs, these diodes may be parasitic diodes. Figure 1 illustrates freewheeling diodes D1, D2, D3, and D4.

[0024] When arms Q1 and Q4 are ON and arms Q2 and Q3 are OFF, the first bridge circuit 111 electrically connects intermediate connection point a1 to the positive bus 43p and intermediate connection point b1 to the negative bus 43n. As a result, the first bridge circuit 111 sets the voltage V1 to a positive voltage "E1". Voltage V1 is the primary AC voltage between intermediate connection points a1 and b1. E1 is the voltage value (primary DC voltage) between DC bus pairs 43p and 43n. When arms Q1 and Q4 are OFF and arms Q2 and Q3 are ON, the first bridge circuit 111 electrically connects intermediate connection point a1 to the negative bus 43n and intermediate connection point b1 to the positive bus 43p. As a result, the first bridge circuit 111 sets the voltage V1 to a negative voltage "-E1". The first bridge circuit 111 operates in this manner to switch the polarity of the voltage V1 applied to the primary winding 31 of the isolation transformer 102 by the primary DC bus pair 43p,43n.

[0025] When arms Q1 and Q3 are turned on and arms Q2 and Q4 are turned off, the first bridge circuit 111 electrically connects both intermediate connection point a1 and intermediate connection point b1 to the positive bus 43p, thereby making the voltage V1 substantially zero. When arms Q1 and Q3 are turned off and arms Q2 and Q4 are turned on, the first bridge circuit 111 electrically connects both intermediate connection point a1 and intermediate connection point b1 to the negative bus 43n, thereby making the voltage V1 substantially zero.

[0026] The second bridge circuit 112 is a secondary bridge circuit connected to the secondary side of the isolation transformer 102, and exchanges power with the secondary winding 32 of the isolation transformer 102. The second bridge circuit 112 has a positive terminal 42p and a negative terminal 42n as secondary DC terminals that are electrically connected to an external device (not shown). The second bridge circuit 112 exchanges power with an external device connected to its secondary DC terminals.

[0027] The second bridge circuit 112 has a positive bus 44p and a negative bus 44n as a secondary DC bus pair. The positive bus 44p is connected to the positive terminal 42p. The negative bus 44n is connected to the negative terminal 42n. The second bridge circuit 112 applies a voltage V2 to the secondary side of the isolation transformer 102. The second bridge circuit 112 switches the polarity of the voltage V2 applied to the secondary winding 32 of the isolation transformer 102 by the secondary DC bus pair 44p, 44n. Voltage V2 is an example of a second voltage.

[0028] The second bridge circuit 112 is a full bridge circuit having multiple legs 13 and 14 in parallel.

[0029] The second bridge circuit 112 has, for example, a leg 13 in which a high-side arm Q5 and a low-side arm Q6 are connected in series, and a leg 14 in which a high-side arm Q7 and a low-side arm Q8 are connected in series. Arm Q5 is an example of a fifth arm, arm Q6 is an example of a sixth arm, arm Q7 is an example of a seventh arm, and arm Q8 is an example of an eighth arm. Leg 13 is an example of a third leg, and leg 14 is an example of a fourth leg. The high-side arm and the low-side arm are sometimes collectively referred to as the upper and lower arms.

[0030] The second bridge circuit 112 is a full bridge circuit in which the secondary winding 32 of the isolation transformer 102 is provided in the bridge section 23 that connects the intermediate connection point a2 between arm Q5 and arm Q6 and the intermediate connection point b2 between arm Q7 and arm Q8. The second bridge circuit 112 may also have a reactor 104b connected in series with the secondary winding 32 of the isolation transformer 102 in the bridge section 23. Intermediate connection point a2 is an example of a third connection point. Intermediate connection point b2 is an example of a fourth connection point. Bridge section 23 is an example of a second bridge section.

[0031] The second bridge circuit 112 includes a capacitor C2 and arms Q5 to Q8.

[0032] Capacitor C2 is connected between the 44p and 44n DC bus pairs on the secondary side, and smooths the voltage between the 44p and 44n DC bus pairs (the voltage across capacitor C2).

[0033] Arms Q5 to Q8 are secondary-side switching elements. Specific examples include semiconductor switching elements such as MOSFETs and IGBTs, similar to arms Q1 to Q4.

[0034] Leg 13 includes a configuration in which arms Q5 and Q6 are connected in series between DC bus pairs 44p and 44n, and Leg 14 includes a configuration in which arms Q7 and Q8 are connected in series between DC bus pairs 44p and 44n. Arms Q5 to Q8, like arms Q1 to Q4, each have a first main terminal, a second main terminal, a control terminal, and a diode. Figure 1 illustrates freewheeling diodes D5, D6, D7, and D8.

[0035] When arms Q5 and Q8 are ON and arms Q6 and Q7 are OFF, the second bridge circuit 112 electrically connects intermediate connection point a2 to the positive bus 44p and intermediate connection point b2 to the negative bus 44n. As a result, the second bridge circuit 112 sets the voltage V2 to a positive voltage "E2". Voltage V2 is the secondary AC voltage between intermediate connection points a2 and b2. E2 is the voltage value (secondary DC voltage) between the DC bus pairs 44p and 44n. When arms Q5 and Q8 are OFF and arms Q6 and Q7 are ON, the second bridge circuit 112 electrically connects intermediate connection point a2 to the negative bus 44n and intermediate connection point b2 to the positive bus 44p. As a result, the second bridge circuit 112 sets the voltage V2 to a negative voltage "-E2". The second bridge circuit 112 operates in this manner to switch the polarity of the voltage V2 applied to the secondary winding 32 of the isolation transformer 102 by the secondary DC bus pair 44p,44n.

[0036] When arms Q5 and Q7 are turned on and arms Q6 and Q8 are turned off, the second bridge circuit 112 electrically connects both intermediate connection point a2 and intermediate connection point b2 to the positive bus 44p, thereby making the voltage V2 substantially zero. When arms Q5 and Q7 are turned off and arms Q6 and Q8 are turned on, the second bridge circuit 112 electrically connects both intermediate connection point a2 and intermediate connection point b2 to the negative bus 44n, thereby making the voltage V2 substantially zero.

[0037] An external device (not shown) connected to the positive terminal 41p and the negative terminal 41n is, for example, a charge / discharge device such as a battery. An external device (not shown) connected to the positive terminal 42p and the negative terminal 42n is, for example, a DC system capable of charging and discharging the energy of the charge / discharge device connected to the primary side.

[0038] The control device 106 is an electronic circuit including, for example, a CPU (Central Processing Unit), an FPGA (Field Programmable Gate Array), or an ASIC (Application Specific Integrated Circuit). The control device 106 may also be a computer having memory and a processor. The control device 106 may also be a programmable logic controller (PLC). The control device 106 performs the various control operations described in this specification by executing a program such as instruction code stored in memory, or by designing a circuit for a specific application.

[0039] The control device 106 controls the first bridge circuit 111 and the second bridge circuit 112. The control device 106 generates drive pulses g1 to g4 to drive arms Q1 to Q4 of the first bridge circuit 111, and drive pulses g5 to g8 to drive arms Q5 to Q8 of the second bridge circuit 112, respectively. Drive pulses g1 to g8 are drive signals for controlling the on or off of the corresponding arms among arms Q1 to Q8. Drive pulses g1 to g4 are commands output from the control device 106 as first drive pulses that cause the control device 106 to switch the first bridge circuit 111. Drive pulses g5 to g8 are commands output from the control device 106 as second drive pulses that cause the control device 106 to switch the second bridge circuit 112.

[0040] The power converter 100 includes drive circuits 105a and 105b. Drive circuit 105a is a primary drive circuit (first drive circuit) that drives the first bridge circuit 111 based on drive pulses g1 to g4 supplied from the control device 106. Drive circuit 105a controls the on / off switching of arms Q1 to Q4 of the first bridge circuit 111 according to the drive pulses g1 to g4. Drive circuit 105b is a secondary drive circuit (second drive circuit) that drives the second bridge circuit 112 based on drive pulses g5 to g8 supplied from the control device 106. Drive circuit 105b controls the on / off switching of arms Q5 to Q8 of the second bridge circuit 112 according to the drive pulses g5 to g8.

[0041] The power converter 100 includes a DC voltage detection unit 107a and a DC voltage detection unit 107b. The DC voltage detection unit 107a is a circuit that detects the primary DC voltage E1 supplied to the DC bus pair 43p, 43n of the first bridge circuit 111. The DC voltage detection unit 107b is a circuit that detects the secondary DC voltage E2 supplied to the DC bus pair 44p, 44n of the second bridge circuit 112.

[0042] The power converter 100 includes a DC current detection unit 108a and a DC current detection unit 108b. The DC current detection unit 108a is a circuit that detects the primary DC current Idc1 flowing through the positive bus 43p of the first bridge circuit 111. The DC current detection unit 108b is a circuit that detects the secondary DC current Idc2 flowing through the positive bus 44p of the second bridge circuit 112.

[0043] The control device 106 controls the phase of the edges of the drive pulses g1 to g8 for driving the arms Q1 to Q8 based on the primary DC voltage E1 detected by the DC voltage detection unit 107a and the secondary DC voltage E2 detected by the DC voltage detection unit 107b. By controlling the phase of the edges of the drive pulses g1 to g8, the control device 106 controls the power transmission of the isolated DC / DC converter 110 (power transmission between the first bridge circuit 111 and the second bridge circuit 112).

[0044] Figure 2 shows an example of the operating waveform of the DAB converter. The control device 106 adjusts the power transmitted between the first bridge circuit 111 and the second bridge circuit 112 by controlling the phase difference δ between voltage V1 and voltage V2. Hereinafter, the power transmitted between the first bridge circuit 111 and the second bridge circuit 112 may be referred to as "power P" or "transmitted power P". The control device 106 controls the phase difference δ according to the power command Pref which requests the transmission of the desired power P.

[0045] When the phase difference δ changes in accordance with a change in the power command Pref, a DC component may be superimposed on the current flowing through the isolation transformer 102. Figure 2 illustrates the case where the phase difference δ increases from δ1 to δ2, but a DC component may also be superimposed on the current flowing through the isolation transformer 102 when the phase difference δ decreases. The current flowing through the isolation transformer 102 includes, for example, the primary AC current I1 flowing on the primary side of the isolation transformer 102, the secondary AC current I2 flowing on the secondary side of the isolation transformer 102, and the excitation current IM of the isolation transformer 102. If a DC component is superimposed on the current flowing through the isolation transformer 102, the magnetic core 33 of the isolation transformer 102 may become biased, which may prevent the transmission of power P or cause overcurrents to flow.

[0046] To prevent such problems, the power converter 100 shown in Figure 1 has a function to suppress the bias of the isolation transformer 102 (magnetic core 33). In Figure 1, the control device 106 has a phase command θref, a change amount Δθ, and a pulse width command dref as control parameters used to suppress the bias.

[0047] The phase command θref is a command signal that changes the phase of at least one of the drive pulses g1 to g8, and specifies the command value (target value) of the phase. The change amount Δθ is the amount by which the phase command θref changes, and for example, it represents the amount by which the phase specified as the target value by the phase command θref changes in one calculation period. The pulse width command dref is a command signal that changes the pulse width of at least one of the drive pulses g1 to g8, and specifies the command value (target value) of the pulse width.

[0048] The control device 106 reduces the DC component superimposed on the current flowing through the isolation transformer 102 by compensating the pulse width command dref according to the change amount Δθ of the phase command θref. Alternatively, the control device 106 reduces the DC component superimposed on the current flowing through the isolation transformer 102 by compensating both the phase command θref and the pulse width command dref according to the change amount Δθ of the phase command θref. By reducing the DC component superimposed on the current flowing through the isolation transformer 102, the bias of the isolation transformer 102 is suppressed, thereby suppressing power P transmission failures and the occurrence of overcurrents.

[0049] Next, we will describe an example configuration that achieves the suppression of magnetic bias.

[0050] Figure 3 shows the equivalent circuit of the isolation transformer section. In Figure 3, L1 is the sum of the primary leakage inductance of the isolation transformer 102 and the inductance of the external reactor 104a. L2 is the sum of the secondary leakage inductance of the isolation transformer 102 and the inductance of the external reactor 104b. M is the excitation inductance of the isolation transformer 102. IM is the excitation current of the isolation transformer 102. Voltage V1 is the primary AC voltage applied by the first bridge circuit 111. Voltage V2 is the secondary AC voltage applied by the second bridge circuit 112. Current I1 is the primary AC current flowing on the primary side of the isolation transformer 102. Current I2 is the secondary AC current flowing on the secondary side of the isolation transformer 102. However, L2, I2, and V2 are values ​​converted to the primary side.

[0051] According to the equivalent circuit shown in Figure 3, by the principle of superposition, I1, I2, and IM can be expressed as linear sums of the integral values ​​of V1 (∫V1·dt) and V2 (∫V2·dt), respectively, although their coefficients differ, as shown in the following equations.

[0052]

number

[0053] According to the above equation, if the DC components of ∫V1·dt and ∫V2·dt are zero, then regardless of L1, L2, and M, the DC components of I1, I2, and IM will also be zero.

[0054] Furthermore, V1 and V2 are expressed by the following equations using the drive pulses g1 to g8 (1 when on, 0 when off) of each switching element.

[0055]

number

[0056] For example, in equation V1, if arms Q1 and Q4 are ON and arms Q2 and Q3 are OFF, then g1=g4=1 and g2=g3=0, so V1=E1. In equation V1, if arms Q1 and Q4 are OFF and arms Q2 and Q3 are ON, then g1=g4=0 and g2=g3=1, so V1=-E1. In equation V1, if arms Q1 and Q3 are ON and arms Q2 and Q4 are OFF, then g1=g3=1 and g2=g4=0, so V1=0. In equation V1, if arms Q1 and Q3 are OFF and arms Q2 and Q4 are ON, then g1=g3=0 and g2=g4=1, so V1=0. The same applies to equation V2.

[0057] According to the above equation for V1, to make the DC component of ∫V1·dt zero, the DC components of ∫(g1-g2)·dt and ∫(g3-g4)·dt should be made zero. According to the above form of equation for V2, to make the DC component of ∫V2·dt zero, the DC components of ∫(g5-g6)·dt and ∫(g7-g8)·dt should be made zero. Therefore, by compensating the drive pulses g1~g8 so that the DC components superimposed on the integral values ​​of (g1-g2), (g3-g4), (g5-g6), and (g7-g8) do not superimpose, the DC components superimposed on I1, I2, and IM can be reduced.

[0058] Taking advantage of this feature, the control device 106 compensates the drive pulses g1 to g8 so that the DC component superimposed on each of the integral values ​​of (g1-g2), (g3-g4), (g5-g6), and (g7-g8) becomes small, thereby reducing the DC component superimposed on I1, I2, and IM. Since I1, I2, and IM are the currents flowing through the isolation transformer 102, reducing the DC component superimposed on each of I1, I2, and IM corresponds to reducing the DC component superimposed on the current flowing through the isolation transformer 102. By reducing the DC component superimposed on the current flowing through the isolation transformer 102, the bias of the isolation transformer 102 is suppressed, thereby suppressing power P transmission failures and the occurrence of overcurrents.

[0059] Figure 4 is a control block diagram showing one example configuration of a control device. The control device 106 shown in Figure 4 has a configuration that compensates the drive pulses g1 to g8 so that the DC component superimposed on the integral values ​​of (g1-g2), (g3-g4), (g5-g6), and (g7-g8) becomes small. The control device 106 has a phase calculation unit 160, pulse compensation units 161, 162, 163, 164 and comparison units 171, 172, 173, 174.

[0060] The control device 106 generates drive pulses g1 and g2 for leg 11 by comparing a pulse width command D12, which is a command signal for changing the pulse width of drive pulses g1 and g2, with the carrier wave Car12 in the comparison unit 171. The control device 106 generates drive pulses g3 and g4 for leg 12 by comparing a pulse width command D34, which is a command signal for changing the pulse width of drive pulses g3 and g4, with the carrier wave Car34 in the comparison unit 172. The control device 106 generates drive pulses g5 and g6 for leg 13 by comparing a pulse width command D56, which is a command signal for changing the pulse width of drive pulses g5 and g6, with the carrier wave Car56 in the comparison unit 173. The control device 106 generates drive pulses g7 and g8 for leg 14 by comparing a pulse width command D78, which is a command signal for changing the pulse width of drive pulses g7 and g8, with the carrier wave Car78 in the comparison unit 174.

[0061] The control device 106 generates a carrier wave Car12 whose phase changes according to the phase command θ12ref by applying a phase command θ12, which is a command signal that changes the phase of the drive pulses g1 and g2, to the sawtooth wave carrier. The control device 106 generates a carrier wave Car34 whose phase changes according to the phase command θ34ref by applying a phase command θ34, which is a command signal that changes the phase of the drive pulses g3 and g4, to the sawtooth wave carrier. The control device 106 generates a carrier wave Car56 whose phase changes according to the phase command θ56ref by applying a phase command θ56, which is a command signal that changes the phase of the drive pulses g5 and g6, to the sawtooth wave carrier. The control device 106 generates a carrier wave Car78 whose phase changes according to the phase command θ78ref by applying a phase command θ78, which is a command signal that changes the phase of the drive pulses g7 and g8, to the sawtooth wave carrier. The sawtooth wave carrier is an example of a reference carrier wave.

[0062] The control device 106 compares the carrier wave and the pulse width command for each leg, and determines whether to turn each arm (each drive pulse) on or off according to the results of the comparison, as follows:

[0063] g1 = On, g2 = Off (Car12 ≤ D12) g1 = Off, g2 = On (Car12 > D12) g3 = On, g4 = Off (Car34 ≤ D34) g3 = Off, g4 = On (Car34 > D34) g5 = On, g6 = Off (Car56 ≤ D56) g5 = Off, g6 = On (Car56 > D56) g7 = On, g8 = Off (Car78 ≤ D78) g7 = Off, g8 = On (Car78 > D78)

[0064] The phase calculation unit 160 generates phase commands θ12ref, θ34ref, θ56ref, and θ78ref according to the power command Pref which specifies the target value of power P. The phase calculation unit 160 calculates the phase commands θ12ref, θ34ref, θ56ref, and θ78ref that correspond to the target value of power P specified by the power command Pref. The phase commands θ12ref, θ34ref, θ56ref, and θ78ref calculated by the phase calculation unit 160 are signals that generate the phase difference δ required for the transmission of power P specified by the power command Pref.

[0065] The phase command θ12ref is a command signal that specifies the phase of drive pulses g1 and g2. The phase command θ34ref is a command signal that changes the phase of drive pulses g3 and g4. The phase command θ56ref is a command signal that changes the phase of drive pulses g5 and g6. The phase command θ78ref is a command signal that changes the phase of drive pulses g7 and g8. Phase commands θ12ref, θ34ref, θ56ref, and θ78ref correspond to the above phase command θref.

[0066] The pulse compensation unit 161 compensates the phase command θ12ref output by the phase calculation unit 160 in accordance with the amount of change in the phase command θ12ref, so as to reduce the DC component superimposed on the integral value of (g1-g2). The pulse compensation unit 161 generates a compensated phase command θ12 by performing feedforward compensation, adding a compensation amount Δθ12 corresponding to the amount of change in the phase command θ12ref to the phase command θ12ref so as to reduce the DC component superimposed on the integral value of (g1-g2). As a result, a phase command θ12 is generated in which the DC component superimposed on the integral value of (g1-g2) is reduced.

[0067] The pulse compensation unit 161 compensates the pulse width command dref, which was pre-set as the reference pulse width π, in accordance with the amount of change in the phase command θ12ref output by the phase calculation unit 160, so that the DC component superimposed on the integral value of (g1-g2) becomes smaller. The pulse compensation unit 161 generates the compensated pulse width command D12 by performing feedforward compensation, adding a compensation amount ΔD12 corresponding to the amount of change in the phase command θ12ref to the pulse width command dref so that the DC component superimposed on the integral value of (g1-g2) becomes smaller. As a result, a pulse width command D12 is generated in which the DC component superimposed on the integral value of (g1-g2) becomes smaller.

[0068] The pulse compensation unit 162 compensates the phase command θ34ref output by the phase calculation unit 160 in accordance with the amount of change in the phase command θ34ref so that the DC component superimposed on the integral value of (g3-g4) becomes smaller. The pulse compensation unit 162 generates a compensated phase command θ34 by performing feedforward compensation, adding a compensation amount Δθ34 corresponding to the amount of change in the phase command θ34ref to the phase command θ34ref so that the DC component superimposed on the integral value of (g3-g4) becomes smaller. As a result, a phase command θ34 is generated in which the DC component superimposed on the integral value of (g3-g4) becomes smaller.

[0069] The pulse compensation unit 162 compensates the pulse width command dref, which was pre-set as the reference pulse width π, in accordance with the amount of change in the phase command θ34ref output by the phase calculation unit 160, so that the DC component superimposed on the integral value of (g3-g4) becomes smaller. The pulse compensation unit 162 generates a compensated pulse width command D34 by performing feedforward compensation, adding a compensation amount ΔD34 corresponding to the amount of change in the phase command θ34ref to the pulse width command dref so that the DC component superimposed on the integral value of (g3-g4) becomes smaller. As a result, a pulse width command D34 is generated in which the DC component superimposed on the integral value of (g3-g4) becomes smaller.

[0070] The pulse compensation unit 163 compensates the phase command θ56ref output by the phase calculation unit 160 in accordance with the amount of change in the phase command θ56ref, so as to reduce the DC component superimposed on the integral value of (g5-g6). The pulse compensation unit 163 generates a compensated phase command θ56 by performing feedforward compensation, adding a compensation amount Δθ56 corresponding to the amount of change in the phase command θ56ref to the phase command θ56ref so as to reduce the DC component superimposed on the integral value of (g5-g6). As a result, a phase command θ56 is generated in which the DC component superimposed on the integral value of (g5-g6) is reduced.

[0071] The pulse compensation unit 163 compensates the pulse width command dref, which was pre-set as the reference pulse width π, in accordance with the amount of change in the phase command θ56ref output by the phase calculation unit 160, so that the DC component superimposed on the integral value of (g5-g6) becomes smaller. The pulse compensation unit 163 generates a compensated pulse width command D56 by performing feedforward compensation, adding a compensation amount ΔD56 corresponding to the amount of change in the phase command θ56ref to the pulse width command dref so that the DC component superimposed on the integral value of (g5-g6) becomes smaller. As a result, a pulse width command D56 is generated in which the DC component superimposed on the integral value of (g5-g6) becomes smaller.

[0072] The pulse compensation unit 164 compensates the phase command θ78ref output by the phase calculation unit 160 in accordance with the amount of change in the phase command θ78ref so that the DC component superimposed on the integral value of (g7-g8) becomes smaller. The pulse compensation unit 164 generates the compensated phase command θ78 by performing feedforward compensation, adding a compensation amount Δθ78 corresponding to the amount of change in the phase command θ78ref to the phase command θ78ref so that the DC component superimposed on the integral value of (g7-g8) becomes smaller. As a result, a phase command θ78 is generated in which the DC component superimposed on the integral value of (g7-g8) becomes smaller.

[0073] The pulse compensation unit 164 compensates the pulse width command dref, which was pre-set as the reference pulse width π, in accordance with the amount of change in the phase command θ78ref output by the phase calculation unit 160, so that the DC component superimposed on the integral value of (g7-g8) becomes smaller. The pulse compensation unit 164 generates the compensated pulse width command D78 by performing feedforward compensation, adding a compensation amount ΔD78 corresponding to the amount of change in the phase command θ78ref to the pulse width command dref so that the DC component superimposed on the integral value of (g7-g8) becomes smaller. As a result, a pulse width command D78 is generated in which the DC component superimposed on the integral value of (g7-g8) becomes smaller.

[0074] Figure 5 shows the operating waveform when the phase command change is negative and there is no pulse compensation unit. Figure 6 shows the operating waveform when the phase command change is negative and there is a pulse compensation unit. The effects of the pulse compensation unit 161 when the phase command change is negative will be explained below by comparing Figures 5 and 6.

[0075] Note that the pulse compensation units 162, 163, and 164 have the same effects as the pulse compensation unit 161, so the explanation of the effects of each of the pulse compensation units 162, 163, and 164 will be omitted by referring to the explanation of the effects of the pulse compensation unit 161. Also, in Figure 4, if the pulse compensation unit 161 is not used, the phase command θ12ref is not compensated by the pulse compensation unit 161, so the phase command θ12 remains the phase command θ12ref output from the phase calculation unit 160. If the pulse compensation unit 161 is not used, the pulse width command dref is not compensated by the pulse compensation unit 161, so the pulse width command D12 remains the reference pulse width π that was set in advance as the pulse width command dref.

[0076] Figure 5 illustrates the operating waveforms of the carrier wave Car12, pulse width command value D12, (g1-g2), and its integral value when the phase command θ12ref changes from 0 to -π / 2 without using the pulse compensation unit 161. In this case, the amount by which the phase command θ12ref changes in one calculation period is a negative change Δθ (=-π / 2).

[0077] If Car12 ≤ D12, then g1=1 and g2=0, so (g1-g2)=1 (high level). If Car12 > D12, then g1=0 and g2=1, so (g1-g2)=-1 (low level).

[0078] As shown in Figure 5, when the phase command θ12ref changes from 0 to -π / 2 at a timing of phase 2π, the phase θ of the carrier wave Car12 shifts (lags) to the right by π / 2 with respect to the timing of phase 2π. The pulse width command D12 is fixed at a reference pulse width π (= duty cycle of 50%). In this case, the low-level period of (g1-g2) is π / 2 longer than when the phase command θ12ref does not change. Therefore, the integral value of (g1-g2) (=∫(g1-g2)·dθ) is offset downward, and a DC component is superimposed on the integral value of (g1-g2). Consequently, a DC component is superimposed on the current flowing through the isolation transformer 102, and there is a risk that the isolation transformer 102 will become magnetized.

[0079] Figure 6 illustrates the operating waveforms of the carrier wave Car12, pulse width command value D12, (g1-g2), and its integral value when the phase command θ12ref changes from 0 to -π / 2 when the pulse compensation unit 161 is used. The amount by which the phase command θ12ref changes in one calculation period is a negative change Δθ (=-π / 2).

[0080] In the case of Figure 6, the pulse compensation unit 161 generates the phase command θ12 (=-π / 4) by performing feedforward compensation, adding a compensation amount Δθ12 (=π / 4) which is equal to half the change amount Δθ (=-π / 2) to the phase command θ12ref (=-π / 2). As a result, as shown in Figure 6, the phase θ of the carrier wave Car12 is shifted (delayed) to the right by π / 4 with respect to the phase timing 2π. Along with this phase compensation, the pulse compensation unit 161 generates the pulse width command D12 (=5π / 4) by performing feedforward compensation, adding a compensation amount ΔD12 (=π / 4) which is equal to half the change amount Δθ (=-π / 2) to the pulse width command dref (=π).

[0081] As both the phase and pulse width are compensated in this way, the rising edge of (g1-g2) shifts (advances) to the left by π / 4 in phase compared to the case in Figure 5, while the falling edge of (g1-g2) occurs at the same phase timing as in the case in Figure 5. As a result, the DC component superimposed on the integral value of (g1-g2) is smaller than in the case in Figure 5. Therefore, the DC component superimposed on the current flowing through the isolation transformer 102 is reduced, and the bias of the isolation transformer 102 can be suppressed.

[0082] Figure 7 shows the operating waveform when the phase command change is positive and there is no pulse compensation unit. Figure 8 shows the operating waveform when the phase command change is positive and there is a pulse compensation unit. The effects of the pulse compensation unit 161 when the phase command change is positive will be explained below by comparing Figures 7 and 8.

[0083] Figure 7 illustrates the operating waveforms of the carrier wave Car12, pulse width command value D12, (g1-g2), and its integral value when the phase command θ12ref changes from 0 to π / 2, without using the pulse compensation unit 161. In this case, the amount by which the phase command θ12ref changes in one calculation period is a positive change Δθ (=π / 2).

[0084] As shown in Figure 7, when the phase command θ12ref changes from 0 to π / 2 at a timing of phase 2π, the phase θ of the carrier wave Car12 shifts (advances) to the left by π / 2 with respect to the timing of phase 2π. The pulse width command D12 is fixed at a reference pulse width π (= duty cycle of 50%). In this case, the high-level period of (g1-g2) is shortened by π / 2 compared to when the phase command θ12ref does not change. Therefore, the integral value of (g1-g2) (=∫(g1-g2)·dθ) is offset downward, and a DC component is superimposed on the integral value of (g1-g2). Consequently, a DC component is superimposed on the current flowing through the isolation transformer 102, and there is a risk that the isolation transformer 102 will become magnetized.

[0085] Figure 8 illustrates the operating waveforms of the carrier wave Car12, pulse width command value D12, (g1-g2), and its integral value when the phase command θ12ref changes from 0 to π / 2 when the pulse compensation unit 161 is used. The amount by which the phase command θ12ref changes in one calculation period is a positive change Δθ (=π / 2).

[0086] In the case of Figure 8, the pulse compensation unit 161 does not perform feedforward compensation by setting the compensation amount Δθ12 to zero, and sets the phase command θ12 to be the same as the phase command θ12ref (=π / 2). The pulse compensation unit 161 generates the pulse width command D12 (=5π / 4) by performing feedforward compensation by adding a compensation amount ΔD12 (=π / 4) which is equal to half the change amount Δθ (=π / 2) to the pulse width command dref (=π).

[0087] As a result of compensating only the pulse width, the falling edge of (g1-g2) is shifted to the right by π / 4 in phase compared to the case in Figure 7 (it is delayed), while the rising edge of (g1-g2) occurs at the same phase timing as in the case in Figure 7. Consequently, the DC component superimposed on the integral value of (g1-g2) is smaller than in the case in Figure 7. Therefore, the DC component superimposed on the current flowing through the isolation transformer 102 is reduced, and the bias of the isolation transformer 102 can be suppressed.

[0088] As shown in Figures 6 and 8, the control device 106 switches between compensating for both the phase command θref and the pulse width command dref, or compensating for only the pulse width command dref. This allows the control device 106 to switch to a compensation method that can reduce the DC component superimposed on the current flowing through the isolation transformer 102.

[0089] As shown in Figures 6 and 8, the control device 106 switches between compensating for both the phase command θref and the pulse width command dref, or compensating only for the pulse width command dref, depending on the phase command θref. This allows the control device 106 to switch to a compensation method suitable for reducing the DC component superimposed on the current flowing through the isolation transformer 102.

[0090] The control device 106 compensates for both the phase command θref and the pulse width command dref when the first drive pulse change after the phase command θref is a rising edge (for example, in Figure 6), and compensates for only the pulse width command dref of the two pulse width commands dref when the first drive pulse change after the phase command θref is a falling edge (for example, in Figure 8). This allows the control device 106 to switch to a compensation method suitable for reducing the DC component superimposed on the current flowing through the isolation transformer 102.

[0091] In the case of Figure 6, as shown in the figure, the first change in the drive pulse (g1-g2) after the phase command θ12ref changes from 0 to -π / 2 is a rising edge. The drive pulse (g1-g2), which is the difference waveform of drive pulses g1 and g2 of the same leg, is the pulse when ON is 1 and OFF is 0, as described above. Therefore, the fact that the first change in the drive pulse (g1-g2) after the phase command θ12ref changes from 0 to -π / 2 is a rising edge indicates that the first change in the drive pulse g1 after the phase command θ12ref changes from 0 to -π / 2 is a rising edge.

[0092] In Figure 8, as shown in the diagram, the first change in the drive pulse (g1-g2) after the phase command θ12ref changes from 0 to π / 2 is a falling edge. The drive pulse (g1-g2), which is the difference waveform of drive pulses g1 and g2 of the same leg, is a pulse when ON is 1 and OFF is 0, as described above. Therefore, the fact that the first change in the drive pulse (g1-g2) after the phase command θ12ref changes from 0 to π / 2 is a falling edge indicates that the first change in the drive pulse g1 after the phase command θ12ref changes from 0 to π / 2 is a falling edge.

[0093] Figure 9 is a control block diagram showing one example configuration of the pulse compensation unit. The pulse compensation unit 161 shown in Figure 9 generates a compensation amount Δθ12, which is equal in magnitude to half the change amount Δθ of the phase command θ12ref, and a compensation amount ΔD12, which is equal in magnitude to half the change amount Δθ of the phase command θ12ref. Since the pulse compensation units 162, 163, and 164 have the same configuration as the pulse compensation unit 161, the explanation of the configurations of each of the pulse compensation units 162, 163, and 164 will be omitted by referring to the explanation of the configuration of the pulse compensation unit 161.

[0094] When the pulse compensation unit 161 compensates for the rising edge of (g1-g2) as shown in Figure 6, for example, both the compensation amount Δθ12 and the compensation amount ΔD12 are set to the value obtained by multiplying half the change amount Δθ of the phase command θ12ref by "-1". When the pulse compensation unit 161 compensates for the falling edge of (g1-g2) as shown in Figure 8, for example, the compensation amount Δθ12 is set to zero, and the compensation amount ΔD12 is set to half the change amount Δθ of the phase command θ12ref.

[0095] The pulse compensation unit 161 switches whether to compensate for both the phase command θref and the pulse width command dref, or only the pulse width command dref, according to the adjustment edge selection rule 181. In other words, the pulse compensation unit 161 switches whether to compensate for the rising edge of (g1-g2) or the falling edge of (g1-g2), according to the adjustment edge selection rule 181.

[0096] Figure 10 shows an example of the adjustment edge selection rule. The pulse compensation unit 161 compensates for the rising edge of (g1-g2) when the phase command θ12ref is greater than (2n-1)π and less than 2nπ. The pulse compensation unit 161 compensates for the falling edge of (g1-g2) when the phase command θ12ref is greater than 2nπ and less than (2n+1)π. When the phase command θ12ref is 2nπ, the pulse compensation unit 161 compensates for the rising edge of (g1-g2) if the change amount Δθ (=Δθ12ref) of the phase command θ12ref is greater than 0, and compensates for the falling edge of (g1-g2) if Δθ12ref is less than 0. The pulse compensation unit 161 compensates for the falling edge of (g1-g2) if Δθ12ref is greater than 0 when the phase command θ12ref is (2n+1)π, and compensates for the rising edge of (g1-g2) if Δθ12ref is less than 0.

[0097] By following this rule, the control device 106 compensates for both the phase command θref and the pulse width command dref if the first drive pulse change after the phase command θref is a rising edge, and compensates for only the pulse width command dref of the two pulse width commands dref if the first drive pulse change after the phase command θref is a falling edge.

[0098] Figure 11 is a block diagram showing a first configuration example of the phase calculation unit. The phase calculation unit 160A shown in Figure 11 is an example of the phase calculation unit 160 described above. Figure 11 shows one configuration example in the case of SPS (Single Phase Shift) control. The phase calculation unit 160A calculates the phase difference δ required for the transmission of power P specified by the power command Pref. The phase calculation unit 160A generates phase commands θ12ref, θ34ref, θ56ref, and θ78ref required for the transmission of power P specified by the power command Pref, according to the calculated value of the phase difference δ.

[0099] Figure 12 shows the operating waveform when the phase calculation unit is in the first configuration example and there is no pulse compensation unit. Figure 13 shows the operating waveform when the phase calculation unit is in the first configuration example and there is a pulse compensation unit. As shown in Figure 12, when there is no pulse compensation unit, a DC component is superimposed on the primary AC current I1 and the excitation current IM when the phase difference δ changes. In contrast, as shown in Figure 13, when there is a pulse compensation unit, the DC component superimposed on the primary AC current I1 and the excitation current IM is suppressed by the change in phase difference δ.

[0100] Figure 14 is a block diagram showing a second configuration example of the phase calculation unit. The phase calculation unit 160B shown in Figure 14 is an example of the phase calculation unit 160 described above. Figure 14 shows a configuration example in which not only the phase difference δ but also the pulse widths λ1 and λ2 of the primary voltage V1 and secondary voltage V2 are controlled. The control device 106 may control not only the phase difference δ but also the pulse widths λ1 and λ2 of the primary voltage V1 and secondary voltage V2 in order to suppress the reactive current component of the primary AC current I1 or the secondary AC current I2. The phase calculation unit 160B calculates the control parameters (phase difference δ, pulse width λ1 and pulse width λ2) required for the transmission of power P specified by the power command Pref. The phase calculation unit 160B generates phase commands θ12ref, θ34ref, θ56ref, and θ78ref required for the transmission of power P specified by the power command Pref according to these calculated values.

[0101] Figure 15 shows the operating waveform when the phase calculation unit is in the second configuration example and there is no pulse compensation unit. Figure 16 shows the operating waveform when the phase calculation unit is in the second configuration example and there is a pulse compensation unit. As shown in Figure 15, when there is no pulse compensation unit, a DC component is superimposed on the primary AC current I1 and the excitation current IM when the phase difference δ and pulse widths λ1 and λ2 change. In contrast, as shown in Figure 16, when there is a pulse compensation unit, the DC component superimposed on the primary AC current I1 and the excitation current IM is suppressed by the change in phase difference δ and pulse widths λ1 and λ2.

[0102] As shown in Figures 13 and 16, even if the generation format of the phase commands θ12ref, θ34ref, θ56ref, and θ78ref by the phase calculation unit 160 is different, the DC component superimposed on the primary AC current I1 and the excitation current IM can be suppressed by providing a pulse compensation unit. The transmission power P is limited by the pulse compensation unit to suppress the DC component for only one calculation cycle. Therefore, compared to the case where the time rate of change of the transmission power P is limited over a period of time sufficiently longer than one calculation cycle, a stable supply of power P is possible.

[0103] The present invention is not limited by the embodiments described above. The embodiments can be implemented in various other forms, and various combinations, omissions, substitutions, and modifications are possible without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of symbols]

[0104] 100 Power converter 102 Isolation Transformer 106 Control device 110 Isolated DC / DC Converter 111 First Bridge Circuit 112 Second Bridge Circuit g1~g8 drive pulses

Claims

1. Isolation transformer, A first bridge circuit connected to the primary side of the isolation transformer, A second bridge circuit connected to the secondary side of the isolation transformer, A control device that reduces the DC component superimposed on the current flowing through the isolation transformer by compensating a pulse width command that changes the pulse width of the drive pulse in accordance with the amount of change in the phase command that changes the phase of the drive pulse that operates the first bridge circuit or the second bridge circuit, or by compensating both the phase command and the pulse width command, Equipped with, The control device switches between compensating for both the phase command and the pulse width command, or compensating for only the pulse width command among the phase command and the pulse width command. Power converter.

2. The control device switches between compensating for both the phase command and the pulse width command, or compensating only the pulse width command, depending on the phase command. The power conversion device according to claim 1.

3. The control device compensates both the phase command and the pulse width command if the first change in the drive pulse after the change in the phase command is a rising edge, and compensates only the pulse width command of the two pulse width commands if the first change in the drive pulse after the change in the phase command is a falling edge. The power conversion device according to claim 2.

4. The control device generates the drive pulse by comparing the pulse width command with a carrier wave whose phase changes according to the phase command. A power conversion device according to any one of claims 1 to 3.

5. The control device compensates the pulse width command with a compensation amount equivalent to half of the change amount, or compensates both the phase command and the pulse width command. The power conversion device according to claim 4.

6. The amount of change is the amount by which the phase command changes in one calculation period. A power conversion device according to any one of claims 1 to 3.