Semiconductor device

Abstract

This semiconductor device comprises: a conductive substrate; a plurality of first semiconductor elements joined to the conductive substrate; a first terminal disposed on one side of the conductive substrate in a first direction; and a first conductive member (first and second wiring parts) connected to the plurality of first semiconductor elements and the first terminal. The first wiring part has a first end portion connected to the first terminal, and a second end portion spaced apart from the first end portion in the first direction. The second wiring part is coupled to the first wiring part between the first end portion and the second end portion. The first wiring part includes a first portion and a second portion. The first portion is positioned between the first end portion and a site (first coupling portion) where the second wiring part is coupled to the first wiring part. The second portion is positioned between the first coupling portion and the second end portion. The size of the first portion in a direction perpendicular to the flow direction of a main circuit current is larger than the size of the second portion in the direction perpendicular to the flow direction of the main circuit current.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Conventionally, semiconductor devices including power switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors) have been known. Such semiconductor devices are installed in a wide variety of electronic devices, from industrial equipment to home appliances, information terminals, and automotive equipment. Patent Document 1 (Patent Document 1) discloses a conventional semiconductor device (power module). The semiconductor device described in Patent Document 1 includes a semiconductor element and a support substrate (ceramic substrate). The semiconductor element is, for example, an IGBT made of silicon (Si). The support substrate supports the semiconductor element. The support substrate includes an insulating base material and conductor layers stacked on both sides of the base material. The base material is, for example, made of ceramic. Each conductor layer is, for example, made of copper (Cu), and a semiconductor element is bonded to one of the conductor layers.

[0003] JP 2015-220382 A

[0004] In recent years, there has been a demand for electronic devices to be more energy-efficient, perform better, and be more compact. To achieve this, it is necessary to improve the performance and reduce the size of the semiconductor modules installed in the electronic devices.

[0005] The present disclosure has been made in light of the above circumstances, and one object of the present disclosure is to provide a semiconductor device suitable for passing a large current.

[0006] A semiconductor device provided by the present disclosure includes a conductive substrate having a main surface facing one side in a thickness direction and a back surface facing the opposite side to the main surface, a plurality of first semiconductor elements electrically connected to the main surface and having a switching function, a first terminal arranged on one side of the conductive substrate in a first direction perpendicular to the thickness direction, and a first conductive member forming a path of a main circuit current switched by the plurality of first semiconductor elements and connected to the plurality of first semiconductor elements and the first terminal, wherein the first conductive member includes a first wiring portion and a second wiring portion, and the first wiring portion is connected to the first terminal. and a second end separated from the first end in the first direction by the first wiring portion, the second wiring portion being connected to the first wiring portion between the first end and the second end, the first wiring portion having a first portion located between a first connecting portion which is a connecting portion of the second wiring portion to the first wiring portion and the first end, and a second portion located between the first connecting portion and the second end, and a first dimension which is the size of the first portion in a direction perpendicular to the flow direction of the main circuit current is larger than a second dimension which is the size of the second portion in a direction perpendicular to the flow direction of the main circuit current.

[0007] The semiconductor device of the present disclosure can provide a structure that is favorable for passing a large current.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0009] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a perspective view of FIG. 1 , with the sealing resin omitted. FIG. 3 is a perspective view of FIG. 2 , with the first conductive member omitted. FIG. 4 is a plan view of the semiconductor device shown in FIG. 1 . FIG. 5 is a view showing the sealing resin in imaginary lines in the plan view of FIG. 4 . FIG. 6 is a right side view of the semiconductor device shown in FIG. 1 , with the sealing resin indicated in imaginary lines. FIG. 7 is a left side view of the semiconductor device shown in FIG. 1 , with the sealing resin indicated in imaginary lines. FIG. 8 is a partially enlarged view of a portion of FIG. 5 , with the sealing resin omitted. FIG. 9 is a plan view of the first conductive member, showing the first extending portion and the second extending portion in an expanded state. FIG. 10 is a view of the plan view of FIG. 5 , with the sealing resin and the first conductive member omitted, and with the second conductive member indicated in imaginary lines. FIG. 11 is a right side view of the semiconductor device shown in FIG. 1 . FIG. 12 is a bottom view of the semiconductor device shown in FIG. 1 . FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 5 . FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 5 . FIG. 15 is a partially enlarged view of FIG. 14 . FIG. 16 is a partially enlarged view of FIG. 14 . FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. 5 . FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 5 . FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 5 . FIG. 20 is a cross-sectional view taken along line XX-XX in FIG. 5 . FIG. 21 is a plan view similar to FIG. 8 (without sealing resin) showing a semiconductor device according to a first modified example of the first embodiment. FIG. 22 is a plan view similar to FIG. 8 (without sealing resin) showing a semiconductor device according to a second modified example of the first embodiment. FIG. 23 is a plan view similar to FIG. 5 showing a semiconductor device according to a third modified example of the first embodiment.

[0010] Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.

[0011] Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not necessarily intended to dictate any ordering of their objects.

[0012] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B with a certain object A in contact with the certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "an object A overlaps an object B when viewed from a certain direction" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B."

[0013] 1 to 20 show a semiconductor device according to a first embodiment of the present disclosure. The semiconductor device A1 according to this embodiment includes a plurality of first semiconductor elements 10A, a plurality of second semiconductor elements 10B, a conductive substrate 2, a support substrate 3, a first terminal 41, a second terminal 42, a plurality of third terminals 43, a fourth terminal 44, a plurality of control terminals 45, a control terminal support 48, a first conductive member 5, a second conductive member 6, and a sealing resin 8.

[0014] FIG. 1 is a perspective view showing a semiconductor device A1. FIG. 2 is a perspective view of FIG. 1 , with the sealing resin 8 omitted. FIG. 3 is a perspective view of FIG. 2 , with the first conductive member 5 omitted. FIG. 4 is a plan view of the semiconductor device A1. FIG. 5 is a view of the plan view of FIG. 4 , with the sealing resin 8 shown in imaginary lines. FIG. 6 is a right side view of the semiconductor device A1, with the sealing resin 8 shown in imaginary lines. FIG. 7 is a left side view of the semiconductor device A1, with the sealing resin 8 shown in imaginary lines. FIG. 8 is a partial enlarged view of a portion of FIG. 5 , with the sealing resin 8 omitted. FIG. 9 is a plan view of the first conductive member 5, showing a state in which a first extension portion 514B and a second extension portion 534B, described below, are expanded. FIG. 10 is a view of the plan view of FIG. 5 , with the sealing resin 8 and the first conductive member 5 omitted, and with the second conductive member 6 shown in imaginary lines. FIG. 11 is a right side view of the semiconductor device A1. FIG. 12 is a bottom view of the semiconductor device A1. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 5. FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 5. FIGS. 15 and 16 are partially enlarged views of a portion of FIG. 14. FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. 5. FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 5. FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 5. FIG. 20 is a cross-sectional view taken along line XX-XX in FIG. 5.

[0015] For convenience of explanation, three mutually orthogonal directions are referred to as the x-direction, y-direction, and z-direction. The z-direction is, for example, the thickness direction of the semiconductor device A1. The x-direction is the left-right direction in the plan view of the semiconductor device A1 (see FIG. 4). The y-direction is the up-down direction in the plan view of the semiconductor device A1 (see FIG. 4). In the following explanation, "plan view" refers to the view in the z-direction.

[0016] The multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B are electronic components that are central to the functionality of the semiconductor device A1. The constituent material of each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is a semiconductor material primarily composed of, for example, silicon carbide (SiC). This semiconductor material is not limited to SiC and may be silicon (Si), gallium nitride (GaN), diamond (C), or the like. Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is, for example, a power semiconductor chip with switching function, such as a metal oxide semiconductor field effect transistor (MOSFET). In this embodiment, the first semiconductor elements 10A and the second semiconductor elements 10B are MOSFETs, but are not limited thereto and may be other transistors such as insulated gate bipolar transistors (IGBTs). Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is the same element. Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is, for example, an n-channel MOSFET, but may also be a p-channel MOSFET.

[0017] 15 and 16 , the first semiconductor element 10A and the second semiconductor element 10B each have an element main surface 101 and an element back surface 102. In each of the first semiconductor elements 10A and the second semiconductor elements 10B, the element main surface 101 and the element back surface 102 are spaced apart in the z direction. The element main surface 101 faces the z2 direction, and the element back surface 102 faces the z1 direction.

[0018] In this embodiment, the semiconductor device A1 includes four first semiconductor elements 10A and four second semiconductor elements 10B. However, the number of first semiconductor elements 10A and the number of second semiconductor elements 10B are not limited to this configuration and may be changed as appropriate depending on the performance required of the semiconductor device A1. In the example of FIG. 10 , four first semiconductor elements 10A and four second semiconductor elements 10B are arranged. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be two, three, or five or more. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be equal to or different from each other. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B is determined by the current capacity handled by the semiconductor device A1.

[0019] The semiconductor device A1 is configured, for example, as a half-bridge switching circuit. In this case, the multiple second semiconductor elements 10B configure an upper arm circuit of the semiconductor device A1, and the multiple first semiconductor elements 10A configure a lower arm circuit. In the upper arm circuit, the multiple second semiconductor elements 10B are connected in parallel with each other, and in the lower arm circuit, the multiple first semiconductor elements 10A are connected in parallel with each other. Each second semiconductor element 10B and each first semiconductor element 10A are connected in series to configure a bridge layer.

[0020] As shown in Figures 10 and 18, each of the multiple first semiconductor elements 10A is mounted on a conductive substrate 2. In the example shown in Figure 10, the multiple first semiconductor elements 10A are lined up, for example, in the y direction and spaced apart from one another. Each first semiconductor element 10A is conductively bonded to the conductive substrate 2 (a first conductive portion 2A described below) via a conductive bonding material 19. When each first semiconductor element 10A is bonded to the first conductive portion 2A, the element back surface 102 faces the first conductive portion 2A.

[0021] As shown in FIGS. 10 and 19 , the multiple second semiconductor elements 10B are mounted on a conductive substrate 2. In the example shown in FIG. 10 , the multiple second semiconductor elements 10B are lined up, for example, in the y direction and spaced apart from one another. Each second semiconductor element 10B is conductively bonded to the conductive substrate 2 (a second conductive portion 2B described below) via a conductive bonding material 19. When each second semiconductor element 10B is bonded to the second conductive portion 2B, the element back surface 102 faces the second conductive portion 2B. As can be seen from FIG. 10 , the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B overlap when viewed in the x direction, but they do not have to overlap.

[0022] The plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B each have a first principal surface electrode 11, a second principal surface electrode 12, a third principal surface electrode 13, and a back surface electrode 15. The configurations of the first principal surface electrode 11, the second principal surface electrode 12, the third principal surface electrode 13, and the back surface electrode 15 described below are common to each of the first semiconductor elements 10A and each of the second semiconductor elements 10B. The first principal surface electrode 11, the second principal surface electrode 12, and the third principal surface electrode 13 are provided on the element main surface 101. The first principal surface electrode 11, the second principal surface electrode 12, and the third principal surface electrode 13 are insulated by an insulating film (not shown). The back surface electrode 15 is provided on the element back surface 102.

[0023] The first principal surface electrode 11 is, for example, a gate electrode, to which a drive signal (for example, a gate voltage) for driving the first semiconductor element 10A (second semiconductor element 10B) is input. In the first semiconductor element 10A (second semiconductor element 10B), the second principal surface electrode 12 is, for example, a source electrode, through which a source current flows. The third principal surface electrode 13 is, for example, a source sense electrode, through which a source current flows. The back surface electrode 15 is, for example, a drain electrode, through which a drain current flows. The back surface electrode 15 covers the entire area (or substantially the entire area) of the element back surface 102. The back surface electrode 15 is, for example, formed by Ag (silver) plating.

[0024] When a drive signal (gate voltage) is input to the first principal surface electrode 11 (gate electrode), each first semiconductor element 10A (each second semiconductor element 10B) switches between a conductive state and a non-conductive state in response to the drive signal. In the conductive state, current flows from the back surface electrode 15 (drain electrode) to the second principal surface electrode 12 (source electrode), and in the non-conductive state, current does not flow. In other words, each first semiconductor element 10A (each second semiconductor element 10B) performs a switching operation. The semiconductor device A1 converts a DC voltage input between the single fourth terminal 44 and the two first and second terminals 41 and 42 into, for example, an AC voltage, and outputs the AC voltage from the third terminal 43, using the switching functions of the multiple first semiconductor elements 10A and multiple second semiconductor elements 10B.

[0025] 5, 10, etc., the semiconductor device A1 includes a thermistor 17. The thermistor 17 is used as a temperature detection sensor.

[0026] The conductive substrate 2 supports the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B. The conductive substrate 2 is bonded onto the support substrate 3 via a conductive bonding material 29. The conductive substrate 2 has, for example, a rectangular shape in a plan view. The conductive substrate 2, together with the first conductive members 5 and the second conductive members 6, constitutes a path for a main circuit current that is switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B.

[0027] The conductive substrate 2 includes a first conductive portion 2A and a second conductive portion 2B. The first conductive portion 2A and the second conductive portion 2B are each a plate-shaped member made of metal. This metal is, for example, Cu (copper) or a Cu alloy. The first conductive portion 2A and the second conductive portion 2B, together with a first terminal 41, a second terminal 42, a plurality of third terminals 43, and a fourth terminal 44, form conductive paths to a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. As shown in FIGS. 13 to 20 , the first conductive portion 2A and the second conductive portion 2B are each bonded to the support substrate 3 via a conductive bonding material 29. A plurality of first semiconductor elements 10A are bonded to the first conductive portion 2A via a conductive bonding material 19. A plurality of second semiconductor elements 10B are bonded to the second conductive portion 2B via a conductive bonding material 19. The constituent materials of the conductive bonding material 19 and the conductive bonding material 29 are not particularly limited and may be, for example, solder, a metal paste material, or a sintered metal. The first conductive portion 2A and the second conductive portion 2B are spaced apart in the x direction as shown in FIGS. 3, 10, 13, and 14. In the examples shown in these figures, the first conductive portion 2A is positioned further in the x1 direction than the second conductive portion 2B. The first conductive portion 2A and the second conductive portion 2B each have, for example, a rectangular shape in a plan view. The first conductive portion 2A and the second conductive portion 2B overlap when viewed in the x direction. The first conductive portion 2A and the second conductive portion 2B each have, for example, a dimension in the x direction of 15 mm to 25 mm, a dimension in the y direction of 30 mm to 40 mm, and a dimension in the z direction of 1.0 mm to 5.0 mm (preferably approximately 2.0 mm).

[0028] The conductive substrate 2 has a main surface 201 and a back surface 202. The main surface 201 and the back surface 202 are spaced apart in the z direction, as shown in FIGS. 13, 14, and 17 to 20. The main surface 201 faces the z2 direction, and the back surface 202 faces the z1 direction. The main surface 201 is formed by combining the upper surface of the first conductive portion 2A and the upper surface of the second conductive portion 2B. The back surface 202 is formed by combining the lower surface of the first conductive portion 2A and the lower surface of the second conductive portion 2B. The back surface 202 is bonded to the support substrate 3 so as to face the support substrate 3.

[0029] The support substrate 3 supports the conductive substrate 2. The support substrate 3 is formed of, for example, an AMB (Active Metal Brazing) substrate. The support substrate 3 includes an insulating layer 31, a first metal layer 32, and a second metal layer 33.

[0030] The insulating layer 31 is made of, for example, ceramics with excellent thermal conductivity. Examples of such ceramics include silicon nitride (SiN). The insulating layer 31 is not limited to ceramics and may be an insulating resin sheet or the like. The insulating layer 31 has, for example, a rectangular shape in a plan view.

[0031] The first metal layer 32 is formed on the upper surface (surface facing the z2 direction) of the insulating layer 31. The constituent material of the first metal layer 32 includes, for example, Cu. The constituent material may include Al (aluminum) instead of Cu. The first metal layer 32 includes a first portion 32A and a second portion 32B. The first portion 32A and the second portion 32B are spaced apart in the x direction. The first portion 32A is located on the x1 direction side of the second portion 32B. The first portion 32A is joined to the first conductive portion 2A and supports the first conductive portion 2A. The second portion 32B is joined to the second conductive portion 2B and supports the second conductive portion 2B. The first portion 32A and the second portion 32B are each, for example, rectangular in plan view.

[0032] The second metal layer 33 is formed on the lower surface (surface facing the z1 direction) of the insulating layer 31. The constituent material of the second metal layer 33 is the same as the constituent material of the first metal layer 32. In the example shown in FIG. 12 , the lower surface of the second metal layer 33 (a bottom surface 302 described below) is exposed from the sealing resin 8, for example. The lower surface may be covered by the sealing resin 8 without being exposed from the sealing resin 8. The second metal layer 33 overlaps both the first portion 32A and the second portion 32B in a plan view.

[0033] As shown in FIGS. 13 to 20 , the support substrate 3 has a support surface 301 and a bottom surface 302. The support surface 301 and the bottom surface 302 are spaced apart in the z direction. The support surface 301 faces the z2 direction, and the bottom surface 302 faces the z1 direction. As shown in FIG. 12 , the bottom surface 302 is exposed from the sealing resin 8. The support surface 301 is the upper surface of the first metal layer 32, and is formed by combining the upper surfaces of the first portion 32A and the second portion 32B. The support surface 301 faces the conductive substrate 2, and the conductive substrate 2 is bonded to the support surface 301. The bottom surface 302 is the lower surface of the second metal layer 33. A heat dissipation member (e.g., a heat sink) (not shown) can be attached to the bottom surface 302. The dimension of the support substrate 3 in the z direction (the distance along the z direction from the support surface 301 to the bottom surface 302) is, for example, 0.7 mm to 2.0 mm.

[0034] The first terminal 41, the second terminal 42, the plurality of third terminals 43, and the fourth terminal 44 are each made of a plate-shaped metal plate. The metal plate is made of, for example, Cu or a Cu alloy. In the example shown in Figures 1 to 5, 10, and 12, the semiconductor device A1 has one each of the first terminal 41, the second terminal 42, and the fourth terminal 44, and two third terminals 43.

[0035] A DC voltage to be converted into power is input to the first terminal 41, the second terminal 42, and the fourth terminal 44. The fourth terminal 44 is a positive electrode (P terminal), and the first terminal 41 and the second terminal 42 are each a negative electrode (N terminal). An AC voltage converted into power by the first semiconductor element 10A and the second semiconductor element 10B is output from the plurality of third terminals 43. The first terminal 41, the second terminal 42, the plurality of third terminals 43, and the fourth terminal 44 each include a portion covered with the sealing resin 8 and a portion exposed from the sealing resin 8.

[0036] As shown in FIG. 14 , the fourth terminal 44 is formed integrally with the second conductive portion 2B. Unlike the present configuration, the fourth terminal 44 may be separated from the second conductive portion 2B and conductively joined to the second conductive portion 2B. As shown in FIG. 10 and other figures, the fourth terminal 44 is located on the x2 direction side with respect to the plurality of second semiconductor elements 10B and the second conductive portion 2B (conductive substrate 2). The fourth terminal 44 is electrically connected to the second conductive portion 2B and, via the second conductive portion 2B, to the back surface electrode 15 (drain electrode) of each second semiconductor element 10B.

[0037] As shown in FIG. 10 , the first terminal 41 and the second terminal 42 are each spaced apart from the second conductive portion 2B. As shown in FIGS. 5 and 8 , the first terminal 41 and the second terminal 42 are each joined to a first conductive member 5. As shown in FIGS. 5 , 10 , etc., the first terminal 41 and the second terminal 42 are each located on the x2 direction side with respect to the plurality of second semiconductor elements 10B and the second conductive portion 2B (conductive substrate 2). The first terminal 41 and the second terminal 42 are each electrically connected to the first conductive member 5 and, via the first conductive member 5, to the second main surface electrode 12 (source electrode) of each second semiconductor element 10B.

[0038] As shown in Figures 1 to 5, 10, 12, etc., the first terminal 41, the second terminal 42, and the fourth terminal 44 each protrude in the x2 direction from the sealing resin 8 in the semiconductor device A1. The first terminal 41, the second terminal 42, and the fourth terminal 44 are spaced apart from one another. The first terminal 41 and the second terminal 42 are located on opposite sides of the fourth terminal 44 in the y direction. The first terminal 41 is located on the y2-direction side of the fourth terminal 44, and the second terminal 42 is located on the y1-direction side of the fourth terminal 44. The first terminal 41, the second terminal 42, and the fourth terminal 44 overlap one another when viewed in the y direction.

[0039] As can be seen from FIGS. 10 and 13 , the two third terminals 43 are each integrally formed with the first conductive portion 2A. Unlike the present configuration, the third terminal 43 may be separated from the first conductive portion 2A and conductively joined to the first conductive portion 2A. As shown in FIG. 10 and other figures, the two third terminals 43 are each located on the x1-direction side of the multiple first semiconductor elements 10A and the first conductive portion 2A (conductive substrate 2). Each third terminal 43 is electrically connected to the first conductive portion 2A and, via the first conductive portion 2A, to the back electrode 15 (drain electrode) of each first semiconductor element 10A. The number of third terminals 43 is not limited to two and may be, for example, one or three or more. For example, if there is one third terminal 43, it is preferably connected to the center portion of the first conductive portion 2A in the y direction.

[0040] The plurality of control terminals 45 are pin-shaped terminals for controlling each of the first semiconductor elements 10A and each of the second semiconductor elements 10B. The plurality of control terminals 45 include a plurality of first control terminals 46A to 46E and a plurality of second control terminals 47A to 47E. The plurality of first control terminals 46A to 46E are used to control each of the first semiconductor elements 10A, etc. The plurality of second control terminals 47A to 47E are used to control each of the second semiconductor elements 10B, etc.

[0041] The multiple first control terminals 46A-46E are arranged at intervals in the y direction. As shown in Figures 10 and 14, each of the first control terminals 46A-46E is supported by the first conductive portion 2A via a control terminal support 48 (a first support portion 48A described below). As shown in Figures 5 and 10, each of the first control terminals 46A-46E is located between the multiple first semiconductor elements 10A and two third terminals 43 in the x direction.

[0042] The first control terminal 46A is a terminal (gate terminal) for inputting a drive signal for the plurality of first semiconductor elements 10A. A drive signal for driving the plurality of first semiconductor elements 10A is input to the first control terminal 46A (for example, a gate voltage is applied).

[0043] The first control terminal 46B is a terminal (source sense terminal) for detecting source signals of the multiple first semiconductor elements 10A. The first control terminal 46B detects a voltage (a voltage corresponding to a source current) applied to each second principal surface electrode 12 (source electrode) of the multiple first semiconductor elements 10A.

[0044] The first control terminal 46C and the first control terminal 46D are terminals that are electrically connected to the thermistor 17.

[0045] The first control terminal 46E is a terminal (drain sense terminal) for detecting drain signals of the multiple first semiconductor elements 10A. The first control terminal 46E detects a voltage (a voltage corresponding to a drain current) applied to each back electrode 15 (drain electrode) of the multiple first semiconductor elements 10A.

[0046] The second control terminals 47A to 47E are spaced apart in the y direction. As shown in Figures 10 and 14, each of the second control terminals 47A to 47E is supported by the second conductive portion 2B via a control terminal support 48 (a second support portion 48B described below). As shown in Figures 5 and 10, each of the second control terminals 47A to 47E is located in the x direction between the second semiconductor elements 10B and the first terminal 41, the second terminal 42, and the fourth terminal 44.

[0047] The second control terminal 47A is a terminal (gate terminal) for inputting drive signals for the multiple second semiconductor elements 10B. A drive signal for driving the multiple second semiconductor elements 10B is input to the second control terminal 47A (e.g., a gate voltage is applied). The second control terminal 47B is a terminal (source sense terminal) for detecting source signals for the multiple second semiconductor elements 10B. The second control terminal 47B detects a voltage (a voltage corresponding to a source current) applied to each second principal surface electrode 12 (source electrode) of the multiple second semiconductor elements 10B. The second control terminal 47C and the second control terminal 47D are terminals electrically connected to the thermistor 17. The second control terminal 47E is a terminal (drain sense terminal) for detecting drain signals for the multiple second semiconductor elements 10B. The second control terminal 47E detects a voltage (a voltage corresponding to a drain current) applied to each back surface electrode 15 (drain electrode) of the multiple second semiconductor elements 10B.

[0048] Each of the plurality of control terminals 45 (the plurality of first control terminals 46A to 46E and the plurality of second control terminals 47A to 47E) includes a holder 451 and a metal pin 452.

[0049] The holder 451 is made of a conductive material. As shown in FIGS. 15 and 16 , the holder 451 is bonded to the control terminal support 48 (first metal layer 482 described below) via a conductive bonding material 459. The holder 451 includes a cylindrical portion, an upper flange, and a lower flange. The upper flange is connected to the upper part of the cylindrical portion, and the lower flange is connected to the lower part of the cylindrical portion. A metal pin 452 is inserted through at least the upper flange and the cylindrical portion of the holder 451. The holder 451 is covered with sealing resin 8 (second protrusion 852 described below).

[0050] The metal pin 452 is a rod-shaped member extending in the z direction. The metal pin 452 is supported by being press-fitted into the holder 451. The metal pin 452 is electrically connected to the control terminal support body 48 (a first metal layer 482 described below) at least via the holder 451. As in the example shown in FIGS. 15 and 16 , when the lower end (the end on the z1 direction side) of the metal pin 452 is in contact with the conductive bonding material 459 inside the insertion hole of the holder 451, the metal pin 452 is electrically connected to the control terminal support body 48 via the conductive bonding material 459.

[0051] The control terminal support 48 supports the plurality of control terminals 45. The control terminal support 48 is interposed between the main surface 201 (conductive substrate 2) and the plurality of control terminals 45 in the z direction.

[0052] The control terminal support 48 includes a first support portion 48A and a second support portion 48B. The first support portion 48A is disposed on the first conductive portion 2A of the conductive substrate 2 and supports a plurality of first control terminals 46A to 46E among the plurality of control terminals 45. As shown in FIG. 15 , the first support portion 48A is bonded to the first conductive portion 2A via a bonding material 49. The bonding material 49 may be conductive or insulating, and may be, for example, solder. The second support portion 48B is disposed on the second conductive portion 2B of the conductive substrate 2 and supports a plurality of second control terminals 47A to 47D among the plurality of control terminals 45. As shown in FIG. 16 , the second support portion 48B is bonded to the second conductive portion 2B via the bonding material 49.

[0053] The control terminal support 48 (each of the first support portion 48A and the second support portion 48B) is made of, for example, a DBC substrate. The control terminal support 48 has an insulating layer 481, a first metal layer 482, and a second metal layer 483 stacked on top of each other.

[0054] The insulating layer 481 is made of, for example, ceramics and has, for example, a rectangular shape in plan view.

[0055] As shown in Figures 15 and 16, the first metal layer 482 is formed on the upper surface of the insulating layer 481. Each control terminal 45 is provided upright on the first metal layer 482. The first metal layer 482 is made of, for example, Cu or a Cu alloy. As shown in Figure 10, the first metal layer 482 includes a first portion 482A, a second portion 482B, a third portion 482C, a fourth portion 482D, and a fifth portion 482E. The first portion 482A, the second portion 482B, the third portion 482C, the fourth portion 482D, and the fifth portion 482E are spaced apart and insulated from one another.

[0056] A plurality of wires 71 are bonded to the first portion 482A, and the first portion 482A is electrically connected to the first principal surface electrodes 11 (gate electrodes) of the first semiconductor elements 10A (second semiconductor elements 10B) via the wires 71. A plurality of wires 73 are connected between the first portion 482A and the sixth portion 482F. As a result, the sixth portion 482F is electrically connected to the first principal surface electrodes 11 (gate electrodes) of the first semiconductor elements 10A (second semiconductor elements 10B) via the wires 73 and 71. As shown in FIG. 10 , the first control terminal 46A is bonded to the sixth portion 482F of the first support portion 48A, and the second control terminal 47A is bonded to the sixth portion 482F of the second support portion 48B.

[0057] A plurality of wires 72 are joined to the second portion 482B, and the second portion 482B is electrically connected to the second main surface electrode 12 (source electrode) of each first semiconductor element 10A (each second semiconductor element 10B) via each wire 72. As shown in Fig. 10 , a first control terminal 46B is joined to the second portion 482B of the first support portion 48A, and a second control terminal 47B is joined to the second portion 482B of the second support portion 48B.

[0058] The thermistor 17 is joined to the third portion 482C and the fourth portion 482D. As shown in Fig. 10, the first control terminals 46C and 46D are joined to the third portion 482C and the fourth portion 482D of the first support portion 48A, and the second control terminals 47C and 47D are joined to the third portion 482C and the fourth portion 482D of the second support portion 48B.

[0059] A wire 74 is joined to the fifth portion 482E of the first support portion 48A, and the fifth portion 482E is electrically connected to the first conductive portion 2A via the wire 74. A wire 74 is joined to the fifth portion 482E of the second support portion 48B, and the fifth portion 482E is electrically connected to the second conductive portion 2B via the wire 74. As shown in FIG. 10 , a first control terminal 46E is joined to the fifth portion 482E of the first support portion 48A, and a second control terminal 47E is joined to the fifth portion 482E of the second support portion 48B. Each of the wires 71 to 74 is, for example, a bonding wire. The constituent material of each of the wires 71 to 74 includes, for example, any of Au (gold), Al, and Cu.

[0060] 15, 16, etc., the second metal layer 483 is formed on the lower surface of the insulating layer 481. The second metal layer 483 of the first support portion 48A is bonded to the first conductive portion 2A via a bonding material 49, as shown in Fig. 15. The second metal layer 483 of the second support portion 48B is bonded to the second conductive portion 2B via a bonding material 49, as shown in Fig. 16.

[0061] The first conductive member 5 and the second conductive member 6, together with the conductive substrate 2, constitute a path for a main circuit current switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B. The first conductive member 5 and the second conductive member 6 are spaced apart from the main surface 201 (conductive substrate 2) in the z2 direction and overlap the main surface 201 in a plan view. In this embodiment, the first conductive member 5 and the second conductive member 6 are each made of a metal plate material. The metal is, for example, Cu or a Cu alloy. Specifically, the first conductive member 5 and the second conductive member 6 are made of an appropriately bent metal plate material.

[0062] The first conductive member 5 is connected to the second main surface electrode 12 (source electrode) of each first semiconductor element 10A and to the first terminal 41 and second terminal 42, thereby establishing electrical continuity between the second main surface electrode 12 of each first semiconductor element 10A and the first terminal 41 and second terminal 42. The first conductive member 5 forms a path for a main circuit current switched by the multiple first semiconductor elements 10A. The first conductive member 5 has a maximum dimension in the x direction of, for example, 25 mm to 40 mm, and a maximum dimension in the y direction of, for example, 30 mm to 45 mm. As shown in FIGS. 8 and 9 , the first conductive member 5 includes a first wiring portion 51, a second wiring portion 52, a third wiring portion 53, and a fourth wiring portion 54.

[0063] The first wiring portion 51 has a first end portion 511, a second end portion 512, a first connecting portion 513, a first portion 514, and a second portion 515. The first end portion 511 is connected to the first terminal 41. The first end portion 511 and the first terminal 41 are joined by a conductive bonding material 59. The first wiring portion 51 is a band-shaped portion that extends in the x-direction as a whole in a plan view.

[0064] The second end 512 is spaced apart from the first end 511 in the x direction. As shown in Figures 8 and 9, the second end 512 is located in the x1 direction relative to the first end 511. The first connecting portion 513 is located between the first end 511 and the second end 512. The first connecting portion 513 is a portion where the second wiring portion 52 (a first strip portion 521 described below) is connected to the first wiring portion 51.

[0065] The first portion 514 is located between the first connecting portion 513 and the first end 511, and is connected to both the first end 511 and the second portion 515. The first portion 514 overlaps with the second conductive portion 2B in a planar view. The second portion 515 is located between the first connecting portion 513 and the second end 512, and is connected to the second end 512. The second portion 515 overlaps with both the second conductive portion 2B and the first conductive portion 2A in a planar view.

[0066] In this embodiment, the first portion 514 has a first main portion 514A and a first extending portion 514B. The first main portion 514A is located in the z2 direction relative to the main surface 201 (conductive substrate 2). The first main portion 514A overlaps with the second conductive portion 2B (conductive substrate 2) in a planar view. As shown in FIG. 20 and other figures, the first main portion 514A is parallel to the main surface 201. As shown in FIGS. 5 and 6 and other figures, the first main portion 514A overlaps with the second portion 515 when viewed in the x direction.

[0067] The first extending portion 514B is connected to the first main portion 514A in the y2 direction. In this embodiment, as shown in Fig. 6, the first extending portion 514B protrudes in an arc shape from the y2 direction side of the first main portion 514A. The first extending portion 514B is also bent in the z1 direction with respect to the first main portion 514A.

[0068] 8, the first extending portion 514B does not overlap with the second conductive portion 2B (conductive substrate 2) in a plan view. In the present embodiment, the first extending portion 514B overlaps with the second conductive portion 2B (conductive substrate 2) when viewed in the y direction, as shown in FIG.

[0069] As shown in FIGS. 5 , 8 , and 20 , the first portion 514 (first main portion 514A) has a first opening 514c. The first opening 514c is a partially cut-out portion in a plan view. In this embodiment, the first opening 514c overlaps the main surface 201 of the second conductive portion 2B (conductive substrate 2) in a plan view, but is located so as not to overlap the plurality of second semiconductor elements 10B in a plan view. The first opening 514c is located closer to the y2 direction of the second conductive portion 2B (conductive substrate 2) in a plan view. In this embodiment, the first opening 514c is an arc-shaped notch recessed in the y2 direction from the y1-direction end of the first main portion 514A. The planar shape of the first opening 514c is not limited and may be a notch as in this embodiment, or a hole as in this embodiment.

[0070] As shown in FIGS. 5 and 8 , the second portion 515 has an opening 515a. In this embodiment, the second portion 515 has two openings 515a. The two openings 515a are spaced apart in the x direction. The opening 515a on the x2 direction side overlaps the main surface 201 of the second conductive portion 2B (conductive substrate 2) in a plan view, but is located so as not to overlap the multiple second semiconductor elements 10B in a plan view. The opening 515a on the x1 direction side overlaps the main surface 201 of the first conductive portion 2A (conductive substrate 2) in a plan view, but is located so as not to overlap the multiple first semiconductor elements 10A in a plan view. The opening 515a is located closer to the y2 direction of the second conductive portion 2B (first conductive portion 2A) in a plan view. In this embodiment, the opening 515a is an arc-shaped notch recessed in the y2 direction from the y1 direction end of the second portion 515. The planar shape of the opening 515a is not limited, and may be a notch as in this embodiment, or may be a hole as in this embodiment.

[0071] As shown in Fig. 9 , the first extension portion 514B is located at a position corresponding to the first opening 514c and overlaps with the first opening 514c when viewed in the y direction. The first portion 514 (the first main portion 514A and the first extension portion 514B) is curved to bulge in the y2 direction. As can be seen from Figs. 9 and 20 , a first dimension L1, which is the size of the first portion 514 (the first main portion 514A and the first extension portion 514B) in a direction perpendicular to the flow direction of the main circuit current, is greater than a second dimension L2, which is the size of the second portion 515 in a direction perpendicular to the flow direction of the main circuit current. Here, the "magnitude in the direction perpendicular to the flow direction of the main circuit current" in the first part 514 (first main part 514A and first extension part 514B) is not limited to just one direction, but also includes the bending direction along the folded part (first extension part 514B) (see Figure 20) and the curved direction along the curved part (see Figure 9).

[0072] The second wiring portion 52 has a first strip portion 521 and a second strip portion 522. The first strip portion 521 is a strip-shaped portion extending in the y direction in a plan view. The first strip portion 521 is connected to the first wiring portion 51 between the first end portion 511 and the second end portion 512. The first strip portion 521 extends in the y1 direction from the first connecting portion 513. The first strip portion 521 overlaps multiple second semiconductor elements 10B in a plan view.

[0073] The second wiring portion 52 has at least one second strip portion 522. In this embodiment, the second wiring portion 52 has a plurality (three) of second strip portions 522. Each second strip portion 522 is strip-shaped and extends in the x direction in a plan view. The second strip portions 522 are spaced apart in the y direction and arranged parallel (or approximately parallel). One end of each of the second strip portions 522 is connected between two of the first strip portions 521 that are adjacent in the y direction to each other in a plan view, and extends in the x1 direction.

[0074] The third wiring portion 53 has a third end portion 531, a fourth end portion 532, a second connecting portion 533, a third portion 534, and a fourth portion 535. The third end portion 531 is connected to the second terminal 42. The third end portion 531 and the second terminal 42 are joined by a conductive bonding material 59. The third wiring portion 53 is a band-shaped portion extending in the x direction as a whole in a plan view. The first wiring portion 51 and the third wiring portion 53 are arranged to be spaced apart in the y direction. The third wiring portion 53 is positioned in the y1 direction relative to the first wiring portion 51.

[0075] The fourth end 532 is spaced apart from the third end 531 in the x-direction. As shown in FIGS. 8 and 9 , the fourth end 532 is located in the x1-direction relative to the third end 531. The second connecting portion 533 is located between the third end 531 and the fourth end 532. The second connecting portion 533 is a connecting portion of the second wiring portion 52 (first strip portion 521) to the third wiring portion 53. The first strip portion 521 is connected to the third wiring portion 53 between the first end 511 and the second end 512.

[0076] The third portion 534 is located between the second connecting portion 533 and the third end 531, and is connected to both the third end 531 and the fourth portion 535. The third portion 534 overlaps the second conductive portion 2B in plan view. The fourth portion 535 is located between the second connecting portion 533 and the fourth end 532, and is connected to the fourth end 532. The fourth portion 535 overlaps both the second conductive portion 2B and the first conductive portion 2A in plan view.

[0077] In this embodiment, the third portion 534 has a second main portion 534A and a second extending portion 534B. The second main portion 534A is located in the z2 direction relative to the main surface 201 (conductive substrate 2). The second main portion 534A overlaps with the second conductive portion 2B (conductive substrate 2) in a planar view. As shown in FIG. 20 and other figures, the second main portion 534A is parallel to the main surface 201. As shown in FIGS. 5 and 7 and other figures, the second main portion 534A overlaps with the fourth portion 535 when viewed in the x direction.

[0078] The second extending portion 534B is connected to the second main portion 534A in the y1 direction. In this embodiment, as shown in Fig. 7, the second extending portion 534B protrudes in an arc shape from the y1 direction side of the second main portion 534A. The second extending portion 534B is also bent in the z1 direction with respect to the second main portion 534A.

[0079] 8, the second extending portion 534B does not overlap with the second conductive portion 2B (conductive substrate 2) in a plan view. In addition, in the present embodiment, as shown in FIG. 7, the second extending portion 534B overlaps with the second conductive portion 2B (conductive substrate 2) when viewed in the y direction.

[0080] As shown in FIGS. 5 , 8 , and 20 , the third portion 534 (second main portion 534A) has a second opening 534c. The second opening 534c is a partially cut-out portion in plan view. In this embodiment, the second opening 534c overlaps the main surface 201 of the second conductive portion 2B (conductive substrate 2) in plan view, but is located so as not to overlap the multiple second semiconductor elements 10B in plan view. The second opening 534c is located closer to the y1 direction of the second conductive portion 2B (conductive substrate 2) in plan view. In this embodiment, the second opening 534c is an arc-shaped notch recessed in the y1 direction from the y2-direction end of the second main portion 534A. The planar shape of the second opening 534c is not limited and may be a notch as in this embodiment, or a hole as in this embodiment.

[0081] As shown in FIGS. 5 and 8 , the fourth portion 535 has an opening 535a. In this embodiment, the fourth portion 535 has two openings 535a. The two openings 535a are spaced apart in the x direction. The opening 535a on the x2 direction side overlaps the main surface 201 of the second conductive portion 2B (conductive substrate 2) in a plan view, but is located so as not to overlap the multiple second semiconductor elements 10B in a plan view. The opening 535a on the x1 direction side overlaps the main surface 201 of the first conductive portion 2A (conductive substrate 2) in a plan view, but is located so as not to overlap the multiple first semiconductor elements 10A in a plan view. The opening 535a is located closer to the y1 direction of the second conductive portion 2B (first conductive portion 2A) in a plan view. In this embodiment, the opening 535a is an arc-shaped notch recessed in the y1 direction from the y2 direction end of the fourth portion 535. The planar shape of the opening 535a is not limited, and may be a notch as in this embodiment, or may be a hole as in this embodiment.

[0082] As shown in Fig. 9 , the second extension portion 534B is located at a position corresponding to the second opening 534c and overlaps with the second opening 534c when viewed in the y direction. The third portion 534 (the second main portion 534A and the second extension portion 534B) is curved to bulge in the y1 direction. As can be seen from Figs. 9 and 20 , the third dimension L3, which is the size of the third portion 534 (the second main portion 534A and the second extension portion 534B) in the direction perpendicular to the flow direction of the main circuit current, is greater than the fourth dimension L4, which is the size of the fourth portion 535 in the direction perpendicular to the flow direction of the main circuit current. Here, the "magnitude in the direction perpendicular to the flow direction of the main circuit current" in the third part 534 (second main part 534A and second extension part 534B) is not limited to only one direction, but also includes the bending direction along the folded part (second extension part 534B) (see Figure 20) and the curved direction along the curved part (see Figure 9).

[0083] In this embodiment, as shown in FIG. 9, the first portion 514 of the first wiring portion 51 and the third portion 534 of the third wiring portion 53 overlap with the first strip portion 521 of the second wiring portion 52 when viewed in the y direction.

[0084] The fourth wiring portion 54 is connected to both the first wiring portion 51 (second end 512) and the third wiring portion 53 (fourth end 532). The fourth wiring portion 54 is a strip-shaped portion extending in the y direction in a planar view. As can be seen from FIG. 8 and other figures, the fourth wiring portion 54 overlaps multiple first semiconductor elements 10A in a planar view. As shown in FIG. 18, the fourth wiring portion 54 is connected to each first semiconductor element 10A. The fourth wiring portion 54 has multiple recessed regions 541. As shown in FIG. 18, each recessed region 541 protrudes in the z1 direction further than other portions of the fourth wiring portion 54. In this embodiment, a slit 541a is formed in each recessed region 541. In this embodiment, as shown in FIGS. 8 and 18, the slit 541a is located at the center of the recessed region 541 in the y direction and extends in the x direction. Each recessed region 541 is composed of two portions separated in the y direction by a slit 541a. Each recessed region 541 of the fourth wiring portion 54 is bonded to a corresponding first semiconductor element 10A. Each recessed region 541 of the fourth wiring portion 54 is bonded to the second principal surface electrode 12 of each first semiconductor element 10A via a conductive bonding material 59. The material of the conductive bonding material 59 is not particularly limited and may be, for example, solder, a metal paste material, or a sintered metal. The x1-direction side ends of the multiple second strip portions 522 are connected between two recessed regions 541 of the fourth wiring portion 54 adjacent in the y direction.

[0085] The second conductive member 6 is connected to the second principal surface electrode 12 (source electrode) of each second semiconductor element 10B and the first conductive portion 2A, and provides electrical continuity between the second principal surface electrode 12 of each second semiconductor element 10B and the first conductive portion 2A. The second conductive member 6 forms a path for a main circuit current switched by the multiple second semiconductor elements 10B. As shown in FIGS. 8 and 10 , the second conductive member 6 includes a main portion 61, multiple first connection ends 62, and multiple second connection ends 63.

[0086] The main portion 61 is located between the plurality of second semiconductor elements 10B and the first conductive portion 2A in the x direction and is a strip-shaped portion extending in the y direction in a plan view. As shown in FIG. 17 and other figures, the main portion 61 is located in the z1 direction relative to the second wiring portion 52 (second strip portion 522) of the first conductive member 5 and is closer to the main surface 201 (conductive substrate 2) than the second strip portion 522. The main portion 61 overlaps the plurality of second strip portions 522 in a plan view. In this embodiment, as shown in FIGS. 8 , 10 , 14 , and other figures, the main portion 61 has a plurality of openings 611 formed therein. Each of the plurality of openings 611 is, for example, a through hole penetrating in the z direction. The plurality of openings 611 are arranged at intervals in the y2 direction. In a plan view, the openings 611 do not overlap the second strip portions 522. The plurality of openings 611 are formed to facilitate the flow of the resin material between the upper side (z2 direction side) and the lower side (z1 direction side) near the main portion 61 (second conductive member 6) when injecting the fluid resin material to form the sealing resin 8. The shape of the main portion 61 (second conductive member 6) is not limited to this configuration, and for example, the openings 611 may not be formed.

[0087] The multiple first connection ends 62 and the multiple second connection ends 63 are each connected to the main portion 61 and are arranged corresponding to the multiple second semiconductor elements 10B. As shown in FIGS. 14 and 19 , each first connection end 62 is bonded to the corresponding second principal surface electrode 12 of one of the second semiconductor elements 10B, and each second connection end 63 is bonded to the first conductive portion 2A via a conductive bonding material 69. The material of the conductive bonding material 69 is not particularly limited and may be, for example, solder, a metal paste material, or a sintered metal. In this embodiment, an opening 621 is formed in each first connection end 62. The opening 621 is preferably formed so as to overlap the center of the second semiconductor element 10B in a plan view. The opening 621 is, for example, a through-hole penetrating in the z-direction. The opening 621 is used, for example, when positioning the second conductive member 6 relative to the conductive substrate 2.

[0088] The sealing resin 8 covers the plurality of first semiconductor elements 10A, the plurality of second semiconductor elements 10B, the conductive substrate 2, the support substrate 3 (excluding the bottom surface 302), the first terminal 41, the second terminal 42, a portion of each of the plurality of third terminals 43 and the fourth terminal 44, a portion of each of the plurality of control terminals 45, the control terminal support 48, the first conductive member 5, the second conductive member 6, and the plurality of wires 71 to 74. The sealing resin 8 is made of, for example, black epoxy resin. The sealing resin 8 is formed, for example, by molding. The sealing resin 8 has, for example, a dimension in the x direction of approximately 35 mm to 60 mm, a dimension in the y direction of approximately 35 mm to 50 mm, and a dimension in the z direction of approximately 4 mm to 15 mm. These dimensions are the sizes of the largest portions along each direction. The sealing resin 8 has a resin main surface 81, a resin back surface 82, and a plurality of resin side surfaces 831 to 834.

[0089] As shown in Figures 11, 13, and 18, the resin main surface 81 and the resin back surface 82 are spaced apart in the z direction. The resin main surface 81 faces the z2 direction, and the resin back surface 82 faces the z1 direction. A plurality of control terminals 45 (a plurality of first control terminals 46A to 46E and a plurality of second control terminals 47A to 47E) protrude from the resin main surface 81. As shown in Figure 12, the resin back surface 82 has a frame shape surrounding the bottom surface 302 (the lower surface of the second metal layer 33) of the support substrate 3 in a plan view. The bottom surface 302 of the support substrate 3 is exposed from the resin back surface 82 and is, for example, flush with the resin back surface 82. The plurality of resin side surfaces 831 to 834 are each connected to both the resin main surface 81 and the resin back surface 82 and are sandwiched between them in the z direction. As shown in Figure 4, the resin side surface 831 and the resin side surface 832 are spaced apart in the x direction. Resin side surface 831 faces the x1 direction, and resin side surface 832 faces the x2 direction. Two third terminals 43 protrude from resin side surface 831, and first terminal 41, second terminal 42, and fourth terminal 44 protrude from resin side surface 832. As shown in FIG. 4 and other figures, resin side surface 833 and resin side surface 834 are spaced apart in the y direction. Resin side surface 833 faces the y1 direction, and resin side surface 834 faces the y2 direction.

[0090] As shown in FIG. 4 , a plurality of recesses 832 a are formed on the resin side surface 832. Each recess 832 a is a portion recessed in the x-direction in plan view. The plurality of recesses 832 a include one formed between the first terminal 41 and the fourth terminal 44 and one formed between the second terminal 42 and the fourth terminal 44 in plan view. The plurality of recesses 832 a are provided to increase the creepage distance along the resin side surface 832 between the first terminal 41 and the fourth terminal 44 and the creepage distance along the resin side surface 832 between the second terminal 42 and the fourth terminal 44.

[0091] As shown in FIGS. 13 and 14 , the sealing resin 8 has a plurality of first protrusions 851 , a plurality of second protrusions 852 , and a resin gap 86 .

[0092] Each of the multiple first protrusions 851 protrudes in the z direction from the resin main surface 81. The multiple first protrusions 851 are arranged near the four corners of the sealing resin 8 in a plan view. A first protrusion end surface 851a is formed at the tip (end in the z2 direction) of each of the first protrusions 851. Each of the multiple first protrusions 851 has a bottomed, hollow truncated cone shape, for example. The multiple first protrusions 851 are used as spacers when the semiconductor device A1 is mounted on a control circuit board or other device that uses power generated by the semiconductor device A1. Each of the multiple first protrusions 851 has a recess 851b and an inner wall surface 851c formed in the recess 851b. The shape of each of the first protrusions 851 may be columnar, and is preferably cylindrical. The shape of the recess 851b is preferably cylindrical, and the inner wall surface 851c is preferably a single perfect circle in plan view.

[0093] The semiconductor device A1 may be mechanically fixed to a control circuit board or the like by a method such as screwing. In this case, a female screw thread may be formed on the inner wall surfaces 851c of the recesses 851b of the first protrusions 851. Insert nuts may be embedded in the recesses 851b of the first protrusions 851.

[0094] As shown in FIG. 14 and other figures, the multiple second protrusions 852 protrude in the z direction from the resin main surface 81. The multiple second protrusions 852 overlap the multiple control terminals 45 in a plan view. Each metal pin 452 of the multiple control terminals 45 protrudes from the corresponding second protrusion 852. Each second protrusion 852 has a truncated cone shape. In each control terminal 45, the second protrusion 852 covers the holder 451 and a portion of the metal pin 452.

[0095] 13 and 20 , the resin void portion 86 extends in the z direction from the resin main surface 81 to the main surface 201 of the conductive substrate 2. The resin void portion 86 is formed in a tapered shape such that the cross-sectional area decreases from the resin main surface 81 toward the main surface 201 in the z direction. The resin void portion 86 is formed during molding of the sealing resin 8, and is a portion where the sealing resin 8 is not formed during molding.

[0096] Although not shown in the drawings, resin void 86 is formed when, for example, during molding of sealing resin 8, a fluid resin material is not filled due to the presence of a pressing member. The pressing member applies a pressing force to main surface 201 of conductive substrate 2 during molding, and is inserted through first opening 514c, opening 515a, second opening 534c, and opening 535a of first conductive member 5. This allows conductive substrate 2 to be pressed by the pressing member without interfering with first conductive member 5, and warping of support substrate 3 to which conductive substrate 2 is bonded can be suppressed.

[0097] 13 and 20 , the semiconductor device A1 includes a resin filling portion 88. The resin filling portion 88 is filled into the resin void portion 86 so as to fill the resin void portion 86. The resin filling portion 88 is made of, for example, an epoxy resin like the sealing resin 8, but may be made of a different material from the sealing resin 8.

[0098] Next, the operation of this embodiment will be described.

[0099] The semiconductor device A1 includes a plurality of first semiconductor elements 10A, a conductive substrate 2, a first terminal 41, and a first conductive member 5. The first conductive member 5 forms a path for a main circuit current switched by the plurality of first semiconductor elements 10A and is connected to the plurality of first semiconductor elements 10A and the first terminal 41. The first conductive member 5 includes a first wiring portion 51 and a second wiring portion 52. The first wiring portion 51 has a first end portion 511 connected to the first terminal 41 and a second end portion 512 spaced apart from the first end portion 511 in the x-direction. The second wiring portion 52 (second strip portion 522) is connected to the first wiring portion 51 between the first end portion 511 and the second end portion 512. The first wiring portion 51 has a first portion 514 and a second portion 515. The first portion 514 is located between the first connecting portion 513, which is the connecting portion of the second wiring portion 52 (second strip portion 522), and the first end portion 511, and the second portion 515 is located between the first connecting portion 513 and the second end portion 512.

[0100] The main circuit current flowing through the first conductive member 5 flows from the multiple first semiconductor elements 10A toward the first terminal 41. In the present embodiment, the main circuit current in the first conductive member 5 is distributed to the second portion 515 of the first wiring portion 51 and the second wiring portion 52 (first strip portion 521). The current flowing through the second portion 515 and the current flowing through the second wiring portion 52 (first strip portion 521) join together at the first coupling portion 513, and the joined current flows through the first portion 514 toward the first terminal 41. The size of the first portion 514 in a direction perpendicular to the flow direction of the main circuit current (first dimension L1) is larger than the size of the second portion 515 in a direction perpendicular to the flow direction of the main circuit current (second dimension L2). With this configuration, the cross-sectional area of ​​the first portion 514 through which the current flows after merging is larger than the cross-sectional area of ​​the second portion 515 through which the current flows before merging, and an increase in current density can be suppressed in the first portion 514 after merging. This suppresses self-heating in the first portion 514 after merging, even when a large current flows through the semiconductor device A1 (plurality of first semiconductor elements 10A). Therefore, the semiconductor device A1 has a structure that is preferable for passing a large current.

[0101] The second wiring portion 52 includes a first strip portion 521 extending in the y direction from the first connecting portion 513. The first conductive member 5 includes a third wiring portion 53 located in the y1 direction relative to the first strip portion 521. A second terminal 42 is disposed in the x2 direction relative to the conductive substrate 2. The third wiring portion 53 has a third end portion 531 connected to the second terminal 42 and a fourth end portion 532 spaced apart from the third end portion 531 in the x direction. The second strip portion 522 is connected to the third wiring portion 53 between the third end portion 531 and the fourth end portion 532. The third wiring portion 53 includes a third portion 534 and a fourth portion 535. The third portion 534 is located between the second connecting portion 533, which is a connecting portion of the second strip portion 522, and the third end portion 531, and the fourth portion 535 is located between the second connecting portion 533 and the fourth end portion 532. The main circuit current in the first conductive member 5 flows separately among the second portion 515 of the first wiring portion 51, the fourth portion 535 of the third wiring portion 53, and the second wiring portion 52 (first strip portion 521). The current flowing through the fourth portion 535 and the current flowing through the second wiring portion 52 (first strip portion 521) join at the second connecting portion 533, and the joined current flows through the third portion 534 toward the second terminal 42. The size of the third portion 534 in a direction perpendicular to the flow direction of the main circuit current (third dimension L3) is larger than the size of the fourth portion 535 in a direction perpendicular to the flow direction of the main circuit current (fourth dimension L4). With this configuration, the cross-sectional area of ​​the third portion 534 through which the joined current flows is larger than the cross-sectional area of ​​the fourth portion 535 through which the unjoined current flows, thereby suppressing an increase in current density in the third portion 534 after the joining. As a result, even when a large current flows through the semiconductor device A1 (the plurality of first semiconductor elements 10A), the number of dispersed current paths is increased, and self-heating is suppressed in both the first portion 514 and the third portion 534 after the currents join together. Therefore, the semiconductor device A1 has a more preferable structure for passing a large current through it.

[0102] The first portion 514 of the first wiring portion 51 has a first main portion 514A and a first extending portion 514B. The first main portion 514A is parallel to the main surface 201 and overlaps with the second portion 515 when viewed in the x direction. The first extending portion 514B is connected to the first main portion 514A in the y2 direction. The third portion 534 of the third wiring portion 53 has a second main portion 534A and a second extending portion 534B. The second main portion 534A is parallel to the main surface 201 and overlaps with the fourth portion 535 when viewed in the x direction. The second extending portion 534B is connected to the second main portion 534A in the y1 direction. This configuration prevents the first portion 514 (first wiring portion 51) and the third portion 534 (third wiring portion 53) from being too far from the main surface 201 (conductive substrate 2). This contributes to miniaturization of the semiconductor device A1.

[0103] The first portion 514 of the first wiring portion 51 and the third portion 534 of the third wiring portion 53 overlap with the first strip portion 521 of the second wiring portion 52 when viewed in the y direction. This configuration makes it possible to appropriately increase the cross-sectional areas of both the current confluence portion near the first connecting portion 513 in the first wiring portion 51 and the current confluence portion near the second connecting portion 533 in the third wiring portion 53. This effectively suppresses increases in current density in both the first portion 514 and the third portion 534 after the currents confluence. A semiconductor device A1 configured in this manner is preferable for passing large currents.

[0104] The first extending portion 514B bends from the first main portion 514A and extends in the z1 direction. The second extending portion 534B bends from the second main portion 534A and extends in the z1 direction. With this configuration, even if the cross-sectional areas of the first portion 514 and the third portion 534 are increased by providing the first extending portion 514B and the second extending portion 534B, it is possible to prevent the dimensions of the first conductive member 5 in the z direction and the y direction from increasing. A semiconductor device A1 configured in this manner can be made smaller and has a preferable structure for passing a large current.

[0105] The first main portion 514A and the second main portion 534A overlap with the second conductive portion 2B (conductive substrate 2) in a plan view. The first extending portion 514B and the second extending portion 534B do not overlap with the second conductive portion 2B (conductive substrate 2) in a plan view, but overlap with the second conductive portion 2B (conductive substrate 2) when viewed in the y direction. With this configuration, it is possible to further increase the cross-sectional areas of the first portion 514 (first main portion 514A and first extending portion 514B) and the third portion 534 (second main portion 534A and second extending portion 534B) while miniaturizing the semiconductor device A1.

[0106] Fig. 21 shows a semiconductor device according to a first modification of the first embodiment. Fig. 21 is a plan view similar to Fig. 8 shown in the above embodiment. In Fig. 21 and subsequent figures, elements that are the same as or similar to those in the semiconductor device A1 of the above embodiment are given the same reference numerals as in the above embodiment, and descriptions thereof will be omitted as appropriate.

[0107] In the semiconductor device A2 of this modified example, the configuration of the first conductive member 5 differs from that of the above embodiment, mainly in the configurations of the first portion 514 (first wiring portion 51) and the third portion 534 (third wiring portion 53). The first portion 514 does not have the bent first extending portion 514B, and the third portion 534 does not have the second extending portion 534B. Furthermore, the first wiring portion 51 and the third wiring portion 53 do not have the first opening 514c, the opening 515a, the second opening 534c, and the opening 535a. The multiple control terminals 45 are omitted.

[0108] In the semiconductor device A2, the main circuit current flowing through the first conductive member 5 flows from the multiple first semiconductor elements 10A toward the first terminal 41. The main circuit current in the first conductive member 5 is distributed to the second portion 515 of the first wiring portion 51 and the second wiring portion 52 (first strip portion 521). The current flowing through the second portion 515 and the current flowing through the second wiring portion 52 (first strip portion 521) join together at the first coupling portion 513, and the joined current flows through the first portion 514 toward the first terminal 41. The size of the first portion 514 in a direction perpendicular to the flow direction of the main circuit current (first dimension L1) is larger than the size of the second portion 515 in a direction perpendicular to the flow direction of the main circuit current (second dimension L2). With this configuration, the cross-sectional area of ​​the first portion 514 through which the current flows after merging is larger than the cross-sectional area of ​​the second portion 515 through which the current flows before merging, and an increase in current density can be suppressed in the first portion 514 after merging. As a result, even when a large current flows through the semiconductor device A2 (plurality of first semiconductor elements 10A), self-heating in the first portion 514 after merging is suppressed. Therefore, the semiconductor device A2 has a preferable structure for passing a large current. In addition, within the same range of configuration as the semiconductor device A1 of the above embodiment, the same effects as those of the above embodiment can be achieved.

[0109] Fig. 22 shows a semiconductor device according to a second modification of the first embodiment, and is a plan view similar to Fig. 8 shown in the above embodiment.

[0110] In the semiconductor device A3 of this modification, the configuration of the first conductive member 5 is significantly different from that of the above embodiment, and various changes have been made accordingly. Unlike the above embodiment, the first conductive member 5 of this modification does not have the third wiring portion 53. Furthermore, the semiconductor device A3 does not have the second terminal 42 of the above embodiment, but instead has three first semiconductor elements 10A and three second semiconductor elements 10B. The first wiring portion 51 does not have the first opening 514c or the opening 515a. The multiple control terminals 45 are omitted.

[0111] In the semiconductor device A3, the main circuit current flowing through the first conductive member 5 flows from the multiple first semiconductor elements 10A toward the first terminal 41. The main circuit current in the first conductive member 5 is distributed to the second portion 515 of the first wiring portion 51 and the second wiring portion 52 (first strip portion 521). The current flowing through the second portion 515 and the current flowing through the second wiring portion 52 (first strip portion 521) join together at the first connecting portion 513, and the joined current flows through the first portion 514 toward the first terminal 41. The size of the first portion 514 in a direction perpendicular to the flow direction of the main circuit current (first dimension L1) is larger than the size of the second portion 515 in a direction perpendicular to the flow direction of the main circuit current (second dimension L2). With this configuration, the cross-sectional area of ​​the first portion 514 through which the current flows after merging is larger than the cross-sectional area of ​​the second portion 515 through which the current flows before merging, and an increase in current density can be suppressed in the first portion 514 after merging. As a result, even when a large current flows through the semiconductor device A3 (plurality of first semiconductor elements 10A), self-heating in the first portion 514 after merging is suppressed. Therefore, the semiconductor device A3 has a preferable structure for passing a large current. In addition, within the same range of configuration as the semiconductor device A1 of the above embodiment, the same effects as those of the above embodiment can be achieved.

[0112] Fig. 23 shows a semiconductor device according to a third modification of the first embodiment, and is a plan view similar to Fig. 5 shown in the above embodiment.

[0113] In the semiconductor device A4 of this modified example, the number of third terminals 43 is one. The third terminal 43 is connected to the central portion in the y direction of the first conductive portion 2A. The dimension in the y direction of the third terminal 43 in this modified example may be approximately the same as the dimension in the y direction of each third terminal 43 in the semiconductor device A1 of the above embodiment, or may be larger than the dimension in the y direction of each third terminal 43. The configuration of the semiconductor device A4 is the same as that of the semiconductor device A1 except for the third terminal 43.

[0114] In the semiconductor device A4, the main circuit current flowing through the first conductive member 5 flows from the multiple first semiconductor elements 10A toward the first terminal 41. The main circuit current in the first conductive member 5 is distributed to the second portion 515 of the first wiring portion 51 and the second wiring portion 52 (first strip portion 521). The current flowing through the second portion 515 and the current flowing through the second wiring portion 52 (first strip portion 521) join together at the first connecting portion 513, and the joined current flows through the first portion 514 toward the first terminal 41. The size of the first portion 514 in a direction perpendicular to the flow direction of the main circuit current (first dimension L1) is larger than the size of the second portion 515 in a direction perpendicular to the flow direction of the main circuit current (second dimension L2). With this configuration, the cross-sectional area of ​​the first portion 514 through which the current flows after merging is larger than the cross-sectional area of ​​the second portion 515 through which the current flows before merging, and an increase in current density can be suppressed in the first portion 514 after merging. As a result, even when a large current flows through the semiconductor device A4 (plurality of first semiconductor elements 10A), self-heating in the first portion 514 after merging is suppressed. Therefore, the semiconductor device A4 has a structure that is preferable for passing a large current. In addition, the semiconductor device A4 exhibits the same effects as the semiconductor device A1 of the above embodiment.

[0115] The semiconductor device according to the present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the semiconductor device according to the present disclosure can be freely modified in various ways.

[0116] The present disclosure includes the embodiments described in the appendix below.

[0117] Supplementary Note 1. A semiconductor device comprising: a conductive substrate having a main surface facing one side in a thickness direction and a back surface facing the opposite side to the main surface; a plurality of first semiconductor elements electrically connected to the main surface and having a switching function; a first terminal arranged on one side of the conductive substrate in a first direction perpendicular to the thickness direction; and a first conductive member configuring a path of a main circuit current switched by the plurality of first semiconductor elements and connected to the plurality of first semiconductor elements and the first terminal, wherein the first conductive member includes a first wiring portion and a second wiring portion, the first wiring portion having a first end connected to the first terminal and a second end spaced apart from the first end in the first direction, the second wiring portion being connected to the first wiring portion between the first end and the second end, and the first wiring portion having a first portion located between a first connecting portion which is a connecting portion of the second wiring portion to the first wiring portion and the first end, and a second portion located between the first connecting portion and the second end, a first dimension of the first portion in a direction perpendicular to the flow direction of the main circuit current, the first dimension being greater than a second dimension of the second portion in a direction perpendicular to the flow direction of the main circuit current.Supplementary Note 2. The semiconductor device according to Supplementary Note 1, wherein the first conductive member is made of a metal plate, the first wiring portion extends in the first direction, and the second wiring portion includes a first strip portion extending from the first connecting portion in the second direction perpendicular to both the thickness direction and the first direction.Supplementary Note 3. The semiconductor device further includes a second terminal, wherein the first wiring portion is located on one side of the first band-shaped portion in the second direction, the first conductive member is located on the other side of the first band-shaped portion in the second direction and includes a third wiring portion extending in the first direction, the second terminal is disposed on one side of the conductive substrate in the first direction and is connected to the third wiring portion, the third wiring portion has a third end connected to the second terminal and a fourth end spaced apart from the third end in the first direction from the third end, the first band-shaped portion is connected to the third wiring portion between the third end and the fourth end, and the third wiring portion has a third portion located between a second connecting portion which is a connecting portion of the first band-shaped portion to the third wiring portion and the third end, and a fourth portion located between the second connecting portion and the fourth end, The semiconductor device according to Supplementary Note 2, wherein a third dimension, which is the size of the third portion in a direction perpendicular to the flow direction of the main circuit current, is greater than a fourth dimension, which is the size of the fourth portion in a direction perpendicular to the flow direction of the main circuit current.Supplementary Note 4. The semiconductor device according to Supplementary Note 3, wherein the second wiring portion includes at least one second band portion connected to the first band portion and extending from the first band portion to the other side in the first direction.Supplementary Note 5. The semiconductor device according to Supplementary Note 4, wherein the first portion has a first main portion located on one side of the main surface in the thickness direction and a first extending portion connected to one side of the first main portion in the second direction, the first main portion being parallel to the main surface and overlapping with the second portion when viewed in the first direction, the third portion has a second main portion located on one side of the main surface in the thickness direction and a second extending portion connected to the other side of the second main portion in the second direction, and the second main portion being parallel to the main surface and overlapping with the fourth portion when viewed in the first direction.Supplementary Note 6. The semiconductor device according to Supplementary Note 5, wherein the first portion and the third portion overlap with the first strip portion when viewed in the second direction.Supplementary Note 7. The semiconductor device according to Supplementary Note 5 or 6, wherein the first extending portion bends from the first main portion and extends to the other side in the thickness direction, and the second extending portion bends from the second main portion and extends to the other side in the thickness direction.Appendix 8. The semiconductor device according to Appendix 7, wherein the first main portion and the second main portion overlap the conductive substrate when viewed in the thickness direction, and the first extending portion and the second extending portion do not overlap the conductive substrate when viewed in the thickness direction. Appendix 9. The semiconductor device according to Appendix 8, wherein the first extending portion and the second extending portion overlap the conductive substrate when viewed in the second direction. Appendix 10. Appendix 11. The semiconductor device according to Appendix 8 or 9, further comprising: a support substrate having a support surface facing one side in the thickness direction and to which the conductive substrate is joined so that the back surface faces the support surface; and a sealing resin having a resin main surface facing the same side as the main surface and a resin back surface facing the opposite side to the resin main surface, and covering at least a part of the support substrate, at least a part of the conductive substrate, the plurality of first semiconductor elements, and the first conductive members, wherein the first main portion has a first opening located on the other side in the second direction with respect to the first extending portion when viewed in the thickness direction, and the second main portion has a second opening located on one side in the second direction with respect to the second extending portion when viewed in the thickness direction. the first opening is an arc-shaped notch recessed from the other end of the first main portion in the second direction to one side in the second direction, the first extending portion extends in an arc shape from one side in the second direction with respect to the first main portion, the second opening is an arc-shaped notch recessed from the one end of the second main portion in the second direction to the other side in the second direction, and the second extending portion extends in an arc shape from the other side in the second direction with respect to the second main portion. Supplementary Note 12. The semiconductor device according to any of Supplementary Notes 4 to 11, wherein the plurality of first semiconductor elements are arranged at intervals in the second direction, the first conductive member includes a fourth wiring portion connected to both the second end and the fourth end and extending in the second direction, the fourth wiring portion being connected to the plurality of first semiconductor elements, and the other end in the first direction of the second strip-shaped portion is connected to the fourth wiring portion.Supplementary Note 13. The semiconductor device according to Supplementary Note 12, wherein the conductive substrate includes a first conductive portion and a second conductive portion arranged spaced apart from each other on one side and the other side in the first direction, the plurality of first semiconductor elements being electrically connected to the first conductive portion, and comprising: a third terminal connected to the first conductive portion; a plurality of second semiconductor elements electrically connected to the second conductive portion and having a switching function; a second conductive member connected to the plurality of second semiconductor elements and the first conductive portion and made of a metal plate; and a fourth terminal connected to the second conductive portion. Supplementary Note 14. The semiconductor device according to Supplementary Note 13, wherein the second conductive member overlaps the second strip portion when viewed in the thickness direction. Supplementary Note 15. The semiconductor device according to Supplementary Note 14, wherein the plurality of second semiconductor elements are arranged at intervals in the second direction, and the plurality of first semiconductor elements and the plurality of second semiconductor elements overlap each other when viewed in the first direction.

[0118] A1, A2, A3, A4: semiconductor device 10A: first semiconductor element 10B: second semiconductor element 101: element main surface 102: element back surface 11: first main surface electrode 12: second main surface electrode 13: third main surface electrode 15: back surface electrode 17: thermistor 19: conductive bonding material 2: conductive substrate 2A: first conductive portion 2B: second conductive portion 201: main surface 202: back surface 29: conductive bonding material 3: support substrate 301: support surface 302: bottom surface 31: insulating layer 32: first metal layer 32A: first portion 32B: second portion 321: first bonding layer 33: second metal layer 41: first terminal 42: second terminal 43: third terminal 44: fourth terminal 45: control terminal 451: holder 452: Metal pin 459: Conductive bonding material 46A, 46B, 46C, 46D, 46E: First control terminal 47A, 47B, 47C, 47D, 47E: Second control terminal 48: Control terminal support 481: Insulating layer 482: First metal layer 482A: First portion 482B: Second portion 482C: Third portion 482D: Fourth portion 482E: Fifth portion 482F: Sixth portion 483: Second metal layer 49: Bonding material 5: First conductive member 51: First wiring portion 511: First end portion 512: Second end portion 513: First connecting portion 514: First portion 514A: First main portion 514B: First extending portion 514c: First opening 515: Second portion 515a: Opening 52: Second wiring portion 521: First strip-shaped portion 522: Second strip-shaped portion 53: Third wiring portion 531: Third end portion 532: Fourth end portion 533: Second connecting portion 534: Third portion 534A: Second main portion 534B: Second extending portion 534c: Second opening 535: Fourth portion 535a: Opening 54: Fourth wiring portion 541: Recessed region 541a: Slit 59: Conductive bonding material 6: Second conducting member 61: Main portion 611: Opening 62: First connecting end portion 621: Opening 6 63: Second connecting end portion 69: Conductive bonding material 71, 72, 73, 74: Wire 8: Sealing resin 81: Resin main surface 82: Resin back surface 831, 832: Resin side surface 832a: recess 833,834: Resin side surface 851: First protruding portion 851a: First protruding end surface 851b: Recessed portion 851c: Inner wall surface 852: Second protruding portion 86: Resin void portion 88: Resin filling portion L1: First dimension L2: Second dimension L3: Third dimension L4: Fourth dimension

Claims

1. A conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side of the main surface; A plurality of first semiconductor elements electrically joined to the main surface and having a switching function; A first terminal disposed on one side in a first direction orthogonal to the thickness direction with respect to the conductive substrate; A first conduction member that constitutes a path of a main circuit current switched by the plurality of first semiconductor elements and is connected to the plurality of first semiconductor elements and the first terminal; The first conduction member includes a first wiring portion and a second wiring portion; The first wiring portion has a first end connected to the first terminal and a second end separated from the first end in the first direction; The second wiring portion is connected to the first wiring portion between the first end and the second end; The first wiring portion has a first part located between a first connection part, which is a connection site of the second wiring portion to the first wiring portion, and the first end, and a second part located between the first connection part and the second end; A semiconductor device, wherein a first dimension, which is a dimension in a direction orthogonal to a flowing direction of the main circuit current in the first part, is larger than a second dimension, which is a dimension in a direction orthogonal to the flowing direction of the main circuit current in the second part.

2. The first conduction member is formed of a metal plate material; The first wiring portion extends in the first direction; The semiconductor device according to claim 1, wherein the second wiring portion includes a first strip portion extending from the first connection part in a second direction orthogonal to both the thickness direction and the first direction.

3. Further comprising a second terminal; The first wiring portion is located on one side in the second direction with respect to the first strip portion; The first conduction member is located on the other side in the second direction with respect to the first strip portion and includes a third wiring portion extending in the first direction; The second terminal is disposed on one side in the first direction with respect to the conductive substrate and is connected to the third wiring portion; The third wiring portion has a third end connected to the second terminal and a fourth end separated from the third end in the first direction; The first strip portion is connected to the third wiring portion between the third end and the fourth end; The third wiring portion has a third part located between a second connection part, which is a connection site of the first strip portion to the third wiring portion, and the third end, and a fourth part located between the second connection part and the fourth end. The semiconductor device according to claim 2, wherein a third dimension, which is a magnitude in a direction orthogonal to the flowing direction of the main circuit current in the third part, is larger than a fourth dimension, which is a magnitude in a direction orthogonal to the flowing direction of the main circuit current in the fourth part.

4. The semiconductor device according to claim 3, wherein the second wiring part is connected to the first strip-shaped part and includes at least one second strip-shaped part extending from the first strip-shaped part to the other side in the first direction.

5. The first part has a first main part located on one side in the thickness direction with respect to the main surface, and a first extending part connected to one side of the first main part in the second direction. The first main part is parallel to the main surface and overlaps with the second part when viewed in the first direction. The third part has a second main part located on one side in the thickness direction with respect to the main surface, and a second extending part connected to the other side of the second main part in the second direction. The semiconductor device according to claim 4, wherein the second main part is parallel to the main surface and overlaps with the fourth part when viewed in the first direction.

6. The semiconductor device according to claim 5, wherein the first part and the third part overlap with the first strip-shaped part when viewed in the second direction.

7. The first extending part extends from the first main part by bending and extends to the other side in the thickness direction. The semiconductor device according to claim 5, wherein the second extending part extends from the second main part by bending and extends to the other side in the thickness direction.

8. The first main part and the second main part overlap with the conductive substrate when viewed in the thickness direction. The semiconductor device according to claim 7, wherein the first extending part and the second extending part do not overlap with the conductive substrate when viewed in the thickness direction.

9. The semiconductor device according to claim 8, wherein the first extending part and the second extending part overlap with the conductive substrate when viewed in the second direction.

10. A support substrate having a support surface facing one side in the thickness direction, and the conductive substrate is bonded so that the back surface faces the support surface. A sealing resin having a resin main surface facing the same side as the main surface and a resin back surface facing the opposite side of the resin main surface, and covering at least a part of the support substrate, at least a part of the conductive substrate, the plurality of first semiconductor elements, and the first conduction member. The first main part has a first opening located on the other side in the second direction with respect to the first extending part when viewed in the thickness direction. The semiconductor device according to claim 8 or 9, wherein the second main part has a second opening located on one side in the second direction with respect to the second extending part when viewed in the thickness direction.

11. The first opening is an arc-shaped notch that is recessed from the other end in the second direction to one side in the second direction in the first main part, The first extending part protrudes arcuately from one side in the second direction with respect to the first main part, The second opening is an arc-shaped notch that is recessed from one end in the second direction to the other side in the second direction in the second main part, The semiconductor device according to claim 10, wherein the second extending part protrudes arcuately from the other side in the second direction with respect to the second main part.

12. The plurality of first semiconductor elements are arranged at intervals in the second direction, The first conductive member is connected to both the second end and the fourth end and includes a fourth wiring part extending in the second direction, The fourth wiring part is connected to the plurality of first semiconductor elements, The semiconductor device according to any one of claims 4 to 9, wherein the other end in the first direction of the second strip-shaped part is connected to the fourth wiring part.

13. The conductive substrate includes a first conductive part and a second conductive part that are spaced apart from each other on the other side and one side in the first direction, The plurality of first semiconductor elements are electrically joined to the first conductive part, A third terminal connected to the first conductive part, A plurality of second semiconductor elements that are electrically joined to the second conductive part and have a switching function, A second conductive member that is connected to the plurality of second semiconductor elements and the first conductive part and is formed of a metal plate material, The semiconductor device according to claim 12, further comprising a fourth terminal connected to the second conductive part.

14. The semiconductor device according to claim 13, wherein the second conductive member overlaps the second strip-shaped part when viewed in the thickness direction.

15. The plurality of second semiconductor elements are arranged at intervals in the second direction, The semiconductor device according to claim 14, wherein the plurality of first semiconductor elements and the plurality of second semiconductor elements overlap each other when viewed in the first direction.