Group iii nitride light-emitting device, group iii nitride epitaxial wafer, and method for producing group iii nitride light-emitting device

Abstract

[Solution] The group III nitride light-emitting device comprises: a template member containing a template layer that has compressive strain therewithin, coats a main surface of a support, and contains AlXGa1-XN (X is greater than 0 and less than or equal to 1) for which the full width at half maximum of the x-ray rocking curve of the (10-12) plane is not greater than 1,000 arcsec; an AlGaN-containing active layer that has compressive strain therewithin and emits light having a peak wavelength in the deep ultraviolet wavelength region of less than or equal to 285 nm; and an n-type group III nitride semiconductor region disposed on the template member. This group III nitride semiconductor region comprises a first n-type group III nitride semiconductor layer on the template layer and a second n-type group III nitride semiconductor layer on the first n-type group III nitride semiconductor layer. The first n-type group III nitride semiconductor layer has a lattice relaxation ratio based on the template layer of not more than 2%, and the second n-type group III nitride semiconductor layer has a surface roughness of not more than 0.4 nm.

Description

III-nitride light-emitting device, III-nitride epitaxial wafer, and method for fabricating III-nitride light-emitting device

[0001] The present invention relates to Group III nitride light emitting devices, Group III nitride epitaxial wafers, and methods of making Group III nitride light emitting devices.

[0002] US Pat. No. 6,299,499 discloses a template structure.

[0003] Patent Document 2 discloses a nitride semiconductor ultraviolet light emitting device. The nitride semiconductor ultraviolet light emitting device includes an n-type cladding layer made of an n-type AlGaN-based semiconductor layer, an active layer, a p-type cladding layer, and an n-type contact layer. The active layer has an AlGaN-based semiconductor layer with a band gap energy of 3.4 eV or more.

[0004] Patent Document 3 discloses a nitride semiconductor light-emitting device. The nitride semiconductor light-emitting device includes a semiconductor stack including an n-type stack, an active layer, and a p-type stack. An intermediate layer is provided on an n-contact layer. The n-type stack is made of AlxGa １－ｘ The device has an n-contact layer made of an N material (0.7≦x≦1.0) and an n-clad layer provided on the n-contact layer.

[0005] Patent Document 4 discloses a semiconductor light-emitting device. The semiconductor light-emitting device includes an n-type first cladding layer, an n-type second cladding layer, an active layer, and a p-type semiconductor layer. The n-type first cladding layer is made of an n-type AlGaN-based semiconductor provided on an aluminum nitride (AlN) layer. The n-type second cladding layer is provided on the n-type first cladding layer and is made of an n-type AlGaN-based semiconductor having a lower AlN mole fraction than the n-type first cladding layer and an AlN mole fraction of 50% or less.

[0006] Patent Document 5 discloses a semiconductor light-emitting device. The semiconductor light-emitting device includes an n-type cladding layer, a planarization layer, an active layer, and a p-type semiconductor layer. The n-type cladding layer is made of an n-type AlGaN-based semiconductor material with an AlN mole fraction of 20% or more. The planarization layer is made of an AlGaN-based semiconductor material provided on the n-type cladding layer.

[0007] JP 2017-55116 A JP 2012-89754 A JP 2010-161311 A JP 2018-156970 A JP 2019-33284 A

[0008] In the blue and longer wavelength regions, semiconductor light-emitting devices using Group III nitrides have active layers including GaN (gallium nitride) barrier layers and InGaN well layers, and are fabricated on a GaN template layer or a GaN substrate on a sapphire substrate, whereas in the ultraviolet wavelength region, semiconductor light-emitting devices have active layers including, for example, AlGaN barrier layers and AlGaN well layers, and are fabricated on an AlN (aluminum nitride) template layer or an AlN substrate on a sapphire substrate.

[0009] For example, when a blue semiconductor laser is considered from an electrical aspect, the n-type semiconductor is provided with low resistance due to silicon-doped GaN, while the p-type semiconductor is provided with higher electrical resistance than the n-type semiconductor due to the use of magnesium dopant and AlGaN.

[0010] Considering the electrical aspects of a semiconductor light-emitting device that emits light in the ultraviolet, e.g., deep ultraviolet, wavelength region, the p-type semiconductor is AlGaN with a higher Al composition than the AlGaN used in blue semiconductor lasers, and magnesium is added to it. Silicon can still be used as a dopant for the n-type semiconductor. However, due to the use of an AlN template layer in the n-type semiconductor layer, the base semiconductor is changed from GaN to AlGaN or AlN with a higher Al composition.

[0011] Comparing blue light-emitting devices and ultraviolet light-emitting devices from the perspective of n-type semiconductors, in blue light-emitting devices, particularly semiconductor lasers, the Al composition increases from the GaN semiconductor substrate toward the active layer to achieve carrier confinement, whereas in ultraviolet light-emitting devices, such as deep ultraviolet light-emitting diodes, the Al composition decreases from the AlN semiconductor substrate toward the active layer to achieve an Al composition that enables the emission wavelength of the active layer.

[0012] Thus, deep ultraviolet wavelength semiconductor light emitting devices are being developed in a different materials environment than longer wavelength blue light emitting devices.

[0013] Patent Document 1 discloses a high-quality template. The high-quality template of Patent Document 1 provides a primary surface with a large Al composition, for example, AlN. The emission intensity of Group III nitride light-emitting devices decreases in the deep ultraviolet wavelength region, particularly around 285 nm and in shorter wavelength regions. An active layer incorporating compressive strain has the potential to increase the emission intensity in the deep ultraviolet wavelength region. None of Patent Documents 2 to 5 discloses an active layer incorporating compressive strain.

[0014] Some aspects of the present invention aim to provide a III-nitride light-emitting device, a III-nitride epitaxial wafer, and a method for fabricating a III-nitride light-emitting device that includes an active layer containing compressive strain.

[0015] In order to achieve the above object, a group III nitride light emitting device according to a first aspect of the present invention comprises a support having a primary surface made of a material other than group III nitride, and an Al (10-12) plane having an X-ray rocking curve half width of 1000 arcsec or less. Ｘ Ga １－Ｘ the n-type Group III nitride semiconductor region includes a first n-type Group III nitride semiconductor layer provided between the template layer and the active layer, and a second n-type Group III nitride semiconductor layer provided between the first n-type Group III nitride semiconductor layer and the active layer, the first n-type Group III nitride semiconductor layer having a lattice relaxation rate of 2% or less with respect to the template layer, and the second n-type Group III nitride semiconductor layer having a surface roughness of 0.4 nm or less.

[0016] A Group III nitride epitaxial wafer according to a second aspect of the present invention comprises a substrate having a primary surface made of a material other than a Group III nitride, and an Al epitaxial wafer having an X-ray rocking curve half width of 1000 arcsec or less in the (10-12) plane. Ｘ Ga １－Ｘ the n-type Group III nitride semiconductor region includes a first n-type Group III nitride semiconductor layer provided between the template layer and the active layer, and a second n-type Group III nitride semiconductor layer provided between the first n-type Group III nitride semiconductor layer and the active layer, the first n-type Group III nitride semiconductor layer having a lattice relaxation rate of 2% or less with respect to the template layer, and the second n-type Group III nitride semiconductor layer having a surface roughness of 0.4 nm or less.

[0017] A method for fabricating a Group III nitride light-emitting device according to a third aspect of the present invention includes fabricating a Group III nitride light-emitting device by using a substrate having a primary surface made of a material other than a Group III nitride, and an Al (10-12) substrate having an X-ray rocking curve half-width of 1000 arcsec or less. Ｘ Ga １－Ｘand a template layer containing AlGaN (X is greater than 0 and less than or equal to 1) and covering the primary surface of the substrate; and growing, on the template layer, a Group III nitride stack including an n-type Group III nitride semiconductor region having a first n-type Group III nitride semiconductor layer containing an n-type dopant and a second n-type Group III nitride semiconductor layer containing an n-type dopant, and an active layer having a peak wavelength in the deep ultraviolet wavelength region of 285 nm or less and containing AlGaN, wherein the first n-type Group III nitride semiconductor layer is provided between the template layer and the active layer, and the second n-type Group III nitride semiconductor layer is provided between the first n-type Group III nitride semiconductor layer and the active layer, and Growing the nitride stack on the template layer includes growing the first n-type Group III nitride semiconductor layer and the second n-type Group III nitride semiconductor layer under at least any of the following conditions: a first condition that the growth temperature for growing the first n-type Group III nitride semiconductor layer is higher than the growth temperature for growing the second n-type Group III nitride semiconductor layer; a second condition that the growth rate for growing the first n-type Group III nitride semiconductor layer is slower than the growth rate for growing the second n-type Group III nitride semiconductor layer; and a third condition that the ammonia partial pressure for growing the first n-type Group III nitride semiconductor layer is higher than the ammonia partial pressure for growing the second n-type Group III nitride semiconductor layer.

[0018] According to a first aspect, a Group III nitride light-emitting device including an active layer containing compressive strain can be provided. According to a second aspect, a Group III nitride epitaxial wafer including a semiconductor region for an active layer containing compressive strain can be provided. According to a third aspect, a method for fabricating a Group III nitride light-emitting device can be provided that can provide an active layer containing compressive strain in a Group III nitride light-emitting device.

[0019] FIG. 1 is a diagram schematically illustrating a III-nitride light-emitting device (hereinafter referred to as "light-emitting device") according to an embodiment of the present invention. FIG. 2 is a diagram illustrating an example of a light-emitting device according to an embodiment of the present invention. FIG. 3 is a diagram schematically illustrating a III-nitride epitaxial wafer according to an embodiment of the present invention. FIG. 4A is a diagram illustrating major steps in a method for fabricating a light-emitting device according to an embodiment of the present invention. FIG. 4B is a diagram illustrating major steps in a method for fabricating a light-emitting device according to an embodiment of the present invention. FIG. 5A is a diagram illustrating major steps in a method for fabricating a light-emitting device according to an embodiment of the present invention. FIG. 5B is a diagram illustrating major steps in a method for fabricating a light-emitting device according to an embodiment of the present invention. FIG. 6A is a diagram illustrating major steps in a method for fabricating a light-emitting device according to an embodiment of the present invention. FIG. 6B is a diagram illustrating major steps in a method for fabricating a light-emitting device according to an embodiment of the present invention. FIG. 7A is a diagram illustrating major steps in a method for fabricating a light-emitting device according to an embodiment of the present invention. FIG. 7B is a diagram illustrating major steps in a method for fabricating a light-emitting device according to an embodiment of the present invention. FIG. 8A is a diagram schematically showing a layered structure of a nitride semiconductor substrate according to an embodiment. FIG. 8B is a diagram schematically showing a layered structure of a light-emitting diode according to an embodiment. FIG. 9 is a flowchart showing main steps in a method for fabricating a light-emitting device and a method for fabricating an epitaxial wafer according to the present embodiment. FIG. 10A is a diagram showing the surface morphology of the epitaxial surface using a differential interference microscope image. FIG. 10B is a diagram showing the surface morphology of the epitaxial surface using an atomic force microscope image. FIG. 10C is a diagram showing the surface morphology of the epitaxial surface using an atomic force microscope image. FIG. 10D is a diagram showing the surface morphology of the epitaxial surface using an atomic force microscope image. FIG. 10E is a diagram showing the surface morphology of the epitaxial surface using an atomic force microscope image. FIG. 10F is a diagram showing the surface morphology of the epitaxial surface using an atomic force microscope image. FIG. 10G is a diagram showing the surface morphology of the epitaxial surface using a differential interference microscope image. FIG. 10H is a diagram showing the surface morphology of the epitaxial surface as seen by a differential interference microscope.FIG. 10I is a drawing showing the surface morphology of the epitaxial surface as an image taken with a differential interference microscope. FIG. 11A is a drawing showing the surface morphology of the epitaxial surface photographed with a differential interference microscope. FIG. 11B is a drawing showing the surface morphology of the epitaxial surface photographed with a differential interference microscope. FIG. 11C is a drawing showing the surface morphology of the epitaxial surface photographed with a differential interference microscope. FIG. 11D is a drawing showing the surface morphology of the epitaxial surface photographed with a differential interference microscope. FIG. 11E is a drawing showing the surface morphology of the epitaxial surface photographed with a differential interference microscope. FIG. 12A is a drawing showing the surface morphology of the epitaxial surface photographed with an atomic force microscope. FIG. 12B is a drawing showing the surface morphology of the epitaxial surface photographed with an atomic force microscope. FIG. 12C is a drawing showing the surface morphology of the epitaxial surface photographed with an atomic force microscope. FIG. 13A is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 13B is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 13C is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 14A is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 14B is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 14C is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 15A is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 15B is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 15C is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. Figure 15D is a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of Figure 15A. Figure 15E is a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of Figure 15B. Figure 15F is a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of Figure 15C. Figure 15G is a diagram showing an epitaxial structure providing the atomic step-terrace structure in the atomic force microscope image of Figure 15A.FIG. 15H is a diagram showing the epitaxial structure providing the atomic step-terrace structure in the atomic force microscope image of FIG. 15B . FIG. 15I is a diagram showing the epitaxial structure providing the atomic step-terrace structure in the atomic force microscope image of FIG. 15C . FIG. 16A is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 16B is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 16C is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 17A is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 17B is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 17C is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 17D is a sketch of the surface morphology shown in FIG. 17A . FIG. 17E is a drawing showing a sketch of the surface morphology shown in FIG. 17B. FIG. 18A is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 18B is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 18C is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 18D is a drawing showing a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of FIG. 18A. FIG. 18E is a drawing showing a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of FIG. 18B. FIG. 18F is a drawing showing a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of FIG. 18C. FIG. 19A is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 19B is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. Figure 19C is a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of Figure 19A. Figure 19D is a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of Figure 19B. Figure 20A is a schematic sketch of the surface morphology of the epitaxial surface photographed by an atomic force microscope. Figure 20B is a schematic sketch of the surface morphology of the epitaxial surface photographed by an atomic force microscope.FIG. 20C is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 20D is a drawing showing a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of FIG. 20A. FIG. 20E is a drawing showing a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of FIG. 20B. FIG. 20F is a drawing showing a schematic sketch of the atomic step-terrace structure in the atomic force microscope image of FIG. 20C. FIG. 21A is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 21B is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 21C is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 21D is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. FIG. 21E is a drawing showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. Fig. 21F is a diagram showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. Fig. 22A is a diagram showing the peak energy distribution of cathodoluminescence (CL) on the surface of an electron injection layer having a two-layer structure according to an embodiment. Fig. 22B is a diagram showing the peak energy distribution of cathodoluminescence (CL) on the surface of an electron injection layer having a single-layer structure according to an embodiment. Fig. 23A is a diagram showing an X-ray diffraction (XRD) reciprocal space mapping (RSM) image. FIG. 23B is a diagram showing an X-ray diffraction (XRD) reciprocal space mapping (RSM) image. FIG. 24 is a diagram showing the results of analysis of a nitride semiconductor stack (two electron injection layers) according to an embodiment using a secondary ion mass spectrometry (SIMS) method. FIG. 25A is a diagram showing the relationship between the characteristics of a light-emitting diode according to an embodiment and the in-plane lattice constant of the electron injection layer. FIG. 25B is a diagram showing the relationship between the characteristics of a light-emitting diode according to an embodiment and the in-plane lattice constant of the electron injection layer.25C is a diagram showing the relationship between the characteristics of a light-emitting diode according to an embodiment and the in-plane lattice constant of the electron injection layer. FIG. 25D is a diagram showing the relationship between the characteristics of a light-emitting diode according to an embodiment and the in-plane lattice constant of the electron injection layer. FIG. 25E is a diagram showing the relationship between the characteristics of a light-emitting diode according to an embodiment and the in-plane lattice constant of the electron injection layer. FIG. 25F is a diagram showing the relationship between the characteristics of a light-emitting diode according to an embodiment and the in-plane lattice constant of the electron injection layer. FIG. 25G is a diagram showing the relationship between the characteristics of a light-emitting diode according to an embodiment and the in-plane lattice constant of the electron injection layer. FIG. 25H is a diagram showing the relationship between the characteristics of a light-emitting diode according to an embodiment and the in-plane lattice constant of the electron injection layer. FIG. 26A is a diagram showing the relationship between the Al composition of the active layer and the total polarization (the sum of spontaneous polarization and piezoelectric polarization). FIG. 26B is a diagram showing the relationship between the Al composition of the active layer and the total polarization (the sum of spontaneous polarization and piezoelectric polarization). Fig. 26C is a diagram showing the relationship between the Al composition of the active layer and the total polarization (the sum of spontaneous polarization and piezoelectric polarization). Fig. 27A is a diagram showing the emission spectra of the light-emitting diodes according to the reference example and the present example. Fig. 27B is a diagram showing the emission spectra of the light-emitting diodes according to the reference example and the present example.

[0020] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Identical and similar parts will be denoted by the same or similar reference numerals, and duplicated descriptions will be omitted.

[0021] A light-emitting device is a semiconductor element, such as a light-emitting diode, a semiconductor laser, or a light source excited by an electron beam, in which an active layer for emitting light comprises a Group III nitride, and the n-type semiconductor layer can comprise a Group III nitride, and further, if necessary, the p-type semiconductor layer can comprise a Group III nitride.

[0022] Fig. 1 is a diagram schematically illustrating a light-emitting device according to an embodiment of the present invention. Fig. 2 is a diagram illustrating an example of a light-emitting device according to an embodiment of the present invention. Fig. 1 is a cross-section taken along line II in Fig. 2. In the following description, light-emitting device 110 has a light-emitting diode structure.

[0023] 1 , a light-emitting device 110 includes a template member 112, an active layer 114, and an n-type Group III nitride semiconductor region (hereinafter referred to as "nitride semiconductor region") 116 that supplies carriers to the active layer 114. The template member 112 includes a support 118 and a template layer 120. The support 118 has a primary surface 118a made of a material other than Group III nitride. The template layer 120 is made of Al Ｘ Ga １－Ｘ N (X is greater than 0 and equal to or less than 1) and covers the main surface 118a of the support 118. Ｘ Ga １－Ｘ For example, the full width at half maximum of the X-ray rocking curve of the (10-12) plane of N can be 1000 arcsec or less, and contains compressive strain. This compressive strain is the source of strain applied to the active layer 114. The template layer 120 can be, for example, 2000 nm or less and 100 nm or more, e.g., 500 nm. The Al of the template layer 120 Ｘ Ga １－Ｘ N can be AlN (X=1), providing template layer 120 with AlN containing compressive strain.

[0024] By way of example and not limitation, the substrate 118 may be made of carbon, boron nitride (BN), aluminum oxide (sapphire), ceramic, silicon carbide, refractory metals, zirconia, tantalum carbide (TaC), ScAlMgO ４ For example, the support 118 may have a hexagonal crystal structure, and the major surface 118a of the support 118 may have an off-angle of 0.5 degrees or less with respect to the c-plane of the crystal structure, by way of example and not limitation.

[0025] The active layer 114 is provided on the template member 112 so as to generate light having a peak wavelength in the deep ultraviolet wavelength region of 285 nm or less, and includes AlGaN containing compressive strain.

[0026] The nitride semiconductor region 116 is provided between the template member 112 and the active layer 114 and contains Al as a group III constituent element. The nitride semiconductor region 116 may include a plurality of n-type group III nitride semiconductor layers, for example, a first n-type group III nitride semiconductor layer (hereinafter referred to as the "first n-type semiconductor layer") 122 and a second n-type group III nitride semiconductor layer (hereinafter referred to as the "second n-type semiconductor layer") 124. The first n-type semiconductor layer 122 is provided between the template layer 120 and the active layer 114, and the second n-type semiconductor layer 124 is provided between the first n-type semiconductor layer 122 and the active layer 114. The first n-type semiconductor layer 122 has a lattice relaxation rate of 2% or less with respect to the template layer 120. This lattice relaxation rate is measured using X-ray diffraction reciprocal space mapping (XRD-RSM) with an X'pert3 MRD (Malvern Panalytical, Malvern, UK) device. The second n-type semiconductor layer 124 has a surface roughness (RMS) of 0.4 nm or less. This surface roughness (RMS) is evaluated with atomic force microscopy (AFM) (device: MFP-3D Origin+ (Oxford Instruments, Abington, UK)).

[0027] According to the light-emitting device 110, the second n-type semiconductor layer 124 having a surface roughness of 0.4 nm or less is provided on the first n-type semiconductor layer 122. This small surface roughness can prevent lattice relaxation of the active layer 114 and can impart compressive strain to the active layer 114. In addition, the Al (10-12) plane X-ray rocking curve half-width of 1000 arcsec or less is Ｘ Ga １－Ｘ A first n-type semiconductor layer 122 having a lattice relaxation rate of 2% or less is provided on the N template layer 120. The low lattice relaxation rate allows Al Ｘ Ga １－Ｘ The compressive strain inherent in the N template layer 120 is propagated to the active layer 114 .

[0028] The active layer 114 may be configured to have an emission spectrum with a half-width of 10 nm or less. Specifically, by way of example and not limitation, the active layer 114 may be composed of a single layer of AlGaN, or may have a single or multiple quantum well structure 114a. The multiple quantum well structure 114a includes compressively strained well layers 114b and compressively strained barrier layers 114c. In this light-emitting device 110, the compressive strain in the well layers 114b and the compressive strain in the barrier layers 114c can enhance the emission of the active layer 114 due to the quantum-confined Stark effect.

[0029] When the second n-type semiconductor layer 124, which has a low surface roughness (RMS), contacts the active layer 114, compressive strain from the template layer 120 is effectively applied to the active layer 114. Specifically, the AlGaN well layer 114b of the active layer 114 can have a compressive strain of 1.5% or more. The compressive strain inherent in the template layer 120 is designed to be within a range that suppresses warping of the template substrate during high-temperature heat treatment. To suppress warping for epitaxial growth and obtain an emission wavelength of 285 nm or less, the Al composition of the well layer 114b is increased to 2% or less. This compressive strain is evaluated using X-ray diffraction reciprocal space mapping (XRD-RSM) and measured using an X'pert3 MRD (Malvern Panalytical, Malvern, UK).

[0030] When the active layer 114 is provided on a nitride semiconductor region with a low lattice relaxation rate that is in contact with the template layer 120, compressive strain is applied to the quantum well structure 114a. The compressive strain in the well layer 114b and the compressive strain in the barrier layer 114c reduce the polarization difference between the well layer 114b and the barrier layer 114c.

[0031] Specifically, the well layer 114b may include undoped AlGaN, and the barrier layer 114c may include undoped AlGaN. The AlGaN of the barrier layer 114c has a larger bandgap than the AlGaN of the well layer 114b. The barrier layer 114c may include AlN, if necessary.

[0032] The first n-type semiconductor layer 122 can be an AlGaN layer having an Al composition of 0.7 or more, and the second n-type semiconductor layer 124 can be an AlGaN layer having an Al composition of 0.7 or more. These Al composition ranges allow compressive strain to be imparted to the active layer 114.

[0033] By way of example and not limitation, the first n-type semiconductor layer 122 can include AlGaN or InAlGaN, and the second n-type semiconductor layer 124 can include AlGaN or InAlGaN. Specifically, the second n-type semiconductor layer 124 can have an Al composition variation of 0.1% or less. This reduction in composition variation is due to the influence of surface morphology on the Ga element incorporation efficiency. In other words, poor flatness leads to composition variation. Surface flatness, related to Al composition variation, also significantly affects the composition of the active layer grown thereon, which has a complex composition and film thickness combination. For example, when the Al composition variation is 0.16%, the composition variation of the active layer 114 is approximately twice as large as when the Al composition variation is 0.09%. Furthermore, the Al composition variation of the second n-type semiconductor layer 124 is smaller than the Al composition variation of the first n-type semiconductor layer 122.

[0034] For example, and not by way of limitation, the thickness of the first n-type semiconductor layer 122 may be greater than the thickness of the second n-type semiconductor layer 124. According to this light-emitting device 110, the relationship between the thicknesses allows the active layer 114 to be provided with compressive strain while avoiding lattice relaxation of the first n-type semiconductor layer 122 and the second n-type semiconductor layer 124 on the template layer 120, for example, avoiding lattice relaxation of an AlGaN layer. The thickness of the nitride semiconductor region 116 may be, for example, 200 to 3000 nm. The thickness of the second n-type semiconductor layer 124 may be 10 to 200 nm, and more preferably 50 to 150 nm.

[0035] Specifically, the film thickness of the first n-type semiconductor layer 122 is 2800 nm or less, and the film thickness of the second n-type semiconductor layer 124 is 200 nm or less. These film thickness ranges make it easy to provide the active layer 114 containing compressive strain while avoiding lattice relaxation of AlGaN in the first n-type semiconductor layer 122 and the second n-type semiconductor layer 124 on the template layer 120. In this embodiment, the first n-type semiconductor layer 122 is in contact with the second n-type semiconductor layer 124. The second n-type semiconductor layer 124 is in contact with the active layer 114.

[0036] By way of example and not limitation, the second n-type semiconductor layer 124 may have a second Al composition that is less than the first Al composition of the first n-type semiconductor layer 122. Alternatively, the second n-type semiconductor layer 124 may have a second Al composition that is substantially equal to the first Al composition of the first n-type semiconductor layer 122.

[0037] The light emitting device 110 includes a lower III-nitride stack 113 located between the active layer 114 and the template member 112, and an upper III-nitride stack 115 located above the active layer 114. In this example, the lower III-nitride stack 113 forms a bond 119a with the template layer 120, and the Al Ｘ Ga １－Ｘ The lower III-nitride stack 113 can have compressive strain due to N. The lower III-nitride stack 113 forms a junction 119b with the active layer 114. The active layer 114 can be bonded to the Al of the template layer 120. Ｘ Ga １－Ｘ The upper III-nitride stack 115 may contain compressive strain due to N. On the other hand, at least a portion of the upper III-nitride stack 115 may be lattice-relaxed. The upper III-nitride stack 115 is provided on the active layer 114 and supplies carriers to the active layer 114.

[0038] The lower III-nitride stack 113 may include one or more III-nitride semiconductor layers in addition to the nitride semiconductor region 116 .

[0039] Specifically, the lower III-nitride stack 113 includes an underlayer, specifically Al Ｕ Ga １－Ｕ N layer 130 (where U is less than or equal to X and greater than zero).Ｕ Ga １－Ｕ The N layer 130 may be, for example, undoped and may be provided to cover the template layer 120. Specifically, Al Ｕ Ga １－Ｕ The N layer 130 may be made of AlN.

[0040] By way of example and not limitation, Al Ｕ Ga １－Ｕ The N layer 130 is, for example, 4×10 ６ cm －２ The Al alloy may have the following screw dislocation densities: Ｕ Ga １－Ｕ The N layer 130 is, for example, 9×10 ８ cm －２ The undoped Al may have the following threading dislocation density: Ｕ Ga １－Ｕ The N layer 130 can contain compressive strain. Ｕ Ga １－Ｕ The lattice relaxation rate of the N layer 130 is 2% or less. Ｕ Ga １－Ｕ The N layer 130 allows the dislocation density and compressive strain of the template layer 120 to be inherited.

[0041] The lower III-nitride stack 113 is formed by another underlayer, specifically Al Ｖ Ga １－Ｖ An N layer 132 (V is less than 1 and greater than 0.8, and V is less than U) can be included. Ｖ Ga １－Ｖ The N layer 132 may be, for example, undoped, and may specifically be made of AlGaN. Ｖ Ga １－Ｖ The N layer 132 is Al Ｕ Ga １－Ｕ It can be provided on the N layer 130. Ｖ Ga １－Ｖ The N layer 132 is, for example, 4×10 ６ cm －２ It can have a dislocation density that includes the following screw components: Al Ｖ Ga １－ＶThe N layer 132 can contain compressive strain from the underlayer. Ｕ Ga １－Ｕ The lattice relaxation rate of the N layer is 2% or less. Ｖ Ga １－Ｖ The N layer 132 can have the Al composition lowered toward the active layer 114 while inheriting the threading dislocation density and compressive strain of the template layer 120 .

[0042] In the lower III-nitride stack 113, the lattice relaxation rate of the second n-type semiconductor layer 124 relative to the template layer 120 can be 2% or less. The lower III-nitride stack 113 is connected to an electrode (n-side electrode 148). In this case, current flows in the in-plane direction in the lower III-nitride stack 113. The thicker the n-type semiconductor region, the lower its resistance, allowing for a reduction in drive voltage. However, if the n-type semiconductor region is too thick, the lattice relaxation rate of the n-type semiconductor region increases, preventing effective transmission of compressive strain to the active layer. A lattice relaxation rate of 2% or less of the second n-type semiconductor layer 124 provides the n-type semiconductor with a thickness for a good current path and enables effective transmission of compressive strain to the active layer.

[0043] In this embodiment, the nitride semiconductor region 116 is Al Ｖ Ga １－Ｖ A junction 119c is formed with the N layer 132. Ｖ Ga １－Ｖ The N layer 132 is Al Ｕ Ga １－Ｕ The lower group III nitride stack 113 includes the nitride semiconductor region 116 and the AlN layer 130. Ｕ Ga １－Ｕ N layer 130 and Al Ｖ Ga １－Ｖ The Al layer 132 is Ｕ Ga １－Ｕ N layer 130 and Al Ｖ Ga １－Ｖ The N layer 132 can form a base that transmits the compressive strain of the template layer 120 to the active layer 114. The nitride semiconductor region 116 is made of Al Ｖ Ga １－ＶIt has an Al composition smaller than that of the N layer 132 and larger than that of the well layer 114b.

[0044] The lower III-nitride stack 113 has an Al composition profile Al-P that changes monotonically (including changing stepwise in the same direction) in the direction from the template member 112 to the active layer 114. The Al composition profile Al-P means that when the Al composition of the template layer 120 is higher than the Al composition of the well layer 114b, the Al composition of the template layer 120 does not increase in the direction from the template layer 120 to the active layer 114.

[0045] Next, the upper III-nitride stack 115 will be described. The upper III-nitride stack 115 may include, for example, an electron blocking layer 134, a p-type compositionally graded layer 136, and a p-type contact layer 138. The electron blocking layer 134, the p-type compositionally graded layer 136, and the p-type contact layer 138 (138a, 138b) may be provided on the active layer 114 in this order.

[0046] Examples of the upper III-nitride stack 115 are shown below. In the following description, unless the phrase "by way of example and not limitation" is used, numerical values ​​generally allow for a certain range and are shown by way of example and not by way of limitation. Electron blocking layer 134: undoped or Mg-doped AlN, thickness 5 nm. p-type compositionally graded layer 136: Mg-doped compositionally graded AlGaN (Al composition: 0.9 to 0.3), thickness 12 nm. p-type contact layer 138a (first layer): Mg-doped GaN, thickness 120 nm. p-type contact layer 138b (second layer): heavily Mg-doped GaN, thickness 30 nm.

[0047] The light-emitting device 110 has a processed region 142 formed by etching. The processed region 142 by etching can include the upper Group III nitride stack 115, the active layer 114, and the upper side of the nitride semiconductor region 116 (specifically, the second n-type semiconductor layer 124 and an upper portion of the first n-type semiconductor layer 122).

[0048] The light-emitting device 110 may further include a passivation film 144, which covers the etched region 142 and the nitride semiconductor region 116. The passivation film 144 has a first opening 144a located on the upper surface of the etched region 142 and a second opening 144b located on the upper surface of the nitride semiconductor region 116 (specifically, the upper surface of the first n-type semiconductor layer 122). The passivation film 144 may include, for example, a silicon-based inorganic insulator, and specifically may include silicon oxide, silicon nitride, or silicon oxynitride.

[0049] The light-emitting device 110 may have a p-side electrode 146 and an n-side electrode 148. The p-side electrode 146 is provided in the first opening 144a, and the n-side electrode 148 is provided in the second opening 144b. The p-side electrode 146 makes contact with the upper surface of the p-type contact layer 138. The n-side electrode 148 makes contact with the upper surface of the first n-type semiconductor layer 122. P-side electrode 146: Ni / Au ("Ni / Au" means that Au is deposited on Ni) N-side electrode 148: Ti / Al / Ni / Au

[0050] The template layer 120 has a first region 120a and a second region 120b arranged along a reference plane Ref that intersects with an axis Ax extending from the template layer 120 toward the active layer 114. The n-side electrode 148 is located on the first region 120a, specifically on the lower III-nitride stack 113, and the etched region 142 and the p-side electrode 146 are located on the second region 120b, specifically on the surface of the upper III-nitride stack 115. Referring to FIG. 2 , the p-side electrode 146 has a comb shape. The n-side electrode 148 may include a closed portion surrounding the etched region 142 and a comb-shaped portion.

[0051] FIG. 3 is a diagram schematically showing a group III nitride epitaxial wafer according to one embodiment of the present invention.

[0052] The III-nitride epitaxial wafer (hereinafter referred to as "epi-wafer") EPI does not include the passivation film 144, the p-side electrode 146, or the n-side electrode 148, and has a semiconductor layer structure 153 made of the same semiconductor materials as the lower III-nitride stack 113, the active layer 114, and the upper III-nitride stack 115 of the light-emitting device 110. Thus, the epi-wafer EPI includes a template substrate 152 and semiconductor films for the lower III-nitride stack 113, the active layer 114, and the upper III-nitride stack 115 provided on the template substrate 152.

[0053] The template substrate 152 includes a substrate 156 having a primary surface 156a made of a material other than a group III nitride, and a template layer 160 containing compressive strain that covers the primary surface 156a of the substrate 156. In the template substrate 152, the template layer 160 is an Al (10-12) nitride having an X-ray rocking curve half-width of 1000 arcsec or less. Ｘ Ga １－Ｘ The substrate 156 contains a compressive strain that covers the main surface 156a of the substrate 156 and includes N (X is greater than 0 and less than or equal to 1). The substrate 156 is made of carbon, boron nitride (BN), aluminum oxide (sapphire), ceramic, silicon carbide, refractory metal, zirconia, tantalum carbide (TaC), ScAlMgO ４ The substrate 156 has, for example, a hexagonal crystal structure, and a primary surface 156a of the substrate 156 has an off-angle of 0.5 degrees or less with respect to the c-plane of the crystal structure.

[0054] According to the epitaxial wafer EPI, a second n-type semiconductor layer 124 having a surface roughness of 0.4 nm or less is provided on the first n-type semiconductor layer 122. The low surface roughness makes it possible to avoid lattice relaxation of the active layer 114 and to impart compressive strain to the active layer 114. In addition, an Al (10-12) plane X-ray rocking curve half-width of 1000 arcsec or less is provided. Ｘ Ga １－Ｘ A first n-type semiconductor layer 122 having a lattice relaxation rate of 2% or less is provided on an N template layer 160. This low lattice relaxation rate makes it possible to impart compressive strain contained in the template layer to the active layer.

[0055] The semiconductor layer structure 153 is provided on the template substrate 152. Therefore, the semiconductor layers relating to the semiconductor layer structure 153 are denoted by the same reference numerals as those in the light-emitting device 110, and redundant description will be omitted.

[0056] 4A, 4B, 5A, 5B, 6A, 6B, 7A, and 7B are diagrams showing the main steps of a method for fabricating a light-emitting device according to this embodiment. In the following description of the fabrication method, a light-emitting diode structure is fabricated as the light-emitting device.

[0057] 4A-5B, a template 162 is prepared. Preparing the template 162 may include, for example, fabricating the template 162 or obtaining the template 162 by a method other than fabrication.

[0058] Fabricating the template 162 can include the following steps.

[0059] 4A, a substrate 150 is prepared. The substrate 150 may be, for example, a 2-inch sapphire substrate. The substrate 150 is placed in a film-forming apparatus, and an Al film is formed on a main surface 150a of the substrate 150. Ｘ Ga １－Ｘ A precursor 151 for N is deposited. This deposition is performed by sputtering using, for example, a sputtering device 155a. The precursor 151 is Al Ｘ Ga １－Ｘ The AlN template layer 151 is composed of a collection of group III nitride crystal grains for AlN. The sputtering target includes AlN or AlGaN. The target is sputtered using a sputtering pressure of 0.05 Pa, and an AlN or AlGaN precursor 151 for the AlN template layer is deposited on the substrate 150. During this deposition, the surface temperature of the substrate 150 is maintained within a range of approximately 500 to 700 degrees Celsius, for example, at approximately 700 degrees Celsius. Nitrogen gas, for example, is used as the inert gas. The flow rate of the nitrogen gas is, for example, 10 to 100 sccm (standard cubic centimeter per minute).

[0060] 4B , after the deposition of the precursor 151, the substrate 150 and the precursor 151 are placed in a heat treatment device 155b. In the heat treatment device 155b, the covering member 154 and the precursor 151 are made to face each other. At this time, the covering member 154 and the precursor 151 are arranged so that the maximum distance between the main surface 152a of the precursor 151 and the main surface 154a of the covering member 154 is preferably 0.5 mm or less.

[0061] 5A, a heat treatment is performed on the substrate 150 and the precursor 151 using a heat treatment device 155b. In the heat treatment device 155b, an inert gas and ammonia (NH ３ In the atmosphere 158, the substrate 150 and precursor 151 are heated to an annealing temperature. The annealing temperature can be, for example, 1600°C or higher and 1750°C or lower, e.g., 1725°C. The time for which the substrate 150 and precursor 151 are held at 1400°C or higher may be 20 minutes to 168 hours, more preferably 3 to 48 hours. In the heat treatment device 155b, the substrate 150 and precursor 151 are placed within the above temperature range and subjected to a heat treatment for, for example, 20 minutes or longer. This heat treatment can provide a template 162 including a template layer 160. The template layer 160 is made of Al. Ｘ Ga １－Ｘ N (where X is greater than zero and less than or equal to 1) and covers the major surface 150a of the substrate 150. The template layer 160 can be, for example, less than or equal to 2000 nm and greater than or equal to 100 nm, and in this example is 500 nm.

[0062] The covering member 154 can have a main surface 154a that is equal to or larger than the main surface 151a of the precursor 151. The main surface 154a of the covering member 154 can be made of carbon, boron nitride (BN), aluminum oxide (sapphire), ceramic, silicon carbide, high melting point metal, zirconia, tantalum carbide (TaC), ScAlMgO ４ The inert gas in the atmosphere 158 may include at least one of helium (He) gas, nitrogen (N ２ ) gas, and argon (Ar) gas.

[0063] 5B, the half-width of the (10-12) X-ray rocking curve is measured using an X-ray diffraction apparatus 155c. The template layer 160 has a half-width of the (10-12) X-ray rocking curve of 1000 arcsec or less. Through these steps, a template 162 is fabricated from the substrate 150.

[0064] According to an exemplary process for preparing the template 162, the template layer 160 can have an X-ray rocking curve of (10-12) with a half-width of 100 arcsec or less for the (0002) plane.

[0065] The template layer 160 was formed by sputter deposition and high temperature heat treatment.

[0066] The prepared template 162 includes a substrate 150 and a template layer 160. The substrate 150 has a primary surface 150a made of a material other than a group III nitride. The template layer 160 is made of Al (10-12) with an X-ray rocking curve half-width of 1000 arcsec or less. Ｘ Ga １－Ｘ The substrate 150 contains N and covers the main surface 150 a.

[0067] Al of template layer 160 Ｘ Ga １－Ｘ Specifically, N can be AlN and / or AlGaN. The template layer 160 has a thickness of 5×10 ７ cm －２ or 9×10 ８ cm －２ The threading dislocation density is as follows:

[0068] The substrate 150 may be made of carbon, boron nitride (BN), aluminum oxide (sapphire), ceramic, silicon carbide, refractory metals, zirconia, tantalum carbide (TaC), ScAlMgO ４ For example, the sapphire substrate may typically have a size of 2 inches.

[0069] Specifically, the substrate 150 may have a hexagonal crystal structure. The primary surface 152a of the substrate 150 has an off-angle greater than 0 degrees and equal to or less than 0.5 degrees relative to the c-plane of the crystal structure. The off-angle direction is, for example, the [1-100] direction (m-axis direction) of the hexagonal crystal structure. This manufacturing method provides exemplary angle ranges and directions for the off-angle.

[0070] 6A, a group III nitride stack 164 is grown on the template layer 160. This growth can be performed by, for example, metalorganic vapor phase epitaxy (MOVPE) or molecular beam epitaxy (MBE). In the following description, a MOVPE reactor 155d is employed, and trimethylgallium (TMGa) and trimethylaluminum (TMAl) are used as the gallium and aluminum precursors, respectively. NH is used as the nitrogen source. ３ is used.

[0071] The III-nitride stack 164 includes semiconductor films for the lower III-nitride stack 113 and the active layer 114. Specifically, the III-nitride stack 164 has a nitride semiconductor region 166 and an active layer 168.

[0072] After fabricating template layer 160, nitride semiconductor region 166 is grown on template layer 160. Specifically, first n-type semiconductor layer 165 is grown on template layer 160, and second n-type semiconductor layer 167 is grown on first n-type semiconductor layer 165.

[0073] Growing the III-nitride stack 164 on the template layer 160 may include growing a first n-type semiconductor layer 165 and a second n-type semiconductor layer 167 using at least one of the following conditions:

[0074] First condition: The growth temperature T165 for growing the first n-type semiconductor layer 165 is higher than the growth temperature T167 for growing the second n-type semiconductor layer 167 (that is, T165>T167).

[0075] Second condition: The growth rate V165 of the first n-type semiconductor layer 165 is slower than the growth rate V167 of the second n-type semiconductor layer 167 (that is, V167>V165).

[0076] Third condition: NH during the growth of the first n-type semiconductor layer 165 ３ The partial pressure P165 is the NH ３ It is higher than the partial pressure P167 (i.e., P165>P167).

[0077] According to this manufacturing method, an Al (10-12) plane X-ray rocking curve half width of 1000 arcsec or less can be obtained. Ｘ Ga １－Ｘ A first n-type semiconductor layer 165 and a second n-type semiconductor layer 167 are grown on the N template layer 160 using at least one of a first condition, a second condition, and a third condition.

[0078] The generation of hillocks and dislocations due to screw dislocations is suppressed during the growth of the first n-type semiconductor layer 165. Furthermore, the growth of the second n-type semiconductor layer 167 can provide the second n-type semiconductor layer 167 with a flatness superior to that of the first n-type semiconductor layer 165.

[0079] Each of the first n-type semiconductor layer 165 and the second n-type semiconductor layer 167 includes an n-type dopant (eg, silicon) in this embodiment.

[0080] After the growth of the nitride semiconductor region 166, the active layer 168 is grown. Specifically, the active layer 168 may include AlGaN. The active layer 168 may be configured to generate light having a peak wavelength in the deep ultraviolet wavelength region of 285 nm or less. By way of example and not limitation, the active layer 168 may generate light in the deep ultraviolet wavelength region up to about 210 nm. By way of example and not limitation, the active layer 168 may include InAlGaN, which is capable of generating light in the deep ultraviolet wavelength region.

[0081] A first n-type semiconductor layer 165, a second n-type semiconductor layer 167, and an active layer 168 are grown on the template layer 160 to form the following structure: The first n-type semiconductor layer 165 and the second n-type semiconductor layer 167 are provided in the nitride semiconductor region 166. The first n-type semiconductor layer 165 is provided between the template layer 160 and the active layer 168, and the second n-type semiconductor layer 167 is provided between the first n-type semiconductor layer 165 and the active layer 168. The active layer 168 includes a Group III nitride semiconductor containing compressive strain.

[0082] The growth of AlGaN for the active layer 168 on the group III nitride stack 164 is performed on a good underlayer of the second n-type semiconductor layer 167, making it possible to form the active layer 168 containing compressive strain. The active layer 168 containing compressive strain can increase the light output (light output per input power) of light emitted in the deep ultraviolet wavelength region of 285 nm or less.

[0083] In this manufacturing method, the first condition is provided as an example of growth temperatures, but is not limited to these. The growth temperature of the first n-type semiconductor layer 165 is 1100 degrees Celsius or higher, and the growth temperature of the second n-type semiconductor layer 167 is lower than 1100 degrees Celsius.

[0084] Growth at a higher temperature can prevent the generation of hillocks during growth on an underlayer that inherits the strain of the template layer 160. Growth at a lower temperature can improve the disturbance of the step-flow structure that appears during growth at a higher temperature. This improvement can reduce the in-plane non-uniformity of the composition of the constituent elements of the second n-type semiconductor layer 167 (e.g., an n-type AlGaN layer). The reduced non-uniformity of the composition of the constituent elements can provide an underlayer with high composition uniformity of the constituent elements for growth of the active layer 168.

[0085] Also, by way of example and not limitation, the growth temperature of the first n-type semiconductor layer 165 may be 1200 degrees Celsius or less, and the growth temperature of the second n-type semiconductor layer 167 may be 1000 degrees Celsius or more.

[0086] In this manufacturing method, exemplary growth rates are provided for the second condition, but are not limiting. The growth rate of the first n-type semiconductor layer 165 may be 400 nm / h or less, and the growth rate of the second n-type semiconductor layer 167 may be greater than 400 nm / h.

[0087] Growth at a lower growth rate can prevent hillocks from being generated during growth on an underlayer that inherits the strain of the template layer 160. Growth at a higher growth rate can improve the step growth irregularities that appear during growth at a lower growth rate. This improvement can reduce the compositional non-uniformity of the constituent elements of the second n-type semiconductor layer 167 (e.g., an n-type AlGaN layer). This reduced compositional non-uniformity can provide an underlayer with high compositional uniformity of the constituent elements for growth of the active layer 168.

[0088] Also, by way of example and not limitation, the growth rate of the first n-type semiconductor layer 165 may be 300 nm / h or more, and the growth rate of the second n-type semiconductor layer 167 may be 800 nm / h or less.

[0089] In this manufacturing method, the third condition is not limited, but is exemplified by NH ３ The partial pressure is provided. ３ The partial pressure may be 10 kPa or more, and the NH ３ The partial pressure can be less than 10 kPa.

[0090] Higher NH ３ Growth at partial pressure can prevent hillock formation during growth onto the underlying layer, which inherits the strain of template layer 160. ３ Growth at higher NH partial pressures ３ The step growth disturbance that occurs in growth under partial pressure can be improved. This improvement can reduce the in-plane composition non-uniformity of the constituent elements of the second n-type semiconductor layer (e.g., n-type AlGaN layer). This reduction in composition non-uniformity can provide a base with high composition uniformity of the constituent elements for the growth of the active layer 168.

[0091] Also, by way of example and not limitation, the NH ３ The partial pressure can be 12.5 kPa or less, and the NH ３ The partial pressure can be 7.5 kPa or greater.

[0092] According to this manufacturing method, the thin second n-type semiconductor layer 167 is grown on the first n-type semiconductor layer 165, thereby providing the second n-type semiconductor layer 167 with a surface roughness equal to or less than the c-axis lattice constant. On the other hand, the thick first n-type semiconductor layer 165 is grown prior to the second n-type semiconductor layer 167, thereby suppressing the growth of hillocks caused by screw dislocations from the low-dislocation template layer 160, thereby avoiding an increase in surface roughness and suppressing the generation of new dislocations. Specifically, the second n-type semiconductor layer 167 has a surface roughness of 0.4 nm or less, while the first n-type semiconductor layer 165 has a surface roughness of 0.5 nm or less.

[0093] The growth of nitride semiconductor region 166 combines the growth of thick first n-type semiconductor layer 165 with thin second n-type semiconductor layer 167. This combination facilitates the appearance of linear growth steps in the growth of AlGaN for second n-type semiconductor layer 167 on template layer 160. As a result, the generation of non-radiative centers in active layer 168 due to step meandering is reduced.

[0094] By way of example and not limitation, the second n-type semiconductor layer 167 may have a thickness greater than the thickness of the first n-type semiconductor layer 165 .

[0095] The first n-type semiconductor layer 165 may be an AlGaN layer with an Al composition of 0.7 or more, and the second n-type semiconductor layer 167 may be an AlGaN layer with an Al composition of 0.7 or more.

[0096] According to this manufacturing method, these Al composition ranges facilitate linear growth steps during the growth of AlGaN of the second n-type semiconductor layer 167 on the template layer 160, thereby reducing the density of non-radiative centers generated due to step meandering.

[0097] In this manufacturing method, when the first n-type semiconductor layer 165 is grown according to at least one of the first to third conditions, the increase in hillocks can be reduced and the disturbance of step growth can be prevented. This allows the second n-type semiconductor layer to have a good surface morphology. In addition, the active layer 168 can be provided with a low dislocation density and compressive strain derived from the template layer 160. The active layer 168 is made of Al Ｘ Ga １－Ｘ It is possible to incorporate compressive strain according to the N template layer 160. Furthermore, in the growth from the template layer 160 to the nitride semiconductor region 166, the thickness of the second n-type semiconductor layer 167 is made smaller than the thickness of the first n-type semiconductor layer 165. When the thickness of the first n-type semiconductor layer 165 is made thicker than the second n-type semiconductor layer 167, it is possible to provide the second n-type semiconductor layer 167 with a low dislocation density and low surface roughness RMS derived from the template layer 160.

[0098] In this example, the flow rate of the organometallic aluminum precursor is not changed when switching from the growth of the first n-type semiconductor layer 165 to the growth of the second n-type semiconductor layer 167. If necessary, the flow rate of the organometallic aluminum precursor can be changed when switching.

[0099] By way of example and not limitation, decreasing the flow rate of the organometallic aluminum precursor during switching can grow the second n-type semiconductor layer 167 having an Al composition smaller than that of the first n-type semiconductor layer 165. According to this manufacturing method, the nitride semiconductor region 166 can include two n-type Group III nitride semiconductor layers 165, 167 (e.g., n-type AlGaN layers) having different first and second Al compositions. By making the first Al composition larger than the second Al composition in this nitride semiconductor region 166 and making the thickness of the second n-type semiconductor layer smaller than that of the first n-type semiconductor layer, the second n-type semiconductor layer 167 can be provided with a low dislocation density and good surface morphology derived from the template layer 160. If the first n-type semiconductor layer 165 having a relatively high Al composition is grown according to at least one of the first to third conditions, it is possible to reduce the increase in hillocks and suppress the disturbance of step growth, thereby suppressing the generation of non-radiative centers and providing the active layer 168 with a low dislocation density and compressive strain derived from the template layer 160. As a result, the active layer 168 has a high Al Ｘ Ga １－Ｘ The N template layer 160 can contain a compressive strain corresponding to the N template layer 160.

[0100] As already described, the active layer 168 may have a quantum well structure. The quantum well structure of the active layer 168 includes one or more well layers and one or more barrier layers. The bandgap of compressively strained AlGaN in the well layers is smaller than the bandgap of compressively strained AlGaN in the barrier layers. Each well layer contains compressive strain, and each barrier layer contains compressive strain.

[0101] According to this manufacturing method, Al Ｘ Ga １－Ｘ The N template layer 160 imparts compressive strain to the quantum well structure of the active layer 168 via a nitride semiconductor region (semiconductor region for the lower III-nitride stack 113) with a low lattice relaxation rate. The compressive strain in the quantum well structure reduces the absolute value of the internal electric field, thereby reducing the quantum-confined Stark effect. This reduction promotes delocalization of the electron wave function within the well layer, increasing the recombination probability (the overlap integral of the hole wave function and the electron wave function).

[0102] Furthermore, when compressive strain is applied to the quantum well structure on the nitride semiconductor region for the lower group III nitride stack 113, which has a low lattice relaxation rate, the compressive strain in the well layer and the compressive strain in the barrier layer can reduce the polarization difference between the well layer and the barrier layer.

[0103] The low surface roughness RMS of the nitride semiconductor region 166 allows for the provision of a compressive strain of 1.5% or more to the AlGaN well layer of the active layer 168. If the flatness of the second n-type semiconductor layer 167 deteriorates, the strain contained in the template layer cannot be effectively transmitted to the active layer 168. In other words, in order to achieve a compressive strain of 1.5% or more in the active layer 168, the underlying second n-type semiconductor layer 167 needs to provide the active layer 168 with a highly flat surface.

[0104] The low surface roughness RMS of the nitride semiconductor region 166 and the compressively strained active layer 168 can provide the light emitting device with an emission spectrum half width of 10 nm or less.

[0105] By way of example and not limitation, the thickness of the first n-type semiconductor layer 165 may be 200 nm or more, and the thickness of the second n-type semiconductor layer 167 may be 200 nm or less. The nitride semiconductor region 166 provides the growth of the active layer 168 with low dislocation density and good planarity derived from the template layer 160.

[0106] In this embodiment, one or more Group III nitride semiconductor layers are grown prior to the growth of the nitride semiconductor region 166 and the active layer 168 .

[0107] Specifically, Al is deposited so as to cover the template layer 160. Ｕ Ga １－Ｕ An N layer 170 (U is less than or equal to X and greater than zero) can be grown. Ｕ Ga １－Ｕ The N layer 170 has an Al composition greater than the Al composition of the nitride semiconductor region 166 .

[0108] Al Ｕ Ga １－Ｕ The N layer 170 can be, for example, undoped. Ｕ Ga １－ＵThe screw dislocation density of the N layer 170 is, for example, 4×10 ６ cm －２ and Al Ｕ Ga １－Ｕ The threading dislocation density of the N layer 170 is, for example, 9×10 ８ cm －２ The following is true: Ｕ Ga １－Ｕ The N layer 170 can contain compressive strain. Ｕ Ga １－Ｕ The relaxation rate of the N layer is 2% or less. Ｕ Ga １－Ｕ The N layer 170 makes it possible to inherit the threading dislocation density and compressive strain of the template layer 160 .

[0109] Specifically, Al Ｕ Ga １－Ｕ Another Al layer is formed on the N layer 170. Ｖ Ga １－Ｖ An N layer 172 (V is less than 1 and greater than 0.8, and V is less than U) can be grown. Ｖ Ga １－Ｖ The N layer 172 has an Al composition greater than the Al composition of the nitride semiconductor region 166 .

[0110] Al Ｖ Ga １－Ｖ The N layer 172 can be, for example, undoped. Ｖ Ga １－Ｖ The screw dislocation density of the N layer 172 is, for example, 4×10 ６ cm －２ The following is true: Ｖ Ga １－Ｖ The N layer 172 can contain compressive strain. Ｖ Ga １－Ｖ The N layer 172 can lower the Al composition toward the active layer 168 while inheriting the threading dislocation density of the template layer 160. When the template layer 160 is made of AlN, the undoped Al Ｖ Ga １－Ｖ The lattice relaxation rate of the N layer is 2% or less.

[0111] The III-nitride stack 164 includes a nitride semiconductor region 166 and an active layer 168 as well as undoped Al Ｕ Ga １－Ｕ N layer 170 and undoped Al Ｖ Ga １－Ｖ It may have an N layer 172 .

[0112] In an embodiment, the plurality of Group III nitride semiconductor layers grown on the template layer 160 can be grown coherently with respect to the template layer 160. Here, "growing coherently" refers to a manner in which growth continues with a constant lattice constant.

[0113] Subsequently, a plurality of Group III nitride semiconductor layers (174, 176, 178) for the Group III nitride stack 164 are grown on the active layer 168. Specifically, the Group III nitride stack 164 may include an electron blocking layer 174, a p-type compositionally graded layer 176, and a p-type contact layer 178. The electron blocking layer 174, the p-type compositionally graded layer 176, and the p-type contact layer 178 may be grown on the active layer 168 in that order.

[0114] 6B, a groove 180 that defines the outer edge of the element of the light-emitting device is formed by photolithography and etching. Etching is performed from the upper surface of the group III nitride stack 164 to the substrate 150, thereby forming the groove 180.

[0115] 7A, an etching process region 182 is formed by photolithography and etching. The etching is performed to form a groove 183 that extends from the upper surface of the group III nitride stack 164 to the second n-type semiconductor layer 167 or the first n-type semiconductor layer 165 (the first n-type semiconductor layer 165 in this embodiment) so as to separate the active layer 168. Ｖ Ga １－Ｖ It does not reach the N layer 172 .

[0116] 7B, a passivation film 184, a p-side electrode 186, and an n-side electrode 188 are formed. The passivation film 184 has a first opening 184a located on the top surface of the etched region 182, and a second opening 184b located on the bottom surface of the groove 183 that defines the etched region 182.

[0117] Next, one of the p-side electrode 186 and the n-side electrode 188, for example, the p-side electrode 186, is formed in the first opening 184a, and the other of the p-side electrode 186 and the n-side electrode 188, for example, the n-side electrode 188, is formed in the second opening 184b.

[0118] Through these steps, the light-emitting device is fabricated.

[0119] Next, several examples of light-emitting devices will be described. The structures of a nitride semiconductor substrate 100 and a light-emitting diode (LED) 102 according to one example will be described with reference to FIGS. 8A and 8B. FIG. 8A is a schematic diagram of a layered structure of a nitride semiconductor substrate 100 according to an embodiment. FIG. 8B is a diagram schematically showing a layered structure of a light-emitting diode 102 according to an embodiment. FIG. 9 is a flowchart showing major steps in a method for fabricating a nitride light-emitting device and a method for fabricating an epitaxial wafer according to the present embodiment.

[0120] The nitride semiconductor substrate 100 includes a substrate 10, an AlN template layer 20, an AlN homoepitaxial layer 30, a buffer layer 40, and an electron injection layer 50. The light-emitting diode 102 includes the substrate 10, the AlN template layer 20, the AlN homoepitaxial layer 30, the buffer layer 40, the electron injection layer 50, an active layer 60, an electron blocking layer 70, a hole injection layer 80, and a contact layer 90, which are stacked in this order. An n-side electrode 53 is connected to the electron injection layer 50, and a p-side electrode 93 is connected to the contact layer 90.

[0121] Next, each layer of the nitride semiconductor substrate 100 according to the embodiment will be described.

[0122] In step S10, a substrate 10 is prepared. The substrate 10 can be, for example, a sapphire substrate. However, the substrate 10 is not limited to sapphire, and can be made of carbon, boron nitride (BN), ceramic, silicon carbide, a high-melting-point metal, zirconia, tantalum carbide (TaC), ScAlMgO, etc. ４ The substrate 10 may include at least one material selected from the group consisting of sapphire, sapphire crystals, and silicon dioxide. Furthermore, in the case of a sapphire substrate 10, the sapphire surface may be slightly tilted from the (0001) plane (also known as the "c-plane") of sapphire. This tilt may be, for example, in the range of 0.1 to 0.5 degrees from the c-plane of sapphire, and more preferably in the range of 0.15 to 0.25 degrees from the c-plane of sapphire. The angle between the c-plane and the substrate surface, i.e., the tilt angle, is called the off-angle.

[0123] In step S11, an AlN template layer 20 is fabricated. The AlN template layer 20 is substantially composed of AlN. The AlN template layer 20 is formed to grow an epitaxial layer with good crystallinity on the substrate 10. In the embodiment, AlN for the template layer provides the following advantages: The lattice constant of AlN can be well matched to the lattice constant of AlGaN used in the active layer 60 of an ultraviolet light-emitting diode (DU-LED). In addition, AlN on a sapphire substrate exhibits high transmittance for ultraviolet light. AlN exhibits high thermal conductivity. These advantages make it suitable as a template layer. AlGaN, in which a small number of Al atoms in AlN are substituted with Ga atoms, also exhibits similar properties.

[0124] In step S11a, a desired sputtering target is prepared. In step S11b, a precursor for the AlN template layer 20 is deposited by sputtering, for example. In step S11c, the deposited precursor is heat-treated. Specifically, the precursor for the AlN template layer 20 is formed by one or more depositions on the surface of the substrate 10, for example, by reactive sputtering, and the deposited AlN and the substrate 10 are then subjected to one or more heat treatments. This results in the formation of the template layer 20. The depositions and heat treatments can be performed alternately. The method for forming the template layer 20 is not limited to reactive sputtering, and can also be performed using MOVPE, MBE, or hydride vapor phase epitaxy (HVPE).

[0125] Increasing the thickness of the template layer 20 reduces the threading dislocation density in the AlN of the template layer 20. This reduction can improve the internal quantum efficiency of the active layer 60 formed on the template layer 20. On the other hand, decreasing the thickness of the template layer 20 can reduce the frequency of cracks occurring in the template layer 20. This reduction improves the yield of light-emitting diodes 102 using the template layer 20. Specifically, the thickness of the AlN template layer 20 may be, for example, in the range of 100 to 10,000 nm, and more preferably in the range of 500 to 1,500 nm. By performing one or more sputtering depositions and heat treatments, this thickness range provides the template layer 20 with a sufficiently low threading dislocation density and a sufficiently low frequency of cracks occurring.

[0126] Subsequently, an epitaxial structure for a light-emitting diode is formed on the AlN template layer 20 of the substrate 10. This epitaxial structure can be formed using a deposition method such as MOVPE, HVPE, or MBE. In this example, all layers other than the AlN template layer 20 are fabricated using MOVPE.

[0127] In step S12, the AlN homoepitaxial layer 30 is formed. Specifically, prior to forming the AlN homoepitaxial layer 30 on the AlN template layer 20, if necessary, the surface of the AlN template layer 20 is treated (surface cleaning) in a MOVPE reactor. This surface treatment is a heat treatment for about 10 minutes in a high-temperature atmosphere. The surface treatment is carried out using H ２ and N.H. ３ or in a mixed atmosphere of H ２ , N.H. ３ and N ２ The treatment is performed in a mixed atmosphere of AlN and AlN. The treatment temperature may be, for example, 1200°C or higher, and more preferably 1300°C or higher. This treatment is performed to remove oxides and organic substances present on the surface of the AlN template layer 20 and to suppress the introduction of defects into each layer grown on the AlN template layer 20, from the AlN homoepitaxial layer 30 to the contact layer 90. The pressure may be, for example, 13 kPa.

[0128] (AlN Homoepitaxial Layer) The homoepitaxial layer 30 is made of the same material as the template layer 20. In this embodiment, the homoepitaxial layer 30 is made of, for example, AlN. The homoepitaxial layer 30 has a surface with superior flatness to the surface of the AlN template layer 20. The homoepitaxial layer 30 also prevents residual impurities (e.g., carbon (C), oxygen (O), and silicon (Si)) contained in the template layer 20 from passing through the homoepitaxial layer 30. The thickness of the homoepitaxial layer 30 may be, for example, in the range of 10 to 10,000 nm, and more preferably in the range of 50 to 1,000 nm. The thickness of the AlN homoepitaxial layer 30 is, for example, 200 nm. The AlN homoepitaxial layer 30 is made of, for example, H ２ Carrier gas of NH ３ and TMAl as raw materials, a growth pressure of 13 kPa, and a substrate temperature of 1300 degrees Celsius.

[0129] In step S13, a buffer layer 40 such as an AlGaN buffer layer is formed on the homoepitaxial layer 30. The buffer layer 40 is made of a nitride containing a group III element as a constituent element (Al ｙ１ Ga ｚ１ In （１－ｚ１－ｙ１） N, 0<y1≦1, 0≦z1<1, y1+z1≦1). Specifically, the buffer layer 40 serves to match the layers formed below the buffer layer 40 with the layers formed above the buffer layer 40 in terms of lattice constant. The buffer layer 40 may be made of, for example, AlGaN or AlGaInN. For example, when AlGaN (e.g., the active layer 60) is formed on AlN (e.g., the AlN template layer 20 and the AlN homoepitaxial layer 30), the lattice constant inherent to AlN differs from the lattice constant inherent to AlGaN, so a layer is provided between the AlN layer and the AlGaN layer to match the crystal's lattice constant. The buffer layer 40 may have a structure in which the lattice constant changes continuously or discontinuously in the stacking direction within the buffer layer 40. The buffer layer 40 may be undoped, meaning that no impurities are intentionally doped, or may contain n-type dopants, such as Si, Ge (germanium), Sn (tin), O (oxygen), S (sulfur), Se (selenium), or Te (tellurium), to impart n-type conductivity to the semiconductor.

[0130] If necessary, the buffer layer 40 may include a first buffer layer 41 and a second buffer layer 42 having different Al compositions. The Al composition of the first buffer layer 41 may be equal to or greater than the Al composition of the second buffer layer 42. The Al composition of the second buffer layer 42 may be equal to the Al composition of the electron injection layer 50, which will be described subsequently.

[0131] The first buffer layer 41 includes AlGaN, for example, H ２ and N ２The first buffer layer 41 is grown using a carrier gas of a mixed gas of TMGa and TMAl, and raw materials of TMGa and TMAl mixed so that the Ga (gallium):Al (aluminum) ratio is 30:70. The growth pressure is, for example, 20 kPa. The first buffer layer 41 may be grown at a temperature of, for example, 1200 degrees Celsius or higher, and more preferably, at a temperature of 1300 degrees Celsius or higher. The first buffer layer 41 has a thickness of 250 nm, an Al composition of 0.88, and is undoped with no intentional impurities added.

[0132] The second buffer layer 42 includes AlGaN and is grown on the first buffer layer 41. The second buffer layer 42 includes, for example, H ２ and N ２ The second buffer layer 42 is grown using a carrier gas of a mixed gas of TMGa and TMAl, which are mixed so that the ratio of Ga (gallium):Al (aluminum) is 30:70. The growth pressure is, for example, 40 kPa. The second buffer layer 42 has a thickness of 30 nm and an Al composition of 0.75, and is undoped, i.e., not intentionally doped with impurities.

[0133] In step S14, the electron injection layer 50 is formed on the buffer layer 40. Specifically, the electron injection layer 50 is made of a nitride containing a group III element as a constituent element (Al ｙ２ Ga ｚ２ In （１－ｚ２－ｙ２） The electron injection layer 50 may be made of, for example, at least one of AlGaN and AlGaInN. The electron injection layer 50 may contain a dopant, such as Si, Ge (germanium), Sn (tin), O (oxygen), S (sulfur), Se (selenium), or Te (tellurium), to impart n-type conductivity to the semiconductor. Thus, the electron injection layer 50 provides a conduction path that provides electrons to the active layer 60.

[0134] Providing a high Al composition in the electron injection layer 50 can reduce the lattice mismatch between AlN (e.g., the AlN template layer 20 and the AlN homoepitaxial layer 30) and the Group III nitride (e.g., AlGaN) of the electron injection layer 50. This reduction can effectively suppress the generation of misfit dislocations due to lattice relaxation. Furthermore, a high Al composition in the electron injection layer 50 can effectively reduce the size of hillocks generated during film formation, thereby improving the surface flatness of the electron injection layer 50. The electron injection layer 50 with a high Al composition can transfer compressive strain from the template layer 20 to the active layer 60. This can improve the LED characteristics, and more specifically, can provide an improved internal quantum efficiency and a narrower emission spectrum of the LED.

[0135] The Al composition of the electron injection layer 50 may be, for example, in the range of 0.6 to 0.9, and more preferably in the range of 0.7 to 0.8. This range can prevent the electron injection layer 50 from having an undesirable level of conductivity due to an excessively high Al composition. The thickness of the electron injection layer 50 may be, for example, in the range of 200 to 3000 nm, in order to impart sufficient strain to the active layer 60.

[0136] The electron injection layer 50 may be formed from a first electron injection layer 51 and a second electron injection layer 52 grown under different growth conditions. First, the second electron injection layer 52 is grown to provide a favorable surface roughness for the active layer 60. To this end, deposition conditions are selected that provide favorable linearity to the step-terrace structure on the AlGaN surface. On the other hand, the first electron injection layer 51 is grown to provide the electron injection layer 50 with a desired film thickness while suppressing the growth of hillock structures caused by dislocations in the template layer 20 and maintaining a wide area with high surface flatness. The deposition conditions for the second electron injection layer 52 are set so that the semiconductor for the second electron injection layer 52 is deposited while improving the linearity of the step-terrace structure already formed on the AlGaN surface of the first electron injection layer 51. Specifically, the possibility that pit-like defect structures formed during the crystal growth of the first electron injection layer 51 remain on the surface of the second electron injection layer 52 can be reduced. This results in a reduction in the RMS surface roughness of the second electron injection layer 52. The Al composition of the first electron injection layer 51 may be equal to or greater than the Al composition of the second electron injection layer 52. The film thickness of the second electron injection layer 52 may be, for example, 10 to 200 nm, and more preferably 50 to 150 nm.

[0137] A first electron injection layer 51 is grown on the buffer layer 40 and also includes a Si dopant. The first electron injection layer 51 may be, for example, H ２ and N ２ The first electron injection layer 51 is grown using a carrier gas of a mixed gas of TMGa and TMAl, raw materials mixed so that Ga (gallium):Al (aluminum) is 30:70, a growth pressure of 40 kPa, and a substrate temperature of 1150° C. The growth of the first electron injection layer 51 is performed in the following ranges of substrate temperature, growth rate, and NH ３ It is preferable to use at least one of the following conditions: a substrate temperature in the range of 1000 to 1200 degrees Celsius; a growth rate of 1000 nm / h or less, more preferably 400 nm / h; and an NH ３The partial pressure may be 5 kPa or more, and more preferably 10 kPa or more. By using at least one of these conditions, the size of hillocks can be effectively reduced and the surface flatness of the first electron injection layer 51 can be improved. Specifically, the film thickness of the first electron injection layer 51 is 1100 nm, the Al composition is 0.75, and the Si dopant concentration is 2×10 １９ cm －３ The substrate temperature during growth of the first electron injection layer 51 was 1150°C, the growth rate was 400 nm / h, and the NH ３ The partial pressure is 10 kPa.

[0138] A second electron injection layer 52 is grown on the first electron injection layer 51 and also includes a Si dopant. The second electron injection layer 52 may be, for example, H ２ and N ２ The second electron injection layer 52 is grown using a carrier gas of a mixed gas of TMGa and TMAl, raw materials mixed to have a flow ratio of Ga (gallium):Al (aluminum) = 30:70, a growth pressure of 10 kPa, and a substrate temperature of 1050°C. ３ It is preferable to use at least one of the following conditions within the range of partial pressure: a condition in which the substrate temperature of the second electron injection layer 52 is lower than that of the first electron injection layer 51; a condition in which the growth rate of the second electron injection layer 52 is faster than that of the first electron injection layer 51; and a condition in which the NH ３ The partial pressure of the first electron injection layer 51 is NH ３ A condition in which the partial pressure is lower than the partial pressure of the first electron injection layer 51. By using at least one of these conditions, the step-terrace structure that was disordered during the growth of the first electron injection layer 51 can be improved during the growth of the second electron injection layer 52, thereby providing a linear step-terrace structure on the surface of the second electron injection layer 52. As a result, it is possible to reduce pit-like defect structures formed due to the disorder in the step-terrace structure. Furthermore, by making the film thickness of the second electron injection layer 52 thinner than that of the first electron injection layer 51, it is possible to provide the second electron injection layer 52 with a good surface roughness RMS before hillock structures grow and reduce the surface flatness of the AlGaN. The film thickness of the second electron injection layer 52 is, for example, 100 nm, the Al composition is 0.75, and the Si dopant concentration is 2×10１９ cm －３ is.

[0139] In step S15, the active layer 60 is formed. Specifically, the active layer 60 has a structure including alternatingly stacked AlGaN well layers 61 and AlGaN barrier layers 62. The AlGaN well layers 61 and the AlGaN barrier layers 62 contain AlGaN having respective Al compositions. Specifically, the Al composition of the AlGaN well layers 61 is smaller than the Al composition of the AlGaN barrier layers 62. The thickness of the AlGaN well layers 61 may be 0.5 to 3.0 nm, and more preferably 1.0 to 2.5 nm. The number of AlGaN well layers 61 may be, for example, three. The uppermost layer of the active layer 60 may be the AlGaN well layer 61, and therefore, the active layer 60 may be in contact with an electron blocking layer 70. Furthermore, the multiple AlGaN well layers 61 may have the same thickness and Al composition, or may have different thicknesses and Al compositions. For example, the uppermost AlGaN well layer 61 of the active layer 60 is in contact with the electron blocking layer 70, and this AlGaN well layer 61 can have a smaller thickness than the other AlGaN well layers 61. The emission wavelength of the active layer 60 may be 220 to 285 nm, and more preferably 255 to 285 nm. The thickness of the AlGaN well layer 61 is 2 nm, the Al composition is 0.51, and the Si dopant concentration is 3×10 １７ cm －３ The thickness of the AlGaN barrier layer 62 is 3 nm, the Al composition is 0.66, and the Si dopant concentration is 5×10 １７ cm －３ Growth conditions for AlGaN of the active layer 60 are: Growth pressure: 40 kPa Substrate temperature: 1050 degrees Celsius The AlGaN barrier layer 62 may be in contact with the electron injection layer 50 , or the AlGaN well layer 61 may be in contact with the electron injection layer 50 .

[0140] In step S16, an electron blocking layer 70 is formed on the active layer 60. Specifically, the electron blocking layer 70 is formed of a nitride containing a group III element as a constituent element (Al ｙ３ Ga ｚ３ In （１－ｚ３－ｙ３）The electron blocking layer 70 may be made of, for example, at least one of AlN, AlGaN, and AlGaInN, such as undoped AlN. The bandgap energy of the electron blocking layer 70 is greater than the bandgap energy of the AlGaN barrier layer 62. The electron blocking layer 70 prevents electrons from the electron injection layer 50 from leaking from the active layer 60 to the hole injection layer 80. The film thickness of the electron blocking layer 70 may be 1 to 20 nm, more preferably 3 to 10 nm, for example, 5 nm. The electron blocking layer 70 may have a structure in which the bandgap energy changes continuously in the stacking direction within the electron blocking layer 70. The electron blocking layer 70 may be undoped, i.e., not intentionally doped with impurities, or may have p-type conductivity imparted by the addition of a p-type dopant such as Mg (magnesium), Be (beryllium), C (carbon), or Zn (zinc). Growth conditions for AlN of the electron blocking layer 70: Growth pressure: 40 kPa, Substrate temperature: 1050°C.

[0141] In step S17, a hole injection layer 80 such as a p-type AlGaN layer is formed. Specifically, the hole injection layer 80 is provided on the active layer 60 and the electron blocking layer 70. The hole injection layer 80 is made of a nitride containing a group III element as a constituent element (Al ｙ４ Ga ｚ４ In （１－ｚ４－ｙ４）N, 0≦y4≦1, 0≦z4≦1, y4+z4≦1). Specifically, the electron injection layer 50 may be made of at least one of AlN, AlGaN, or AlGaInN. The hole injection layer 80 may have p-type conductivity imparted by the addition of a p-type dopant such as Mg (magnesium), Be (beryllium), C (carbon), or Zn (zinc). The hole injection layer 80 provides a conduction path for providing holes to the active layer 60. The bandgap energy of the hole injection layer 80 is smaller than that of the electron blocking layer 70 and larger than that of the contact layer 90, which will be described subsequently. The hole injection layer 80 may have a structure in which the bandgap energy changes continuously or discontinuously, specifically, decreases, in the direction from the active layer 60 to the electron blocking layer 70. The thickness of the hole injection layer 80 may be 1 to 50 nm, and more preferably 5 to 20 nm.

[0142] In step S18, the contact layer 90 is grown on the hole injection layer 80. Specifically, the contact layer 90 is made of a nitride containing a group III element as a constituent element (Al ｙ５ Ga ｚ５ In （１－ｚ５－ｙ５） The contact layer 90 may be made of, for example, at least one of GaN, AlGaN, and AlGaInN. The contact layer 90 may have p-type conductivity imparted by adding a p-type dopant such as Mg (magnesium), Be (beryllium), C (carbon), or Zn (zinc).

[0143] The contact layer 90 may include multiple GaN layers with different dopant concentrations. In this embodiment, the contact layer 90 may include a first contact layer 91 and a second contact layer 92. The first contact layer 91 may have a dopant concentration of, for example, 1×10 １８ ~5 x 10 １９ cm －３ The second contact layer 92 may be GaN containing an Mg dopant at a concentration in the range of 5×10 to provide a good carrier conduction path. １９ ~1 x 10２１ cm －３ The GaN can be one containing an Mg dopant at a concentration in the range of 0.1 to 1.0, thereby reducing the contact resistance between the semiconductor and the metal electrode.

[0144] In step S19, an n-side electrode 53 and a p-side electrode 93 are formed. Specifically, the n-side electrode 53 is in contact with the surface of the electron injection layer 50. The n-side electrode 53 may contain at least one metal selected from the group consisting of Al, titanium (Ti), nickel (Ni), vanadium (V), zirconium (Zr), molybdenum (Mo), ruthenium (Ru), rhodium (Rh), palladium (Pd), silver (Ag), In, tin (Sn), tantalum (Ta), tungsten (W), platinum (Pt), and gold (Au). The n-side electrode 53 may be an alloy of these metals. The n-side electrode 53 may contain a conductive oxide or a conductive nitride.

[0145] The p-side electrode 93 is in contact with the surface of the contact layer 90. The p-side electrode 93 may contain at least one metal selected from the group consisting of Al, Ti, Ni, V, Zr, Mo, Ru, Rh, Pd, Ag, In, Sn, Ta, W, Pt, and Au. The p-side electrode 93 may also be a metal alloyed with any of these metals. The p-side electrode 93 may contain a conductive oxide or a conductive nitride.

[0146] The following examples illustrate the morphology of the epitaxial surface.

[0147] 10A is a diagram showing a differential interference microscope image of the surface of the electron injection layer (buffer layer thickness: 250 nm, electron injection layer thickness: 1500 nm) that is the uppermost layer in the stack grown on the template layer 20. Hexagonal pyramidal structures (called hillock structures) with a diameter of about 20 to 30 μm are formed over the entire surface of the electron injection layer, resulting in low surface flatness. Low surface flatness leads to lattice relaxation.

[0148] 10B to 10F show atomic force microscope images of the surface of the uppermost electron injection layer (buffer layer thickness: 150 nm, electron injection layer thickness: 150 nm) in the stack grown on the AlN template layer 20. Specifically, similar hillock structures are also shown in FIG. 10B. The density of the hillock structures is approximately 2×10 ６ cm －２ , which is approximately the same as the density of screw dislocations and mixed dislocations in the AlN template layer 20. The hillock structures have a smaller size than the hillock structures in Fig. 10A. The difference in size of the hillock structures is due to the difference in film thickness of the electron injection layer, and Fig. 10B shows that a thinner electron injection layer provides smaller hillock structures.

[0149] Figure 10C is an enlarged view of an area in Figure 10B where no hillock structures are present. Screw dislocations and mixed dislocations are not present in the observation area of ​​Figure 10C. Referring to Figure 10C, steps of approximately 0.25 nm, which is half the c-axis lattice constant of AlGaN, are formed at a high density on the AlGaN surface. These steps are atomic step-terrace structures. All of the atomic step-terrace structures extend continuously (or form loops) across the observation area. Figure 10D is an enlarged view showing the hillock structures of Figure 10B.

[0150] 10E and 10F are enlarged views showing the tops of the hillock structures in FIG. 10D . At the tops of the hillock structures, the atomic step-terrace structures form a spiral structure that terminates at the center of the spiral; this type of growth is called spiral growth. The spiral structure indicates that screw dislocations or mixed dislocations exist at the tops of the hillock structures. The density of the hillock structures on the surface of the electron injection layer is approximately equal to the density of screw dislocations and mixed dislocations present in the AlN template layer 20, and does not depend much on the growth conditions of the electron injection layer.

[0151] Fig. 10G shows a differential interference microscope image of the surface of the top electron injection layer (buffer layer thickness: 250 nm, electron injection layer thickness: 1500 nm) in a stack grown on an AlN template formed by MOVPE. Compared to the morphology in Fig. 10A, small hillock structures are densely formed, indicating rather high surface flatness.

[0152] 10H and 10I show differential interference microscope images of the surface of the top electron injection layer (buffer layer thickness: 150 nm, electron injection layer thickness: 150 nm) grown on an AlN template by MOVPE. Referring to Fig. 10H, a high density of small hillock structures is observed.

[0153] Fig. 10I is an enlarged view of Fig. 10H. Referring to Fig. 10I, spiral growth occurs at the top of the hillock structure, similar to Figs. 10E and 10F, and a spiral structure is formed at the top of the hillock structure. Even in small, high-density hillock structures, atomic step-terrace structures grow spirally from high-density screw dislocations or mixed dislocations as initiation points during AlGaN growth.

[0154] 11A to 11E are diagrams showing the surface morphology of an epitaxial surface (AlGaN film with a thickness of 1.5 μm and an Al composition of 0.75) photographed by a differential interference microscope. The growth conditions were a growth temperature of 1150°C, a growth rate of 3.3 μm, and an NH ３ 11A shows a differential interference microscope image of the electron injection layer 50 on a sapphire substrate with an off-angle of 0.2 degrees. FIG. 11B shows a differential interference microscope image of the electron injection layer 50 on a sapphire substrate with an off-angle of 0.4 degrees. FIG. 11C shows a differential interference microscope image of the electron injection layer 50 on a sapphire substrate with an off-angle of 0.6 degrees. FIG. 11D shows a differential interference microscope image of the electron injection layer 50 on a sapphire substrate with an off-angle of 0.8 degrees. FIG. 11E shows a differential interference microscope image of the sapphire substrate with an off-angle of 1.0 degrees. Comparing FIGS. 11A to 11E, the size of the hillock structures in the electron injection layer 50 decreases as the off-angle of the sapphire substrate increases.

[0155] 12A to 12C are drawings showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. Specifically, FIG. 12A shows an atomic force microscope image of the electron injection layer 50 grown at a substrate temperature of 1050°C. FIG. 12B shows an atomic force microscope image of the electron injection layer 50 grown at a substrate temperature of 1100°C. FIG. 12C shows an atomic force microscope image of the electron injection layer 50 grown at a substrate temperature of 1150°C. Comparing FIGS. 12A to 12C, as the growth temperature in the growth of the electron injection layer 50 increases, the height and horizontal length of the hillock structures decrease, i.e., the size of the hillock structures decreases.

[0156] 13A to 13C are diagrams showing the surface morphology of an epitaxial surface (an AlGaN film having a thickness of 1.0 μm and an Al composition of 0.75) photographed by an atomic force microscope. The growth conditions were a growth temperature of 1150° C. and NH ３ The epitaxial structure includes a buffer layer 40 having a thickness of 250 nm and an electron injection layer 50 having a thickness of 1500 nm. Specifically, FIG. 13A shows an atomic force microscope image of the electron injection layer 50 grown at a growth rate of 500 nm / h. FIG. 13B shows an atomic force microscope image of the electron injection layer 50 grown at a growth rate of 1200 nm / h. FIG. 13C shows an atomic force microscope image of the electron injection layer 50 grown at a growth rate of 1500 nm / h. Comparing FIGS. 13A to 13C, as the growth rate of the electron injection layer 50 decreases, the height and horizontal length of the hillock structures decrease, i.e., the size of the hillock structures decreases.

[0157] 14A to 14C are drawings showing the surface morphology of an epitaxial surface (an AlGaN film having a thickness of 1.0 μm and an Al composition of 0.75) photographed by an atomic force microscope. ３ 14B shows an atomic force microscope image of the electron injection layer 50 grown at a hydrogen partial pressure of 4.0 kPa (18.9 kPa). ３ 14C shows an atomic force microscope image of the electron injection layer 50 grown at a hydrogen partial pressure of 7.5 kPa (15.6 kPa). ３14A to 14C show atomic force microscope images of the electron injection layer 50 grown at a hydrogen partial pressure of 12.0 kPa. ３ When the partial pressure is increased, the height and horizontal length of the hillock structure are reduced, i.e., the size of the hillock structure is reduced.

[0158] 15A to 15C are drawings showing the surface morphology of the epitaxial surface photographed by atomic force microscope. Specifically, FIG. 15A shows an atomic force microscope image of the AlN homoepitaxial layer 30. FIG. 15B shows an atomic force microscope image of the electron injection layer 50 (30 nm) grown on the AlN homoepitaxial layer 30 without using a buffer layer 40. FIG. 15C shows an atomic force microscope image of the electron injection layer 50 (1000 nm) grown on the AlN homoepitaxial layer 30 without using a buffer layer 40. These observations were made on an observation area that did not contain either screw dislocations or mixed dislocations.

[0159] Figures 15D to 15F are drawings showing schematic sketches of the atomic step-terrace structure in the atomic force microscope images of Figures 15A to 15C, respectively. The arrows in Figures 15A to 15C indicate the a-axis direction of the sample (off-direction from the substrate surface). The long and short arrows in Figure 15F represent the speed of step progression, and their magnitudes. Figures 15G to 15I show schematic sketches of the epitaxial structures of Figures 15A to 15C, respectively.

[0160] Atomic step-terrace structures appear in all of Figures 15A to 15C. Figure 15A shows a regularly arranged atomic step-terrace structure, as depicted in the schematic sketch of Figure 15D. Figures 15B and 15C show a periodically meandering atomic step-terrace structure, as depicted in the schematic sketches of Figures 15E and 15F. The meandering of atomic steps deteriorates the surface morphology of the epitaxial structure.

[0161] FIGS. 16A to 16C are diagrams showing the surface morphology of an epitaxial surface photographed with an atomic force microscope. Specifically, FIG. 16A shows an enlarged view of the meandering area of ​​the atomic steps in FIG. 15C. The arrow AR in FIG. 16A indicates the a-axis direction of the epitaxial structure (off-axis direction of the substrate surface). FIG. 16B is a diagram schematically showing the slowness and speed of atomic step growth. In FIG. 16B, the long and short arrows represent the magnitude of the growth rate of the atomic steps. FIG. 16C shows a schematic sketch of a pit caused by the meandering of atomic steps in the atomic force microscope image of FIG. 16A. The meandering of atomic steps is caused by the difference in the magnitude of the growth rate of the atomic step terrace structure. Specifically, the slow-growing region of the atomic step terrace structure is depressed relative to the fast-growing regions of the atomic step terrace structure on either side. This depression is a deep groove-like structure and is a defect referred to as a pit. Pits generated in the semiconductor of the conduction path of the light-emitting device cause non-radiative recombination of electrons and holes, reducing the light-emitting efficiency of the light-emitting device. Furthermore, pits in the electron injection layer 50 are inherited by the active layer 60 grown thereon. Therefore, the meandering of the atomic step terrace structure in the electron injection layer 50 and the resulting pit formation may reduce the light-emitting efficiency of the light-emitting device using the electron injection layer 50.

[0162] 17A to 17C are drawings showing the surface morphology of the epitaxial surface photographed by atomic force microscope. Specifically, FIG. 17A shows an atomic force microscope image of a 1000 nm electron injection layer 50 grown on a sapphire substrate with an off-angle of 0.1 degrees. FIG. 17B shows an atomic force microscope image of a 1000 nm electron injection layer 50 grown on a sapphire substrate with an off-angle of 0.2 degrees. FIG. 17C shows an atomic force microscope image of a 1000 nm electron injection layer 50 grown on a sapphire substrate with an off-angle of 0.3 degrees. FIGS. 17D and 17E are drawings showing sketches of the surface morphologies shown in FIGS. 17A and 17B, respectively. The surface morphology in FIG. 17C shows step bunching.

[0163] Comparing FIGS. 17A to 17C, it is clear that the flatness of the area away from the hillock structure on the surface of the electron injection layer 50 can be improved by using a sapphire substrate with a small off-angle.

[0164] FIGS. 18A to 18C are drawings showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. Specifically, FIG. 18A shows an atomic force microscope image of the electron injection layer 50 grown at a substrate temperature of 1050°C. FIG. 18B shows an atomic force microscope image of the electron injection layer 50 grown at a substrate temperature of 1100°C. FIG. 18C shows an atomic force microscope image of the electron injection layer 50 grown at a substrate temperature of 1150°C. FIGS. 18D to 18F are drawings showing schematic sketches of the atomic step-terrace structure in the atomic force microscope images of FIGS. 18A to 18C, respectively. The arrows in FIGS. 18D to 18F indicate the a-axis direction of the sample (off-direction of the substrate surface).

[0165] 18A to 18C, the surface roughness caused by the meandering of the atomic step terrace structure is suppressed as the growth temperature in the growth of the electron injection layer 50 is lowered. By lowering the growth temperature of the electron injection layer 50, the surface flatness of the area away from the hillock structure on the surface of the electron injection layer 50 can be improved.

[0166] 19A and 19B are drawings showing the surface morphology of the epitaxial surface photographed by atomic force microscope. The epitaxial structure includes a 250 nm thick buffer layer 40 and a 1500 nm thick electron injection layer 50. FIGS. 19C and 19D are drawings showing schematic sketches of the atomic step-terrace structure in the atomic force microscope images of FIGS. 19A and 19B, respectively. The arrows in FIGS. 19C and 19D indicate the a-axis direction of the epitaxial substrate (the off-axis direction of the substrate surface). Specifically, FIG. 19A shows an atomic force microscope image of the electron injection layer 50 grown at a growth rate of 400 nm / h. FIG. 19B shows an atomic force microscope image of the electron injection layer 50 grown at a growth rate of 3500 nm / h.

[0167] 19A and 19B, it can be seen that increasing the growth rate of the electron injection layer 50 suppresses the meandering of the atomic step terrace structure and the resulting formation of surface roughness. By increasing the growth rate of the electron injection layer 50, the surface flatness of the area away from the hillock structure on the surface of the electron injection layer 50 can be improved.

[0168] 20A to 20C are photographs showing the surface morphology of the epitaxial surface taken by an atomic force microscope. ３ 20B shows an atomic force microscope image of the electron injection layer 50 grown at a partial pressure (30 kPa total pressure). ３ 20C shows an atomic force microscope image of the electron injection layer 50 grown at partial pressure (40 kPa total pressure). ３ 20A to 20C show atomic force microscope images of the electron injection layer 50 grown under partial pressure (total pressure of 50 kPa). Figures 20D to 20F are drawings showing schematic sketches of the atomic step-terrace structure in the atomic force microscope images of Figures 20A to 20C, respectively.

[0169] 20A to 20C, the NH ３ When the partial pressure is low, the meandering of the atomic step terrace structure and the resulting formation of surface roughness are suppressed. ３ By lowering the partial pressure, the surface flatness of the area away from the hillock structure on the surface of the electron injection layer 50 can be improved.

[0170] (Comparison of Surface Flatness of Two-Step Grown AlGaN with MOVPE-AlN Template) FIGS. 21A to 21F are drawings showing the surface morphology of the epitaxial surface photographed by an atomic force microscope. Specifically, FIGS. 21A and 21D show the surface of an electron injection layer 50 according to an embodiment, which includes two layers: a first electron injection layer 51 and a second electron injection layer 52. The growth temperature and film thickness of the first electron injection layer are 1150°C and 1000 nm, respectively, and the growth temperature and film thickness of the second electron injection layer are 1050°C and 100 nm, respectively. FIGS. 21B and 21E show the surface of a single electron injection layer grown at a growth temperature of 1150°C. FIGS. 21C and 21F show the surface of a reference example, a single electron injection layer (referred to as "reference example") grown on an AlN template layer by MOVPE on a sapphire substrate. The single electron injection layer is formed at a growth temperature of 1150° C. The RMS values ​​are 0.365 nm in FIG. 21A, 0.465 nm in FIG. 21B, and 1.145 nm in FIG. 21C.

[0171] 21A and 21B with 21D and 21E, when the electron injection layer 50 is composed of two layers, a first electron injection layer 51 and a second electron injection layer 52, by stacking the second electron injection layer at a lower temperature than the first electron injection layer, an increase in hillock size is suppressed and the surface roughness caused by the meandering of the atomic step terrace structure is also reduced. In other words, the surface flatness of the electron injection layer 50 is improved.

[0172] 21A and 21B with 21C and 21F, respectively, the RMS value of the surface roughness of the electron injection layer 50 according to the embodiment is smaller than the RMS value of the surface roughness of the single electron injection layer according to the reference example. The AlN template layer 20 according to the embodiment has a low dislocation density with respect to screw dislocations and mixed dislocations, and therefore, spiral growth is less likely to occur.

[0173] Regarding the surface morphology of the epitaxial structure according to this example, the second electron injection layer 51 has a surface roughness RMS of 0.4 nm or less obtained from an atomic force microscope image.

[0174] 22A and 22B are graphs showing the peak energy distributions of cathodoluminescence (CL) on the surface of a two-layer electron injection layer 50 according to an embodiment and on the surface of a single-layer electron injection layer, respectively. Cathodoluminescence provides an image of electrons emitted when the vicinity of a semiconductor surface is excited with an electron beam. The measurement device used was a CL system (MP-32S, manufactured by HORIBA, Ltd.) installed in a scanning electron microscope (JEM7100, manufactured by JEOL Ltd.).

[0175] Specifically, FIG. 22A shows a CL mapping image obtained by CL measurement (electron beam acceleration voltage: 5 kV) of the surface vicinity of a two-layer electron injection layer 50 (first electron injection layer 51: film thickness: 500 nm, second electron injection layer 52: film thickness: 100 nm) according to the embodiment. FIG. 22B shows a CL mapping image obtained by CL measurement (electron beam acceleration voltage: 5 kV) of the surface vicinity of a single-layer electron injection layer (film thickness: 600 nm). At this acceleration energy, CL emission originates from the electron injection layer. The CL peak energy corresponds to the band gap energy of the semiconductor of interest, and the band gap energy of AlGaN corresponds to the Al composition. The peak energy of the CL mapping image corresponds to the Al composition of the electron injection layer 50, with regions with high peak energy having a relatively high Al composition compared to the surrounding area, and conversely, regions with low peak energy having a relatively low Al composition compared to the surrounding area.

[0176] 22A, the standard deviation is 2.57 meV, while in Fig. 22B, the standard deviation is 4.95 meV. In the electron injection layer 50 having a two-layer structure, fluctuations in emission energy on the order of micrometers are suppressed, and the electron injection layer 50 has superior uniformity of Al composition compared to the electron injection layer having a single-layer structure.

[0177] Surface morphology affects the efficiency of gallium atom incorporation, so low flatness leads to uneven composition. The variation in Al composition can be calculated from the variation in peak energy of the cathodoluminescence image (standard deviation / average energy). The variation in Al composition in Figure 22A can be calculated to be 0.09%, and in Figure 22B it can be calculated to be 0.16%. Taking measurement error into consideration, a variation of 0.1% or less can provide good surface flatness. Furthermore, a variation of 0.09% or less can provide good surface flatness.

[0178] Comparing FIGS. 22A and 22B , the two-layer electron injection layer 50 has a small standard deviation of the peak energy. The small in-plane variation in the peak energy indicates high in-plane uniformity of the Al composition of the electron injection layer 50. The small in-plane variation indicates high surface flatness of the two-layer electron injection layer 50 according to the embodiment. Specifically, when the surface flatness of the electron injection layer decreases and the roughness increases, the atomic step-terrace structure on the surface of the electron injection layer varies in density. In regions where the atomic step-terrace structure is densely present, the Ga source material supplied from the vapor phase during crystal growth is likely to adsorb, resulting in the growth of AlGaN with a relatively low Al composition. On the other hand, in regions where the density of the atomic step-terrace structure is low, the Ga source material supplied from the vapor phase during crystal growth is likely to re-desorb, resulting in the growth of AlGaN with a relatively high Al composition. The two-layer electron injection layer 50 has high surface flatness, and the in-plane uniformity of the density of the atomic step-terrace structure on the surface of the electron injection layer 50 is high. In the epitaxial structure according to the embodiment, the in-plane fluctuation of the Al composition caused by the density fluctuation of the atomic step terrace structure is improved.

[0179] When an additional electron injection layer is deposited on a single-layer electron injection layer using the growth conditions for the second layer (the growth conditions for the second electron injection layer 52, specifically, at least one of the first to third conditions) for forming the two-layer electron injection layer 50, a small energy deviation in a CL image is provided on the surface of the additional electron injection layer. Specifically, by growing one or more additional electron injection layers using at least one of the first to third conditions, the in-plane uniformity of the density of the atomic step-terrace structure is improved, and the RMS surface roughness at the start of growth of the additional electron injection layer decreases as the additional electron injection layer grows. The improved linearity of the step-terrace structure can reduce the energy deviation in a CL image and the RMS surface roughness on the surface of the additional electron injection layer. The in-plane distribution of a Group III element (e.g., Al atoms) in the additional electron injection layer exhibits higher uniformity than the in-plane distribution of a Group III element (e.g., Al atoms) in the underlying electron injection layer (single-layer electron injection layer). Specifically, if CL images of the individual growth surfaces can be captured, the energy deviation in the CL images of the deposition of the second layer will be smaller than that of the first layer (e.g., the energy deviation in the cathodoluminescence images will be less than 4.95 meV). By way of example and not limitation, the energy deviation in the CL images of the lower electron injection layer of the electron injection layer 50 is, for example, 3.76 meV or more, while the energy deviation in the CL images of the upper electron injection layer becomes, for example, less than 3.76 meV due to the growth of the second layer. 3.76 meV is the arithmetic mean of the standard deviations of 2.57 meV and 4.95 meV.

[0180] According to the CL image of the epitaxial surface in this example, the second electron injection layer 51 according to this example has an Al composition variation of 0.1% or less.

[0181] When a CL image of the vicinity of the surface of an active layer (e.g., active layer 114) grown continuously on the surface of the electron injection layer 50 having a two-layer structure according to the embodiment (a surface having the above-described quality) was measured, the standard deviation of the emission peak in the CL image was 3.51 meV. This value is significantly reduced compared to the standard deviation of 6.86 meV of the emission spectrum in one-step growth. This indicates that the difference in value is large compared to the compositional variation of the underlying electron injection layer, and that the surface roughness of the electron injection layer has a significant impact on the compositional uniformity of the active layer, which is made up of multiple layers with different compositions and film thicknesses.

[0182] 23A and 23B are drawings showing X-ray diffraction (XRD) reciprocal space mapping (RSM) images. Specifically, FIG. 23A shows a reciprocal space mapping image of a nitride semiconductor epitaxial substrate including a template layer 20 and two electron injection layers 50 according to an embodiment. FIG. 23B shows a reciprocal space mapping image of a nitride semiconductor epitaxial substrate including an MOVPE-AlN template and a single electron injection layer according to a reference example. In FIGS. 23A and 23B, the vertical axis of the XRD-RSM image is qc, and the horizontal axis is qm. qc represents the reciprocal of the distance between crystal planes perpendicular to the c-axis in a hexagonal crystal structure, and qm represents the reciprocal of the distance between crystal planes perpendicular to the m-axis in a hexagonal crystal structure. The values ​​of qc and qm corresponding to the peaks of the signals originating from each layer correspond to the reciprocals of the lattice spacings of the (0005) plane and the (10-10) plane, respectively.

[0183] The following values ​​are estimated from the XRD-RSM image according to the embodiment: (Table 1) Layer name Al composition a-axis lattice constant c-axis lattice constant In-plane strain (ε ａ) AlN 100% 0.31008 0.49906 -0.329% (template layer). ud-AlGaN layer 86.8% 0.31011 0.50252 -0.651% (first buffer layer). ud-AlGaN layer 77.4% 0.31019 0.50498 -0.861% (second buffer layer). n-AlGaN layer 77.4% 0.31019 0.50498 -0.861% (first electron injection layer). n-AlGaN layer 73.8% 0.31027 0.50588 -0.925% (second electron injection layer). MQWs well layer 42.5% 0.31034 −1.691% MQWs barrier layer 65.5% 0.31034 −1.113% The a-axis lattice constant and the c-axis lattice constant are expressed in nanometers (nm).

[0184] The following values ​​are estimated from the XRD-RSM image of the reference example. (Table 2) Layer Name a-axis Lattice Constant c-axis Lattice Constant AlN 0.31062 0.49863 (Template) AlGaN 0.31093 0.50493 The units of the a-axis lattice constant and the c-axis lattice constant are nanometers (nm). The Al composition of AlGaN is 75.1%. The relaxation rate of AlGaN relative to the AlN template is 12.8%. The in-plane strain rate (εa) of the AlN template is 0.15%. The in-plane strain rate (εa) of AlGaN is 0.68%.

[0185] The AlN template layer 20 and the AlN homoepitaxial layer 30 appear as a single peak. The lattice relaxation rate of the buffer layer 40 relative to the AlN layer is approximately 0, and the buffer layer 40 maintains the crystallinity of the AlN layer. In the above table, "AlN" represents the AlN template layer 20 and the AlN homoepitaxial layer 30.

[0186] The a-axis lattice constant of the AlN according to the example is smaller than that of the AlN according to the reference example, and the absolute value of the in-plane strain rate of the AlN layer according to the example is larger, which means that the AlN layer has a strong compressive strain in the in-plane direction.

[0187] The relaxation rate of the electron injection layer 50 according to the example is smaller than that of the electron injection layer of the reference example. This means that the AlN layer according to the example has a low threading dislocation density and provides a base for the electron injection layer 50.

[0188] The electron injection layer 50 according to the example exhibits a larger absolute value than the reference example, which means that the electron injection layer 50 has a strong in-plane compressive strain. The strong in-plane compressive strain in the electron injection layer 50 is a result of the large compressive strain AlN layer and the small relaxation rate of the electron injection layer 50 relative to the AlN layer.

[0189] 23A and 23B and Table 1, according to the reciprocal lattice mapping of the above-described epitaxial structure, in the epitaxial structure according to this example, the first electron injection layer 52 has a lattice relaxation rate of 2% or less with respect to the template layer 20.

[0190] 23A and 23B and Table 1, according to the reciprocal lattice mapping of the above epitaxial structure, in the epitaxial structure according to this example, the AlGaN of the well layer 61 in the active layer 60 has a compressive strain of 1.5% or more.

[0191] FIG. 24 is a diagram showing the results of an analysis (impurity concentration distribution in the depth direction) of a nitride semiconductor stack (two electron injection layers) according to an embodiment using a SIMS method. The vertical axis represents ion count, and the horizontal axis represents depth from the surface of the nitride semiconductor stack. The uppermost layer of the nitride semiconductor stack is the electron injection layer 50, and the film thickness of the electron injection layer 50 is 1300 nm. Layer Name Horizontal Axis Range (Depth Related to SIMS Analysis) Second electron injection layer 51 0.1 to 0.2 μm (n-AlGaN) First electron injection layer 52 0.2 to 1.4 μm (n-AlGaN) Buffer layer 40 1.4 to 1.7 μm (AlGaN buf.) (UID AlGaN) AlN homoepitaxial layer 30 1.7 to 1.8 μm. (MOVPE-AlN) AlN template layer 20: 1.8 to 2.0 μm. (FFA-AP-AlN) The ion species analyzed were hydrogen (H), carbon (C), oxygen (O), and silicon (Si). In this analysis, the nitride semiconductor stack (two electron injection layers) had 9.0×10 ions of hydrogen (H) in the first electron injection layer 51. １６ cm －３ , carbon (C) is 2.8 × 10 １６ cm －３ , oxygen (O) is 1.8 × 10 １６ cm －３ , silicon "Si" is 1.7 x 10 １９ cm －３ Regarding the second electron injection layer 52, oxygen (O) is 2.4×10 １６ cm －３The concentrations of other elements are substantially the same as those of the first electron injection layer 51. The second electron injection layer 52 has a higher oxygen concentration than the first electron injection layer 51. This is because the substrate temperature of the second electron injection layer 52 is lower than that of the first electron injection layer 51. Even if the first electron injection layer 51 and the second electron injection layer 52 have substantially the same Al composition, the first electron injection layer 51 and the second electron injection layer 52 can be distinguished from each other by the concentration distribution of impurities, such as oxygen. The first electron injection layer 51 and the second electron injection layer 52 can differ from each other in terms of the concentration of at least one element selected from the hydrogen concentration, carbon concentration, and oxygen concentration. In the examples, the electron injection layer 50 exhibits low values ​​of H, C, and O close to the detection limit. A low impurity concentration contributes to suppressing light absorption in the electron injection layer 50.

[0192] 25A to 25H are diagrams showing the relationship between some characteristics of light-emitting diodes according to the embodiment and the in-plane lattice constant of the electron injection layer 50. These relationships were determined by simulation. In the simulation model, the active layer 60, the electron blocking layer 70, and the hole injection layer 80 have the same in-plane lattice constant as the electron injection layer 50, which is satisfied by the active layer 60, the electron blocking layer 70, and the hole injection layer 80 being grown coherently with respect to the electron injection layer 50. The contact layer 90 has a lattice relaxation rate of 0.8 (80%) relative to the electron injection layer 50. More specifically, the horizontal axis in each of FIGS. 25A to 25H represents the in-plane lattice constant of the electron injection layer 50, which was varied as a parameter when calculating the characteristics of the light-emitting diodes according to the embodiment. 25A to 25H, the vertical axes respectively represent the internal quantum efficiency, operating voltage, electron injection efficiency, current leakage rate, electron barrier height, hole barrier height, quantum well overlap integral, and emission wavelength peak of the light-emitting diode according to the embodiment. The internal quantum efficiency, operating voltage, electron injection efficiency, current leakage rate, electron barrier height, hole barrier height, quantum well overlap integral, and emission wavelength peak are shown at an injection current density of 100 A / cm. ２ This was derived from simulations in

[0193] 25A is a diagram showing the relationship between the internal quantum efficiency of the light-emitting diode according to the embodiment and the in-plane lattice constant of the electron injection layer 50. The internal quantum efficiency increases as the in-plane lattice of the electron injection layer 50 becomes smaller.

[0194] 25B is a diagram showing the relationship between the operating voltage of the light-emitting diode according to the embodiment and the in-plane lattice constant of the electron injection layer 50. The operating voltage increases as the in-plane lattice constant of the electron injection layer 50 becomes smaller.

[0195] 25C is a diagram showing the relationship between the electron injection efficiency of the light-emitting diode according to the embodiment and the in-plane lattice constant of the electron injection layer 50. The current injection efficiency increases as the in-plane lattice constant of the electron injection layer 50 becomes smaller.

[0196] 25D is a diagram showing the relationship between the current leakage rate of a light-emitting diode according to an embodiment and the in-plane lattice constant of the electron injection layer 50. The current leakage rate is the proportion of the current input to the light-emitting diode that is carried by electrons that reach the p-side electrode without recombining within the light-emitting diode and holes that reach the n-side electrode. The contribution of holes that reach the n-side electrode is negligibly small, and therefore the current leakage rate is determined by the proportion of electrons that reach the p-side electrode. The current leakage rate of a light-emitting diode decreases as the in-plane lattice of the electron injection layer 50 becomes smaller.

[0197] 25E is a diagram showing the relationship between the electron barrier height and the in-plane lattice constant of the electron injection layer 50 in a light-emitting diode according to an embodiment. The electron barrier height is the magnitude of the effective energy barrier for electrons in the electron blocking layer 70. Specifically, the electron barrier height is the maximum value of the energy difference between the conduction band and the pseudo-Fermi level of electrons in the electron blocking layer 70. The electron barrier height increases as the in-plane lattice of the electron injection layer 50 decreases.

[0198] 25F is a diagram showing the relationship between the hole barrier height and the in-plane lattice constant of the electron injection layer 50 in a light-emitting diode according to an embodiment. The hole barrier height is the magnitude of the effective energy barrier for holes in the electron blocking layer 70. Specifically, it is the maximum value of the energy difference between the valence band and the pseudo-Fermi level of holes in the electron blocking layer 70. The hole barrier height of a light-emitting diode increases as the in-plane lattice of the electron injection layer 50 decreases.

[0199] 25G is a diagram showing the relationship between the square of the overlap integral of the electron wave function and the hole wave function in the active layer 60 of the light-emitting diode according to the embodiment and the in-plane lattice constant of the electron injection layer 50. Specifically, FIG. 25G shows the square of the overlap integral of the electron wave function and the heavy hole (HH) wave function for the well layer 61 (first quantum well) closest to the electron injection layer 50 and the well layer 61 (second quantum well) second closest to the electron injection layer 50. This overlap integral increases as the in-plane lattice of the electron injection layer 50 becomes smaller.

[0200] 25H is a diagram showing the relationship between the emission wavelength peak of the light-emitting diode according to the embodiment and the in-plane lattice constant of the electron injection layer 50. The emission wavelength peak becomes shorter as the in-plane lattice of the electron injection layer 50 becomes smaller.

[0201] The results shown in Figures 25A to 25H are based on the following physical image. As the in-plane lattice constant of the electron injection layer 50 decreases, the compressive strain applied to the active layer 60 and the electron blocking layer 70 increases. The increase in compressive strain causes a change in the piezoelectric polarization, altering the band lineup. This change increases the electron barrier height and the hole barrier height. This increase allows the electron blocking layer 70 to more effectively suppress electron overflow, resulting in a decrease in the current leakage rate and an increase in the carrier injection efficiency and internal quantum efficiency. The increase in the electron barrier height and the hole barrier height also increases the operating voltage. Furthermore, as the in-plane lattice constant of the electron injection layer 50 decreases, the compressive strain applied to the active layer 60 increases, resulting in a change in the piezoelectric polarization, which alters the internal electric field of the active layer 60. This change weakens the quantum confined Stark effect (QCSE) and increases the overlap integral of the electron and hole wave functions in the active layer 60. The increased overlap integral increases the radiative recombination probability, resulting in higher internal quantum efficiency. Furthermore, the reduction in QCSE increases the effective bandgap energy of the quantum well, which shifts the emission wavelength to shorter wavelengths. Therefore, the light-emitting diode according to the embodiment has a compressively strained electron injection layer 50 and therefore exhibits excellent device characteristics.

[0202] 26A to 26C are diagrams showing the relationship between the Al composition of the active layer and the total polarization (the sum of spontaneous polarization and piezoelectric polarization). Specifically, FIG. 26A shows the relationship ("Coh.") between the total polarization of AlGaN with an in-plane lattice constant of 0.3098 nm (i.e., AlGaN coherently grown on the AlN template layer 20) and the Al composition of the well layer or barrier layer, and the relationship ("Rel.") between the total polarization of AlGaN with an in-plane lattice constant of 0.3130 nm (i.e., AlGaN grown on fully relaxed AlGaN (Al composition 0.75)) and the Al composition of the well layer or barrier layer. FIG. 26B is a partially enlarged view of FIG. 26A. Referring to FIG. 26B, the difference in total polarization between the well layer 61 with an Al composition of 0.51 and the barrier layer 62 with an Al composition of 0.66 is estimated. For AlGaN with an in-plane lattice constant of 0.3098 nm, the total polarization difference is 0.01123 C / m ２ On the other hand, in AlGaN with an in-plane lattice constant of 0.3130 nm, the total polarization difference is 0.01296 C / m ２ When the electron injection layer 50 has compressive strain, the difference in total polarization between the well layer 61 and the barrier layer 62 of the active layer 60 on the electron injection layer 50 is reduced. FIG. 26C is a diagram showing the internal electric field of the active layer 60 on the electron injection layer 50 with an in-plane lattice constant of 0.3098 nm and the internal electric field of the active layer on the electron injection layer 50 with an in-plane lattice constant of 0.3130 nm. The strong compressive strain derived from the template layer 20 reduces the total polarization difference between the well layer 61 and the barrier layer 62. A small total polarization difference can reduce the absolute value of the internal electric field of the well layer 61 of the active layer 60. A well layer 61 with a small internal electric field alleviates QCSE.

[0203] 27A and 27B are diagrams showing the emission spectra of light-emitting diodes according to the Reference Example and the Example. FIG. 27A shows the normalized emission spectrum intensity of both light-emitting diodes, and FIG. 27B shows the unnormalized emission spectrum intensity of both light-emitting diodes. Specifically, these diagrams show the emission spectrum "2SG" of a light-emitting diode using two electron injection layers 50 (two-step growth: 2SG) and the emission spectrum "Ref." of a light-emitting diode using a single electron injection layer. The emission spectrum "2SG" has a half-width of 9.6 nm at an emission wavelength of 263.6 nm. The emission spectrum "Ref." has a half-width of 11.5 nm at an emission wavelength of 260.8 nm.

[0204] The half width of the emission spectrum of the light emitting diode according to this embodiment is less than 11.5 nm, and can be 10 nm or less.

[0205] The following describes the technical background of the electron injection layer 50 (the first electron injection layer 52 and the second electron injection layer 51). The Al composition of the electron injection layer 50 (for example, n-type AlGaN) underlying the active layer 60 of a deep-ultraviolet light-emitting diode must satisfy the following technical requirements.

[0206] First, deep ultraviolet light from the active layer must be able to transmit through the underlying electron injection layer 50. Specifically, if the emission wavelength is 285 nm, the AlGaN of the electron injection layer 50 must have an Al composition of 40% or more. If the emission wavelength is 265 nm, the AlGaN of the electron injection layer 50 must have an Al composition of 60% or more. If the emission wavelength is 230 nm, the AlGaN of the electron injection layer 50 must have an Al composition of 90% or more.

[0207] Second, the AlGaN of the electron injection layer 50 is grown at a lattice relaxation rate of 2% or less relative to the underlying semiconductor. Misfit dislocations generated by lattice relaxation of the AlGaN of the electron injection layer 50 reduce the compressive strain in the active layer and decrease the light-emitting efficiency. To prevent lattice relaxation of the AlGaN of the electron injection layer 50, the AlGaN of the electron injection layer 50 is grown at a lattice relaxation rate of 2% or less relative to the underlying AlN template layer or AlN substrate. To achieve this, the Al composition of the AlGaN of the electron injection layer 50 is typically desirably 50% or more, more desirably 60% or more, and even more desirably 70% or more. From the perspective of growth on AlN, it is preferable that the AlGaN of the electron injection layer 50 have a larger Al composition.

[0208] The following describes the characteristics of an AlN template substrate fabricated on a sapphire substrate. AlN film thickness Annealing temperature AlN (0002) AlN (10-12) 120 nm 1725°C 60 arcsec 397 arcsec 165 nm 1725°C 43 arcsec 323 arcsec 250 nm 1725°C 36 arcsec 255arcsec 500nm 1725℃ 39arcsec 186arcsec 500nm 1500℃ 90arcsec 359arcsec 500nm 1525℃ 100arcsec 368arcsec 500nm 1550℃ 33 arcsec 258 arcsec 500nm 1600℃ 32arcsec 227 arcsec

[0209] AlN film thickness Annealing temperature AlGaN (0002) AlGaN (10-12) 120 nm 1725°C 111 arcsec 443 arcsec 165 nm 1725°C 73 arcsec 337 arcsec 250 nm 1725°C 56arcsec 266arcsec 500nm 1725℃ 42arcsec 170arcsec 500nm 1500℃ 251arcsec 474arcsec 500nm 1525℃ 252arcsec 474arcsec 500nm 1550℃ 127arcsec 316arcsec 500nm 1600℃ 88 arcsec 217 arcsec

[0210] Several aspects of the present invention will be described below.

[0211] The III-nitride light-emitting device according to the first aspect includes a support having a primary surface made of a material other than a III-nitride, and an Al (10-12) plane having an X-ray rocking curve half width of 1000 arcsec or less. Ｘ Ga １－Ｘ the n-type Group III nitride semiconductor region includes a first n-type Group III nitride semiconductor layer provided between the template layer and the active layer, and a second n-type Group III nitride semiconductor layer provided between the first n-type Group III nitride semiconductor layer and the active layer, the first n-type Group III nitride semiconductor layer having a lattice relaxation rate of 2% or less relative to the template layer, and the second n-type Group III nitride semiconductor layer having a surface roughness of 0.4 nm or less.

[0212] According to this light-emitting device, the second n-type Group III nitride semiconductor layer having a surface roughness of 0.4 nm or less is provided on the first n-type Group III nitride semiconductor layer, so that lattice relaxation of the active layer can be avoided and compressive strain can be imparted to the active layer. Ｘ Ga １－Ｘ Since the first n-type Group III nitride semiconductor layer having a lattice relaxation rate of 2% or less with respect to the template layer is provided on the N template layer, compressive strain contained in the template layer can be imparted to the second n-type semiconductor layer.

[0213] In the group III nitride light-emitting device according to the first aspect, the AlGaN of the active layer can have a compressive strain of 1.5% or more.

[0214] This light-emitting device can provide a compressive strain of 1.5% or more to the well layer of the active layer.

[0215] In the III-nitride light-emitting device according to the first aspect, the III-nitride light-emitting device can have an emission spectrum half-width of 10 nm or less.

[0216] According to this light-emitting device, the above structure enables the active layer to generate light with a half-width of the emission spectrum of 10 nm or less.

[0217] In the group III nitride light-emitting device according to the first aspect, the active layer may include compressively strained well layers and compressively strained barrier layers.

[0218] In this light-emitting device, the compressive strain in the well layers and the compressive strain in the barrier layers can enhance the light emission from the active layer due to the quantum confined Stark effect.

[0219] In the light-emitting device according to the first aspect, the Al of the template layer Ｘ Ga １－Ｘ The N can be AlN.

[0220] According to this light-emitting device, Al Ｘ Ga １－Ｘ N provides the template layer with AlN containing compressive strain, which is the source of the strain applied to the active layer.

[0221] In the light-emitting device according to the first aspect, the first n-type Group III nitride semiconductor layer may have a thickness greater than a thickness of the second n-type Group III nitride semiconductor layer, and the first Al composition of the first n-type Group III nitride semiconductor layer may be greater than the second Al composition of the second n-type Group III nitride semiconductor layer.

[0222] In this light-emitting device, the relationship between the Al composition and the film thickness makes it easy to provide an active layer containing compressive strain on the template layer while avoiding relaxation of AlGaN in the first n-type Group III nitride semiconductor layer and the second n-type Group III nitride semiconductor layer.

[0223] In the Group III nitride light-emitting device pertaining to the first aspect, the first n-type Group III nitride semiconductor layer may have a thickness of 2800 nm or less, and the second n-type Group III nitride semiconductor layer may have a thickness of 200 nm or less.

[0224] In this light-emitting device, these thickness ranges make it easy to provide an active layer containing compressive strain on the template layer while avoiding relaxation of the AlGaN in the first n-type Group III nitride semiconductor layer and the second n-type Group III nitride semiconductor layer.

[0225] The III-nitride epitaxial wafer according to the second aspect comprises a substrate having a primary surface made of a material other than a III-nitride, and an Al epitaxial wafer having an X-ray rocking curve half-width of 1000 arcsec or less in the (10-12) plane. Ｘ Ga １－Ｘthe n-type Group III nitride semiconductor region includes a first n-type Group III nitride semiconductor layer provided between the template layer and the active layer, and a second n-type Group III nitride semiconductor layer provided between the first n-type Group III nitride semiconductor layer and the active layer, the first n-type Group III nitride semiconductor layer having a lattice relaxation rate of 2% or less with respect to the template layer, and the second n-type Group III nitride semiconductor layer having a surface roughness of 0.4 nm or less.

[0226] According to this epitaxial wafer, the second n-type Group III nitride semiconductor layer having a surface roughness of 0.4 nm or less is provided on the first n-type Group III nitride semiconductor layer, so that lattice relaxation of the active layer can be avoided and compressive strain can be imparted to the active layer. Ｘ Ga １－Ｘ Since the first n-type Group III nitride semiconductor layer having a lattice relaxation rate of 2% or less with respect to the template layer is provided on the N template layer, compressive strain contained in the template layer can be imparted to the second n-type Group III semiconductor layer.

[0227] In the Group III nitride epitaxial wafer according to the second aspect, the second n-type Group III nitride semiconductor layer can have an Al composition variation of 0.1% or less.

[0228] In this epitaxial wafer, the Ga incorporation efficiency is related to the surface morphology, and smoothing the surface of the group III nitride semiconductor layer makes it easier to achieve the Al composition variation within the above numerical range.

[0229] In the Group III nitride epitaxial wafer according to the second aspect, the substrate is made of any of carbon, boron nitride (BN), aluminum oxide (sapphire), ceramic, silicon carbide, refractory metal, zirconia, tantalum carbide (TaC), ScAlMgO ４ The material may include at least one of the following materials:

[0230] This epitaxial wafer provides an exemplary material for the substrate.

[0231] In the Group III nitride epitaxial wafer according to the second aspect, the substrate may have a hexagonal crystal structure, and the primary surface of the substrate may have an off-angle of 0.5 degrees or less with respect to a c-plane of the crystal structure.

[0232] This epitaxial wafer provides an exemplary angular range for the off-angle.

[0233] A method for fabricating a Group III nitride light-emitting device according to a third aspect includes: forming a substrate having a primary surface made of a material other than a Group III nitride; and forming an Al (10-12) layer having an X-ray rocking curve half-width of 1000 arcsec or less. Ｘ Ga １－Ｘand a template layer containing AlGaN (X is greater than 0 and less than or equal to 1) and covering the primary surface of the substrate; and growing, on the template layer, a Group III nitride stack including an n-type Group III nitride semiconductor region having a first n-type Group III nitride semiconductor layer containing an n-type dopant and a second n-type Group III nitride semiconductor layer containing an n-type dopant, and an active layer having a peak wavelength in the deep ultraviolet wavelength region of 285 nm or less and containing AlGaN, wherein the first n-type Group III nitride semiconductor layer is provided between the template layer and the active layer, and the second n-type Group III nitride semiconductor layer is provided between the first n-type Group III nitride semiconductor layer and the active layer, and Growing the nitride stack on the template layer includes growing the first n-type Group III nitride semiconductor layer and the second n-type Group III nitride semiconductor layer under at least any of the following conditions: a first condition that the growth temperature for growing the first n-type Group III nitride semiconductor layer is higher than the growth temperature for growing the second n-type Group III nitride semiconductor layer; a second condition that the growth rate for growing the first n-type Group III nitride semiconductor layer is slower than the growth rate for growing the second n-type Group III nitride semiconductor layer; and a third condition that the ammonia partial pressure for growing the first n-type Group III nitride semiconductor layer is higher than the ammonia partial pressure for growing the second n-type Group III nitride semiconductor layer.

[0234] According to this method for fabricating a light-emitting device, an Al (10-12) plane X-ray rocking curve half-width of 1000 arcsec or less can be obtained. Ｘ Ga １－Ｘ A first n-type Group III nitride semiconductor layer and a second n-type Group III nitride semiconductor layer are grown on the N template layer under at least one of a first condition, a second condition, and a third condition.

[0235] During the growth of the first n-type Group III nitride semiconductor layer, hillock generation and dislocation generation due to screw dislocations are suppressed, and during the growth of the second n-type Group III nitride semiconductor layer, a flatness superior to that of the first n-type Group III nitride semiconductor layer can be provided for the second n-type Group III nitride semiconductor layer. The AlGaN active layer of the Group III nitride stack is grown on this favorable underlayer. This improved flatness makes it possible to impart compressive strain to the active layer, thereby increasing the optical output (optical output per input power) from the active layer that emits light in the deep ultraviolet wavelength region of 285 nm or less.

[0236] In the method for fabricating a Group III nitride light-emitting device according to the third aspect, the growth temperature of the first n-type Group III nitride semiconductor layer can be 1100 degrees Celsius or higher, and the growth temperature of the second n-type Group III nitride semiconductor layer can be lower than 1100 degrees Celsius.

[0237] According to this manufacturing method, an exemplary growth temperature is provided in the second condition.

[0238] In the method for fabricating a Group III nitride light-emitting device according to the third aspect, the growth rate of the first n-type Group III nitride semiconductor layer may be 400 nm / h or less, and the growth rate of the second n-type Group III nitride semiconductor layer may be greater than 400 nm / h.

[0239] According to this manufacturing method, an exemplary growth rate is provided under the second condition.

[0240] In the method for fabricating a Group III nitride light-emitting device according to the third aspect, the ammonia partial pressure in the first n-type Group III nitride semiconductor layer may be 10 kPa or more, and the ammonia partial pressure in the second n-type Group III nitride semiconductor layer may be less than 10 kPa.

[0241] According to this manufacturing method, an exemplary ammonia partial pressure is provided in the third condition.

[0242] In the method for fabricating a Group III nitride light-emitting device according to the third aspect, the first n-type Group III nitride semiconductor layer may be an AlGaN layer having an Al composition of 0.7 or more, and the second n-type Group III nitride semiconductor layer may be an AlGaN layer having an Al composition of 0.7 or more.

[0243] According to this manufacturing method, these Al composition ranges make it easier to maintain straight growth steps during the growth of AlGaN of the second n-type Group III nitride semiconductor layer on the template layer, thereby reducing the generation of non-radiative centers due to step meandering.

[0244] In the method for fabricating a Group III nitride light-emitting device according to the third aspect, the first n-type Group III nitride semiconductor layer may have a thickness greater than a thickness of the second n-type Group III nitride semiconductor layer, and the first Al composition of the first n-type Group III nitride semiconductor layer may be greater than the second Al composition of the second n-type Group III nitride semiconductor layer.

[0245] According to this manufacturing method, the n-type Group III nitride semiconductor region includes two n-type Group III nitride semiconductor layers (e.g., n-type AlGaN layers) having different first and second Al compositions. By making the first Al composition larger than the second Al composition in this n-type Group III nitride semiconductor region and making the second n-type Group III nitride semiconductor layer thicker than the first n-type Group III nitride semiconductor layer, the second n-type Group III nitride semiconductor layer can be provided with a low dislocation density and good surface morphology derived from the template layer. Growing the first n-type Group III nitride semiconductor layer with a relatively high Al composition according to at least one of the first to third conditions can reduce the increase in hillocks and the increase in step growth disturbance, thereby improving the surface morphology. The active layer can be provided with a low dislocation density and compressive strain derived from the template layer. Furthermore, the active layer contains Al Ｘ Ga １－Ｘ This allows for the inclusion of compressive strain according to the N template layer.

[0246] In the method for fabricating a Group III nitride light-emitting device according to a third aspect, the substrate is made of a material selected from the group consisting of carbon, boron nitride (BN), aluminum oxide (sapphire), ceramic, silicon carbide, refractory metals, zirconia, tantalum carbide (TaC), and ScAlMgO. ４ The material may include at least one of the following materials:

[0247] According to this manufacturing method, exemplary materials are provided for the substrate.

[0248] In the method for fabricating a Group III nitride light-emitting device according to the third aspect, the substrate may have a hexagonal crystal structure, and may have an off-angle of 0.5 degrees or less with respect to a c-plane of the substrate.

[0249] According to this manufacturing method, an exemplary angle range for the off-angle is provided from the viewpoint of crystal growth.

[0250] In the method for fabricating a group III nitride light-emitting device according to a third aspect, the Al of the template layer is Ｘ Ga １－Ｘ The N can be AlN.

[0251] According to this manufacturing method, Al Ｘ Ga １－Ｘ N provides the template layer with AlN containing compressive strain, which is the source of the strain applied to the active layer.

[0252] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit and scope of the present invention, all of which are included in the technical concept of the present invention.

[0253] DESCRIPTION OF SYMBOLS 10: Substrate, 20: Template layer, 30: Homoepitaxial layer, 40: Buffer layer, 41: First buffer layer, 42: Second buffer layer, 50: Electron injection layer, 51: First electron injection layer, 52: Second electron injection layer, 53: N-side electrode, 60: Active layer, 61: Well layer, 62: Barrier layer, 70: Electron blocking layer, 80: Hole injection layer, 90: Contact layer, 91: First contact layer, 92: Second contact layer, 93: P-side electrode, 110: Light-emitting device, 112 114c: Barrier layer; 115: Upper III nitride stack; 116: n-type III nitride semiconductor region; 118: Support; 118a: Primary surface; 120: Template layer; 120a: First region; 120b: Second region; 122: First III nitride semiconductor layer; 124: Second III nitride semiconductor layer; 134: Electron blocking layer; 136: p-type composition gradient layer, 138, 138a, 138b... p-type contact layer, 142... processed region by etching, 144... passivation film, 146... p-side electrode, 148... n-side electrode, 150... Group III nitride epitaxial wafer, 150a... main surface, 151... precursor, 152... template substrate, 152a... main surface, 153... semiconductor layer structure, 156... substrate, 156a... main surface, 160... template layer, 162... template, 164... Group III nitride a semiconductor layer stack, 165... Group III nitride semiconductor layer, 166... ​​Group III nitride semiconductor region, 167... Group III nitride semiconductor layer, 168... active layer, 168a... quantum well structure, 168b... well layer, 168c... barrier layer, 174... electron blocking layer, 176... p-type composition gradient layer, 178... p-type contact layer, 180... groove, 182... processed region by etching, 183... groove, 184... passivation film, 184a... opening, 184b... opening, 186, 188... electrodes.

Claims

1. A substrate having a main surface made of a material other than a group III nitride, and an Al substrate having an X-ray rocking curve half width of 1000 arcsec or less in the (10-12) plane. Ｘ Ga １－Ｘ a template layer containing N and containing compressive strain and covering the main surface of the support, wherein X is greater than 0 and less than or equal to 1; an active layer including compressively strained AlGaN and provided on the template member so as to generate light having a peak wavelength in a deep ultraviolet wavelength region of 285 nm or less; an n-type Group III nitride semiconductor region provided between the template member and the active layer and containing Al as a Group III constituent element; Equipped with The n-type Group III nitride semiconductor region is a first n-type Group III nitride semiconductor layer provided between the template layer and the active layer; a second n-type Group III nitride semiconductor layer provided between the first n-type Group III nitride semiconductor layer and the active layer, the first n-type Group III nitride semiconductor layer has a lattice relaxation rate of 2% or less with respect to the template layer; the second n-type Group III nitride semiconductor layer has a surface roughness of 0.4 nm or less; the first n-type Group III nitride semiconductor layer is an AlGaN layer having an Al composition of 0.7 or more; the second n-type Group III nitride semiconductor layer is an AlGaN layer having an Al composition of 0.7 or more; the template layer has a hexagonal crystal structure, and a main surface of the template layer is a c-plane of the crystal structure; the first n-type Group III nitride semiconductor layer is in contact with the second n-type Group III nitride semiconductor layer; the second n-type Group III nitride semiconductor layer is in contact with the active layer; III-nitride light-emitting devices.

2. the AlGaN well layer of the active layer has a compressive strain of 1.5% or more; The III-nitride light emitting device of claim 1 .

3. the III-nitride light emitting device has an emission spectrum half width of 10 nm or less; 10. The III-nitride light emitting device of claim 1.

4. the active layer includes a well layer having compressive strain and a barrier layer having compressive strain; The III-nitride light emitting device of claim 1 .

5. a thickness of the first n-type Group III nitride semiconductor layer is greater than a thickness of the second n-type Group III nitride semiconductor layer; a first Al composition of the first n-type Group III nitride semiconductor layer is larger than a second Al composition of the second n-type Group III nitride semiconductor layer; The III-nitride light emitting device of claim 1 .

6. the first n-type Group III nitride semiconductor layer has a thickness of 2800 nm or less; the second n-type Group III nitride semiconductor layer has a thickness of 200 nm or less; The III-nitride light emitting device of any one of claims 1 to 5.

7. A substrate having a primary surface made of a material other than a group III nitride, and an Al (10-12) surface having an X-ray rocking curve half width of 1000 arcsec or less. Ｘ Ga １－Ｘ a template substrate including a template layer containing N and containing compressive strain covering the main surface of the substrate, where X is greater than 0 and is equal to or less than 1; an active layer including compressive strain-containing AlGaN, the active layer being provided on the template substrate so as to generate light having a peak wavelength in a deep ultraviolet wavelength region of 285 nm or less; an n-type Group III nitride semiconductor region provided between the template substrate and the active layer and containing Al as a Group III constituent element; Equipped with The n-type Group III nitride semiconductor region is a first n-type Group III nitride semiconductor layer provided between the template layer and the active layer; a second n-type Group III nitride semiconductor layer provided between the first n-type Group III nitride semiconductor layer and the active layer, the first n-type Group III nitride semiconductor layer has a lattice relaxation rate of 2% or less with respect to the template layer; the second n-type Group III nitride semiconductor layer has a surface roughness of 0.4 nm or less; the first n-type Group III nitride semiconductor layer is an AlGaN layer having an Al composition of 0.7 or more; the second n-type Group III nitride semiconductor layer is an AlGaN layer having an Al composition of 0.7 or more; the template layer has a hexagonal crystal structure, and a main surface of the template layer is a c-plane of the crystal structure; the first n-type Group III nitride semiconductor layer is in contact with the second n-type Group III nitride semiconductor layer; the second n-type Group III nitride semiconductor layer is in contact with the active layer; Group III nitride epitaxial wafers.

8. the second n-type Group III nitride semiconductor layer has an Al composition variation of 0.1% or less; 8. The Group III nitride epitaxial wafer of claim 7.

9. the substrate comprises at least one material of carbon, boron nitride (BN), aluminum oxide (sapphire), ceramic, silicon carbide, refractory metal, zirconia, tantalum carbide (TaC), and ScAlMgO4; 8. The Group III nitride epitaxial wafer of claim 7.

10. the substrate has a hexagonal crystal structure; the main surface of the substrate has an off-angle of 0.5 degrees or less with respect to the c-plane of the crystal structure; 10. The Group III nitride epitaxial wafer according to any one of claims 7 to 9.

11. 1. A method of fabricating a Group III nitride light emitting device, comprising: A substrate having a primary surface made of a material other than a group III nitride, and an Al (10-12) surface having an X-ray rocking curve half width of 1000 arcsec or less. Ｘ Ga １－Ｘ providing a template including: a template layer including N and overlying the major surface of the substrate, where X is greater than 0 and less than or equal to 1; growing, on the template layer, a Group III nitride stack including an n-type Group III nitride semiconductor region having a first n-type Group III nitride semiconductor layer containing an n-type dopant and a second n-type Group III nitride semiconductor layer containing an n-type dopant, and an active layer containing AlGaN and having a peak wavelength in the deep ultraviolet wavelength region of 285 nm or less; Including, the first n-type Group III nitride semiconductor layer is provided between the template layer and the active layer; the second n-type Group III nitride semiconductor layer is provided between the first n-type Group III nitride semiconductor layer and the active layer; Growing a III-nitride stack on the template layer comprises: a first condition that a growth temperature for growing the first n-type Group III nitride semiconductor layer is higher than a growth temperature for growing the second n-type Group III nitride semiconductor layer; a second condition that the growth rate of the first n-type Group III nitride semiconductor layer is slower than the growth rate of the second n-type Group III nitride semiconductor layer; and a third condition that an ammonia partial pressure during growth of the first n-type Group III nitride semiconductor layer is higher than an ammonia partial pressure during growth of the second n-type Group III nitride semiconductor layer; growing the first n-type Group III nitride semiconductor layer and the second n-type Group III nitride semiconductor layer under at least one of the following conditions: the second n-type Group III nitride semiconductor layer has a surface roughness of 0.4 nm or less; the first n-type Group III nitride semiconductor layer is an AlGaN layer having an Al composition of 0.7 or more; the second n-type Group III nitride semiconductor layer is an AlGaN layer having an Al composition of 0.7 or more; the template layer has a hexagonal crystal structure, and a main surface of the template layer is a c-plane of the crystal structure; the first n-type Group III nitride semiconductor layer is in contact with the second n-type Group III nitride semiconductor layer; the second n-type Group III nitride semiconductor layer is in contact with the active layer; A method for fabricating a III-nitride light emitting device.

12. the growth temperature of the first n-type Group III nitride semiconductor layer is 1100 degrees Celsius or higher; the growth temperature of the second n-type Group III nitride semiconductor layer is less than 1100 degrees Celsius; the growth rate of the first n-type Group III nitride semiconductor layer is 400 nm / h or less; the growth rate of the second n-type Group III nitride semiconductor layer is greater than 400 nm / h; an ammonia partial pressure in the first n-type Group III nitride semiconductor layer is 10 kPa or more; an ammonia partial pressure in the second n-type Group III nitride semiconductor layer is less than 10 kPa; The method of claim 11.

13. a thickness of the first n-type Group III nitride semiconductor layer is greater than a thickness of the second n-type Group III nitride semiconductor layer; a first Al composition of the first n-type Group III nitride semiconductor layer is larger than a second Al composition of the second n-type Group III nitride semiconductor layer; The method of claim 11.

14. the substrate comprises at least one material of carbon, boron nitride (BN), aluminum oxide (sapphire), ceramic, silicon carbide, refractory metal, zirconia, tantalum carbide (TaC), and ScAlMgO4; The method of claim 11.

15. the substrate has a hexagonal crystal structure; the substrate has an off-angle of 0.5 degrees or less with respect to the c-plane of the substrate; 15. The method of claim 11, claim 12, claim 13, or claim 14.