Semiconductor device

Abstract

The present invention provides a semiconductor device that achieves both low power consumption and high performance. Provided is a semiconductor device comprising a first semiconductor layer, a second semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulation layer, and a second insulation layer. The first insulation layer is provided on the first conductive layer. The second conductive layer is provided on the first insulation layer. The first insulation layer and the second conductive layer have an opening that reaches the first conductive layer. The first semiconductor layer makes contact with an upper surface of the first conductive layer, a side surface of the first insulation layer, and an upper surface and a side surface of the second conductive layer. The second semiconductor layer is provided on the first semiconductor layer. The second insulation layer is provided on the second semiconductor layer. The third conductive layer is provided on the second insulation layer. The conductivity of the first semiconductor layer is higher than the conductivity of the second semiconductor layer.

Description

Semiconductor Devices

[0001] BACKGROUND OF THE INVENTION 1. Field of the Invention One embodiment of the present invention relates to a semiconductor device and a manufacturing method thereof. 2. Description of the Related Art One embodiment of the present invention relates to a transistor and a manufacturing method thereof.

[0002] One embodiment of the present invention is not limited to the above technical field, and examples of the technical field of one embodiment of the present invention include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, an electronic device, a lighting device, an input device (for example, a touch sensor), an input / output device (for example, a touch panel), a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having such a circuit, etc. Also, it refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, and an electronic component in which a chip is housed in a package are examples of semiconductor devices. Furthermore, a memory device, a display device, a light-emitting device, a lighting device, and an electronic device may themselves be semiconductor devices and each may have a semiconductor device.

[0004] Semiconductor devices including transistors are widely used in electronic devices. For example, in display devices, pixel size can be reduced by reducing the area occupied by a transistor, and resolution can be increased. Therefore, miniaturized transistors are in demand.

[0005] As devices requiring high-definition display devices, devices for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR) are being actively developed.

[0006] 2. Description of the Related Art As display devices, for example, light-emitting devices having organic electroluminescence (EL) elements or light-emitting diodes (LEDs) have been developed.

[0007] Patent Document 1 discloses a high-definition display device using organic EL elements.

[0008] International Publication No. 2016 / 038508

[0009] An object of one embodiment of the present invention is to provide a transistor with a small size. Another object is to provide a transistor with a short channel length. Another object is to provide a transistor with high on-state current. Another object is to provide a transistor with low cutoff current. Another object is to provide a transistor with favorable electrical characteristics. Another object is to provide a semiconductor device with a small occupation area. Another object is to provide a semiconductor device with low wiring resistance. Another object is to provide a semiconductor device or display device with low power consumption. Another object is to provide a highly reliable transistor, semiconductor device, or display device. Another object is to provide a high-resolution display device. Another object is to provide a method for manufacturing a semiconductor device or display device with high productivity. Another object is to provide a novel transistor, semiconductor device, or display device, or a manufacturing method thereof.

[0010] Note that the description of these problems does not preclude the existence of other problems. One embodiment of the present invention does not necessarily have to solve all of these problems. Problems other than these can be extracted from the description in the specification, drawings, and claims.

[0011] One embodiment of the present invention is a semiconductor device including a first semiconductor layer, a second semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is provided over the first conductive layer. The second conductive layer is provided over the first insulating layer. The first insulating layer and the second conductive layer have openings reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is provided over the first semiconductor layer. The second insulating layer is provided over the second semiconductor layer. The third conductive layer is provided over the second insulating layer. The conductivity of the first semiconductor layer is different from that of the second semiconductor layer.

[0012] One embodiment of the present invention is a semiconductor device including a first semiconductor layer, a second semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is provided over the first conductive layer. The second conductive layer is provided over the first insulating layer. The first insulating layer and the second conductive layer have openings reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is provided over the first semiconductor layer. The second insulating layer is provided over the second semiconductor layer. The third conductive layer is provided over the second insulating layer. The conductivity of the first semiconductor layer is higher than that of the second semiconductor layer.

[0013] One embodiment of the present invention is a semiconductor device including a first semiconductor layer, a second semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is provided over the first conductive layer. The second conductive layer is provided over the first insulating layer. The first insulating layer and the second conductive layer have openings reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is provided over the first semiconductor layer. The second insulating layer is provided over the second semiconductor layer. The third conductive layer is provided over the second insulating layer. The first semiconductor layer includes a first metal oxide. The second semiconductor layer includes a second metal oxide. The band gap of the first metal oxide is smaller than the band gap of the second metal oxide.

[0014] One embodiment of the present invention is a semiconductor device including a first semiconductor layer, a second semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is provided over the first conductive layer. The second conductive layer is provided over the first insulating layer. The first insulating layer and the second conductive layer have openings reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is provided over the first semiconductor layer. The second insulating layer is provided over the second semiconductor layer. The third conductive layer is provided over the second insulating layer. The first semiconductor layer includes a first metal oxide. The second semiconductor layer includes a second metal oxide. The first metal oxide includes indium. The second metal oxide contains indium and an element M. The element M is one or more of gallium, aluminum, and tin. The content of the element M in the first metal oxide is lower than the content of the element M in the second metal oxide.

[0015] One embodiment of the present invention is a semiconductor device including a first semiconductor layer, a second semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is provided over the first conductive layer. The second conductive layer is provided over the first insulating layer. The first insulating layer and the second conductive layer have openings reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second semiconductor layer is provided over the first semiconductor layer. The second insulating layer is provided over the second semiconductor layer. The third conductive layer is provided over the second insulating layer. The first semiconductor layer and the second semiconductor layer each contain a metal oxide. The crystallinity of the first semiconductor layer is lower than that of the second semiconductor layer.

[0016] In the above-described semiconductor device, the first conductive layer and the second conductive layer each preferably contain an oxide conductor.

[0017] In the semiconductor device described above, the first insulating layer preferably includes a third insulating layer, a fourth insulating layer on the third insulating layer, and a fifth insulating layer on the fourth insulating layer. The fourth insulating layer preferably contains oxygen. The third insulating layer and the fifth insulating layer preferably each contain nitrogen.

[0018] In the semiconductor device described above, the first insulating layer preferably includes a third insulating layer, a fourth insulating layer on the third insulating layer, a fifth insulating layer on the fourth insulating layer, and a sixth insulating layer on the fifth insulating layer. The fifth insulating layer preferably contains oxygen. The third insulating layer, the fourth insulating layer, and the sixth insulating layer preferably each contain nitrogen. The third insulating layer preferably has a region with a higher hydrogen content than the fourth insulating layer.

[0019] The aforementioned semiconductor device preferably includes a fourth conductive layer. The fourth conductive layer preferably has a region in contact with the upper surface of the first conductive layer. The first insulating layer preferably has regions in contact with the upper surface of the first conductive layer and the upper surface and side surfaces of the fourth conductive layer. The fourth conductive layer preferably has a region overlapping with the third conductive layer via the first insulating layer, the first semiconductor layer, the second semiconductor layer, and the second insulating layer. The conductivity of the fourth conductive layer is preferably higher than that of the first conductive layer.

[0020] According to one embodiment of the present invention, a transistor with a small size can be provided. Alternatively, a transistor with a short channel length can be provided. Alternatively, a transistor with a large on-state current can be provided. Alternatively, a transistor with a small cutoff current can be provided. Alternatively, a transistor with favorable electrical characteristics can be provided. Alternatively, a semiconductor device with a small occupation area can be provided. Alternatively, a semiconductor device with low wiring resistance can be provided. Alternatively, a semiconductor device or display device with low power consumption can be provided. Alternatively, a highly reliable transistor, semiconductor device, or display device can be provided. Alternatively, a high-resolution display device can be provided. Alternatively, a method for manufacturing a semiconductor device or display device with high productivity can be provided. Alternatively, a novel transistor, semiconductor device, or display device, or a manufacturing method thereof can be provided.

[0021] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of these effects. Effects other than these can be extracted from the description in the specification, drawings, and claims.

[0022] FIG. 1A is a top view showing an example of a semiconductor device. FIGS. 1B and 1C are cross-sectional views showing an example of a semiconductor device. FIGS. 2A to 2D are perspective views showing an example of a semiconductor device. FIG. 3A is a top view showing an example of a semiconductor device. FIG. 3B is a cross-sectional view showing an example of a semiconductor device. FIGS. 4A to 4C are cross-sectional views showing an example of a semiconductor device. FIGS. 5A and 5B are cross-sectional views showing an example of a semiconductor device. FIGS. 6A and 6B are cross-sectional views showing an example of a semiconductor device. FIGS. 7A and 7B are cross-sectional views showing an example of a semiconductor device. FIGS. 8A and 8B are cross-sectional views showing an example of a semiconductor device. FIG. 9 is a cross-sectional view showing an example of a semiconductor device. FIG. 10A is a top view showing an example of a semiconductor device. FIG. 10B is a cross-sectional view showing an example of a semiconductor device. FIGS. 11A and 11B are cross-sectional views showing an example of a semiconductor device. FIGS. 12A to 12D are cross-sectional views showing an example of a manufacturing method of a semiconductor device. FIGS. 13A to 13C are cross-sectional views showing an example of a manufacturing method of a semiconductor device. FIGS. 14A to 14C are cross-sectional views showing an example of a manufacturing method of a semiconductor device. 15A and 15B are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device. FIG. 16 is a perspective view illustrating an example of a display device. FIG. 17 is a cross-sectional view illustrating an example of a display device. FIG. 18 is a cross-sectional view illustrating an example of a display device. FIG. 19 is a cross-sectional view illustrating an example of a display device. FIGS. 20A to 20C are cross-sectional views illustrating an example of a display device. FIG. 21 is a cross-sectional view illustrating an example of a display device. FIG. 22 is a cross-sectional view illustrating an example of a display device. FIG. 23 is a cross-sectional view illustrating an example of a display device. FIGS. 24A to 24F are cross-sectional views illustrating an example of a method for manufacturing a display device. FIGS. 25A to 25D are views illustrating an example of an electronic device. FIGS. 26A to 26F are views illustrating an example of an electronic device. FIGS. 27A to 27G are views illustrating an example of an electronic device. FIGS. 28A and 28B are views illustrating Id-Vg characteristics of a transistor. FIGS. 29A and 29B are views illustrating Id-Vg characteristics of a transistor.

[0023] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes can be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.

[0024] In the configuration of the invention described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and repeated explanations thereof will be omitted. Furthermore, when referring to similar functions, the same hatching pattern may be used and no particular reference numeral may be assigned.

[0025] For ease of understanding, the position, size, range, etc. of each component shown in the drawings may not represent the actual position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.

[0026] In this specification, the ordinal numbers "first" and "second" are used for convenience and do not limit the number of components or the order of the components (for example, the order of processes or the order of stacking). Furthermore, the ordinal numbers assigned to components in one part of this specification may not match the ordinal numbers assigned to the same components in other parts of this specification or in the claims.

[0027] The terms "film" and "layer" can be interchangeable depending on the circumstances. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" can be changed to the term "insulating layer."

[0028] A transistor is a type of semiconductor element that can perform functions such as amplifying current or voltage and performing switching operations to control conduction or non-conduction. The term "transistor" as used herein includes an insulated gate field effect transistor (IGFET) and a thin film transistor (TFT).

[0029] The functions of "source" and "drain" may be interchangeable when transistors of different polarities are used, or when the direction of current flow changes during circuit operation, etc. For this reason, the terms "source" and "drain" may be used interchangeably in this specification and elsewhere.

[0030] In this specification, "electrically connected" includes a connection via "something that has some kind of electrical action." Here, "something that has some kind of electrical action" is not particularly limited as long as it allows electrical signals to be transmitted and received between the connected objects. For example, "something that has some kind of electrical action" includes electrodes or wiring, as well as switching elements such as transistors, resistive elements, coils, capacitive elements, and other elements with various functions.

[0031] In this specification and the like, unless otherwise specified, the off-state current refers to the leakage current between the source and drain when the transistor is in an off state (also referred to as a non-conducting state or a cut-off state). Unless otherwise specified, the off-state current refers to the leakage current between the source and the gate when the voltage V ｇｓ is the threshold voltage V ｔｈ (For p-channel transistors, V ｔｈ This refers to a state of being (higher than)

[0032] In this specification, the phrase "top surface shapes are approximately the same" refers to at least a portion of the contours of stacked layers overlapping. For example, this includes cases where the upper and lower layers are processed using the same mask pattern or a portion of the same mask pattern. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or the upper layer may be located outside the lower layer. In these cases, the phrase "top surface shapes are approximately the same" may also be used. Furthermore, when the top surface shapes are the same or approximately the same, it can also be said that the edges are aligned or approximately aligned.

[0033] In this specification, a tapered shape refers to a shape in which at least a portion of the side surface of a structure is inclined relative to the substrate surface or the surface to be formed. For example, it is preferable to have a region in which the angle (also called the taper angle) between the inclined side surface and the substrate surface or the surface to be formed is less than 90 degrees. Note that the side surface of the structure, the substrate surface, and the surface to be formed do not necessarily need to be completely flat, and may be approximately planar with a slight curvature or approximately planar with a slight unevenness.

[0034] In this specification, etc., a device fabricated using a metal mask or an FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. Also, in this specification, etc., a device fabricated without using a metal mask or an FMM may be referred to as a device with an MML (metal maskless) structure.

[0035] In this specification and the like, a structure in which different light-emitting layers are formed for light-emitting elements (also referred to as light-emitting devices) with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. The SBS structure allows the materials and configuration to be optimized for each light-emitting element, increasing the degree of freedom in selecting materials and configurations and making it easier to improve brightness and reliability.

[0036] In this specification and the like, holes or electrons may be referred to as "carriers." Specifically, a hole injection layer or an electron injection layer may be referred to as a "carrier injection layer," a hole transport layer or an electron transport layer may be referred to as a "carrier transport layer," and a hole block layer or an electron block layer may be referred to as a "carrier block layer." Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier block layer may not be clearly distinguishable from each other depending on their cross-sectional shapes or characteristics. Furthermore, one layer may have two or three functions among the carrier injection layer, carrier transport layer, and carrier block layer.

[0037] In this specification and the like, a light-emitting element has an EL layer between a pair of electrodes. The EL layer has at least a light-emitting layer. Here, examples of layers (also referred to as functional layers) included in the EL layer include a light-emitting layer, a carrier injection layer (a hole injection layer and an electron injection layer), a carrier transport layer (a hole transport layer and an electron transport layer), and a carrier block layer (a hole block layer and an electron block layer). In this specification and the like, a light-receiving element (also referred to as a light-receiving device) has at least an active layer that functions as a photoelectric conversion layer between a pair of electrodes. In this specification and the like, one of the pair of electrodes may be referred to as a pixel electrode, and the other as a common electrode.

[0038] In this specification and the like, the sacrificial layer (which may also be referred to as a mask layer) is located above at least the light-emitting layer (more specifically, a layer that is processed into an island shape among the layers that make up the EL layer), and has the function of protecting the light-emitting layer during the manufacturing process.

[0039] In this specification and the like, the term "step discontinuity" refers to a phenomenon in which a layer, film, or electrode is separated due to the shape of the surface on which it is formed (for example, a step or the like).

[0040] Embodiment 1 In this embodiment, a semiconductor device of one embodiment of the present invention will be described with reference to FIGS.

[0041] <Configuration Example 1> A transistor that can be used in a semiconductor device according to one embodiment of the present invention will be described. FIG. 1A shows a top view of a transistor 100. FIG. 1B shows a cross-sectional view of a section taken along dashed dotted line A1-A2 in FIG. 1A, and FIG. 1C shows a cross-sectional view of a section taken along dashed dotted line B1-B2 in FIG. 1A. Note that some components of the transistor 100 (such as a gate insulating layer) are omitted in FIG. 1A. As in FIG. 1A, some components are omitted in the top views of the transistor in the following drawings.

[0042] 2A to 2D are perspective views of the transistor 100. Note that FIG. 2B shows a cross section taken along dashed line C1-C2 in FIG. 2A. In FIG. 2C, the insulating layer shown in FIG. 2A is shown in a transparent manner, with its outline indicated by a dashed line. Similarly, in FIG. 2D, the insulating layer shown in FIG. 2B is shown in a transparent manner, with its outline indicated by a dashed line.

[0043] The transistor 100 is provided over a substrate 102. The transistor 100 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, and a conductive layer 112b. The conductive layer 104 functions as a gate electrode (also referred to as a first gate electrode). A part of the insulating layer 106 functions as a gate insulating layer (also referred to as a first gate insulating layer). The conductive layer 112a functions as one of a source electrode and a drain electrode, and the conductive layer 112b functions as the other. An entire region of the semiconductor layer 108 that overlaps with the gate electrode via the gate insulating layer between the source electrode and the drain electrode functions as a channel formation region. A region of the semiconductor layer 108 that is in contact with the source electrode functions as a source region, and a region that is in contact with the drain electrode functions as a drain region.

[0044] A conductive layer 112a is provided on a substrate 102, an insulating layer 110 is provided on the conductive layer 112a, and a conductive layer 112b is provided on the insulating layer 110. The insulating layer 110 has a region sandwiched between the conductive layer 112a and the conductive layer 112b. The conductive layer 112a has a region overlapping with the conductive layer 112b via the insulating layer 110. The insulating layer 110 has an opening 141 that reaches the conductive layer 112a. It can also be said that the conductive layer 112a is exposed in the opening 141. The conductive layer 112b has an opening 143 in a region overlapping with the conductive layer 112a. The opening 143 is provided in a region overlapping with the opening 141.

[0045] The semiconductor layer 108 is provided to cover the openings 141 and 143. The semiconductor layer 108 has regions in contact with the top surface and side surfaces of the conductive layer 112b, the side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a. The semiconductor layer 108 is electrically connected to the conductive layer 112a through the openings 141 and 143. The semiconductor layer 108 has a shape that follows the shapes of the top surface and side surfaces of the conductive layer 112b, the side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.

[0046] The insulating layer 106, which functions as a gate insulating layer of the transistor 100, is provided to cover the openings 141 and 143. The insulating layer 106 is provided over the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110. The insulating layer 106 has a region in contact with the top surface and side surfaces of the semiconductor layer 108, the top surface and side surfaces of the conductive layer 112b, and the top surface of the insulating layer 110. The insulating layer 106 has a shape that follows the shapes of the top surface of the insulating layer 110, the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the semiconductor layer 108, and the top surface of the conductive layer 112a.

[0047] The conductive layer 104, which functions as a gate electrode of the transistor 100, is provided over the insulating layer 106 and has a region in contact with the top surface of the insulating layer 106. The conductive layer 104 has a region overlapping with the semiconductor layer 108 with the insulating layer 106 interposed therebetween. The conductive layer 104 has a shape that follows the shape of the top surface of the insulating layer 106.

[0048] The transistor 100 is a so-called top-gate transistor having a gate electrode above the semiconductor layer 108. Furthermore, since the bottom surface of the semiconductor layer 108 is in contact with the source electrode and the drain electrode, the transistor 100 can be referred to as a top-gate bottom-contact (TGBC) transistor. Furthermore, in the transistor 100, the source electrode and the drain electrode are located at different heights with respect to the surface of the substrate 102, which is the surface where the transistor 100 is formed, and a drain current flows in a direction perpendicular to or approximately perpendicular to the surface of the substrate 102. It can also be said that the drain current flows vertically or approximately vertically in the transistor 100. Therefore, the transistor of one embodiment of the present invention can be referred to as a vertical channel transistor or a VFET (Vertical Field Effect Transistor).

[0049] The channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 provided between the conductive layer 112a and the conductive layer 112b. Therefore, a transistor having a channel length smaller than the resolution limit of an exposure device used to manufacture the transistor can be manufactured with high precision. Furthermore, the variation in characteristics among multiple transistors 100 is also reduced. Therefore, the operation of a semiconductor device including the transistor 100 can be stabilized, and reliability can be improved. Furthermore, the reduced variation in characteristics increases the degree of freedom in circuit design, allowing the operating voltage of the semiconductor device to be lowered. Therefore, the power consumption of the semiconductor device can be reduced.

[0050] In the transistor of one embodiment of the present invention, a source electrode, a semiconductor layer, and a drain electrode can be provided so as to overlap with each other; therefore, the area occupied by the transistor can be significantly reduced compared to a so-called planar transistor in which the semiconductor layer is arranged in a planar shape.

[0051] The conductive layers 112a, 112b, and 104 can each function as wirings, and the transistor 100 can be provided in a region where these wirings overlap. That is, in a circuit including the transistor 100 and the wirings, the area occupied by the transistor 100 and the wirings can be reduced. Therefore, the area occupied by the circuit can be reduced, and a small-sized semiconductor device can be provided.

[0052] For example, when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-resolution display device can be obtained.Furthermore, when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (for example, one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, and a display device with a narrow frame can be obtained.

[0053] 1A and the like show an example in which the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 cover the openings 141 and 143; however, one embodiment of the present invention is not limited to this. A structure in which a step is formed between the insulating layer 110, the conductive layer 112b, and the conductive layer 112a, and the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 are provided along the step may also be used.

[0054] [Semiconductor Layer 108] The semiconductor layer 108 preferably has a stacked structure. Figure 1B and other figures show a configuration in which the semiconductor layer 108 has a stacked structure of a semiconductor layer 108a and a semiconductor layer 108b over the semiconductor layer 108a.

[0055] The conductivity of the material used for the semiconductor layer 108a is preferably different from the conductivity of the material used for the semiconductor layer 108b.

[0056] For example, the semiconductor layer 108a can be made of a material having a higher conductivity than the semiconductor layer 108b. By using a material having a high conductivity for the semiconductor layer 108a in contact with the conductive layers 112a and 112b which function as a source electrode and a drain electrode, the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b can be reduced, and a transistor with a large on-state current can be obtained.

[0057] Here, if a material with high conductivity is used for the semiconductor layer 108b provided on the conductive layer 104 side functioning as the gate electrode, the threshold voltage of the transistor may shift, and the drain current (hereinafter also referred to as cutoff current) that flows when the gate voltage is 0 V may become large. Specifically, if the transistor 100 is an n-channel transistor, the threshold voltage may become low, and if the transistor 100 is a p-channel transistor, the threshold voltage may become high. Therefore, it is preferable to use a material with lower conductivity than the semiconductor layer 108a for the semiconductor layer 108b. As a result, the threshold voltage can be increased if the transistor 100 is an n-channel transistor, and can be decreased if the transistor 100 is a p-channel transistor, resulting in a transistor with a small cutoff current. Note that a small cutoff current may be referred to as a normally-off transistor.

[0058] As described above, by forming the semiconductor layer 108 into a stacked structure and using a material for the semiconductor layer 108a that has higher conductivity than the semiconductor layer 108b, a normally-off transistor with a large on-state current can be obtained. Therefore, a semiconductor device that achieves both low power consumption and high performance can be provided.

[0059] Note that the carrier concentration of the semiconductor layer 108a is preferably higher than that of the semiconductor layer 108b. Increasing the carrier concentration of the semiconductor layer 108a increases the conductivity, and the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b can be reduced, resulting in a transistor with a large on-state current. Reducing the carrier concentration of the semiconductor layer 108b decreases the conductivity, resulting in a normally-off transistor.

[0060] Although an example in which the semiconductor layer 108a is made of a material having higher conductivity than the semiconductor layer 108b is described here, one embodiment of the present invention is not limited to this. The semiconductor layer 108a may be made of a material having lower conductivity than the semiconductor layer 108b. The carrier concentration of the semiconductor layer 108a can be lower than the carrier concentration of the semiconductor layer 108b.

[0061] The semiconductor material used for the semiconductor layer 108a and the semiconductor layer 108b is not particularly limited. For example, a semiconductor made of a single element or a compound semiconductor can be used. Examples of semiconductors made of a single element include silicon and germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. Other examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors. Note that these semiconductor materials may contain impurities as dopants.

[0062] The crystallinity of the semiconductor material used for the semiconductor layer 108 a and the semiconductor layer 108 b is not particularly limited, and any of an amorphous semiconductor, a single crystalline semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used. The use of a single crystalline semiconductor or a crystalline semiconductor can suppress deterioration of transistor characteristics, which is preferable.

[0063] The semiconductor layer 108a and the semiconductor layer 108b preferably include a metal oxide (also referred to as an oxide semiconductor) that exhibits semiconductor characteristics.

[0064] The band gap of each of the first metal oxide used for the semiconductor layer 108a and the second metal oxide used for the semiconductor layer 108b is preferably 2.0 eV or more, more preferably 2.5 eV or more.

[0065] The band gap of the first metal oxide used in the semiconductor layer 108 a is preferably different from the band gap of the second metal oxide used in the semiconductor layer 108 b. For example, the difference between the band gap of the first metal oxide and the band gap of the second metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, and even more preferably 0.3 eV or more.

[0066] The band gap of the first metal oxide used for the semiconductor layer 108a can be smaller than the band gap of the second metal oxide used for the semiconductor layer 108b. As a result, the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b can be reduced, and a transistor with large on-state current can be obtained. Furthermore, the threshold voltage can be increased when the transistor 100 is an n-channel transistor, and the threshold voltage can be decreased when the transistor 100 is a p-channel transistor, so that the transistor can be a normally-off transistor.

[0067] Although an example in which the band gap of the first metal oxide is smaller than that of the second metal oxide is shown here, one embodiment of the present invention is not limited thereto. The band gap of the first metal oxide may be larger than that of the second metal oxide.

[0068] Examples of the first metal oxide and the second metal oxide include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably contains at least indium or zinc. The metal oxide preferably contains two or three elements selected from indium, element M, and zinc. The element M is a metal element or semimetal element having a high bond energy with oxygen, for example, a metal element or semimetal element having a bond energy with oxygen higher than that of indium. Specific examples of the element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M contained in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably gallium. In this specification and the like, metal elements and metalloid elements may be collectively referred to as "metal elements," and the "metal elements" described in this specification and the like may include metalloid elements.

[0069] The first metal oxide and the second metal oxide may be, for example, indium zinc oxide (In—Zn oxide, also referred to as IZO (registered trademark)), indium tin oxide (In—Sn oxide), indium titanium oxide (In—Ti oxide), indium gallium oxide (In—Ga oxide), indium gallium aluminum oxide (In—Ga—Al oxide), indium gallium tin oxide (In—Ga—Sn oxide, also referred to as IGTO), gallium zinc oxide (Ga—Zn oxide, also referred to as GZO), aluminum zinc oxide (Al—Zn oxide, also referred to as AZO), indium gallium tin oxide (In—Ga—Sn oxide, also referred to as IGTO), indium zinc oxide (In—Zn oxide, also referred to as GZO), aluminum zinc oxide (In—Zn oxide, also referred to as AZO), indium gallium tin oxide (In—Ga—Sn oxide, also referred to as IGTO ... Examples of usable materials include indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also referred to as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), and indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO, IGZAO, or IAGZO). Alternatively, silicon-containing indium tin oxide, gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), and the like can be used.

[0070] By increasing the ratio of the number of indium atoms to the total number of atoms of all metal elements contained in the metal oxide, the field-effect mobility of the transistor can be increased, and a transistor with a large on-state current can be realized.

[0071] Note that the metal oxide may contain one or more metal elements with a larger periodic number instead of or in addition to indium. The greater the overlap of the orbitals of the metal elements, the greater the carrier conduction in the metal oxide. Therefore, including a metal element with a larger periodic number may improve the field-effect mobility of a transistor. Examples of metal elements with a larger periodic number include metal elements belonging to the fifth period and the sixth period. Specific examples of such metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0072] The metal oxide may contain one or more nonmetallic elements. The nonmetallic elements in the metal oxide may increase the carrier concentration or narrow the band gap, thereby increasing the field-effect mobility of the transistor. Examples of nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0073] By increasing the ratio of the number of zinc atoms to the total number of atoms of all metal elements contained in the metal oxide, the metal oxide can be made highly crystalline and the diffusion of impurities in the metal oxide can be suppressed, thereby suppressing fluctuations in the electrical characteristics of the transistor and improving its reliability.

[0074] By increasing the ratio of the number of atoms of element M to the sum of the numbers of atoms of all metal elements contained in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, carrier generation due to oxygen vacancies can be suppressed, and a transistor with a small off-state current can be obtained. Furthermore, fluctuations in the electrical characteristics of the transistor can be suppressed, thereby improving reliability.

[0075] The electrical characteristics and reliability of the transistor vary depending on the composition of the metal oxide used in the semiconductor layer 108 a and the semiconductor layer 108 b. Therefore, by varying the composition of the metal oxide depending on the electrical characteristics and reliability required of the transistor, a semiconductor device that has both excellent electrical characteristics and high reliability can be obtained.

[0076] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of element M. Examples of atomic ratios of metal elements in such In-M-Zn oxides include In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:3, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:3, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5:1:8, In:M:Zn = 6:1:6, In:M:Zn = 5:2:5, and compositions in the vicinity thereof. Note that the term "nearby compositions" includes a range of ±30% of the desired atomic ratio. By increasing the atomic ratio of indium in the metal oxide, the on-state current or field-effect mobility of the transistor can be increased.

[0077] The atomic ratio of In in the In-M-Zn oxide may be less than the atomic ratio of the element M. Examples of atomic ratios of metal elements in such In-M-Zn oxide include In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4, and compositions close to these. By increasing the proportion of M atoms in the metal oxide, the generation of oxygen vacancies can be suppressed.

[0078] When the element M contains a plurality of metal elements, the total proportion of the number of atoms of the metal elements can be used as the proportion of the number of atoms of the element M.

[0079] In this specification and the like, the ratio of the number of indium atoms to the sum of the numbers of atoms of all contained metal elements may be referred to as the indium content. The same applies to other metal elements.

[0080] As described above, the band gap of the first metal oxide used in the semiconductor layer 108a can be smaller than the band gap of the second metal oxide used in the semiconductor layer 108b. The composition of the first metal oxide is preferably different from that of the second metal oxide. The band gap can be controlled by differentiating the compositions of the first metal oxide and the second metal oxide. For example, the content of element M in the first metal oxide is preferably lower than the content of element M in the second metal oxide. Specifically, when the first metal oxide and the second metal oxide are In-M-Zn oxides, the first metal oxide can have a composition of In:M:Zn=1:1:1 (atomic ratio) or a composition therearound, and the second metal oxide can have a composition of In:M:Zn=1:3:2 (atomic ratio) or a composition therearound. It is particularly preferable to use one or more of gallium, aluminum, and tin as the element M.

[0081] The first metal oxide may not contain the element M. For example, the first metal oxide used in the semiconductor layer 108a may be an In—Zn oxide, and the second metal oxide used in the semiconductor layer 108b may be an In-M-Zn oxide. Specifically, the first metal oxide may be an In—Zn oxide, and the second metal oxide may be an In—Ga—Zn oxide. More specifically, the first metal oxide may have a composition of In:Zn=1:1 (atomic ratio) or a composition therearound, and the second metal oxide may have a composition of In:Ga:Zn=1:1:1 (atomic ratio) or a composition therearound.

[0082] Here, an example is shown in which the content of the element M in the first metal oxide is lower than the content of the element M in the second metal oxide, but one embodiment of the present invention is not limited to this. The content of the element M in the first metal oxide may be higher than the content of the element M in the second metal oxide. Note that the first metal oxide and the second metal oxide may have different compositions, and the contents of elements other than the element M may be different.

[0083] The composition of the first metal oxide used in the semiconductor layer 108a and the composition of the second metal oxide used in the semiconductor layer 108b can be analyzed by, for example, energy dispersive X-ray spectrometry (EDX), X-ray photoelectron spectrometry (XPS), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled plasma atomic emission spectrometry (ICP-AES). Alternatively, a combination of these methods may be used for analysis. For elements with low content, the actual content may differ from the content obtained by analysis due to the influence of analytical accuracy. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content.

[0084] The metal oxide can be preferably formed by sputtering or atomic layer deposition (ALD). When the metal oxide is formed by sputtering, the composition of the formed metal oxide may differ from the composition of the sputtering target. In particular, the zinc content in the formed metal oxide may be reduced to about 50% of that of the sputtering target.

[0085] The semiconductor layer 108 a and the semiconductor layer 108 b are preferably formed using a crystalline metal oxide. Examples of the structure of a crystalline metal oxide include a c-axis aligned crystal (CAAC) structure, a polycrystalline structure, and a nanocrystalline (nc) structure. By using a crystalline metal oxide for the semiconductor layer 108, the density of defect states in the semiconductor layer 108 can be reduced, and a highly reliable semiconductor device can be realized.

[0086] By using a metal oxide with high crystallinity for the semiconductor layer, the density of defect states in the semiconductor layer can be reduced, while by using a metal oxide with low crystallinity, a transistor capable of passing a large current can be realized.

[0087] When forming a metal oxide by sputtering, the higher the substrate temperature during formation, the more crystalline the metal oxide can be formed. The substrate temperature during formation can be adjusted, for example, by the temperature of the stage on which the substrate is placed during formation. Furthermore, the higher the ratio of the flow rate of oxygen gas to the total film formation gas used for formation (hereinafter also referred to as oxygen flow rate ratio) or the higher the oxygen partial pressure in the processing chamber of the film formation apparatus, the more crystalline the metal oxide can be formed.

[0088] The composition of the first metal oxide used for the semiconductor layer 108a may be the same as or approximately the same as the composition of the second metal oxide used for the semiconductor layer 108b. By using the same composition, for example, the same sputtering target can be used for formation, thereby reducing manufacturing costs. Here, the crystallinity of the semiconductor layer 108a is preferably different from that of the semiconductor layer 108b. For example, the crystallinity of the semiconductor layer 108a can be lower than that of the semiconductor layer 108b. By making the crystallinity of the semiconductor layer 108a lower than that of the semiconductor layer 108b, the conductivity of the semiconductor layer 108a can be increased. This can reduce the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b, thereby enabling a transistor with a large on-state current. On the other hand, by making the crystallinity of the semiconductor layer 108b higher than that of the semiconductor layer 108a, the conductivity of the semiconductor layer 108b can be reduced. This allows a normally-off transistor to be formed. Furthermore, by providing the semiconductor layer 108b with high crystallinity on the insulating layer 106 side, damage to the semiconductor layer 108 during the formation of the insulating layer 106 can be reduced. By making the crystallinity of the semiconductor layer 108a lower than that of the semiconductor layer 108b, a normally-off transistor with a large on-state current can be formed. Therefore, a semiconductor device that achieves both low power consumption and high performance can be provided.

[0089] For example, the semiconductor layer 108a may have a microcrystalline (nc) structure, and the semiconductor layer 108b may have a CAAC structure. Alternatively, the semiconductor layer 108a and the semiconductor layer 108b may each have a microcrystalline (nc) structure, and the crystallinity of the semiconductor layer 108a may be lower than that of the semiconductor layer 108b.

[0090] Here, an example is shown in which the crystallinity of the semiconductor layer 108a is lower than that of the semiconductor layer 108b, but one embodiment of the present invention is not limited to this. The crystallinity of the semiconductor layer 108a may be higher than that of the semiconductor layer 108b. By increasing the crystallinity of the semiconductor layer 108a in contact with the conductive layer 112a and the conductive layer 112b, it is possible to prevent components contained in the conductive layer 112a and the conductive layer 112b from diffusing into the semiconductor layer 108b provided on the conductive layer 104 side that functions as a gate electrode. This can suppress fluctuations in the electrical characteristics of the transistor and improve reliability.

[0091] The crystallinity of the semiconductor layer 108 a and the semiconductor layer 108 b can be analyzed by, for example, X-ray diffraction (XRD), a transmission electron microscope (TEM), or electron diffraction (ED). Alternatively, the analysis may be performed by combining a plurality of these techniques.

[0092] Note that when the composition of the first metal oxide and the composition of the second metal oxide are the same or approximately the same, the boundary (interface) between the semiconductor layer 108a and the semiconductor layer 108b may not be clearly identified.

[0093] The thickness of the semiconductor layer 108 is preferably 3 nm to 200 nm, more preferably 3 nm to 100 nm, further preferably 5 nm to 100 nm, further preferably 10 nm to 100 nm, further preferably 10 nm to 70 nm, further preferably 15 nm to 70 nm, further preferably 15 nm to 50 nm, and further preferably 20 nm to 50 nm.

[0094] The thickness of each layer (here, the semiconductor layer 108a and the semiconductor layer 108b) constituting the semiconductor layer 108 may be determined so that the thickness of the semiconductor layer 108 falls within the above-described range. The thickness of the semiconductor layer 108a can be determined so that the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b fall within the desired range. The thickness of the semiconductor layer 108b can be determined so that the threshold voltage of the transistor falls within the desired range. Note that the thickness of the semiconductor layer 108a may be the same as or different from the thickness of the semiconductor layer 108b.

[0095] When an oxide semiconductor is used for the semiconductor layer 108, hydrogen contained in the oxide semiconductor reacts with oxygen that is bonded to a metal atom to form water, and oxygen vacancies (V Ｏ In addition, defects in which hydrogen enters oxygen vacancies (hereinafter referred to as V Ｏ Hydrogen atoms (H) may function as donors and generate electrons as carriers. Furthermore, some of the hydrogen atoms may bond with oxygen atoms that are bonded to metal atoms to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics. Furthermore, hydrogen in an oxide semiconductor is easily moved by stresses such as heat and an electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be reduced.

[0096] When an oxide semiconductor is used for the semiconductor layer 108, V in the semiconductor layer 108 Ｏ It is preferable to reduce H as much as possible to obtain high-purity intrinsic or substantially high-purity intrinsic. Ｏ To obtain an oxide semiconductor in which H is sufficiently reduced, it is important to remove impurities such as water and hydrogen from the oxide semiconductor (sometimes referred to as dehydration or dehydrogenation treatment) and to supply oxygen to the oxide semiconductor to repair oxygen vacancies. Ｏ Stable electrical characteristics can be obtained by using an oxide semiconductor in which impurities such as H are sufficiently reduced for a channel formation region of a transistor. Note that supplying oxygen to an oxide semiconductor to repair oxygen vacancies is sometimes referred to as oxygen-adding treatment.

[0097] In the case where an oxide semiconductor is used for the semiconductor layer 108, the carrier concentration of the oxide semiconductor in a region functioning as a channel formation region is 1×10 １８ cm −３ Preferably, it is 1×10 or less. １７ cm −３ More preferably, it is less than 1×10 １６ cm −３ More preferably, it is less than 1×10 １３ cm −３ More preferably, it is less than 1×10 １２ cm −３ Note that the lower limit of the carrier concentration of the oxide semiconductor in the region functioning as a channel formation region is not limited, but is preferably less than 1×10 −９ cm −３ In the semiconductor layer 108b provided on the conductive layer 104 side functioning as a gate electrode, a region functioning as a channel formation region preferably has a low carrier concentration, and the carrier concentration is preferably in the above-described range.

[0098] A transistor using an oxide semiconductor (hereinafter referred to as an OS transistor) has extremely high field-effect mobility compared to a transistor using amorphous silicon. Furthermore, an OS transistor has an extremely low off-state current and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of an OS transistor can reduce the power consumption of a semiconductor device.

[0099] OS transistors exhibit little change in electrical characteristics due to radiation exposure, i.e., have high radiation resistance, and therefore can be suitably used in environments where radiation may be incident. It can also be said that OS transistors have high reliability against radiation. For example, OS transistors can be suitably used in pixel circuits of X-ray flat panel detectors. Furthermore, OS transistors can be suitably used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton rays, and neutron rays).

[0100] Examples of silicon that can be used for the semiconductor layer 108 include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polysilicon (LTPS).

[0101] A transistor using amorphous silicon for the semiconductor layer 108 can be formed over a large glass substrate and can be manufactured at low cost. A transistor using polycrystalline silicon for the semiconductor layer 108 has high field-effect mobility and can operate at high speed. A transistor using microcrystalline silicon for the semiconductor layer 108 has higher field-effect mobility and can operate at high speed than a transistor using amorphous silicon.

[0102] The semiconductor layer 108 may include a layered material that functions as a semiconductor. A layered material is a general term for a group of materials that have a layered crystal structure. A layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via bonds weaker than covalent bonds or ionic bonds, such as van der Waals bonds. A layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, a transistor with a large on-state current can be provided.

[0103] Examples of the layered material include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogen (an element belonging to Group 16). Examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides. Specific examples of transition metal chalcogenides that can be used as semiconductor layers of transistors include molybdenum sulfide (typically MoS ２ ), molybdenum selenide (typically MoSe ２ ), molybdenum telluride (typically MoTe ２ ), tungsten sulfide (typically WS ２ ), tungsten selenide (typically WSe ２), tungsten tellurium (typically WTe ２ ), hafnium sulfide (typically HfS ２ ), hafnium selenide (typically HfSe ２ ), zirconium sulfide (typically ZrS ２ ), zirconium selenide (typically ZrSe ２ ) etc.

[0104] 1B and the like show an example in which the semiconductor layer 108 has a two-layer structure including the semiconductor layer 108a and the semiconductor layer 108b, but one embodiment of the present invention is not limited to this. The semiconductor layer 108 may have a stacked structure including three or more layers. Note that the semiconductor layer 108 may have a single-layer structure.

[0105] [Opening 141 and Opening 143] The top surface shapes of openings 141 and 143 are not limited and may be, for example, a circle, an ellipse, a triangle, a quadrangle (including a rectangle, a diamond, and a square), a pentagon, or other polygonal shape, or shapes with rounded corners. The polygon may be either a concave polygon (a polygon with at least one interior angle exceeding 180 degrees) or a convex polygon (a polygon with all interior angles less than 180 degrees). As shown in FIG. 1A and other figures, the top surface shapes of openings 141 and 143 are preferably circular. By making the top surface shapes of the openings circular, the processing accuracy when forming the openings can be improved, allowing for the formation of fine-sized openings. Note that, in this specification and other figures, "circular" is not limited to a perfect circle.

[0106] In this specification and the like, the top surface shape of opening 141 refers to the shape of the top surface end portion of insulating layer 110 on the opening 141 side. Also, the top surface shape of opening 143 refers to the shape of the bottom surface end portion of conductive layer 112b on the opening 143 side.

[0107] 1A and other figures, the top surface shapes of openings 141 and 143 can be made to match or approximately match each other. In this case, as shown in Figures 1B and 1C and other figures, it is preferable that the bottom surface edge of conductive layer 112b on the opening 143 side match or approximately match the top surface edge of insulating layer 110 on the opening 141 side. The bottom surface of conductive layer 112b refers to the surface on the insulating layer 110 side. The top surface of insulating layer 110 refers to the surface on the conductive layer 112b side.

[0108] The top surface shapes of openings 141 and 143 do not have to match each other. Furthermore, when the top surfaces of openings 141 and 143 are circular, openings 141 and 143 may or may not be concentric.

[0109] The channel length and channel width of the transistor 100 will be described with reference to FIGS. 3A and 3B.

[0110] In the semiconductor layer 108, a region in contact with the conductive layer 112a functions as one of a source region and a drain region, a region in contact with the conductive layer 112b functions as the other of the source region and the drain region, and a region between the source region and the drain region functions as a channel formation region.

[0111] The channel length of the transistor 100 is the distance between the source region and the drain region. In Figure 3B, the channel length L100 of the transistor 100 is indicated by a dashed double-headed arrow. The channel length L100 can be considered to be the shortest distance between the region of the semiconductor layer 108 that contacts the conductive layer 112a and the region that contacts the conductive layer 112b in a cross-sectional view.

[0112] The channel length L100 of the transistor 100 corresponds to the length of the side surface of the insulating layer 110 on the opening 141 side in a cross-sectional view. That is, the channel length L100 is determined by the film thickness T110 of the insulating layer 110 and the angle θ110 between the side surface of the insulating layer 110 on the opening 141 side and the surface on which the insulating layer 110 is to be formed (here, the upper surface of the conductive layer 112a). Therefore, for example, the channel length L100 can be set to a value smaller than the resolution limit of the exposure equipment, thereby enabling the realization of a fine-sized transistor. Specifically, it is possible to realize a transistor with an extremely small channel length that could not be realized using conventional exposure equipment for mass production of flat panel displays (e.g., minimum line widths of approximately 2 μm or 1.5 μm). Furthermore, it is also possible to realize a transistor with a channel length of less than 10 nm without using the extremely expensive exposure equipment used in cutting-edge LSI technology.

[0113] The channel length L100 may be, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and may be less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less. For example, the channel length L100 may be 100 nm or more and 1 μm or less.

[0114] By reducing the channel length L100, the on-state current of the transistor 100 can be increased. By using the transistor 100, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, a small-sized semiconductor device can be obtained. For example, when the semiconductor device of one embodiment of the present invention is applied to a large display device or a high-resolution display device, even if the number of wirings is increased, signal delay in each wiring can be reduced, and display unevenness can be suppressed. Furthermore, since the area occupied by the circuit can be reduced, the frame of the display device can be narrowed.

[0115] The channel length L100 can be controlled by adjusting the thickness T110 and angle θ110 of the insulating layer 110. In Fig. 3B, the thickness T110 of the insulating layer 110 is indicated by a dashed line with a double-headed arrow.

[0116] The thickness T110 of the insulating layer 110 can be, for example, 10 nm or more, 50 nm or more, 100 nm or more, 150 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more, and less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, or 1 μm or less.

[0117] The side surface of the insulating layer 110 on the opening 141 side is preferably tapered. The angle θ110 formed between the side surface of the insulating layer 110 on the opening 141 side and the surface on which the insulating layer 110 is to be formed (here, the top surface of the conductive layer 112a) is preferably less than 90 degrees. By reducing the angle θ110, the coverage of a layer (e.g., the semiconductor layer 108) provided on the insulating layer 110 can be improved. Furthermore, the smaller the angle θ110, the longer the channel length L100 can be, and the larger the angle θ110, the shorter the channel length L100 can be.

[0118] The angle θ110 can be, for example, 30 degrees or more, 35 degrees or more, 40 degrees or more, 45 degrees or more, 50 degrees or more, 55 degrees or more, 60 degrees or more, 65 degrees or more, or 70 degrees or more, and can be less than 90 degrees, 85 degrees or less, or 80 degrees or less.

[0119] 3A and 3B, the width D143 of the opening 143 is indicated by a two-dot chain line with a double arrow. FIG. 3A shows an example in which the top surface shapes of the openings 141 and 143 are circular. In this case, the width D143 corresponds to the diameter of the circle, and the channel width W100 of the transistor 100 is the length of the circumference of the circle. In other words, the channel width W100 is π×D143. In this way, when the top surface shapes of the openings 141 and 143 are circular, a transistor with a smaller channel width W100 can be realized compared to other shapes.

[0120] The diameter of the opening 141 and the diameter of the opening 143 may differ from each other. Furthermore, the inner diameter of the opening 141 and the inner diameter of the opening 143 may each vary in the depth direction. The diameter of the opening may be, for example, the average value of the diameter at the highest point, the diameter at the lowest point, and the diameter at the midpoint between these in a cross-sectional view of the insulating layer 110 (or the insulating layer 110b). Alternatively, the diameter of the opening may be, for example, any of the diameter at the highest point, the diameter at the lowest point, or the diameter at the midpoint between these in a cross-sectional view of the insulating layer 110 (or the insulating layer 110b).

[0121] When the opening 143 is formed using photolithography, the width D143 of the opening 143 is equal to or greater than the limit resolution of the exposure device. The width D143 can be, for example, 200 nm or greater, 300 nm or greater, 400 nm or greater, or 500 nm or greater, and can be less than 5 μm, 4.5 μm or less, 4 μm or less, 3.5 μm or less, 3 μm or less, 2.5 μm or less, 2 μm or less, 1.5 μm or less, or 1 μm or less.

[0122] [Insulating Layer 110] The insulating layer 110 may have a single-layer structure or a stacked structure of two or more layers. The insulating layer 110 preferably has one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and nitride oxides. Examples of oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, gallium zinc oxide, and hafnium aluminate. Examples of nitrides include silicon nitride and aluminum nitride. Examples of oxynitrides include silicon oxynitride, aluminum oxynitride, gallium oxynitride, yttrium oxynitride, and hafnium oxynitride. Examples of nitride oxides include silicon nitride oxide and aluminum nitride oxide.

[0123] In this specification and the like, an oxynitride refers to a material having a composition in which oxygen is contained in a larger amount than nitrogen, and a nitride oxide refers to a material having a composition in which nitrogen is contained in a larger amount than oxygen.

[0124] The insulating layer 110 has a region in contact with the semiconductor layer 108. When an oxide semiconductor is used for the semiconductor layer 108, it is preferable to use one or more of an oxide and an oxynitride in at least a part of a region of the insulating layer 110 in contact with the semiconductor layer 108 in order to improve interface characteristics between the semiconductor layer 108 and the insulating layer 110. Specifically, it is preferable to use one or more of an oxide and an oxynitride in a region of the insulating layer 110 in contact with a channel formation region of the semiconductor layer 108.

[0125] It is preferable to use one or more of the above oxides and oxynitrides for the insulating layer 110b in contact with the channel formation region of the semiconductor layer 108. Specifically, it is preferable to use one or both of silicon oxide and silicon oxynitride for the insulating layer 110b.

[0126] It is more preferable to use a film that releases oxygen when heated for the insulating layer 110b. When heat is applied during the manufacturing process of the transistor 100, the insulating layer 110b releases oxygen, thereby supplying oxygen to the semiconductor layer 108. By supplying oxygen from the insulating layer 110b to the semiconductor layer 108, particularly to the channel formation region of the semiconductor layer 108, oxygen vacancies in the semiconductor layer 108 can be reduced, and a transistor with good electrical characteristics and high reliability can be obtained.

[0127] For example, oxygen can be supplied to the insulating layer 110b by heat treatment in an oxygen-containing atmosphere or plasma treatment in an oxygen-containing atmosphere. Alternatively, oxygen may be supplied by forming an oxide film on the top surface of the insulating layer 110b by a sputtering method in an oxygen-containing atmosphere. The oxide film may then be removed. Note that in Embodiment 2 described later, an example in which oxygen is supplied to the insulating layer 110b by forming a metal oxide layer 149 will be described.

[0128] The insulating layer 110b is preferably formed by a deposition method such as a sputtering method or a plasma-enhanced chemical vapor deposition (PECVD) method. In particular, when a sputtering method is used, a film with an extremely low hydrogen content can be obtained because a gas containing hydrogen is not required as a deposition gas. Therefore, supply of hydrogen to the semiconductor layer 108 can be suppressed, and the electrical characteristics of the transistor 100 can be stabilized.

[0129] The thickness of the insulating layer 110b can be determined within the range of the thickness (thickness T110) of the insulating layer 110 described above.

[0130] It is preferable to use a film through which oxygen does not easily diffuse for each of the insulating layers 110a and 110c. This prevents oxygen contained in the insulating layer 110b from permeating to the substrate 102 side through the insulating layer 110a and from permeating to the insulating layer 106 side through the insulating layer 110c due to heating. In other words, by sandwiching the insulating layer 110b between the insulating layers 110a and 110c, through which oxygen does not easily diffuse, the oxygen contained in the insulating layer 110b can be confined. This allows oxygen to be effectively supplied to the semiconductor layer 108.

[0131] The insulating layer 110a and the insulating layer 110c are preferably formed using a film through which hydrogen does not easily diffuse, which can prevent hydrogen from diffusing from the outside of the transistor to the semiconductor layer 108 through the insulating layer 110a or the insulating layer 110c.

[0132] For the insulating layer 110a and the insulating layer 110c, it is preferable to use one or more of the above-mentioned oxide, nitride, oxynitride, and nitride oxide, and it is preferable to use one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate. In particular, silicon nitride and silicon nitride oxide are suitable for use as the insulating layer 110a and the insulating layer 110c because they have characteristics of releasing little impurities (e.g., water and hydrogen) from themselves and being less permeable to oxygen and hydrogen.

[0133] Oxygen contained in the insulating layer 110b may oxidize the conductive layer 112a and the conductive layer 112b, resulting in an increase in resistance. By providing the insulating layer 110a between the insulating layer 110b and the conductive layer 112a, it is possible to prevent the conductive layer 112a from being oxidized and the resistance from increasing. Similarly, by providing the insulating layer 110c between the insulating layer 110b and the conductive layer 112b, it is possible to prevent the conductive layer 112b from being oxidized and the resistance from increasing. At the same time, the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 increases, thereby reducing oxygen vacancies in the semiconductor layer 108.

[0134] The thickness of each of the insulating layers 110a and 110c is preferably 5 nm to 100 nm, more preferably 5 nm to 70 nm, further preferably 10 nm to 70 nm, further preferably 10 nm to 50 nm, further preferably 20 nm to 50 nm, and further preferably 20 nm to 40 nm. By setting the thicknesses of the insulating layers 110a and 110c within the above ranges, oxygen vacancies in the semiconductor layer 108, particularly in the channel formation region, can be reduced.

[0135] For example, it is preferable that the insulating layers 110a and 110c be made of silicon nitride, and the insulating layer 110b be made of silicon oxynitride.

[0136] In the semiconductor layer 108, one or both of the region in contact with the insulating layer 110a and the region in contact with the insulating layer 110c may have a higher carrier concentration and lower resistance than the channel formation region. That is, in the semiconductor layer 108, the region in contact with the insulating layer 110a and the region in contact with the insulating layer 110c may function as a source region or a drain region, respectively. In this case, the effective channel length of the transistor 100 may be shorter than the above-described channel length L100.

[0137] For example, by using a material that releases impurities (for example, water or hydrogen) for the insulating layer 110a, the semiconductor layer 108 in a region in contact with the insulating layer 110a can function as a source region or a drain region.

[0138] [Conductive Layer 112a, Conductive Layer 112b, and Conductive Layer 104] The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 may each have a single-layer structure or a stacked structure of two or more layers. Materials that can be used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 include, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, as well as alloys containing one or more of the above metals. The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can each be preferably made of a conductive material with low electrical resistivity, such as one or more of copper, silver, gold, and aluminum. Copper or aluminum is particularly preferred because of its excellent mass productivity.

[0139] Metal oxides (also referred to as oxide conductors) can be used for the conductive layers 112a, 112b, and 104. Examples of oxide conductors (OCs) include indium oxide, zinc oxide, In—Sn oxide (ITO), In—Zn oxide, In—W oxide, In—W—Zn oxide, In—Ti oxide, In—Ti—Sn oxide, In—Sn—Si oxide (also referred to as ITO containing silicon, ITSO), zinc oxide to which gallium is added, and In—Ga—Zn oxide. In particular, oxide conductors containing indium are preferable because of their high conductivity.

[0140] When oxygen vacancies are formed in a metal oxide having semiconductor properties and hydrogen is added to the oxygen vacancies, a donor level is formed near the conduction band. As a result, the metal oxide becomes electrically conductive, and the conductivity of the metal oxide increases. The metal oxide that has become electrically conductive can be called an oxide conductor.

[0141] The conductive layers 112a, 112b, and 104 may each have a stacked structure of a conductive film containing the oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, wiring resistance can be reduced.

[0142] A Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied to each of the conductive layer 112 a, the conductive layer 112 b, and the conductive layer 104. By using a Cu-X alloy film, it is possible to process the film using a wet etching method, thereby reducing manufacturing costs.

[0143] Note that the conductive layers 112a, 112b, and 104 may all be formed using the same material, or at least one of them may be formed using a different material.

[0144] The conductive layer 112a and the conductive layer 112b each have a region in contact with the semiconductor layer 108. When an oxide semiconductor is used for the semiconductor layer 108, if a metal that is easily oxidized (e.g., aluminum) is used for the conductive layer 112a or the conductive layer 112b, an insulating oxide (e.g., aluminum oxide) may be formed between the conductive layer 112a or the conductive layer 112b and the semiconductor layer 108, which may hinder conduction therebetween. Therefore, for the conductive layer 112a and the conductive layer 112b, a conductive material that is not easily oxidized, a conductive material that maintains low electrical resistance even when oxidized, or a conductive oxide material is preferably used.

[0145] For the conductive layer 112a and the conductive layer 112b, it is preferable to use, for example, titanium, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel. These are preferable because they are conductive materials that are resistant to oxidation or conductive materials that maintain low electrical resistance even when oxidized. Note that when the conductive layer 112a or the conductive layer 112b has a stacked structure, it is preferable to use a conductive material that is resistant to oxidation for at least the layer in contact with the semiconductor layer 108.

[0146] The conductive layer 112 a and the conductive layer 112 b can each be formed using any of the above-described oxide conductors, such as indium oxide, zinc oxide, ITO, In—Zn oxide, In—W oxide, In—W—Zn oxide, In—Ti oxide, In—Ti—Sn oxide, In—Sn oxide containing silicon, and zinc oxide doped with gallium.

[0147] The conductive layer 112a and the conductive layer 112b may each be made of a nitride conductor, such as tantalum nitride or titanium nitride.

[0148] 1B and the like illustrate a configuration in which the conductive layer 112a has a stacked-layer structure of a conductive layer 112a_1 and a conductive layer 112a_2 over the conductive layer 112a_1. As illustrated in FIG. 3B , the conductive layer 112a_2 has an opening 145, and the conductive layer 112a_1 is exposed in the opening 145. In the opening 145, the conductive layer 112a_1 has a region in contact with the semiconductor layer 108. It is preferable that the conductive layer 112a_2 does not have a region in contact with the semiconductor layer 108.

[0149] Here, when a conductive material that is not easily oxidized is used for the conductive layers 112a and 112b, the resistance may become high. Since the conductive layers 112a and 112b function as wirings, it is preferable that the resistance be low. Furthermore, when the conductive layer 112a or the conductive layer 112b is oxidized by oxygen contained in the semiconductor layer 108, oxygen vacancies (V Ｏ ) and V Ｏ Therefore, by using a conductive material that is not easily oxidized for the conductive layer 112a_1 having a region in contact with the semiconductor layer 108 and using a material with high conductivity (low resistivity) for the conductive layer 112a_2 not having a region in contact with the semiconductor layer 108, the resistance of the conductive layer 112a can be reduced. Ｏ ) and V Ｏ The increase in H can be suppressed.

[0150] When the channel length L100 is small, the oxygen vacancy in the channel formation region (V Ｏ ) and V Ｏ The influence of H on the electrical characteristics and reliability is particularly large. By using a conductive material that is not easily oxidized for the conductive layer 112a_1, oxygen vacancies (V Ｏ ) and V Ｏ It is possible to suppress an increase in H. Therefore, a transistor having a short channel length, good electrical characteristics, and high reliability can be realized.

[0151] The conductive layer 112a_1 can preferably be made of one or more of an oxide conductor and a nitride conductor. The conductive layer 112a_2 can preferably be made of a material having higher conductivity (lower resistivity) than the conductive layer 112a_1. The conductive layer 112a_2 can preferably be made of, for example, one or more of copper, aluminum, titanium, tungsten, and molybdenum, or an alloy containing one or more of the above metals. Specifically, the conductive layer 112a_1 can preferably be made of In—Sn—Si oxide (ITSO), and the conductive layer 112a_2 can preferably be made of tungsten.

[0152] Note that the structure of the conductive layer 112a can be applied to other conductive layers. For example, as in the transistor 100A shown in FIG. 4A , the conductive layer 112b can have a stacked-layer structure of a conductive layer 112b_1 and a conductive layer 112b_2 over the conductive layer 112b_1. The conductive layer 112b_1 can be formed using a material that can be used for the conductive layer 112a_1. The conductive layer 112b_2 can be formed using a material that can be used for the conductive layer 112a_2. It is preferable that the semiconductor layer 108 have a region in contact with the conductive layer 112b_1 but not a region in contact with the conductive layer 112b_2.

[0153] Alternatively, the conductive layer 112a may have a stacked-layer structure of a conductive layer 112a_2 and a conductive layer 112a_1 over the conductive layer 112a_2, as in the transistor 100B shown in FIG. 4B . The conductive layer 112a_1 has a region in contact with the semiconductor layer 108. As described above, the conductive layer 112a_1 having a region in contact with the semiconductor layer 108 is preferably formed using a conductive material that is resistant to oxidation. The conductive layer 112a_2 is preferably formed using a material with high conductivity (low resistivity). With such a structure, the resistance of the conductive layer 112a can be reduced.

[0154] Note that the structures of the conductive layers 112a and 112b may be determined depending on the required wiring resistance. When the length of the wiring (e.g., the conductive layer 112a) is short and the required wiring resistance of the conductive layer 112a is relatively high, the conductive layer 112a may have a single-layer structure and may be made of a conductive material that is not easily oxidized, as in the transistor 100C shown in Figure 4C. On the other hand, when the length of the wiring (e.g., the conductive layer 112a) is long and the required wiring resistance is relatively low, it is preferable to use a stacked structure of a conductive material that is not easily oxidized and a material with high conductivity (low resistivity) for the conductive layer 112a.

[0155] [Insulating Layer 106] The insulating layer 106 may have a single-layer structure or a stacked structure of two or more layers. The insulating layer 106 preferably has one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and nitride oxides. The insulating layer 106 can be made of the same materials that can be used for the insulating layer 110.

[0156] The insulating layer 106 has a region in contact with the semiconductor layer 108. When an oxide semiconductor is used for the semiconductor layer 108, any one of the above oxides and oxynitrides is preferably used for at least a film that is in contact with the semiconductor layer 108 among films that form the insulating layer 106. It is more preferable to use a film that releases oxygen by heating for the insulating layer 106.

[0157] Specifically, when the insulating layer 106 has a single-layer structure, the insulating layer 106 is preferably made of silicon oxide or silicon oxynitride.

[0158] The insulating layer 106 can have a stacked structure of a first insulating film in contact with the semiconductor layer 108 and a second insulating film in contact with the conductive layer 104. The first insulating film can be made of an oxide or an oxynitride, and preferably includes, for example, silicon oxide or silicon oxynitride. The second insulating film can be made of a nitride or a nitride oxide, and preferably includes, for example, silicon nitride or silicon nitride oxide.

[0159] Silicon nitride and silicon nitride oxide have the characteristics of releasing little impurities (for example, water and hydrogen) from themselves and being difficult for oxygen and hydrogen to permeate, and therefore can be suitably used as the insulating layer 106. By suppressing the diffusion of impurities from the insulating layer 106 to the semiconductor layer 108, the electrical characteristics of the transistor can be improved and the reliability can be increased.

[0160] Note that in a miniaturized transistor, a thin gate insulating layer may result in a large leakage current. By using a material with a high relative dielectric constant (also referred to as a high-k material) for the gate insulating layer, a transistor can be operated at a low voltage while maintaining a physical film thickness. Examples of high-k materials that can be used for the insulating layer 106 include gallium oxide, hafnium oxide, zirconium oxide, an oxide containing aluminum and hafnium, an oxynitride containing aluminum and hafnium, an oxide containing silicon and hafnium, an oxynitride containing silicon and hafnium, and a nitride containing silicon and hafnium.

[0161] [Substrate 102] There are no significant limitations on the material of the substrate 102, but it must have at least heat resistance sufficient to withstand subsequent heat treatment. For example, the substrate 102 may be a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate. A semiconductor element may be provided on the substrate 102. The semiconductor substrate and the insulating substrate may have either a circular or rectangular shape.

[0162] A flexible substrate may be used as the substrate 102, and the transistor 100 and the like may be formed directly on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100 and the like. By providing the peeling layer, after a semiconductor device is partially or entirely completed thereon, it can be separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like can also be transferred to a substrate with poor heat resistance or a flexible substrate.

[0163] The following describes a configuration example that has some configurations different from the above-described configuration example 1. Note that, in the following, descriptions of parts that overlap with the above-described configuration example 1 may be omitted. Also, in the drawings shown below, parts that have the same functions as the above-described configuration example 1 may be hatched with the same pattern and may not be assigned reference numerals.

[0164] 5A and 5B are cross-sectional views of a transistor 100D that can be used in a semiconductor device according to one embodiment of the present invention. For a top view of the transistor 100D, refer to FIG. 1A. FIG. 5A is a cross-sectional view of the section taken along dashed line A1-A2 in FIG. 1A, and FIG. 5B is a cross-sectional view of the section taken along dashed line B1-B2 in FIG.

[0165] The transistor 100D differs from the transistor 100 shown in FIG. 1B mainly in that the semiconductor layer 108 includes a semiconductor layer 108c.

[0166] The semiconductor layer 108 has a three-layer structure including a semiconductor layer 108a, a semiconductor layer 108c on the semiconductor layer 108a, and a semiconductor layer 108b on the semiconductor layer 108c. The semiconductor layer 108c is provided between the semiconductor layer 108a and the semiconductor layer 108b.

[0167] The semiconductor layer 108c can be made of the same material as that used for the semiconductor layer 108. The semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c may be made of the same material or different materials.

[0168] The conductivity of the material used for the semiconductor layer 108c is preferably different from that of the material used for the semiconductor layer 108a, and the conductivity of the material used for the semiconductor layer 108c is preferably different from that of the material used for the semiconductor layer 108b.

[0169] For example, the semiconductor layer 108a can be made of a material having higher conductivity than the semiconductor layer 108c. By using a material having high conductivity for the semiconductor layer 108a in contact with the conductive layer 112a and the conductive layer 112b, the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b can be reduced, and a transistor with a large on-state current can be obtained. Furthermore, the semiconductor layer 108b can be made of a material having lower conductivity than the semiconductor layer 108c. This allows the transistor to be a normally-off transistor.

[0170] Note that the semiconductor layer 108a may be formed using a material having lower conductivity than the semiconductor layer 108c, and the semiconductor layer 108b may be formed using a material having higher conductivity than the semiconductor layer 108c.

[0171] Each of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c preferably contains a metal oxide (oxide semiconductor).

[0172] The band gap of the third metal oxide used for the semiconductor layer 108c is preferably 2.0 eV or more, more preferably 2.5 eV or more.

[0173] The band gap of the third metal oxide used in the semiconductor layer 108c is preferably different from the band gap of the first metal oxide used in the semiconductor layer 108a, and the band gap of the third metal oxide used in the semiconductor layer 108c is preferably different from the band gap of the second metal oxide used in the semiconductor layer 108b.

[0174] For example, the band gap of the first metal oxide used in the semiconductor layer 108a can be smaller than the band gap of the third metal oxide used in the semiconductor layer 108c. This can reduce the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b, thereby providing a transistor with a large on-state current. Furthermore, the band gap of the second metal oxide used in the semiconductor layer 108b can be larger than the band gap of the third metal oxide used in the semiconductor layer 108c. This can provide a normally-off transistor.

[0175] The band gap of the first metal oxide may be larger than the band gap of the third metal oxide, and the band gap of the second metal oxide may be smaller than the band gap of the third metal oxide.

[0176] The band gap can be controlled by varying the compositions of the first to third metal oxides. The composition of the third metal oxide is preferably different from that of the first metal oxide. The composition of the third metal oxide is preferably different from that of the second metal oxide. For example, the content of element M in the third metal oxide can be higher than that of the first metal oxide. The content of element M in the third metal oxide can be lower than that of the second metal oxide.

[0177] The content of element M in the third metal oxide may be lower than the content of element M in the first metal oxide. The content of element M in the third metal oxide may be higher than the content of element M in the second metal oxide.

[0178] The compositions of the first to third metal oxides may be the same or substantially the same. By using the same composition, for example, the same sputtering target can be used for formation, thereby reducing manufacturing costs. The crystallinity of the semiconductor layer 108c is preferably different from that of the semiconductor layer 108a. The crystallinity of the semiconductor layer 108c is preferably different from that of the semiconductor layer 108b. For example, the crystallinity of the semiconductor layer 108a is preferably lower than that of the semiconductor layer 108c. This can reduce the contact resistance between the semiconductor layer 108 and the conductive layer 112a and the contact resistance between the semiconductor layer 108 and the conductive layer 112b, thereby enabling a transistor with a large on-state current. On the other hand, the crystallinity of the semiconductor layer 108b is preferably higher than that of the semiconductor layer 108c. This can provide a normally-off transistor.

[0179] Note that the crystallinity of the semiconductor layer 108c may be lower than that of the semiconductor layer 108a, and may be higher than that of the semiconductor layer 108b.

[0180] 5A and 5B show an example in which the edges of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c are aligned or approximately aligned with one another. The semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c can be formed using the same resist mask. Using the same resist mask can simplify the process. This allows the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c to be formed with approximately the same top surface shape. Note that the edges of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c do not necessarily have to be aligned with one another.

[0181] 6A and 6B are cross-sectional views of a transistor 100E that can be used in a semiconductor device according to one embodiment of the present invention. For a top view of the transistor 100E, refer to FIG. 1A. FIG. 6A is a cross-sectional view of the section taken along dashed line A1-A2 in FIG. 1A, and FIG. 6B is a cross-sectional view of the section taken along dashed line B1-B2 in FIG.

[0182] The transistor 100E differs mainly from the transistor 100 illustrated in FIG. 1B and the like in that the thickness of the conductive layer 112a_1 in a region that is in contact with the bottom surface of the semiconductor layer 108 is different from the thickness of the conductive layer 112a_1 in a region that is not in contact with the semiconductor layer 108.

[0183] As shown in FIG. 6A and other drawings, the thickness of the conductive layer 112a_1 in a region in contact with the bottom surface of the semiconductor layer 108 is preferably thinner than the thickness of a region not in contact with the semiconductor layer 108 .

[0184] 7A and 7B are enlarged views of FIG. 6A . FIG. 7A shows a height H104 from the surface where the conductive layer 112a_1 is to be formed (here, the top surface of the substrate 102) to the lowest point on the bottom surface of the conductive layer 104. Also shown is a height H112a from the surface where the conductive layer 112a_1 is to be formed (here, the top surface of the substrate 102) to the highest point in the region where the conductive layer 112a_1 and the semiconductor layer 108 are in contact with each other. As shown in FIG. 7A , the height H104 from the lowest point on the bottom surface of the conductive layer 104 is preferably equal to or approximately equal to the height H112a from the highest point in the region where the conductive layer 112a_1 and the semiconductor layer 108 are in contact with each other. Alternatively, as shown in FIG. 7B , the height H104 is preferably lower than the height H112a. By making the height H104 to the lowest point of the underside of the conductive layer 104 equal to or lower than the height H112a to the highest point of the region where the conductive layer 112a_1 and the semiconductor layer 108 contact, the electric field of the gate electrode applied to the channel formation region near the conductive layer 112a can be strengthened, and the on-current of the transistor 100E can be increased.

[0185] By making the height H104 of the lowest point of the bottom surface of the conductive layer 104 equal to or lower than the height H112a of the highest point of the region where the conductive layer 112a_1 and the semiconductor layer 108 are in contact with each other, the electric field of the gate electrode applied to the channel formation region can be made more uniform. Here, if the electric field of the gate electrode applied to the channel formation region is nonuniform, the electrical characteristics when the conductive layer 112a is used as the source electrode and the conductive layer 112b is used as the drain electrode may differ from the electrical characteristics when the conductive layer 112a is used as the drain electrode and the conductive layer 112b is used as the source electrode. By making the electric field of the gate electrode applied to the channel formation region of the transistor 100E more uniform, the electrical characteristics of the respective electrodes can be made equivalent. Therefore, the transistor 100E can be suitably used in a circuit configuration in which the source and drain are interchanged.

[0186] Note that the thickness of the conductive layer 112a (specifically, the conductive layer 112a_1) may be adjusted as appropriate so that the height H104 is equal to or smaller than the height H112a.

[0187] 8A and 8B are cross-sectional views of a transistor 100F that can be used in a semiconductor device according to one embodiment of the present invention. For a top view of the transistor 100F, refer to FIG. 1A. FIG. 8A is a cross-sectional view of the cut surface taken along dashed line A1-A2 in FIG. 1A, and FIG. 8B is a cross-sectional view of the cut surface taken along dashed line B1-B2 in FIG.

[0188] The transistor 100F differs from the transistor 100 shown in FIG. 1B etc. mainly in that the insulating layer 110 has an insulating layer 110d.

[0189] The insulating layer 110 includes an insulating layer 110d, an insulating layer 110a on the insulating layer 110d, an insulating layer 110b on the insulating layer 110a, and an insulating layer 110c on the insulating layer 110b.

[0190] The insulating layer 110d has a region in contact with the semiconductor layer 108 and the conductive layer 112a. The insulating layer 110d preferably has a region with a higher hydrogen content than the insulating layer 110a. Similarly, the insulating layer 110d preferably has a region with a higher hydrogen content than the insulating layer 110b. The insulating layer 110d preferably has a region with a higher hydrogen content than the insulating layer 110c. Furthermore, the insulating layer 110d preferably releases hydrogen from itself due to heat applied during the process.

[0191] The hydrogen content of the insulating layers 110a, 110b, 110c, and 110d can be analyzed by, for example, secondary ion mass spectrometry (SIMS).

[0192] FIG. 9 shows an enlarged view of FIG. 8A . By providing the insulating layer 110d, hydrogen is supplied from the insulating layer 110d to a region of the semiconductor layer 108 in contact with the insulating layer 110d, thereby reducing the resistance of the region. This region (hereinafter also referred to as a low-resistance region) can function as a source region or a drain region. By providing a low-resistance region on the conductive layer 112a side of the semiconductor layer 108, the distance from the source region to the gate electrode and the distance from the drain region to the gate electrode can be made more uniform. This makes it possible to make the electric field of the gate electrode applied to the channel formation region more uniform.

[0193] The insulating layer 110d can be made of a material that can be used for the insulating layer 110 described above. In particular, the insulating layer 110d can suitably be made of a material that can be used for the insulating layer 110a and the insulating layer 110c described above. The insulating layer 110d is preferably made of, for example, one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate. Note that the insulating layer 110a, the insulating layer 110c, and the insulating layer 110d may be made of the same material or different materials.

[0194] The deposition gas used to form the insulating layer 110d preferably contains more hydrogen than the deposition gas used to form the insulating layer 110a. Specifically, when the PECVD method is used to form the insulating layer 110, the ratio of the flow rate of ammonia gas to the total flow rate of the deposition gas used to form the insulating layer 110d (hereinafter also referred to as the ammonia flow rate ratio) is preferably higher than the ammonia flow rate ratio of the deposition gas used to form the insulating layer 110a. By forming the insulating layer 110d under conditions with a high ammonia flow rate ratio, the hydrogen content in the insulating layer 110d can be increased. Furthermore, the amount of hydrogen released from the insulating layer 110d due to heat applied to the insulating layer 110d can be increased. Similarly, the deposition gas used to form the insulating layer 110d preferably contains more hydrogen than the deposition gas used to form the insulating layer 110c. Specifically, the ammonia flow rate ratio of the deposition gas used to form the insulating layer 110d is preferably higher than the ammonia flow rate ratio of the deposition gas used to form the insulating layer 110c.

[0195] Here, the insulating layers 110a and 110c preferably release little hydrogen from themselves and are also preferably less permeable to hydrogen. On the other hand, the insulating layer 110d preferably releases a lot of hydrogen from itself. The amount of released hydrogen can be adjusted by differentiating the deposition conditions for the insulating layers 110a and 110c from those for the insulating layer 110d. Specifically, the insulating layers 110a and 110c may be formed differently from the insulating layer 110d in one or more of the following: deposition power (deposition power density), deposition pressure, deposition gas species, deposition gas flow rate ratio, deposition temperature, and distance between the substrate and the electrode. For example, by making the deposition power density of the insulating layer 110d lower than that of the insulating layers 110a and 110c, the hydrogen content in the insulating layer 110d can be made higher than that in the insulating layers 110a and 110c. This increases the amount of hydrogen released from the insulating layer 110d itself when heat is applied to the insulating layer 110d.

[0196] By providing the insulating layer 110a, which is less permeable to hydrogen, between the insulating layer 110d and the insulating layer 110b, hydrogen released from the insulating layer 110d can be prevented from diffusing into the insulating layer 110b. This can prevent hydrogen from diffusing into the channel formation region of the semiconductor layer 108 through the insulating layer 110b, thereby providing a highly reliable transistor with favorable electrical characteristics.

[0197] The film density of the insulating layer 110a is preferably higher than that of the insulating layer 110d. The film density can be evaluated using, for example, Rutherford Backscattering Spectrometry (RBS) or X-ray Reflection (XRR). Differences in film density can sometimes be evaluated using cross-sectional transmission electron microscope (TEM) images. In TEM observation, a high film density results in a darker (darker) transmission electron (TE) image, whereas a low film density results in a lighter (brighter) transmission electron (TE) image. Therefore, the insulating layer 110a may appear darker (darker) in the TE image than the insulating layer 110d. Even when the insulating layer 110a and the insulating layer 110d are made of the same material, the film densities are different, and therefore the boundary between them can sometimes be observed as a difference in contrast in a cross-sectional TEM image.

[0198] 10A is a top view of a transistor 100G that can be used in a semiconductor device of one embodiment of the present invention. FIG. 10B is a cross-sectional view of the transistor 100G taken along dashed dotted line A1-A2 in FIG.

[0199] The transistor 100G differs from the transistor 100C shown in FIG. 4C mainly in that the transistor 100G has a conductive layer 103 between the conductive layer 112a and the insulating layer 110.

[0200] The conductive layer 103 is provided on and in contact with the conductive layer 112a. An opening 148 reaching the conductive layer 112a is provided in the conductive layer 103. The top surface shape of the opening 148 is not particularly limited. Note that the top surface shape of the opening 148 refers to the shape of the top surface end or the bottom surface end of the conductive layer 103 on the opening 148 side.

[0201] The insulating layer 110 is located on the substrate 102, the conductive layer 112a, and the conductive layer 103. The insulating layer 110 is provided so as to cover a portion of the opening 148. The insulating layer 110 is in contact with the conductive layer 112a through the opening 148. The insulating layer 110 has an opening 141 inside the opening 148 that reaches the conductive layer 112a.

[0202] 10B , the thickness T103 of the conductive layer 103 can be considered to be the shortest distance from the upper surface of the conductive layer 112a to the upper surface of the conductive layer 103. The thickness T103 of the conductive layer 103 is longer than the distance L11, which is the shortest distance from the upper surface of the conductive layer 112a to the lower surface of the conductive layer 104 inside the opening 141. In addition, in a cross-sectional view, it can also be said that the lower surface of the conductive layer 104 inside the opening 141 is located lower (closer to the substrate 102) than the upper surface of the conductive layer 103. As a result, the semiconductor layer 108 has a region that overlaps with the conductive layer 104 via the insulating layer 106 and with the conductive layer 103 via the insulating layer 110. In other words, the conductive layer 103 has a region that overlaps with the conductive layer 104 via the insulating layer 110, the semiconductor layer 108, and the insulating layer 106. As a result, the conductive layer 103 can function as a back gate electrode (also referred to as a second gate electrode) of the transistor 100G. In this case, the insulating layer 110 functions as a back gate insulating layer (also referred to as a second gate insulating layer) of the transistor 100D.

[0203] By providing the back gate electrode in the transistor 100G, the potential on the back channel side of the semiconductor layer 108 can be fixed. Therefore, the saturation of the Id-Vd characteristics of the transistor 100G can be improved.

[0204] In this specification and the like, a small change in current (small gradient) in the saturation region in the Id-Vd characteristics of a transistor may be expressed as "high saturation."

[0205] The conductive layer 103 and the conductive layer 112a, which are in contact with each other, are supplied with the same potential. The conductive layer 103, which functions as a backgate electrode, is preferably supplied with the lower potential of the source potential and the drain potential. Therefore, when the transistor 100G is an n-channel transistor, the conductive layer 112a preferably functions as a source electrode and the conductive layer 112b preferably functions as a drain electrode. When the transistor 100G is a p-channel transistor, the conductive layer 112a preferably functions as a drain electrode and the conductive layer 112b preferably functions as a source electrode.

[0206] Generally, when the channel length is short, the saturation in the Id-Vd characteristics of a transistor tends to decrease. However, the transistor 100G has a back gate electrode, and therefore can achieve high saturation.

[0207] The thickness T103 of the conductive layer 103 is preferably 0.5 times or more, more preferably 1.0 times or more, and even more preferably more than 1.0 times the channel length L100. This makes it possible to widen the region in the semiconductor layer 108 that overlaps with the conductive layer 104 via the insulating layer 106 and with the conductive layer 103 via the insulating layer 110. This makes it possible to more reliably control the electric field on the back channel side of the semiconductor layer 108.

[0208] The transistor 100G has a region in which the conductive layer 103, the insulating layer 110, the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 overlap in this order in one direction without any other layers therebetween. The direction in question may be a direction perpendicular to the channel length L100. By widening the region in question, the electric field on the back channel side of the semiconductor layer 108 can be more reliably controlled.

[0209] The distance L12, which is the shortest distance between the conductive layer 103 and the semiconductor layer 108, is preferably shorter than the channel length L100, more preferably 0.5 times or less, and even more preferably 0.1 times or less. The shorter the distance between the conductive layer 103 and the semiconductor layer 108, the higher the saturation of the Id-Vd characteristics of the transistor 100G.

[0210] 11A and 11B are cross-sectional views of a transistor 100H that can be used in a semiconductor device of one embodiment of the present invention. For a top view of the transistor 100H, refer to FIG. 1A. FIG. 11A is a cross-sectional view of the cut surface taken along dashed line A1-A2 in FIG. 1A, and FIG. 11B is a cross-sectional view of the cut surface taken along dashed line B1-B2 in FIG.

[0211] The transistor 100H differs mainly from the transistor 100 illustrated in FIG. 1B and the like in that the insulating layer 106 has a stacked-layer structure.

[0212] The insulating layer 106 includes an insulating layer 106a and an insulating layer 106b over the insulating layer 106a. The insulating layer 106a and the insulating layer 106b can each be formed using the above-described materials that can be used for the insulating layer 106. Note that although an example in which the insulating layer 106 has a two-layer structure is shown here, one embodiment of the present invention is not limited to this. The insulating layer 106 may also have a three-layer or more layer structure.

[0213] An aluminum oxide film is preferably used for the insulating layer 106a. Examples of methods for forming the aluminum oxide film include an ALD method, a sputtering method using an aluminum oxide target, and a reactive sputtering method using an aluminum target. The ALD method is preferable because it allows the formation of a dense film with few cracks and pinholes. The sputtering method is preferable because it has high productivity. Alternatively, for example, an aluminum oxide film may be formed by forming an aluminum film with a thickness of 0.1 nm to 5 nm and then oxidizing the aluminum film.

[0214] By using an aluminum oxide film for the insulating layer 106a in contact with the semiconductor layer 108, aluminum can be present at the interface between the insulating layer 106 and the semiconductor layer 108 and in the vicinity thereof. Specifically, aluminum can be present at the interface between the insulating layer 106 and the semiconductor layer 108a and in the vicinity thereof, and at the interface between the insulating layer 106 and the semiconductor layer 108b and in the vicinity thereof. Aluminum can also penetrate into the semiconductor layer 108. For example, when IGZO is used for the semiconductor layer 108b, aluminum can penetrate into the surface of IGZO and in the vicinity thereof, resulting in a structure in which a portion of the semiconductor layer 108b contains IGZAO. As a result, the semiconductor layer 108b appears to have a stacked structure of IGZO and IGZAO, and has a wider band gap than a single-layer IGZO structure, in other words, a wide-gap semiconductor layer 108b. Widening the band gap of the semiconductor layer 108b can reduce the off-state current of the transistor. Furthermore, the region of the semiconductor layer 108a that contacts the insulating layer 106 may contain IGZAO.

[0215] The insulating layer 106b is preferably formed using, for example, a silicon oxynitride film, which can be formed by, for example, a PECVD method.

[0216] This embodiment mode can be combined with other embodiment modes as appropriate. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.

[0217] 12A to 15B , a method for manufacturing a semiconductor device according to one embodiment of the present invention will be described. Note that with regard to materials and formation methods of elements, descriptions of parts similar to those described in Embodiment 1 may be omitted.

[0218] 12A to 15B show a cross-sectional view taken along dashed dotted line A1-A2 in FIG. 1A and a cross-sectional view taken along dashed dotted line B1-B2 in FIG. 1A side by side.

[0219] Thin films (insulating films, semiconductor films, conductive films, etc.) constituting semiconductor devices can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an ALD method, etc. CVD methods include a PECVD method and a thermal CVD method. One type of thermal CVD method is a metal organic chemical vapor deposition (MOCVD) method.

[0220] Thin films (insulating films, semiconductor films, conductive films, etc.) that constitute semiconductor devices can be formed by wet film formation methods such as spin coating, dipping, spray coating, inkjet, dispensing, screen printing, offset printing, doctor knife method, slit coating, roll coating, curtain coating, or knife coating.

[0221] When processing a thin film constituting a semiconductor device, a photolithography method or the like can be used. Alternatively, the thin film may be processed by a nanoimprint method, a sandblasting method, a lift-off method, or the like. Furthermore, an island-shaped thin film may be directly formed by a film formation method using a shielding mask such as a metal mask.

[0222] There are two typical photolithography methods: one is to form a resist mask on the thin film to be processed, process the thin film by etching or the like, and then remove the resist mask; the other is to form a photosensitive thin film, and then process the thin film into the desired shape by exposure and development.

[0223] In photolithography, the light used for exposure may be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these. Other light sources that can be used include ultraviolet light, KrF laser light, ArF laser light, etc. Exposure may also be performed by immersion exposure technology. Extreme ultraviolet (EUV) light or X-rays may also be used as the light used for exposure. An electron beam may also be used instead of the light used for exposure. Extreme ultraviolet light, X-rays, or an electron beam are preferred because they enable extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, a photomask is not required.

[0224] For etching the thin film, dry etching, wet etching, sandblasting, or the like can be used.

[0225] First, a first conductive film to be the conductive layer 112a_1 and a second conductive film to be the conductive layer 112a_2 are formed over the substrate 102 and then processed to form the conductive layer 112a_1 and the conductive layer 112a_2A ( FIG. 12A ). The conductive layer 112a_2A will later become the conductive layer 112a_2. The first conductive film and the second conductive film can be preferably formed by, for example, sputtering. The first conductive film and the second conductive film can be processed by one or both of wet etching and dry etching.

[0226] Subsequently, part of the conductive layer 112a_2A is removed to form a conductive layer 112a_2 having an opening 145 ( FIG. 12B ). As a result, the conductive layer 112a which functions as one of the source electrode and the drain electrode of the transistor 100 is formed. The opening 145 can be formed by wet etching or dry etching, or both.

[0227] Note that although an example in which the opening 145 is formed after the conductive layer 112a_2A is formed is shown here, one embodiment of the present invention is not limited to this. After the opening 145 is formed in the second conductive film, the second conductive film may be processed into the conductive layer 112a_2.

[0228] Subsequently, an insulating film 110af that will become the insulating layer 110a and an insulating film 110bf that will become the insulating layer 110b are formed on the conductive layer 112a (FIG. 12C).

[0229] The insulating films 110af and 110bf are preferably formed by, for example, sputtering or PECVD. After forming the insulating film 110af, it is preferable to form the insulating film 110bf in succession in vacuum without exposing the surface of the insulating film 110af to the atmosphere. By successively forming the insulating films 110af and 110bf, it is possible to prevent impurities from the atmosphere from adhering to the surface of the insulating film 110af. Examples of such impurities include water and organic substances.

[0230] The substrate temperature during the formation of the insulating films 110af and 110bf is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 400° C. or lower, further preferably 350° C. or higher and 400° C. or lower. By setting the substrate temperature during the formation of the insulating films 110af and 110bf within the above-described range, it is possible to reduce the release of impurities (e.g., water and hydrogen) from the insulating films themselves and to suppress the diffusion of impurities into the semiconductor layer 108. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.

[0231] Since the insulating films 110af and 110bf are formed before the semiconductor layer 108, there is no need to worry about oxygen being desorbed from the semiconductor layer 108 due to heat applied during the formation of the insulating films 110af and 110bf.

[0232] After the insulating film 110bf is formed, oxygen may be supplied to the insulating film 110bf. Examples of a method for supplying oxygen include ion implantation, ion doping, plasma immersion ion implantation, and plasma treatment. For the plasma treatment, an apparatus that converts oxygen gas into plasma using high-frequency power can be suitably used. Examples of apparatus that convert gas into plasma using high-frequency power include a PECVD apparatus, a plasma etching apparatus, and a plasma ashing apparatus. The plasma treatment is preferably performed in an atmosphere containing oxygen. For example, oxygen, nitrous oxide (N ２ O), nitrogen dioxide (NO ２ 12D schematically shows with arrows how oxygen is supplied to the insulating film 110bf.

[0233] Note that the plasma treatment may be performed continuously in a vacuum without exposing the surface of the insulating film 110bf to the atmosphere. For example, when a PECVD apparatus is used to form the insulating film 110bf, it is preferable to perform the plasma treatment in the PECVD apparatus. This can improve productivity.

[0234] Subsequently, a metal oxide layer 149 is preferably formed over the insulating film 110bf (FIG. 13A). By forming the metal oxide layer 149, oxygen can be supplied to the insulating film 110bf.

[0235] The conductivity of the metal oxide layer 149 does not matter. At least one of an insulating film, a semiconductor film, and a conductive film can be used as the metal oxide layer 149. For example, aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or silicon-containing indium tin oxide (ITSO) can be used as the metal oxide layer 149.

[0236] The metal oxide layer 149 is preferably formed using an oxide material containing one or more of the same elements as those of the semiconductor layer 108. In particular, it is preferable to use an oxide semiconductor material that can be used for the semiconductor layer 108.

[0237] When forming the metal oxide layer 149, the amount of oxygen supplied to the insulating film 110bf can be increased by increasing the oxygen flow rate of the deposition gas introduced into the treatment chamber of the deposition apparatus or the oxygen partial pressure in the treatment chamber. The oxygen flow rate or oxygen partial pressure is, for example, 50% to 100%, preferably 65% ​​to 100%, more preferably 80% to 100%, and even more preferably 90% to 100%. In particular, it is preferable to set the oxygen flow rate to 100% and the oxygen partial pressure as close to 100% as possible.

[0238] By forming the metal oxide layer 149 by sputtering in an oxygen-containing atmosphere in this manner, oxygen can be supplied to the insulating film 110bf and oxygen can be prevented from being released from the insulating film 110bf during the formation of the metal oxide layer 149. As a result, a large amount of oxygen can be trapped in the insulating film 110bf. Then, a large amount of oxygen can be supplied to the semiconductor layer 108 by subsequent heat treatment. As a result, oxygen vacancies and V in the semiconductor layer 108 can be reduced. Ｏ H can be reduced, and a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0239] Heat treatment may be performed after the metal oxide layer 149 is formed. By performing heat treatment after the metal oxide layer 149 is formed, oxygen can be effectively supplied from the metal oxide layer 149 to the insulating film 110bf.

[0240] The temperature of the heat treatment is preferably 150° C. or higher and lower than the strain point of the substrate, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 400° C. or lower, and further preferably 350° C. or higher and 400° C. or lower. The heat treatment can be performed in an atmosphere containing one or more of a noble gas, nitrogen, or oxygen. As the nitrogen-containing atmosphere or the oxygen-containing atmosphere, dry air (CDA: Clean Dry Air) may be used. Note that the content of hydrogen, water, and the like in the atmosphere is preferably as low as possible. As the atmosphere, it is preferable to use a high-purity gas with a dew point of −60° C. or lower, preferably −100° C. or lower. Using an atmosphere containing as little hydrogen, water, and the like as possible can prevent hydrogen, water, and the like from being taken into the insulating film 110af and the insulating film 110bf as much as possible. The heat treatment can be performed using an oven, a rapid thermal annealing (RTA) device, etc. By using an RTA device, the heat treatment time can be shortened.

[0241] After the metal oxide layer 149 is formed or after the heat treatment, oxygen may be supplied to the insulating film 110bf through the metal oxide layer 149. Oxygen can be supplied by, for example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment. The above description of the plasma treatment can be referred to, and therefore detailed description thereof will be omitted.

[0242] Next, the metal oxide layer 149 is removed. There is no particular limitation on the method for removing the metal oxide layer 149, but wet etching can be suitably used. By using wet etching, etching of the insulating film 110bf can be suppressed when removing the metal oxide layer 149. This can suppress the thickness of the insulating film 110bf from becoming thin, and can make the thickness of the insulating layer 110b uniform.

[0243] The process of supplying oxygen to the insulating film 110bf is not limited to the above-described method. For example, oxygen radicals, oxygen atoms, oxygen atomic ions, oxygen molecular ions, or the like may be supplied to the insulating film 110bf by ion doping, ion implantation, plasma treatment, or the like. Alternatively, a film that suppresses oxygen desorption may be formed on the insulating film 110bf, and then oxygen may be supplied to the insulating film 110bf through the film. The film is preferably removed after supplying oxygen. The film that suppresses oxygen desorption may be a conductive film or a semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, or tungsten.

[0244] Next, an insulating film 110cf, which will become the insulating layer 110c, is formed on the insulating film 110bf ( FIG. 13B ). The description of the formation of the insulating film 110cf can be referenced, and a detailed description thereof will be omitted. As a result, an insulating film 110f having a layered structure of the insulating films 110af, 110bf, and 110cf is formed. The insulating film 110f will later become the insulating layer 110.

[0245] Next, a conductive film 112bf that will become the conductive layer 112b is formed on the insulating film 110cf (FIG. 13C). The conductive film 112bf can be formed by, for example, sputtering.

[0246] Next, the conductive film 112bf is processed to form a conductive layer 112B (FIG. 14A). The conductive layer 112B will later become the conductive layer 112b. The conductive layer 112B can be preferably formed by, for example, wet etching.

[0247] Subsequently, a part of the conductive layer 112B is removed to form a conductive layer 112b having an opening 143. The opening 143 is provided in a region overlapping with the opening 145. The conductive layer 112b can be formed by one or both of a wet etching method and a dry etching method. In particular, the wet etching method is preferably used.

[0248] Next, a portion of the insulating film 110f is removed to form the insulating layer 110 having an opening 141 ( FIG. 14B ). The opening 141 is provided in a region overlapping with the opening 143. The opening 141 is also provided in a region overlapping with the opening 145, and the conductive layer 112a_1 is exposed by the formation of the opening 141. The insulating layer 110 can be formed by one or both of a wet etching method and a dry etching method. In particular, a dry etching method can be preferably used.

[0249] The opening 141 can be formed using, for example, the resist mask used to form the opening 143. Specifically, a resist mask is formed over the conductive layer 112B, part of the conductive layer 112B is removed using the resist mask to form the opening 143, and part of the insulating film 110f is removed using the resist mask to form the opening 141. The opening 143 may be formed using a resist mask different from the resist mask used to form the opening 141.

[0250] Note that when or after forming the opening 141, a part of the conductive layer 112a (specifically, the conductive layer 112a_1) in a region overlapping with the opening 141 may be removed, thereby achieving the structure shown in FIGS.

[0251] Next, a metal oxide film 108f to be the semiconductor layer 108 is formed so as to cover the openings 141 and 143 ( FIG. 14C ). Here, the metal oxide film 108f is formed by stacking a metal oxide film 108af to be the semiconductor layer 108a and a metal oxide film 108bf to be the semiconductor layer 108b. The metal oxide film 108f is provided in contact with the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.

[0252] The metal oxide film 108af and the metal oxide film 108bf are preferably formed by sputtering using a metal oxide target. Alternatively, the metal oxide film 108af and the metal oxide film 108bf are preferably formed by ALD. After forming the metal oxide film 108af, the metal oxide film 108bf is preferably formed successively without exposing the surface of the metal oxide film 108af to the atmosphere. By successively forming the metal oxide film 108af and the metal oxide film 108bf, adhesion of impurities derived from the atmosphere to the surface of the metal oxide film 108af can be suppressed. Examples of such impurities include water and organic substances. The metal oxide film 108af may be formed using different equipment than the metal oxide film 108bf. Furthermore, the metal oxide film 108af may be formed using different methods than the metal oxide film 108bf.

[0253] The metal oxide films 108af and 108bf are preferably dense films with as few defects as possible. Furthermore, the metal oxide films 108af and 108bf are preferably high-purity films in which impurities including hydrogen are reduced as much as possible. In particular, it is preferable to use crystalline metal oxide films as the metal oxide films 108af and 108bf.

[0254] It is preferable to use oxygen gas when forming the metal oxide film 108af and the metal oxide film 108bf. In particular, by using oxygen gas when forming the metal oxide film 108af, oxygen can be suitably supplied to the insulating layer 110. For example, when an oxide or an oxynitride is used for the insulating layer 110b, oxygen can be suitably supplied to the insulating layer 110b.

[0255] By supplying oxygen to the insulating layer 110b, oxygen is supplied to the semiconductor layer 108 in a later step, and oxygen vacancies and V Ｏ H can be reduced.

[0256] When forming the metal oxide films 108af and 108bf, oxygen gas may be mixed with an inert gas (e.g., helium gas, argon gas, xenon gas, etc.). Note that the higher the oxygen flow rate ratio or oxygen partial pressure of the deposition gas when forming the metal oxide film, the higher the crystallinity of the metal oxide film, resulting in a highly reliable transistor. On the other hand, the lower the oxygen flow rate ratio or oxygen partial pressure, the lower the crystallinity of the metal oxide film, resulting in a transistor with a large on-state current. Note that the oxygen flow rate ratio or oxygen partial pressure when forming the metal oxide film 108af may be the same as or different from the oxygen flow rate ratio or oxygen partial pressure when forming the metal oxide film 108bf. By varying the oxygen flow rate ratio or oxygen partial pressure, the crystallinity of the metal oxide film 108af can be made different from that of the metal oxide film 108bf.

[0257] The oxygen flow rate ratio or oxygen partial pressure when the metal oxide film 108af is formed is preferably lower than the oxygen flow rate ratio or oxygen partial pressure when the metal oxide film 108bf is formed, so that the crystallinity of the metal oxide film 108af to be the semiconductor layer 108a can be lower than the crystallinity of the metal oxide film 108bf to be the semiconductor layer 108b.

[0258] The higher the substrate temperature when forming the metal oxide film, the higher the crystallinity and density of the resulting metal oxide film. On the other hand, the lower the substrate temperature, the lower the crystallinity and electrical conductivity of the resulting metal oxide film. Note that the substrate temperature when forming the metal oxide film 108af and the substrate temperature when forming the metal oxide film 108bf may be the same or different. By varying the substrate temperature, the crystallinity of the metal oxide film 108af and the crystallinity of the metal oxide film 108bf can be made different.

[0259] The substrate temperature during the formation of the metal oxide film 108af and the metal oxide film 108bf is preferably from room temperature to 250° C., more preferably from room temperature to 200° C., and even more preferably from room temperature to 140° C. For example, a substrate temperature of from room temperature to 140° C. is preferable because productivity is increased. Furthermore, by forming the metal oxide film at room temperature or without heating the substrate, the crystallinity can be reduced.

[0260] When the metal oxide film 108af and the metal oxide film 108bf are formed at different substrate temperatures, the substrate temperature when the metal oxide film 108af is formed is preferably lower than the substrate temperature when the metal oxide film 108bf is formed.

[0261] Here, using the same sputtering target to form the metal oxide film 108af and the metal oxide film 108bf can reduce manufacturing costs. Furthermore, by using the same substrate temperature during formation of the metal oxide film 108af and the metal oxide film 108bf, the metal oxide film 108af and the metal oxide film 108bf can be formed with high productivity using the same treatment chamber. For example, it is preferable to use the same sputtering target for the metal oxide film 108af and the metal oxide film 108bf and form them consecutively in the same treatment chamber. In this case, it is preferable to use the same substrate temperature and to set the oxygen flow rate ratio or oxygen partial pressure during formation of the metal oxide film 108af lower than the oxygen flow rate ratio or oxygen partial pressure during formation of the metal oxide film 108bf. This allows the metal oxide film 108af and the metal oxide film 108bf, which have different crystallinity, to be formed with high productivity.

[0262] When the ALD method is used, it is preferable to use a film formation method such as a thermal ALD method or PEALD (Plasma Enhanced ALD). The thermal ALD method is preferable because it exhibits extremely high step coverage. The PEALD method is preferable because it not only exhibits high step coverage but also allows low-temperature film formation.

[0263] The metal oxide film can be formed by, for example, the ALD method using a precursor containing the constituent metal element and an oxidizing agent.

[0264] For example, when forming an In—Ga—Zn oxide, three precursors, i.e., a precursor containing indium, a precursor containing gallium, and a precursor containing zinc, can be used, or two precursors, i.e., a precursor containing indium and a precursor containing gallium and zinc, can be used.

[0265] Examples of precursors containing indium include triethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)indium, cyclopentadienylindium, indium(III) chloride, and (3-(dimethylamino)propyl)dimethylindium.

[0266] Gallium-containing precursors include, for example, trimethylgallium, triethylgallium, gallium trichloride, tris(dimethylamido)gallium, gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)gallium, dimethylchlorogallium, and diethylchlorogallium.

[0267] Examples of zinc-containing precursors include dimethylzinc, diethylzinc, zinc bis(2,2,6,6-tetramethyl-3,5-heptanedionate), and zinc chloride.

[0268] Oxidizing agents include, for example, ozone, oxygen, and water.

[0269] Methods for controlling the composition of the resulting film include adjusting one or more of the type of source gas, the flow rate ratio of the source gas, the time for which the source gas is flowed, and the order in which the source gas is flowed. By adjusting these, the compositions of the metal oxide film 108af and the metal oxide film 108bf can be made different. Furthermore, by adjusting these, a film whose composition changes continuously can be formed. A structure in which the composition of one or both of the metal oxide film 108af and the metal oxide film 108bf changes continuously may also be used.

[0270] For example, the precursor used to form the metal oxide film 108af preferably has a lower gallium content than the precursor used to form the metal oxide film 108bf. Alternatively, a precursor not containing gallium may be used to form the metal oxide film 108af, and a precursor containing gallium may be used to form the metal oxide film 108bf. Note that although gallium is used as the element M in the description here, one embodiment of the present invention is not limited thereto. One or more of the above-described elements M may be used instead of or in addition to gallium.

[0271] Before forming the metal oxide film 108f (specifically, the metal oxide film 108af), it is preferable to perform at least one of a treatment for removing water, hydrogen, organic substances, and the like adsorbed on the surface of the insulating layer 110 and a treatment for supplying oxygen into the insulating layer 110. For example, heat treatment can be performed at a temperature of 70° C. or higher and 200° C. or lower in a reduced pressure atmosphere. Alternatively, plasma treatment in an atmosphere containing oxygen may be performed. Alternatively, dinitrogen monoxide (N ２ Oxygen may be supplied to the insulating layer 110 by plasma treatment in an atmosphere containing an oxidizing gas such as nitrous oxide (NO). When plasma treatment containing nitrous oxide gas is performed, oxygen can be supplied while organic substances on the surface of the insulating layer 110 are suitably removed. After such treatment, it is preferable to form the metal oxide film 108f continuously without exposing the surface of the insulating layer 110 to the air.

[0272] Subsequently, the metal oxide film 108f is processed into an island shape to form the semiconductor layer 108 (FIG. 15A).

[0273] The semiconductor layer 108 can be formed by using one or both of a wet etching method and a dry etching method. For example, a wet etching method is preferable. At this time, a part of the conductive layer 112b in a region that does not overlap with the semiconductor layer 108 may be etched and thinned. Similarly, a part of the insulating layer 110 in a region that does not overlap with both the semiconductor layer 108 and the conductive layer 112b may be etched and thinned. For example, the insulating layer 110c of the insulating layer 110 may be removed by etching, exposing the surface of the insulating layer 110b. Note that, in etching the metal oxide film 108f, using a material with a high selectivity for the insulating layer 110c can prevent the insulating layer 110c from becoming thin.

[0274] Heat treatment is preferably performed after the metal oxide film 108f is formed or after the metal oxide film 108f is processed into the semiconductor layer 108. The heat treatment can remove hydrogen or water contained in or adsorbed on the surface of the metal oxide film 108f or the semiconductor layer 108. Furthermore, the heat treatment may improve the film quality of the metal oxide film 108f or the semiconductor layer 108 (for example, reduce defects or improve crystallinity).

[0275] By the heat treatment, oxygen can also be supplied from the insulating layer 110b to the metal oxide film 108f or the semiconductor layer 108. In this case, it is preferable to perform the heat treatment before processing into the semiconductor layer 108. The above description can be referred to for the heat treatment, and therefore detailed description thereof will be omitted.

[0276] Note that this heat treatment does not have to be performed if it is not necessary. Alternatively, the heat treatment may be omitted here and may be combined with a heat treatment performed in a later step. Furthermore, a high-temperature treatment in a later step (e.g., a film formation step) may also serve as this heat treatment.

[0277] Subsequently, the insulating layer 106 is formed to cover the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110 (FIG. 15B). The insulating layer 106 is preferably formed by, for example, PECVD or ALD.

[0278] When an oxide semiconductor is used for the semiconductor layer 108, the insulating layer 106 preferably functions as a barrier film that suppresses oxygen diffusion. The insulating layer 106 has a function of suppressing oxygen diffusion, which suppresses oxygen from diffusing from above the insulating layer 106 to the conductive layer 104, thereby suppressing oxidation of the conductive layer 104. As a result, a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0279] In this specification and the like, a barrier film refers to a film having barrier properties. For example, an insulating layer having barrier properties can be referred to as a barrier insulating layer. In this specification and the like, the barrier properties refer to one or both of a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability) and a function of capturing or fixing a corresponding substance (also referred to as gettering).

[0280] By increasing the temperature during the formation of the insulating layer 106 that functions as a gate insulating layer, the insulating layer can have fewer defects. However, if the temperature during the formation of the insulating layer 106 is high, oxygen is released from the semiconductor layer 108, causing oxygen vacancies and V in the semiconductor layer 108. Ｏ H may increase. The substrate temperature during the formation of the insulating layer 106 is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, further preferably 250° C. or higher and 450° C. or lower, further preferably 300° C. or higher and 450° C. or lower, and further preferably 300° C. or higher and 400° C. or lower. By setting the substrate temperature during the formation of the insulating layer 106 within the above range, defects in the insulating layer 106 can be reduced and oxygen can be prevented from being released from the semiconductor layer 108. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.

[0281] Before forming the insulating layer 106, plasma treatment may be performed on the surface of the semiconductor layer 108. The plasma treatment can reduce impurities such as water adsorbed on the surface of the semiconductor layer 108. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 can be reduced, and a highly reliable transistor can be realized. This is particularly suitable for the case where the surface of the semiconductor layer 108 is exposed to the air between the formation of the semiconductor layer 108 and the formation of the insulating layer 106. The plasma treatment can be performed in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, or the like, for example. Furthermore, the plasma treatment and the formation of the insulating layer 106 are preferably performed successively without exposure to the air.

[0282] Next, a conductive layer 104 is formed over the insulating layer 106 (FIGS. 1A and 1B). A sputtering method or an ALD method, for example, is suitable for forming a conductive film to be the conductive layer 104. After a resist mask is formed on the conductive film by a photolithography process, the conductive film is processed to form an island-shaped conductive layer 104 that functions as a gate electrode.

[0283] Through the above steps, a semiconductor device of one embodiment of the present invention can be manufactured.

[0284] This embodiment mode can be combined with other embodiment modes as appropriate.

[0285] Embodiment 3 In this embodiment, a display device of one embodiment of the present invention will be described with reference to FIGS.

[0286] The display device of this embodiment can be a high-resolution display device or a large-sized display device. Therefore, the display device of this embodiment can be used as a display unit for electronic devices having relatively large screens, such as television devices, desktop or notebook computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound reproduction devices.

[0287] The display device of the present embodiment can be a high-definition display device, and can therefore be used, for example, as a display unit for a wristwatch-type or bracelet-type information terminal (wearable device), as well as a display unit for a wearable device that can be worn on the head, such as a head-mounted display (HMD) for VR, or a glasses-type AR device.

[0288] The semiconductor device of one embodiment of the present invention can be used for a display device or a module including the display device. Examples of the module including the display device include a module in which a connector such as a flexible printed circuit (hereinafter referred to as FPC) or a tape carrier package (TCP) is attached to the display device, and a module in which an integrated circuit (IC) is mounted by a chip-on-glass (COG) method, a chip-on-film (COF) method, or the like.

[0289] <Display Device 50A> FIG. 16 shows a perspective view of the display device 50A.

[0290] The display device 50A has a configuration in which a substrate 152 and a substrate 151 are bonded together. In Fig. 16, the substrate 152 is indicated by a dashed line.

[0291] The display device 50A has a display unit 162, a connection unit 140, a circuit unit 164, wiring 165, etc. Fig. 16 shows an example in which an IC 173 and an FPC 172 are mounted on the display device 50A. Therefore, the configuration shown in Fig. 16 can also be said to be a display module having the display device 50A, an IC, and an FPC.

[0292] The connection portion 140 is provided on the outside of the display portion 162. The connection portion 140 can be provided along one side or multiple sides of the display portion 162. There may be one or multiple connection portions 140. FIG. 16 shows an example in which the connection portion 140 is provided so as to surround the four sides of the display portion. The connection portion 140 electrically connects the common electrode of the display element and the conductive layer, and can supply a potential to the common electrode.

[0293] The circuit portion 164 includes, for example, a scan line driver circuit (also referred to as a gate driver). Alternatively, the circuit portion 164 may include both a scan line driver circuit and a signal line driver circuit (also referred to as a source driver).

[0294] The wiring 165 has a function of supplying signals and power to the display portion 162 and the circuit portion 164. The signals and power are input to the wiring 165 from the outside via the FPC 172 or input to the wiring 165 from the IC 173.

[0295] 16 shows an example in which an IC 173 is provided on a substrate 151 by a COG method, a COF method, or the like. The IC 173 may be, for example, an IC having one or both of a scanning line driver circuit and a signal line driver circuit. The display device 50A and the display module may be configured without an IC. The IC may also be mounted on an FPC by a COF method, or the like.

[0296] A transistor of one embodiment of the present invention can be applied to, for example, one or both of the display portion 162 and the circuit portion 164 of the display device 50A.

[0297] For example, when the transistor of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, resulting in a high-resolution display device. Furthermore, when the transistor of one embodiment of the present invention is applied to a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, resulting in a display device with a narrow frame. Furthermore, since the transistor of one embodiment of the present invention has favorable electrical characteristics, its use in a display device can improve the reliability of the display device.

[0298] The display section 162 is an area in the display device 50A that displays an image, and has a plurality of periodically arranged pixels 210. Fig. 16 shows an enlarged view of one pixel 210.

[0299] The pixel arrangement in the display device of this embodiment is not particularly limited, and various methods can be applied, such as a stripe arrangement, an S-stripe arrangement, a matrix arrangement, a delta arrangement, a Bayer arrangement, and a pentile arrangement.

[0300] The pixel 210 shown in FIG. 16 has a sub-pixel 11R that emits red light, a sub-pixel 11G that emits green light, and a sub-pixel 11B that emits blue light.

[0301] Each of the sub-pixels 11R, 11G, and 11B includes a display element and a circuit that controls the driving of the display element.

[0302] Various elements can be used as the display element, including, for example, a liquid crystal element and a light-emitting element. Other examples include shutter-type or optical interference-type MEMS (Micro Electro Mechanical Systems) elements, display elements that employ a microcapsule method, an electrophoresis method, an electrowetting method, or an electronic liquid powder (registered trademark) method, etc. Furthermore, a QLED (Quantum-dot LED) that uses a light source and color conversion technology using quantum dot materials may also be used.

[0303] Examples of display devices using liquid crystal elements include transmissive display devices, reflective display devices, and semi-transmissive display devices.

[0304] Examples of the light-emitting element include self-luminous light-emitting elements such as LEDs (Light Emitting Diodes), OLEDs (Organic LEDs), semiconductor lasers, etc. Examples of the LED that can be used include mini LEDs and micro LEDs.

[0305] Examples of light-emitting substances that the light-emitting element has include fluorescent substances (fluorescent materials), phosphorescent substances (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF materials), and inorganic compounds (quantum dot materials, etc.).

[0306] The light-emitting element can emit light of infrared, red, green, blue, cyan, magenta, yellow, white, etc. Furthermore, the color purity can be improved by providing the light-emitting element with a microcavity structure.

[0307] One of a pair of electrodes included in the light-emitting element functions as an anode, and the other electrode functions as a cathode.

[0308] In this embodiment, a case where a light-emitting element is used as a display element will be mainly described as an example.

[0309] Note that the display device of one embodiment of the present invention may be any of a top-emission type that emits light in a direction opposite to a substrate on which a light-emitting element is formed, a bottom-emission type that emits light toward a substrate on which a light-emitting element is formed, and a dual-emission type that emits light to both sides.

[0310] Figure 17 shows an example of a cross section of the display device 50A when a portion of the area including the FPC 172, a portion of the circuit section 164, a portion of the display section 162, a portion of the connection section 140, and a portion of the area including the end portion are cut away.

[0311] 17 includes transistors 205D, 205R, 205G, and 205B, a light-emitting element 130R, a light-emitting element 130G, and a light-emitting element 130B between a substrate 151 and a substrate 152. The light-emitting element 130R is a display element included in the sub-pixel 11R that emits red light, the light-emitting element 130G is a display element included in the sub-pixel 11G that emits green light, and the light-emitting element 130B is a display element included in the sub-pixel 11B that emits blue light.

[0312] The display device 50A employs an SBS structure, which allows the materials and configuration to be optimized for each light-emitting element, increasing the degree of freedom in the selection of materials and configurations and facilitating improvements in brightness and reliability.

[0313] The display device 50A is a top emission type, which allows transistors and the like to be arranged so as to overlap the light emitting region of the light emitting element, thereby enabling a higher pixel aperture ratio than a bottom emission type.

[0314] The transistors 205D, 205R, 205G, and 205B are all formed on the substrate 151. These transistors can be manufactured using the same material and the same process.

[0315] In this embodiment, an example in which OS transistors are used as the transistors 205D, 205R, 205G, and 205B will be described. The transistors according to one embodiment of the present invention can be used as the transistors 205D, 205R, 205G, and 205B. That is, the display device 50A includes the transistor according to one embodiment of the present invention in both the display portion 162 and the circuit portion 164. By using the transistor according to one embodiment of the present invention in the display portion 162, the pixel size can be reduced and the resolution can be improved. Furthermore, by using the transistor according to one embodiment of the present invention in the circuit portion 164, the area occupied by the circuit portion 164 can be reduced and the frame can be narrowed. For the transistor according to one embodiment of the present invention, refer to the description of the previous embodiment.

[0316] Specifically, the transistors 205D, 205R, 205G, and 205B each include a conductive layer 104 that functions as a gate, an insulating layer 106 that functions as a gate insulating layer, conductive layers 112a and 112b that function as a source and a drain, a semiconductor layer 108, and an insulating layer 110 (insulating layers 110a, 110b, and 110c). Here, the same hatched pattern is used to indicate multiple layers obtained by processing the same conductive film. The insulating layer 110 is located between the conductive layer 112a and the conductive layer 112b. The insulating layer 106 is located between the conductive layer 104 and the semiconductor layer 108.

[0317] Note that the transistor included in the display device of this embodiment is not limited to the transistor of one embodiment of the present invention. For example, the display device may include a combination of the transistor of one embodiment of the present invention and a transistor having another structure.

[0318] The display device of this embodiment may include, for example, one or more of a planar transistor, a staggered transistor, and an inverted staggered transistor. The transistor included in the display device of this embodiment may be either a top-gate transistor or a bottom-gate transistor. Alternatively, gates may be provided above and below a semiconductor layer in which a channel is formed.

[0319] The display device of this embodiment mode may include a transistor using silicon for a channel formation region (Si transistor).

[0320] Examples of silicon include single-crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor having an LTPS semiconductor layer (hereinafter also referred to as an LTPS transistor) can be used. The LTPS transistor has high field-effect mobility and favorable frequency characteristics.

[0321] To increase the emission luminance of a light-emitting element included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting element. To achieve this, it is necessary to increase the source-drain voltage of a driving transistor included in the pixel circuit. Since an OS transistor has a higher withstand voltage between its source and drain than a Si transistor, a high voltage can be applied between the source and drain of the OS transistor. Therefore, by using an OS transistor as the driving transistor included in a pixel circuit, it is possible to increase the amount of current flowing through the light-emitting element and increase the emission luminance of the light-emitting element.

[0322] When a transistor operates in a saturation region, an OS transistor can reduce the change in source-drain current with respect to a change in gate-source voltage compared to a Si transistor. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the current flowing between the source and drain can be precisely controlled by changing the gate-source voltage, thereby controlling the amount of current flowing to a light-emitting element. This allows a pixel circuit to have a larger number of gray levels.

[0323] In terms of the saturation of the current that flows when a transistor operates in the saturation region, an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a driving transistor, a stable current can be passed to a light-emitting element, even when the current-voltage characteristics of the EL element vary. In other words, when an OS transistor operates in the saturation region, the source-drain current hardly changes even when the source-drain voltage is changed, thereby stabilizing the light-emitting luminance of the light-emitting element.

[0324] The transistors included in the circuit portion 164 and the transistors included in the display portion 162 may have the same structure or different structures. The transistors included in the circuit portion 164 may all have the same structure or may have two or more types. Similarly, the transistors included in the display portion 162 may all have the same structure or may have two or more types.

[0325] All the transistors included in the display portion 162 may be OS transistors, all the transistors included in the display portion 162 may be Si transistors, or some of the transistors included in the display portion 162 may be OS transistors and the rest may be Si transistors.

[0326] For example, by using both an LTPS transistor and an OS transistor in the display portion 162, a display device with low power consumption and high driving capability can be realized. A structure in which an LTPS transistor and an OS transistor are combined is sometimes referred to as LTPO. Note that a more preferable example is a structure in which an OS transistor is used as a transistor that functions as a switch for controlling conduction / non-conduction between wirings, and an LTPS transistor is used as a transistor for controlling current.

[0327] For example, one of the transistors included in the display portion 162 functions as a transistor for controlling a current flowing to a light-emitting element and can also be called a driving transistor. One of the source and drain of the driving transistor is electrically connected to a pixel electrode of the light-emitting element. The driving transistor is preferably an LTPS transistor. This can increase the current flowing to the light-emitting element in the pixel circuit.

[0328] On the other hand, another transistor included in the display portion 162 functions as a switch for controlling pixel selection / non-selection and can also be called a selection transistor. The gate of the selection transistor is electrically connected to a gate line, and one of the source and drain is electrically connected to a source line (signal line). An OS transistor is preferably used as the selection transistor. This allows the gradation of a pixel to be maintained even when the frame frequency is significantly reduced (for example, 1 fps or less). Therefore, power consumption can be reduced by stopping the driver when displaying a still image.

[0329] An insulating layer 218 is provided to cover the transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided over the insulating layer 218.

[0330] The insulating layer 218 preferably functions as a protective layer for the transistor. The insulating layer 218 is preferably made of a material through which impurities such as water and hydrogen are less likely to diffuse. This allows the insulating layer 218 to function as a barrier film. With such a structure, diffusion of impurities from the outside into the transistor can be effectively suppressed, and the reliability of the display device can be improved.

[0331] The insulating layer 218 preferably includes one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and nitride oxides. Specific examples of these materials are as described above.

[0332] The insulating layer 235 preferably functions as a planarization layer, and is preferably an organic insulating film. Materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene resin, phenolic resin, and precursors of these resins. The insulating layer 235 may also have a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 preferably functions as an etching protection layer. This prevents recesses from being formed in the insulating layer 235 during processing of the pixel electrodes 111R, 111G, 111B, etc. Alternatively, recesses may be formed in the insulating layer 235 during processing of the pixel electrodes 111R, 111G, 111B, etc.

[0333] On the insulating layer 235, the light emitting elements 130R, 130G, and 130B are provided.

[0334] The light-emitting element 130R has a pixel electrode 111R on the insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. The light-emitting element 130R shown in Fig. 17 emits red light (R). The EL layer 113R has a light-emitting layer that emits red light.

[0335] The light-emitting element 130G has a pixel electrode 111G on the insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. The light-emitting element 130G shown in Fig. 17 emits green light (G). The EL layer 113G has a light-emitting layer that emits green light.

[0336] The light-emitting element 130B has a pixel electrode 111B on the insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. The light-emitting element 130B shown in Fig. 17 emits blue light (B). The EL layer 113B has a light-emitting layer that emits blue light.

[0337] 17, the EL layers 113R, 113G, and 113B are all shown with the same film thickness, but this is not limited thereto. The film thicknesses of the EL layers 113R, 113G, and 113B may be different. For example, it is preferable to set the film thickness so that the optical path length of each of the EL layers 113R, 113G, and 113B is such that the light emitted from each of the EL layers 113R, 113G, and 113B is intensified. This allows for a microcavity structure to be realized, and the color purity of the light emitted from each light-emitting element to be improved.

[0338] The pixel electrode 111R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235. Similarly, the pixel electrode 111G is electrically connected to the conductive layer 112b of the transistor 205G, and the pixel electrode 111B is electrically connected to the conductive layer 112b of the transistor 205B.

[0339] Each end of the pixel electrodes 111R, 111G, and 111B is covered with an insulating layer 237. The insulating layer 237 functions as a partition wall (also referred to as a bank, spacer, or bank). The insulating layer 237 can be formed to have a single-layer structure or a stacked-layer structure using one or both of an inorganic insulating material and an organic insulating material. For example, the material that can be used for the insulating layer 218 and the material that can be used for the insulating layer 235 can be used for the insulating layer 237. The insulating layer 237 can electrically insulate the pixel electrode and the common electrode. Furthermore, the insulating layer 237 can electrically insulate adjacent light-emitting elements from each other.

[0340] The common electrode 115 is a continuous film provided in common to the light-emitting elements 130R, 130G, and 130B. The common electrode 115 shared by the plurality of light-emitting elements is electrically connected to a conductive layer 123 provided in the connection portion 140. The conductive layer 123 is preferably formed using the same material and in the same process as the pixel electrodes 111R, 111G, and 111B.

[0341] In a display device according to one embodiment of the present invention, a conductive film that transmits visible light is preferably used for the pixel electrode and the common electrode, which are electrodes from which light is extracted, and a conductive film that reflects visible light is preferably used for the electrode from which light is not extracted.

[0342] A conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted. In this case, it is preferable to place the electrode between the reflective layer and the EL layer. In other words, the light emitted from the EL layer may be reflected by the reflective layer and extracted from the display device.

[0343] Materials for forming the pair of electrodes of the light-emitting element can include metals, alloys, electrically conductive compounds, and mixtures thereof, as appropriate. Specific examples of such materials include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, as well as alloys containing these metals in combination. Other examples of such materials include indium tin oxide (In-Sn oxide, also referred to as ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide. Other examples of such materials include aluminum-containing alloys (aluminum alloys), such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), and silver-containing alloys, such as an alloy of silver and magnesium and an alloy of silver, palladium, and copper (Ag-Pd-Cu, also referred to as APC). Other examples of the material include elements belonging to Group 1 or 2 of the periodic table (e.g., lithium, cesium, calcium, and strontium) that are not exemplified above, rare earth metals such as europium and ytterbium, alloys containing appropriate combinations of these, and graphene.

[0344] The light-emitting element preferably has a micro-optical resonator (microcavity) structure. Therefore, one of the pair of electrodes of the light-emitting element is preferably an electrode that is transparent and reflective to visible light (semi-transmissive / semi-reflective electrode), and the other is preferably an electrode that is reflective to visible light (reflective electrode). By having the light-emitting element have a microcavity structure, the light emitted from the light-emitting layer can be resonated between both electrodes, thereby intensifying the light emitted from the light-emitting element.

[0345] The light transmittance of the transparent electrode is 40% or more. For example, it is preferable to use an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more for the transparent electrode of the light-emitting element. The visible light reflectance of the semi-transmissive / semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less. Furthermore, the resistivity of these electrodes is 1×10 −２ Preferably, it is Ωcm or less.

[0346] The EL layers 113R, 113G, and 113B are each provided in an island shape. In FIG. 17 , the ends of adjacent EL layers 113R and 113G overlap, the ends of adjacent EL layers 113G and 113B overlap, and the ends of adjacent EL layers 113R and 113B overlap. When forming island-shaped EL layers using a fine metal mask, the ends of adjacent EL layers may overlap as shown in FIG. 17 , but this is not limited to this. In other words, adjacent EL layers may not overlap but may be spaced apart. Furthermore, the display device may have both overlapping portions between adjacent EL layers and portions between adjacent EL layers that do not overlap but are spaced apart.

[0347] Each of the EL layers 113R, 113G, and 113B includes at least a light-emitting layer. The light-emitting layer includes one or more light-emitting materials. As the light-emitting material, a material that emits light of a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used. Furthermore, a material that emits near-infrared light can also be used as the light-emitting material.

[0348] The light-emitting material may include a fluorescent material, a phosphorescent material, a TADF material, and a quantum dot material.

[0349] The light-emitting layer may contain one or more organic compounds (host materials, assist materials, etc.) in addition to a light-emitting substance (guest material). As the one or more organic compounds, one or both of a substance with high hole-transport properties (hole-transport material) and a substance with high electron-transport properties (electron-transport material) can be used. Furthermore, as the one or more organic compounds, a bipolar substance (a substance with high electron-transport properties and hole-transport properties) or a TADF material can be used.

[0350] The light-emitting layer preferably includes, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material, which are a combination that easily forms an exciplex. This configuration allows efficient emission using Exciplex-Triple Energy Transfer (ExTET), which is energy transfer from the exciplex to the light-emitting material (phosphorescent material). By selecting a combination that forms an exciplex that emits light that overlaps with the wavelength of the lowest-energy absorption band of the light-emitting material, energy transfer becomes smooth, allowing efficient emission. This configuration simultaneously enables high efficiency, low-voltage operation, and long life of the light-emitting element.

[0351] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole-injecting properties (hole-injecting layer), a layer containing a hole-transporting material (hole-transporting layer), a layer containing a substance with high electron-blocking properties (electron-blocking layer), a layer containing a substance with high electron-injecting properties (electron-injecting layer), a layer containing an electron-transporting material (electron-transporting layer), and a layer containing a substance with high hole-blocking properties (hole-blocking layer).In addition, the EL layer may include one or both of a bipolar material and a TADF material.

[0352] The light-emitting element can be made of either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. The layers constituting the light-emitting element can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0353] The light-emitting element may have a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units). The light-emitting unit has at least one light-emitting layer. The tandem structure is a structure in which multiple light-emitting units are connected in series via a charge-generating layer. When a voltage is applied between a pair of electrodes, the charge-generating layer injects electrons into one of the two light-emitting units and holes into the other. The tandem structure allows the light-emitting element to emit light with high brightness. Furthermore, the tandem structure can reduce the current required to achieve the same brightness compared to a single structure, thereby improving reliability. The tandem structure may also be called a stack structure.

[0354] In Figure 17, when light-emitting elements with a tandem structure are used, it is preferable that EL layer 113R has a structure having multiple light-emitting units that emit red light, EL layer 113G has a structure having multiple light-emitting units that emit green light, and EL layer 113B has a structure having multiple light-emitting units that emit blue light.

[0355] A protective layer 131 is provided on the light-emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded via an adhesive layer 142. A light-shielding layer 117 is provided on the substrate 152. For example, a solid sealing structure or a hollow sealing structure can be applied to seal the light-emitting elements. In FIG. 17 , the space between the substrates 152 and 151 is filled with the adhesive layer 142, and a solid sealing structure is applied. Alternatively, the space may be filled with an inert gas (such as nitrogen or argon), and a hollow sealing structure may be applied. In this case, the adhesive layer 142 may be provided so as not to overlap with the light-emitting elements. Alternatively, the space may be filled with a resin different from the frame-shaped adhesive layer 142.

[0356] The protective layer 131 is preferably provided on at least the display unit 162, and is preferably provided so as to cover the entire display unit 162. The protective layer 131 is preferably provided so as to cover not only the display unit 162, but also the connection unit 140 and the circuit unit 164. The protective layer 131 is preferably provided up to the edge of the display device 50A. On the other hand, in the connection unit 204, the FPC 172 and the conductive layer 166 are electrically connected to each other, so that a portion where the protective layer 131 is not provided is generated.

[0357] By providing the protective layer 131 on the light emitting elements 130R, 130G, and 130B, the reliability of the light emitting elements can be improved.

[0358] The protective layer 131 may have a single layer structure or a stacked structure of two or more layers. The conductivity of the protective layer 131 does not matter. The protective layer 131 can be formed using at least one of an insulating film, a semiconductor film, and a conductive film.

[0359] The protective layer 131 has an inorganic film, which can prevent oxidation of the common electrode 115, prevent impurities (moisture, oxygen, etc.) from entering the light-emitting element, and so on, thereby suppressing deterioration of the light-emitting element and improving the reliability of the display device.

[0360] For example, an inorganic insulating film containing an oxide, a nitride, an oxynitride, a nitride oxide, or the like can be used for the protective layer 131. Specific examples of these materials are as described above. In particular, the protective layer 131 preferably contains a nitride or a nitride oxide, and more preferably contains a nitride.

[0361] The protective layer 131 may be an inorganic film containing ITO, In—Zn oxide, Ga—Zn oxide, Al—Zn oxide, IGZO, or the like. The inorganic film preferably has high resistance, specifically, preferably has higher resistance than the common electrode 115. The inorganic film may further contain nitrogen.

[0362] When light emitted from the light-emitting element is extracted through the protective layer 131, it is preferable that the protective layer 131 has high transparency to visible light. For example, ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.

[0363] For example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used as the protective layer 131. By using such a stacked structure, impurities (water, oxygen, etc.) can be prevented from entering the EL layer side.

[0364] Furthermore, the protective layer 131 may have an organic film. For example, the protective layer 131 may have both an organic film and an inorganic film. Examples of organic films that can be used for the protective layer 131 include the organic insulating films that can be used for the insulating layer 235.

[0365] A connection portion 204 is provided in a region of the substrate 151 where the substrate 152 does not overlap. In the connection portion 204, the wiring 165 is electrically connected to the FPC 172 via a conductive layer 166 and a connection layer 242. In this example, the conductive layer 166 has a single-layer structure of a conductive layer obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B. The conductive layer 166 is exposed on the top surface of the connection portion 204. This allows the connection portion 204 and the FPC 172 to be electrically connected via the connection layer 242.

[0366] The display device 50A is a top-emission type. Light emitted by the light-emitting elements is emitted toward the substrate 152. The substrate 152 is preferably made of a material that is highly transparent to visible light. The pixel electrodes 111R, 111G, and 111B contain a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.

[0367] It is preferable to provide a light-shielding layer 117 on the surface of the substrate 152 facing the substrate 151. The light-shielding layer 117 can be provided between adjacent light-emitting elements, in the connection section 140, in the circuit section 164, and the like.

[0368] A colored layer such as a color filter may be provided on the surface of the substrate 152 on the substrate 151 side or on the protective layer 131. When a color filter is provided over the light-emitting element, the color purity of light emitted from the pixel can be increased.

[0369] Various optical members can be arranged on the outside of the substrate 152 (the surface opposite to the substrate 151). Examples of optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light-collecting film. In addition, a surface protection layer such as an anti-static film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches during use, or an impact absorbing layer may be arranged on the outside of the substrate 152. For example, a glass layer or a silica layer (SiO ｘ The surface protection layer can be preferably formed of a material such as DLC (diamond-like carbon), aluminum oxide (AlO ｘ ), polyester-based materials, or polycarbonate-based materials may also be used. Note that it is preferable to use a material with high transmittance to visible light for the surface protection layer. It is also preferable to use a material with high hardness for the surface protection layer.

[0370] The substrate 151 and the substrate 152 can each be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like. A material that transmits light is used for the substrate on the side from which light from the light-emitting element is extracted. When a flexible material is used for the substrate 151 and the substrate 152, the flexibility of the display device can be increased, and a flexible display can be realized. Furthermore, a polarizing plate may be used for at least one of the substrates 151 and 152.

[0371] Substrate 151 and substrate 152 can be made of polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. At least one of substrate 151 and substrate 152 can be made of glass having a thickness sufficient to provide flexibility.

[0372] When a circularly polarizing plate is superimposed on a display device, it is preferable that the display device has a substrate with high optical isotropy. A substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small). Examples of films with high optical isotropy include triacetyl cellulose (TAC, also called cellulose triacetate) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic films.

[0373] The adhesive layer 142 can be made of various curable adhesives, such as a photo-curable adhesive (e.g., an ultraviolet curable adhesive), a reactive curable adhesive, a thermosetting adhesive, or an anaerobic adhesive. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, a material with low moisture permeability, such as epoxy resin, is preferable. Alternatively, a two-component resin may be used. Alternatively, an adhesive sheet or the like may be used.

[0374] The connection layer 242 may be an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.

[0375] 18 is different from the display device 50A mainly in that a light-emitting element having a common EL layer 113 and a colored layer (such as a color filter) are used for each subpixel of each color. Note that in the following description of the display device, descriptions of parts that are the same as those of the display devices described above may be omitted.

[0376] The display device 50B shown in Figure 18 has, between the substrate 151 and the substrate 152, transistors 205D, 205R, 205G, and 205B, light-emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.

[0377] The light emitting element 130R has a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. The light emitted from the light emitting element 130R is extracted as red light to the outside of the display device 50B via the colored layer 132R.

[0378] The light emitting element 130G has a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. Light emitted from the light emitting element 130G is extracted as green light to the outside of the display device 50B via the colored layer 132G.

[0379] The light emitting element 130B has a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. Light emitted from the light emitting element 130B is extracted as blue light to the outside of the display device 50B via the colored layer 132B.

[0380] The light-emitting elements 130R, 130G, and 130B each share the EL layer 113 and the common electrode 115. The configuration in which the subpixels of each color are provided with a common EL layer 113 can reduce the number of manufacturing steps compared to the configuration in which the subpixels of each color are provided with different EL layers.

[0381] For example, the light emitting elements 130R, 130G, and 130B shown in Fig. 18 emit white light. The white light emitted from the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0382] A light-emitting element that emits white light preferably includes two or more light-emitting layers. When two light-emitting layers are used to obtain white light emission, light-emitting layers may be selected such that the emission colors of the two light-emitting layers have a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer have a complementary color relationship, a configuration in which the light-emitting element as a whole emits white light can be obtained. Furthermore, when three or more light-emitting layers are used to obtain white light emission, the emission colors of the three or more light-emitting layers may be combined to form a configuration in which the light-emitting element as a whole emits white light.

[0383] The EL layer 113 preferably includes, for example, a light-emitting layer having a light-emitting substance that emits blue light and a light-emitting layer having a light-emitting substance that emits visible light with a wavelength longer than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0384] A tandem structure is preferably used for the light-emitting element emitting white light. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow light and a light-emitting unit that emits blue light, a two-stage tandem structure having a light-emitting unit that emits red and green light and a light-emitting unit that emits blue light, a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and a light-emitting unit that emits blue light, in this order, or a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and red light, and a light-emitting unit that emits blue light, in this order, or the like can be applied. For example, the number of stacked light-emitting units and the order of colors can be, from the anode side, a two-layer structure of B and Y, a two-layer structure of B and light-emitting unit X, a three-layer structure of B, Y, and B, and the number of stacked light-emitting layers in light-emitting unit X and the order of colors can be, from the anode side, a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, and G, or a three-layer structure of R, G, and R. Furthermore, another layer can be provided between the two light-emitting layers.

[0385] Alternatively, for example, the light-emitting elements 130R, 130G, and 130B shown in FIG. 18 emit blue light. In this case, the EL layer 113 includes one or more light-emitting layers that emit blue light. In the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. Furthermore, in the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, a color conversion layer can be provided between the light-emitting element 130R or light-emitting element 130G and the substrate 152 to convert the blue light emitted by the light-emitting element 130R or light-emitting element 130G into light with a longer wavelength, thereby extracting red or green light. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer and the substrate 152 on the light-emitting element 130R, and a coloring layer 132G between the color conversion layer and the substrate 152 on the light-emitting element 130G. A portion of the light emitted by the light-emitting element may be transmitted directly without being converted by the color conversion layer. By extracting the light transmitted through the color conversion layer via the colored layer, light other than the desired color can be absorbed by the colored layer, thereby increasing the color purity of the light emitted by the sub-pixel.

[0386] <Display Device 50C> A display device 50C shown in FIG. 19 differs from the display device 50B mainly in that it is a bottom-emission type display device.

[0387] Light emitted from the light-emitting element is emitted toward the substrate 151. A material that is highly transparent to visible light is preferably used for the substrate 151. On the other hand, the light-transmitting property of a material used for the substrate 152 does not matter.

[0388] 19 shows an example in which the light-shielding layer 117 is provided over the substrate 151, the insulating layer 153 is provided over the light-shielding layer 117, and the transistors 205D, 205R (not shown), 205G, and 205B are provided over the insulating layer 153. In addition, the coloring layer 132R (not shown), the coloring layer 132G, and the coloring layer 132B are provided over the insulating layer 218, and the insulating layer 235 is provided over the coloring layer 132R (not shown), the coloring layer 132G, and the coloring layer 132B.

[0389] The light emitting element 130G overlapping the colored layer 132G includes a pixel electrode 111G, an EL layer 113, and a common electrode 115.

[0390] The light emitting element 130B overlapping the colored layer 132B has a pixel electrode 111B, an EL layer 113 and a common electrode 115.

[0391] The pixel electrodes 111G and 111B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom-emission display device, a metal or the like with low resistivity can be used for the common electrode 115, which can suppress voltage drops caused by the resistance of the common electrode 115 and achieve high display quality.

[0392] The transistor of one embodiment of the present invention can be miniaturized and its occupation area can be reduced; therefore, in a bottom-emission display device, the aperture ratio of a pixel can be increased or the pixel size can be reduced.

[0393] <Display Device 50D> A display device 50D shown in FIG. 20A differs from the display device 50A mainly in that it has a light receiving element 130S.

[0394] The display device 50D has a light-emitting element and a light-receiving element in each pixel. In the display device 50D, it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element. The organic EL element and the organic photodiode can be formed on the same substrate. Therefore, an organic photodiode can be built into a display device using an organic EL element.

[0395] In the display device 50D, in which pixels have a light-emitting element and a light-receiving element, the pixels have a light-receiving function, so that it is possible to detect contact or proximity of an object while displaying an image. Therefore, the display unit 162 has one or both of an imaging function and a sensing function in addition to an image display function. For example, in addition to displaying an image using all of the sub-pixels of the display device 50D, it is also possible for some sub-pixels to emit light as a light source, other sub-pixels to perform light detection, and the remaining sub-pixels to display an image.

[0396] Therefore, there is no need to provide a light receiving unit and a light source separately from the display device 50D, and the number of components in the electronic device can be reduced. For example, there is no need to provide a separate biometric authentication device or a capacitive touch panel for scrolling, etc. Therefore, by using the display device 50D, it is possible to provide an electronic device with reduced manufacturing costs.

[0397] When a light receiving element is used as an image sensor, the display device 50D can capture an image using the light receiving element. For example, the image sensor can capture an image for personal authentication using a fingerprint, palm print, iris, pulse shape (including vein shape and artery shape), face, or the like.

[0398] The light receiving element can be used as a touch sensor (also called a direct touch sensor) or a non-contact sensor (also called a hover sensor, hover touch sensor, or touchless sensor). A touch sensor can detect an object (such as a finger, hand, or pen) when the object comes into direct contact with the display device. A non-contact sensor can detect an object without the object touching the display device.

[0399] The light receiving element 130S has a pixel electrode 111S on an insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S. Light Lin is incident on the functional layer 113S from outside the display device 50D.

[0400] The pixel electrode 111S is electrically connected to the conductive layer 112b of the transistor 205S through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.

[0401] The end of the pixel electrode 111S is covered with an insulating layer 237.

[0402] The common electrode 115 is a continuous film provided in common to the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B. The common electrode 115 shared by the light emitting element and the light receiving element is electrically connected to the conductive layer 123 provided in the connection portion 140.

[0403] The functional layer 113S has at least an active layer (also referred to as a photoelectric conversion layer). The active layer includes a semiconductor. Examples of the semiconductor include inorganic semiconductors such as silicon and organic semiconductors including organic compounds. In this embodiment, an example in which an organic semiconductor is used as the semiconductor included in the active layer is shown. By using an organic semiconductor, the light-emitting layer and the active layer can be formed by the same method (for example, vacuum deposition), which is preferable because a common manufacturing device can be used.

[0404] The functional layer 113S may further include a layer containing a substance with high hole transport properties, a substance with high electron transport properties, or a bipolar substance (a substance with high electron transport properties and high hole transport properties) as a layer other than the active layer. Furthermore, without being limited to the above, the functional layer 113S may further include a layer containing a substance with high hole injection properties, a hole blocking material, a substance with high electron injection properties, or an electron blocking material. For the layer other than the active layer of the light-receiving element, for example, the materials that can be used for the light-emitting element described above can be used.

[0405] The light-receiving element can be made of either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. The layers constituting the light-receiving element can be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet printing, or coating.

[0406] A display device 50D shown in FIGS. 20B and 20C has, between a substrate 151 and a substrate 152, a layer 353 having a light receiving element, a circuit layer 355, and a layer 357 having a light emitting element.

[0407] The layer 353 includes, for example, the light receiving element 130S. The layer 357 includes, for example, the light emitting elements 130R, 130G, and 130B.

[0408] The circuit layer 355 includes a circuit for driving the light receiving element and a circuit for driving the light emitting element. The circuit layer 355 includes, for example, transistors 205R, 205G, and 205B. In addition, the circuit layer 355 may include one or more of a switch, a capacitor, a resistor, a wiring, a terminal, and the like.

[0409] 20B shows an example in which the light receiving element 130S is used as a touch sensor. As shown in FIG. 20B, light emitted by the light emitting element in layer 357 is reflected by a finger 352 that touches the display device 50D, and the light receiving element in layer 353 detects the reflected light. This makes it possible to detect that the finger 352 has touched the display device 50D.

[0410] 20C shows an example in which the light receiving element 130S is used as a non-contact sensor. As shown in FIG. 20C, light emitted by a light emitting element in a layer 357 is reflected by a finger 352 that is close to (i.e., not in contact with) the display device 50D, and the light receiving element in a layer 353 detects the reflected light.

[0411] 21 is an example of a display device employing an MML (metal maskless) structure. That is, the display device 50E has light-emitting elements fabricated without using a fine metal mask. The stacked structures from the substrate 151 to the insulating layer 235 and from the protective layer 131 to the substrate 152 are similar to those of the display device 50A, and therefore will not be described here.

[0412] In FIG. 21, light emitting elements 130 R, 130 G, and 130 B are provided on an insulating layer 235 .

[0413] The light-emitting element 130R includes a conductive layer 124R on the insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114. The light-emitting element 130R shown in FIG. 21 emits red light (R). The layer 133R includes a light-emitting layer that emits red light. In the light-emitting element 130R, the layer 133R and the common layer 114 can be collectively referred to as an EL layer. One or both of the conductive layer 124R and the conductive layer 126R can be referred to as a pixel electrode.

[0414] The light-emitting element 130G includes a conductive layer 124G on the insulating layer 235, a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114. The light-emitting element 130G shown in FIG. 21 emits green light (G). The layer 133G includes a light-emitting layer that emits green light. In the light-emitting element 130G, the layer 133G and the common layer 114 can be collectively referred to as an EL layer. One or both of the conductive layer 124G and the conductive layer 126G can be referred to as a pixel electrode.

[0415] The light-emitting element 130B has a conductive layer 124B on the insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114. The light-emitting element 130B shown in FIG. 21 emits blue light (B). The layer 133B has a light-emitting layer that emits blue light. In the light-emitting element 130B, the layer 133B and the common layer 114 can be collectively referred to as an EL layer. Furthermore, one or both of the conductive layer 124B and the conductive layer 126B can be referred to as a pixel electrode.

[0416] In this specification and the like, among the EL layers included in the light-emitting elements, layers provided in an island shape for each light-emitting element are referred to as layers 133B, 133G, or 133R, and a layer shared by a plurality of light-emitting elements is referred to as a common layer 114. Note that in this specification and the like, the layers 133R, 133G, and 133B may be referred to as island-shaped EL layers, EL layers formed in an island shape, or the like, without including the common layer 114.

[0417] The layers 133R, 133G, and 133B are spaced apart from one another. By providing an island-shaped EL layer for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This makes it possible to prevent unintended light emission due to crosstalk, and realize a display device with extremely high contrast.

[0418] 21, the layers 133R, 133G, and 133B are all shown to have the same film thickness, but this is not limitative and the layers 133R, 133G, and 133B may have different film thicknesses.

[0419] The conductive layer 124R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235. Similarly, the conductive layer 124G is electrically connected to the conductive layer 112b of the transistor 205G, and the conductive layer 124B is electrically connected to the conductive layer 112b of the transistor 205B.

[0420] The conductive layers 124R, 124G, and 124B are formed so as to cover the openings provided in the insulating layer 235. A layer 128 is buried in the recesses of the conductive layers 124R, 124G, and 124B, respectively.

[0421] The layer 128 has a function of planarizing the recesses of the conductive layers 124R, 124G, and 124B. Conductive layers 126R, 126G, and 126B, which are electrically connected to the conductive layers 124R, 124G, and 124B, are provided on the conductive layers 124R, 124G, and 124B and the layer 128. Therefore, the regions overlapping with the recesses of the conductive layers 124R, 124G, and 124B can also be used as light-emitting regions, thereby increasing the aperture ratio of the pixel. It is preferable to use a conductive layer that functions as a reflective electrode for the conductive layers 124R and 126R.

[0422] The layer 128 may be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for the layer 128. In particular, the layer 128 is preferably formed using an insulating material, and more preferably using an organic insulating material. For example, the organic insulating material that can be used for the insulating layer 237 described above can be used for the layer 128.

[0423] 21 shows an example in which the top surface of layer 128 has a flat portion, but there are no particular limitations on the shape of layer 128. The top surface of layer 128 can have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0424] The height of the upper surface of layer 128 and the height of the upper surface of conductive layer 124R may be the same or approximately the same, or may be different from each other. For example, the height of the upper surface of layer 128 may be lower or higher than the height of the upper surface of conductive layer 124R.

[0425] The edge of the conductive layer 126R may be flush with the edge of the conductive layer 124R, or may cover the side surface of the edge of the conductive layer 124R. The edges of the conductive layer 124R and the conductive layer 126R preferably have a tapered shape. Specifically, the edges of the conductive layer 124R and the conductive layer 126R preferably have a tapered shape with a taper angle of less than 90 degrees. When the edge of the pixel electrode has a tapered shape, the layer 133R provided along the side surface of the pixel electrode also has a tapered shape. By tapering the side surface of the pixel electrode, the coverage of the EL layer provided along the side surface of the pixel electrode can be improved.

[0426] The conductive layers 124G, 126G and the conductive layers 124B, 126B are similar to the conductive layers 124R, 126R, and therefore detailed description thereof will be omitted.

[0427] The upper surface and side surfaces of the conductive layer 126R are covered with the layer 133R. Similarly, the upper surface and side surfaces of the conductive layer 126G are covered with the layer 133G, and the upper surface and side surfaces of the conductive layer 126B are covered with the layer 133B. Therefore, the entire region where the conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting region of the light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.

[0428] Part of the top surface and side surfaces of each of the layers 133R, 133G, and 133B are covered with insulating layers 125 and 127. A common layer 114 is provided on the layers 133R, 133G, 133B, and insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. The common layer 114 and the common electrode 115 are each a continuous film provided in common to a plurality of light-emitting elements.

[0429] 21, the insulating layer 237 shown in FIG. 17 and other figures is not provided between the conductive layer 126R and the layer 133R. That is, the display device 50E does not have an insulating layer (also called a partition, bank, spacer, or the like) that is in contact with the pixel electrode and covers the upper edge of the pixel electrode. Therefore, the distance between adjacent light-emitting elements can be made extremely narrow. Therefore, a high-definition or high-resolution display device can be obtained. Furthermore, a mask for forming the insulating layer is not required, which reduces the manufacturing cost of the display device.

[0430] As described above, the layers 133R, 133G, and 133B each have a light-emitting layer. The layers 133R, 133G, and 133B each preferably have a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. Alternatively, the layers 133R, 133G, and 133B each preferably have a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer. Alternatively, the layers 133R, 133G, and 133B each preferably have a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. Because the surfaces of the layers 133R, 133G, and 133B are exposed during the manufacturing process of the display device, providing one or both of a carrier transport layer and a carrier block layer on the light-emitting layer can prevent the light-emitting layer from being exposed to the outermost surface and reduce damage to the light-emitting layer. This can improve the reliability of the light-emitting element.

[0431] The common layer 114 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The common layer 114 is shared by the light-emitting elements 130R, 130G, and 130B.

[0432] The side surfaces of the layers 133R, 133G, and 133B are covered with the insulating layer 125. The insulating layer 127 covers the side surfaces of the layers 133R, 133G, and 133B with the insulating layer 125 interposed therebetween.

[0433] The side surfaces (and even part of the upper surfaces) of the layers 133R, 133G, and 133B are covered with at least one of the insulating layer 125 and the insulating layer 127, which prevents the common layer 114 (or the common electrode 115) from coming into contact with the pixel electrodes and the side surfaces of the layers 133R, 133G, and 133B, thereby preventing short circuits in the light-emitting elements, thereby improving the reliability of the light-emitting elements.

[0434] The insulating layer 125 is preferably in contact with each side surface of the layer 133R, the layer 133G, and the layer 133B. By configuring the insulating layer 125 to be in contact with the layer 133R, the layer 133G, and the layer 133B, peeling of the layer 133R, the layer 133G, and the layer 133B can be prevented, and the reliability of the light-emitting element can be improved.

[0435] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses in the insulating layer 125. The insulating layer 127 preferably covers at least a part of the side surface of the insulating layer 125.

[0436] By providing the insulating layers 125 and 127, the gaps between adjacent island-shaped layers can be filled, which reduces large unevenness in height on the surface on which layers (e.g., a carrier injection layer, a common electrode, etc.) are formed on the island-shaped layers, thereby making the surface flatter, thereby improving the coverage of the carrier injection layer, the common electrode, etc.

[0437] The common layer 114 and the common electrode 115 are provided over the layer 133R, the layer 133G, the layer 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, a step is generated between a region where the pixel electrode and the island-shaped EL layer are provided and a region where the pixel electrode and the island-shaped EL layer are not provided (a region between light-emitting elements). In the display device of one embodiment of the present invention, the insulating layer 125 and the insulating layer 127 can flatten the step, thereby improving the coverage of the common layer 114 and the common electrode 115. Therefore, poor connection due to disconnection can be suppressed. Furthermore, the step can suppress an increase in electrical resistance due to a local thinning of the common electrode 115.

[0438] The upper surface of the insulating layer 127 preferably has a highly flat shape. The upper surface of the insulating layer 127 may have at least one of a flat surface, a convex curved surface, and a concave curved surface. For example, the upper surface of the insulating layer 127 preferably has a highly flat convex curved surface shape with a large radius of curvature.

[0439] The insulating layer 125 can be an insulating layer containing an inorganic material. For example, oxide, nitride, oxynitride, nitride oxide, or the like can be used for the insulating layer 125. Specific examples of these materials are as described above. The insulating layer 125 may have a single-layer structure or a stacked-layer structure. Aluminum oxide is particularly preferable because it has a high etching selectivity with respect to the EL layer and protects the EL layer in the formation of the insulating layer 127 described later. By using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by an ALD method as the insulating layer 125, the insulating layer 125 can be formed with fewer pinholes and excellent protection of the EL layer. The insulating layer 125 may also have a stacked-layer structure of a film formed by an ALD method and a film formed by a sputtering method. For example, the insulating layer 125 may have a stacked-layer structure of an aluminum oxide film formed by an ALD method and a silicon nitride film formed by a sputtering method.

[0440] The insulating layer 125 preferably functions as a barrier insulating layer against at least one of water and oxygen. The insulating layer 125 preferably has a function of suppressing diffusion of at least one of water and oxygen. The insulating layer 125 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.

[0441] The insulating layer 125 has a function as a barrier insulating layer or a gettering function, which can suppress the intrusion of impurities (typically, at least one of water and oxygen) that may diffuse into each light-emitting element from the outside. With this structure, a highly reliable light-emitting element and a highly reliable display device can be provided.

[0442] The insulating layer 125 preferably has a low impurity concentration. This can prevent impurities from entering the EL layer from the insulating layer 125 and causing deterioration of the EL layer. Furthermore, by reducing the impurity concentration in the insulating layer 125, the barrier properties against at least one of water and oxygen can be improved. For example, it is desirable that the insulating layer 125 has a sufficiently low hydrogen concentration or a sufficiently low carbon concentration, or preferably both of them.

[0443] The insulating layer 127 provided on the insulating layer 125 has a function of flattening large unevenness of the insulating layer 125 formed between adjacent light-emitting elements. In other words, the insulating layer 127 has the effect of improving the flatness of the surface on which the common electrode 115 is formed.

[0444] An insulating layer containing an organic material can be suitably used as the insulating layer 127. A photosensitive organic resin is preferably used as the organic material, and for example, a photosensitive resin composition containing an acrylic resin is preferably used. Note that in this specification and the like, the term "acrylic resin" does not refer only to polymethacrylic acid ester or methacrylic resin, but may refer to all acrylic polymers in a broad sense.

[0445] The insulating layer 127 may be made of an acrylic resin, a polyimide resin, an epoxy resin, an imide resin, a polyamide resin, a polyimideamide resin, a silicone resin, a siloxane resin, a benzocyclobutene-based resin, a phenolic resin, or a precursor of any of these resins. Alternatively, the insulating layer 127 may be made of an organic material such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or an alcohol-soluble polyamide resin. Alternatively, a photoresist may be used as the photosensitive resin. Either a positive-type material or a negative-type material may be used as the photosensitive organic resin.

[0446] The insulating layer 127 may be made of a material that absorbs visible light. The insulating layer 127 absorbs light emitted from the light-emitting element, thereby suppressing leakage of light from the light-emitting element to an adjacent light-emitting element through the insulating layer 127 (stray light). This can improve the display quality of the display device. Furthermore, since the display quality can be improved without using a polarizing plate in the display device, a lightweight and thin display device can be realized.

[0447] Examples of materials that absorb visible light include materials containing pigments such as black, materials containing dyes, light-absorbing resin materials (e.g., polyimide), and resin materials that can be used for color filters (color filter materials). In particular, using a resin material in which two or more color filter materials are laminated or mixed is preferable because it can enhance the visible light blocking effect. In particular, mixing three or more color filter materials makes it possible to form a black or nearly black resin layer.

[0448] <Display Device 50F> A display device 50F shown in FIG. 22 differs from the display device 50E mainly in that a colored layer (such as a color filter) is provided in each sub-pixel of each color.

[0449] The display device 50F shown in Figure 22 has, between the substrate 151 and the substrate 152, transistors 205D, 205R, 205G, and 205B, light-emitting elements 130R, 130G, and 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.

[0450] The light emitted from the light emitting element 130R is extracted as red light to the outside of the display device 50F via the colored layer 132R. Similarly, the light emitted from the light emitting element 130G is extracted as green light to the outside of the display device 50F via the colored layer 132G. The light emitted from the light emitting element 130B is extracted as blue light to the outside of the display device 50F via the colored layer 132B.

[0451] Each of the light-emitting elements 130R, 130G, and 130B has a layer 133. These three layers 133 are formed using the same process and the same material. Furthermore, these three layers 133 are spaced apart from one another. By providing an island-shaped EL layer for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This makes it possible to prevent unintended light emission due to crosstalk, and realize a display device with extremely high contrast.

[0452] For example, the light emitting elements 130R, 130G, and 130B shown in Fig. 22 emit white light. The white light emitted from the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0453] Alternatively, for example, the light-emitting elements 130R, 130G, and 130B shown in FIG. 22 emit blue light. In this case, the layer 133 includes one or more light-emitting layers that emit blue light. In the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. Furthermore, in the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, a color conversion layer can be provided between the light-emitting element 130R or light-emitting element 130G and the substrate 152 to convert the blue light emitted by the light-emitting element 130R or light-emitting element 130G into light with a longer wavelength, thereby allowing red or green light to be extracted. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer and the substrate 152 on the light-emitting element 130R, and a coloring layer 132G between the color conversion layer and the substrate 152 on the light-emitting element 130G. By extracting the light transmitted through the color conversion layer via the colored layer, light other than the desired color can be absorbed by the colored layer, thereby increasing the color purity of the light emitted by the sub-pixel.

[0454] <Display Device 50G> A display device 50G shown in FIG. 23 differs from the display device 50F mainly in that it is a bottom-emission display device.

[0455] Light emitted from the light-emitting element is emitted toward the substrate 151. A material that is highly transparent to visible light is preferably used for the substrate 151. On the other hand, the light-transmitting property of a material used for the substrate 152 does not matter.

[0456] 23 shows an example in which the light-shielding layer 117 is provided over the substrate 151, the insulating layer 153 is provided over the light-shielding layer 117, and the transistors 205D, 205R (not shown), 205G, and 205B are provided over the insulating layer 153. In addition, the coloring layer 132R (not shown), the coloring layer 132G, and the coloring layer 132B are provided over the insulating layer 218, and the insulating layer 235 is provided over the coloring layer 132R (not shown), the coloring layer 132G, and the coloring layer 132B.

[0457] The light emitting element 130G overlapping the colored layer 132G has a conductive layer 124G, a conductive layer 126G, an EL layer 113, a common layer 114, and a common electrode 115.

[0458] The light emitting element 130B overlapping the colored layer 132B has a conductive layer 124B, a conductive layer 126B, an EL layer 113, a common layer 114, and a common electrode 115.

[0459] The conductive layers 124G, 124B, 126G, and 126B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom-emission display device, a metal or the like with low resistivity can be used for the common electrode 115, which can suppress voltage drops caused by the resistance of the common electrode 115 and achieve high display quality.

[0460] The transistor of one embodiment of the present invention can be miniaturized and its occupation area can be reduced; therefore, in a bottom-emission display device, the aperture ratio of a pixel can be increased or the pixel size can be reduced.

[0461] <Example of Manufacturing Method of Display Device> A manufacturing method of a display device using an MML (metal maskless) structure will be described below with reference to Fig. 24. Here, a process for manufacturing light-emitting elements without using a fine metal mask will be described in detail. Fig. 24 shows cross-sectional views of three light-emitting elements and the connection portion 140 of the display unit 162 in each process.

[0462] The light-emitting element can be fabricated using vacuum processes such as vapor deposition, and solution processes such as spin coating and inkjet printing. Vapor deposition methods include physical vapor deposition (PVD) methods such as sputtering, ion plating, ion beam deposition, molecular beam deposition, and vacuum deposition, and chemical vapor deposition (CVD). In particular, functional layers included in the EL layer (hole injection layer, hole transport layer, hole blocking layer, light-emitting layer, electron blocking layer, electron transport layer, electron injection layer, charge generation layer, etc.) can be formed by vapor deposition (vacuum deposition, etc.), coating methods (dip coating, die coating, bar coating, spin coating, spray coating, etc.), printing methods (inkjet printing, screen (stencil printing), offset (lithographic printing), flexography (relief printing), gravure, microcontact printing, etc.), etc.

[0463] The island-shaped layer (layer including the light-emitting layer) manufactured by the manufacturing method of the display device described below is not formed using a fine metal mask, but is formed by forming the light-emitting layer on the entire surface and then processing it using photolithography. Therefore, it is possible to realize a high-definition display device or a display device with a high aperture ratio, which has been difficult to achieve until now. Furthermore, since the light-emitting layer can be made separately for each color, it is possible to realize a display device that is extremely vivid, has high contrast, and has high display quality. Furthermore, by providing a sacrificial layer on the light-emitting layer, damage to the light-emitting layer during the manufacturing process of the display device can be reduced, thereby improving the reliability of the light-emitting element.

[0464] For example, if a display device is composed of three types of light-emitting elements, namely, a light-emitting element that emits blue light, a light-emitting element that emits green light, and a light-emitting element that emits red light, three types of island-shaped light-emitting layers can be formed by repeating the deposition of the light-emitting layer and processing by photolithography three times.

[0465] First, the pixel electrodes 111R, 111G, and 111B and the conductive layer 123 are formed on the substrate 151 on which the transistors 205R, 205G, and 205B (not shown) are provided (FIG. 24A).

[0466] The conductive film to be the pixel electrodes can be formed by, for example, sputtering or vacuum evaporation. After a resist mask is formed on the conductive film by a photolithography process, the conductive film is processed to form the pixel electrodes 111R, 111G, and 111B and the conductive layer 123. The conductive film can be processed by either or both of a wet etching method and a dry etching method.

[0467] Next, a film 133Bf, which will later become the layer 133B, is formed on the pixel electrodes 111R, 111G, and 111B (FIG. 24A). The film 133Bf (later layer 133B) includes a light-emitting layer that emits blue light.

[0468] In this embodiment mode, an example is shown in which an island-shaped EL layer included in a light-emitting element that emits blue light is first formed, and then an island-shaped EL layer included in a light-emitting element that emits light of another color is formed.

[0469] In the process of forming the island-shaped EL layer, the pixel electrodes of the light-emitting elements of the colors formed second or later may be damaged in the previous process, which may result in a higher driving voltage for the light-emitting elements of the colors formed second or later.

[0470] Therefore, when manufacturing a display device according to one embodiment of the present invention, it is preferable to start with an island-shaped EL layer of a light-emitting element that emits light with the shortest wavelength (for example, a blue light-emitting element). For example, it is preferable to form the island-shaped EL layers in the order of blue, green, and red, or blue, red, and green.

[0471] This maintains a good state of the interface between the pixel electrode and the EL layer in the blue light-emitting element, and prevents the drive voltage of the blue light-emitting element from increasing. It also extends the life of the blue light-emitting element and improves its reliability. Since the red and green light-emitting elements are less susceptible to increases in drive voltage, etc., compared to the blue light-emitting element, the drive voltage of the entire display device can be reduced and reliability can be improved.

[0472] The order of forming the island-shaped EL layers is not limited to the above, and may be, for example, red, green, and blue.

[0473] 24A , the film 133Bf is not formed on the conductive layer 123. For example, by using an area mask, the film 133Bf can be formed only in a desired region. By employing a film formation process using an area mask and a processing process using a resist mask, the light-emitting element can be fabricated by a relatively simple process.

[0474] The heat resistance temperature of the compounds contained in the film 133Bf is preferably 100° C. or higher and 180° C. or lower, more preferably 120° C. or higher and 180° C. or lower, and more preferably 140° C. or higher and 180° C. or lower. This can improve the reliability of the light-emitting element. Also, the upper limit of the temperature that can be applied in the manufacturing process of the display device can be increased. Therefore, the range of choices for materials and manufacturing methods used in the display device can be expanded, and the yield and reliability can be improved.

[0475] The heat resistance temperature can be, for example, any one of the glass transition point, softening point, melting point, thermal decomposition temperature, and 5% weight loss temperature, preferably the lowest temperature among these.

[0476] The film 133Bf can be formed by, for example, a vapor deposition method, specifically a vacuum deposition method. Alternatively, the film 133Bf may be formed by a transfer method, a printing method, an inkjet method, a coating method, or the like.

[0477] Subsequently, a sacrificial layer 118B is formed on the film 133Bf and the conductive layer 123 (FIG. 24A). After a resist mask is formed by a photolithography process on the film that will become the sacrificial layer 118B, the film is processed to form the sacrificial layer 118B.

[0478] By providing the sacrificial layer 118B over the film 133Bf, damage to the film 133Bf during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting element can be improved.

[0479] The sacrificial layer 118B is preferably provided so as to cover the respective ends of the pixel electrodes 111R, 111G, and 111B. This means that the ends of the layer 133B, which will be formed in a later process, will be located outside the ends of the pixel electrode 111B. This allows the entire upper surface of the pixel electrode 111B to be used as a light-emitting region, thereby increasing the aperture ratio of the pixel. Furthermore, since the ends of the layer 133B may be damaged in a process after the formation of the layer 133B, it is preferable that they be located outside the ends of the pixel electrode 111B, i.e., not be used as a light-emitting region. This makes it possible to suppress variations in the characteristics of the light-emitting elements and improve reliability.

[0480] By covering the upper and side surfaces of the pixel electrode 111B with the layer 133B, each step after the formation of the layer 133B can be performed without exposing the pixel electrode 111B. If the edge of the pixel electrode 111B is exposed, corrosion may occur during an etching step or the like. By suppressing corrosion of the pixel electrode 111B, the yield and characteristics of the light-emitting element can be improved.

[0481] The sacrificial layer 118B is preferably provided also in a position overlapping with the conductive layer 123. This can prevent the conductive layer 123 from being damaged during the manufacturing process of the display device.

[0482] The sacrificial layer 118B is made of a film that is highly resistant to the processing conditions of the film 133Bf, specifically, a film that has a large etching selectivity with respect to the film 133Bf.

[0483] The sacrificial layer 118B is formed at a temperature lower than the heat resistance temperature of each compound contained in the film 133Bf. The substrate temperature when forming the sacrificial layer 118B is typically 200° C. or lower, preferably 150° C. or lower, more preferably 120° C. or lower, more preferably 100° C. or lower, and even more preferably 80° C. or lower.

[0484] A high heat resistance temperature of the compound contained in the film 133Bf is preferable because the film formation temperature of the sacrificial layer 118B can be increased. For example, the substrate temperature during the formation of the sacrificial layer 118B can be set to 100°C or higher, 120°C or higher, or 140°C or higher. The higher the film formation temperature, the denser the inorganic insulating film can be and the higher the barrier properties can be. Therefore, by forming the sacrificial layer at such a temperature, damage to the film 133Bf can be further reduced, and the reliability of the light-emitting element can be improved.

[0485] The same applies to the film formation temperatures of other layers (for example, the insulating film 125f) formed on the film 133Bf.

[0486] The sacrificial layer 118B can be formed by, for example, sputtering, ALD (including thermal ALD and PEALD), CVD, or vacuum deposition. Alternatively, the sacrificial layer 118B may be formed by the wet film formation method described above.

[0487] The sacrificial layer 118B (a layer provided in contact with the film 133Bf when the sacrificial layer 118B has a laminated structure) is preferably formed using a formation method that causes less damage to the film 133Bf. For example, it is preferable to use the ALD method or the vacuum deposition method rather than the sputtering method.

[0488] The sacrificial layer 118B can be processed by wet etching or dry etching, and is preferably processed by anisotropic etching.

[0489] By using the wet etching method, damage to the film 133Bf during processing of the sacrificial layer 118B can be reduced compared to when using the dry etching method. When using the wet etching method, it is preferable to use, for example, a developer, a tetramethylammonium hydroxide (TMAH) aqueous solution, dilute hydrofluoric acid, oxalic acid, phosphoric acid, acetic acid, nitric acid, or a mixed solution containing two or more of these. Furthermore, when using the wet etching method, a mixed acid chemical solution containing water, phosphoric acid, dilute hydrofluoric acid, and nitric acid may also be used. Note that the chemical solution used in the wet etching process may be alkaline or acidic.

[0490] The sacrificial layer 118B may be made of, for example, one or more of a metal film, an alloy film, a metal oxide film, a semiconductor film, an inorganic insulating film, and an organic insulating film.

[0491] The sacrificial layer 118B can be made of a metal material such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, titanium, aluminum, yttrium, zirconium, and tantalum, or an alloy material containing such a metal material.

[0492] The sacrificial layer 118B can be made of a metal oxide such as In-Ga-Zn oxide, indium oxide, In-Zn oxide, In-Sn oxide, indium titanium oxide (In-Ti oxide), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), or indium tin oxide containing silicon.

[0493] In addition, instead of the above gallium, an element M (M is one or more elements selected from aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) may be used.

[0494] For example, semiconductor materials such as silicon or germanium can be used as materials that are highly compatible with semiconductor manufacturing processes. Alternatively, oxides or nitrides of the above semiconductor materials can be used. Alternatively, nonmetals such as carbon or compounds thereof can be used. Alternatively, metals such as titanium, tantalum, tungsten, chromium, and aluminum, or alloys containing one or more of these, can be used. Alternatively, oxides containing the above metals, such as titanium oxide or chromium oxide, or nitrides such as titanium nitride, chromium nitride, or tantalum nitride can be used.

[0495] The sacrificial layer 118B can be made of any of various inorganic insulating films that can be used for the protective layer 131. In particular, an oxide insulating film is preferable because it has higher adhesion to the film 133Bf than a nitride insulating film. For example, the sacrificial layer 118B can be made of an inorganic insulating material such as aluminum oxide, hafnium oxide, or silicon oxide. For example, an aluminum oxide film can be formed as the sacrificial layer 118B by using the ALD method. Using the ALD method is preferable because it can reduce damage to the base (particularly the film 133Bf).

[0496] For example, the sacrificial layer 118B can be a stacked structure of an inorganic insulating film (e.g., an aluminum oxide film) formed using the ALD method and an inorganic film (e.g., an In-Ga-Zn oxide film, a silicon film, or a tungsten film) formed using the sputtering method.

[0497] The same inorganic insulating film can be used for both the sacrificial layer 118B and the insulating layer 125 to be formed later. For example, an aluminum oxide film formed using an ALD method can be used for both the sacrificial layer 118B and the insulating layer 125. The same deposition conditions can be applied to the sacrificial layer 118B and the insulating layer 125, or different deposition conditions can be applied. For example, by depositing the sacrificial layer 118B under the same conditions as the insulating layer 125, the sacrificial layer 118B can be an insulating layer with high barrier properties against at least one of water and oxygen. On the other hand, since the sacrificial layer 118B is a layer that is removed mostly or entirely in a later process, it is preferable that it be easily processed. Therefore, the sacrificial layer 118B is preferably deposited under conditions where the substrate temperature during deposition is lower than that of the insulating layer 125.

[0498] An organic material may be used for the sacrificial layer 118B. For example, the organic material may be a material that is soluble in a solvent that is chemically stable with respect to at least the film located at the top of the film 133Bf. In particular, a material that dissolves in water or alcohol is preferably used. When forming a film of such a material, it is preferable to apply the material dissolved in a solvent such as water or alcohol using a wet film formation method, and then perform a heat treatment to evaporate the solvent. In this case, performing the heat treatment under a reduced pressure atmosphere is preferable because it allows the solvent to be removed at a low temperature and in a short time, thereby reducing thermal damage to the film 133Bf.

[0499] The sacrificial layer 118B may be made of an organic resin such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, alcohol-soluble polyamide resin, or a fluororesin such as a perfluoropolymer.

[0500] For example, the sacrificial layer 118B can be a laminated structure of an organic film (e.g., a PVA film) formed using either a vapor deposition method or the above-mentioned wet film formation method, and an inorganic film (e.g., a silicon nitride film) formed using a sputtering method.

[0501] Note that in the display device of one embodiment of the present invention, part of the sacrificial film may remain as a sacrificial layer.

[0502] Subsequently, the film 133Bf is processed using the sacrificial layer 118B as a hard mask to form a layer 133B (FIG. 24B).

[0503] 24B , a stacked structure of the layer 133B and the sacrificial layer 118B remains on the pixel electrode 111B. The pixel electrodes 111R and 111G are exposed. In addition, the sacrificial layer 118B remains on the conductive layer 123 in the region corresponding to the connection portion 140.

[0504] The film 133Bf is preferably processed by anisotropic etching, particularly anisotropic dry etching, or wet etching.

[0505] Thereafter, the steps of forming the film 133Bf, the sacrificial layer 118B, and the layer 133B are repeated at least twice, using different light-emitting materials, to form a layered structure of the layer 133R and the sacrificial layer 118R on the pixel electrode 111R, and a layered structure of the layer 133G and the sacrificial layer 118G on the pixel electrode 111G ( FIG. 24C ). Specifically, the layer 133R is formed to include a light-emitting layer that emits red light, and the layer 133G is formed to include a light-emitting layer that emits green light. The sacrificial layers 118R and 118G can be made of the same material as that used for the sacrificial layer 118B, and may be made of the same material or different materials.

[0506] The side surfaces of the layers 133B, 133G, and 133R are preferably perpendicular or substantially perpendicular to the surface on which they are to be formed. For example, the angle between the surface on which they are to be formed and these side surfaces is preferably 60 degrees or more and 90 degrees or less.

[0507] As described above, the distance between any two adjacent layers of the layers 133B, 133G, and 133R formed using photolithography can be narrowed to 8 μm or less, 5 μm or less, 3 μm or less, 2 μm or less, or 1 μm or less. Here, the distance can be defined, for example, as the distance between the opposing ends of any two adjacent layers of the layers 133B, 133G, and 133R. By narrowing the distance between the island-shaped EL layers in this manner, a display device with high definition and a large aperture ratio can be provided.

[0508] Next, an insulating film 125f, which will later become the insulating layer 125, is formed to cover the pixel electrode, layer 133B, layer 133G, layer 133R, sacrificial layer 118B, sacrificial layer 118G, and sacrificial layer 118R, and an insulating layer 127 is formed on the insulating film 125f (Figure 24D).

[0509] The insulating film 125f is preferably formed to a thickness of 3 nm or more, 5 nm or more, or 10 nm or more, and 200 nm or less, 150 nm or less, 100 nm or less, or 50 nm or less.

[0510] The insulating film 125f is preferably formed by, for example, an ALD method. The ALD method is preferable because it can reduce film formation damage and form a film with high coverage. For example, an aluminum oxide film is preferably formed as the insulating film 125f by the ALD method.

[0511] Alternatively, the insulating film 125f may be formed by a sputtering method, a CVD method, or a PECVD method, which have a faster film formation rate than an ALD method. This enables a highly reliable display device to be manufactured with high productivity.

[0512] The insulating film that becomes the insulating layer 127 is preferably formed by the aforementioned wet film formation method (e.g., spin coating) using, for example, a photosensitive resin composition containing an acrylic resin. After film formation, it is preferable to perform a heat treatment (also called pre-baking) to remove the solvent contained in the insulating film. Next, visible light or ultraviolet light is irradiated onto a portion of the insulating film to expose the portion. Next, development is performed to remove the exposed region of the insulating film. Next, a heat treatment (also called post-baking) is performed. This allows the insulating layer 127 shown in FIG. 24D to be formed. Note that the shape of the insulating layer 127 is not limited to the shape shown in FIG. 24D. For example, the top surface of the insulating layer 127 can have one or more of a convex curved surface, a concave curved surface, and a flat surface. Furthermore, the insulating layer 127 may cover the side surfaces of the end portions of at least one of the insulating layer 125, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R.

[0513] 24E , an etching process is performed using the insulating layer 127 as a mask to remove the insulating film 125f and portions of the sacrificial layers 118B, 118G, and 118R. As a result, openings are formed in the sacrificial layers 118B, 118G, and 118R, respectively, exposing the top surfaces of the layers 133B, 133G, and 133R, and the conductive layer 123. Note that portions of the sacrificial layers 118B, 118G, and 118R may remain in positions overlapping with the insulating layer 127 and the insulating layer 125 (see sacrificial layers 119B, 119G, and 119R).

[0514] The etching process can be performed by dry etching or wet etching. Note that if the insulating film 125f is formed using the same material as the sacrificial layers 118B, 118G, and 118R, the etching process can be performed all at once, which is preferable.

[0515] As described above, by providing the insulating layer 127, the insulating layer 125, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R, it is possible to prevent poor connection between the light-emitting elements in the common layer 114 and the common electrode 115 due to separation and to prevent an increase in electrical resistance due to a locally thin portion of the film thickness. As a result, the display device of one embodiment of the present invention can have improved display quality.

[0516] Subsequently, the common layer 114 and the common electrode 115 are formed in this order on the insulating layer 127, the layer 133B, the layer 133G, and the layer 133R (FIG. 24F).

[0517] The common layer 114 can be formed by a method such as a vapor deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, or a coating method.

[0518] For example, sputtering or vacuum deposition can be used to form the common electrode 115. Alternatively, a film formed by deposition and a film formed by sputtering may be stacked.

[0519] As described above, in the manufacturing method of a display device according to one embodiment of the present invention, the island-shaped layers 133B, 133G, and 133R are formed by depositing and processing a film over the entire surface rather than using a fine metal mask. This allows the island-shaped layers to be formed with uniform thicknesses. This makes it possible to realize a high-resolution display device or a display device with a high aperture ratio. Furthermore, even when the resolution or aperture ratio is high and the distance between subpixels is extremely short, the layers 133B, 133G, and 133R can be prevented from contacting each other in adjacent subpixels. Therefore, leakage current between subpixels can be suppressed. This prevents unintended light emission due to crosstalk, and realizes a display device with extremely high contrast.

[0520] By providing the insulating layer 127 having a tapered edge between adjacent island-shaped EL layers, it is possible to suppress the occurrence of a step during the formation of the common electrode 115 and to prevent the formation of a locally thin portion in the common electrode 115. This can suppress the occurrence of a connection failure due to the disconnected portion in the common layer 114 and the common electrode 115 and an increase in electrical resistance due to the locally thin portion. Therefore, the display device of one embodiment of the present invention can achieve both high resolution and high display quality.

[0521] This embodiment mode can be combined with other embodiment modes as appropriate.

[0522] Embodiment 4 In this embodiment, electronic devices of one embodiment of the present invention will be described with reference to FIGS.

[0523] The electronic devices of this embodiment include the display device of one embodiment of the present invention in their display portions. The display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, the display device of one embodiment of the present invention can be used in the display portions of various electronic devices.

[0524] Examples of electronic devices include electronic devices with relatively large screens such as television sets, desktop or notebook computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound playback devices.

[0525] In particular, the display device of one embodiment of the present invention can be suitably used in electronic devices having a relatively small display area because it can increase the resolution. Examples of such electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), and head-mounted wearable devices such as VR devices such as head-mounted displays, AR glasses-type devices, and MR devices.

[0526] The display device of one embodiment of the present invention preferably has an extremely high resolution such as HD (1280 × 720 pixels), FHD (1920 × 1080 pixels), WQHD (2560 × 1440 pixels), WQXGA (2560 × 1600 pixels), 4K (3840 × 2160 pixels), or 8K (7680 × 4320 pixels). A resolution of 4K, 8K, or higher is particularly preferable. Furthermore, the pixel density (resolution) of the display device of one embodiment of the present invention is preferably 100 ppi or higher, more preferably 300 ppi or higher, more preferably 500 ppi or higher, more preferably 1000 ppi or higher, more preferably 2000 ppi or higher, more preferably 3000 ppi or higher, more preferably 5000 ppi or higher, and even more preferably 7000 ppi or higher. By using a display device having either or both of high resolution and high definition, it is possible to further enhance the sense of realism and depth. Furthermore, the screen ratio (aspect ratio) of the display device of one embodiment of the present invention is not particularly limited. For example, the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, and 16:10.

[0527] The electronic device of this embodiment may have a sensor (including the function of detecting, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light).

[0528] The electronic device of the present embodiment can have various functions, such as a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, time, etc., a function to execute various software (programs), a wireless communication function, a function to read out programs or data recorded on a recording medium, etc.

[0529] 25A to 25D , examples of wearable devices that can be worn on the head are described. These wearable devices have at least one of the following functions: a function to display AR content, a function to display VR content, a function to display SR content, and a function to display MR content. By having an electronic device with the function to display at least one of AR, VR, SR, and MR content, it is possible to enhance the sense of immersion felt by the user.

[0530] The electronic device 700A shown in FIG. 25A and the electronic device 700B shown in FIG. 25B each have a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting units 723, a control unit (not shown), an imaging unit (not shown), a pair of optical members 753, a frame 757, and a pair of nose pads 758.

[0531] The display device of one embodiment of the present invention can be applied to the display panel 751. Therefore, the electronic device can provide an extremely high-definition display.

[0532] The electronic device 700A and the electronic device 700B can each project an image displayed on the display panel 751 onto a display area 756 of the optical member 753. Because the optical member 753 is translucent, the user can see the image displayed in the display area superimposed on a transmitted image visually recognized through the optical member 753. Therefore, the electronic device 700A and the electronic device 700B are each electronic devices capable of AR display.

[0533] Electronic device 700A and electronic device 700B may be provided with a camera capable of capturing an image in front of them as an imaging unit. Furthermore, electronic device 700A and electronic device 700B may each be provided with an acceleration sensor such as a gyro sensor, thereby detecting the orientation of the user's head and displaying an image corresponding to that orientation in display area 756.

[0534] The communication unit has a wireless communication device, and can supply a video signal, etc. Instead of or in addition to the wireless communication device, a connector to which a cable through which a video signal and a power supply potential are supplied may be provided.

[0535] The electronic device 700A and the electronic device 700B are provided with a battery (not shown), which can be charged wirelessly and / or by wire.

[0536] The housing 721 may be provided with a touch sensor module. The touch sensor module has a function of detecting a touch on the outer surface of the housing 721. The touch sensor module can detect a tap operation or a slide operation by the user and perform various processes. For example, a tap operation can perform a process such as pausing or resuming a video, and a slide operation can perform a process such as fast-forwarding or fast-rewinding. Furthermore, providing a touch sensor module on each of the two housings 721 can expand the range of operations.

[0537] Various touch sensors can be used as the touch sensor module. For example, various types of touch sensors can be used, such as a capacitance type, a resistive film type, an infrared type, an electromagnetic induction type, a surface acoustic wave type, and an optical type. In particular, it is preferable to use a capacitance type or an optical type sensor in the touch sensor module.

[0538] When an optical touch sensor is used, a photoelectric conversion element can be used as the light receiving element. The active layer of the photoelectric conversion element can be made of either or both of an inorganic semiconductor and an organic semiconductor.

[0539] 25C and 25D each include a pair of display units 820, a housing 821, a communication unit 822, a pair of mounting units 823, a control unit 824, a pair of imaging units 825, and a pair of lenses 832. Note that the display unit 820, the communication unit 822, and the imaging unit 825 are omitted in Fig. 25D.

[0540] The display device of one embodiment of the present invention can be applied to the display portion 820. Therefore, an electronic device capable of displaying images with extremely high definition can be provided. This allows a user to feel a high sense of immersion.

[0541] The display unit 820 is provided inside the housing 821 at a position that can be viewed through the lens 832. In addition, by displaying different images on the pair of display units 820, it is possible to perform three-dimensional display using parallax.

[0542] The electronic device 800A and the electronic device 800B can be said to be electronic devices for VR. A user wearing the electronic device 800A or the electronic device 800B can view an image displayed on the display unit 820 through the lens 832.

[0543] It is preferable that electronic device 800A and electronic device 800B each have a mechanism that can adjust the left and right positions of lens 832 and display unit 820 so that they are optimally positioned according to the position of the user's eyes. It is also preferable that electronic device 800A and electronic device 800B each have a mechanism that can adjust the focus by changing the distance between lens 832 and display unit 820.

[0544] The mounting unit 823 allows the user to mount the electronic device 800A or the electronic device 800B on the head. Note that, in Fig. 25C and other figures, the mounting unit 823 is shaped like the temples of glasses, but is not limited to this. The mounting unit 823 may be shaped like a helmet or a band, for example, as long as it can be worn by the user.

[0545] The imaging unit 825 has a function of acquiring external information. Data acquired by the imaging unit 825 can be output to the display unit 820. An image sensor can be used for the imaging unit 825. Furthermore, multiple cameras may be provided to support multiple angles of view, such as telephoto and wide-angle.

[0546] Although an example including the imaging unit 825 is shown here, a distance measuring sensor (hereinafter also referred to as a detection unit) capable of measuring the distance to an object may be provided. That is, the imaging unit 825 is one aspect of the detection unit. For example, an image sensor or a range image sensor such as a LIDAR (Light Detection and Ranging) can be used as the detection unit. By using an image obtained by the camera and an image obtained by the range image sensor, more information can be obtained, enabling more accurate gesture operations.

[0547] The electronic device 800A may have a vibration mechanism that functions as a bone conduction earphone. For example, a configuration having such a vibration mechanism can be applied to one or more of the display unit 820, the housing 821, and the wearing unit 823. This allows a user to enjoy video and audio simply by wearing the electronic device 800A, without the need for separate audio equipment such as headphones, earphones, or speakers.

[0548] The electronic device 800A and the electronic device 800B may each have an input terminal to which a cable can be connected for supplying a video signal from a video output device or the like and power for charging a battery provided in the electronic device.

[0549] The electronic device of one embodiment of the present invention may have a function of wireless communication with an earphone 750. The earphone 750 includes a communication unit (not shown) and has a wireless communication function. The earphone 750 can receive information (e.g., audio data) from the electronic device through the wireless communication function. For example, the electronic device 700A shown in FIG. 25A has a function of transmitting information to the earphone 750 through the wireless communication function. Furthermore, for example, the electronic device 800A shown in FIG. 25C has a function of transmitting information to the earphone 750 through the wireless communication function.

[0550] The electronic device may have an earphone unit. Electronic device 700B shown in Fig. 25B has earphone unit 727. For example, earphone unit 727 and the control unit may be configured to be connected to each other by wire. Part of the wiring connecting earphone unit 727 and the control unit may be disposed inside housing 721 or wearing unit 723.

[0551] Similarly, electronic device 800B shown in Fig. 25D has earphone unit 827. For example, earphone unit 827 and control unit 824 can be configured to be connected to each other by wire. Part of the wiring connecting earphone unit 827 and control unit 824 may be disposed inside housing 821 or wearing unit 823. Furthermore, earphone unit 827 and wearing unit 823 may have magnets. This allows earphone unit 827 to be fixed to wearing unit 823 by magnetic force, which is preferable as it makes storage easier.

[0552] The electronic device may have an audio output terminal to which earphones or headphones can be connected. The electronic device may also have one or both of an audio input terminal and an audio input mechanism. For example, a sound collection device such as a microphone can be used as the audio input mechanism. By having the audio input mechanism, the electronic device may be endowed with the functionality of a so-called headset.

[0553] As described above, as electronic devices of one embodiment of the present invention, both glasses-type devices (such as the electronic devices 700A and 700B) and goggle-type devices (such as the electronic devices 800A and 800B) are suitable.

[0554] An electronic device according to one embodiment of the present invention can transmit information to an earphone via a wired or wireless connection.

[0555] The electronic device 6500 shown in FIG. 26A is a portable information terminal that can be used as a smartphone.

[0556] The electronic device 6500 includes a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, and the like. The display portion 6502 has a touch panel function.

[0557] The display device of one embodiment of the present invention can be applied to the display portion 6502 .

[0558] FIG. 26B is a schematic cross-sectional view including the end of the housing 6501 on the microphone 6506 side.

[0559] A light-transmitting protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, optical members 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are arranged in the space surrounded by the housing 6501 and the protective member 6510.

[0560] A display panel 6511, an optical member 6512, and a touch sensor panel 6513 are fixed to the protective member 6510 by adhesive layers (not shown).

[0561] In a region outside the display portion 6502, a part of the display panel 6511 is folded back, and an FPC 6515 is connected to the folded back part. An IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to a terminal provided on a printed circuit board 6517.

[0562] The flexible display of one embodiment of the present invention can be applied to the display panel 6511. Therefore, an extremely lightweight electronic device can be realized. In addition, since the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted thereon while keeping the thickness of the electronic device small. Furthermore, by folding back a part of the display panel 6511 and arranging a connection portion with the FPC 6515 on the back side of the pixel portion, an electronic device with a narrow frame can be realized.

[0563] 26C shows an example of a television set. A television set 7100 has a display portion 7000 built into a housing 7101. Here, the housing 7101 is supported by a stand 7103.

[0564] The display device of one embodiment of the present invention can be applied to the display portion 7000 .

[0565] 26C can be operated using operation switches provided on the housing 7101 and a separate remote control 7111. Alternatively, the display portion 7000 may be provided with a touch sensor, and the television set 7100 may be operated by touching the display portion 7000 with a finger or the like. The remote control 7111 may have a display portion that displays information output from the remote control 7111. Using operation keys or a touch panel provided on the remote control 7111, the channel and volume can be controlled, and an image displayed on the display portion 7000 can be controlled.

[0566] The television device 7100 is configured to include a receiver, a modem, and the like. Ordinary television broadcasts can be received using the receiver. Furthermore, by connecting to a wired or wireless communication network via the modem, it is possible to perform one-way (from a sender to a receiver) or two-way (between a sender and a receiver, or between receivers, etc.) information communication.

[0567] 26D shows an example of a notebook computer 7200. The notebook computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, and an external connection port 7214. The housing 7211 includes a display portion 7000.

[0568] The display device of one embodiment of the present invention can be applied to the display portion 7000 .

[0569] 26E and 26F show an example of digital signage.

[0570] 26E includes a housing 7301, a display portion 7000, and a speaker 7303. The digital signage 7300 may further include an LED lamp, operation keys (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like.

[0571] 26F shows a digital signage 7400 attached to a cylindrical pillar 7401. The digital signage 7400 has a display unit 7000 provided along the curved surface of the pillar 7401.

[0572] 26E and 26F, the display device of one embodiment of the present invention can be applied to the display portion 7000.

[0573] The larger the display unit 7000, the more information can be provided at one time. Also, the larger the display unit 7000, the more easily it will attract people's attention, which can increase the advertising effectiveness of, for example, advertisements.

[0574] Applying a touch panel to the display unit 7000 is preferable because it not only displays images or videos on the display unit 7000 but also allows the user to intuitively operate it. Furthermore, when used to provide information such as route information or traffic information, the intuitive operation can improve usability.

[0575] 26E and 26F , the digital signage 7300 or the digital signage 7400 is preferably capable of wirelessly linking with an information terminal 7311 or an information terminal 7411 such as a smartphone carried by a user. For example, advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Furthermore, by operating the information terminal 7311 or the information terminal 7411, the display on the display unit 7000 can be switched.

[0576] The digital signage 7300 or the digital signage 7400 can also be made to run a game using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller), thereby allowing an unspecified number of users to simultaneously participate in and enjoy the game.

[0577] The electronic device shown in Figures 27A to 27G has a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including the function of detecting, detecting, or measuring force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays), a microphone 9008, etc.

[0578] 27A to 27G, the display device of one embodiment of the present invention can be applied to the display portion 9001.

[0579] The electronic devices shown in Figures 27A to 27G have various functions. For example, they may have a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to control processing using various software (programs), a wireless communication function, a function to read and process programs or data recorded on a recording medium, etc. Note that the functions of the electronic devices are not limited to these, and they may have various other functions. The electronic devices may have multiple display units. Furthermore, the electronic devices may have a function to include a camera or the like to capture still images or videos and store them on a recording medium (external or built-in to the camera), a function to display the captured images on a display unit, etc.

[0580] The electronic devices shown in Figures 27A to 27G will be described in detail below.

[0581] FIG. 27A is a perspective view showing a mobile information terminal 9101. The mobile information terminal 9101 can be used as, for example, a smartphone. Note that the mobile information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like. The mobile information terminal 9101 can display text and image information on multiple surfaces. FIG. 27A shows an example in which three icons 9050 are displayed. Information 9051, indicated by a dashed rectangle, can also be displayed on another surface of the display unit 9001. Examples of the information 9051 include notifications of incoming emails, SNS messages, phone calls, etc., the title of the email or SNS message, the sender's name, the date and time, the remaining battery level, and radio wave intensity. Alternatively, an icon 9050 or the like may be displayed in the position where the information 9051 is displayed.

[0582] 27B is a perspective view showing the mobile information terminal 9102. The mobile information terminal 9102 has a function of displaying information on three or more surfaces of the display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different surfaces. For example, a user can check information 9053 displayed in a position that can be observed from above the mobile information terminal 9102 while the mobile information terminal 9102 is placed in a breast pocket of clothes. The user can check the display without taking the mobile information terminal 9102 out of the pocket and decide, for example, whether to answer a call.

[0583] 27C is a perspective view showing a tablet terminal 9103. The tablet terminal 9103 is capable of executing various applications such as mobile phone calls, e-mail, text browsing and creation, music playback, internet communication, and computer games, for example. The tablet terminal 9103 has a display unit 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front side of a housing 9000, operation keys 9005 as operation buttons on the side of the housing 9000, and a connection terminal 9006 on the bottom.

[0584] FIG. 27D is a perspective view showing a wristwatch-type mobile information terminal 9200. The mobile information terminal 9200 can be used as, for example, a smart watch (registered trademark). The display surface of the display unit 9001 is curved, and display can be performed along the curved display surface. The mobile information terminal 9200 can also perform hands-free calling by communicating with, for example, a wirelessly capable headset. The mobile information terminal 9200 can also perform data transmission and charging with another information terminal through a connection terminal 9006. Note that charging may be performed by wireless power supply.

[0585] 27E to 27G are perspective views showing a foldable mobile information terminal 9201. Also, FIG. 27E is a perspective view of the mobile information terminal 9201 in an unfolded state, FIG. 27G is a perspective view of the mobile information terminal 9201 in a folded state, and FIG. 27F is a perspective view of a state in the process of changing from one of FIGS. 27E and 27G to the other. The mobile information terminal 9201 has excellent portability in a folded state, and excellent display visibility due to a seamless, wide display area in an unfolded state. The display portion 9001 of the mobile information terminal 9201 is supported by three housings 9000 connected by hinges 9055. For example, the display portion 9001 can be bent with a curvature radius of 0.1 mm or more and 150 mm or less.

[0586] This embodiment mode can be combined with other embodiment modes as appropriate.

[0587] In this example, transistors according to one embodiment of the present invention (samples A to D) were fabricated, and their electrical characteristics were evaluated.

[0588] For the structures of Samples A to D, the description of the transistor 100C in FIG. 4C can be referred to. For the manufacturing methods of Samples A to D, the description in Embodiment 2 can be referred to. Note that the insulating layer 110 has the structure shown in FIG. 8A and the like. Specifically, the insulating layer 110 has a stacked-layer structure of an insulating layer 110d, an insulating layer 110a, an insulating layer 110b, and an insulating layer 110c.

[0589] <Sample Preparation> First, an In-Sn-Si oxide (ITSO) film having a thickness of about 100 nm was formed by sputtering on the substrate 102, and then processed to obtain the conductive layer 112a. The substrate 102 was a glass substrate.

[0590] Next, a first insulating film to be the insulating layer 110d, a second insulating film to be the insulating layer 110a, and a third insulating film to be the insulating layer 110b were formed in this order on the substrate 102 and the conductive layer 112a. The first to third insulating films were formed successively by the PECVD method.

[0591] The first insulating film was a silicon nitride film having a thickness of about 50 nm. The first insulating film was formed using silane (SiH ４ ) gas, nitrogen (N ) gas at a flow rate of 2000 sccm ２ ) gas, and ammonia (NH ３ The pressure during formation was 200 Pa, the power supply power was 2000 W, and the substrate temperature was 350°C.

[0592] The second insulating film was a silicon nitride film having a thickness of about 30 nm. The second insulating film was formed using silane (SiH ４ ) gas, nitrogen (N ) gas at a flow rate of 2000 sccm ２ ) gas, and ammonia (NH ３ The pressure during formation was 100 Pa, the power supply power was 2000 W, and the substrate temperature was 350°C.

[0593] As described above, the ammonia flow rate ratio of the deposition gas used to form the first insulating film that becomes the insulating layer 110d is set higher than the ammonia flow rate ratio of the deposition gas used to form the second insulating film that becomes the insulating layer 110a, thereby allowing the insulating layer 110d to have a higher hydrogen content than the insulating layer 110a.

[0594] The third insulating film was a silicon oxynitride film having a thickness of about 300 nm. The third insulating film was formed using silane (SiH ４ ) gas, and nitrous oxide (N) at a flow rate of 6000 sccm ２The pressure during formation was 200 Pa, the power supply was 1200 W, and the substrate temperature was 350°C.

[0595] Subsequently, an IGZO film having a thickness of approximately 20 nm was formed on the third insulating film as the metal oxide layer 149. The IGZO film was formed by a sputtering method using an IGZO sputtering target having an atomic ratio of metal elements of In:Ga:Zn=1:1:1. The oxygen flow rate during the formation was 100%, and the substrate temperature was room temperature.

[0596] Subsequently, a heat treatment was carried out in a dry air (CDA) atmosphere at 350° C. for 1 hour using an oven.

[0597] Subsequently, the metal oxide layer 149 was removed by wet etching.

[0598] A fourth insulating film, which will become the insulating layer 110c, was formed on the third insulating film. A silicon nitride film having a thickness of about 30 nm was used as the fourth insulating film. The fourth insulating film was formed using silane (SiH) at a flow rate of 200 sccm. ４ ) gas, nitrogen (N ) gas at a flow rate of 2000 sccm ２ ) gas, and ammonia (NH ３ The pressure during formation was 100 Pa, the power supply power was 2000 W, and the substrate temperature was 350°C.

[0599] Subsequently, an In-Sn-Si oxide (ITSO) film having a thickness of 100 nm was formed as a conductive film 112bf on the fourth insulating film by sputtering.

[0600] Subsequently, the conductive film 112bf was processed to obtain the conductive layer 112B.

[0601] Next, the conductive layer 112B was removed from a region overlapping with the conductive layer 112a to form a conductive layer 112b having an opening 143, and the first to fourth insulating films were removed from regions overlapping with the conductive layer 112a to form the insulating layer 110 having an opening 141. The conductive film 112bf was removed by wet etching. The first to fourth insulating films were removed by dry etching. The openings 141 and 143 had circular top surfaces.

[0602] Subsequently, a metal oxide film 108f was formed so as to cover the openings 141 and 143. The configuration of the metal oxide film 108f was varied between samples.

[0603] In Sample A, the metal oxide film 108f had a single-layer structure. An IGZO film with a thickness of approximately 20 nm was formed as the metal oxide film 108f. The IGZO film was formed by a sputtering method using an IGZO sputtering target with an atomic ratio of metal elements of In:Ga:Zn=1:1:1. The oxygen flow rate during the formation was 10%, and the substrate temperature was room temperature.

[0604] In Sample B, the metal oxide film 108f had a single-layer structure. An IGZO film with a thickness of approximately 20 nm was formed as the metal oxide film 108f. The IGZO film was formed by a sputtering method using an IGZO sputtering target with an atomic ratio of metal elements of In:Ga:Zn=1:3:2. The oxygen flow rate during the formation was 10%, and the substrate temperature was room temperature.

[0605] In Sample C, the metal oxide film 108f had a stacked structure of a metal oxide film 108af and a metal oxide film 108bf on the metal oxide film 108af. An IGZO film with a thickness of approximately 10 nm was formed as the metal oxide film 108af. The IGZO film was formed by sputtering using an IGZO sputtering target with an atomic ratio of metal elements of In:Ga:Zn = 1:3:2. The oxygen flow rate during formation was 10%, and the substrate temperature was room temperature. An IGZO film with a thickness of approximately 10 nm was formed as the metal oxide film 108bf. The IGZO film was formed by sputtering using an IGZO sputtering target with an atomic ratio of metal elements of In:Ga:Zn = 1:1:1. The oxygen flow rate during formation was 10%, and the substrate temperature was room temperature.

[0606] In Sample D, the metal oxide film 108f had a stacked structure of a metal oxide film 108af and a metal oxide film 108bf on the metal oxide film 108af. An IGZO film with a thickness of approximately 10 nm was formed as the metal oxide film 108af. The IGZO film was formed by sputtering using an IGZO sputtering target with an atomic ratio of metal elements of In:Ga:Zn = 1:1:1. The oxygen flow rate during formation was 10%, and the substrate temperature was room temperature. An IGZO film with a thickness of approximately 10 nm was formed as the metal oxide film 108bf. The IGZO film was formed by sputtering using an IGZO sputtering target with an atomic ratio of metal elements of In:Ga:Zn = 1:3:2. The oxygen flow rate during formation was 10%, and the substrate temperature was room temperature.

[0607] Subsequently, a heat treatment was carried out in a dry air (CDA) atmosphere at 350° C. for 2 hours using an oven.

[0608] Subsequently, the metal oxide film 108f was processed to obtain the semiconductor layer 108.

[0609] Subsequently, a silicon oxynitride film was formed as the insulating layer 106 to a thickness of 30 nm by plasma CVD.

[0610] Subsequently, a titanium film having a thickness of 50 nm, an aluminum film having a thickness of 200 nm, and a titanium film having a thickness of 50 nm were formed by sputtering, respectively. After that, each conductive film was processed to obtain a conductive layer 104.

[0611] This formed a transistor corresponding to the transistor 100C.

[0612] Subsequently, a silicon nitride oxide film having a thickness of 300 nm was formed as a protective layer for the transistor by plasma CVD.

[0613] Subsequently, a heat treatment was carried out in a dry air (CDA) atmosphere at 300° C. for 1 hour using an oven.

[0614] Subsequently, a polyimide film having a thickness of about 1.5 μm was formed as a planarizing layer.

[0615] Subsequently, a heat treatment was carried out in a dry air (CDA) atmosphere at 250° C. for 1 hour using an oven.

[0616] Through the above steps, samples A to D were obtained.

[0617] <Id-Vg Characteristics> Next, the Id-Vg characteristics of the transistors of Samples A to D fabricated as described above were measured.

[0618] The Id-Vg characteristics of the transistor were measured by applying a voltage to the gate electrode (hereinafter also referred to as gate voltage (Vg)) in increments of 0.05 V from −3 V to +3 V. The voltage applied to the source electrode (hereinafter also referred to as source voltage (Vs)) was set to 0 V (comm), and the voltage applied to the drain electrode (hereinafter also referred to as drain voltage (Vd)) was set to 0.1 V and 1.2 V.

[0619] Here, for each of Samples A to D, a transistor having a width D143 of the opening 143 of 2.0 μm (channel width of 6.3 μm) was measured. The number of measurements was 10 for each sample.

[0620] The Id-Vg characteristics of Sample A are shown in Figure 28A, the Id-Vg characteristics of Sample B are shown in Figure 28B, the Id-Vg characteristics of Sample C are shown in Figure 29A, and the Id-Vg characteristics of Sample D are shown in Figure 29B. In Figures 28A to 29B, the horizontal axis represents the gate potential (Vg), the left vertical axis represents the drain current (Id), and the right vertical axis represents the field-effect mobility (μFE) at a drain voltage (Vd) of 1.2 V. In Figures 28A to 29B, the Id-Vg characteristics of 10 transistors are shown overlapping each other.

[0621] 28A to 29B, it was confirmed that all of Samples A to D exhibited good switching characteristics. It was also confirmed that Samples A and D had larger on-state currents than Samples B and C.

[0622] The average values ​​of the shift voltages (Vsh) of the transistors were −0.11 V for Sample A, 0.26 V for Sample B, −0.09 V for Sample C, and −0.03 V for Sample D. Here, Vsh is defined as the Vg at which the tangent to the point where the slope of the Id-Vg curve of the transistor is maximum intersects with the line where Id = 1 pA. The 3σ of Vsh was 0.07 V for Sample A, 0.08 V for Sample B, 0.07 V for Sample C, and 0.08 V for Sample D. σ indicates standard deviation. It was confirmed that Samples B and D had higher shift voltages (Vsh) than Samples A and C.

[0623] The average cutoff current of the transistor is 4.56 × 10 for sample A. −１１ A, sample B, the lower limit of measurement (1.00 × 10 −１２ A) The following is sample C: 2.19 × 10 −１１ A, sample D: 3.54 × 10 −１２ It was confirmed that the cutoff current of samples B and D was smaller than that of samples A and C.

[0624] The average subthreshold swing values ​​(S values) of the transistors were 0.07 V for Sample A, 0.13 V for Sample B, 0.07 V for Sample C, and 0.07 V for Sample D. Here, the S value refers to the amount of change in gate voltage (Vg) in the subthreshold region that changes the drain current (Id) by one order of magnitude at a constant drain voltage (Vd).

[0625] The average threshold voltage (Vth) of the transistor was 0.35 V for Sample A, 1.37 V for Sample B, 1.24 V for Sample C, and 0.53 V for Sample D. The 3σ of Vth was 0.14 V for Sample A, 0.18 V for Sample B, 0.21 V for Sample C, and 0.15 V for Sample D.

[0626] From the above results, it was confirmed that a transistor having a short channel length and good electrical characteristics could be obtained. Furthermore, it was confirmed that the transistor of Sample D, in which the semiconductor layer 108 has a stacked structure, is normally off and has a large on-state current.

[0627] 11B: subpixel, 11G: subpixel, 11R: subpixel, 50A: display device, 50B: display device, 50C: display device, 50D: display device, 50E: display device, 50F: display device, 50G: display device, 100A: transistor, 100B: transistor, 100C: transistor, 100D: transistor, 100E: transistor, 100F: transistor, 100G: transistor, 100H: transistor, 100: transistor, 102: substrate, 103: conductive layer, 104: conductive layer, 106a: insulating layer, 106b: insulating layer, 106: insulating layer, 108a: semiconductor Conductor layer, 108af: metal oxide film, 108b: semiconductor layer, 108bf: metal oxide film, 108c: semiconductor layer, 108f: metal oxide film, 108: semiconductor layer, 110a: insulating layer, 110af: insulating film, 110b: insulating layer, 110bf: insulating film, 110c: insulating layer, 110cf: insulating film, 110d: insulating layer, 110f: insulating film, 110: insulating layer, 111B: pixel electrode, 111G: pixel electrode, 111R: pixel electrode, 111S: pixel electrode, 112a: conductive layer, 112a_1: conductive layer, 112a_2: conductive layer, 112a_2A: conductive layer, 112B: conductive layer, 112 b: conductive layer, 112b_1: conductive layer, 112b_2: conductive layer, 112bf: conductive film, 113B: EL layer, 113G: EL layer, 113R: EL layer, 113S: functional layer, 113: EL layer, 114: common layer, 115: common electrode, 117: light-shielding layer, 118B: sacrificial layer, 118G: sacrificial layer, 118R: sacrificial layer, 119B: sacrificial layer, 119G: sacrificial layer, 123: conductive layer, 124B: conductive layer, 124G: conductive layer, 124R: conductive layer, 125f: insulating film, 125: insulating layer, 126B: conductive layer, 126G: conductive layer, 126R: conductive layer, 127: insulating layer, 128: layer, 130B : light-emitting element, 130G: light-emitting element, 130R: light-emitting element, 130S: light-receiving element, 131: protective layer, 132B: colored layer, 132G: colored layer, 132R: colored layer, 133B: layer, 133Bf: film, 133G: layer, 133R: layer, 133: layer, 140: connecting portion, 141: opening, 142: adhesive layer, 143: opening, 145: opening, 148: opening, 149: metal oxide layer, 151: substrate, 152: substrate, 153: insulating layer, 162: display portion, 164: circuit portion, 165: wiring, 166: conductive layer, 172: FPC, 173: IC, 204: connecting portion, 205B: transistor,205D: transistor, 205G: transistor, 205R: transistor, 205S: transistor, 210: pixel, 218: insulating layer, 235: insulating layer, 237: insulating layer, 242: connection layer, 352: finger, 353: layer, 355: circuit layer, 357: layer, 700A: electronic device, 700B: electronic device, 721: housing, 723: wearing part, 727: earphone part, 750: earphone, 751: display panel, 753: optical member, 756: display area, 757: frame, 758: nose pad 6500: Electronic device, 800A: Electronic device, 800B: Electronic device, 820: Display unit, 821: Housing, 822: Communication unit, 823: Wearing unit, 824: Control unit, 825: Imaging unit, 827: Earphone unit, 832: Lens, 6500: Electronic device, 6501: Housing, 6502: Display unit, 6503: Power button, 6504: Button, 6505: Speaker, 6506: Microphone, 6507: Camera, 6508: Light source, 6510: Protective member, 6511: Display panel, 6512: Optical member, 6513: Touch sensor panel panel, 6515: FPC, 6516: IC, 6517: printed circuit board, 6518: battery, 7000: display unit, 7100: television device, 7101: housing, 7103: stand, 7111: remote control device, 7200: notebook computer, 7211: housing, 7212: keyboard, 7213: pointing device, 7214: external connection port, 7300: digital signage, 7301: housing, 7303: speaker, 7311: information terminal, 7400: digital Signage, 7401: Pillar, 7411: Information terminal, 9000: Housing, 9001: Display unit, 9002: Camera, 9003: Speaker, 9005: Operation keys, 9006: Connection terminal, 9007: Sensor, 9008: Microphone, 9050: Icon, 9051: Information, 9052: Information, 9053: Information, 9054: Information, 9055: Hinge, 9101: Portable information terminal, 9102: Portable information terminal, 9103: Tablet terminal, 9200: Portable information terminal, 9201: Portable information terminal,

Claims

1. A first conductive layer having the function of one of the source electrode and drain electrode of a transistor, A first insulating layer having a region located above the first conductive layer and a first opening overlapping the first conductive layer, A second conductive layer having a region in contact with the upper surface of the first insulating layer and a second opening that overlaps with the first opening, and having the function of the other of the source electrode and drain electrode of the transistor, A first semiconductor layer having a region in contact with the first conductive layer in the portion overlapping with the first opening and the second opening, a region in contact with the first insulating layer inside the first opening, and a region in contact with the second conductive layer inside the second opening, A second semiconductor layer having a region in contact with the first semiconductor layer and a region located inside the first opening, A third conductive layer having a region located inside the first opening and functioning as the gate electrode of the transistor, The present invention comprises a second insulating layer having a region disposed between the second semiconductor layer and the third conductive layer, A semiconductor device wherein the conductivity of the first semiconductor layer is different from that of the second semiconductor layer.

2. A first conductive layer having the function of one of the source electrode and drain electrode of a transistor, A first insulating layer having a region located above the first conductive layer and a first opening overlapping the first conductive layer, A second conductive layer having a region in contact with the upper surface of the first insulating layer and a second opening that overlaps with the first opening, and having the function of the other of the source electrode and drain electrode of the transistor, A first semiconductor layer having a region in contact with the first conductive layer in the portion overlapping with the first opening and the second opening, a region in contact with the first insulating layer inside the first opening, and a region in contact with the second conductive layer inside the second opening, A second semiconductor layer having a region in contact with the first semiconductor layer and a region located inside the first opening, A third conductive layer having a region located inside the first opening and functioning as the gate electrode of the transistor, The present invention comprises a second insulating layer having a region disposed between the second semiconductor layer and the third conductive layer, A semiconductor device wherein the conductivity of the first semiconductor layer is higher than that of the second semiconductor layer.

3. A first conductive layer having the function of one of the source electrode and drain electrode of a transistor, A first insulating layer having a region located above the first conductive layer and a first opening overlapping the first conductive layer, A second conductive layer having a region in contact with the upper surface of the first insulating layer and a second opening that overlaps with the first opening, and having the function of the other of the source electrode and drain electrode of the transistor, A first semiconductor layer having a region in contact with the first conductive layer in the portion overlapping with the first opening and the second opening, a region in contact with the first insulating layer inside the first opening, and a region in contact with the second conductive layer inside the second opening, A second semiconductor layer having a region in contact with the first semiconductor layer and a region located inside the first opening, A third conductive layer having a region located inside the first opening and functioning as the gate electrode of the transistor, The present invention comprises a second insulating layer having a region disposed between the second semiconductor layer and the third conductive layer, The first semiconductor layer has a first metal oxide, The second semiconductor layer has a second metal oxide, A semiconductor device wherein the band gap of the first metal oxide is smaller than the band gap of the second metal oxide.

4. A first conductive layer having the function of one of the source electrode and drain electrode of a transistor, A first insulating layer having a region located above the first conductive layer and a first opening overlapping the first conductive layer, A second conductive layer having a region in contact with the upper surface of the first insulating layer and a second opening that overlaps with the first opening, and having the function of the other of the source electrode and drain electrode of the transistor, A first semiconductor layer having a region in contact with the first conductive layer in the portion overlapping with the first opening and the second opening, a region in contact with the first insulating layer inside the first opening, and a region in contact with the second conductive layer inside the second opening, A second semiconductor layer having a region in contact with the first semiconductor layer and a region located inside the first opening, A third conductive layer having a region located inside the first opening and functioning as the gate electrode of the transistor, The present invention comprises a second insulating layer having a region disposed between the second semiconductor layer and the third conductive layer, The first semiconductor layer has a first metal oxide, The second semiconductor layer has a second metal oxide, The first metal oxide includes indium, The second metal oxide comprises indium and element M. The element M is one or more of gallium, aluminum, and tin. A semiconductor device wherein the content of element M in the first metal oxide is lower than the content of element M in the second metal oxide.

5. A first conductive layer having the function of one of the source electrode and drain electrode of a transistor, A first insulating layer having a region located above the first conductive layer and a first opening overlapping the first conductive layer, A second conductive layer having a region in contact with the upper surface of the first insulating layer and a second opening that overlaps with the first opening, and having the function of the other of the source electrode and drain electrode of the transistor, A first semiconductor layer having a region in contact with the first conductive layer in the portion overlapping with the first opening and the second opening, a region in contact with the first insulating layer inside the first opening, and a region in contact with the second conductive layer inside the second opening, A second semiconductor layer having a region in contact with the first semiconductor layer and a region located inside the first opening, A third conductive layer having a region located inside the first opening and functioning as the gate electrode of the transistor, The present invention comprises a second insulating layer having a region disposed between the second semiconductor layer and the third conductive layer, The first semiconductor layer and the second semiconductor layer each have a metal oxide, A semiconductor device wherein the crystallinity of the first semiconductor layer is lower than that of the second semiconductor layer.

6. In any one of claims 1 to 5, A semiconductor device wherein the first conductive layer and the second conductive layer each contain an oxide conductor.