Imaging device and method for manufacturing same
Patent Information
- Application Number
- JP2024522970
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2024-10-24
- Publication Date
- 2025-02-03
AI Technical Summary
In manufacturing imaging devices, the formation of photoelectric conversion films over support substrates often results in excessive etching residue and weak bonding forces, leading to reduced reliability due to the wide removal of film areas and van der Waals forces.
The method involves forming photoelectric conversion films with a controlled overlapping area on the support substrate, using techniques like shadow masks and etching to minimize area reduction and residue generation, while ensuring the bonding force is strengthened by reducing film-forming stress.
This approach enhances the reliability of imaging devices by reducing etching residue and improving bonding forces between the photoelectric conversion film and the substrate, leading to more stable and efficient imaging performance.
Abstract
Description
Imaging device and manufacturing method thereof
[0001] The present disclosure relates to an imaging device and a manufacturing method thereof.
[0002] An example of an imaging device is described in Patent Document 1. Patent Document 1 describes that a photoelectric conversion film is formed by a coating method and then dry-etched.
[0003] Japanese Patent Application Laid-Open No. 2006-32714
[0004] The present disclosure realizes an imaging device with high reliability.
[0005] The present disclosure provides a method for manufacturing an imaging device, including: forming a photoelectric conversion film so that a ratio of an overlapping area of the photoelectric conversion film and the support substrate in a planar view to an area of the support substrate in a planar view is greater than 0% and less than 100%; and reducing the area of the photoelectric conversion film in a planar view by a first etching.
[0006] The technology according to the present disclosure is suitable for realizing an imaging device with high reliability.
[0007] FIG. 1 is a plan view of an imaging device according to the first embodiment. FIG. 2 is a cross-sectional view of the imaging device according to the first embodiment. FIG. 3 is a cross-sectional view of the imaging device according to the first embodiment. FIG. 4A is an enlarged cross-sectional view of the imaging device according to the first embodiment. FIG. 4B is an enlarged cross-sectional view of the imaging device according to the first embodiment. FIG. 4C is an enlarged cross-sectional view of the imaging device according to the first embodiment. FIG. 4D is an enlarged cross-sectional view of a support substrate according to the first embodiment. FIG. 4E is an enlarged plan view of the imaging device according to the first embodiment. FIG. 5 is an explanatory diagram of an imaging mechanism. FIG. 6A is an explanatory diagram of steps of a manufacturing method according to the first embodiment. FIG. 6B is an explanatory diagram of steps of the manufacturing method according to the first embodiment. FIG. 6C is an explanatory diagram of steps of the manufacturing method according to the first embodiment. FIG. 6D is an explanatory diagram of steps of the manufacturing method according to the first embodiment. FIG. 6E is an explanatory diagram of steps of the manufacturing method according to the first embodiment. FIG. 6F is an explanatory diagram of steps of the manufacturing method according to the first embodiment. FIG. 6G is an explanatory diagram of steps of the manufacturing method according to the first embodiment. FIG. 6H is an explanatory diagram of steps of the manufacturing method according to the first embodiment. FIG. 6I is an explanatory diagram of steps of the manufacturing method according to the first embodiment. FIG. 6J is a diagram illustrating steps of the manufacturing method according to the first embodiment. FIG. 6K is a diagram illustrating steps of the manufacturing method according to the first embodiment. FIG. 6L is a diagram illustrating steps of the manufacturing method according to the first embodiment. FIG. 6M is a diagram illustrating steps of the manufacturing method according to the first embodiment. FIG. 6N is a diagram illustrating steps of the manufacturing method according to the first embodiment. FIG. 6O is a diagram illustrating steps of the manufacturing method according to the first embodiment. FIG. 7 is a flowchart for explaining the manufacturing method according to the first embodiment. FIG. 8 is a schematic diagram of a camera system according to the second embodiment. FIG. 9A is a diagram illustrating steps of the manufacturing method according to the third embodiment. FIG. 9B is a diagram illustrating steps of the manufacturing method according to the third embodiment. FIG. 9C is a diagram illustrating steps of the manufacturing method according to the third embodiment. FIG. 9D is a diagram illustrating steps of the manufacturing method according to the third embodiment. FIG. 9E is a diagram illustrating steps of the manufacturing method according to the third embodiment. FIG. 9F is a diagram illustrating steps of the manufacturing method according to the third embodiment. FIG. 9G is a diagram illustrating steps of the manufacturing method according to the third embodiment. FIG. 9H is a diagram illustrating steps of the manufacturing method according to the third embodiment. FIG. 10 is a flowchart illustrating the manufacturing method according to the third embodiment.
[0008] (Findings of the Inventors) In the manufacture of an imaging device, a photoelectric conversion film is formed over the entire area that overlaps with the support substrate in a planar view, and then etched. In this case, a large portion of the photoelectric conversion film may be removed by etching, resulting in a large amount of etching residue. This may reduce the reliability of the manufactured imaging device. Furthermore, it is desirable that the bonding force between the photoelectric conversion film and the support substrate is a weak force, such as van der Waals forces, and that the film formation stress applied to the substrate be reduced. Therefore, the inventors have investigated technologies suitable for realizing an imaging device with high reliability.
[0009] (Summary of one aspect of the present disclosure) A manufacturing method for an imaging device according to a first aspect of the present disclosure includes: forming a photoelectric conversion film so that the ratio of the overlapping area of the photoelectric conversion film and the support substrate in a planar view to the area of the support substrate in a planar view is greater than 0% and less than 100%; and reducing the area of the photoelectric conversion film in a planar view by a first etching.
[0010] According to the first aspect, it is possible to suppress the reduction in the area of the photoelectric conversion film due to the first etching, and to suppress the generation of etching residue. In addition, it is possible to reduce the film formation stress applied to the substrate. Therefore, the technology according to the first aspect is suitable for realizing an imaging device with high reliability.
[0011] In a second aspect of the present disclosure, for example, in the manufacturing method according to the first aspect, a shadow mask may be used in forming the photoelectric conversion film.
[0012] According to the second aspect, the overlapping area can be easily controlled.
[0013] In a third aspect of the present disclosure, for example, in the manufacturing method according to the first or second aspect, the ratio of the area reduced by the first etching to the area of the support substrate in a planar view may be greater than 0% and not more than 20%.
[0014] According to the third aspect, the generation of etching residues can be suppressed.
[0015] In a fourth aspect of the present disclosure, for example, in the manufacturing method according to any one of the first to third aspects, the support substrate may include a semiconductor substrate, a diffusion region provided in the semiconductor substrate, and a pixel electrode electrically connected to the diffusion region, and the first etching may be performed so as to leave a portion of the photoelectric conversion film that overlaps with the pixel electrode in a planar view.
[0016] According to the fourth aspect, it is possible to manufacture an imaging device in which the pixel electrode and the photoelectric conversion film overlap in a plan view.
[0017] In a fifth aspect of the present disclosure, for example, in the manufacturing method according to the fourth aspect, the support substrate may further include a connection electrode electrically isolated from the pixel electrode, and the first etching may be performed so as to remove a portion of the photoelectric conversion film that overlaps with the connection electrode in a planar view.
[0018] According to the fifth aspect, it is possible to manufacture an imaging device in which the connection electrodes and the photoelectric conversion film do not overlap in a plan view.
[0019] In a sixth aspect of the present disclosure, for example, in the manufacturing method according to any one of the first to fifth aspects, an insulating film mask may be used in the first etching.
[0020] The insulating film mask is difficult to etch, and therefore, according to the sixth aspect, the generation of etching residues can be suppressed.
[0021] In a seventh aspect of the present disclosure, for example, in the manufacturing method according to any one of the first to sixth aspects, the photoelectric conversion film may be formed above the support substrate so that the photoelectric conversion film does not overlap a predetermined region of the support substrate in a planar view, and the manufacturing method may further include: forming a specific insulating film such that the specific insulating film includes a first insulating portion and a second insulating portion, the first insulating portion is located above the predetermined region, the first insulating portion overlaps the predetermined region in a planar view, the second insulating portion is located above the photoelectric conversion film, and the second insulating portion overlaps the photoelectric conversion film in a planar view; and removing a portion of the specific insulating film located between the first insulating portion and the second insulating portion by a second etching to form a first insulating film corresponding to the first insulating portion and a second insulating film corresponding to the second insulating portion.
[0022] According to the seventh aspect, in a region overlapping with a predetermined region in a plan view, a first insulating film that does not overlap with the photoelectric conversion film in a plan view can be formed without an operation of moving back the photoelectric conversion film. Also, a second insulating film that overlaps with the photoelectric conversion film in a plan view can be formed. Moreover, the first insulating film and the second insulating film can be formed together by forming the specific insulating film and performing the second etching.
[0023] In an eighth aspect of the present disclosure, for example, in the manufacturing method according to any one of the first to seventh aspects, the photoelectric conversion film is formed above the support substrate, and the manufacturing method may further include: forming a counter electrode such that a ratio of an overlapping area of the counter electrode and the support substrate in a planar view to an area of the support substrate in a planar view is greater than 0% and less than 100%, the counter electrode is positioned above the photoelectric conversion film, and the counter electrode overlaps with the photoelectric conversion film in a planar view; and reducing the area of the counter electrode in a planar view by third etching.
[0024] According to the eighth aspect, the reduction in the area of the counter electrode due to the third etching can be suppressed, and the generation of etching residues can be suppressed.
[0025] In a ninth aspect of the present disclosure, for example, the manufacturing method according to any one of the first to eighth aspects may further include performing a third etching after a structure is formed in which the photoelectric conversion film is located above the support substrate, the counter electrode is located above the photoelectric conversion film, the counter electrode overlaps with the photoelectric conversion film in a planar view, a first insulating film is located above the support substrate, the first insulating film is separated from both the photoelectric conversion film and the counter electrode in a planar view, a second insulating film is located above the counter electrode, and the second insulating film overlaps with the counter electrode in a planar view, and the third etching may include: etching that reduces an area of the counter electrode in a planar view using the second insulating film as a mask; and etching that forms a first recess in the support substrate using the first insulating film and the photoelectric conversion film as masks.
[0026] According to the ninth aspect, the first recess can be formed while reducing the area of the counter electrode in a plan view.
[0027] In a tenth aspect of the present disclosure, for example, in the manufacturing method according to any one of the first to ninth aspects, the support substrate may include a connection electrode, and the manufacturing method may further include, after a structure is formed in which the photoelectric conversion film is located above the connection electrode, the photoelectric conversion film overlaps with the connection electrode in a planar view, and a counter electrode is located above the photoelectric conversion film and the counter electrode overlaps with the photoelectric conversion film in a planar view, removing a portion of the counter electrode that overlaps with the connection electrode in a planar view by a third etching having a higher selectivity for the counter electrode than a selectivity for the photoelectric conversion film, and after the third etching, the first etching may be performed so as to remove the portion of the photoelectric conversion film that overlaps with the connection electrode in a planar view.
[0028] According to the tenth aspect, the photoelectric conversion film can protect the connection electrodes from the third etching.
[0029] In an eleventh aspect of the present disclosure, for example, in the manufacturing method according to any one of the first to tenth aspects, the photoelectric conversion film may be formed above the support substrate so that the photoelectric conversion film does not overlap a predetermined region of the support substrate in a planar view, and the manufacturing method may further include: forming a specific film body such that the specific film body includes a first film portion and a second film portion, the first film portion is located above the predetermined region, the first film portion overlaps with the predetermined region in a planar view, the second film portion is located above the photoelectric conversion film, and the second film portion overlaps with the photoelectric conversion film in a planar view; and removing an intermediate portion of the specific film body located between the first film portion and the second film portion by a fourth etching to form a first film body corresponding to the first film portion and a second film body corresponding to the second film portion.
[0030] According to the eleventh aspect, in a region overlapping with a predetermined region in a plan view, a first film body that does not overlap with the photoelectric conversion film in a plan view can be formed without the operation of retracting the photoelectric conversion film. Also, a second film body that overlaps with the photoelectric conversion film in a plan view can be formed. Moreover, the first film body and the second film body can be formed together by forming the specific film body and performing the fourth etching.
[0031] In a twelfth aspect of the present disclosure, for example, in the manufacturing method according to the eleventh aspect, a second recess may be formed in a portion of the support substrate that overlaps with the intermediate portion in a planar view by the fourth etching.
[0032] According to the twelfth aspect, the second recess can be formed while the first film and the second film are being formed.
[0033] An imaging device according to a thirteenth aspect of the present disclosure comprises a support substrate having a first recess provided therein, a first insulating film positioned above the support substrate, and a photoelectric conversion film positioned above the support substrate, wherein a first continuous surface including a first partition surface defining the first recess and a side surface of the first insulating film is provided at a position spaced apart from the photoelectric conversion film in a planar view.
[0034] The first recess can prevent the movement of moisture along the upper surface of the support substrate, and therefore the technology according to the thirteenth aspect is suitable for realizing an imaging device with high reliability.
[0035] In a fourteenth aspect of the present disclosure, for example, the imaging device according to the thirteenth aspect may further include at least one membrane, and the at least one membrane may include a portion located within the first recess.
[0036] In the fourteenth aspect, the film has a portion located within the first recess. This can improve the adhesion between the support substrate and the film. The improved adhesion can suppress the intrusion of moisture from the outside, resulting in a highly reliable imaging device.
[0037] In a fifteenth aspect of the present disclosure, for example, in the imaging device according to the fourteenth aspect, the at least one film may include at least one selected from the group consisting of a light-shielding film and a second insulating film.
[0038] In a sixteenth aspect of the present disclosure, for example, the imaging device according to any one of the thirteenth to fifteenth aspects may further include a first film, wherein the first recess may include a second recess, wherein the first film may include an internal portion located within the first recess, and wherein a second continuous surface may be provided that includes a second partition surface that defines the second recess and a side surface of the internal portion.
[0039] In a seventeenth aspect of the present disclosure, for example, the imaging device according to the sixteenth aspect may further include a second film, and the second film may be in contact with the second continuous surface.
[0040] In an 18th aspect of the present disclosure, for example, in an imaging device relating to any one of the 13th to 17th aspects, the support substrate may include an array of pixel electrodes, and in a planar view, the length of the first recess in a direction along the first continuous surface may be longer than the length of the array in a direction along the first continuous surface.
[0041] The structures of the fifteenth to eighteenth aspects are examples of structures that the imaging device has.
[0042] In a nineteenth aspect of the present disclosure, for example, in the imaging device according to any one of the thirteenth to eighteenth aspects, the first recess may provide a step in the support substrate.
[0043] The step can hinder the movement of moisture along the upper surface of the support substrate. Therefore, the technology according to the nineteenth aspect is suitable for realizing an imaging device with high reliability.
[0044] The numerical values, shapes, materials, components, arrangement and connection of components, steps, order of steps, etc. shown in the embodiments of this specification are examples and are not intended to limit the present disclosure. The various aspects described in this specification can be combined with each other unless a contradiction occurs. Also, in the figures, illustration of some elements may be omitted. In the figures, dimensions may be exaggerated. In the following description, components having substantially the same functions are designated by common reference symbols, and duplicate descriptions may be omitted or simplified.
[0045] In one aspect of the present disclosure, an imaging device has, in an upper layer, a photoelectric conversion film that performs photoelectric conversion to convert incident light into an electrical signal, and in a lower layer, a signal processing circuit including a silicon-based CMOS circuit that outputs the electrical signal obtained by the photoelectric conversion film to the outside. In this way, since the photoelectric conversion film and the signal processing circuit are stacked, they can be designed independently.
[0046] In this specification, terms such as "upper," "lower," "outer," "row," and "column" are used solely to designate the relative arrangement of components, and are not intended to limit the orientation of the imaging device during use or the orientation of the components of the imaging device or manufacturing equipment during manufacture. The same applies to the X, Y, and Z directions. In the drawings, the X and Y directions can correspond to lateral directions. The Z direction can correspond to the up-down direction.
[0047] In this specification, the term "major component" refers to the component that is contained in the largest amount by mass. In one example, the major component is a component that accounts for more than 50% by mass. In one specific example, the major component is a component that accounts for more than 80% by mass.
[0048] In this specification, the term "plan view" refers to a view from the thickness direction of the support substrate.
[0049] In this specification, "element A includes element B" means that element A includes at least a part of element B. "Element A and element B overlap in a planar view" means that at least a part of element A and at least a part of element B overlap in a planar view.
[0050] In this specification, ordinal numbers such as first, second, third, etc. may be used. When an element is assigned an ordinal number, it is not necessary that there is an element of the same type with a lower number. The number of the ordinal number can be changed as needed. The ordinal numbers are not intended to limit the element to which they are assigned. The same applies to the terms "specific" and "predetermined."
[0051] (First embodiment) 1. Example of overall configuration of imaging device 1 Fig. 1 is a plan view of an imaging device 1 according to a first embodiment. The imaging device 1 includes a plurality of pixels 100 arranged in a matrix in the X and Y directions. Each pixel 100 includes a readout circuit. In the imaging device 1, a pixel region 10A including the plurality of pixels 100 is configured.
[0052] The imaging device 1 is provided with a pixel region 10A, a counter electrode region 10B, a peripheral circuit region 10C, and a pad region 10D, in this order. In the counter electrode region 10B, a voltage is applied to the counter electrode. The peripheral circuit is provided in the peripheral circuit region 10C. The peripheral circuit includes a vertical driver 12, a timing generator 13, a signal processing circuit 14, a horizontal driver 15, an LVDS (Low Voltage Differential Signaling) device 16, a serial conversion unit 17, and a counter electrode voltage supply unit 18. The pad region 10D is provided with a plurality of pads 19.
[0053] The vertical driver 12 executes control to read out signals from each readout circuit. The timing generator 13 generates and supplies timing for driving the imaging device 1. The timing generator 13 also performs readout control such as thinning readout and partial readout.
[0054] Each column circuit in the signal processing circuit 14 performs correlated double sampling (CDS) processing and analog-to-digital (AD) conversion, in that order, on the signal output from the column of the corresponding readout circuit. The resulting digital signal is stored in a memory provided for each column circuit.
[0055] The horizontal driver 15 sequentially reads out signals related to one row of pixels 100 stored in the memory of the signal processing circuit 14 and controls output of the signals to the LVDS device 16. The LVDS device 16 transmits digital signals. The serial conversion unit 17 converts the input parallel digital signals into serial signals and outputs the serial signals.
[0056] In the first modification, the signal processing circuit 14 performs correlated double sampling processing but does not perform analog-to-digital conversion. An AD conversion circuit is provided instead of the LVDS device 16, and the serial conversion unit 17 is omitted.
[0057] In the second modification, the signal processing circuit 14 performs correlated double sampling processing but does not perform analog-to-digital conversion. The LVDS device 16 and the serial conversion unit 17 are omitted, and an AD conversion circuit is provided outside the chip on which the imaging device 1 is provided.
[0058] In the third modified example, a signal processing circuit 14, an LVDS device 16, and a serial conversion unit 17 are arranged in each of the regions on both sides adjacent to the pixel region 10A. A plurality of columns of readout circuits in the pixel region 10A are processed by two signal processing circuits 14. For example, half of these columns of readout circuits (e.g., odd-numbered columns) are processed by the signal processing circuit 14 in one region adjacent to the pixel region 10A. The remaining half of these columns of readout circuits (e.g., even-numbered columns) are processed by the signal processing circuit 14 in the other region adjacent to the pixel region 10A.
[0059] 2 and 3 are cross-sectional views of the imaging device 1 according to the first embodiment. The imaging device 1 includes a support substrate 190. The support substrate 190 includes a semiconductor substrate 101, a readout circuit 115, an insulating structure 102, pixel plugs 105, connection plugs 106, pixel electrodes 104, connection electrodes 103, pads 19, and the like.
[0060] 2, an insulating structure 102 is provided above a semiconductor substrate 101. The insulating structure 102 includes insulating layers 102a to 102f. The semiconductor substrate 101 includes, for example, silicon (Si). The insulating structure 102 and the insulating layers 102a to 102f include, for example, silicon oxide (SiO).
[0061] In the pixel region 10A, each pixel 100 includes a readout circuit 115. The readout circuit 115 is provided on the semiconductor substrate 101. The readout circuit 115 includes a diffusion region 115d provided on the semiconductor substrate 101. The diffusion region 115d functions as a charge storage section.
[0062] In the pixel region 10A, a plurality of pixel electrodes 104 are arranged in a matrix in the XY direction at regular intervals on the upper surface of the insulating structure 102. An insulating layer 102f is inserted in the gaps between adjacent pixel electrodes 104. The arrangement of the pixel electrodes 104 corresponds to the arrangement of the pixel 100 in Figure 1. The pixel electrodes 104 have a uniform film thickness and a flat upper surface.
[0063] Each pixel electrode 104 is electrically connected to a corresponding readout circuit 115 by a pixel plug 105. Specifically, the pixel plug 105 penetrates the insulating layers 102a to 102e and cooperates with the multilayer wiring to electrically connect the pixel electrode 104 and the readout circuit 115. In Fig. 2, reference numeral 116 denotes the uppermost layer wiring of the multilayer wiring.
[0064] In this example, the readout circuit 115 includes a metal oxide semiconductor field effect transistor (MOSFET) or a thin film transistor (TFT). The readout circuit 115 is shielded from light by a light-shielding layer (not shown) provided inside the insulating structure 102 or the like.
[0065] The pixel electrode 104 may contain at least one selected from a metal and a metal compound. Examples of metals include titanium (Ti), tantalum (Ta), aluminum (Al), tungsten (W), and copper (Cu). Examples of metal compounds include metal nitrides. Examples of metal nitrides include titanium nitride (TiN) and tantalum nitride (TaN). The pixel electrode 104 may contain polysilicon doped with impurities to provide conductivity. In this embodiment, the pixel electrode 104 has a stacked structure including a layer containing titanium and a layer containing titanium nitride. The layer containing titanium is in contact with the photoelectric conversion film 107, and the layer containing titanium nitride is in contact with the pixel plug 105.
[0066] The pixel plug 105 may contain a metal, such as copper (Cu), tungsten (W), etc. In this embodiment, the pixel plug 105 contains copper.
[0067] A photoelectric conversion film 107 is provided above the pixel electrode 104 and the insulating layer 102f. Above the photoelectric conversion film 107, a counter electrode 108, an insulating film 114, an insulating film 109, and an insulating film 110 are stacked in this order from bottom to top. Although not shown, in the pixel region 10A, a color filter is provided above the insulating film 110. Furthermore, a microlens is provided above the color filter.
[0068] The photoelectric conversion film 107 includes a photoelectric conversion layer that generates hole-electron pairs. The photoelectric conversion film 107 may include an electron transport layer that transports electrons, or may include a hole transport layer that transports holes. The photoelectric conversion film 107 may include an electron blocking layer that blocks electrons, or may include a hole blocking layer that blocks holes.
[0069] The photoelectric conversion film 107 includes, for example, an organic material. In this embodiment, the photoelectric conversion film 107 includes an organic material as a main component. The organic material may be an organic semiconductor material. The photoelectric conversion film 107 may include one or more organic semiconductor layers. Known organic p-type semiconductor materials and organic n-type semiconductor materials may be used as the organic semiconductor material. The photoelectric conversion film 107 may be a mixed film of organic donor molecules and acceptor molecules, a mixed film of semiconducting carbon nanotubes and acceptor molecules, or a quantum dot-containing film. The photoelectric conversion film 107 may include an inorganic material such as amorphous silicon. The photoelectric conversion film 107 may be a metal oxide film. The metal oxide film is, for example, a copper oxide (CuO) film.
[0070] The counter electrode 108 faces the pixel electrode 104. The counter electrode 108 includes a conductive material having light-transmitting properties. Examples of the conductive material included in the counter electrode 108 include indium tin oxide (ITO) and indium zinc oxide (IZO). In this embodiment, the counter electrode 108 includes ITO as a main component.
[0071] The insulating film 114 contains, for example, aluminum oxide (AlO). The insulating films 109 and 110 contain, for example, silicon oxynitride (SiON). In this embodiment, the insulating film 114 contains aluminum oxide as a main component. The insulating films 109 and 110 contain silicon oxynitride as a main component.
[0072] 3, a counter electrode region 10B is provided outside the pixel region 10A. A connection electrode 103 is provided in the counter electrode region 10B. The connection electrode 103 is electrically connected to a counter electrode voltage supply unit 18 via a connection plug 106.
[0073] The connection electrode 103 may contain at least one selected from a metal and a metal compound. Examples of metals include titanium (Ti), tantalum (Ta), aluminum (Al), tungsten (W), and copper (Cu). Examples of metal compounds include metal nitrides. Examples of metal nitrides include titanium nitride (TiN) and tantalum nitride (TaN). The connection electrode 103 may contain polysilicon doped with impurities to provide conductivity. In this embodiment, the connection electrode 103 has a stacked structure including a layer containing titanium and a layer containing titanium nitride. The layer containing titanium is in contact with the light-shielding film 121, and the layer containing titanium nitride is in contact with the connection plug 106.
[0074] The connection plug 106 may include a metal, such as copper (Cu), tungsten (W), etc. In this embodiment, the connection plug 106 includes copper.
[0075] A light-shielding film 121 is provided on the insulating film 110 at a peripheral position of the effective pixel region in a planar view. In this embodiment, the light-shielding film 121 overlaps with at least one pixel electrode 104 in a planar view. Pixels 100 having pixel electrodes 104 overlapping with the light-shielding film 121 can be used as optical black (OB) pixels. In FIG. 4E described below, pixels 100 having pixel electrodes 104 in the leftmost and rightmost columns can correspond to OB pixels. Specifically, pixels 100 in the effective pixel region do not overlap with the light-shielding film 121 in a planar view. On the other hand, OB pixels at peripheral positions of the effective pixel region overlap with the light-shielding film 121 in a planar view and are therefore shielded from light by the light-shielding film 121. Signals generated by pixels 100 in the effective pixel region are corrected by signals generated by the OB pixels, thereby generating signals with reduced noise. The light-shielding film 121 electrically connects the counter electrode 108 and the connection electrode 103. In this embodiment, the light-shielding film 121 overlaps with the counter electrode 108 and the connection electrode 103 in a plan view.
[0076] The light-shielding film 121 may include, for example, at least one selected from the group consisting of metals and metal compounds. In one specific example, the light-shielding film 121 includes at least one selected from the group consisting of titanium (Ti), titanium nitride (TiN), aluminum (Al), silicon (Si), copper-doped aluminum (AlCu), copper (Cu), tungsten (W), gold (Au), silver (Ag), nickel (Ni), and cobalt (Co). The light-shielding film 121 may include an alloy containing at least two of the materials listed in the above specific example. The light-shielding film 121 may have a single-layer structure or a multilayer structure. In this embodiment, the light-shielding film 121 has a multilayer structure including a layer containing titanium and a layer containing a titanium compound. Specifically, the layer containing titanium is the lower layer, and the layer containing a titanium compound is the upper layer.
[0077] In this embodiment, there is no particular limitation on the number of connection electrodes 103, connection plugs 106, counter electrode voltage supply units 18, etc. connected to one counter electrode 108. These numbers can be increased or decreased as appropriate, taking into account the chip area, wiring width, etc.
[0078] 3, a peripheral circuit region 10C is provided outside the counter electrode region 10B. Peripheral circuits are provided in the peripheral circuit region 10C. The metal layer in the peripheral circuit region 10C contains, for example, copper (Cu).
[0079] In the peripheral circuit region 10C, an insulating film 124, an insulating film 125, and a light-shielding film 126 are provided in this order from bottom to top. The insulating film 124 can be made of a material that can be used as the material of the insulating film 114. The insulating film 125 can be made of a material that can be used as the material of the insulating film 109. The light-shielding film 126 can be made of a material that can be used as the material of the light-shielding film 121. The insulating films 114, 109, 124, and 125 can be referred to as protective films.
[0080] The insulating film 110 extends not only in the pixel region 10 A but also in the counter electrode region 10 B and the peripheral circuit region 10 C. The insulating film 110 covers the insulating film 109, the light-shielding film 121, the insulating film 125, and the light-shielding film 126 from above.
[0081] 3, a pad region 10D is provided outside the peripheral circuit region 10C. A recess 165 is provided in the pad region 10D. A pad 19 is provided on the bottom surface of the recess 165. Although not shown in detail, the pad 19 is electrically connected to various circuits such as a signal input / output circuit and a voltage supply circuit.
[0082] The configuration of the imaging device 1 will be further described with reference to FIGS. 1 to 3 as well as FIGS. 4A to 4E. FIGS. 4A to 4C are enlarged cross-sectional views of the imaging device 1 according to the first embodiment. FIG. 4D is an enlarged cross-sectional view of the support substrate 190 according to the first embodiment. FIG. 4E is an enlarged plan view of the imaging device 1 according to the first embodiment. In FIG. 4A, the light-shielding film 121, the light-shielding film 126, and the insulating film 110 are indicated by dotted lines. In FIG. 4B, the insulating film 110 is indicated by a dotted line. In FIG. 4E, the insulating film 110 is not shown. In the examples of FIGS. 3 and 4E, the side surface 107s of the photoelectric conversion film 107 and the side surface 108s of the counter electrode 108 are continuous in a plan view.
[0083] 1 to 3 , the imaging device 1 includes a support substrate 190, an insulating film 124, an insulating film 125, and a photoelectric conversion film 107. The support substrate 190 includes an array 104a of pixel electrodes 104. The insulating films 124, 125, and photoelectric conversion film 107 are located above the support substrate 190. The support substrate 190 supports the photoelectric conversion film 107.
[0084] The support substrate 190 has a recess 161. As can be seen from Figures 3, 4A, and 4E, a continuous surface 171 including, in this order, a partition surface 161s that defines the recess 161, a side surface 124s of the insulating film 124, and a side surface 125s of the insulating film 125 is provided at a position spaced apart from the photoelectric conversion film 107 in a plan view. The recess 161 can hinder the movement of moisture along the upper surface 191 of the support substrate 190. For this reason, this configuration is suitable for realizing an imaging device 1 with high reliability.
[0085] The imaging device 1 includes at least one film. The film includes a portion located within the recess 161 and a portion located outside the recess 161 and above the support substrate 190. Having a portion of the film located within the recess 161 can improve adhesion between the support substrate 190 and the film. Improved adhesion can suppress the intrusion of moisture from the outside, resulting in an imaging device 1 with high reliability. Specifically, the film is in contact with the recess 161. The portion located outside the recess 161 can be a portion located above the photoelectric conversion film 107 and overlapping with the photoelectric conversion film 107 in a planar view. In the examples of FIGS. 4B , 4C , and 4E , the at least one film includes at least one selected from the group consisting of a light-shielding film 121 and an insulating film 110.
[0086] The imaging device 1 includes a first film, a second film, and a third film. As shown in FIGS. 4A to 4E , the recess 161 includes a recess 162. As shown in FIGS. 4B and 4C , the first film includes an internal portion 121p located within the recess 161. The third film includes a second internal portion 126p located within the recess 161. A continuous surface 172 is provided, including a partition surface 162s that defines the recess 162 and a side surface 121ps of the internal portion 121p. A continuous surface 173 is provided, including a partition surface 163s that defines the recess 162 and a side surface 126ps of the second internal portion 126p. The second film is in contact with the continuous surface 172 and the continuous surface 173. In the illustrated example, the first film is a light-shielding film 121. The second film is an insulating film 110. The third film is a light-shielding film 126.
[0087] As shown in Figures 4D and 4E, in a plan view, the width W1 of the recess 161 is, for example, 100 nm or more. The width W1 is, for example, 10,000 nm or less. In a plan view, the width W2 of the recess 162 is smaller than the width W1. The width W2 is, for example, 50 nm or more. The width W2 is, for example, 10,000 nm or less. In the examples of Figures 4D and 4E, the width W1 is the dimension of the recess 161 in the unilateral direction in a plan view. The width W2 is the dimension of the recess 162 in the unilateral direction in a plan view.
[0088] 4D , the depth D1 of the recess 161 is, for example, 10 nm or more and 600 nm or less. The depth D1 may be 20 nm or more and 500 nm or less. The depth D2 of the recess 162 is smaller than the depth D1. The depth D2 is, for example, 5 nm or more and 400 nm or less. The depth D2 may be 10 nm or more and 300 nm or less.
[0089] The difference D3 obtained by subtracting the depth D2 from the depth D1 is, for example, 5 nm or more and 200 nm or less. The difference D3 may be 10 nm or more and 200 nm or less. In one example, the depth D2 is greater than the difference D3. However, the depth D2 may be the same as or smaller than the difference D3.
[0090] As shown in FIG. 4E , in a plan view, the length Lc of the recess 161 in the direction along the continuous surface 171 is longer than the length La of the array 104a of pixel electrodes 104 in the direction along the continuous surface 171. In the example of FIG. 4E , when the number of pixel electrodes 104 included in the imaging device 1 is N (N is a natural number), the length La is the length, along the continuous surface 171, of the smallest rectangle that surrounds the array 104a of N pixel electrodes 104 in a plan view. In the example of FIG. 4E , the direction along the continuous surface 171 is the longitudinal direction of the recess 161 in a plan view. In the example of FIG. 4E , the array 104a is in a matrix form, and one of the row and column directions of the pixel electrodes 104, specifically the column direction, is parallel to the longitudinal direction of the recess 161 in a plan view. Furthermore, in a plan view, the length Lc is longer than the length Li of the insulating film 125 in the direction along the continuous surface 171.
[0091] The recess 161 provides a step 180 in the support substrate 190. The step 180 can hinder the movement of moisture along the upper surface 191 of the support substrate 190. Therefore, this configuration is suitable for realizing an imaging device 1 with high reliability.
[0092] 3. Imaging Mechanism of the Imaging Device 1 FIG. 5 is an explanatory diagram of the imaging mechanism. A voltage is applied to the counter electrode 108 from the counter electrode voltage supply unit 18 via the connection plug 106 and the connection electrode 103, in this order. This applies a bias voltage between the pixel electrode 104 and the counter electrode 108, and an electric field is applied to the photoelectric conversion film 107. In this state, light incident from above is incident on the photoelectric conversion film 107 through the microlens, color filter, insulating film 110, insulating film 109, insulating film 114, and counter electrode 108. This causes the photoelectric conversion film 107 to photoelectrically convert the incident light and generate electric charges. The electric charges generated by the photoelectric conversion film 107 are collected by the pixel electrode 104, transferred from the pixel electrode 104 via the pixel plug 105 to the diffusion region 115d, and temporarily stored in the diffusion region 115d. The stored electric charges are output to the outside as signals at appropriate times by opening and closing transistor elements and the like in the readout circuit 115.
[0093] 6A to 6O are explanatory views of steps in the manufacturing method according to the first embodiment. Each step will be described starting from the state in which the structure shown in FIG. 6A is prepared. This structure includes a support substrate 190.
[0094] A shadow mask 151 is disposed above the structure shown in Fig. 6A. Fig. 6B schematically shows the shadow mask 151. The shadow mask 151 is a plate 151p having an opening 151o. The plate 151p is, for example, a metal plate.
[0095] Next, a material for the photoelectric conversion film 107 is deposited from above onto the support substrate 190 through the opening 151o by vacuum deposition. This results in the structure shown in FIG. 6C , in which the pixel electrodes 104 and the connection electrodes 103 are covered from above with the photoelectric conversion film 107. In this embodiment, the material for the photoelectric conversion film 107 contains an organic substance, specifically, contains an organic substance as a main component. The thickness of the photoelectric conversion film 107 directly above the pixel electrodes 104 is, for example, 500 nm.
[0096] In a plan view, the area of the opening 151o is smaller than the area of the support substrate 190. The photoelectric conversion film 107 is formed in a limited region on the support substrate 190 so as not to overlap with a predetermined region 195 of the support substrate 190 in a plan view. In the example of FIG. 6C , the photoelectric conversion film 107 is formed in the pixel region 10A and the counter electrode region 10B. The predetermined region 195 belongs to the peripheral circuit region 10C. The predetermined region 195 may overlap with the peripheral circuit in a plan view.
[0097] 6C , the material of the photoelectric conversion film 107 passes through the opening 151o from top to bottom and then wraps around into the region overlapping with the plate 151p. A slope portion 107p that becomes thinner continuously outward is formed in the photoelectric conversion film 107. The angle θs between the lower surface 107a and the slope surface 107b of the slope portion 107p is, for example, greater than 0° and less than 45°, and may also be greater than 0° and less than 30°.
[0098] After the photoelectric conversion film 107 is formed, the shadow mask 151 is removed. Then, a shadow mask 152 is placed above the structure. FIG. 6D schematically shows the shadow mask 152. The shadow mask 152 is a plate 152p having an opening 152o. The plate 152p is, for example, a metal plate. In this embodiment, the area of the opening 152o is larger than the area of the opening 151o in a plan view.
[0099] Next, a material for the counter electrode 108 is deposited from above onto the support substrate 190 through the opening 152o by a physical vapor deposition (PVD) method. This results in the structure shown in FIG. 6E , in which the photoelectric conversion film 107 is covered from above with the counter electrode 108. In this embodiment, the material for the counter electrode 108 includes ITO, specifically, contains ITO as a main component. After the counter electrode 108 is formed, the shadow mask 152 is removed.
[0100] Next, a material for the insulating film 129 is deposited from above onto the support substrate 190 by a chemical vapor deposition (CVD) method. This results in the structure shown in FIG. 6F , in which the counter electrode 108 is covered with the insulating film 129 from above. In this embodiment, the material for the insulating film 129 contains aluminum oxide (AlO), specifically, aluminum oxide as a main component. The thickness of the insulating film 129 is, for example, 30 nm.
[0101] As will be understood from the description below, the insulating film 114 is part of the insulating film 129. The insulating film 114 has superior performance in protecting the photoelectric conversion film 107 compared to the counter electrode 108. Specifically, the insulating film 129 is formed by atomic layer deposition (ALD). Because atomic layer deposition can be performed without plasma, damage to the photoelectric conversion film 107 during the formation of the insulating film 129 can be suppressed. The atomic layer deposition method exhibits a high passivation effect, thereby imparting a high protective function to the insulating film 114. Furthermore, because the atomic layer deposition method has excellent coverage characteristics, even if foreign matter is present on the photoelectric conversion film 107, it is unlikely that an area of the photoelectric conversion film 107 will be left uncovered by the insulating film 114.
[0102] After the insulating film 129 is formed, a material for the insulating film 130 is deposited on the structure by a CVD method. This results in the structure shown in FIG. 6G , in which the counter electrode 108 and the insulating film 129 are covered from above with the insulating film 130. In this embodiment, the material for the insulating film 130 includes silicon oxynitride (SiON), specifically, contains silicon oxynitride as a main component. The thickness of the insulating film 130 is, for example, 200 nm.
[0103] Next, a resist pattern 139 is formed above the insulating film 130 by lithography. The resist pattern 139 is a pattern having openings. Specifically, the resist pattern 139 is arranged so that, in a plan view, the resist pattern 139 overlaps with the pixel electrodes 104 and the openings overlap with the connection electrodes 103. FIG. 6H schematically shows the resist pattern 139.
[0104] Next, the insulating film 130 is dry-etched using the resist pattern 139 as a mask, thereby dividing the insulating film 130 into the insulating film 125 and the insulating film 109, as shown in Fig. 6I. After this dry etching, the resist pattern 139 is removed by ashing.
[0105] Next, the counter electrode 108 and the insulating film 129 are dry-etched using the insulating film 109 and the insulating film 125 as a mask. The dry etching has selectivity with respect to the counter electrode 108 and the insulating film 129, but has substantially no selectivity with respect to the insulating film 109, the insulating film 125, and the photoelectric conversion film 107. The dry etching removes portions of the counter electrode 108 and the insulating film 129 that do not overlap with the insulating film 109 or the insulating film 125 in a planar view. As a result, as shown in FIG. 6J , the area of the counter electrode 108 in a planar view is reduced, and the insulating film 129 is divided into the insulating film 114 and the insulating film 124. Furthermore, over-etching forms a recess 161 in a region of the support substrate 190 that does not overlap with the insulating film 109, the insulating film 125, or the photoelectric conversion film 107 in a planar view.
[0106] Next, the photoelectric conversion film 107 is dry-etched using the insulating film 109 as a mask. Dry etching has selectivity for the photoelectric conversion film 107, but has substantially no selectivity for the insulating film 109. By dry etching, the portion of the photoelectric conversion film 107 that does not overlap with the insulating film 109 in plan view is removed. As a result, the area of the photoelectric conversion film 107 in plan view is reduced, as shown in FIG. 6K. The etching gas for the dry etching is oxygen (O 2 ) The dry etching progresses as the organic material of the photoelectric conversion film 107 reacts with oxygen in the etching gas to generate carbon oxide. The dry etching forms a side surface 107s on the photoelectric conversion film 107. The angle θt between the lower surface 107a and the side surface 107s is, for example, 70° or more and 90° or less, and may be 80° or more and 90° or less.
[0107] Next, a material for the light-shielding film 140 is deposited by CVD or PVD above the structure shown in FIG. 6K. This results in the structure shown in FIG. 6L, in which the insulating film 109, the connection electrode 103, the recess 161, and the insulating film 125 are covered from above with the light-shielding film 140. In this embodiment, the material for the light-shielding film 140 contains titanium (Ti) and titanium nitride (TiN). Specifically, the light-shielding film 140 is formed by stacking a titanium layer and a titanium nitride layer in this order from bottom to top. The thickness of the light-shielding film 140 is, for example, 400 nm.
[0108] Next, a resist pattern (not shown) is formed above the insulating film 140 by lithography. The light-shielding film 140 is dry-etched using the resist pattern as a mask. The dry etching is performed so as to remove a portion of the light-shielding film 140 that overlaps with a portion of the recess 161 in plan view. As a result, as shown in FIG. 6M, the light-shielding film 140 is divided into the light-shielding films 121 and 126. Furthermore, by over-etching, a recess 162 is formed in a region of the support substrate 190 that overlaps with a portion of the recess 161 in FIG. 6L in plan view. After this dry etching, the resist pattern is removed by ashing.
[0109] Next, a material for the insulating film 110 is deposited by CVD on the structure shown in FIG. 6M. This results in the structure shown in FIG. 6N. In this embodiment, the material for the insulating film 110 includes silicon oxynitride (SiON), specifically, silicon oxynitride as a main component. The thickness of the insulating film 110 is, for example, 400 nm.
[0110] Next, a recess 165 is formed in the pad region 10D by dry etching. Fig. 6O shows a structure in which the recess 165 is formed in the pad region 10D. Thereafter, a pad 19 is disposed on the bottom surface of the recess 165. In this way, the imaging device 1 shown in Fig. 3 is obtained.
[0111] In the above example, the shadow mask 151 is used to form the photoelectric conversion film 107 in a limited region of the region that overlaps with the support substrate 190 in a plan view. However, the photoelectric conversion film 107 may also be formed in the limited region using other methods such as an ink jet method, a stamping method, or a lift-off method. The material of the photoelectric conversion film 107 may be a metal oxide such as copper oxide.
[0112] In the above example, the counter electrode 108 is formed in a limited region of the region that overlaps with the support substrate 190 in a plan view using the shadow mask 152. However, the counter electrode 108 may be formed in the limited region using other methods such as an ink jet method, a stamping method, or a lift-off method. The counter electrode 108 may also be formed in the entire region that overlaps with the support substrate 190 in a plan view.
[0113] In the above example, the counter electrode 108, the photoelectric conversion film 107, etc. are processed by dry etching. Dry etching of the photoelectric conversion film 107 makes it possible to increase the angle θt between the lower surface 107a and the side surface 107s of the photoelectric conversion film 107. This is advantageous from the viewpoint of reducing the area of the imaging device 1. However, instead of dry etching, other methods such as wet etching or reverse sputtering may be used.
[0114] As can be understood from the above description, the manufacturing method of the imaging device 1 according to the first embodiment can be described as follows with reference to Fig. 7. Fig. 7 is a flowchart for explaining the manufacturing method according to the first embodiment. The manufacturing method includes steps S10 to S60 in this order.
[0115] In the manufacturing method, a support substrate 190 is used. The support substrate 190 includes a semiconductor substrate 101, a diffusion region 115d, a pixel electrode 104, and a connection electrode 103. The diffusion region 115d is provided in the semiconductor substrate 101. The pixel electrode 104 is electrically connected to the diffusion region 115d. The connection electrode 103 is electrically isolated from both the pixel electrode 104 and the semiconductor substrate 101. In the completed imaging device 1, when a potential difference is applied between the pixel electrode 104 and the connection electrode 103, the photoelectric conversion film 107 performs photoelectric conversion, and the generated charges are collected in the pixel electrode 104.
[0116] In step S10, the photoelectric conversion film 107 is formed above the support substrate 190 so that the photoelectric conversion film 107 does not overlap a predetermined region 195 of the support substrate 190 in a planar view. In step S10, the photoelectric conversion film 107 is formed so that a first formation ratio is greater than 0% and less than 100%. The first formation ratio is the ratio of the overlapping area of the photoelectric conversion film 107 and the support substrate 190 in a planar view to the area of the support substrate 190 in a planar view. The first formation ratio may be 10% or more and 90% or less, 20% or more and 80% or less, or 30% or more and 70% or less.
[0117] The formation of the photoelectric conversion film 107 in step S10 is deposition of the photoelectric conversion film 107 without etching. In this context, "deposition" refers to the creation of a film where no film exists.
[0118] In forming the photoelectric conversion film 107 in step S10, a shadow mask 151 is used. The shadow mask 151 makes it easy to control the overlapping area between the photoelectric conversion film 107 and the support substrate 190 in a plan view. Specifically, the overlapping area can be controlled to the minimum necessary, which makes it possible to reduce the reduction in the area of the photoelectric conversion film 107 due to etching.
[0119] Specifically, step S10 includes steps S11 and S12 in this order. The shadow mask 151 is a plate 151p having an opening 151o. In step S11, the shadow mask 151 is positioned so that the support substrate 190 includes a portion overlapping the opening 151o and a portion overlapping the plate 151p in a planar view. In step S12, the material for the photoelectric conversion film 107 is deposited through the opening 151o. This can prevent the material from being deposited on at least a portion of the portion of the support substrate 190 that overlaps with the plate 151p in a planar view.
[0120] In step S20, the counter electrode 108 is formed so that the counter electrode 108 is located above the photoelectric conversion film 107 and so that the counter electrode 108 overlaps with the photoelectric conversion film 107 in a planar view. In step S20, the counter electrode 108 is formed so that a second formation ratio is greater than 0% and less than 100%. The second formation ratio is the ratio of the overlapping area of the counter electrode 108 and the support substrate 190 in a planar view to the area of the support substrate 190 in a planar view. The second formation ratio may be 10% or more and 90% or less, 20% or more and 80% or less, or 30% or more and 70% or less.
[0121] The formation of the counter electrode 108 in step S20 is deposition of the counter electrode 108 without etching. In this context, "deposition" refers to the creation of a film where no film exists.
[0122] In step S20, a shadow mask 152 is used to form the counter electrode 108. The shadow mask 152 makes it easy to control the overlapping area between the counter electrode 108 and the support substrate 190 in a plan view. Specifically, the overlapping area can be controlled to the minimum necessary, which makes it possible to reduce the reduction in the area of the counter electrode 108 due to etching.
[0123] Specifically, step S20 includes steps S21 and S22 in this order. The shadow mask 152 is a plate 152p having an opening 152o. In step S21, the shadow mask 152 is positioned so that the support substrate 190 includes a portion that overlaps with the opening 152o and a portion that overlaps with the plate 152p in a planar view. In step S22, the material of the counter electrode 108 is deposited through the opening 152o. This can prevent the material from being deposited on at least a portion of the portion of the support substrate 190 that overlaps with the plate 152p in a planar view.
[0124] In step S30, the insulating film 125 and the insulating film 109 are formed. Specifically, step S30 includes step S31 and step S32 in this order.
[0125] In step S31, the insulating film 130 is formed so as to satisfy the following conditions: the insulating film 130 includes a first insulating portion and a second insulating portion; the first insulating portion is located above the predetermined region 195; the first insulating portion overlaps the predetermined region 195 in a planar view; the second insulating portion is located above the photoelectric conversion film 107; and the second insulating portion overlaps the photoelectric conversion film 107 in a planar view.
[0126] In step S32, a second etching is performed. The second etching removes a portion of the insulating film 130 located between the first insulating portion and the second insulating portion. As a result, an insulating film 125 corresponding to the first insulating portion and an insulating film 109 corresponding to the second insulating portion are formed. Specifically, the second etching is dry etching.
[0127] According to steps S31 and S32, in a region overlapping with the predetermined region 195 in a plan view, the insulating film 125 that does not overlap with the photoelectric conversion film 107 in a plan view can be formed without the operation of retracting the photoelectric conversion film 107. Also, the insulating film 109 that overlaps with the photoelectric conversion film 107 in a plan view can be formed. Moreover, the insulating film 125 and the insulating film 109 can be formed together by forming the insulating film 130 and performing the second etching.
[0128] In a plan view, the insulating film 109 obtained in step S32 overlaps with the pixel electrode 104. Specifically, in a plan view, this insulating film 109 overlaps with the entire pixel electrode 104. In a plan view, the portion removed in step S32 overlaps with the connection electrode 103. Specifically, in a plan view, this portion overlaps with the entire connection electrode 103.
[0129] The imaging device 1 is manufactured including the insulating film 125 and the insulating film 109. Therefore, the insulating function of the insulating film 125 and the insulating film 109 can be utilized in the imaging device 1.
[0130] In step S40, a third etching is performed. The third etching reduces the area of the counter electrode 108 in a plan view. Specifically, the third etching is dry etching.
[0131] As can be understood from the above description, in step S20, the counter electrode 108 having a limited area is formed. In step S40, the area of the counter electrode 108 is reduced by the third etching. In this way, the extent of reduction in the area of the counter electrode 108 by the third etching can be limited, and the generation of etching residue can be suppressed. This suppression can improve the uniformity of image quality.
[0132] The third etching is performed so as to leave portions of the counter electrode 108 that overlap with the pixel electrodes 104 in a plan view. Specifically, the third etching is performed so as to leave all portions of the counter electrode 108 that overlap with the pixel electrodes 104 in a plan view.
[0133] The third etching removes the portion of the counter electrode 108 that overlaps with the connection electrode 103 in a planar view. In this way, it is possible to manufacture the imaging device 1 in which the connection electrode 103 and the counter electrode 108 do not overlap with each other in a planar view. Specifically, the third etching removes all of the portion of the counter electrode 108 that overlaps with the connection electrode 103 in a planar view.
[0134] The third etching is performed after the following structure is formed; the photoelectric conversion film 107 is located above the support substrate 190; the photoelectric conversion film 107 is located above the connection electrode 103; the photoelectric conversion film 107 overlaps with the connection electrode 103 in a planar view; the counter electrode 108 is located above the photoelectric conversion film 107; the counter electrode 108 overlaps with the photoelectric conversion film 107 in a planar view; the insulating film 125 is located above the support substrate 190; the insulating film 125 is separated from both the photoelectric conversion film 107 and the counter electrode 108 in a planar view; the insulating film 109 is located above the counter electrode 108; and the insulating film 109 overlaps with the counter electrode 108 in a planar view.
[0135] The third etching includes etching that reduces the area of the counter electrode 108 in a plan view using the insulating film 109 as a mask. The third etching includes etching that forms a recess 161 in the support substrate 190 using the insulating film 125 and the photoelectric conversion film 107 as masks. Specifically, the recess 161 can be formed in the insulating layer 102f of the support substrate 190.
[0136] The selectivity of the third etching to the counter electrode 108 is higher than the selectivity of the third etching to the photoelectric conversion film 107. By such third etching, the portion of the counter electrode 108 that overlaps with the connection electrode 103 in a plan view is removed. Specifically, by the third etching, all the portions of the counter electrode 108 that overlap with the connection electrode 103 in a plan view are removed.
[0137] The ratio of the area of the counter electrode 108 in plan view reduced by the third etching to the area of the support substrate 190 in plan view is defined as a second reduction ratio. The second reduction ratio is, for example, greater than 0% and less than or equal to 20%, and may be greater than 0% and less than or equal to 10%.
[0138] In step S50, a first etching is performed. The first etching reduces the area of the photoelectric conversion film 107 in a plan view. Specifically, the first etching is dry etching.
[0139] As can be understood from the above description, in step S10, a photoelectric conversion film 107 having a limited area is formed. In step S50, the area of the photoelectric conversion film 107 is reduced by a first etching. In this way, the extent of reduction in the area of the photoelectric conversion film 107 due to the first etching can be suppressed, and the generation of etching residue can be suppressed. This suppression can improve the uniformity of image quality.
[0140] The first etching is performed so as to leave portions of the photoelectric conversion film 107 that overlap with the pixel electrodes 104 in a planar view. Specifically, the first etching is performed so as to leave all portions of the photoelectric conversion film 107 that overlap with the pixel electrodes 104 in a planar view.
[0141] The first etching removes the portions of the photoelectric conversion film 107 that overlap with the connection electrodes 103 in a planar view. In this way, it is possible to manufacture the imaging device 1 in which the connection electrodes 103 and the photoelectric conversion film 107 do not overlap with each other in a planar view. Specifically, the first etching removes all of the portions of the photoelectric conversion film 107 that overlap with the connection electrodes 103 in a planar view.
[0142] As can be understood from the above description, the third etching, which has a relatively low selectivity for the photoelectric conversion film 107, is performed in a state in which the photoelectric conversion film 107 is positioned above the connection electrode 103 and overlaps the connection electrode 103 in a planar view. Then, the first etching removes the portion of the photoelectric conversion film 107 that overlaps the connection electrode 103 in a planar view. In this manner, the photoelectric conversion film 107 can protect the connection electrode 103 from the third etching. Specifically, this can prevent the connection electrode 103 from being scraped off, thereby preventing an increase in electrical resistance in the connection electrode 103. After this removal, an electrical path electrically connecting the connection electrode 103 and the counter electrode 108 is formed above the support substrate 190. As can be understood from the description of step S60 described below, the electrical path is specifically the second film body, which can correspond to the light-shielding film 121.
[0143] In step S50, an insulating film mask is used in the first etching. The insulating film mask is difficult to etch. Therefore, by performing the first etching using the insulating film mask, the generation of etching residues can be suppressed. This suppression can improve the uniformity of image quality. Specifically, the insulating film mask can have a large etching selectivity relative to the photoelectric conversion film 107, and therefore is difficult to etch. Furthermore, in a typical example, the insulating film mask does not contain carbon, which is the source of etching residues. This can also contribute to the suppression of the generation of etching residues. The insulating film mask can be the insulating film 109.
[0144] The ratio of the area of the photoelectric conversion film 107 in a plan view reduced by the first etching to the area of the support substrate 190 in a plan view is defined as a first reduction ratio. The first reduction ratio is, for example, greater than 0% and less than or equal to 20%, and may be greater than 0% and less than or equal to 10%.
[0145] The predetermined region 195 belongs to the peripheral circuit region 10C. On the other hand, the photoelectric conversion film 107 that has undergone the first etching belongs to the pixel region 10A.
[0146] In step S60, the first film body and the second film body are formed. Specifically, step S60 includes steps S61 and S62 in this order.
[0147] In step S61, the specific film body is formed to satisfy the following conditions: - the specific film body includes a first film portion and a second film portion; - the first film portion is located above the specified region 195; - the first film portion overlaps with the specified region 195 in a planar view; - the second film portion is located above the photoelectric conversion film 107; and - the second film portion overlaps with the photoelectric conversion film 107 in a planar view.
[0148] In step S62, a fourth etching is performed. The fourth etching removes an intermediate portion of the specific film body located between the first film portion and the second film portion. This results in the formation of a first film body corresponding to the first film portion and a second film body corresponding to the second film portion.
[0149] According to steps S61 and S62, in the region overlapping with the predetermined region 195 in plan view, a first film body that does not overlap with the photoelectric conversion film 107 in plan view can be formed without the operation of retracting the photoelectric conversion film 107. Also, a second film body that overlaps with the photoelectric conversion film 107 in plan view can be formed. Moreover, the first film body and the second film body can be formed together by forming the specific film body and performing the fourth etching. The specific film body, the first specific film, and the second specific film can correspond to the light-shielding film 140, the light-shielding film 126, and the light-shielding film 121, respectively.
[0150] In step S62, a recess 162 is formed by a fourth etching in a portion of the support substrate 190 that overlaps with the middle portion in a plan view.
[0151] Second Embodiment FIG. 8 is a schematic diagram of a camera system 604 according to a second embodiment. The camera system 604 includes an imaging device 600, an optical system 601, a camera signal processing unit 602, and a system controller 603. The imaging device 600 can be the imaging device 1 described in the first embodiment. The optical system 601 collects light. The optical system 601 includes, for example, a lens. The camera signal processing unit 602 performs signal processing on data captured by the imaging device 600 and outputs the data as an image or data. The system controller 603 controls the imaging device 600 and the camera signal processing unit 602.
[0152] 9A-9F are diagrams illustrating steps in a manufacturing method according to a third embodiment. Each step will be described starting from the state in which the structure shown in FIG. 9A is prepared. This structure includes a support substrate 190.
[0153] A ring mask 153 is placed above the structure shown in Fig. 9A. Fig. 9B schematically shows the ring mask 153. The ring mask 153 is a plate 153p having an opening 153o. The plate 153p is, for example, a metal plate.
[0154] 9C schematically shows a configuration in which a ring mask 153 is disposed above the support substrate 190. Next, a material for the photoelectric conversion film 107 is deposited from above onto the support substrate 190 through the opening 153o by vacuum deposition. This results in the structure shown in FIG. 9D , in which the pixel electrodes 104 and the connection electrodes 103 are covered from above with the photoelectric conversion film 107. In this embodiment, the material for the photoelectric conversion film 107 contains an organic substance, specifically, contains an organic substance as a main component. The thickness of the photoelectric conversion film 107 directly above the pixel electrodes 104 is, for example, 500 nm.
[0155] In a plan view, the area of the opening 153o is smaller than the area of the support substrate 190. The photoelectric conversion film 107 is formed in a limited region on the support substrate 190 so as not to overlap with a predetermined region 195 of the support substrate 190 in a plan view. In the example of Fig. 9D, the photoelectric conversion film 107 is formed in the pixel region 10A and the counter electrode region 10B. In the example of Fig. 9D, the predetermined region 195 is the outer periphery of the support substrate 190.
[0156] After the photoelectric conversion film 107 is formed, the ring mask 190 is removed. Then, a ring mask 154 is placed above the support substrate 190. FIG. 9E schematically shows the ring mask 154. The ring mask 154 is a plate 154p having an opening 154o. The plate 154p is, for example, a metal plate. In this embodiment, the area of the opening 154o is larger than the area of the opening 153o in a plan view.
[0157] FIG. 9F schematically shows a configuration in which a ring mask 153 is disposed above a support substrate 190. Next, a material for the counter electrode 108 is deposited from above onto the support substrate 190 through the opening 152o by physical vapor deposition (PVD). This results in the structure shown in FIG. 9G , in which the photoelectric conversion film 107 is covered from above with the counter electrode 108. In this embodiment, the material for the counter electrode 108 includes ITO, specifically, contains ITO as a main component. After the counter electrode 108 is formed, the ring mask 154 is removed.
[0158] The subsequent steps are the same as those in the first embodiment. The counter electrode 108, the photoelectric conversion film 107, and the like are processed by dry etching to obtain the structure shown in Fig. 9H. However, instead of dry etching, other methods such as wet etching and reverse sputtering may be used.
[0159] As can be understood from the above description, the manufacturing method of the imaging device 1 according to the third embodiment can be described as follows with reference to Fig. 10. Fig. 10 is a flowchart for explaining the manufacturing method according to the first embodiment. The manufacturing method includes step S70 instead of step S10 in Fig. 7, and step S80 instead of step S20.
[0160] The manufacturing method of the imaging device 1 according to the third embodiment can be explained by replacing the shadow mask with a metal mask in the manufacturing method of the imaging device 1 according to the first embodiment, and therefore the explanation of steps S30 to S60 will be omitted.
[0161] In step S70, the photoelectric conversion film 107 is formed above the support substrate 190 so that the photoelectric conversion film 107 does not overlap a predetermined region 195 of the support substrate 190 in a planar view. In step S70, the photoelectric conversion film 107 is formed so that a first formation ratio is greater than 0% and less than 100%. The first formation ratio is the ratio of the overlapping area of the photoelectric conversion film 107 and the support substrate 190 in a planar view to the area of the support substrate 190 in a planar view. The first formation ratio may be 10% or more and 90% or less, 20% or more and 80% or less, or 30% or more and 70% or less.
[0162] The formation of the photoelectric conversion film 107 in step S70 is deposition of the photoelectric conversion film 107 without etching. In this context, "deposition" refers to the creation of a film where no film exists.
[0163] A ring mask 151 is used in forming the photoelectric conversion film 107 in step S70. The ring mask 151 makes it easy to control the overlapping area between the photoelectric conversion film 107 and the support substrate 190 in a planar view. Specifically, the overlapping area can be controlled to the minimum necessary, thereby reducing the film formation stress applied to the substrate. A ring mask has a larger margin for the film formation area than a shadow mask, and since the film formation area does not need to be strictly defined, a thicker mask can be used. In this regard, a thicker mask can reduce the frequency of maintenance, leading to lower process costs.
[0164] Specifically, step S70 includes steps S71 and S72 in this order. The ring mask 153 is a donut-shaped plate 153p with an opening 153o. In step S71, the ring mask 153 is positioned so that the support substrate 190 includes a portion overlapping the opening 153o and a portion overlapping the donut-shaped plate 153p in a planar view. In step S72, a material for the photoelectric conversion film 107 is deposited through the opening 153o. This can prevent material from being deposited on at least a portion of the support substrate 190 that overlaps the plate 153p in a planar view. In particular, using the ring mask 153 can prevent film formation on the outer periphery of the support substrate 190, which is unnecessary when forming pixels, and can reduce film-forming stress on the substrate.
[0165] In step S80, the counter electrode 108 is formed so that the counter electrode 108 is located above the photoelectric conversion film 107 and so that the counter electrode 108 overlaps with the photoelectric conversion film 107 in a planar view. In step S20, the counter electrode 108 is formed so that a second formation ratio is greater than 0% and less than 100%. The second formation ratio is the ratio of the overlapping area of the counter electrode 108 and the support substrate 190 in a planar view to the area of the support substrate 190 in a planar view. The second formation ratio may be 10% or more and 90% or less, 20% or more and 80% or less, or 30% or more and 70% or less.
[0166] The formation of the counter electrode 108 in step S80 is deposition of the counter electrode 108 without etching. In this context, "deposition" refers to the creation of a film where no film exists.
[0167] In step S80, a ring mask 154 is used to form the counter electrode 108. The ring mask 154 makes it easy to control the overlapping area between the counter electrode 108 and the support substrate 190 in a plan view. Specifically, the overlapping area can be controlled to the minimum necessary, thereby reducing the film formation stress applied to the substrate.
[0168] Specifically, step S80 includes steps S81 and S82 in this order. The ring mask 154 is a donut-shaped plate 154p having an opening 154o. In this embodiment, the area of the opening 154o is larger than the area of the opening 153o in a plan view. In step S81, the ring mask 154 is positioned so that the opening 154o overlaps the photoelectric conversion film 107 and the support substrate 190 in a plan view, where the photoelectric conversion film 107 is not formed. In addition, the donut-shaped plate 154p is positioned so that the opening 154o overlaps the support substrate 190 in a plan view, where the photoelectric conversion film 107 is not formed. In step S82, the material for the counter electrode 108 is deposited through the opening 154o. This can prevent material from being deposited on at least a portion of the support substrate 190 that overlaps the plate 154p in a plan view.
[0169] The description of the first embodiment is applicable to steps S30 to S60.
[0170] According to the present disclosure, an imaging device that can be installed in a digital still camera or the like can be realized.
[0171] 1,600 Imaging device 10A Pixel region 10B Counter electrode region 10C Peripheral circuit region 10D Pad region 12 Vertical driver 13 Timing generator 14 Signal processing circuit 15 Horizontal driver 16 LVDS device 17 Serial conversion unit 18 Counter electrode voltage supply unit 19 Pad 100 Pixel 101 Semiconductor substrate 102 Insulation structure 102a, 102b, 102c, 102d, 102e, 102f Insulation layer 103 Connection electrode 104 Pixel electrode 104a Array 105 Pixel plug 106 Connection plug 107 Photoelectric conversion film 107a Lower surface 107b Slope surface 107p Slope portion 107s, 108s, 112ps, 124s, 126ps, 125s Side surface 108 Counter electrode 109, 110, 114, 124, 125, 129, 130 Insulating film 121, 126, 140 Light-shielding film 115 Readout circuit 115d Diffusion region 116 Top layer wiring 121p, 126p Internal portion 139 Resist pattern 151, 152 Shadow mask 151o, 152o, 153o Opening 151p, 152p, 153p Plate 153, 154 Metal mask 161, 162, 165 Recess 161s, 162s, 163s Partition surface 171, 172, 173 Continuous surface 180 Step 190 Support substrate 191 Upper surface 195 Predetermined area 601 Optical system 602 Camera signal processing unit 603 System controller 604 Camera system
Claims
1. forming a specific insulating film including a second insulating portion such that the second insulating portion is located above a photoelectric conversion film and the second insulating portion overlaps with the photoelectric conversion film in a plan view; removing a portion of the specific insulating film that is in contact with the second insulating portion by a second etching to form a second insulating film that corresponds to the second insulating portion; A method for manufacturing an imaging device.
2. forming the photoelectric conversion film above the supporting substrate so that the photoelectric conversion film does not overlap a predetermined region of the supporting substrate in a plan view; forming the specific insulating film such that the specific insulating film includes a first insulating portion, the first insulating portion is located above the specific region, and the first insulating portion overlaps with the specific region in a plan view; forming a first insulating film corresponding to the first insulating portion; the portion that is included in the specific insulating film and that is in contact with the second insulating portion is in contact with the first insulating portion, The first insulating film is formed by the removal. The method of claim 1 .
3. forming a counter electrode such that a ratio of an overlapping area of the counter electrode and the support substrate in a plan view to an area of the support substrate in a plan view is greater than 0% and smaller than 100%, the counter electrode is located above the photoelectric conversion film, and the counter electrode overlaps with the photoelectric conversion film in a plan view; and reducing an area of the counter electrode in a plan view by a third etching. The method of claim 1 .
4. performing a third etching after a structure is formed in which the photoelectric conversion film is located above a support substrate, the counter electrode is located above the photoelectric conversion film, the counter electrode overlaps the photoelectric conversion film in a plan view, the second insulating film is located above the counter electrode, and the second insulating film overlaps the counter electrode in a plan view, The third etching is Etching to reduce an area of the counter electrode in a plan view using the second insulating film as a mask; and forming a first recess in the support substrate by etching using the photoelectric conversion film as a mask. The method of claim 1 .
5. The supporting substrate includes a connecting electrode, The manufacturing method includes: a structure in which the photoelectric conversion film is located above the connection electrode, the photoelectric conversion film overlaps with the connection electrode in a planar view, and a counter electrode is located above the photoelectric conversion film and overlaps with the photoelectric conversion film in a planar view is formed, and then a portion of the counter electrode that overlaps with the connection electrode in a planar view is removed by a third etching process having a higher selectivity for the counter electrode than a selectivity for the photoelectric conversion film; After the third etching, a first etching is performed to reduce an area of the photoelectric conversion film in a plan view, thereby removing a portion of the photoelectric conversion film that overlaps with the connection electrode in a plan view. The method of claim 1 .
6. The manufacturing method includes: forming a specific film body such that the specific film body includes a first film portion and a second film portion, the first film portion is located above a predetermined region of a support substrate, the first film portion overlaps the predetermined region in a planar view, the second film portion is located above the photoelectric conversion film, and the second film portion overlaps the photoelectric conversion film in a planar view; and removing an intermediate portion of the specific film body located between the first film portion and the second film portion by a fourth etching to form a first film body corresponding to the first film portion and a second film body corresponding to the second film portion. The method of claim 1 .
7. a second recess is formed in a portion of the support substrate that overlaps with the intermediate portion in a plan view by the fourth etching; The method according to claim 6.
8. the predetermined region is included in a peripheral circuit region, The method according to claim 2 .
9. the predetermined region is included in a peripheral circuit region, The method according to claim 6.
10. A support substrate having a first portion recessed from a central portion thereof; a first insulating film located above the support substrate; a photoelectric conversion film located above the support substrate; at least one membrane including a portion located within the first portion; Equipped with the first portion is located outside the central portion; a first continuous surface including a first partition surface separating the central portion and the first portion and a side surface of the first insulating film is provided at a position separated from the photoelectric conversion film in a plan view; The at least one film is not electrically conductive. Imaging device.
11. The at least one film includes at least one selected from the group consisting of a light-shielding film and a second insulating film. The imaging device according to claim 10.
12. Further comprising a first membrane; the first portion includes a second portion, the first membrane includes an interior portion located within the first portion; A second continuous surface is provided, the second continuous surface including a second partition surface that defines the second portion and a side surface of the internal portion. The imaging device according to claim 10.
13. Further comprising a second membrane; the second film is in contact with the second continuous surface; The imaging device according to claim 12.
14. the supporting substrate includes an array of pixel electrodes; In a plan view, a length of the first portion in a direction along the first continuous surface is longer than a length of the array in a direction along the first continuous surface. The imaging device according to claim 10.
15. The first portion provides a step in the support substrate. The imaging device according to claim 10 .