Signal transmission device

Abstract

This signal transmission device comprises: a first chip including an isolation transformer; a second chip; a plurality of first lead terminals; a plurality of second lead terminals; an inter-chip wire that electrically connects the first chip and the second chip; and a first lead wire that individually connects the first chip and a plurality of first lead terminals. The inter-chip wire is made of a material containing gold. The first lead wire is made of a material containing copper or aluminum.

Description

signal transmission device

[0001] The present disclosure relates to a signal transmission device.

[0002] A signal transmission device has been known that includes a first die pad, a second die pad disposed at a distance from the first die pad, a first chip and a transformer chip mounted on the first die pad, a second chip mounted on the second die pad, and a sealing resin that seals the die pads and chips (see, for example, Patent Document 1). In such a signal transmission device, the first chip and the transformer chip are electrically connected by a wire, and the transformer chip and the second chip are electrically connected by another wire.

[0003] Japanese Patent Application Laid-Open No. 2016-207714

[0004] From the viewpoint of the insulation reliability of the signal transmission device, it is desired to inspect the shape and height of the inter-chip wires that electrically connect adjacent chips with each other with higher accuracy.

[0005] a first die pad on which the first chip is mounted; a second die pad on which the second chip is mounted, the second die pad being spaced apart from the first die pad in a first direction; a plurality of first lead terminals arranged in a second direction intersecting the first direction in a planar view relative to both the first die pad and the second die pad and arranged in the first direction; a plurality of second lead terminals arranged on the opposite side of the plurality of first lead terminals relative to both the first die pad and the second die pad in the second direction and arranged in the first direction; inter-chip wires connecting the first chip and the second chip; and first lead wires individually connecting the first chip and the plurality of first lead terminals, the inter-chip wires being formed of a material containing gold, and the first lead wires being formed of a material containing copper or aluminum.

[0006] According to the signal transmission device, the wire height of the inter-chip wires can be inspected with higher accuracy.

[0007] FIG. 1 is a perspective view of a signal transmission device of a first embodiment. FIG. 2 is a side view of the signal transmission device of FIG. 1. FIG. 3 is a side view of the signal transmission device of FIG. 1 viewed from a different direction than FIG. 2. FIG. 4 is an enlarged view of a second lead terminal and its periphery of FIG. 3. FIG. 5 is an enlarged view of an outer lead end face of the second lead terminal of FIG. 4. FIG. 6 is a side view of the signal transmission device mounted on a circuit board. FIG. 7 is a schematic plan view showing the internal configuration of the signal transmission device of FIG. 1. FIG. 8 is an enlarged view of a first lead terminal and its periphery of FIG. 7. FIG. 9 is a schematic cross-sectional view of the wire connection portion of the first lead terminal taken along line F9-F9 in FIG. 8. FIG. 10 is an enlarged view of the second lead terminal of FIG. 7 and its periphery. FIG. 11 is a schematic cross-sectional view of the wire connection portion of the second lead terminal taken along line F11-F11 in FIG. 10. FIG. 12 is a perspective view showing an enlarged structure of a portion of a first die pad wire. FIG. 13 is a circuit diagram of the signal transmission device of the first embodiment. FIG. 14 is a schematic plan view showing an example of the internal structure of a first chip in the signal transmission device of the first embodiment. FIG. 15 is a schematic plan view showing an example of the internal structure of a first chip at a position different from that of FIG. 14 in the thickness direction of the first chip. FIG. 16 is a cross-sectional view showing the cross-sectional structure of a first transformer of the first chip and its periphery. FIG. 17 is an enlarged view of a portion of the first chip in FIG. 16. FIG. 18 is an enlarged view of the conductor wires of the first front-side coil in the first chip in FIG. 17. FIG. 19 is an enlarged view of the conductor wires of the first back-side coil in the first chip in FIG. 17. FIG. 20 is a cross-sectional view showing the cross-sectional structure of a portion of the circuit region of the first chip. FIG. 21 is an enlarged view of the first via and its periphery in FIG. 20. FIG. 22 is an enlarged plan view of a first lead terminal and its periphery in a signal transmission device of the second embodiment. FIG. 23 is an enlarged plan view of a second lead terminal and its periphery in a signal transmission device of the second embodiment. Fig. 24 is an enlarged plan view of the first chip, the second chip, and their periphery in the signal transmission device of the third embodiment. Fig. 25 is a plan view schematically showing the internal structure of the signal transmission device of the fourth embodiment. Fig. 26 is an enlarged plan view of the first lead terminal and its periphery in the signal transmission device of the fifth embodiment.FIG. 27 is an enlarged plan view of a second lead terminal and its periphery in the signal transmission device of the fifth embodiment. FIG. 28 is an enlarged plan view of a first lead terminal and its periphery in the signal transmission device of the sixth embodiment. FIG. 29 is an enlarged plan view of a second lead terminal and its periphery in the signal transmission device of the sixth embodiment. FIG. 30 is a schematic cross-sectional view of a first chip and a first die pad in the signal transmission device of the seventh embodiment. FIG. 31 is a schematic cross-sectional view of the first chip and the first die pad cut in a direction different from that in FIG. 30. FIG. 32 is a schematic cross-sectional view of a second chip and a second die pad. FIG. 33 is a schematic cross-sectional view of the second chip and the second die pad cut in a direction different from that in FIG. 32. FIG. 34 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device of the seventh embodiment. FIG. 35 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to that in FIG. 34. FIG. 36 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to that in FIG. 35. FIG. 37 is a cross-sectional view schematically showing an example of a manufacturing process of the signal transmission device subsequent to FIG. 36 . FIG. 38 is a plan view schematically showing the internal structure of the signal transmission device of the eighth embodiment. FIG. 39 is a cross-sectional view showing the cross-sectional structure of the first transformer of the first chip and its periphery in the signal transmission device of the ninth embodiment. FIG. 40 is an enlarged view of a portion of the first chip in FIG. 39 . FIG. 41 is a cross-sectional view schematically showing an example of a manufacturing process of the signal transmission device of the ninth embodiment. FIG. 42 is a cross-sectional view schematically showing an example of a manufacturing process of the signal transmission device subsequent to FIG. 41 . FIG. 43 is a cross-sectional view schematically showing an example of a manufacturing process of the signal transmission device subsequent to FIG. 42 . FIG. 44 is a cross-sectional view schematically showing the cross-sectional structure of the first transformer of the first chip and a portion of its periphery in the signal transmission device of the tenth embodiment. FIG. 45 is an enlarged view of the conductor of the first surface-side coil in the first chip in the signal transmission device of the eleventh embodiment. FIG. 46 is a cross-sectional view schematically showing an example of a manufacturing process of the signal transmission device of the eleventh embodiment. Fig. 47 is a cross-sectional view schematically showing an example of the manufacturing process of the signal transmission device subsequent to Fig. 46. Fig. 48 is a cross-sectional view schematically showing an example of the manufacturing process of the signal transmission device subsequent to Fig. 47.FIG. 49 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 48 . FIG. 50 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 49 . FIG. 51 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 50 . FIG. 52 is a cross-sectional view showing a cross-sectional structure of the first transformer of the first chip and a portion of its periphery in the signal transmission device of the twelfth embodiment. FIG. 53 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device of the twelfth embodiment. FIG. 54 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 53 . FIG. 55 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 54 . FIG. 56 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 55 . FIG. 57 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 56 . FIG. 58 is a plan view schematically showing the internal structure of the first chip in the signal transmission device of the thirteenth embodiment. FIG. 59 is a schematic plan view showing an example of the internal structure of the first chip at a position different in the thickness direction of the first chip from that of FIG. 58 . FIG. 60 is a schematic plan view showing the internal structure of the first chip for a signal transmission device of the fourteenth embodiment. FIG. 61 is an enlarged view of a transformer insulating region in the first chip of FIG. 60 . FIG. 62 is a schematic plan view showing an example of the internal structure of the first chip at a position different in the thickness direction of the first chip from that of FIG. 60 . FIG. 63 is an enlarged view of the transformer insulating region in the first chip of FIG. 62 . FIG. 64 is a plan view showing a schematic internal structure of a signal transmission device of a modified example. FIG. 65 is a plan view showing an example of the internal structure of the first chip for a signal transmission device of a modified example. FIG. 66 is a schematic plan view showing the internal structure of the first chip at a position different in the thickness direction of the first chip from that of FIG. 65 . FIG. 67 is a plan view showing a schematic internal structure of a signal transmission device of a modified example.

[0008] Hereinafter, several embodiments of a signal transmission device according to the present disclosure will be described with reference to the accompanying drawings. Note that for simplicity and clarity of description, the components shown in the drawings are not necessarily drawn to scale. Also, hatching lines may be omitted in cross-sectional views to facilitate understanding. The accompanying drawings merely illustrate embodiments of the present disclosure and should not be considered as limiting the present disclosure.

[0009] The following detailed description includes devices, systems, and methods embodying exemplary embodiments of the present disclosure. This detailed description is merely illustrative in nature and is not intended to limit the embodiments of the present disclosure or the application and uses of such embodiments.

[0010] <First Embodiment> A signal transmission device 10 according to the first embodiment will be described with reference to Figures 1 to 21. Figures 1 to 6 show the external structure of the signal transmission device 10. Figures 7 to 12 show the internal structure of the signal transmission device 10. Figure 13 shows the circuit configuration of the signal transmission device 10. Figures 14 to 21 show the internal structure of a first chip 60 (described later) of the signal transmission device 10.

[0011] [External Configuration of Signal Transmission Device] Fig. 1 shows a perspective view of the signal transmission device 10. Figs. 2 and 3 show a side view of the signal transmission device 10. Fig. 4 shows an enlarged view of a portion of a second lead terminal 44 (described later) of the signal transmission device 10.

[0012] 1, the signal transmission device 10 has a small outline package (SOP) package structure. However, the package structure of the signal transmission device 10 can be changed as desired, and may be a quad for non-lead package (QFN), dual flat package (DFP), dual inline package (DIP), quad flat package (QFP), single inline package (SIP), small outline J-leaded package (SOJ), or any of a variety of similar package structures.

[0013] As shown in FIG. 1, the signal transmission device 10 includes a sealing resin 90, a plurality of first lead terminals 11 to 14 (four in the first embodiment) protruding from the sealing resin 90, and a plurality of second lead terminals 41 to 44 (four in the first embodiment) protruding from the sealing resin 90.

[0014] The sealing resin 90 is formed in a rectangular plate shape. Here, in this specification, the thickness direction of the sealing resin 90 is referred to as the "Z direction," and two mutually orthogonal directions perpendicular to the Z direction are referred to as the "X direction" and the "Y direction." Furthermore, the upper side of the Z direction is referred to as the "+Z direction," and the lower side is referred to as the "-Z direction." In FIG. 1 , the front side of the X direction is referred to as the "+X direction," and the rear side is referred to as the "-X direction." In FIG. 1 , the right side of the Y direction is referred to as the "+Y direction," and the left side is referred to as the "-Y direction." Furthermore, in this specification, the term "planar view" refers to viewing the signal transmission device 10 from the thickness direction of the sealing resin 90. Unless otherwise specified, the term "planar view" refers to viewing the signal transmission device 10 from the +Z direction.

[0015] The shape of the sealing resin 90 in plan view is a rectangle with the short side in the X direction and the long side in the Y direction. In one example, the dimension of the sealing resin 90 in the X direction is 3.8 mm to 4.0 mm, the dimension of the sealing resin 90 in the Y direction is 4.8 mm to 5.0 mm, and the dimension (thickness) of the sealing resin 90 in the Z direction is 1.25 mm to 1.65 mm.

[0016] As shown in FIGS. 1 to 3 , the sealing resin 90 has a sealing surface 91, a sealing back surface 92 opposite the sealing surface 91, and first to fourth sealing side surfaces 93 to 96 connecting the sealing surface 91 and the sealing back surface 92. The sealing surface 91 faces in the +Z direction, and the sealing back surface 92 faces in the −Z direction. The first sealing side surface 93 and the second sealing side surface 94 constitute both end surfaces of the sealing resin 90 in the X direction, and the third sealing side surface 95 and the fourth sealing side surface 96 constitute both end surfaces of the sealing resin 90 in the Y direction. The first sealing side surface 93 faces in the −X direction, and the second sealing side surface 94 faces in the +X direction. The third sealing side surface 95 faces in the −Y direction, and the fourth sealing side surface 96 faces in the +Y direction.

[0017] 1, a recess 91A is formed in the sealing surface 91. The recess 91A is circular in plan view. The recess 91A is recessed in a curved concave shape from the sealing surface 91. The recess 91A is formed in a portion of the sealing surface 91 that is closer to the second sealing side surface 94 and the third sealing side surface 95. The recess 91A serves as a mark for distinguishing the first lead terminals 11 to 14 from the second lead terminals 41 to 44.

[0018] As shown in FIG. 3 , the first sealing side surface 93 includes a first front side surface 93A continuous with the sealing surface 91, a first back side surface 93B continuous with the sealing back surface 92, and a first central side surface 93C. The second sealing side surface 94 includes a second front side surface 94A continuous with the sealing surface 91, a second back side surface 94B continuous with the sealing back surface 92, and a second central side surface 94C. The first front side surface 93A and the second front side surface 94A are inclined away from each other as they extend from the sealing surface 91 toward the sealing back surface 92. The connection between the first front side surface 93A and the sealing surface 91 is curved. The connection between the second front side surface 94A and the sealing surface 91 includes an inclined surface 94AA. The angle formed by the inclined surface 94AA and the Z direction is larger than the angle formed by the second front side surface 94A and the Z direction. The angle between the inclined surface 94AA and the Z direction is, for example, 45°. The first rear surface side surface 93B and the second rear surface side surface 94B are inclined in directions away from each other as they move from the sealed rear surface 92 to the sealed front surface 91. The connection portions between the first rear surface side surface 93B and the second rear surface side surface 94B and the sealed rear surface 92 are curved. The first central side surface 93C is formed between the first front surface side surface 93A and the first rear surface side surface 93B in the Z direction. The first central side surface 93C is connected to both the first front surface side surface 93A and the first rear surface side surface 93B. The first central side surface 93C is formed as a flat surface along, for example, the YZ plane. The second central side surface 94C is formed between the second front surface side surface 94A and the second rear surface side surface 94B in the Z direction. The second central side surface 94C is connected to both the second front surface side surface 94A and the second rear surface side surface 94B. The second central side surface 94C is formed as a flat surface along the YZ plane, for example.

[0019] As shown in FIG. 2 , the third sealing side surface 95 includes a third front surface side surface 95A continuous with the sealing surface 91, a third back surface side surface 95B continuous with the sealing back surface 92, and a third central side surface 95C. The fourth sealing side surface 96 includes a fourth front surface side surface 96A continuous with the sealing surface 91, a fourth back surface side surface 96B continuous with the sealing back surface 92, and a fourth central side surface 96C. The third front surface side surface 95A and the fourth front surface side surface 96A are inclined in directions away from each other as they extend from the sealing surface 91 toward the sealing back surface 92. The connection portions between the third front surface side surface 95A and the fourth front surface side surface 96A and the sealing surface 91 are curved. The third back surface side surface 95B and the fourth back surface side surface 96B are inclined in directions away from each other as they extend from the sealing back surface 92 toward the sealing surface 91. The connection portions between the third back surface side surface 95B and the fourth back surface side surface 96B and the sealing back surface 92 are curved. The third central side surface 95C is connected to both the third front surface side surface 95A and the third back surface side surface 95B. The third central side surface 95C is formed, for example, as a flat surface along the XZ plane. The fourth central side surface 96C is formed between the fourth front surface side surface 96A and the fourth back surface side surface 96B in the Z direction. The fourth central side surface 96C is connected to both the fourth front surface side surface 96A and the fourth back surface side surface 96B. The fourth central side surface 96C is formed, for example, as a flat surface along the XZ plane.

[0020] The sealing resin 90 is formed, for example, by transfer molding. In one example, the third sealing side surface 95 has a trace (not shown) of the gate of the molding die. This trace is formed when the resin portion located at the gate of the molding die is separated from the sealing resin 90. The trace is formed, for example, on the fourth central side surface 96C of the fourth sealing side surface 96. In one example, as shown in FIG. 3 , the fourth central side surface 96C is partitioned into three regions R1 to R3 in the X direction. The regions R1 to R3 are regions of equal size. Region R1 is a region of the fourth central side surface 96C closer to the second sealing side surface 94, region R3 is a region of the fourth central side surface 96C closer to the first sealing side surface 93, and region R2 is a region between regions R1 and R3 in the X direction. The trace may be provided in region R1. Alternatively, the trace may be provided in region R2. The trace may be provided in region R3.

[0021] The gate trace of the molding die may be formed on the third sealing side surface 95 instead of the fourth sealing side surface 96. In this case, the gate trace is also formed on, for example, the third central side surface 95C of the third sealing side surface 95.

[0022] The surface roughness Rz of each of the sealing surface 91, sealing back surface 92, and first to fourth sealing side surfaces 93 to 96 of the sealing resin 90 is, for example, 5 μm or more and 20 μm or less. In the first embodiment, the surface roughness Rz across the entire surface of each of the sealing surface 91 and sealing back surface 92 is, for example, 5 μm or more and 20 μm or less. Furthermore, the surface roughness Rz across the entire surface of each of the first to fourth front side surfaces 93A to 96A and the first to fourth back side surfaces 93B to 96B of the first to fourth sealing side surfaces 93 to 96 is, for example, 5 μm or more and 20 μm or less. Here, the surface roughness Rz can be expressed as the sum of the height of the highest peak and the depth of the deepest valley of the profile curve over the reference length. In one example, the sealing surface 91, sealing back surface 92, and first to fourth sealing side surfaces 93 to 96 are subjected to a surface roughening treatment, thereby making each surface roughness Rz, for example, 5 μm or more and 20 μm or less. An example of the surface roughening treatment is shot blasting.

[0023] In one example, the surface roughness Rz of each of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 is, for example, 8 μm or more. In one example, the surface roughness Rz of each of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 is, for example, 8 μm or more and 20 μm or less.

[0024] In one example, the surface roughness Rz of the sealing surface 91 and the sealing back surface 92, and the first to fourth front side surfaces 93A to 96A and the first to fourth back side surfaces 93B to 96B may be greater than that of the first to fourth central side surfaces 93C to 95C. In one example, the surface roughness Rz of the sealing surface 91 and the sealing back surface 92, and the first to fourth front side surfaces 93A to 96A and the first to fourth back side surfaces 93B to 96B may be greater than the surface roughness Rz of the surfaces that form the recess 91A.

[0025] In the first embodiment, the surface roughness Rz of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 was 5 μm or more and 20 μm or less, but this is not limited thereto. In one example, the surface roughness Rz of each of the third sealing side surface 95 and the fourth sealing side surface 96 may be less than 5 μm or greater than 20 μm. In another example, the surface roughness Rz of each of the first sealing side surface 93 and the second sealing side surface 94 may be less than 5 μm or greater than 20 μm. In another example, the surface roughness Rz of each of the first to fourth sealing side surfaces 93 to 96 may be less than 5 μm or greater than 20 μm. In another example, the surface roughness Rz of the sealing surface 91 may be less than 5 μm or greater than 20 μm. In short, it is sufficient that the surface roughness Rz of at least one of the sealing front surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 is 5 μm or more and 20 μm or less.

[0026] The sealing resin 90 is made of an insulating material. One example of the insulating material is black epoxy resin. The sealing resin 90 contains sulfur (S) as an additive. By including sulfur, the sealing resin 90 can enhance the adhesive strength between the sealing resin 90 and the first frame 10A and the second frame 10B, which will be described later. On the other hand, if the sealing resin 90 contains sulfur, there is a risk of sulfide corrosion of copper (Cu)-based components in the signal transmission device 10. The sulfur concentration in the sealing resin 90 is set in consideration of the balance between improving the adhesive strength between the sealing resin 90 and the first frame 10A and the second frame 10B and suppressing sulfide corrosion. In one example, the sulfur concentration in the sealing resin 90 is set to 300 μg / g or less.

[0027] As shown in FIG. 1 , the first lead terminals 11 to 14 include first outer lead portions 11B to 14B that protrude outward from the sealing resin 90. In a plan view, the first outer lead portions 11B to 14B protrude from the first sealing side surface 93 in the −X direction. The first outer lead portions 11B to 14B are arranged spaced apart from one another in the Y direction. The first outer lead portions 11B to 14B can be said to be arranged in the longitudinal direction of the sealing resin 90. The first outer lead portions 11B to 14B are arranged in the order of 11B, 12B, 13B, and 14B from the fourth sealing side surface 96 toward the third sealing side surface 95. In other words, the Y direction can be said to be the arrangement direction of the first outer lead portions 11B to 14B. In other words, the Y direction can be said to be the arrangement direction of the first lead terminals 11 to 14. In the first embodiment, the first outer lead portions 11B to 14B have the same shape.

[0028] The second lead terminals 41 to 44 include second outer lead portions 41B to 44B that protrude outward from the sealing resin 90. In a plan view, the second outer lead portions 41B to 44B protrude from the second sealing side surface 94 in the +X direction. The second outer lead portions 41B to 44B are arranged spaced apart from one another in the Y direction. The second outer lead portions 41B to 44B can be said to be arranged in the longitudinal direction of the sealing resin 90. The second outer lead portions 41B to 44B are arranged in the order of 41B, 42B, 43B, and 44B from the third sealing side surface 95 to the fourth sealing side surface 96. In other words, the Y direction can be said to be the arrangement direction of the second outer lead portions 41B to 44B. In other words, the Y direction can be said to be the arrangement direction of the second lead terminals 41 to 44. In the first embodiment, the second outer lead portions 41B to 44B have the same shape.

[0029] The width dimensions (size in the Y direction) of the first outer lead portions 11B to 14B and the width dimensions (size in the Y direction) of the second outer lead portions 41B to 44B are equal to each other. The width dimensions of the first outer lead portions 11B to 14B and the second outer lead portions 41B to 44B are, for example, 0.35 mm or more and 0.51 mm or less. The pitch of the first outer lead portions 11B to 14B and the pitch of the second outer lead portions 41B to 44B are equal to each other. Here, the pitch of the first outer lead portions 11B to 14B can be defined by the center-to-center distance between two of the first outer lead portions 11B to 14B adjacent to each other in the Y direction. The pitch of the second outer lead portions 41B to 44B can be defined by the center-to-center distance between two of the second outer lead portions 41B to 44B adjacent to each other in the Y direction. The pitch of the first outer lead portions 11B to 14B and the pitch of the second outer lead portions 41B to 484 are each, for example, about 1.27 mm.

[0030] 3, the shape of the first outer lead portion 11B and the shape of the second outer lead portion 44B when viewed from the Y direction are the same. Therefore, it can be said that the shapes of the first outer lead portions 11B to 14B and the shapes of the second outer lead portions 41B to 44B are the same.

[0031] The configuration of the second outer lead portions 41B to 44B will be described below. The detailed configuration of the second outer lead portion 44B will be described below, and a detailed description of the second outer lead portions 41B to 43B will be omitted.

[0032] The second outer lead portion 44B includes a protruding portion 44P extending in the +X direction from the second sealing side surface 94, an intermediate portion 44Q extending in the -Z direction from the protruding portion 44P, and a connecting portion 44R extending in the +X direction from the intermediate portion 44Q. A curved first bend is formed between the protruding portion 44P and the intermediate portion 44Q, and a curved second bend is formed between the intermediate portion 44Q and the connecting portion 44R. The connecting portion 44R may be inclined toward the -Z direction as it approaches the +X direction. The acute angle formed by the connecting portion 44R and the X direction is, for example, greater than 0° and equal to or less than 8°.

[0033] As shown in FIG. 4, the second outer lead portion 44B includes an outer lead body 20A made of a metal material. Examples of metal materials include copper and aluminum (Al). The outer lead body 20A has an outer lead surface 21A, an outer lead back surface 22A opposite the outer lead surface 21A, a pair of outer lead side surfaces 23A (see FIG. 5) connecting the outer lead surface 21A and the outer lead back surface 22A, and an outer lead end surface 24A. The outer lead end surface 24A forms the tip surface of the connection portion 44R.

[0034] 5, the pair of outer lead side surfaces 23A are formed in a curved concave shape. In one example, the deepest position of the curved concave outer lead side surface 23A (the position where the pair of outer lead side surfaces 23A are closest to each other in the Y direction) is closer to the outer lead back surface 22A than the center in the Z direction of the outer lead end surface 24A.

[0035] The outer lead body 20A has a backside curved portion 25 formed at the connection portion between the outer lead back surface 22A and the outer lead side surface 23A. The backside curved portion 25 curves upward (in the +Z direction) as it moves outward in the width direction (Y direction) of the outer lead body 20A. Therefore, both ends of the outer lead back surface 22A in the Y direction are curved upward (in the +Z direction) as they move toward the pair of outer lead side surfaces 23A.

[0036] 4 and 5, the second outer lead portion 44B includes a plating layer 26 that covers the outer lead body 20A. More specifically, the plating layer 26 covers the entire surfaces of the outer lead front surface 21A, the outer lead back surface 22A, and the outer lead side surface 23A, as well as a part of the outer lead end surface 24A.

[0037] 5, the plating layer 26 includes an end-face plating layer 27 that covers the outer lead end face 24A continuously from the outer lead back surface 22A toward the outer lead front surface 21A. The end-face plating layer 27 is located apart in the Z direction from the edge of the outer lead end face 24A on the outer lead front surface 21A side. Therefore, the outer lead end face 24A is divided into a region covered by the end-face plating layer 27 and a main body exposed region 28 that is not covered by the end-face plating layer 27. In the main body exposed region 28, the outer lead main body 20A is exposed.

[0038] The end surface plating layer 27 extends from the outer lead back surface 22A to a position closer to the outer lead front surface 21A than the center of the outer lead end surface 24A in the Z direction. In one example, the end surface plating layer 27 covers approximately two-thirds of the outer lead end surface 24A in the Z direction. The leading edge 27A of the end surface plating layer 27 has a shape that becomes uneven in the Z direction as it extends in the Y direction. In one example, the leading edge 27A of the end surface plating layer 27 has a recess 27B near the center in the Y direction.

[0039] The shape of the leading edge 27A of the end surface plating layer 27 can be changed as desired. For example, the leading edge 27A of the end surface plating layer 27 may include a plurality of recesses 27B. For another example, the recesses 27B may be omitted from the leading edge 27A of the end surface plating layer 27.

[0040] Furthermore, the position of the leading edge 27A of the end surface plating layer 27 in the Z direction can be changed as desired. In one example, the end surface plating layer 27 may cover approximately one-half of the outer lead end surface 24A in the Z direction. In another example, the end surface plating layer 27 may cover approximately one-quarter of the outer lead end surface 24A in the Z direction. In another example, the end surface plating layer 27 may cover approximately three-quarters of the outer lead end surface 24A in the Z direction. In this way, the end surface plating layer 27 may cover a range of at least one-quarter but not more than three-quarters of the outer lead end surface 24A in the Z direction.

[0041] The configuration of the first outer lead portions 11B to 14B will be described below. The detailed configuration of the first outer lead portion 11B will be described below, and a detailed description of the configuration of the first outer lead portions 12B to 14B will be omitted.

[0042] 3, the first outer lead portion 11B includes a protruding portion 11P extending in the −X direction from the first sealing side surface 93, an intermediate portion 11Q extending in the −Z direction from the protruding portion 11P, and a connecting portion 11R extending in the −X direction from the intermediate portion 11Q. A curved first bent portion is formed between the protruding portion 11P and the intermediate portion 11Q, and a curved second bent portion is formed between the intermediate portion 11Q and the connecting portion 11R. The connecting portion 11R may be inclined toward the −Z direction as it approaches the −X direction. The acute angle formed by the connecting portion 11R and the X direction is, for example, greater than 0° and equal to or less than 8°.

[0043] Like the second outer lead portion 44B, the first outer lead portion 11B includes an outer lead body 20A and a plating layer 26 covering the outer lead body 20A (see FIG. 4 for both). Also, like the second outer lead portion 44B, the plating layer 26 of the first outer lead portion 11B includes an end face plating layer 27 (see FIG. 5).

[0044] A method for forming such an end face plating layer 27 will be described below. A first lead frame (not shown) constituting the second outer lead portion 44B and a second lead frame (not shown) constituting the first outer lead portion 11B are cut using a die (punch). Cutting with a die can be performed on the first lead frame and the second lead frame before forming.

[0045] Here, both the first lead frame and the second lead frame before being cut by the mold include an outer lead body 20A (see Figure 4) and a plating layer 26 covering the outer lead surface 21A, the outer lead back surface 22A, and a pair of outer lead side surfaces 23A.

[0046] The mold cuts both the first lead frame and the second lead frame in the +Z direction, thereby forming the first outer lead portion 11B and the second outer lead portion 44B, each including the outer lead end surface 24A.

[0047] The corners of the cut portion of the mold are rounded. In other words, the corners are R-chamfered. When the mold having such corners is moved in the +Z direction so as to cut both the first lead frame and the second lead frame, the plating layer 26 on the back surface 22A of the outer lead is pulled toward the outer lead surface 21A, thereby forming an end surface plating layer 27 (see FIG. 5 ) on the outer lead end surface 24A.

[0048] Furthermore, because the end surface plating layer 27 is formed on both the first outer lead portion 11B and the second outer lead portion 44B, when the signal transmission device 10 is mounted on a circuit board PCB using a conductive bonding material SD such as solder paste or silver (Ag) paste, as shown in FIG. 6 , the bonding area between the first outer lead portion 11B and the second outer lead portion 44B and the conductive bonding material SD can be increased. More specifically, the outer lead back surface 22A of the connection portion 11R of the first outer lead portion 11B, a pair of outer lead side surfaces 23A (see FIG. 5 ), and the outer lead back surface 22A at the end of the intermediate portion 11Q on the connection portion 11R side are all bonded to the conductive bonding material SD. In addition, the end surface plating layer 27 of the first outer lead portion 11B bonds the outer lead end surface 24A (see FIG. 5 ) of the first outer lead portion 11B to the conductive bonding material SD. The bonding area between the first outer lead portion 11B and the conductive bonding material SD is increased by the bonding area between this end-face plating layer 27 and the conductive bonding material SD. The outer lead back surface 22A of the connection portion 44R of the second outer lead portion 44B, the pair of outer lead side surfaces 23A, and the outer lead back surface 22A of the end of the intermediate portion 44Q on the connection portion 44R side are all bonded to the conductive bonding material SD. Additionally, the end-face plating layer 27 of the second outer lead portion 44B bonds the outer lead end surface 24A of the second outer lead portion 44B to the conductive bonding material SD. The bonding area between the second outer lead portion 44B and the conductive bonding material SD is increased by the bonding area between this end-face plating layer 27 and the conductive bonding material SD. Additionally, the conductive bonding material SD bonded to the end-face plating layers 27 of the first outer lead portion 11B and the second outer lead portion 44B forms fillets. Although not shown in Figure 6, the bonding area with the conductive bonding material SD is also increased and fillets are formed for the first outer lead portions 12B to 14B and the second outer lead portions 41B to 43B (both see Figure 1).

[0049] [Internal Structure of Signal Transmission Device] Fig. 7 shows the overall internal structure of the signal transmission device 10. In Fig. 7, Fig. 8, and Fig. 10, the sealing resin 90 is indicated by a two-dot chain line to facilitate understanding of the drawings.

[0050] 7, signal transmission device 10 includes a first frame 10A, a second frame 10B, a first chip 60 mounted on first frame 10A, and a second chip 70 mounted on second frame 10B. Sealing resin 90 seals first chip 60 and second chip 70 and also partially seals first frame 10A and second frame 10B.

[0051] The first frame 10A includes first lead terminals 11 to 14. The first frame 10A further includes a first die pad 30. The first lead terminals 11 to 14 and the first die pad 30 are formed of the same metal material. Examples of the metal material include copper and aluminum.

[0052] Of the first lead terminals 11 to 14, the first lead terminal 14 arranged at the end closer to the third sealing side surface 95 in the Y direction is connected to the first die pad 30. In one example, the first lead terminal 14 and the first die pad 30 are integrated. The first lead terminals 11 to 13 are arranged closer to the first sealing side surface 93 than the first die pad 30 and are spaced apart from the first die pad 30.

[0053] The first die pad 30 is disposed closer to the third sealing side surface 95 in the Y direction than the center of the sealing resin 90. More specifically, the distance in the Y direction between the first die pad 30 and the third sealing side surface 95 is smaller than the distance in the Y direction between the first die pad 30 and the fourth sealing side surface 96. When viewed in the X direction, the first die pad 30 has a size in the Y direction such that it overlaps all of the first lead terminals 11 and 12 and partially overlaps the first lead terminal 13. The first die pad 30 is disposed closer to the first sealing side surface 93 in the X direction. More specifically, the distance in the X direction between the first die pad 30 and the first sealing side surface 93 is smaller than the distance in the X direction between the first die pad 30 and the second sealing side surface 94.

[0054] The first chip 60 mounted on the first die pad 30 is formed in a flat plate shape. The shape of the first chip 60 in a plan view is approximately square. The first chip 60 is mounted on the first die pad 30 with a first conductive bonding material SD1. More specifically, the first chip 60 is die-bonded to the first die pad 30.

[0055] The first chip 60 is disposed closer to the first sealing side surface 93 in the X direction relative to the first die pad 30. More specifically, in a plan view, the distance in the X direction between the first chip 60 and the edge closer to the first sealing side surface 93 of both end edges of the first die pad 30 in the X direction is smaller than the distance in the X direction between the first chip 60 and the edge closer to the second sealing side surface 94 of the first die pad 30. The first chip 60 is disposed in the center of the first die pad 30 in the Y direction.

[0056] The second frame 10B is disposed at a distance from the first frame 10A. The second frame 10B includes second lead terminals 41 to 44. The second frame 10B further includes a second die pad 50. The second lead terminals 41 to 44 and the second die pad 50 are formed of the same metal material. Examples of metal materials include copper and aluminum. In one example, the second lead terminals 41 to 44 and the second die pad 50 are formed of the same metal material as the first lead terminals 11 to 14 and the first die pad 30.

[0057] Of the multiple second lead terminals 41 to 44, the second lead terminal 44 that is arranged at the end closer to the fourth sealing side surface 96 in the Y direction is connected to the second die pad 50. In one example, the second lead terminal 44 and the second die pad 50 are integrated. The second lead terminals 41 to 43 are arranged closer to the second sealing side surface 94 than the second die pad 50 and are spaced apart from the second die pad 50.

[0058] The second die pad 50 is disposed in the Y direction closer to the fourth sealing side surface 96 relative to the first die pad 30 and spaced apart from the first die pad 30. In other words, the Y direction can be said to be the arrangement direction of the first die pad 30 and the second die pad 50. The first die pad 30 and the second die pad 50 can also be said to be arranged in the longitudinal direction of the sealing resin 90. The arrangement direction of the first die pad 30 and the second die pad 50 coincides with the arrangement direction of the first lead terminals 11-14 and the arrangement direction of the second lead terminals 41-44.

[0059] The second chip 70 mounted on the second die pad 50 is formed in a flat plate shape. In plan view, the second chip 70 has a rectangular shape with the X direction as the longitudinal direction and the Y direction as the lateral direction. The size of the second chip 70 in the X direction is smaller than the size of the first chip 60 in the X direction. The size of the second chip 70 in the Y direction is smaller than the size of the first chip 60 in the Y direction. The second chip 70 is mounted on the second die pad 50 by a second conductive bonding material SD2. More specifically, the second chip 70 is die-bonded to the second die pad 50. Note that, for example, solder paste or silver paste is used as both the first conductive bonding material SD1 and the second conductive bonding material SD2.

[0060] The second chip 70 is disposed closer to the first die pad 30 with respect to the second die pad 50. More specifically, in a plan view, the distance in the Y direction between the second chip 70 and one of the Y-direction edges of the second chip 70 that is closer to the first die pad 30 is smaller than the distance in the Y direction between the second chip 70 and one of the Y-direction edges of the second chip 70 that is closer to the fourth sealing side surface 96. The second chip 70 is disposed closer to the second sealing side surface 94 with respect to the second die pad 50. More specifically, in a plan view, the distance in the X direction between the second chip 70 and one of the X-direction edges of the second die pad 50 that is closer to the second sealing side surface 94 is smaller than the distance in the X direction between the second chip 70 and the end face of the second die pad 50 that is closer to the first sealing side surface 93. The position of the second chip 70 with respect to the second die pad 50 can be changed as desired. In one example, the second chip 70 may be disposed at the center of the second die pad 50 in the Y direction.

[0061] The signal transmission device 10 further includes conductive members 10D and 10E. The conductive members 10D and 10E are formed, for example, from the same metal material as the first frame 10A and the second frame 10B. The conductive members 10D and 10E are arranged spaced apart from each other. Furthermore, the conductive members 10D and 10E are arranged spaced apart from both the first frame 10A and the second frame 10B. Therefore, both the conductive members 10D and 10E are in an electrically floating state.

[0062] The conductive members 10D and 10E are arranged in positions overlapping each other when viewed from the Y direction. The conductive members 10D and 10E are arranged in the center of the sealing resin 90 in the Y direction. The conductive member 10D is arranged closer to the third sealing side surface 95 than the first frame 10A and the second frame 10B. The conductive member 10D is exposed from the third sealing side surface 95. More specifically, a recess 95D is formed in the portion of the third sealing side surface 95 from which the conductive member 10D is exposed. The recess 95D is formed in the center of the third sealing side surface 95 in the Z direction. In other words, the recess 95D is provided in the third central side surface 95C (see FIG. 2). The recess 95D is recessed from the third sealing side surface 95 toward the fourth sealing side surface 96. The recess 95D opens toward the -Y direction. The conductive member 10D forms the bottom surface of the recess 95D.

[0063] The conductive member 10E is disposed closer to the fourth sealing side surface 96 relative to the first frame 10A and the second frame 10B. The conductive member 10E is exposed from the fourth sealing side surface 96. More specifically, a recess 96D is formed in the portion of the fourth sealing side surface 96 from which the conductive member 10E is exposed. The recess 96D is formed in the center of the fourth sealing side surface 96 in the Z direction. In other words, the recess 96D is provided in the fourth central side surface 96C (see FIG. 2 ). The recess 96D is recessed from the fourth sealing side surface 96 toward the third sealing side surface 95. The recess 96D opens toward the +Y direction. The conductive member 10E forms the bottom surface of the recess 96D.

[0064] The relative positions of the first lead terminals 11 to 14, the first die pad 30, the second lead terminals 41 to 44, the second die pad 50, the first chip 60, and the second chip 70 will be described. The first die pad 30 is disposed closer to the first sealing side surface 93 than the second lead terminals 41 to 44 in the X direction and spaced apart from the second lead terminals 41 to 44. When viewed from the X direction, the first die pad 30 is disposed in a position overlapping with the second lead terminals 41 and 42. The first die pad 30 is disposed closer to the third sealing side surface 95 than the second lead terminal 43. When viewed from the X direction, the first die pad 30 is disposed closer to the third sealing side surface 95 than the second lead terminal 43.

[0065] The second die pad 50 is disposed closer to the fourth sealing side surface 96 than the center of the sealing resin 90 in the X direction. In the first embodiment, the size of the second die pad 50 in the X direction is equal to the size of the first die pad 30 in the X direction. The size of the second die pad 50 in the Y direction is smaller than the size of the first die pad 30 in the X direction. In plan view, the second die pad 50 is disposed so as to be partially shifted in the X direction relative to the first die pad 30. In plan view, the second die pad 50 is located closer to the second sealing side surface 94 than the first die pad 30. In other words, in plan view, the edge of the second die pad 50 closer to the first sealing side surface 93 of both end edges in the X direction is located closer to the second sealing side surface 94 than the edge of the first die pad 30 closer to the first sealing side surface 93 of both end edges in the X direction. In a planar view, the edge of the second die pad 50 in the X direction that is closer to the second sealing side surface 94 is located closer to the second sealing side surface 94 than the edge of the first die pad 30 in the X direction that is closer to the second sealing side surface 94.

[0066] The second die pad 50 is disposed closer to the second sealing side surface 94 in the X direction than the first lead terminals 11 to 14 and spaced apart from the first lead terminals 11 to 14. When viewed from the X direction, the second die pad 50 is disposed in a position that partially overlaps the first lead terminals 11 and 12. When viewed from the X direction, the second die pad 50 is disposed in a position that overlaps the second lead terminal 43.

[0067] The shortest distance between the first die pad 30 and the second die pad 50 in the Y direction is greater than the shortest distance between the first die pad 30 and the first lead terminal 13 in the Y direction. The distance between the first die pad 30 and the second die pad 50 in the Y direction is greater than the shortest distance between the second die pad 50 and the second lead terminal 43 in the Y direction.

[0068] The shortest distance between the first die pad 30 and the second lead terminal 41 in the X direction is greater than the shortest distance between the first die pad 30 and the second die pad 50 in the Y direction. The shortest distance between the first die pad 30 and the second lead terminal 42 in the X direction is greater than the shortest distance between the first die pad 30 and the second die pad 50 in the Y direction. In the example of Fig. 7, the shortest distance between the first die pad 30 and the second die pad 50 in the Y direction is equal to the shortest distance between the first die pad 30 and the second lead terminal 42 in the X direction.

[0069] The shortest distance in the X direction between the second die pad 50 and the first lead terminal 11 is greater than the shortest distance in the Y direction between the first die pad 30 and the second die pad 50. In the example of Fig. 7, the shortest distance in the X direction between the first die pad 30 and the second lead terminal 42 is equal to the shortest distance in the X direction between the first die pad 30 and the second lead terminal 41.

[0070] Note that each of the above-mentioned shortest distances can be changed as desired. For example, the shortest distance between the first die pad 30 and the second die pad 50 in the Y direction may be equal to the shortest distance between the first die pad 30 and the first lead terminal 13 in the Y direction. The shortest distance between the first die pad 30 and the second die pad 50 in the Y direction may be greater than the shortest distance between the first die pad 30 and the first lead terminal 13 in the Y direction. The shortest distance between the first die pad 30 and the second die pad 50 in the Y direction may be equal to the shortest distance between the first die pad 30 and the second lead terminal 42 in the X direction. The shortest distance between the first die pad 30 and the second die pad 50 in the Y direction may be greater than the shortest distance between the first die pad 30 and the second lead terminal 42 in the X direction. The shortest distance between the first die pad 30 and the second die pad 50 in the Y direction may be equal to the shortest distance between the second die pad 50 and the first lead terminal 11 in the X direction. The shortest distance between the first die pad 30 and the second die pad 50 in the Y direction may be greater than the shortest distance between the second die pad 50 and the first lead terminal 11 in the X direction. In one example, the shortest distance between the first die pad 30 and the second die pad 50 in the Y direction may be different from the shortest distance between the first die pad 30 and the second lead terminal 42 in the X direction. In another example, the shortest distance between the first die pad 30 and the second lead terminal 42 in the X direction may be different from the shortest distance between the first die pad 30 and the second lead terminal 41 in the X direction.

[0071] When viewed from the Y direction, the first chip 60 is disposed in a position that partially overlaps the second chip 70. In a plan view, the first chip 60 is disposed closer to the first sealing side surface 93 than the second chip 70. More specifically, of both X-direction edges of the first chip 60, the edge closer to the first sealing side surface 93 is disposed closer to the first sealing side surface 93 than the edge closer to the first sealing side surface 93 than the edge closer to the first sealing side surface 93 than the edge closer to the first sealing side surface 93 than the edge closer to the first sealing side surface 94 than the edge closer to the first sealing side surface 94 than the edge closer to the first sealing side surface 93 than the edge closer to the second sealing side surface 94 than the edge closer to the first sealing side surface 93 than the edge closer to the second sealing side surface 94 than the edge closer to the second sealing side surface 94 than the edge closer to the first sealing side surface 93 than the edge closer to the second sealing side surface 94 than the edge closer to the second sealing side surface 94 than the edge closer to the first sealing side surface 93 than the edge closer to the second sealing side surface 94 than the edge closer to the second sealing side surface 94 than the edge closer to the X-direction.

[0072] The detailed planar structure of the first die pad 30 will be described. As shown in FIG. 7 , the shape of the first die pad 30 in plan view is a rectangle with the X direction as the longitudinal direction and the Y direction as the lateral direction. In plan view, the first die pad 30 has three corners. A first curved surface 31 is formed in a corner portion of the first die pad 30 that is closer to the first sealing side surface 93 and the fourth sealing side surface 96. A second curved surface 32 is formed in a corner portion of the first die pad 30 that is closer to the second sealing side surface 94 and the third sealing side surface 95. A third curved surface 33 is formed in a corner portion of the first die pad 30 that is closer to the second sealing side surface 94 and the fourth sealing side surface 96.

[0073] The arc length of the third curved surface 33 is longer than the arc length of the first curved surface 31. It can be said that the radius of curvature of the third curved surface 33 is larger than the radius of curvature of the first curved surface 31. In one example, the arc length of the third curved surface 33 is two times or more the arc length of the first curved surface 31. In one example, the arc length of the third curved surface 33 is three times or more the arc length of the first curved surface 31. In one example, the arc length of the third curved surface 33 is four times or more the arc length of the first curved surface 31.

[0074] The arc length of the third curved surface 33 is longer than the arc length of the second curved surface 32. It can be said that the radius of curvature of the third curved surface 33 is larger than the radius of curvature of the second curved surface 32. In one example, the arc length of the third curved surface 33 is two or more times the arc length of the second curved surface 32. In one example, the arc length of the third curved surface 33 is three or more times the arc length of the second curved surface 32. In one example, the arc length of the third curved surface 33 is four or more times the arc length of the second curved surface 32.

[0075] In this way, the arc length of the third curved surface 33 provided at the corner portion of the first die pad 30 facing the second die pad 50 in the Y direction is longer than the arc length of each of the first curved surface 31 and the second curved surface 32 provided at the corner portion of the first die pad 30 that does not face the second die pad 50.

[0076] 7 , the arc length of the first curved surface 31 is equal to the arc length of the second curved surface 32. Note that the arc lengths of the first curved surface 31 and the second curved surface 32 may be different from each other. Furthermore, the arc length of the third curved surface 33 can be changed as desired within a range longer than the arc lengths of the first curved surface 31 and the second curved surface 32.

[0077] As shown in FIG. 8 , the first frame 10A includes a first connection portion 34 that connects the first die pad 30 and the first lead terminal 14. The first connection portion 34 is provided at one of the four corner portions of the first die pad 30, which is closer to the first sealing side surface 93 and the third sealing side surface 95. In plan view, the first connection portion 34 is provided at a position closer to the first sealing side surface 93 than the first chip 60. In plan view, the first connection portion 34 has a substantially rectangular shape with the Y direction as the longitudinal direction and the X direction as the lateral direction. The first connection portion 34 extends toward the third sealing side surface 95. That is, in plan view, the first connection portion 34 has a portion that protrudes toward the third sealing side surface 95 relative to the first die pad 30. This protruding portion is connected to the first lead terminal 14. In this manner, the first lead terminal 14 is positioned closer to the third sealing side surface 95 relative to the first die pad 30. Moreover, the first lead terminal 14 is disposed at a position where it partially overlaps with the first die pad 30 when viewed from the X direction.

[0078] A curved recess 35A is provided at the connection portion between the protruding portion of the first connection portion 34 and the first die pad 30. A curved recess 35B is provided at the connection portion between the first die pad 30 and a portion of the first connection portion 34 that overlaps with the first die pad 30 when viewed from the X direction. In addition, a curved protrusion 35C is provided at a corner portion of the first connection portion 34 closer to the first sealing side surface 93. In the example shown in Fig. 8, the arc length of each of the curved recesses 35A and 35B is longer than the arc length of the curved protrusion 35C.

[0079] 7, in the first embodiment, the shapes of the first lead terminals 11 to 14 and the second lead terminals 41 to 44 are point-symmetric with respect to a virtual line extending along the Y direction at the center of the sealing resin 90 in the X direction.

[0080] 8, the first lead terminals 11 to 14 include first inner lead portions 11A to 14A provided in the sealing resin 90 and the above-mentioned first outer lead portions 11B to 14B. The configuration of the first inner lead portions 11A to 14A will be described below.

[0081] The first inner lead portion 11A has an L-shape in plan view. The first inner lead portion 11A includes a wire connection portion 11AA and a lead connection portion 11AB extending from the wire connection portion 11AA toward the first sealing side surface 93.

[0082] The lead connection portion 11AB extends in the X direction in a plan view. The lead connection portion 11AB is connected to the first outer lead portion 11B. The wire connection portion 11AA is a portion that extends from the lead connection portion 11AB in the -Y direction. The shape of the wire connection portion 11AA in a plan view is a substantially rectangular shape with the Y direction as the longitudinal direction and the X direction as the lateral direction. The width dimension (size in the X direction) of the wire connection portion 11AA is smaller than the width dimension (size in the Y direction) of the lead connection portion 11AB. In one example, the width dimension of the wire connection portion 11AA is between 1 / 3 and 1 / 2 of the width dimension of the lead connection portion 11AB.

[0083] Bent portions 11AC and 11AD are provided between the wire connection portion 11AA and the lead connection portion 11AB. The bent portion 11AC closer to the third sealing side surface 95 and the bent portion 11AD closer to the fourth sealing side surface 96 are both curved in plan view. The arc of the bent portion 11AC is larger than the arc of the bent portion 11AD. Therefore, the width of the lead connection portion 11AB increases toward the wire connection portion 11AA.

[0084] The first inner lead portion 12A has an L-shape in plan view. The first inner lead portion 12A includes a wire connection portion 12AA and a lead connection portion 12AB extending from the wire connection portion 12AA toward the first sealing side surface 93.

[0085] The lead connection portion 12AB extends in the X direction in a plan view. The lead connection portion 12AB is connected to the first outer lead portion 12B. The wire connection portion 12AA is a portion that extends from the lead connection portion 12AB in the -Y direction. The shape of the wire connection portion 12AA in a plan view is a substantially rectangular shape with the Y direction as the longitudinal direction and the X direction as the lateral direction. The width dimension (size in the X direction) of the wire connection portion 12AA is smaller than the width dimension (size in the Y direction) of the lead connection portion 12AB. In one example, the width dimension of the wire connection portion 12AA is between 1 / 3 and 1 / 2 of the width dimension of the lead connection portion 12AB.

[0086] Bent portions 12AC and 12AD are provided between the wire connection portion 12AA and the lead connection portion 12AB. The bent portion 12AC closer to the third sealing side surface 95 is formed in a curved shape in a plan view. The bent portion 12AD closer to the fourth sealing side surface 96 is formed as an inclined surface in a plan view. This inclined surface is inclined toward the first sealing side surface 93 as it moves from the third sealing side surface 95 to the fourth sealing side surface 96 in a plan view.

[0087] The first inner lead portion 13A has an L-shape in plan view. The first inner lead portion 13A includes a wire connection portion 13AA and a lead connection portion 13AB extending from the wire connection portion 13AA toward the first sealing side surface 93.

[0088] The lead connection portion 13AB extends in the X direction in a plan view. The lead connection portion 13AB is connected to the first outer lead portion 13B. The wire connection portion 13AA extends in the -Y direction from the lead connection portion 13AB. The shape of the wire connection portion 13AA in a plan view is a substantially rectangular shape with the Y direction as the longitudinal direction and the X direction as the lateral direction. The width dimension (size in the X direction) of the wire connection portion 13AA is smaller than the width dimension (size in the Y direction) of the lead connection portion 13AB. In one example, the width dimension of the wire connection portion 13AA is between 1 / 3 and 1 / 2 of the width dimension of the lead connection portion 13AB. The size in the Y direction of the wire connection portion 13AA is smaller than the sizes in the Y direction of the wire connection portions 11AA and 12AA.

[0089] Bent portions 13AC and 13AD are provided between the wire connection portion 13AA and the lead connection portion 13AB. The bent portion 13AC closer to the third sealing side surface 95 is curved in plan view. The bent portion 13AD closer to the fourth sealing side surface 96 is formed as an inclined surface in plan view. This inclined surface is inclined toward the first sealing side surface 93 as it moves from the third sealing side surface 95 to the fourth sealing side surface 96 in plan view.

[0090] The first inner lead portion 14A is connected to the first connection portion 34. The first inner lead portion 14A is disposed closer to the third sealing side surface 95 than the center of the first connection portion 34 in the Y direction. The first inner lead portion 14A extends along the X direction. The width dimension (size in the Y direction) of the first inner lead portion 14A is smaller than the size of the first connection portion 34 in the Y direction.

[0091] In this way, the lead connection portions 11AB to 13AB correspond to the "first portion of the first lead terminal," and the wire connection portions 11AA to 13AA correspond to the "second portion of the first lead terminal." The X direction in which the lead connection portions 11AB to 13AB extend corresponds to the "second direction," and the Y direction in which the wire connection portions 11AA to 13AA extend corresponds to the "first direction." In the first embodiment, the wire connection portions 11AA to 13AA extend in a direction perpendicular to the direction in which the lead connection portions 11AB to 13AB extend in a plan view, but this is not limited to this. The wire connection portions 11AA to 13AA may extend in any direction intersecting the direction in which the lead connection portions 11AB to 13AB extend in a plan view. In other words, the second direction is not limited to a direction perpendicular to the first direction in a plan view, but may be any direction intersecting the first direction.

[0092] Next, the detailed cross-sectional structures of the wire connection portions 11AA-13AA of the first inner lead portions 11A-13A will be described. Figure 9 shows the cross-sectional structure of the wire connection portion 11AA of the first inner lead portion 11A, taken along line F10-F10. The cross-sectional structures of the wire connection portions 12AA, 13AA of the first inner lead portions 12A, 13A are similar to the cross-sectional structure of the wire connection portion 11AA, and therefore will not be described in detail.

[0093] 9, the inner lead body 20B of the wire connection portion 11AA has an inner lead surface 21B, an inner lead back surface 22B opposite the inner lead surface 21B, and an inner lead side surface 23B connecting the inner lead surface 21B and the inner lead back surface 22B. The inner lead side surface 23B includes an opposing surface 24B facing the second die pad 50 (see FIG. 7). The inner lead surface 21B is the surface to which a first lead wire WB (described later) is bonded, and faces the same side as the sealing surface 91 (see FIG. 1).

[0094] In the cross-sectional view of Fig. 9, the facing surface 24B is formed in a concave shape that is recessed away from the second die pad 50. The facing surface 24B is recessed from both the end on the inner lead front surface 21B side and the end on the inner lead back surface 22B side toward the center of the facing surface 24B in the Z direction. In one example, the deepest position of the concave facing surface 24B is at a position approximately one-third the thickness of the wire connection portion 12AA from the inner lead back surface 22B. Note that the shape of the facing surface 24B in the cross-sectional view of Fig. 9 can be changed as desired.

[0095] A plating layer 29 is formed on the inner lead surface 21B. The plating layer 29 is formed of a material containing silver, for example. The plating layer 29 is formed over substantially the entire inner lead surface 21B in the wire connection portion 11AA. The thickness of the plating layer 29 is thinner than the thickness of the inner lead body 20B in the wire connection portion 11AA.

[0096] An end surface 29A of the plating layer 29 closer to the opposing surface 24B is formed at a position closer to the lead connection portion 12AB (see FIG. 8) than the edge of the inner lead surface 21B closer to the opposing surface 24B. In other words, the plating layer 29 does not cover the end surface of the inner lead surface 21B closer to the opposing surface 24B. As a result, the end of the inner lead surface 21B, including the edge closer to the opposing surface 24B, is in contact with the sealing resin 90 (see FIG. 1).

[0097] End surface 29A of plating layer 29 is inclined so as to move away from the edge of inner lead surface 21B closer to opposing surface 24B as it moves from the front surface to the back surface of plating layer 29. In one example, the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to opposing surface 24B is, for example, equal to or greater than the thickness of plating layer 29. Note that the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to opposing surface 24B can be changed as desired.

[0098] Furthermore, plating layer 29 does not cover opposing surface 24B of wire connection portion 11AA. Therefore, opposing surface 24B is in contact with sealing resin 90. Although not shown, plating layer 29 does not cover the edge of wire connection portion 11AA that is closer to first sealing side surface 93 in plan view. Therefore, the side of inner lead side surface 23B that faces first sealing side surface 93 is not covered by plating layer 29 and is in contact with sealing resin 90.

[0099] Although not shown, the plating layer 29 does not cover the leading edge of the wire connection portion 11AA in plan view. Therefore, the leading end surface of the inner lead side surface 23B (the side of the inner lead side surface 23B facing the third sealing side surface 95) is not covered by the plating layer 29 and is in contact with the sealing resin 90.

[0100] The configuration of the second die pad 50 will be described. As shown in FIG. 7 , the shape of the second die pad 50 in plan view is a rectangle with the X direction as the longitudinal direction and the Y direction as the lateral direction. The ratio of the size of the second die pad 50 in the X direction to the size of the Y direction is greater than the ratio of the size of the first die pad 30 in the X direction to the size of the Y direction. In other words, the shape of the second die pad 50 in plan view is longer and thinner in the X direction than the first die pad 30. In plan view, the second die pad 50 has three corners. A first curved surface 51 is formed in a corner portion of the second die pad 50 that is closer to the second sealing side surface 94 and the third sealing side surface 95. A second curved surface 52 is formed in a corner portion of the second die pad 50 that is closer to the first sealing side surface 93 and the fourth sealing side surface 96. A third curved surface 53 is formed in a corner portion of the second die pad 50 that is closer to the first sealing side surface 93 and the third sealing side surface 95.

[0101] The arc length of the third curved surface 53 is longer than the arc length of the first curved surface 51. It can be said that the radius of curvature of the third curved surface 53 is larger than the radius of curvature of the first curved surface 51. In one example, the arc length of the third curved surface 53 is two or more times the arc length of the first curved surface 51. In one example, the arc length of the third curved surface 53 is three or more times the arc length of the first curved surface 51. In one example, the arc length of the third curved surface 53 is four or more times the arc length of the first curved surface 51.

[0102] The arc length of the third curved surface 53 is longer than the arc length of the second curved surface 52. It can be said that the radius of curvature of the third curved surface 53 is larger than the radius of curvature of the second curved surface 52. In one example, the arc length of the third curved surface 53 is at least twice the arc length of the second curved surface 52. In one example, the arc length of the third curved surface 53 is at least three times the arc length of the second curved surface 52. In one example, the arc length of the third curved surface 53 is at least four times the arc length of the second curved surface 52.

[0103] In this way, the arc length of the third curved surface 53 provided at the corner portion of the second die pad 50 facing the first die pad 30 in the Y direction is longer than the arc lengths of the first curved surface 51 and the second curved surface 52 provided at the corner portion of the second die pad 50 not facing the first die pad 30. Note that the arc length of the third curved surface 53 can be changed as desired within a range longer than the arc lengths of the first curved surface 51 and the second curved surface 52.

[0104] 7, the arc length of the first curved surface 51 is equal to the arc length of the second curved surface 52. Note that the arc length of the first curved surface 51 and the arc length of the second curved surface 52 may be different from each other.

[0105] As shown in FIG. 10 , the second frame 10B includes a second connection portion 54 that connects the second die pad 50 and the second lead terminal 44. The second connection portion 54 is provided at one of the four corner portions of the second die pad 50, closer to the second sealing side surface 94 and the fourth sealing side surface 96. In plan view, the second connection portion 54 is provided closer to the second sealing side surface 94 than the second chip 70. In plan view, the second connection portion 54 has a substantially rectangular shape with the Y direction as the longitudinal direction and the X direction as the lateral direction. The second connection portion 54 extends toward the fourth sealing side surface 96. That is, in plan view, the second connection portion 54 has a portion that protrudes toward the fourth sealing side surface 96 relative to the second die pad 50. This protruding portion is connected to the second lead terminal 44. In this manner, the second lead terminal 44 is positioned closer to the fourth sealing side surface 96 relative to the second die pad 50. The second lead terminal 44 is disposed at a position where it partially overlaps with the second die pad 50 when viewed from the X direction.

[0106] A curved recess 55A is provided at the connection portion between the protruding portion of the second connection portion 54 and the second die pad 50. A curved recess 55B is provided at the connection portion between the second die pad 50 and the portion of the second connection portion 54 that overlaps with the second die pad 50 when viewed from the X direction. In addition, a curved protrusion 55C is provided at a corner portion of the second connection portion 54 closer to the second sealing side surface 94. In the example shown in Fig. 10, the arc length of each of the curved recesses 55A and 55B is longer than the arc length of the curved protrusion 55C.

[0107] The following describes the detailed configuration of each of the second lead terminals 41 to 44. As shown in Fig. 10, the second lead terminals 41 to 44 include second inner lead portions 41A to 44A provided in the sealing resin 90 and the above-mentioned second outer lead portions 41B to 44B. The following describes the configuration of the second inner lead portions 41A to 44A.

[0108] The second inner lead portion 41A has an L-shape in plan view. The second inner lead portion 41A includes a wire connection portion 41AA and a lead connection portion 41AB extending from the wire connection portion 41AA toward the second sealing side surface 94. The lead connection portion 41AB is connected to the second outer lead portion 41B.

[0109] The wire connection portion 41AA extends from the lead connection portion 41AB in the +Y direction. The wire connection portion 41AA has a generally rectangular shape in plan view, with the Y direction as its longitudinal direction and the X direction as its transverse direction. The width of the wire connection portion 41AA (size in the X direction) is smaller than the width of the lead connection portion 41AB (size in the Y direction). In one example, the width of the wire connection portion 41AA is between 1 / 3 and 1 / 2 of the width of the lead connection portion 41AB.

[0110] Bent portions 41AC and 41AD are provided between the wire connection portion 41AA and the lead connection portion 41AB. The bent portion 41AC closer to the fourth sealing side surface 96 and the bent portion 41AD closer to the third sealing side surface 95 are both curved in plan view. The arc of the bent portion 41AC is larger than the arc of the bent portion 41AD. Therefore, the width of the lead connection portion 41AB increases toward the wire connection portion 41AA.

[0111] The second inner lead portion 42A has an L-shape in plan view. The second inner lead portion 42A includes a wire connection portion 42AA and a lead connection portion 42AB extending from the wire connection portion 42AA toward the second sealing side surface 94. The lead connection portion 42AB is connected to the second outer lead portion 42B.

[0112] The wire connection portion 42AA extends from the lead connection portion 42AB in the +Y direction. The shape of the wire connection portion 42AA in a plan view is a substantially rectangular shape with the Y direction as the longitudinal direction and the X direction as the lateral direction. The width dimension (size in the X direction) of the wire connection portion 42AA is smaller than the width dimension (size in the Y direction) of the lead connection portion 42AB. In one example, the width dimension of the wire connection portion 42AA is between 1 / 3 and 1 / 2 of the width dimension of the lead connection portion 42AB.

[0113] Bent portions 42AC and 42AD are provided between the wire connection portion 42AA and the lead connection portion 42AB. The bent portion 42AC closer to the fourth sealing side surface 96 is formed in a curved shape in plan view. The bent portion 42AD closer to the third sealing side surface 95 is formed as an inclined surface in plan view. This inclined surface is inclined toward the second sealing side surface 94 as it moves from the third sealing side surface 95 to the fourth sealing side surface 96 in plan view.

[0114] The second inner lead portion 43A has an L-shape in plan view. The second inner lead portion 43A includes a wire connection portion 43AA and a lead connection portion 43AB extending from the wire connection portion 43AA toward the second sealing side surface 94. The lead connection portion 43AB is connected to the second outer lead portion 43B.

[0115] The wire connection portion 43AA extends from the lead connection portion 43AB in the +Y direction. The shape of the wire connection portion 43AA in a plan view is a substantially rectangular shape with the Y direction as the longitudinal direction and the X direction as the lateral direction. The width dimension (size in the X direction) of the wire connection portion 43AA is smaller than the width dimension (size in the Y direction) of the lead connection portion 43AB. In one example, the width dimension of the wire connection portion 43AA is between 1 / 3 and 1 / 2 of the width dimension of the lead connection portion 43AB. The size of the wire connection portion 43AA in the Y direction is smaller than the sizes of the wire connection portions 41AA and 42AA in the Y direction.

[0116] Bent portions 43AC and 43AD are provided between the wire connection portion 43AA and the lead connection portion 43AB. The bent portion 43AC closer to the fourth sealing side surface 96 is curved in plan view. The bent portion 43AD closer to the third sealing side surface 95 is formed as an inclined surface in plan view. This inclined surface is inclined toward the second sealing side surface 94 as it moves from the third sealing side surface 95 toward the fourth sealing side surface 96 in plan view.

[0117] The second inner lead portion 44A is connected to the second connection portion 54. The second inner lead portion 44A is disposed closer to the fourth sealing side surface 96 than the center of the second connection portion 54 in the Y direction. The second inner lead portion 44A extends along the X direction. The width dimension (size in the Y direction) of the second inner lead portion 44A is smaller than the size of the second connection portion 54 in the Y direction.

[0118] In this way, the lead connection portions 41AB to 43AB correspond to the "third portion of the second lead terminal," and the wire connection portions 41AA to 43AA correspond to the "fourth portion of the second lead terminal." Furthermore, the X direction in which the lead connection portions 41AB to 43AB extend corresponds to the "second direction," and the Y direction in which the wire connection portions 41AA to 43AA extend corresponds to the "first direction." In the first embodiment, the wire connection portions 41AA to 43AA extend in a direction perpendicular to the direction in which the lead connection portions 41AB to 43AB extend in a plan view, but this is not limited to this. It is sufficient that the wire connection portions 41AA to 43AA extend in a direction intersecting the direction in which the lead connection portions 41AB to 43AB extend in a plan view.

[0119] Next, the detailed cross-sectional structures of the wire connection portions 41AA to 43AA of the second inner lead portions 41A to 43A will be described. Figure 11 shows the cross-sectional structure of the wire connection portion 41AA of the second inner lead portion 41A in Figure 10, taken along line F11-F11. Note that the cross-sectional structures of the wire connection portions 42AA, 43AA of the second inner lead portions 42A, 43A are similar to the cross-sectional structure of the wire connection portion 41AA, and therefore detailed description thereof will be omitted. Note that, for convenience, the reference numerals relating to the second inner lead portion 41A in Figure 11 are the same as those relating to the first inner lead portion 11A.

[0120] 11 , the inner lead body 20B of the wire connection portion 41AA has an inner lead surface 21B, an inner lead back surface 22B opposite the inner lead surface 21B, and an inner lead side surface 23B connecting the inner lead surface 21B and the inner lead back surface 22B. The inner lead side surface 23B includes an opposing surface 24B facing the first die pad 30 (see FIG. 10 ). The inner lead surface 21B is the surface to which a second lead wire WD (see FIG. 10 ), which will be described later, is bonded, and faces the same side as the sealing surface 91 (see FIG. 1 ).

[0121] In the cross-sectional view of Fig. 11, the facing surface 24B is formed in a concave shape that is recessed away from the first die pad 30. The facing surface 24B is recessed from both the end on the inner lead front surface 21B side and the end on the inner lead back surface 22B side toward the center of the facing surface 24B in the Z direction. In one example, the deepest position of the concave facing surface 24B is at a position approximately one-third the thickness of the wire connection portion 42AA from the inner lead back surface 22B. Note that the shape of the facing surface 24B in the cross-sectional view of Fig. 11 can be changed as desired.

[0122] A plating layer 29 is formed on the inner lead surface 21B. The plating layer 29 is formed of a material containing, for example, silver. In one example, the plating layer 29 is formed of the same material as the plating layer 29 of the wire bonding portion 12AA (see FIG. 9 ). The plating layer 29 is formed over substantially the entire inner lead surface 21B of the wire bonding portion 41AA. The thickness of the plating layer 29 is thinner than the thickness of the inner lead body 20B of the wire bonding portion 41AA. In one example, the thickness of the plating layer 29 of the wire bonding portion 41AA is equal to the thickness of the plating layer 29 of the wire bonding portion 11AA. Here, if the difference between the thicknesses of the plating layer 29 of the wire bonding portion 41AA and the plating layer 29 of the wire bonding portion 11AA is, for example, within 20% of the thickness of the plating layer 29 of the wire bonding portion 41AA, then the thickness of the plating layer 29 of the wire bonding portion 41AA can be said to be equal to the thickness of the plating layer 29 of the wire bonding portion 11AA.

[0123] An end surface 29A of the plating layer 29 closer to the facing surface 24B is formed at a position closer to the lead connection portion 42AB (see FIG. 10) than the edge of the inner lead surface 21B closer to the facing surface 24B. In other words, the plating layer 29 does not cover the end surface of the inner lead surface 21B closer to the facing surface 24B. As a result, the end of the inner lead surface 21B, including the edge closer to the facing surface 24B, is in contact with the sealing resin 90 (see FIG. 1).

[0124] End surface 29A of plating layer 29 is inclined so as to move away from the edge of inner lead surface 21B closer to opposing surface 24B as it moves from the front surface to the back surface of plating layer 29. In one example, the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to opposing surface 24B is, for example, equal to or greater than the thickness of plating layer 29. Note that the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to opposing surface 24B can be changed as desired.

[0125] Furthermore, plating layer 29 does not cover opposing surface 24B of wire connection portion 41AA. Therefore, opposing surface 24B is in contact with sealing resin 90. Although not shown, plating layer 29 does not cover the edge of wire connection portion 41AA that is closer to second sealing side surface 94 in plan view. Therefore, the side of inner lead side surface 23B that faces second sealing side surface 94 is not covered by plating layer 29 and is in contact with sealing resin 90.

[0126] Although not shown, the plating layer 29 does not cover the leading edge of the wire connection portion 41AA in plan view. Therefore, the leading end surface of the inner lead side surface 23B (the side of the inner lead side surface 23B facing the fourth sealing side surface 96) is not covered by the plating layer 29 and is in contact with the sealing resin 90.

[0127] Next, we will explain the general configuration of the first chip 60 and the second chip 70. As shown in Figure 7, the first chip 60 mounted on the first die pad 30 has a chip front surface 61, a chip back surface 62 (see Figure 16) facing the opposite side to the chip front surface 61 in the Z direction, and first to fourth chip side surfaces 63 to 66 connecting the chip front surface 61 and the chip back surface 62.

[0128] The chip front surface 61 faces the side opposite to the first die pad 30 with respect to the first chip 60, and the chip back surface 62 faces the side facing the first die pad 30. The first chip side surface 63 and the second chip side surface 64 constitute both end faces of the first chip 60 in the X direction in a plan view. The first chip side surface 63 is the chip side surface of the first chip 60 on the side where the first lead terminals 11 to 14 are arranged, and the second chip side surface 64 is the chip side surface of the first chip 60 on the side where the second lead terminals 41 to 44 are arranged. The third chip side surface 65 and the fourth chip side surface 66 constitute both end faces of the first chip 60 in the Y direction in a plan view. The third chip side surface 65 is the chip side surface closer to the third sealing side surface 95 of the sealing resin 90, and the fourth chip side surface 66 is the chip side surface closer to the second chip 70. In other words, the fourth chip side surface 66 constitutes the facing surface facing the second chip 70.

[0129] The first chip 60 has a plurality of first electrode pads 67 (two in the first embodiment), a plurality of second electrode pads 68 (three in the first embodiment), and one third electrode pad 69. Each of the first electrode pads 67, each of the second electrode pads 68, and the third electrode pad 69 is provided so as to be exposed from the chip surface 61.

[0130] Each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may include at least one of titanium (Ti), titanium nitride (TiN), copper, aluminum, and tungsten (W). In one example, each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 has a laminated structure of titanium and copper. Note that the material constituting one or two of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may be different from the material constituting the remaining electrode pads.

[0131] In another example, the first electrode pads 67, the second electrode pads 68, and the third electrode pads 69 contain aluminum. In this case, each of the first electrode pads 67, the second electrode pads 68, and the third electrode pads 69 exposed from the chip surface 61 has a thickness of 2 μm or more. Note that the thickness of each of the first electrode pads 67, the second electrode pads 68, and the third electrode pads 69 can be changed as desired.

[0132] The multiple first electrode pads 67 are electrode pads electrically connected to the second chip 70. The multiple first electrode pads 67 are provided in a position closer to the fourth chip side surface 66 than the center in the Y direction of the chip surface 61 in a plan view. The multiple first electrode pads 67 are provided in a position closer to the second chip side surface 64 than the center in the X direction of the chip surface 61 in a plan view. The multiple first electrode pads 67 are arranged in a position overlapping with the second chip 70 when viewed from the Y direction. The multiple first electrode pads 67 are arranged at the same position as each other in the Y direction and spaced apart from each other in the X direction.

[0133] The second electrode pads 68 are electrode pads that are individually and electrically connected to the first lead terminals 11 to 13. The second electrode pads 68 are provided at positions closer to the first chip side surface 63 than the center of the chip surface 61 in the X direction in a plan view.

[0134] The third electrode pad 69 is an electrode pad electrically connected to the first die pad 30. The third electrode pad 69 has the same potential as the first die pad 30, i.e., the first ground potential. The third electrode pad 69 is provided at an end of the chip surface 61 closer to the first chip side surface 63 in the Y direction in plan view.

[0135] The second chip 70 mounted on the second die pad 50 has a chip surface 71, a chip back surface (not shown) facing the opposite side of the chip surface 71 in the Z direction, and first to fourth chip side surfaces 73 to 76 connecting the chip surface 71 and the chip back surface.

[0136] The chip front surface 71 faces the side opposite to the second die pad 50 with respect to the second chip 70, and the chip back surface faces the side facing the second die pad 50. The first chip side surface 73 and the second chip side surface 74 constitute both end faces of the second chip 70 in the X direction in a plan view. The first chip side surface 73 is the chip side surface of the second chip 70 on the side where the first lead terminals 11 to 14 are arranged, and the second chip side surface 74 is the chip side surface of the second chip 70 on the side where the second lead terminals 41 to 44 are arranged. The third chip side surface 75 and the fourth chip side surface 76 constitute both end faces of the second chip 70 in the Y direction in a plan view. The third chip side surface 75 is the chip side surface closer to the third sealing side surface 95 of the sealing resin 90, and the fourth chip side surface 76 is the chip side surface closer to the fourth sealing side surface 96. The third chip side surface 75 can be said to be the side surface closer to the first chip 60, and can be said to be the surface facing the first chip 60.

[0137] The second chip 70 has a plurality of first electrode pads 77 (two in the first embodiment), a plurality of second electrode pads 78 (three in the first embodiment), and one third electrode pad 79. Each of the first electrode pads 77, each of the second electrode pads 78, and the third electrode pad 79 is provided so as to be exposed from the chip surface 71.

[0138] Each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten. In one example, each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 has a laminated structure of titanium and copper. Note that the material constituting one or two of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may be different from the material constituting the remaining electrode pads.

[0139] The multiple first electrode pads 77 are electrode pads that are individually and electrically connected to the multiple first electrode pads 67 of the first chip 60. The multiple first electrode pads 77 are provided in a position closer to the third chip side surface 75 than the center in the Y direction of the chip surface 71 in a plan view. The multiple first electrode pads 77 are provided in a position closer to the first chip side surface 73 than the center in the X direction of the chip surface 71 in a plan view. The multiple first electrode pads 67 are arranged in a position that overlaps with the first chip 60 when viewed from the Y direction. The multiple first electrode pads 77 are arranged at the same position as each other in the Y direction and spaced apart from each other in the X direction.

[0140] The second electrode pads 78 are electrode pads that are individually and electrically connected to the second lead terminals 41 to 43. The second electrode pads 78 are provided in positions closer to the second chip side surface 74 than the center in the X direction of the chip surface 71 in a plan view. The second electrode pads 78 are arranged at the same positions as each other in the X direction and spaced apart from each other in the Y direction.

[0141] The third electrode pad 79 is an electrode pad electrically connected to the second die pad 50. The third electrode pad 79 has the same potential as the second die pad 50, i.e., the second ground potential. The third electrode pad 79 is provided closer to the fourth chip side surface 76 than the center of the chip surface 71 in the Y direction in plan view.

[0142] Next, the electrical connection configuration between the first chip 60 and the second chip 70 will be described. As shown in Fig. 7, the first electrode pads 67 of the first chip 60 and the first electrode pads 77 of the second chip 70 are individually connected by a plurality of inter-chip wires WA (two in the first embodiment). This electrically connects the first electrode pads 67 and the first electrode pads 77 individually.

[0143] In one example, the distance in the Y direction between two first electrode pads 67 on the first chip 60 is greater than the distance in the Y direction between two first electrode pads 77 on the second chip 70. Therefore, in a plan view, the distance between two inter-chip wires WA gradually increases from the first electrode pad 77 toward the first electrode pad 67.

[0144] 8, the second electrode pads 68 of the first chip 60 are individually connected to the first lead terminals 11 to 13 by a plurality of first lead wires WB (three in the first embodiment), thereby electrically connecting the first chip 60 to the first lead terminals 11 to 13 individually.

[0145] The first lead wire WB is a bonding wire formed by a wire bonding device. In one example, the first lead wire WB has a first bond portion bonded to the second electrode pad 68 and a second bond portion bonded to the first lead terminals 11 to 13. The first lead wire WB is connected to the wire connection portions 11AA to 13AA of the first inner lead portions 11A to 13A of the first lead terminals 11 to 13.

[0146] The third electrode pad 69 of the first chip 60 and the first connection portion 34 are connected by one first die pad wire WC. This electrically connects the third electrode pad 69 to the first die pad 30. In other words, the third electrode pad 69 is at the first ground potential. It can also be said that the third electrode pad 69 is electrically connected to the first lead terminal 14.

[0147] The first die pad wire WC is a bonding wire formed by a wire bonding apparatus. In one example, the first die pad wire WC has a first bond portion bonded to the third electrode pad 69 and a second bond portion bonded to the first die pad 30.

[0148] 10, the second electrode pads 78 of the second chip 70 are individually connected to the second lead terminals 41 to 43 by a plurality of second lead wires WD (three in the first embodiment), thereby electrically connecting the second chip 70 to the second lead terminals 41 to 43 individually.

[0149] The second lead wire WD is a bonding wire formed by a wire bonding device. In one example, the bonded portion of the second lead wire WD to the second electrode pad 78 is a first bond portion, and the bonded portion of the second lead terminals 41 to 43 is a second bond portion. The second lead wire WD is connected to the wire connection portions 41AA to 43AA of the second inner lead portions 41A to 43A of the second lead terminals 41 to 43.

[0150] The third electrode pads 79 of the second chip 70 and the second connection portions 54 are individually connected by a single second die pad wire WE. This electrically connects the second chip 70 and the second die pad 50. Therefore, the third electrode pads 79 of the second chip 70 are at the second ground potential. It can also be said that the third electrode pads 79 are electrically connected to the second lead terminals 44.

[0151] The second die pad wire WE is a bonding wire formed by a wire bonding apparatus. In one example, the second die pad wire WE has a first bond portion at a connection portion with the third electrode pad 79 and a second bond portion at a bond portion with the second die pad 50.

[0152] 7, the material constituting the inter-chip wire WA is different from the material constituting each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE. In one example, the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are made of the same material.

[0153] The inter-chip wires WA are formed of a material containing gold. The first lead wires WB, the first die pad wires WC, the second lead wires WD, and the second die pad wires WE are each formed of a material containing copper. In one example, the first lead wires WB, the first die pad wires WC, the second lead wires WD, and the second die pad wires WE are each configured with a copper wire surface coated with palladium (Pd). This allows for improved oxidation resistance and corrosion resistance compared to copper wires not coated with palladium.

[0154] Each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE may be made of a material containing aluminum.

[0155] In the first embodiment, as shown in Fig. 8, a security bond WB1 is formed at the second bond portion of each first lead wire WB. A security bond WC1 is formed at the second bond portion of the first die pad wire WC. As shown in Fig. 10, a security bond WD1 is formed at the second bond portion of each second lead wire WD. A security bond WE1 is formed at the second bond portion of the second die pad wire WE.

[0156] 12 shows a perspective view of the second bond portion of the first die pad wire WC and its surrounding area. As shown in Fig. 12, the second bond portion of the first die pad wire WC includes a bonding portion WCP bonded to the first connection portion 34. The bonding portion WCP is a portion that is crushed by being pressed against the first connection portion 34 by the wire bonding device. The thickness of the bonding portion WCP is smaller than the diameter of the first die pad wire WC.

[0157] The security bond WC1 is formed, for example, by providing a stud bump SB on the bonding portion WCP. In one example, the stud bump SB is formed by ball bonding using a wire bonding device. The bonding portion WCP is sandwiched between the first connection portion 34 and the stud bump SB.

[0158] The configurations of the second bond portions of the first lead wire WB, the second lead wire WD, and the second die pad wire WE are the same as the configuration of the second bond portion of the first die pad wire WC, and therefore detailed descriptions of the configurations of the second bond portions of the first lead wire WB, the second lead wire WD, and the second die pad wire WE will be omitted.

[0159] [Circuit Configuration of Signal Transmission Device] The circuit configuration of the signal transmission device 10 of the first embodiment will be described with reference to Fig. 13. The signal transmission device 10 includes a transmitting circuit 300, a receiving circuit 310, and a first transformer 321 configured to insulate the transmitting circuit 300 from the receiving circuit 310 and to exchange signals between the transmitting circuit 300 and the receiving circuit 310. In the first embodiment, the first chip 60 includes the receiving circuit 310 and the first transformer 321, and the second chip 70 includes the transmitting circuit 300.

[0160] The signal transmission device 10 also has input terminals P1 to P4, which are external terminals electrically connected to the transmitting circuit 300, and output terminals Q1 to Q4, which are external terminals electrically connected to the receiving circuit 310.

[0161] The input terminal P1 is a power supply terminal (VCC1), the input terminal P2 is a first input terminal (IN+), the input terminal P3 is a second input terminal (IN-), and the input terminal P4 is a ground terminal (GND1). In one example, the input terminal P1 corresponds to the second lead terminal 41, the input terminal P2 corresponds to the second lead terminal 42, the input terminal P3 corresponds to the second lead terminal 43, and the input terminal P4 corresponds to the second lead terminal 44.

[0162] The output terminal Q1 is a power supply terminal (VCC2), the output terminal Q2 is an output terminal (OUT), the output terminal Q3 is a clamp terminal (CLAMP), and the output terminal Q4 is a ground terminal (GND2). In one example, the output terminal Q1 corresponds to the first lead terminal 11, the output terminal Q2 corresponds to the first lead terminal 12, the output terminal Q3 corresponds to the first lead terminal 13, and the output terminal Q4 corresponds to the first lead terminal 14.

[0163] The transmitting circuit 300 includes a transmitting section 301, an active filter section 302, an under voltage lock out (UVLO) section 303, and input filter sections 304 and 306 as functional sections, and resistors 305 and 307 as circuit elements.

[0164] The input terminal P1 is electrically connected to the UVLO unit 303, the input terminal P2 is electrically connected to the input filter unit 304, and the input terminal P3 is electrically connected to the input filter unit 306. The active filter unit 302 is electrically connected to the UVLO unit 303 and the input filter units 304 and 306.

[0165] The transmitter 301 is electrically connected to the first transformer 321. The transmitter 301 outputs a control signal to the receiver circuit 310 using the first transformer 321 based on a control signal from the active filter 302.

[0166] A signal from input terminal P2 is input to active filter unit 302 via input filter unit 304, and a signal from input terminal P3 is input to active filter unit 302 via input filter unit 306. Active filter unit 302 is a circuit for extracting a signal of a specific frequency from the signals input to this circuit. Active filter unit 302 is configured to output the signal of the specific frequency to transmitter unit 301 as a control signal.

[0167] The UVLO unit 303 stops the operation of the active filter unit 302 when the voltage of the control power supply electrically connected to the input terminal P1 falls below a threshold voltage, thereby suppressing the occurrence of malfunction.

[0168] The input filter section 304 is configured to remove noise from a signal input from, for example, the input terminal P2 and output the signal to the active filter section 302. A resistor 305 is electrically connected to the conductive path between the input terminal P2 and the input filter section 304. The resistor 305 is, for example, a pull-down resistor. A first terminal of the resistor 305 is electrically connected to the conductive path, and a second terminal of the resistor 305 is electrically connected to the input terminal P4.

[0169] The input filter section 306 is configured to remove noise from a signal input from, for example, the input terminal P3 and output the signal to the active filter section 302. A resistor 307 is electrically connected to the conductive path between the input terminal P3 and the input filter section 306. The resistor 307 is, for example, a pull-up resistor. A first terminal of the resistor 307 is electrically connected to the input terminal P1, and a second terminal is electrically connected to the conductive path.

[0170] The receiving side circuit 310 includes functional units such as a receiving unit 311, an output control unit 312, a clamp control unit 313, and a UVLO unit 314, and circuit units such as first output switching elements 315A and 315B, a second output switching element 316, a resistor 317, a switching element 318, and a diode 319.

[0171] The output terminal Q1 is electrically connected to the UVLO unit 314, the output terminal Q2 is electrically connected to the output control unit 312, and the output terminals Q3 and Q4 are electrically connected to the clamp control unit 313. The receiving unit 311 is electrically connected to the output control unit 312 and the clamp control unit 313. The UVLO unit 314 is electrically connected to the output control unit 312 and the clamp control unit 313.

[0172] The UVLO unit 314 stops the operation of the output control unit 312 and the clamp control unit 313 when the voltage of the control power supply electrically connected to the output terminal Q1 falls below a threshold voltage, thereby suppressing the occurrence of malfunction.

[0173] The receiving unit 311 is electrically connected to the first transformer 321. The receiving unit 311 receives a control signal from the transmitting unit 301 via the first transformer 321, and outputs the received control signal to the output control unit 312 and the clamp control unit 313.

[0174] The output control unit 312 is a circuit for generating an output signal output by the signal transmission device 10 based on a control signal from the receiving unit 311. The output control unit 312 is electrically connected to the gates of the first output switching elements 315A and 315B and the gate of the second output switching element 316. The first output switching element 315A and the second output switching element 316 are, for example, n-channel MOSFETs, and the first output switching element 315B is, for example, a p-channel MOSFET. The drain of the first output switching element 315A and the source of the first output switching element 315B are electrically connected to the output terminal Q1. The drains of the first output switching element 315B and the second output switching element 316 are electrically connected to the output terminal Q2. A high-level output signal is generated based on the on / off operations of the first output switching elements 315A and 315B and the second output switching element 316. The resistor 317 is provided between the source of the first output switching element 315 A and the gate of the second output switching element 316 .

[0175] The clamp control unit 313 is a circuit that controls the operation of a clamp circuit configured by a switching element 318 and a diode 319. The switching element 318 is, for example, an n-channel MOSFET. The gate of the switching element 318 is electrically connected to the clamp control unit 313. The drain of the switching element 318 is electrically connected to the anode of the diode 319. The drain of the switching element 318 and the anode of the diode 319 are electrically connected to the output terminal Q3. The cathode of the diode 319 is electrically connected to the output terminal Q1. The source of the switching element 318 is electrically connected to the output terminal Q4.

[0176] [Detailed Configuration of First Chip] A detailed configuration of the first chip 60 including a part of the circuit configuration of the signal transmission device 10 described above will be described.

[0177] The configuration of the first chip 60 will be described with reference to Figures 14 to 21. Figures 14 and 15 show a schematic planar structure of an example of the internal configuration of the first chip 60. Figures 16 to 21 show a schematic cross-sectional structure of an example of the internal configuration of the first chip 60. Note that, to make the drawings easier to understand, some hatching lines have been omitted in the schematic cross-sectional structures of the first chip 60 in Figures 16 to 21.

[0178] 14 shows a schematic planar structure of an example of the internal configuration of the first chip 60 near the chip front surface 61. FIG. 15 shows a schematic planar structure of an example of the internal structure of the first chip 60 near the chip back surface 62.

[0179] The first chip 60 has an insulating transformer region 110, a circuit region 120, and a peripheral guard ring 100 connected to the insulating transformer region 110 and surrounding the circuit region 120. In one example, the circuit region 120 can be defined as the region surrounded by the peripheral guard ring 100 in a plan view, other than the insulating transformer region 110.

[0180] The isolation transformer region 110 is a region that electrically insulates the circuit region 120 from the second chip 70 while allowing signal transmission between the circuit region 120 and the second chip 70. The isolation transformer region 110 is formed closer to the second chip side surface 64 with respect to the center of the first chip 60 in the X direction in a planar view. In other words, the isolation transformer region 110 is formed in a region of the first chip 60 that is closer to the second chip 70 (see FIG. 7 ) in a planar view. The isolation transformer region 110 is formed closer to the fourth chip side surface 66 of the first chip 60 in a planar view.

[0181] A first transformer 321 is formed in the insulating transformer region 110. In other words, one transformer is formed in the insulating transformer region 110. Furthermore, a first electrode pad 67A and a first electrode pad 67B are formed in the insulating transformer region 110. In other words, two first electrode pads 67 are formed in the insulating transformer region 110. The first electrode pad 67A and the first electrode pad 67B are arranged at the same position in the Y direction and spaced apart from each other in the X direction.

[0182] 14 and 15 , the first transformer 321 includes a first front-side coil 111A and a first back-side coil 111B. The first front-side coil 111A and the first back-side coil 111B may each contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten. In one example, the first front-side coil 111A contains copper, and the first back-side coil 111B contains aluminum. In another example, the first front-side coil 111A has a layered structure of titanium and copper, and the first back-side coil 111B has a layered structure of titanium nitride and aluminum.

[0183] 14, the first surface-side coil 111A includes a first coil portion 111A1 that is spiral in plan view, a first outer coil end portion 111A2, and a first inner coil end portion 111A3. The first outer coil end portion 111A2 constitutes the end portion of the outermost periphery of the first coil portion 111A1 in the winding direction, and the first inner coil end portion 111A3 constitutes the end portion of the innermost periphery of the first coil portion 111A1 in the winding direction.

[0184] The first electrode pad 67A is disposed in an inner space including the winding center of the first coil portion 111A1 in a plan view. The first electrode pad 67A can be said to be located more inward than the first coil portion 111A1. The first electrode pad 67A is connected to the first inner coil end portion 111A3. Therefore, the first electrode pad 67A can be said to be electrically connected to the first end portion of the first surface side coil 111A.

[0185] The first electrode pad 67B is disposed closer to the second chip side surface 64 than the first surface side coil 111A in a plan view. The first electrode pad 67B is connected to the first outer coil end 111A2 of the first surface side coil 111A. Therefore, it can be said that the first electrode pad 67B is electrically connected to the second end of the first surface side coil 111A.

[0186] As shown in FIG. 15 , the first back-side coil 111B is disposed opposite the first front-side coil 111A (see FIG. 14 ) in the Z direction. The first back-side coil 111B includes a first coil portion 111B1 having a spiral shape in a plan view, a first outer coil end portion 111B2, and a first inner coil end portion 111B3. The first outer coil end portion 111B2 constitutes the end portion of the outermost periphery of the first coil portion 111B1 in the winding direction, and the first inner coil end portion 111B3 constitutes the end portion of the innermost periphery of the first coil portion 111B1 in the winding direction. The first outer coil end portion 111B2 is electrically connected to the functional unit of the circuit area 120. The first inner coil end portion 111B3 is electrically connected to the functional unit of the circuit area 120.

[0187] As shown in FIG. 14 , a surface-side guard ring 115 is formed in the insulating transformer region 110, surrounding the first surface-side coil 111A and the first electrode pads 67A and 67B in a plan view. The surface-side guard ring 115 is configured to partition the insulating transformer region 110. In a plan view, the surface-side guard ring 115 includes a circular first ring portion 115A that surrounds the first surface-side coil 111A and is concentric with the winding center of the first surface-side coil 111A, and a semicircular second ring portion 115B that surrounds the first electrode pad 67B and is connected to the first ring portion 115A. The first ring portion 115A is circular, with an opening near the second chip side surface 64. The second ring portion 115B is connected to this opening.

[0188] 15 , a back-side guard ring 116 is formed in the insulating transformer region 110 to surround the first back-side coil 111B in plan view. The shape and size of the back-side guard ring 116 are the same as those of the front-side guard ring 115 (see FIG. 14 ). In plan view, the back-side guard ring 116 is formed at a position overlapping the front-side guard ring 115.

[0189] A plurality of vias 117 are formed in the insulating transformer region 110 to connect the front-side guard ring 115 and the back-side guard ring 116. Each via 117 is arranged at a position overlapping both the front-side guard ring 115 and the back-side guard ring 116 in plan view.

[0190] The circuit region 120 is formed with the components of the receiving circuit 310 in Fig. 13 except for the first transformer 321. The circuit region 120 is an region formed with a plurality of functional units and a plurality of circuit elements of the receiving circuit 310. The plurality of functional units include a receiving unit 311, an output control unit 312, a clamp control unit 313, and a UVLO unit 314 (see Fig. 13).

[0191] A plurality of wiring layers (not shown) are provided in the circuit region 120. The plurality of wiring layers include a wiring layer that electrically connects the plurality of functional units of the receiving circuit 310 and a wiring layer that electrically connects the plurality of functional units and the first transformer 321 of the isolation transformer region 110.

[0192] 14 and 15 , the outer periphery guard ring 100 includes a front-side outer periphery guard ring 101 and a back-side outer periphery guard ring 102. As shown in FIG. 14 , the front-side outer periphery guard ring 101 is formed so as to surround the outer periphery of the first chip 60 in a plan view. The front-side outer periphery guard ring 101 has a quadrangle shape with chamfered corners in a plan view. The front-side guard ring 115 is connected to the front-side outer periphery guard ring 101 by a front-side connection wiring 103. This electrically connects the front-side guard ring 115 to the front-side outer periphery guard ring 101.

[0193] 15 , the shape and size of the rear-side outer peripheral guard ring 102 are the same as those of the front-side outer peripheral guard ring 101 (see FIG. 14 ). The rear-side guard ring 116 is connected to the rear-side outer peripheral guard ring 102 by rear-side connection wiring 104. This electrically connects the rear-side guard ring 116 to the rear-side outer peripheral guard ring 102.

[0194] Although not shown, the first chip 60 has a plurality of peripheral vias that connect the front-side peripheral guard ring 101 and the back-side peripheral guard ring 102. The front-side peripheral guard ring 101 and the back-side peripheral guard ring 102 are electrically connected by the plurality of peripheral vias. Each peripheral via extends in the Z direction.

[0195] (Cross-Sectional Structure of First Chip) The cross-sectional structure of the insulating transformer region 110 as an example of the internal configuration of the first chip 60 will be described.

[0196] Fig. 16 shows a cross-sectional structure of a portion of the first transformer 321. Fig. 17 is an enlarged view of a portion of the first transformer 321 in Fig. 16. Fig. 18 is an enlarged view of a portion F18 of the first front-surface side coil 111A of the first transformer 321 in Fig. 17, and Fig. 19 is an enlarged view of a portion F19 of the first back-surface side coil 111B of the first transformer 321 in Fig. 17. Note that hatching lines have been omitted in Fig. 16 to facilitate understanding of the drawing.

[0197] 16 , the first chip 60 includes the above-described substrate 130 and an element insulating layer 150 formed on the substrate 130. The substrate 130 is formed, for example, of a semiconductor substrate. In the first embodiment, the substrate 130 is a semiconductor substrate formed of a material containing silicon (Si). Note that a wide bandgap semiconductor or a compound semiconductor may be used as the semiconductor substrate for the substrate 130. Furthermore, instead of a semiconductor substrate, the substrate 130 may be an insulating substrate formed of a material containing glass, or an insulating substrate formed of a material containing ceramics such as alumina.

[0198] The wide bandgap semiconductor is a semiconductor substrate having a bandgap of 2.0 eV or greater. The wide bandgap semiconductor may be silicon carbide (SiC). The compound semiconductor may be a III-V compound semiconductor. The compound semiconductor may include at least one of aluminum nitride (AlN), indium nitride (InN), gallium nitride (GaN), and gallium arsenide (GaAs).

[0199] The substrate 130 is formed in a flat plate shape and has a substrate front surface 131 and a substrate back surface 132 opposite to the substrate front surface 131. The substrate back surface 132 constitutes the chip back surface 62 of the first chip 60.

[0200] The element insulating layer 150 is in contact with the substrate surface 131. In one example, the element insulating layer 150 is formed over the entire surface of the substrate surface 131. In one example, the element insulating layer 150 is made of silicon oxide (SiO ２ ) The element insulating layer 150 may be formed by stacking a plurality of such oxide films. The material forming the element insulating layer 150 can be changed as desired.

[0201] The element insulating layer 150 has a layer front surface 151 and a layer back surface 152 opposite to the layer front surface 151. The layer front surface 151 faces the same side as the substrate front surface 131, and the layer back surface 152 faces the same side as the substrate back surface 132. The layer back surface 152 is in contact with the substrate front surface 131.

[0202] A plurality of first electrode pads 67A, 67B (not shown in FIG. 16 , see FIG. 14 ), a passivation film 161, and a protective film 162 are formed on the element insulating layer 150. The first electrode pads 67A, 67B are in contact with a layer surface 151 of the element insulating layer 150. In one example, the first electrode pads 67A, 67B are formed at the same position as each other in the Z direction.

[0203] As shown in FIG. 17 , the passivation film 161 is a film that protects the element insulating layer 150 and is formed to cover the layer surface 151. The passivation film 161 is formed to cover the first electrode pads 67A and 67B (see FIG. 14 ). Meanwhile, the passivation film 161 has openings (not shown) that expose portions of the first electrode pads 67A and 67B in the Z direction. The protective film 162 is formed on the passivation film 161. In one example, the passivation film 161 is formed of a single layer of a silicon nitride (SiN) film or a silicon oxynitride (SiON) film. In another example, the passivation film 161 is formed of a stacked structure of a silicon oxide film and a silicon nitride film. In this case, the silicon nitride film may be formed on the silicon oxide film. In another example, the passivation film 161 is formed of a stacked structure of a silicon oxide film and a silicon oxynitride film. In this case, the silicon oxynitride film may be formed on the silicon oxide film.

[0204] The thickness of the passivation film 161 (the size of the passivation film 161 in the Z direction) is thinner than the thickness of the protective film 162 (the size of the protective film 162 in the Z direction). In one example, the thickness of the passivation film 161 is ⅓ or less of the thickness of the protective film 162. In another example, the thickness of the passivation film 161 is ¼ or less of the thickness of the protective film 162. In another example, the thickness of the passivation film 161 is ⅕ or more of the thickness of the protective film 162. In the example shown in FIG. 17 , the thickness of the passivation film 161 is about 1.3 μm.

[0205] The protective film 162 is formed on the passivation film 161. The protective film 162 is a film that protects the first chip 60, and is formed of a material containing, for example, polyimide (PI). The protective film 162 can also be said to be a layer that relieves stress between the sealing resin 90 and the element insulating layer 150 and between the sealing resin 90 and the substrate 130. The protective film 162 forms the chip surface 61 of the first chip 60.

[0206] The first surface side coil 111A and the first back side coil 111B of the first transformer 321 are arranged opposite to each other with a gap in the Z direction. An element insulating layer 150 is interposed between the first surface side coil 111A and the first back side coil 111B in the Z direction. The first surface side coil 111A and the first back side coil 111B are provided in the element insulating layer 150. The first back side coil 111B can also be said to be embedded in the element insulating layer 150. The first surface side coil 111A is arranged closer to the layer surface 151 of the element insulating layer 150 than the first back side coil 111B. In other words, the first back side coil 111B is arranged closer to the layer back surface 152 of the element insulating layer 150 (closer to the substrate 130) than the first surface side coil 111A. The first surface side coil 111A is exposed from the layer surface 151 of the element insulating layer 150 in the Z direction. The first front surface side coil 111A is covered with a passivation film 161. The first back surface side coil 111B is disposed at a distance in the Z direction from the layer back surface 152 of the element insulating layer 150. In other words, the first back surface side coil 111B is disposed at a distance in the Z direction from the substrate 130. The element insulating layer 150 is interposed between the first back surface side coil 111B and the substrate 130.

[0207] 18 , the first surface side coil 111A is embedded in a recess 153 recessed from the layer front surface 151 toward the layer back surface 152 (see FIG. 17 ) of the element insulating layer 150. The recess 153 is formed in a spiral shape in a plan view. The first surface side coil 111A is formed by a single conductor 170 embedded in the recess 153. In other words, the first surface side coil 111A is configured by a single conductor 170 formed in a spiral shape in a plan view.

[0208] The conducting wire 170 has a coil front surface 171, a coil back surface 172 opposite the coil front surface 171, and a pair of coil side surfaces 173 connecting the coil front surface 171 and the coil back surface 172. The coil front surface 171 faces the same side as the layer front surface 151 of the element insulating layer 150, and the coil back surface 172 faces the same side as the layer back surface 152. The pair of coil side surfaces 173 are formed in a tapered shape whose size in the X direction decreases from the coil front surface 171 toward the coil back surface 172. The coil back surface 172 and the pair of coil side surfaces 173 are in contact with the recess 153. In other words, the coil back surface 172 and the pair of coil side surfaces 173 are in contact with the element insulating layer 150. The coil front surface 171 is covered with a passivation film 161.

[0209] The conductive wire 170 includes a barrier layer 174 and a metal layer 175 formed on the barrier layer 174. The barrier layer 174 is formed so as to contact the recess 153. The barrier layer 174 can be said to be a thin film interposed between the metal layer 175 and the element insulating layer 150. The metal layer 175 is formed so as to fill the recess 153.

[0210] The metal layer 175 is formed of a material containing, for example, copper. The barrier layer 174 has a function of suppressing the diffusion of copper, for example. The barrier layer 174 may contain at least one of titanium, titanium nitride, tantalum (Ta), and tantalum nitride (TaN). The metal layer 175 may also contain at least one of aluminum, gold (Au), silver, and tungsten (W).

[0211] The thickness of the conductor 170 of the first front-side coil 111A is thicker than the thickness of the passivation film 161 and thinner than the thickness of the protective film 162. The thickness of the conductor 170 is thicker than the thickness of the first back-side coil 111B (see FIG. 17 ). In one example, the thickness of the conductor 170 is between two and three times the thickness of the passivation film 161. In one example, the thickness of the conductor 170 is half or less the thickness of the protective film 162. In one example, the thickness of the conductor 170 is one-third or more the thickness of the protective film 162. Here, the thickness of the conductor 170 can be defined by the distance between the coil front surface 171 and the coil back surface 172 in the Z direction.

[0212] The width of coil surface 171 of conductor 170 (the length in the X direction in FIG. 18 ) is longer than the thickness of conductor 170. In one example, the width of coil surface 171 is more than twice the thickness of conductor 170. In another example, the width of coil surface 171 is less than three times the thickness of conductor 170. In the example of FIG. 18 , the width of coil surface 171 is approximately 6.8 μm.

[0213] In the first surface side coil 111A, an element insulating layer 150 is interposed between adjacent conductors 170 in the X direction. That is, in the first surface side coil 111A, the conductors 170 are spaced apart from each other in the X direction. The distance between adjacent conductors 170 in the X direction gradually increases from the coil front surface 171 toward the coil back surface 172.

[0214] In FIG. 18 , the distance between adjacent conductors 170 in the X direction, and the distance between the coil surfaces 171 of adjacent conductors 170 in the X direction, is defined as the inter-conductor distance. This inter-conductor distance refers to the minimum distance between adjacent conductors 170 in the X direction. The inter-conductor distance is smaller than the length of the coil surface 171 in the X direction. In one example, the inter-conductor distance is ½ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅓ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ¼ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅕ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅙ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅙ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅙ or more of the width of the coil surface 171. The inter-conductor distance is smaller than the thickness of the conductors 170. In one example, the distance between the conductors is equal to or less than ½ of the thickness of the conductors 170. In another example, the distance between the conductors is equal to or more than ⅓ of the thickness of the conductors 170. In the example of Fig. 18, the distance between the conductors is about 1 µm.

[0215] 17 and 19 , the first back-side coil 111B is composed of two coil layers 111BA and 111BB. The coil layer 111BA constitutes a conductor closer to the layer front surface 151 of the element insulating layer 150, and the coil layer 111BB constitutes a conductor closer to the layer back surface 152. The coil layers 111BA and 111BB are spaced apart in the Z direction. The element insulating layer 150 is interposed between the coil layers 111BA and 111BB in the Z direction. Each of the coil layers 111BA and 111BB includes a conductor 180. That is, the coil layer 111BA is constituted by a conductor 180 formed in a spiral shape in a plan view, and the coil layer 111BB is constituted by another conductor 180 formed in a spiral shape in a plan view. Here, the number of turns of the first back-side coil 111B can be defined as the sum of the number of turns of the coil layer 111BA and the number of turns of the coil layer 111BB.

[0216] As shown in Fig. 17, the coil layer 111BA and the coil layer 111BB are arranged to be offset from each other in the X direction. In plan view, the coil layer 111BA and the coil layer 111BB are arranged to partially overlap each other. In other words, in plan view, the coil layer 111BA and the coil layer 111BB are arranged to have portions that do not overlap each other. In the example shown in Fig. 19, the coil layer 111BA is arranged to be offset in the X direction from the coil layer 111BB by half the width dimension of the conductor 180 (the length in the X direction in Fig. 19).

[0217] 17, each of the coil layers 111BA and 111BB is disposed so as to be shifted in the X direction with respect to the first surface side coil 111A. In a plan view, the coil layers 111BA and 111BB are disposed so as to partially overlap the first surface side coil 111A. In the example shown in Fig. 17, the coil layer 111BB is disposed so as to be shifted inward with respect to the first surface side coil 111A.

[0218] The number of turns of the coil layer 111BA and the number of turns of the coil layer 111BB are the same. The number of turns of the coil layers 111BA and 111BB is less than the number of turns of the first front-side coil 111A. In one example, the number of turns of the coil layer 111BA is half the number of turns of the first front-side coil 111A, and the number of turns of the coil layer 111BB is half the number of turns of the first front-side coil 111A. In other words, the sum of the number of turns of the coil layer 111BA and the number of turns of the coil layer 111BB is the same as the number of turns of the first front-side coil 111A. Therefore, the number of turns of the first back-side coil 111B is the same as the number of turns of the first front-side coil 111A.

[0219] The coil layers 111BA and 111BB are formed by identically shaped conductors 180 that are spirally wound in a plan view. As shown in FIG. 19 , the conductor 180 has a coil front surface 181, a coil back surface 182 opposite the coil front surface 181, and a pair of coil side surfaces 183 connecting the coil front surface 181 and the coil back surface 182. The coil front surface 181 faces the same side as the layer front surface 151 (see FIG. 17 ) of the element insulating layer 150, and the coil back surface 172 faces the same side as the layer back surface 152. The pair of coil side surfaces 183 extend along the Z direction. The coil front surface 181, the coil back surface 182, and the pair of coil side surfaces 183 each contact the element insulating layer 150.

[0220] The conductor 180 includes a back-side barrier layer 184, a metal layer 185 formed on the back-side barrier layer 184, and a front-side barrier layer 186 formed on the metal layer 185. The back-side barrier layer 184 constitutes a coil back surface 182 of the conductor 180. The back-side barrier layer 184 can be said to be a thin film interposed between the back surface of the metal layer 185 and the element insulating layer 150 in the Z direction.

[0221] The front-side barrier layer 186 constitutes the coil surface 181 of the conductor 180. The front-side barrier layer 186 can be said to be a thin film interposed between the surface of the metal layer 185 and the element insulating layer 150 in the Z direction.

[0222] The metal layer 185 has a thickness greater than that of the back-side barrier layer 184 and the front-side barrier layer 186. A pair of side surfaces of the metal layer 185 are not covered by either the back-side barrier layer 184 or the front-side barrier layer 186 and are in contact with the element insulating layer 150. The pair of side surfaces of the metal layer 185 constitute part of the pair of coil side surfaces 183 in the Z direction.

[0223] The metal layer 185 is formed of a material containing, for example, aluminum. Both the back-side barrier layer 184 and the front-side barrier layer 186 may contain titanium or titanium nitride. In this way, the material constituting the first back-side coil 111B is different from the material constituting the first front-side coil 111A.

[0224] The materials constituting the first front-side coil 111A and the first back-side coil 111B can be changed as desired. For example, the materials constituting the first front-side coil 111A and the first back-side coil 111B may be the same.

[0225] As shown in FIG. 17 , the thickness of the conductor 180 of the first back-side coil 111B is thinner than the thickness of the protective film 162. The thickness of the conductor 180 is thinner than the thickness of the conductor 170. In one example, the thickness of the conductor 180 is half or less of the thickness of the conductor 170. In one example, the thickness of the conductor 180 is about one-third of the thickness of the conductor 170. The thickness of the conductor 180 is thinner than the thickness of the passivation film 161. The thickness of the conductor 180 is half or more of the thickness of the passivation film 161. Here, the thickness of the conductor 180 can be defined by the distance in the Z direction between the coil front surface 181 and the coil back surface 182.

[0226] The width of the conductor 180 (the length in the X direction in FIG. 17 ) is longer than the thickness of the conductor 180. In one example, the width of the conductor 180 is at least twice the thickness of the conductor 180. In one example, the width of the conductor 180 is at least five times the thickness of the conductor 180. In one example, the width of the conductor 180 is at least ten times the thickness of the conductor 180. In one example, the width of the conductor 180 is at least twelve times the thickness of the conductor 180. In one example, the width of the conductor 180 is at least fifteen times the thickness of the conductor 180. In one example, the width of the conductor 180 is at least sixteen times the thickness of the conductor 180. In one example, the width of the conductor 180 is approximately seventeen times the thickness of the conductor 180.

[0227] In one example, the width dimension of the conductor 180 is longer than the width dimension of the conductor 170. The width dimension of the conductor 180 is at least twice the width dimension of the conductor 170. The width dimension of the conductor 180 is no more than three times the width dimension of the conductor 170. In the example of FIG. 17 , the width dimension of the conductor 180 is approximately 15.8 μm. The width dimension of the conductor 170 can be defined as the size in a direction perpendicular to the direction in which the conductor 170 extends in a planar view. The width dimension of the conductor 180 can be defined as the size in a direction perpendicular to the direction in which the conductor 180 extends in a planar view.

[0228] In the coil layers 111BA and 111BB, an element insulating layer 150 is interposed between adjacent conductors 180 in the X direction. That is, in the coil layers 111BA and 111BB, the conductors 180 are spaced apart in the X direction. The distance between adjacent conductors 180 in the X direction (hereinafter referred to as the "inter-conductor distance") is the same from the coil front surface 181 to the coil back surface 182. The inter-conductor distance is smaller than the width of the conductors 180. For example, the inter-conductor distance is ½ or less of the width of the conductors 180. For example, the inter-conductor distance is ⅕ or less of the width of the conductors 180. For example, the inter-conductor distance is 1 / 10 or less of the width of the conductors 180. For example, the inter-conductor distance is 1 / 15 or less of the width of the conductors 180. For example, the inter-conductor distance is 1 / 16 or less of the width of the conductors 180. In one example, the distance between the conductors is 1 / 17 or less of the width dimension of the conductor 180. In one example, the distance between the conductors is 1 / 18 or less of the width dimension of the conductor 180. In one example, the distance between the conductors is 1 / 19 or less of the width dimension of the conductor 180. In one example, the distance between the conductors is 1 / 20 or more of the width dimension of the conductor 180. The distance between the conductors is smaller than the thickness of the conductor 180. On the other hand, the distance between the conductors is 1 / 2 or more of the thickness of the conductor 180. The distance between the conductors of the coil layers 111BA and 111BB is smaller than the distance between the conductors of the first surface-side coil 111A. In the example of FIG. 17 , the distance between the conductors is approximately 0.8 μm.

[0229] The distance in the Z direction between the first front surface side coil 111A and the first back surface side coil 111B is greater than the distance in the Z direction between the layer back surface 152 of the element insulating layer 150 and the first back surface side coil 111B. In one example, the distance in the Z direction between the first front surface side coil 111A and the first back surface side coil 111B is smaller than the width dimension of the conductive wire 180. The distance in the Z direction between the first front surface side coil 111A and the first back surface side coil 111B is, for example, approximately 12.8 μm. Here, the distance in the Z direction between the first front surface side coil 111A and the first back surface side coil 111B can be defined by the distance in the Z direction between the coil back surface 172 of the conductive wire 170 and the coil front surface 181 of the conductive wire 180 of the coil layer 111BA. The distance in the Z direction between the first front side coil 111A and the first back side coil 111B is set according to the desired dielectric strength and the electric field strength of each of the first front side coil 111A and the first back side coil 111B.

[0230] In the first embodiment, the conductor 170 of the first surface side coil 111A is formed so that the coil front surface 171 thereof is exposed from the element insulating layer 150 in the Z direction, but this is not limited to this. The conductor 170 of the first surface side coil 111A may be embedded in the element insulating layer 150. In other words, the coil front surface 171 of the conductor 170 may be in contact with the element insulating layer 150. In other words, the conductor 170 may be disposed closer to the layer rear surface 152 than the layer front surface 151 of the element insulating layer 150.

[0231] 20 and 21, an example of the wiring structure of the circuit region 120 will be described. The circuit region 120 includes a plurality of wiring layers 121 and a substrate-side wiring layer 122 disposed closer to the substrate 130 than the wiring layers 121.

[0232] In one example, the wiring layer 121 is formed at the same position in the Z direction as the first surface side coil 111A of the first transformer 321. That is, the surface of the wiring layer 121 is exposed from the layer surface 151 of the element insulating layer 150 and is covered with the passivation film 161. In the example shown in Fig. 20, the thickness of the wiring layer 121 is 2.8 µm. The multiple wiring layers 121 are individually and electrically connected to, for example, the first to third electrode pads 67 to 69 (see Fig. 14).

[0233] The substrate-side wiring layer 122 is embedded in the element insulating layer 150. In one example, the substrate-side wiring layer 122 includes a first wiring layer 122A, a second wiring layer 122B, and a third wiring layer 122C. The first wiring layer 122A is arranged closer to the substrate 130 in the Z direction than the second wiring layer 122B and the third wiring layer 122C. The first wiring layer 122A is arranged spaced apart in the Z direction from the layer rear surface 152 of the element insulating layer 150. In other words, the first wiring layer 122A is arranged spaced apart from the substrate 130 in the Z direction. The element insulating layer 150 is interposed between the first wiring layer 122A and the substrate 130 in the Z direction.

[0234] The circuit region 120 includes a first via 123 that connects the wiring layer 121 and the substrate-side wiring layer 122. In the example shown in Fig. 20, the first via 123 connects the wiring layer 121 and the first wiring layer 122A. The first via 123 is formed, for example, from the same material as the wiring layer 121. In the example shown in Fig. 20, the first via 123 is integrated with the wiring layer 121.

[0235] 21 , the first via 123 includes a barrier layer 123A and a metal layer 123B, similar to, for example, the conductive wire 170. The materials constituting the barrier layer 123A and the metal layer 123B are the same as, for example, the materials constituting the barrier layer 174 and the metal layer 175 of the conductive wire 170 (both of which are shown in FIG. 18 ).

[0236] 21 , the circuit region 120 includes a second via 124 connecting the first wiring layer 122A and the substrate 130, a third via 125 connecting the first wiring layer 122A and the second wiring layer 122B, and a fourth via 126 connecting the second wiring layer 122B and the third wiring layer 122C. As a result, in the example shown in Fig. 20 , the substrate-side wiring layer 122 is electrically connected to the substrate 130. The first to fourth vias 123 to 126 are formed of a material containing, for example, tungsten.

[0237] As shown in FIG. 21 , the first wiring layer 122A, the second wiring layer 122B, and the third wiring layer 122C have different thicknesses. The thickness of the first wiring layer 122A is thinner than both the thickness of the second wiring layer 122B and the thickness of the third wiring layer 122C. The thickness of the second wiring layer 122B is the same as the thickness of the third wiring layer 122C. In other words, the thicknesses of the first to third wiring layers 122A to 122C are thinner in the Z direction near the substrate 130. In other words, the thicknesses of the first to third wiring layers 122A to 122C are thicker as they move away from the substrate 130 in the Z direction. In one example, the thicknesses of the second wiring layer 122B and the third wiring layer 122C are less than twice the thickness of the first wiring layer 122A. 21 , the thickness of the first wiring layer 122A is, for example, 0.52 μm, and the thickness of the second wiring layer 122B and the third wiring layer 122C is, for example, 0.93 μm. In addition, in one example, the second wiring layer 122B is formed at the same position in the Z direction as the coil layer 111BB of the first back-side coil 111B, and the third wiring layer 122C is formed at the same position in the Z direction as the coil layer 111BA.

[0238] Effects of the First Embodiment The signal transmission device 10 of the first embodiment provides the following effects. (1-1) The signal transmission device 10 includes inter-chip wires WA that electrically connect the first chip 60 and the second chip 70, and first lead wires WB that individually connect the first chip 60 and the first lead terminals 11. The inter-chip wires WA are made of a material containing gold. The first lead wires WB are made of a material containing copper or aluminum.

[0239] The inter-chip wires WA are relatively important from the viewpoint of the insulation reliability of the signal transmission device 10, and the height and shape of the wires must be inspected with high precision. In this regard, in the first embodiment, the inter-chip wires WA are formed from a material containing gold, and therefore, when the height of the inter-chip wires WA is inspected using, for example, X-ray inspection, the inter-chip wires WA are displayed more clearly than when the inter-chip wires WA are formed from a material containing copper or aluminum. Therefore, the height of the inter-chip wires WA can be inspected accurately. Furthermore, the shape of the inter-chip wires WA can also be inspected accurately.

[0240] On the other hand, the first lead wires WB are less important than the inter-chip wires WA in terms of the insulation reliability of the signal transmission device 10. In this regard, in the first embodiment, the first lead wires WB are formed from a material containing copper or aluminum, which allows for cost reduction compared to when the first lead wires WB are formed from a material containing gold. In this way, it is possible to achieve both improved quality and cost reduction for the signal transmission device 10.

[0241] (1-2) The first lead wire WB is configured such that the surface of the copper wire is coated with palladium. With this configuration, the palladium coated on the surface of the copper wire can increase the bonding area of ​​the bonding portion between the first lead wire WB, which serves as the second bond portion of the first lead wire WB, and the first lead terminals 11 to 13. This increases the bonding strength between the first lead wire WB and the first lead terminals 11 to 13, thereby suppressing the occurrence of cracks at the bonding portions between the first lead wire WB and the first lead terminals 11 to 13.

[0242] (1-3) The signal transmission device 10 further includes a plurality of second lead wires WD that individually connect the second chip 70 to the second lead terminals 41 to 43. The second lead wires WD are formed of a material containing copper or aluminum.

[0243] According to this configuration, the second lead wire WD, which is less important than the inter-chip wire WA from the standpoint of insulation reliability of the signal transmission device 10, is formed from a material containing copper or aluminum, thereby enabling cost reduction compared to when the second lead wire WD is formed from a material containing gold.

[0244] (1-4) The second lead wire WD is a copper wire whose surface is coated with palladium. This configuration provides the same effect as that of (1-2) above.

[0245] (1-5) The signal transmission device 10 further includes a first die pad wire WC that connects the first chip 60 and the first die pad 30. The first die pad wire WC is made of a material containing copper or aluminum. This configuration provides the same effect as the effect described in (1-3) above.

[0246] (1-6) The first die pad wire WC is a copper wire whose surface is coated with palladium. This configuration provides the same effect as that of (1-2) above.

[0247] (1-7) A security bond WC1 is formed at the bonding portion between the first die pad wire WC, which is the second bond portion of the first die pad wire WC, and the first die pad 30.

[0248] According to this configuration, the security bond WC1 can thicken the second bond portion of the first die pad wire WC, thereby suppressing the occurrence of cracks in the second bond portion of the first die pad wire WC.

[0249] (1-8) The signal transmission device 10 further includes a second die pad wire WE that connects the second chip 70 and the second die pad 50. The second die pad wire WE is made of a material containing copper or aluminum. This configuration provides the same effect as the effect described in (1-3) above.

[0250] (1-9) A security bond WE1 is formed at the joint between the second die pad wire WE, which is the second bond portion of the second die pad wire WE, and the second die pad 50. This configuration provides the same effect as in (1-7) above.

[0251] (1-10) Each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 of the first chip 60 has a thickness of 2 μm or more. With this configuration, even if an inter-chip wire WA is bonded to each of the first electrode pads 67, it is possible to prevent cracks from occurring in the element insulating layer 150 directly below each of the first electrode pads 67. Even if a first lead wire WB is bonded to each of the second electrode pads 68, it is possible to similarly prevent cracks from occurring in the element insulating layer 150. Even if a first die pad wire WC is bonded to each of the third electrode pads 69, it is possible to similarly prevent cracks from occurring in the element insulating layer 150.

[0252] (1-11) The sealing resin 90 contains sulfur as an additive. The concentration of sulfur added is 300 μg / g or less. This configuration can reduce sulfide corrosion of copper wires whose surfaces are coated with palladium, such as the first lead wire WB, the second lead wire WD, the first die pad wire WC, and the second die pad wire WE.

[0253] (1-12) A plating layer 29 is formed on the inner lead surface 21B of the wire connection portion 11AA of the first inner lead portion 11A of the first lead terminal 11. The plating layer 29 is not formed on the end of the inner lead surface 21B of the wire connection portion 11AA on the opposing surface 24B side, and the end is in contact with the sealing resin 90.

[0254] This configuration can prevent peeling of the plating layer 29 at the end of the wire connection portion 11AA on the inner lead surface 21B near the opposing surface 24B from occurring between the sealing resin 90. Note that the wire connection portions 12AA, 13AA of the first lead terminals 12, 13 have a similar configuration, and therefore the same effect can be obtained.

[0255] (1-13) A plating layer 29 is formed on the inner lead surface 21B of the wire connection portion 41AA of the second inner lead portion 41A of the second lead terminal 41. The plating layer 29 is not formed on the end of the inner lead surface 21B of the wire connection portion 41AA on the opposing surface 24B side, and the end is in contact with the sealing resin 90.

[0256] This configuration can suppress peeling of the plating layer 29 at the end of the wire connection portion 41AA on the inner lead surface 21B near the opposing surface 24B from the sealing resin 90. Note that the wire connection portions 42AA, 43AA of the second lead terminals 42, 43 have a similar configuration, and therefore the same effect can be obtained.

[0257] (1-14) A plating layer 26 is formed on the outer lead surface 21A, outer lead back surface 22A, and outer lead side surface 23A of the outer lead body 20A of the first outer lead portions 11B to 14B. The plating layer 26 is formed continuously from the outer lead back surface 22A to the outer lead surface 21A on the outer lead end surface 24A. The plating layer 26 is spaced apart from the outer lead surface 21A.

[0258] With this configuration, when the signal transmission device 10 is mounted on the circuit board PCB using the conductive bonding material SD, the conductive bonding material SD comes into contact with the plating layer 26 formed on the outer lead end surface 24A. This causes the conductive bonding material SD in contact with the outer lead end surface 24A to form a fillet. This makes it easy to check the state in which the signal transmission device 10 is mounted on the circuit board PCB.

[0259] (1-15) The outer surface of the sealing resin 90 is formed so that the surface roughness Rz is 8 μm or more. This configuration increases the creepage distance through the sealing resin 90 between the first lead terminals 11 to 14 and the second lead terminals 41 to 44. This improves the dielectric strength between the first lead terminals 11 to 14 and the second lead terminals 41 to 44.

[0260] 22 and 23, a signal transmission device 10 according to a second embodiment will be described. The signal transmission device 10 according to the second embodiment differs from the signal transmission device 10 according to the first embodiment in the configuration of the first frame 10A and the second frame 10B. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be denoted by the same reference numerals and will not be described again.

[0261] As shown in FIG. 22 , the shape of the inner lead portion 11A of the first lead terminal 11 of the first frame 10A, among the first lead terminals 11-14, is different from that of the first embodiment. More specifically, in a plan view, the wire connection portion 11AA extends obliquely away from the first sealing side surface 93 as it moves from the fourth sealing side surface 96 toward the third sealing side surface 95. Here, the direction in which the wire connection portion 11AA extends is referred to as the extension direction (second direction), and the direction perpendicular to the extension direction in a plan view is referred to as the width direction. In the example shown in FIG. 22 , the extension direction is the direction in which the imaginary line L1 extends. In a plan view, the extension direction of the wire connection portion 11AA is the longitudinal direction, and the width direction is the lateral direction. In one example, the acute angle formed between the X direction and the extension direction (imaginary line L1) is greater than or equal to 10° and less than or equal to 20°. In the example shown in FIG. 22 , the acute angle formed between the X direction and the extension direction (imaginary line L1) is approximately 15°.

[0262] The wire bonding portion 11AA has a tip surface 11AE. The tip surface 11AE is the surface of the wire bonding portion 11AA that faces the first die pad 30. It can also be said that the tip surface 11AE is the surface that faces the first die pad 30 in a plan view. The tip surface 11AE is the surface of the wire bonding portion 11AA that faces the first chip 60. It can also be said that the tip surface 11AE is the surface that faces the first chip 60 in a plan view.

[0263] In a plan view, the tip surface 11AE of the wire connection portion 11AA is inclined with respect to the X direction. More specifically, in a plan view, the tip surface 11AE is inclined toward the first sealing side surface 93 as it moves from the fourth sealing side surface 96 toward the third sealing side surface 95. In one example, in a plan view, the tip surface 11AE is perpendicular to the extension direction of the wire connection portion 11AA. In other words, in a plan view, the tip surface 11AE is perpendicular to the imaginary line L1.

[0264] The wire connection portion 11AA has an inclined surface 11AF. In a plan view, the inclined surface 11AF is formed in a portion of the wire connection portion 11AA closer to the tip surface 11AE. The inclined surface 11AF faces the second die pad 50. Therefore, in a plan view, the inclined surface 11AF extends along the Y direction. The portion of the wire connection portion 11AA closer to the tip surface 11AE has a shape in which the corner portion is cut out by the inclined surface 11AF.

[0265] A single first lead wire WB is connected to the wire connection portion 11AA. In plan view, the first lead wire WB extends from the first bond portion of the first chip 60 so as to pass through the tip surface 11AE of the wire connection portion 11AA. The first lead wire WB that has passed through the tip surface 11AE of the wire connection portion 11AA in plan view is then joined to the central portion in the width direction of the wire connection portion 11AA.

[0266] In one example, in a plan view, the acute angle formed between the first lead wire WB connected to the wire connection portion 11AA and the extension direction of the wire connection portion 11AA is 20° or less. In one example, the acute angle formed between the first lead wire WB connected to the wire connection portion 11AA and the extension direction of the wire connection portion 11AA is 15° or less. In one example, the acute angle formed between the first lead wire WB connected to the wire connection portion 11AA and the extension direction of the wire connection portion 11AA is 10° or less. In one example, the acute angle formed between the first lead wire WB connected to the wire connection portion 11AA and the extension direction of the wire connection portion 11AA is 5° or less. It is preferable that the extension direction of the first lead wire WB connected to the wire connection portion 11AA is parallel to the extension direction of the wire connection portion 11AA. Here, the acute angle formed by the first lead wire WB connected to the wire connection portion 11AA and the extension direction of the wire connection portion 11AA can also be said to be the acute angle formed by the first lead wire WB connected to the wire connection portion 11AA and the virtual line L1.

[0267] In one example, the acute angle formed between the first lead wire WB connected to the wire connecting portion 11AA and the tip surface 11AE of the wire connecting portion 11AA is equal to or greater than 70° and less than 90° in a plan view. In another example, the acute angle formed between the first lead wire WB connected to the wire connecting portion 11AA and the tip surface 11AE is equal to or greater than 80° and less than 90°. In another example, the acute angle formed between the first lead wire WB connected to the wire connecting portion 11AA and the tip surface 11AE is equal to or greater than 85° and less than 90°. It is preferable that the direction in which the first lead wire WB connected to the wire connecting portion 11AA extends is perpendicular to the tip surface 11AE in a plan view.

[0268] In the second embodiment, the first frame 10A differs from the first embodiment only in the shape of the first lead terminal 11, but this is not limiting. For example, the first frame 10A may have two first lead terminals, the first lead terminals 11 and 12, with different shapes. In this case, the first lead terminal 12 may have a shape in which the wire connection portion 12AA extends obliquely, similar to the first lead terminal 11. Furthermore, the first lead wire WB connected to the wire connection portion 12AA may be joined to a portion of the wire connection portion 12AA of the first lead terminal 12 that is closer to the lead connection portion 12AB.

[0269] As shown in FIG. 23 , the shape of the inner lead portions 41A, 42A of the second lead terminals 41, 42 of the second frame 10B differs from that of the first embodiment. In a plan view, the wire connection portion 41AA extends obliquely away from the second sealing side surface 94 as it moves from the third sealing side surface 95 toward the fourth sealing side surface 96. Here, the direction in which the wire connection portion 41AA extends is referred to as a first extension direction (second direction), and the direction perpendicular to the first extension direction in a plan view is referred to as a first width direction. In the example shown in FIG. 23 , the first extension direction is the direction in which the imaginary line L2 extends. In a plan view, the first extension direction of the wire connection portion 41AA is the longitudinal direction, and the first width direction is the lateral direction. In one example, the acute angle between the X direction and the first extension direction (imaginary line L2) is greater than or equal to 10° and less than or equal to 20°. In the example shown in FIG. 23, the acute angle formed between the X direction and the first extension direction (virtual line L2) is about 15°.

[0270] The wire connection portion 41AA has a tip surface 41AE. The tip surface 41AE is the surface of the wire connection portion 41AA that faces the second die pad 50. The tip surface 41AE can also be said to be the surface that faces the second die pad 50 in a plan view. The tip surface 41AE is the surface of the wire connection portion 41AA that faces the second chip 70. The tip surface 41AE can also be said to be the surface that faces the second chip 70 in a plan view.

[0271] In a plan view, the tip surface 41AE of the wire connection portion 41AA is inclined with respect to the X direction. More specifically, in a plan view, the tip surface 41AE is inclined toward the second sealing side surface 94 as it moves from the third sealing side surface 95 to the fourth sealing side surface 96. In one example, in a plan view, the tip surface 41AE is orthogonal to the first extension direction of the wire connection portion 41AA. In other words, in a plan view, the tip surface 41AE is orthogonal to the imaginary line L2.

[0272] The wire connection portion 41AA has an inclined surface 41AF. In plan view, the inclined surface 41AF is formed in a portion of the wire connection portion 41AA closer to the tip surface 41AE. The inclined surface 41AF faces the first die pad 30. Therefore, in plan view, the inclined surface 41AF extends along the Y direction. The inclined surface 41AF forms a shape in which the corner of the portion of the wire connection portion 41AA closer to the tip surface 41AE is notched.

[0273] In a plan view, the wire connection portion 42AA extends obliquely away from the second sealing side surface 94 as it moves from the third sealing side surface 95 toward the fourth sealing side surface 96. Here, the direction in which the wire connection portion 42AA extends is referred to as a second extension direction (second direction), and the direction perpendicular to the second extension direction in a plan view is referred to as a second width direction. In the example shown in FIG. 23 , the second extension direction is the direction in which the imaginary line L3 extends. In a plan view, the second extension direction is the longitudinal direction of the wire connection portion 42AA, and the second width direction is the lateral direction. In one example, the acute angle formed between the X direction and the second extension direction (imaginary line L3) is greater than or equal to 10° and less than or equal to 20°. In the example shown in FIG. 23 , the acute angle formed between the X direction and the second extension direction (imaginary line L3) is approximately 15°.

[0274] The wire connection portion 42AA has a front end surface 42AE. The front end surface 42AE is the surface of the wire connection portion 42AA that faces the second die pad 50. The front end surface 42AE can also be said to be the surface that faces the second die pad 50 in a plan view. The front end surface 42AE is the surface of the wire connection portion 42AA that faces the second chip 70. The front end surface 42AE can also be said to be the surface that faces the second chip 70 in a plan view.

[0275] In a plan view, the tip surface 42AE of the wire connection portion 42AA is inclined with respect to the X direction. More specifically, in a plan view, the tip surface 42AE is inclined toward the second sealing side surface 94 as it moves from the third sealing side surface 95 to the fourth sealing side surface 96. In one example, in a plan view, the tip surface 42AE is perpendicular to the second extension direction of the wire connection portion 42AA. In other words, in a plan view, the tip surface 42AE is perpendicular to the imaginary line L3.

[0276] 23 , the maximum distance in the X direction between the wire connection portion 42AA and the second sealing side surface 94 in a plan view is smaller than the maximum distance in the X direction between the wire connection portion 41AA and the second sealing side surface 94 in a plan view. Therefore, the minimum distance in the X direction between the second die pad 50 and the wire connection portion 42AA is larger than the minimum distance in the X direction between the second die pad 50 and the wire connection portion 41AA. These minimum distances are, for example, larger than the distance in the Y direction between the first die pad 30 and the second die pad 50. The relationship between these minimum distances and the distance in the Y direction between the first die pad 30 and the second die pad 50 can be changed as desired. In one example, these minimum distances may be equal to the distance in the Y direction between the first die pad 30 and the second die pad 50. Furthermore, these minimum distances may be smaller than the distance in the Y direction between the first die pad 30 and the second die pad 50.

[0277] One second lead wire WD is connected to the wire connection portion 41AA. In plan view, the second lead wire WD extends from the first bond portion of the second chip 70 so as to pass through the tip surface 41AE of the wire connection portion 41AA. The second lead wire WD that has passed through the tip surface 41AE of the wire connection portion 41AA in plan view is joined to the center portion in the width direction of the wire connection portion 41AA.

[0278] In one example, in a plan view, the acute angle formed between the second lead wire WD connected to the wire connection portion 41AA and the first extension direction of the wire connection portion 41AA is 10° or less. In another example, the acute angle formed between the second lead wire WD connected to the wire connection portion 41AA and the first extension direction of the wire connection portion 41AA is 5° or less. In another example, the acute angle formed between the second lead wire WD connected to the wire connection portion 41AA and the first extension direction of the wire connection portion 41AA is 3° or less. It is preferable that the extension direction of the second lead wire WD connected to the wire connection portion 41AA is parallel to the first extension direction of the wire connection portion 41AA. Here, the acute angle formed between the second lead wire WD connected to the wire connection portion 41AA and the first extension direction of the wire connection portion 41AA can also be referred to as the acute angle formed between the second lead wire WD connected to the wire connection portion 41AA and the virtual line L2.

[0279] In one example, in a plan view, the acute angle formed between the second lead wire WD connected to the wire connection portion 41AA and the tip surface 41AE of the wire connection portion 41AA is not less than 70° and less than 90°. In another example, the acute angle formed between the second lead wire WD connected to the wire connection portion 41AA and the tip surface 41AE is not less than 80° and less than 90°. In another example, the acute angle formed between the second lead wire WD connected to the wire connection portion 41AA and the tip surface 41AE is not less than 85° and less than 90°. It is preferable that the direction in which the second lead wire WD connected to the wire connection portion 41AA extends is perpendicular to the tip surface 41AE.

[0280] One second lead wire WD is connected to the wire connection portion 42AA. In plan view, the second lead wire WD extends from the first bond portion of the second chip 70 so as to pass through the tip surface 42AE of the wire connection portion 42AA. The second lead wire WD that has passed through the tip surface 42AE of the wire connection portion 42AA in plan view is joined near the center portion in the width direction of the wire connection portion 42AA.

[0281] In one example, in a plan view, the acute angle formed between the second lead wire WD connected to the wire connection portion 42AA and the second extension direction of the wire connection portion 42AA is 20° or less. In another example, the acute angle formed between the second lead wire WD connected to the wire connection portion 42AA and the second extension direction of the wire connection portion 42AA is 15° or less. In another example, the acute angle formed between the second lead wire WD connected to the wire connection portion 42AA and the second extension direction of the wire connection portion 42AA is 10° or less. In another example, the acute angle formed between the second lead wire WD connected to the wire connection portion 42AA and the second extension direction of the wire connection portion 42AA is 5° or less. It is preferable that the extension direction of the second lead wire WD connected to the wire connection portion 42AA and the second extension direction of the wire connection portion 42AA are parallel to each other. Here, the acute angle formed by the second lead wire WD connected to the wire connection portion 42AA and the second extension direction of the wire connection portion 42AA can also be said to be the acute angle formed by the second lead wire WD connected to the wire connection portion 42AA and the virtual line L3.

[0282] In one example, the acute angle formed between the second lead wire WD connected to the wire connection portion 42AA and the tip surface 42AE of the wire connection portion 42AA is equal to or greater than 70° and less than 90° in a plan view. In another example, the acute angle formed between the second lead wire WD connected to the wire connection portion 42AA and the tip surface 42AE is equal to or greater than 80° and less than 90°. In another example, the acute angle formed between the second lead wire WD connected to the wire connection portion 42AA and the tip surface 42AE is equal to or greater than 85° and less than 90°. It is preferable that the direction in which the second lead wire WD connected to the wire connection portion 42AA extends is perpendicular to the tip surface 42AE in a plan view.

[0283] [Effects] The signal transmission device 10 of the second embodiment has the following effects: (2-1) The wire connection portion 11AA of the first lead terminal 11 includes a tip end surface 11AE that intersects with the first lead wire WB connected to the wire connection portion 11AA in a plan view. The tip end surface 11AE faces the first die pad 30.

[0284] With this configuration, the first lead wire WB extends in roughly the same direction as the wire connection portion 11AA in a plan view, so that the first lead wire WB can be bonded while preventing it from shifting relative to the wire connection portion 11AA. This prevents a portion of the bonded portion of the first lead wire WB from coming off the wire connection portion 11AA. Therefore, the first lead wire WB can be stably bonded to the wire connection portion 11AA.

[0285] (2-2) The wire connection portions 41AA and 42AA of the second lead terminals 41 and 42 include front end surfaces 41AE and 42AE that intersect with the second lead wires WD connected to the wire connection portions 41AA and 42AA in a plan view. The front end surfaces 41AE and 42AE face the second die pad 50.

[0286] With this configuration, the second lead wire WD extends in roughly the same direction as the wire connection portions 41AA, 42AA in a plan view, so that the second lead wire WD can be bonded while preventing it from shifting relative to the wire connection portions 41AA, 42AA. This prevents a portion of the bonded portion of the second lead wire WD from coming off the wire connection portions 41AA, 42AA. Therefore, the second lead wire WD can be stably bonded to the wire connection portions 41AA, 42AA.

[0287] (2-3) In a plan view, the first lead wire WB connected to the wire connection portion 11AA is perpendicular to the tip surface 11AE of the wire connection portion 11AA. With this configuration, it is easier to confirm the joining position of the first lead wire WB with the wire connection portion 11AA compared to when the first lead wire WB extends along the side surface of the wire connection portion 11AA.

[0288] (2-4) In plan view, the first lead wires WB connected to the wire connecting portions 41AA, 42AA are perpendicular to the tip surfaces 41AE, 42AE of the wire connecting portions 41AA, 42AA.

[0289] With this configuration, it is easier to confirm the joining positions of the first lead wires WB with the wire connecting portions 41AA, 42AA, compared to when the first lead wires WB extend along the side surfaces of the wire connecting portions 41AA, 42AA.

[0290] (2-5) The wire connection portion 11AA of the first lead terminal 11 includes an inclined surface 11AF. With this configuration, the inclined surface 11AF forms a corner of the portion of the wire connection portion 11AA near the tip surface 11AE, with the corner notched. This allows a large distance to be secured between the wire connection portion 11AA and the second die pad 50 in the X direction.

[0291] (2-6) The wire connection portion 41AA of the second lead terminal 41 includes an inclined surface 41AF. With this configuration, the inclined surface 41AF forms a notched corner in the portion of the wire connection portion 41AA near the tip surface 41AE. This allows a large distance to be secured between the wire connection portion 41AA and the first die pad 30 in the X direction.

[0292] <Third Embodiment> A signal transmission device 10 of a third embodiment will be described with reference to Figure 24. The signal transmission device 10 of the third embodiment differs from the signal transmission device 10 of the first embodiment in the configuration of the inter-chip wire WA. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be assigned the same reference numerals and their description will be omitted.

[0293] 24 , the two first electrode pads 77A and 77B of the second chip 70 are arranged at the same position in the X direction as the two first electrode pads 67A and 67B of the first chip 60. More specifically, the first electrode pad 77A is arranged at the same position in the X direction as the first electrode pad 67A, and the first electrode pad 77B is arranged at the same position in the X direction as the first electrode pad 67B.

[0294] For this reason, the two inter-chip wires WA are formed so as to be parallel to each other in a planar view. Here, if the acute angle formed by the two inter-chip wires WA in a planar view is 5° or less, it can be said that the two inter-chip wires WA are parallel to each other. In one example, the acute angle formed by the two inter-chip wires WA in a planar view is between 0° and 3°. In another example, the acute angle formed by the two inter-chip wires WA in a planar view is between 3° and 5°.

[0295] In the third embodiment, the two inter-chip wires WA extend along the Y direction in a plan view. In one example, the acute angle formed between each inter-chip wire WA and the Y direction in a plan view is 5° or less. In one example, the acute angle formed between each inter-chip wire WA and the Y direction in a plan view is 0° or more and 3° or less. In one example, the acute angle formed between each inter-chip wire WA and the Y direction in a plan view is more than 3° and 5° or less.

[0296] Furthermore, each inter-chip wire WA is perpendicular to a side extending in the Y direction of the first chip 60 in a plan view. Here, if the angle formed between each inter-chip wire WA and a side extending in the Y direction of the first chip 60 in a plan view is 85° or more and 95° or less, it can be said that each inter-chip wire WA is perpendicular to the side extending in the Y direction of the first chip 60 in a plan view.

[0297] Furthermore, in a plan view, each inter-chip wire WA is perpendicular to the long side (the side extending along the Y direction) of the second chip 70. Here, if the angle formed between each inter-chip wire WA and the long side of the second chip 70 in a plan view is between 85° and 95°, it can be said that each inter-chip wire WA is perpendicular to the long side of the second chip 70 in a plan view.

[0298] [Effects] According to the third embodiment, the following effects can be obtained: (3-1) The two inter-chip wires WA connecting the first chip 60 and the second chip 70 are formed so as to be parallel to each other in a plan view.

[0299] According to this configuration, when inspecting the wire heights of two inter-chip wires WA, variations in the wire heights of the two inter-chip wires WA are less likely to occur, and therefore the wire heights of the two inter-chip wires WA can be inspected with high precision.

[0300] <Fourth Embodiment> A signal transmission device 10 of a fourth embodiment will be described with reference to Fig. 25. The signal transmission device 10 of the fourth embodiment differs from the signal transmission device 10 of the first embodiment mainly in the configuration of the first frame 10A and the second frame 10B. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be assigned the same reference numerals and their description will be omitted.

[0301] 25, in the fourth embodiment, the shape of the first inner lead portion 14A of the first lead terminal 14 is different from that in the first embodiment. More specifically, the first inner lead portion 14A includes a first outer lead connection portion 14AB1 and a first die pad connection portion 14AB2.

[0302] The first outer lead connection portion 14AB1 is a portion that connects to the first outer lead portion 14B and extends along the X direction. As in the first embodiment, the first outer lead portion 14B is disposed offset in the Y direction toward the third sealing side surface 95 with respect to the first die pad 30. Therefore, the first outer lead connection portion 14AB1 is disposed offset in the Y direction toward the third sealing side surface 95 with respect to the first die pad 30.

[0303] The first die pad connection portion 14AB2 is a portion that connects the first outer lead connection portion 14AB1 and the first die pad 30. The first die pad connection portion 14AB2 is connected to one of the four corner portions of the first die pad 30 that is closer to the first sealing side surface 93 and the third sealing side surface 95. The first die pad connection portion 14AB2 extends obliquely in a straight line from the first sealing side surface 93 toward the second sealing side surface 94 and from the third sealing side surface 95 toward the fourth sealing side surface 96. More specifically, in a plan view, as indicated by the arrows on the first die pad connection portion 14AB2 in FIG. 25 , the extension direction of the first die pad connection portion 14AB2 is toward the intersection of the two-dot chain lines on the first die pad 30 in FIG. 25 . Here, the intersection of the two-dot chain lines on the first die pad 30 indicates the center of gravity of the first die pad 30. That is, in a plan view, the first die pad connection portion 14AB2 extends toward the center of gravity of the first die pad 30.

[0304] A curved recess 36 is formed between the first die pad connection portion 14AB2 and the first die pad 30. The curved recess 36 is formed at an end of the first die pad connection portion 14AB2 closer to the fourth sealing side surface 96. The arc size of the curved recess 36 is smaller than the arc length of the third curved surface 33. The arc size of the curved recess 36 is equal to the arc lengths of the first curved surface 31 and the second curved surface 32, for example. Note that the arc size of the curved recess 36 can be changed arbitrarily and may be larger than the arc lengths of the first curved surface 31 and the second curved surface 32. The curved recess 36 may also be omitted.

[0305] In the fourth embodiment, the shape of the second inner lead portion 44A of the second lead terminal 44 is different from that of the first embodiment. More specifically, the second inner lead portion 44A includes a second outer lead connection portion 44AB1 and a second die pad connection portion 44AB2.

[0306] The second outer lead connection portion 44AB1 is a portion that connects to the second outer lead portion 44B and extends along the X direction. As in the first embodiment, the second outer lead portion 44B is disposed offset in the Y direction toward the fourth sealing side surface 96 with respect to the second die pad 50. Therefore, the second outer lead connection portion 44AB1 is disposed offset in the Y direction toward the fourth sealing side surface 96 with respect to the second die pad 50.

[0307] The second die pad connection portion 44AB2 is a portion that connects the second outer lead connection portion 44AB1 and the second die pad 50. The second die pad connection portion 44AB2 is connected to one of the four corner portions of the second die pad 50 that is closer to the second sealing side surface 94 and the fourth sealing side surface 96. The second die pad connection portion 44AB2 extends obliquely in a straight line from the second sealing side surface 94 toward the first sealing side surface 93 and from the fourth sealing side surface 96 toward the third sealing side surface 95. More specifically, in a plan view, as indicated by the arrows on the second die pad connection portion 44AB2 in FIG. 25 , the extension direction of the second die pad connection portion 44AB2 is toward the intersection of the two-dot chain lines on the second die pad 50 in FIG. 25 . Here, the intersection of the two-dot chain lines on the second die pad 50 indicates the center of gravity of the second die pad 50. That is, in a plan view, the second die pad connection portion 44AB2 extends toward the center of gravity of the second die pad 50.

[0308] A curved recess 56 is formed between the second die pad connection portion 44AB2 and the second die pad 50. The curved recess 56 is formed at an end of the second die pad connection portion 44AB2 closer to the third sealing side surface 95. The arc size of the curved recess 56 is smaller than the arc length of the third curved surface 53. The arc size of the curved recess 56 is equal to the arc lengths of the first curved surface 51 and the second curved surface 52, for example. Note that the arc size of the curved recess 56 can be changed arbitrarily and may be larger than the arc lengths of the first curved surface 51 and the second curved surface 52. Alternatively, the curved recess 56 may be omitted.

[0309] 25, in the fourth embodiment, the arrangement of the second electrode pads 68 of the first chip 60 is different from that of the first embodiment. The arrangement of the second electrode pads 68 shown in Fig. 25 is one example, and may be the same as the arrangement of the second electrode pads 68 of the first chip 60 of the first embodiment.

[0310] [Effects] The signal transmission device 10 of the fourth embodiment has the following effects: (4-1) The first lead terminal 14 includes a first outer lead connection portion 14AB1 that is disposed at least partially offset with respect to the first die pad 30, and a first die pad connection portion 14AB2 that is connected to the first die pad 30. The first die pad connection portion 14AB2 extends in a straight line obliquely from the first outer lead connection portion 14AB1 toward the center of gravity of the first die pad 30 in a plan view.

[0311] This configuration reduces the amount of deformation of the first inner lead portion 14A and the first die pad 30 relative to the first outer lead portion 14B, thereby preventing force from being applied to the inter-chip wires WA and the first lead wires WB due to deformation of the first die pad 30.

[0312] (4-2) The second lead terminal 44 includes a second outer lead connection portion 44AB1 that is disposed at least partially offset with respect to the second die pad 50, and a second die pad connection portion 44AB2 that is connected to the second die pad 50. The second die pad connection portion 44AB2 extends in a straight line obliquely from the second outer lead connection portion 44AB1 toward the center of gravity of the second die pad 50 in a plan view.

[0313] This configuration can reduce the amount of deformation of the second inner lead portion 44A and the second die pad 50 relative to the second outer lead portion 44B, thereby preventing force from being applied to the inter-chip wires WA and the second lead wires WD due to deformation of the second die pad 50.

[0314] Fifth Embodiment A signal transmission device 10 of a fifth embodiment will be described with reference to Figures 26 and 27. The signal transmission device 10 of the fifth embodiment differs from the signal transmission device 10 of the first embodiment mainly in the configuration of the first frame 10A and the second frame 10B. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be assigned the same reference numerals and their description will be omitted.

[0315] The first frame 10A of the fifth embodiment differs from the first embodiment in the configuration of the first lead terminals 11 to 13 among the first lead terminals 11 to 14. More specifically, as shown in Fig. 26, the first inner lead portions 11A to 13A of the first lead terminals 11 to 13 have through holes 11AG to 13AG formed therein, which penetrate the first inner lead portions 11A to 13A in their thickness direction (Z direction). Furthermore, the first inner lead portions 11A, 12A have through holes 11AH, 12AH formed therein, which penetrate the first inner lead portions 11A, 12A in their thickness direction.

[0316] The through holes 11AG to 13AG, 11AH, and 12AH are filled with sealing resin 90. In other words, the sealing resin 90 filled in the through holes 11AG to 13AG, 11AH, and 12AH connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 2) than the first inner lead portions 11A to 13A with the sealing resin 90 provided closer to the sealing back surface 92 (see FIG. 2) than the first inner lead portions 11A to 13A.

[0317] Here, the first lead terminal 14 is integrated with the first die pad 30 and therefore corresponds to the "first connection terminal." The first lead terminals 11 to 13 are disposed apart from the first die pad 30 and therefore correspond to the "first remote terminals." Because the through holes 11AG to 13AG, 11AH, and 12AH are formed in the first lead terminals 11 to 13, it can be said that the first remote terminals have through holes that penetrate through the first remote terminals in the thickness direction. On the other hand, the first connection terminals do not have through holes.

[0318] In the example shown in FIG. 26 , the through hole 11AG is formed in the lead connection portion 11AB of the first inner lead portion 11A. The shape of the through hole 11AG in plan view is circular. The through hole 11AH is formed in the wire connection portion 11AA. In one example, the through hole 11AH is formed in a portion of the wire connection portion 11AA closer to the lead connection portion 11AB. The shape of the through hole 11AH in plan view is an ellipse with its major axis oriented in the Y-axis direction. Note that the shapes of the through holes 11AG, 11AH in plan view can be changed as desired.

[0319] The first lead wire WB corresponding to the wire connection portion 11AA is joined to a portion of the wire connection portion 11AA that is closer to the first chip 60 than the through hole 11AH. The second bond portion of the first lead wire WB is disposed spaced apart from the through hole 11AH in the Y direction in a plan view.

[0320] The through hole 12AG is formed in the lead connection portion 12AB of the first inner lead portion 12A. The shape of the through hole 12AG in plan view is circular. In one example, the diameter of the through hole 12AG is the same as the diameter of the through hole 11AG. The through hole 12AH is formed in the wire connection portion 12AA. In one example, the through hole 12AH is formed in a portion of the wire connection portion 12AA closer to the lead connection portion 12AB. In plan view, the shape of the through hole 12AH is elliptical, with its major axis oriented in the Y-axis direction. In one example, the lengths of the major and minor axes of the through hole 12AH are the same as the lengths of the major and minor axes of the through hole 11AH. Note that the shape and size of each of the through holes 12AG and 12AH in plan view can be changed as desired.

[0321] The first lead wire WB corresponding to the wire connection portion 12AA is bonded to a portion of the wire connection portion 12AA that is closer to the first chip 60 than the through hole 12AH. The second bond portion of the first lead wire WB is disposed spaced apart from the through hole 12AH in the Y direction in a plan view.

[0322] The through hole 13AG is formed in the lead connection portion 13AB of the first inner lead portion 13A. The through hole 13AG has a circular shape in a plan view. In one example, the diameter of the through hole 13AG is the same as the diameter of the through hole 11AG.

[0323] The first lead wire WB corresponding to the wire connection portion 13AA is bonded to a portion of the wire connection portion 13AA that is closer to the first chip 60 than the through hole 13AG. The second bond portion of the first lead wire WB is disposed at a distance from the through hole 13AG in both the X direction and the Y direction in a plan view.

[0324] The positions at which the through holes 11AG to 13AG are formed can be arbitrarily changed. For example, the through holes 11AG to 13AG can be formed across the wire connection portions 11AA to 13AA and the lead connection portions 11AB to 13AB. The positions at which the through holes 11AH and 12AH are formed can be arbitrarily changed. For example, the through hole 11AH can be formed closer to the tip surface of the wire connection portion 11AA than the second bond portion of the first lead wire WB connected to the wire connection portion 11AA. For example, the through hole 12AH can be formed closer to the tip surface of the wire connection portion 12AA than the second bond portion of the first lead wire WB connected to the wire connection portion 12AA.

[0325] The second frame 10B of the fifth embodiment differs from the first embodiment in the configuration of the second lead terminals 41 to 43 among the second lead terminals 41 to 44. More specifically, as shown in Fig. 27, the second inner lead portions 41A to 43A of the second lead terminals 41 to 43 have through holes 41AG to 43AG formed therein, which penetrate the second inner lead portions 41A to 43A in their thickness direction (Z direction). Furthermore, the second inner lead portions 41A, 42A have through holes 41AH, 42AH formed therein, which penetrate the second inner lead portions 41A, 42A in their thickness direction.

[0326] The through holes 41AG to 43AG, 41AH, and 42AH are filled with sealing resin 90. In other words, the sealing resin 90 filled in the through holes 41AG to 43AG, 41AH, and 42AH connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 2) than the second inner lead portions 41A to 43A with the sealing resin 90 provided closer to the sealing back surface 92 (see FIG. 2) than the second inner lead portions 41A to 43A.

[0327] Here, the second lead terminal 44 is integrated with the second die pad 50 and therefore corresponds to a "second connection terminal." The second lead terminals 41 to 43 are disposed apart from the second die pad 50 and therefore correspond to "second remote terminals." Because the through holes 41AG to 43AG, 41AH, and 42AH are formed in the second lead terminals 41 to 43, it can be said that the second remote terminals have through holes that penetrate through the second remote terminals in the thickness direction. On the other hand, the second connection terminals do not have through holes.

[0328] In the example shown in FIG. 27 , the through hole 41AG is formed in the lead connection portion 41AB of the second inner lead portion 41A. The shape of the through hole 41AG in plan view is circular. The through hole 41AH is formed in the wire connection portion 41AA. In one example, the through hole 41AH is formed in a portion closer to the tip end of the wire connection portion 41AA. The shape of the through hole 41AH in plan view is an ellipse with its major axis oriented in the Y-axis direction. Note that the shapes of the through holes 41AG, 41AH in plan view can be changed as desired.

[0329] The second lead wire WD corresponding to the wire connection portion 41AA is joined to a portion of the wire connection portion 11AA that is farther from the second chip 70 than the through hole 41AH. The second bond portion of the second lead wire WD is disposed spaced apart from the through hole 41AH in the Y direction in plan view.

[0330] The through hole 42AG is formed in the lead connection portion 42AB of the second inner lead portion 42A. The shape of the through hole 42AG in plan view is circular. In one example, the diameter of the through hole 42AG is the same as the diameter of the through hole 41AG. The through hole 42AH is formed in the wire connection portion 42AA. In one example, the through hole 42AH is formed in a portion of the wire connection portion 42AA closer to the lead connection portion 42AB. In plan view, the shape of the through hole 42AH is elliptical, with its major axis oriented in the Y-axis direction. In one example, the lengths of the major and minor axes of the through hole 42AH are the same as the lengths of the major and minor axes of the through hole 41AH. Note that the shape and size of each of the through holes 42AG and 42AH in plan view can be changed as desired.

[0331] The second lead wire WD corresponding to the wire connection portion 42AA is joined to a portion of the wire connection portion 42AA that is closer to the second chip 70 than the through hole 42AH. The second bond portion of the second lead wire WD is disposed spaced apart from the through hole 42AH in the Y direction in plan view.

[0332] The through hole 43AG is formed in the lead connection portion 43AB of the second inner lead portion 43A. The through hole 43AG has a circular shape in a plan view. In one example, the diameter of the through hole 43AG is the same as the diameter of the through hole 41AG.

[0333] The second lead wire WD corresponding to the wire connection portion 43AA is joined to a portion of the wire connection portion 43AA that is closer to the second chip 70 than the through hole 43AG. The second bond portion of the second lead wire WD is disposed at a distance from the through hole 43AG in both the X direction and the Y direction in a plan view.

[0334] The positions at which the through holes 41AG to 43AG are formed can be arbitrarily changed. For example, the through holes 41AG to 43AG can be formed across the wire connection portions 41AA to 43AA and the lead connection portions 41AB to 43AB. The positions at which the through holes 41AH and 42AH are formed can be arbitrarily changed. For example, the through hole 41AH can be formed closer to the lead connection portion 11AB than the second bond portion of the second lead wire WD connected to the wire connection portion 11AA. For example, the through hole 42AH can be formed closer to the tip surface of the wire connection portion 12AA than the second bond portion of the second lead wire WD connected to the wire connection portion 12AA.

[0335] [Effects] The signal transmission device 10 of the fifth embodiment has the following effects: (5-1) The first lead terminals 11 to 14 have through holes 11AG to 13AG. The through holes 11AG to 13AG are filled with a sealing resin 90.

[0336] According to this configuration, the sealing resin 90 filled in the through holes 11AG to 13AG can prevent the first lead terminals 11 to 13 from moving when an external force is applied to the first lead terminals 11 to 13. Therefore, it is possible to prevent force from being applied to the first lead wires WB due to the movement of the first lead terminals 11 to 13.

[0337] (5-2) The first lead terminals 11 and 12 have through holes 11AH and 12AH formed in the wire connection portions 11AA and 12AA. The through holes 11AH and 12AH are filled with a sealing resin 90.

[0338] With this configuration, the through holes 11AH, 12AH are formed in the wire connection portions 11AA, 12AA, which are relatively long in the Y direction, and therefore movement of the wire connection portions 11AA, 12AA can be suppressed by the sealing resin 90 filled in the through holes 11AH, 12AH, thereby suppressing force from being applied to the first lead wire WB due to movement of the wire connection portions 11AA, 12AA.

[0339] (5-3) The second lead terminals 41 to 43 have through holes 41AG to 43AG. The through holes 41AG to 43AG are filled with sealing resin 90. With this configuration, the sealing resin 90 filled in the through holes 41AG to 43AG can prevent the second lead terminals 41 to 44 from moving when an external force is applied to the second lead terminals 41 to 44. Therefore, it is possible to prevent force from being applied to the second lead wires WD due to movement of the second lead terminals 41 to 44.

[0340] (5-4) The second lead terminals 41 and 42 have through holes 41AH and 42AH formed in the wire connection portions 41AA and 42AA. The through holes 41AH and 42AH are filled with a sealing resin 90.

[0341] According to this configuration, the through holes 41AH, 42AH are formed in the wire connection portions 41AA, 42AA, which are relatively long in the Y direction, and therefore movement of the wire connection portions 41AA, 42AA can be suppressed by the sealing resin 90 filled in the through holes 41AH, 42AH, thereby suppressing force from being applied to the second lead wires WD due to movement of the wire connection portions 41AA, 42AA.

[0342] 28 and 29 , a signal transmission device 10 according to a sixth embodiment will be described. The signal transmission device 10 according to the sixth embodiment differs from the signal transmission device 10 according to the fifth embodiment in the configuration of the first frame 10A and the second frame 10B and the configuration of the wires. In the following description, the configuration that differs from the fifth embodiment will be described in detail, and the same reference numerals will be used to denote components that are common to the fifth embodiment, and their description will be omitted.

[0343] The first frame 10A of the sixth embodiment differs from that of the fifth embodiment in the configuration of the first lead terminal 13 among the first lead terminals 11 to 14. More specifically, as shown in Fig. 28, the through hole 13AG (see Fig. 26) is omitted from the first inner lead portion 13A of the first lead terminal 13.

[0344] In other words, the first frame 10A includes two types of first lead terminals: a first specific terminal (first lead terminals 11, 12 in the sixth embodiment) having a through hole formed in the first inner lead portions 11A to 13A of the first lead terminals 11 to 13, and a second specific terminal (first lead terminal 13 in the sixth embodiment) having no through hole formed therein.

[0345] In the sixth embodiment, the configuration of the second bond portion of the first lead wire WB differs depending on the first specified terminal and the second specified terminal. More specifically, a security bond WB1 is formed in the second bond portion of the first lead wire WB connected to the wire connection portion 13AA of the first inner lead portion 13A of the first lead terminal 13 serving as the second specified terminal. On the other hand, no security bond WB1 is formed in the second bond portion of the first lead wire WB connected to the wire connection portions 11AA, 12AA of the first inner lead portions 11A, 12A of the first lead terminals 11, 12 serving as the first specified terminals.

[0346] That is, the plurality of first lead wires WB include a first specified wire joined to a first specified terminal (first lead terminals 11 and 12 in the sixth embodiment) and a second specified wire joined to a second specified terminal (first lead terminal 13 in the sixth embodiment). A security bond is formed at a joint (second bond portion) of the second specified wire joined to the second specified terminal.

[0347] The second frame 10B of the sixth embodiment differs in the configuration of the second lead terminal 43 among the second lead terminals 41 to 44. More specifically, as shown in Fig. 29, the through hole 43AG (see Fig. 27) is omitted from the second inner lead portion 43A of the second lead terminal 43.

[0348] In other words, the second frame 10B includes two types of second lead terminals: a third specific terminal (second lead terminals 41, 42 in the sixth embodiment) having a through hole formed in the second inner lead portions 41A to 43A of the second lead terminals 41 to 43, and a fourth specific terminal (second lead terminal 43 in the sixth embodiment) having no through hole formed therein.

[0349] In the sixth embodiment, the configuration of the second bond portion of the second lead wire WD differs depending on the third specific terminal and the fourth specific terminal. More specifically, a security bond WD1 is formed in the second bond portion of the second lead wire WD connected to the wire connection portion 43AA of the second inner lead portion 43A of the second lead terminal 43 serving as the fourth specific terminal. On the other hand, the security bond WD1 (see FIG. 27 ) is not formed in the second bond portion of the second lead wire WD connected to the wire connection portions 41AA, 42AA of the second inner lead portions 41A, 42A of the second lead terminals 41, 42 serving as the third specific terminals.

[0350] That is, the plurality of second lead wires WD include a third specified wire joined to the third specified terminal (the second lead terminals 41 and 42 in the sixth embodiment) and a fourth specified wire joined to the fourth specified terminal (the second lead terminal 43 in the sixth embodiment). A security bond is formed at the bond portion (second bond portion) of the fourth specified wire joined to the fourth specified terminal.

[0351] [Effects] The signal transmission device 10 of the sixth embodiment has the following effects: (6-1) Of the first lead terminals 11 to 13, the first lead terminal 13 does not have a through-hole formed therein. A security bond WB1 is formed on the second bond portion of the first lead wire WB joined to the wire connection portion 13AA of the first lead terminal 13.

[0352] With this configuration, even if an external force is applied to the first lead terminal 13 and the first lead terminal 13 moves, applying force to the first lead wire WB, the security bond WB1 can prevent the first lead wire WB from peeling off from the wire connection portion 13AA.

[0353] (6-2) Of the first lead terminals 11 to 13, through holes 11AG, 11AH, 12AG, and 12AH are formed in the first lead terminals 11 and 12. No security bond is formed in the second bond portion of the first lead wire WB joined to the wire connection portions 11AA and 12AA of the first lead terminals 11 and 12.

[0354] With this configuration, the sealing resin 90 filled in the through holes 11AG, 11AH, 12AG, and 12AH suppresses movement of the first lead terminals 11 and 12, making it less likely that force will be applied to the first lead wires WB joined to the first lead terminals 11 and 12. Furthermore, there is no need to form security bonds on the first lead wires WB joined to the first lead terminals 11 and 12, simplifying the manufacturing process. This allows for a reduction in the manufacturing cost of the signal transmission device 10.

[0355] (6-3) Of the second lead terminals 41 to 43, no through-hole is formed in the second lead terminal 43. A security bond WD1 is formed in the second bond portion of the second lead wire WD joined to the wire connection portion 43AA of the second lead terminal 43.

[0356] According to this configuration, even if an external force is applied to the second lead terminal 43 and the second lead terminal 43 moves, applying force to the second lead wire WD, the security bond WD1 can prevent the second lead wire WD from peeling off from the wire connection portion 43AA.

[0357] (6-4) Through holes 41AG, 41AH, 42AG, and 42AH are formed in the second lead terminals 41 and 42 of the second lead terminals 41 to 43. No security bond is formed in the second bond portion of the second lead wire WD joined to the second lead terminals 41 and 42.

[0358] With this configuration, the sealing resin 90 filled in the through holes 41AG, 41AH, 42AG, and 42AH suppresses movement of the second lead terminals 41 and 42, making it less likely that force will be applied to the second lead wires WD joined to the second lead terminals 41 and 42. Furthermore, there is no need to form security bonds on the second lead wires WD joined to the second lead terminals 41 and 42, simplifying the manufacturing process. This allows for a reduction in the manufacturing cost of the signal transmission device 10.

[0359] 30 to 37, a signal transmission device 10 according to a seventh embodiment will be described. The signal transmission device 10 according to the seventh embodiment differs from the signal transmission device 10 according to the first embodiment mainly in the configuration of each of the first chip 60 and the second chip 70. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be assigned the same reference numerals and will not be described again.

[0360] Fig. 30 shows a schematic cross-sectional structure of the first die pad 30 and the first chip 60 cut along the XZ plane, and Fig. 31 shows a schematic cross-sectional structure of the first die pad 30 and the first chip 60 cut along the YZ plane. For this reason, the wires WA to WC and the sealing resin 90 are omitted from the cross-sectional structures in Fig. 30 and Fig. 31.

[0361] 30 and 31 , substrate 130 of first chip 60 has first to fourth substrate side surfaces 133 to 136 that connect substrate front surface 131 and substrate back surface 132. First substrate side surface 133 constitutes a part of first chip side surface 63 of first chip 60, second substrate side surface 134 constitutes a part of second chip side surface 64, third substrate side surface 135 constitutes a part of third chip side surface 65, and fourth substrate side surface 136 constitutes a part of fourth chip side surface 66.

[0362] The substrate 130 can be divided into a first portion 137 and a second portion 138 by a step portion 139. The first portion 137 is a portion of the substrate 130 that is closer to the first die pad 30. The second portion 138 is a portion that is provided on the first portion 137. As shown in FIGS. 30 and 31 , the step portion 139 is formed around the entire periphery of the substrate 130.

[0363] In one example, the thickness dimension (size in the Z direction) of first portion 137 is larger than the thickness dimension (size in the Z direction) of second portion 138. In one example, the thickness dimension of first portion 137 is more than twice the thickness dimension of second portion 138. In one example, the thickness dimension of first portion 137 is more than three times the thickness dimension of second portion 138. In one example, the thickness dimension of first portion 137 is less than four times the thickness dimension of second portion 138.

[0364] 30 and 31 , the first conductive bonding material SD1 is interposed between the first portion 137 and the first die pad 30 in the Z direction, and has a portion that protrudes from the first chip 60 in a direction perpendicular to the Z direction. This protruding portion forms a first fillet SDA between the first portion 137 and the first conductive bonding material SD1. The first fillet SDA is not formed in the second portion 138 due to a step portion 139. In the example shown in FIGS. 30 and 31 , the first fillet SDA is formed over the entire first portion 137 in the Z direction.

[0365] The height dimension (size in the Z direction) of the first fillet SDA can be changed as desired as long as it is lower than the step portion 139. In one example, the height dimension of the first fillet SDA may be approximately half the thickness dimension of the first portion 137.

[0366] Furthermore, the position of the step portion 139 in the first chip 60 in the Z direction can be changed as desired. That is, the relationship between the thickness of the first portion 137 and the thickness of the second portion 138 can be changed as desired. In one example, the thickness of the first portion 137 may be equal to the thickness of the second portion 138. In one example, the thickness of the first portion 137 is ½ or less of the thickness of the second portion 138. In one example, the thickness of the first portion 137 is ⅓ or less of the thickness of the second portion 138. In one example, the thickness of the first portion 137 is ¼ or more of the thickness of the second portion 138. In one example, the thickness of the first portion 137 is ¼ or more and ¾ or less of the thickness (size in the Z direction) of the first chip 60.

[0367] The width H1 of the step portion 139 is equal to each other on the first to fourth substrate side surfaces 133 to 136. The width H1 of the step portion 139 is, for example, about 3 μm. Here, the width H1 of the step portion 139 can be defined, for example, by the distance between a portion of the first substrate side surface 133 corresponding to the first portion 137 and a portion corresponding to the second portion 138.

[0368] Fig. 32 shows a schematic cross-sectional structure of the second die pad 50 and the second chip 70 taken along the XZ plane, and Fig. 33 shows a schematic cross-sectional structure of the second die pad 50 and the second chip 70 taken along the YZ plane. For this reason, the wires WA, WD, WE and the sealing resin 90 are omitted from the cross-sectional structures of Fig. 32 and Fig. 33.

[0369] 32 and 33 , the second chip 70 mounted on the second die pad 50 includes a substrate 230. The substrate 230 is formed, for example, of a semiconductor substrate. The substrate 230 is a semiconductor substrate formed of a material containing silicon. Note that a wide bandgap semiconductor or a compound semiconductor may be used as the semiconductor substrate for the substrate 230. Furthermore, instead of a semiconductor substrate, an insulating substrate formed of a material containing glass or an insulating substrate formed of a material containing ceramics such as alumina may be used as the substrate 230.

[0370] The wide bandgap semiconductor is a semiconductor substrate having a bandgap of 2.0 eV or greater. The wide bandgap semiconductor may be silicon carbide. The compound semiconductor may be a III-V compound semiconductor. The compound semiconductor may include at least one of aluminum nitride, indium nitride, gallium nitride, and gallium arsenide.

[0371] The substrate 230 of the second chip 70 has first to fourth substrate side surfaces 233 to 236 that connect the substrate front surface 231 and the substrate back surface 232. The first substrate side surface 233 constitutes a part of the first chip side surface 73 of the second chip 70, the second substrate side surface 234 constitutes a part of the second chip side surface 74, the third substrate side surface 235 constitutes a part of the third chip side surface 75, and the fourth substrate side surface 236 constitutes a part of the fourth chip side surface 76.

[0372] The substrate 230 can be divided into a first portion 237 and a second portion 238 by a step portion 239. The first portion 237 is a portion of the substrate 230 that is closer to the second die pad 50. The second portion 238 is a portion that is provided on the first portion 237. As shown in FIGS. 32 and 33 , the step portion 239 is formed around the entire periphery of the substrate 230.

[0373] In one example, the thickness dimension (size in the Z direction) of the first portion 237 is larger than the thickness dimension (size in the Z direction) of the second portion 238. In one example, the thickness dimension of the first portion 237 is more than twice the thickness dimension of the second portion 238. In one example, the thickness dimension of the first portion 237 is more than three times the thickness dimension of the second portion 238. In one example, the thickness dimension of the first portion 237 is less than four times the thickness dimension of the second portion 238.

[0374] 32 and 33 , the second conductive bonding material SD2 is interposed between the first portion 237 and the second die pad 50 in the Z direction, and has a portion that protrudes from the second chip 70 in a direction perpendicular to the Z direction. This protruding portion forms a second fillet SDB between the first portion 237 and the second conductive bonding material SD2. The second fillet SDB is not formed in the second portion 238 due to a step portion 239. In the example shown in FIGS. 32 and 33 , the second fillet SDB is formed over the entire first portion 237 in the Z direction.

[0375] The height dimension (size in the Z direction) of the second fillet SDB can be changed as desired as long as it is lower than the step portion 239. In one example, the height dimension of the second fillet SDB may be approximately half the thickness dimension of the first portion 237.

[0376] Furthermore, the position of the step portion 239 in the second chip 70 in the Z direction can be changed as desired. That is, the relationship between the thickness of the first portion 237 and the thickness of the second portion 238 can be changed as desired. In one example, the thickness of the first portion 237 may be equal to the thickness of the second portion 238. In one example, the thickness of the first portion 237 is ½ or less of the thickness of the second portion 238. In one example, the thickness of the first portion 237 is ⅓ or less of the thickness of the second portion 238. In one example, the thickness of the first portion 237 is ¼ or more of the thickness of the second portion 238. In one example, the thickness of the first portion 237 is ¼ or more and ¾ or less of the thickness (size in the Z direction) of the second chip 70.

[0377] The width H2 of the step portion 239 is equal to each other on the first to fourth substrate side surfaces 233 to 236. The width H2 of the step portion 239 is, for example, about 3 μm. Here, the width H2 of the step portion 239 can be defined, for example, by the distance between a portion of the first substrate side surface 233 corresponding to the first portion 237 and a portion of the first substrate side surface 233 corresponding to the second portion 238.

[0378] [Method for Manufacturing First Chip] An example of the manufacturing process for the first chip 60 will be described with reference to Figures 34 to 37. The method for manufacturing the first chip 60 includes the steps of preparing a substrate 830, forming an element insulating layer 850 on the substrate 830, forming a passivation film 861, forming a protective film 862, and singulating. An overview of each step will be described below. Note that Figures 34 to 37 show a schematic cross-sectional structure of the first chip 60. In Figures 35 to 37, the hatching lines of the passivation film 861 and the protective film 862 have been omitted to make the drawings easier to understand.

[0379] 34, in the step of preparing a substrate 830, a substrate 830 including a plurality of substrates 130 (see FIG. 30) is prepared. Here, in regions of the substrate 830 corresponding to each of the plurality of substrates 130, the receiving unit 311, output control unit 312, clamp control unit 313, UVLO unit 314, first output switching elements 315A and 315B, second output switching element 316, resistor 317, switching element 318, and diode 319 shown in FIG. 13 are formed.

[0380] As shown in FIG. 35, in the process of forming an element insulating layer 850 on a substrate 830, SiO 2 is deposited on a substrate surface 831 of the substrate 830 by, for example, a CVD method. ２ The film is laminated. ２ The film is a film that constitutes the element insulating layer 850. The element insulating layer 850 is made of, for example, a plurality of SiO ２ It is composed of a laminated film structure.

[0381] Although not shown, a step of forming the first back-side coil 111B by, for example, sputtering and etching is performed during the step of forming the element insulating layer 850 on the substrate 830. Then, after the step of forming the first back-side coil 111B is performed, the step of forming the element insulating layer 850 on the substrate 830 is performed again.

[0382] Although not shown, after the element insulating layer 850 is formed, a step of forming the first surface side coil 111A and the first to third electrode pads 67 to 69 by sputtering and etching is carried out.

[0383] Subsequently, in the step of forming the passivation film 861, the passivation film 861 is formed by, for example, a CVD method on the element insulating layer 850. Although not shown, the passivation film 861 also covers the first surface side coil 111A and the first to third electrode pads 67 to 69.

[0384] Subsequently, in the step of forming the protective film 862, the protective film 862 is formed on the passivation film 861 by, for example, a CVD method. The protective film 862 is formed over the entire surface of the passivation film 861, for example.

[0385] Subsequently, although not shown, openings are formed by, for example, etching in positions that overlap with portions of the first to third electrode pads 67 to 69 in both the protective film 862 and the passivation film 861. As a result, portions of the first to third electrode pads 67 to 69 are exposed in the Z direction from both the protective film 862 and the passivation film 861.

[0386] 36 and 37 , the singulation process includes a first dicing process and a second dicing process. As shown in FIG. 36 , in the first dicing process, the substrate 830 is first placed on the dicing tape DT. The back surface 832 of the substrate 830 is in contact with the dicing tape DT. Next, the first dicing blade DB1 cuts the protective film 862, the passivation film 861, and the element insulating layer 850, and also cuts a portion of the substrate 830 in the Z direction. As a result, a recess 833 is formed in the substrate 830.

[0387] 37, in the second dicing step, the substrate 830 is cut by a second dicing blade DB2. The second dicing blade DB2 is a blade that is narrower than the first dicing blade DB1. The second dicing blade DB2 cuts the substrate 830 from the recess 833 of the substrate 830. As a result, a step portion 839 is formed in the substrate 830. The dicing tape DT is then removed. Through the above steps, the first chip 60 is manufactured.

[0388] [Effects] The signal transmission device 10 of the seventh embodiment has the following effects: (7-1) The substrate 130 of the first chip 60 has a first portion 137 including the substrate back surface 132, a second portion 138 provided on the first portion 137, and a step portion 139 formed so that the second portion 138 is positioned inside the substrate 130 with respect to the first portion 137.

[0389] According to this configuration, when the first chip 60 is mounted on the first die pad 30 using the conductive bonding material SD1, the step portion 139 can prevent the first conductive bonding material SD1 from creeping up to the chip surface 61 of the first chip 60.

[0390] (7-2) The substrate 230 of the second chip 70 has a first portion 237 including the back surface 232 of the substrate, a second portion 238 provided on the first portion 237, and a step portion 239 formed so that the second portion 238 is positioned inside the substrate 230 relative to the first portion 237.

[0391] According to this configuration, when the second chip 70 is mounted on the second die pad 50 using the conductive bonding material SD2, the step portion 239 can prevent the second conductive bonding material SD2 from creeping up to the chip surface 71 of the second chip 70.

[0392] Eighth Embodiment A signal transmission device 10 of an eighth embodiment will be described with reference to Fig. 38. The signal transmission device 10 of the eighth embodiment differs from the signal transmission device 10 of the first embodiment in that the conductive members 10D and 10E are omitted. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be assigned the same reference numerals and descriptions thereof will be omitted.

[0393] 38 , the signal transmission device 10 does not include conductive members 10D and 10E (see FIG. 7 ). Therefore, the conductive member 10D is not exposed from the third sealing side surface 95 of the sealing resin 90. Furthermore, the conductive member 10E is not exposed from the fourth sealing side surface 96 of the sealing resin 90. In this way, both the third sealing side surface 95 and the fourth sealing side surface 96 are formed only from the resin material that constitutes the sealing resin 90.

[0394] Furthermore, due to the omission of conductive members 10D and 10E, recess 95D (see FIG. 7 ) is omitted from third sealing side surface 95, and recess 96D (see FIG. 7 ) is omitted from fourth sealing side surface 96. That is, a third central side surface 95C (see FIG. 2 ), which is a portion of third sealing side surface 95 between third front surface side surface 95A and third back surface side surface 95B, forms a flat surface along the XZ plane throughout the X direction. A fourth central side surface 96C (see FIG. 2 ), which is a portion of fourth sealing side surface 96 between fourth front surface side surface 96A and fourth back surface side surface 96B, forms a flat surface along the XZ plane throughout the X direction.

[0395] [Effects] According to the signal transmission device 10 of the eighth embodiment, the following effects can be obtained: (8-1) Both the third sealing side surface 95 and the fourth sealing side surface 96 of the sealing resin 90 are formed only by the sealing resin 90, without exposing the conductive member.

[0396] This configuration can prevent static electricity and the like from entering the sealing resin 90 via the conductive member, compared to a configuration in which the conductive member is exposed on at least one of the third sealing side surface 95 and the fourth sealing side surface 96. Furthermore, since the conductive member is not exposed, a large insulation distance can be ensured between the first lead terminals 11 to 14 and the second lead terminals 41 to 44. This can improve the dielectric strength of the signal transmission device 10.

[0397] Ninth Embodiment A signal transmission device 10 of the ninth embodiment will be described with reference to Figures 39 to 43. The signal transmission device 10 of the ninth embodiment differs from the signal transmission device 10 of the first embodiment in the configuration of the first chip 60. Below, differences in the configuration of the first chip 60 from the first embodiment will be described in detail. Furthermore, components common to the first embodiment will be assigned the same reference numerals, and descriptions thereof will be omitted.

[0398] 39 , a passivation film 161 is formed on the layer surface 151 of the element insulating layer 150, while the multiple first electrode pads 67 are not formed on the layer surface 151. In other words, the passivation film 161 is in contact with the layer surface 151, and the multiple first electrode pads 67 are arranged at a distance from the layer surface 151 in the Z direction. The passivation film 161 is formed over the entire layer surface 151 of the element insulating layer 150.

[0399] The first chip 60 further includes a first organic insulating layer 191 formed on the passivation film 161, and a second organic insulating layer 192 formed on the first organic insulating layer 191. Here, the first organic insulating layer 191 corresponds to the "first resin layer," and the second organic insulating layer 192 corresponds to the "second resin layer."

[0400] Both the first organic insulating layer 191 and the second organic insulating layer 192 are formed of an insulating material having a relative dielectric constant different from that of the element insulating layer 150. Both the first organic insulating layer 191 and the second organic insulating layer 192 may contain at least one of polyimide, phenolic resin, and epoxy resin. The first organic insulating layer 191 and the second organic insulating layer 192 may be formed of the same resin material or different resin materials.

[0401] The first organic insulating layer 191 is provided for the purpose of improving surge voltage resistance. The thickness of the first organic insulating layer 191 is thinner than the thickness of the element insulating layer 150. The thickness of the first organic insulating layer 191 is thinner than the distance in the Z direction between the coil surface 181 of the conductor 180 in the coil layer 111BA of the first back-side coil 111B and the layer surface 151 of the element insulating layer 150. The thickness of the first organic insulating layer 191 is thicker than the thickness of the conductor 180. The thickness of the first organic insulating layer 191 is thicker than the thickness of the conductor 170 of the first front-side coil 111A. The thickness of the first organic insulating layer 191 is set, for example, according to a desired dielectric strength voltage (dielectric breakdown resistance).

[0402] The first surface side coil 111A and the multiple first electrode pads 67 are formed on the first organic insulating layer 191. In other words, both the first surface side coil 111A and the multiple first electrode pads 67 are provided outside the element insulating layer 150. It can also be said that both the first surface side coil 111A and the multiple first electrode pads 67 are arranged spaced apart from the element insulating layer 150 in the Z direction. The first surface side coil 111A and the multiple first electrode pads 67 are provided at the same positions as each other in the Z direction. In this way, the first surface side coil 111A corresponds to a "surface side coil."

[0403] The first surface-side coil 111A and the plurality of first electrode pads 67 are covered with a second organic insulating layer 192. The second organic insulating layer 192 has openings 192A that expose a portion of the surface of each first electrode pad 67 in the Z direction. The second organic insulating layer 192 is a protective film that protects the first chip 60 and constitutes the chip surface 61.

[0404] 40 , the coil back surface 172 of the conductor 170 of the first surface side coil 111A is in contact with the first organic insulating layer 191. The first surface side coil 111A is covered with the first organic insulating layer 191 and the second organic insulating layer 192. The second organic insulating layer 192 is in contact with the coil front surface 171 and a pair of coil side surfaces 173 of the conductor 170. The second organic insulating layer 192 is interposed between adjacent conductors 170 in the Y direction of the first surface side coil 111A.

[0405] The thickness of the second organic insulating layer 192 is thinner than the thickness of the element insulating layer 150. The thickness of the second organic insulating layer 192 is thinner than the distance in the Z direction between the coil surface 181 of the conductive wire 180 in the coil layer 111BA of the first back-side coil 111B and the layer surface 151 of the element insulating layer 150. The thickness of the second organic insulating layer 192 is thicker than the thickness of the conductive wire 180. The thickness of the second organic insulating layer 192 is thicker than the thickness of the conductive wire 170. The thickness of the second organic insulating layer 192 is thicker than the thickness of the first electrode pad 67A (the size of the first electrode pad 67A in the Z direction).

[0406] As in the first embodiment, the first back surface side coil 111B is embedded in the element insulating layer 150. The first back surface side coil 111B is disposed closer to the layer back surface 152 of the element insulating layer 150. Here, the first back surface side coil 111B corresponds to the "back surface side coil."

[0407] As described above, both the element insulating layer 150 and the first organic insulating layer 191 are interposed between the first front-side coil 111A and the first back-side coil 111B in the Z direction. In other words, both an inorganic insulating layer and an organic insulating layer are interposed between the first front-side coil 111A and the first back-side coil 111B in the Z direction. In the example of Fig. 40, three different layers, the element insulating layer 150, the passivation film 161, and the first organic insulating layer 191, are interposed between the first front-side coil 111A and the first back-side coil 111B in the Z direction.

[0408] Although not shown, the front-side guard ring 115 (see FIG. 14 ) is formed on the first organic insulating layer 191. That is, the front-side guard ring 115 is provided at the same position in the Z direction as the first front-side coil 111A and the first electrode pad 67A. In one example, the via 117 has a laminated structure including a first portion, a second portion, and a third portion. The first portion penetrates in the Z direction from the rear-side guard ring 116 (see FIG. 15 ) to the surface 151 of the element insulating layer 150. The first portion is in contact with the rear-side guard ring 116. The second portion penetrates the passivation film 161 in the Z direction to connect to the first portion and is formed on the passivation film 161. The second portion is covered by the first organic insulating layer 191. The third portion penetrates in the Z direction through a portion of the first organic insulating layer 191 that covers the second portion and connects to both the second portion and the front-side guard ring 115.

[0409] 39 and 40, the first chip 60 has a two-layer laminate structure of the first organic insulating layer 191 and the second organic insulating layer 192, but is not limited to this. The first chip 60 may have a structure in which three or more organic insulating layers are laminated.

[0410] 41 to 43, a method for manufacturing the first chip 60, in particular a method for manufacturing the first surface side coil 111A, will be described. Figures 41 to 43 mainly show a process for forming a part of the first surface side coil 111A in the element insulating layer 150.

[0411] Although not shown, the manufacturing method of the first chip 60 includes the steps of preparing a substrate 830, forming an element insulating layer 850 on the substrate 830, forming a first back side coil 111B on the element insulating layer 850, and forming a passivation film 861 on the element insulating layer 850.

[0412] Here, the substrate 830 is a substrate that constitutes the plurality of substrates 130. The element insulating layer 850 is formed over an area corresponding to the plurality of substrates 130. The element insulating layer 850 corresponds to the element insulating layer 150 of the first chip 60. The passivation film 861 is formed over the entire surface of the element insulating layer 850. The passivation film 861 corresponds to the passivation film 161 of the first chip 60.

[0413] 41 , the manufacturing method of the first chip 60 includes a step of forming a first organic insulating layer 891. More specifically, the first organic insulating layer 891 is formed on the passivation film 861 by, for example, a spin coating method. The first organic insulating layer 891 may contain at least one of polyimide, phenolic resin, and epoxy resin. The first organic insulating layer 891 corresponds to the first organic insulating layer 191 of the first chip 60.

[0414] As shown in FIG. 42 , the manufacturing method for the first chip 60 includes a step of forming the first surface side coil 111A and the first electrode pads 67A. More specifically, a barrier layer (not shown) constituting the first surface side coil 111A and the first electrode pads 67A is formed on the first organic insulating layer 191, for example, by sputtering. Here, the barrier layer is a base conductive layer for plating the conductor wires 170 and the first electrode pads 67. The barrier layer may contain at least one of titanium, titanium nitride, tantalum, and tantalum nitride. Next, the barrier layer is removed from the first surface side coil 111A except for the positions where the conductor wires 170 and the first electrode pads 67 are to be formed, for example, by lithography and etching. Next, a conductive material constituting the conductor wires 170 and the first electrode pads 67 is plated on the barrier layer. For example, copper is used as the conductive material. Through the above steps, the first surface side coil 111A and the first electrode pads 67 are manufactured. Although not shown, the other first electrode pads 67 are manufactured at the same time as this process.

[0415] 43 , the manufacturing method of the first chip 60 includes a step of forming a second organic insulating layer 892. More specifically, the second organic insulating layer 892 is formed on the first organic insulating layer 891 by, for example, spin coating. The second organic insulating layer 892 is formed so as to cover the first surface-side coil 111A and the first electrode pads 67. Although not shown, the second organic insulating layer 892 is also formed so as to cover the other first electrode pads 67. Subsequently, an opening 892A that exposes a portion of the first electrode pad 67 in the Z direction is formed in the second organic insulating layer 892 by lithography and etching. Note that openings that expose a portion of each of the other first electrode pads 67 in the Z direction are also formed at the same time.

[0416] Next, the manufacturing method of the first chip 60 includes a singulation process. In the singulation process, the substrate 830, the passivation film 861, the first organic insulating layer 891, and the second organic insulating layer 892 are cut by dicing. Through the above processes, the first chip 60 is manufactured.

[0417] [Effects] The signal transmission device 10 of the ninth embodiment has the following effects: (9-1) The first chip 60 includes a first organic insulating layer 191 provided on the element insulating layer 150 and a second organic insulating layer 192 provided on the first organic insulating layer 191. The first transformer 321 includes a first front-side coil 111A disposed on the first organic insulating layer 191 and covered with the second organic insulating layer 192, and a first back-side coil 111B disposed opposite the first front-side coil 111A in the Z direction and embedded in the element insulating layer 150.

[0418] With this configuration, the distance between the first front-side coil 111A and the first back-side coil 111B in the Z direction can be increased by thickening the first organic insulating layer 191. In other words, the dielectric strength between the first front-side coil 111A and the first back-side coil 111B can be improved by thickening the first organic insulating layer 191. Therefore, to thicken the element insulating layer 150, it is not necessary to form the element insulating layer 150 into a multi-layer structure in which, for example, etching stopper films formed of silicon nitride films and interlayer insulating films formed of silicon oxide films are alternately stacked one on top of another. This simplifies the configuration of the element insulating layer 150. Additionally, the first organic insulating layer 191 can be easily thickened by spin coating. As a result, compared to when the element insulating layer 150 is thickened, the lead time can be shortened, thereby reducing manufacturing costs.

[0419] <Tenth Embodiment> A signal transmission device 10 of a tenth embodiment will be described with reference to Fig. 44. The signal transmission device 10 of the tenth embodiment differs from the signal transmission device 10 of the first embodiment in the configuration of the first chip 60. Below, differences in the configuration of the first chip 60 from the first embodiment will be described in detail. Furthermore, components common to the first embodiment will be assigned the same reference numerals, and descriptions thereof will be omitted.

[0420] 44 , in the tenth embodiment, the first chip 60 includes a low-dielectric layer 193 having a relative dielectric constant lower than that of the passivation film 161. The low-dielectric layer 193 is formed on the passivation film 161. In the twenty-fourth embodiment, the low-dielectric layer 193 is formed over the entire surface of the passivation film 161. The low-dielectric layer 193 is in contact with the surface of the passivation film 161. It can be said that the low-dielectric layer 193 is interposed between the passivation film 161 and the sealing resin 90 in the Z direction so that the passivation film 161 and the sealing resin 90 do not come into contact with each other.

[0421] The thickness of the low dielectric layer 193 (the size of the low dielectric layer 193 in the Z direction) is equal to or less than the thickness of the passivation film 161. In one example, the thickness of the low dielectric layer 193 is thinner than the thickness of the passivation film 161. Note that the thickness of the low dielectric layer 193 can be changed as desired. In one example, the thickness of the low dielectric layer 193 may be thicker than the thickness of the passivation film 161.

[0422] The protective film 162 is formed on the low dielectric layer 193. The protective film 162 is in contact with the surface of the low dielectric layer 193. In other words, the low dielectric layer 193 is sandwiched in the Z direction between the passivation film 161 and the protective film 162. The protective film 162 is in contact with the sealing resin 90. The thickness of the protective film 162 is thicker than the thickness of the low dielectric layer 193. In other words, the thickness of the low dielectric layer 193 is thinner than the thickness of the protective film 162.

[0423] Next, a description will be given of the relationship between the dielectric constants of the element insulating layer 150, the passivation film 161, the low dielectric layer 193, the protective film 162, and the sealing resin 90. In this embodiment, the element insulating layer 150 is made of silicon oxide (SiO ２ Since the element insulating layer 150 is made of a material containing silicon nitride (SiN), the relative dielectric constant of the element insulating layer 150 is about 4.1. Since the passivation film 161 is made of a material containing silicon nitride (SiN), the relative dielectric constant of the passivation film 161 is about 7.0. In other words, the relative dielectric constant of the passivation film 161 is higher than the relative dielectric constant of the element insulating layer 150.

[0424] In the tenth embodiment, the protective film 162 is made of a material containing polyimide, and therefore the relative dielectric constant of the protective film 162 is approximately 2.9. Also, in the tenth embodiment, the sealing resin 90 is made of a material containing epoxy resin, and therefore the relative dielectric constant of the sealing resin 90 is approximately 3.9. In other words, the relative dielectric constant of the sealing resin 90 is lower than the dielectric constant of the passivation film 161. The relative dielectric constant of the sealing resin 90 is higher than the relative dielectric constant of the protective film 162.

[0425] The low-dielectric layer 193 has a lower dielectric constant than the passivation film 161. For example, the low-dielectric layer 193 has a dielectric constant equal to or lower than that of the element insulating layer 150. More specifically, the low-dielectric layer 193 has a dielectric constant lower than that of the element insulating layer 150. The low-dielectric layer 193 may have a dielectric constant equal to or lower than that of the sealing resin 90.

[0426] The low dielectric layer 193 is made of, for example, silicon oxide (SiO ２ ). In this way, the low-dielectric layer 193 may be formed from the same material as the element insulating layer 150. Furthermore, the low-dielectric layer 193 may have a lower dielectric constant than the element insulating layer 150. The low-dielectric layer 193 may be formed from a low-k film. The low-k film may be appropriately selected from, for example, a carbon-doped silicon oxide film (SiOC), a fluorine-doped silicon oxide film (SiOF), a porous film, etc. When the low-dielectric layer 193 is formed from a carbon-doped silicon oxide film, the dielectric constant of the low-dielectric layer 193 is 2.5 or more and 3.0 or less. When the low-dielectric layer 193 is formed from a fluorine-doped silicon oxide film, the dielectric constant of the low-dielectric layer 193 is 3.4 or more and 3.8 or less. When the low-dielectric layer 193 is formed from a porous film, the dielectric constant of the low-dielectric layer 193 is less than 2.5. In this way, by using a Low-K film for the low dielectric layer 193 , the relative dielectric constant of the low dielectric layer 193 can be made lower than that of the element insulating layer 150 and the sealing resin 90 .

[0427] [Effects] The signal transmission device 10 of the tenth embodiment provides the following effects: (10-1) The first chip 60 includes an element insulating layer 150, a passivation film 161 formed on the element insulating layer 150 so as to cover the element insulating layer 150, and a low-dielectric layer 193 formed on the surface of the passivation film 161 and having a lower dielectric constant than the passivation film 161. The sealing resin 90 covers the low-dielectric layer 193.

[0428] According to this configuration, the low-dielectric layer 193 is interposed between the passivation film 161 and the sealing resin 90, thereby preventing contact between the passivation film 161 and the sealing resin 90. This prevents partial discharge and, ultimately, creeping discharge from occurring due to gaps present at the boundary between the sealing resin 90 and the passivation film 161. This improves the reliability of the first chip 60.

[0429] (10-2) The relative dielectric constant of the low dielectric layer 193 is equal to or lower than the dielectric constant of the sealing resin 90. With this configuration, it is possible to increase the inception voltage of partial discharge at the boundary between the low dielectric layer 193 and the sealing resin 90, thereby suppressing the occurrence of partial discharge, and ultimately creeping discharge, due to voids present at the boundary between the low dielectric layer 193 and the sealing resin 90.

[0430] (10-3) The thickness of the low-dielectric layer 193 is equal to or less than the thickness of the passivation film 161. This configuration can prevent the dimension of the first chip 60 in the Z direction from increasing. In other words, the height of the first chip 60 can be reduced.

[0431] 45 to 51, a signal transmission device 10 according to an eleventh embodiment will be described. The signal transmission device 10 according to the eleventh embodiment differs from the signal transmission device 10 according to the first embodiment in the configuration of the first chip 60. The following describes in detail the differences in the configuration of the first chip 60 from the first embodiment. Furthermore, the same reference numerals are used to designate components common to the first embodiment, and their description will be omitted.

[0432] [Configuration of First Chip] Fig. 45 shows an enlarged cross-sectional structure of a part of the first surface side coil 111A and its surrounding area in the first chip 60. Note that, to make the drawing easier to understand, hatching lines for some of the components of the first chip 60 have been omitted in Fig. 45.

[0433] 45 , the surface-side corner portion 176 formed by the coil surface 171 and the pair of coil side surfaces 173 of the conductor 170 of the first surface-side coil 111A is formed in a rounded curved shape, unlike in the first embodiment. It can also be said that the surface-side corner portion 176 has an R-surface (curved surface). That is, in the eleventh embodiment, an R-surface (curved surface) is formed in the portion of the conductor 170 between the coil surface 171 and the pair of coil side surfaces 173. More specifically, the R-surface (curved surface) is formed by both the barrier layer 174 and the metal layer 175 that form the surface-side corner portion 176.

[0434] The coil surface 171 of the conductor 170 is located above the layer surface 151 of the element insulating layer 150. In other words, the conductor 170 protrudes from the layer surface 151 of the element insulating layer 150. The passivation film 161 covers the surface-side corner portions 176 of the conductor 170 and the coil surface 171. Therefore, the surface-side corner portions 176 are not in contact with the element insulating layer 150, but are in contact with the passivation film 161. The portion of the pair of coil side surfaces 173 of the conductor 170 that is closer to the coil back surface 172 than the surface-side corner portions 176 is in contact with the element insulating layer 150.

[0435] The relationship between the conductor 170 and the element insulating layer 150 can be changed as desired. In one example, the conductor 170 may be embedded in the element insulating layer 150. That is, the element insulating layer 150 may be provided so that the front-side corner portion 176 of the conductor 170 and the coil surface 171 are in contact with the element insulating layer 150. In this case, a passivation film 161 is formed over the entire surface 151 of the element insulating layer 150.

[0436] 46 to 51, a method for manufacturing the first chip 60, in particular a method for manufacturing the first surface side coil 111A, will be described. Figures 46 to 51 mainly show a process for forming a part of the first surface side coil 111A in the element insulating layer 850.

[0437] Although not shown, the manufacturing method of the first chip 60 includes the steps of preparing a substrate 830, forming an element insulating layer 850 on the substrate 830 (see, for example, Figure 41), and forming a first back side coil 111B (see Figure 41) on the element insulating layer 850.

[0438] 46 , the manufacturing method of the first chip 60 includes a step of forming a recess 853 in the element insulating layer 850. More specifically, in this step, the layer surface 851 of the element insulating layer 850 is selectively etched to form the recess 853. The recess 853 includes a bottom surface 853A and a pair of side surfaces 853B connecting the bottom surface 853A and the layer surface 851. The pair of side surfaces 853B are formed in a tapered shape that approaches each other in the Y direction from the layer surface 851 toward the bottom surface 853A.

[0439] 47 , the manufacturing method of the first chip 60 includes a step of forming a barrier layer 901. More specifically, the barrier layer 901 is formed on both a pair of side surfaces 853B and a bottom surface 853A of the recess 853 and on the layer surface 851 of the element insulating layer 850 by, for example, a sputtering method. The barrier layer 901 may contain tantalum or tantalum nitride. In one example, the barrier layer 901 is formed of a stacked structure (Ta / TaN / Ta) including a first layer containing tantalum, a second layer containing tantalum nitride stacked on the first layer, and a third layer containing tantalum stacked on the second layer.

[0440] Next, the manufacturing method of the first chip 60 includes a step of forming a metal layer 902. More specifically, a conductive material for the conductor 170 is plated from the barrier layer 901. In one example, copper is plated from the barrier layer 901. This forms the metal layer 902 in the recess 853 and on the element insulating layer 850. The metal layer 902 is formed from a material containing copper, for example.

[0441] 48 , the manufacturing method of the first chip 60 includes a step of removing the barrier layer 901 and the metal layer 902 on the element insulating layer 850. More specifically, both the barrier layer 901 and the metal layer 902 on the element insulating layer 850 are removed by chemical mechanical polishing (CMP). As a result, the layer surface 851 of the element insulating layer 850 is exposed.

[0442] 49 , the manufacturing method of the first chip 60 includes a step of removing the upper end portion of the element insulating layer 850. More specifically, the entire upper end portion of the element insulating layer 850 is removed by dry etching or wet etching. As a result, the layer surface 851 after the upper end portion of the element insulating layer 850 is removed is located lower than the respective upper end surfaces of the barrier layer 901 and the metal layer 902 (closer to the bottom surface 853A of the recess 853). In other words, the upper ends of the barrier layer 901 and the metal layer 902 protrude from the layer surface 851.

[0443] As shown in FIG. 50 , the manufacturing method for the first chip 60 includes a step of removing both Y-direction ends (surface-side corner portions 903 in FIG. 49 ) of the upper ends of the barrier layer 901 and the metal layer 902. More specifically, a resist (not shown) is formed on the upper end surface of the metal layer 902. The resist is formed so that the surface-side corner portions 903 are exposed in a plan view. Next, the barrier layer 901 and the metal layer 902 that constitute the surface-side corner portions 903 are removed by dry etching or wet etching. As a result, the surface-side corner portions 903 are formed in a curved shape. Through the above steps, the conductive wire 170 is formed. This results in the first surface-side coil 111A. Although not shown, a plurality of first electrode pads 67 are formed in parallel with the step of forming the conductive wire 170 shown in FIGS. 46 to 50 .

[0444] 51 , the manufacturing method for first chip 60 includes a step of forming passivation film 861. More specifically, passivation film 861 is formed by, for example, chemical vapor deposition (CVD) or sputtering so as to cover coil surface 171 and front-side corner portion 176 of conducting wire 170 and layer surface 851 of element insulating layer 850. Passivation film 861 is formed of a material containing, for example, silicon nitride.

[0445] Although not shown, the manufacturing method of the first chip 60 includes a step of forming a protective film 862 (see FIG. 35 ). The protective film 862 is formed on the passivation film 861 by CVD or sputtering. The protective film 862 is formed of a material containing, for example, silicon oxide. Furthermore, openings that expose portions of the first electrode pads 67 are formed in both the protective film 862 and the passivation film 861 by etching. Thereafter, the protective film 862, the passivation film 861, the element insulating layer 850, and the substrate 830 are cut by dicing to separate the chip into individual pieces. Through the above steps, the first chip 60 is manufactured.

[0446] [Effects] The signal transmission device 10 of the eleventh embodiment has the following effects: (11-1) The first surface side coil 111A of the first transformer 321 has a coil front surface 171, a coil back surface 172 opposite the coil front surface 171, and a coil side surface 173 connecting the coil front surface 171 and the coil back surface 172. A curved surface is formed between the coil front surface 171 and the coil side surface 173.

[0447] This configuration can mitigate electric field concentration at the front-side corner portion 176 defined by the coil front surface 171 and the coil side surface 173. This prevents the front-side corner portion 176 from becoming a starting point for dielectric breakdown, thereby improving the dielectric strength of the first chip 60.

[0448] 52 to 57, a signal transmission device 10 according to a twelfth embodiment will be described. The signal transmission device 10 according to the twelfth embodiment differs from the signal transmission device 10 according to the first embodiment in the configuration of the first chip 60. The following describes in detail the differences in the configuration of the first chip 60 from the first embodiment. Furthermore, the same reference numerals are used to designate components common to the first embodiment, and their description will be omitted.

[0449] [Configuration of First Chip] Fig. 52 shows an enlarged cross-sectional structure of a part of the first surface side coil 111A and its surrounding area in the first chip 60. Note that, to make the drawing easier to understand, hatching lines for some of the components of the first chip 60 have been omitted in Fig. 52.

[0450] Similar to the ninth embodiment, the first chip 60 of the twelfth embodiment includes a first organic insulating layer 191 formed on the layer surface 151 of the element insulating layer 150, and a second organic insulating layer 192 formed on the first organic insulating layer 191. Similar to the ninth embodiment, both the first surface-side coil 111A and the first electrode pad 67A are formed on the first organic insulating layer 191.

[0451] The surface-side corner portion 176 formed by the coil surface 171 and the pair of coil side surfaces 173 of the conductor 170 of the first surface-side coil 111A is formed in a rounded curved shape, unlike the ninth embodiment. The surface-side corner portion 176 can also be said to have an R-surface (curved surface). In other words, in the twelfth embodiment, an R-surface (curved surface) is formed in the portion of the conductor 170 between the coil surface 171 and the pair of coil side surfaces 173.

[0452] The coil surface 171 of the conductor 170 is located above the layer surface 151 of the element insulating layer 150. In other words, the conductor 170 protrudes from the layer surface 151 of the element insulating layer 150. The passivation film 161 covers the surface-side corner portions 176 of the conductor 170 and the coil surface 171. Therefore, the surface-side corner portions 176 are not in contact with the element insulating layer 150, but are in contact with the passivation film 161. The portion of the pair of coil side surfaces 173 of the conductor 170 that is closer to the coil back surface 172 than the surface-side corner portions 176 is in contact with the element insulating layer 150.

[0453] A back-side corner portion 177 formed by the coil back surface 172 and the pair of coil side surfaces 173 of the conductor 170 is formed in a rounded curve, unlike the ninth embodiment. The back-side corner portion 177 can also be said to have an R-surface (curved surface). In other words, in the twelfth embodiment, an R-surface (curved surface) is formed in the portion of the conductor 170 between the coil back surface 172 and the pair of coil side surfaces 173.

[0454] The conductor 170 is covered with a second organic insulating layer 192. More specifically, the coil surface 171, the pair of coil side surfaces 173, the front-side corner portion 176, and the back-side corner portion 177 of the conductor 170 are in contact with the second organic insulating layer 192.

[0455] The conductive wire 170 is formed by a laminated structure of a seed layer 178 and a metal layer 179 formed on the seed layer 178. The seed layer 178 constitutes the coil back surface 172. In other words, the seed layer 178 is in contact with the first organic insulating layer 191. The seed layer 178 may contain, for example, at least one of titanium, titanium nitride, and copper. In one example, the seed layer 178 is formed by a laminated structure of a first layer containing titanium and a second layer containing copper laminated on the first layer.

[0456] Because the seed layer 178 is interposed between the metal layer 179 and the first organic insulating layer 191 in the Z direction, the metal layer 179 is disposed at a distance from the first organic insulating layer 191 in the Z direction. The metal layer 179 includes a coil front surface 171, a pair of coil side surfaces 173, a front-side corner portion 176, and a back-side corner portion 177. The metal layer 179 is covered with the second organic insulating layer 192.

[0457] [Method of Manufacturing First Chip] A method of manufacturing the first chip 60, particularly a method of manufacturing the first surface side coil 111A, will be described with reference to FIGS.

[0458] Although not shown, the manufacturing method of the first chip 60 includes the steps of preparing a substrate 830 (see, for example, FIG. 41 ), forming an element insulating layer 850 (see, for example, FIG. 41 ) on the substrate 130, forming a first back-side coil 111B (see, for example, FIG. 41 ) on the element insulating layer 850, forming a passivation film 861 (see FIG. 41 ), and forming a first organic insulating layer 891 (see FIG. 41 ). The passivation film 861 is formed on a layer surface 851 of the element insulating layer 850 by, for example, CVD or sputtering. The first organic insulating layer 891 is formed on the passivation film 161 by, for example, spin coating.

[0459] 53 , the manufacturing method of the first chip 60 includes a step of forming a seed layer 911. More specifically, the seed layer 911 is formed on the first organic insulating layer 191 by, for example, a sputtering method. The seed layer 911 may contain titanium and copper. In one example, the seed layer 911 is formed of a stacked structure (Ti / Cu) of a first seed layer 911A containing titanium and a second seed layer 911B containing copper stacked on the first seed layer 911A.

[0460] Next, the manufacturing method of the first chip 60 includes a step of forming a resist 920. More specifically, first, the resist 920 is formed on the seed layer 911. Next, the resist 920 is selectively exposed to light and developed to form openings 921 that expose the portions where the conductive wires 170 (see FIG. 52) and the portions where the first electrode pads 67 (see FIG. 39) are to be formed.

[0461] 53 shows an opening 921 where the conductive wire 170 is to be formed. The surfaces of the resist 920 that form the opening 921 are tapered so that they approach each other as they approach the seed layer 911. The portion of the opening 921 of the resist 920 that contacts the seed layer 911 has an inward protruding portion 922 that is curved and concave.

[0462] As shown in FIG. 54 , the manufacturing method of the first chip 60 includes a step of forming a metal layer 912. More specifically, a conductive material for the conductor 170 is plated from the seed layer 911. In one example, copper is plated from the seed layer 911. This forms the metal layer 912 in the opening 921. The metal layer 912 is formed, for example, from a material containing copper. The metal layer 912 is integrated with the second seed layer 911B. Here, in FIG. 54 , to facilitate understanding of the drawing, the interface between the second seed layer 911B and the metal layer 912 is indicated by a two-dot chain line. However, in reality, this interface may not be formed. Also, although not shown, the metal layer 912 is formed in the opening 921 where the first electrode pad 67 is to be formed. This results in the first electrode pad 67 being manufactured.

[0463] Here, the end of the metal layer 912 on the seed layer 911 side has a rounded corner (curved surface) formed by the inward protrusion 922 of the resist 920. That is, in this process, the metal layer 912 has a rounded corner (curved surface) corresponding to the rear surface corner 177 of the conductive wire 170.

[0464] As shown in FIG. 55 , the manufacturing method for the first chip 60 includes a step of removing the resist 920 (see FIG. 54 ). This exposes the seed layer 911 and the metal layer 912. As shown in FIG. 56 , the manufacturing method for the first chip 60 includes a step of etching the seed layer 911 and the metal layer 912. In one example, this step includes a step of forming curved surfaces at both ends of the upper end of the metal layer 912 in the Y direction (front surface corner portions 913 in FIG. 55 ) and a step of removing the second seed layer 911B of the seed layer 911. More specifically, a resist (not shown) is formed on the upper end surface of the metal layer 912. The resist is formed so that the front surface corner portions 913 are exposed in a planar view. Subsequently, the metal layer 912 constituting the front surface corner portions 913 is removed by dry etching or wet etching. This results in the front surface corner portions 913 having rounded R surfaces (curved surfaces). That is, in this step, an R-surface (curved surface) corresponding to the front-side corner portion 176 of the conductive wire 170 is formed in the metal layer 912. Also, the second seed layer 911B is removed by dry etching or wet etching.

[0465] 57 , in the method for manufacturing the first chip 60, the portion of the seed layer 911 other than the portion on which the metal layer 912 is laminated is removed. More specifically, the portion of the seed layer 911 other than the portion on which the metal layer 912 is laminated is removed by, for example, etching. Through the above steps, the conducting wire 170 is formed. As a result, the first surface side coil 111A is formed.

[0466] Although not shown, the method for manufacturing the first chip 60 includes a step of forming a second organic insulating layer 192. The second organic insulating layer 192 is formed on the first organic insulating layer 191 by spin coating. The second organic insulating layer 192 is formed so as to cover the conductive wires 170 and the first electrode pads 67A, 67B. Furthermore, openings are formed in the second organic insulating layer 192 by etching, through which portions of the first electrode pads 67A, 67B are exposed. Through the above steps, the first chip 60 is manufactured.

[0467] [Effects] The signal transmission device 10 of the twelfth embodiment has the following effects. (12-1) The first surface side coil 111A of the first transformer 321 has a coil front surface 171, a coil back surface 172 opposite the coil front surface 171, and a coil side surface 173 connecting the coil front surface 171 and the coil back surface 172. A curved surface is formed between the coil front surface 171 and the coil side surface 173. A curved surface is formed between the coil back surface 172 and the coil side surface 173.

[0468] This configuration can alleviate electric field concentration at front-side corner portion 176 defined by coil front surface 171 and coil side surface 173, and can also alleviate electric field concentration at back-side corner portion 177 defined by coil back surface 172 and coil side surface 173. This prevents front-side corner portion 176 and back-side corner portion 177 from becoming starting points for dielectric breakdown, thereby improving the dielectric strength of first chip 60.

[0469] 58 and 59 , a signal transmission device 10 according to a thirteenth embodiment will be described. The signal transmission device 10 according to the thirteenth embodiment differs from the signal transmission device 10 according to the first embodiment in the configuration of the first chip 60. The following describes in detail the differences in the configuration of the first chip 60 from the first embodiment. Furthermore, the same reference numerals are used to designate components common to the first embodiment, and descriptions thereof will be omitted.

[0470] 58 , similarly to the first embodiment, the first chip 60 has an isolation transformer region 110, a circuit region 120, and a peripheral guard ring 100 that surrounds the isolation transformer region 110 and the circuit region 120. In one example, the circuit region 120 can be defined as the region surrounded by the peripheral guard ring 100 in a plan view, other than the isolation transformer region 110.

[0471] The isolation transformer region 110 electrically insulates the multiple functional units of the circuit region 120 from the second chip 70 while allowing signal transmission between the multiple functional units of the circuit region 120 and the second chip 70. The isolation transformer region 110 is formed closer to the second chip side surface 64 with respect to the center of the first chip 60 in the X direction in a planar view. That is, the isolation transformer region 110 is formed in a region of the first chip 60 that is closer to the second chip 70 in a planar view. The isolation transformer region 110 is formed closer to the third chip side surface 65 of the first chip 60. That is, the distance between the isolation transformer region 110 and the third chip side surface 65 in the Y direction is smaller than the distance between the isolation transformer region 110 and the fourth chip side surface 66 in the Y direction.

[0472] A first transformer 321 is formed in the insulating transformer region 110. In the thirteenth embodiment, the configuration of the first transformer 321 differs from that of the first embodiment. As shown in FIGS. 58 and 59 , the first transformer 321 includes a first surface side coil 111A, a first back side coil 111B, and a second surface side coil 112A and a second back side coil 112B. Although not shown, the first surface side coil 111A and the second surface side coil 112A are arranged at the same position as each other in the Z direction. The first back side coil 111B and the second back side coil 112B are arranged at the same position as each other in the Z direction.

[0473] The first front-side coil 111A, the second front-side coil 112A, the first back-side coil 111B, and the second back-side coil 112B may each contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten. In one example, the first front-side coil 111A and the second front-side coil 112A each contain copper, and the first back-side coil 111B and the second back-side coil 112B each contain aluminum. In another example, the first front-side coil 111A and the second front-side coil 112A each have a laminated structure of titanium and copper, and the first back-side coil 111B and the second back-side coil 112B each have a laminated structure of titanium nitride and aluminum.

[0474] 58, the first surface side coil 111A and the second surface side coil 112A are arranged at the same position in the X direction and spaced apart from each other in the Y direction. In the example shown in Fig. 58, the first surface side coil 111A is arranged closer to the third chip side surface 65 than the second surface side coil 112A.

[0475] 59 , the first back-side coil 111B and the second back-side coil 112B are arranged at the same position in the X direction and spaced apart from each other in the Y direction. In the example shown in Fig. 59 , the first back-side coil 111B is arranged closer to the third chip side surface 65 than the second back-side coil 112B.

[0476] 58, a plurality of first electrode pads 67 are formed in the insulating transformer region 110. The plurality of first electrode pads 67 are arranged at the same positions in the X direction and spaced apart from one another in the Y direction. Unlike the first embodiment, the plurality of first electrode pads 67 include three first electrode pads 67A to 67C. The first electrode pads 67A to 67C are arranged in this order from the third chip side surface 65 to the fourth chip side surface 66.

[0477] The first surface-side coil 111A includes a first coil portion 111A1 that is spiral in plan view, a first outer coil end portion 111A2, and a first inner coil end portion 111A3. The first outer coil end portion 111A2 constitutes the end portion of the first coil portion 111A1 in the winding direction at the outermost periphery, and the first inner coil end portion 111A3 constitutes the end portion of the first coil portion 111A1 in the winding direction at the innermost periphery.

[0478] The second surface-side coil 112A includes a second coil portion 112A1 that is spiral in plan view, a second outer coil end portion 112A2, and a second inner coil end portion 112A3. The second outer coil end portion 112A2 constitutes the end portion of the second coil portion 112A1 in the winding direction at the outermost periphery, and the second inner coil end portion 112A3 constitutes the end portion of the second coil portion 112A1 in the winding direction at the innermost periphery.

[0479] The first electrode pad 67A is disposed in an inner space including the winding center of the first coil portion 111A1 in a plan view. The first electrode pad 67A can be said to be located more inward than the first coil portion 111A1. The first electrode pad 67A is connected to the first inner coil end portion 111A3. Therefore, the first electrode pad 67A can be said to be electrically connected to the first end portion of the first surface side coil 111A.

[0480] The first electrode pad 67B is disposed between the first surface side coil 111A and the second surface side coil 112A in the Y direction in a plan view. The first electrode pad 67B is connected to the first outer coil end 111A2 of the first surface side coil 111A. The first electrode pad 67B is also connected to the second outer coil end 112A2 of the second surface side coil 112A. Therefore, it can be said that the first electrode pad 67B is electrically connected to the second end of the first surface side coil 111A and the second end of the second surface side coil 112A.

[0481] The first electrode pad 67C is disposed in an inner space including the winding center of the second coil portion 112A1 in a plan view. The first electrode pad 67C can be said to be located more inward than the second coil portion 112A1. The first electrode pad 67C is connected to the second inner coil end portion 112A3. Therefore, the first electrode pad 67C can be said to be electrically connected to the first end portion of the second surface side coil 112A.

[0482] The first surface side coil 111A and the second surface side coil 112A have the same number of turns. In a plan view, the first surface side coil 111A and the second surface side coil 112A are wound in opposite directions.

[0483] As shown in FIG. 59 , the first back-side coil 111B is disposed opposite the first front-side coil 111A (see FIG. 58 ) in the Z direction. The first back-side coil 111B includes a first coil portion 111B1 having a spiral shape in a plan view, a first outer coil end portion 111B2, and a first inner coil end portion 111B3. The first outer coil end portion 111B2 constitutes the end portion of the outermost periphery of the first coil portion 111B1 in the winding direction, and the first inner coil end portion 111B3 constitutes the end portion of the innermost periphery of the first coil portion 111B1 in the winding direction. The first outer coil end portion 111B2 is electrically connected to a functional unit (receiving unit 311 shown in FIG. 13 ) of the circuit area 120. The first inner coil end portion 111B3 is electrically connected to a functional unit (receiving unit 311) of the circuit area 120.

[0484] The second back-surface-side coil 112B is disposed opposite the second front-surface-side coil 112A (see FIG. 58 ) in the Z direction. The second back-surface-side coil 112B includes a second coil portion 112B1 having a spiral shape in a planar view, a second outer coil end portion 112B2, and a second inner coil end portion 112B3. The second outer coil end portion 112B2 constitutes the end portion of the outermost periphery of the second coil portion 112B1 in the winding direction, and the second inner coil end portion 112B3 constitutes the end portion of the innermost periphery of the second coil portion 112B1 in the winding direction. The second outer coil end portion 112B2 is electrically connected to a functional portion (receiving portion 311) of the circuit area 120. The second inner coil end portion 112B3 is electrically connected to a functional portion (receiving portion 311) of the circuit area 120.

[0485] The first back-side coil 111B and the second back-side coil 112B have the same number of turns. In a plan view, the winding direction of the first back-side coil 111B and the winding direction of the second back-side coil 112B are opposite to each other. In one example, the number of turns of the first back-side coil 111B and the second back-side coil 112B is equal to the number of turns of the first front-side coil 111A and the second front-side coil 112A.

[0486] 58, a surface-side guard ring 115 that surrounds the first surface-side coil 111A, the second surface-side coil 112A, and the first electrode pads 67A to 67C in a plan view is formed in the insulating transformer region 110. The shape of the surface-side guard ring 115 in a plan view is track-shaped, unlike in the first embodiment.

[0487] 59 , a back-side guard ring 116 is formed in the insulating transformer region 110 to surround the first back-side coil 111B and the second back-side coil 112B in a plan view. The back-side guard ring 116 has a track-like shape in a plan view. The back-side guard ring 116 has the same shape and size as the front-side guard ring 115. In a plan view, the back-side guard ring 116 is formed at a position overlapping the front-side guard ring 115.

[0488] Insulating transformer region 110, a plurality of vias 117 are formed to connect front-side guard ring 115 and back-side guard ring 116. Vias 117 are arranged at positions overlapping both front-side guard ring 115 and back-side guard ring 116 in plan view.

[0489] 58 , the circuit region 120 is a region in which a plurality of functional units and a plurality of circuit elements are formed. In one example, the circuit region 120 is formed with the receiving unit 311, output control unit 312, clamp control unit 313, UVLO unit 314, first output switching elements 315A and 315B, second output switching element 316, resistor 317, switching element 318, and diode 319 shown in FIG. 13 . Here, the receiving unit 311, output control unit 312, clamp control unit 313, and UVLO unit 314 correspond to the plurality of functional units, and the first output switching elements 315A and 315B, second output switching element 316, resistor 317, switching element 318, and diode 319 correspond to the plurality of circuit elements.

[0490] The circuit region 120 is provided with a plurality of wiring layers 121. The plurality of wiring layers 121 includes a wiring layer that electrically connects the plurality of functional units and a wiring layer that electrically connects the plurality of functional units and the first transformer 321 in the isolation transformer region 110. The circuit region 120 is also provided with a plurality of second electrode pads 68 and one third electrode pad 69. Note that the arrangement of the plurality of second electrode pads 68 and one third electrode pad 69 is not limited to the arrangement shown in FIG. 58 and can be changed as desired.

[0491] As shown in Figures 58 and 59, the outer periphery guard ring 100 includes a front-side outer periphery guard ring 101 and a back-side outer periphery guard ring 102. As shown in Figure 58, the front-side outer periphery guard ring 101 is formed so as to surround the outer periphery of the first chip 60 in a plan view. The front-side outer periphery guard ring 101 has a rectangular shape in a plan view with four rounded corners. The front-side guard ring 115 is connected to the front-side outer periphery guard ring 101. More specifically, the portion of the front-side guard ring 115 closer to the second chip side surface 64 is integrated with the front-side outer periphery guard ring 101. This allows the front-side guard ring 115 to be electrically connected to the front-side outer periphery guard ring 101.

[0492] 59 , the shape and size of the back-side outer peripheral guard ring 102 are the same as those of the front-side outer peripheral guard ring 101 (see FIG. 58 ). The back-side guard ring 116 is connected to the back-side outer peripheral guard ring 102. More specifically, the portion of the back-side guard ring 116 closer to the second chip side surface 64 is integrated with the back-side outer peripheral guard ring 102. This electrically connects the back-side guard ring 116 to the back-side outer peripheral guard ring 102.

[0493] Although not shown, the first chip 60 has a plurality of peripheral vias that connect the front-side peripheral guard ring 101 and the back-side peripheral guard ring 102. The front-side peripheral guard ring 101 and the back-side peripheral guard ring 102 are electrically connected by the plurality of peripheral vias. Each peripheral via extends in the Z direction.

[0494] The cross-sectional structures of the first front-surface side coil 111A and the second front-surface side coil 112A are the same as the cross-sectional structure of the first front-surface side coil 111A of the first embodiment. The cross-sectional structures of the first back-surface side coil 111B and the second back-surface side coil 112B are the same as the cross-sectional structure of the first back-surface side coil 111B of the first embodiment. Note that the signal transmission device 10 of the thirteenth embodiment can achieve the same effects as the first embodiment.

[0495] 60 to 63, a signal transmission device 10 according to a fourteenth embodiment will be described. The signal transmission device 10 according to the fourteenth embodiment differs from the signal transmission device 10 according to the first embodiment in the configuration of the first chip 60. The following describes in detail the differences in the configuration of the first chip 60 from the first embodiment. Furthermore, the same reference numerals are used to designate components common to the first embodiment, and their description will be omitted.

[0496] [Internal Structure of First Chip] Fig. 60 shows a schematic planar structure of an example of the internal configuration of the first chip 60 near the chip front surface 61. Fig. 61 is an enlarged view of an insulating transformer region 110, which will be described later, in Fig. 60. Fig. 62 shows a schematic planar structure of an example of the internal structure of the first chip 60 near the chip back surface 62. Fig. 63 is an enlarged view of the insulating transformer region 110 in Fig. 62.

[0497] As shown in FIG. 60, the first chip 60 has an insulating transformer region 110, a circuit region 120, and an outer periphery guard ring 100 connected to the insulating transformer region 110 and surrounding the circuit region 120.

[0498] The isolation transformer region 110 is a region that electrically insulates the circuit region 120 from the second chip 70 while allowing signal transmission between the circuit region 120 and the second chip 70. The isolation transformer region 110 is formed closer to the second chip side surface 64 with respect to the center of the first chip 60 in the X direction in a plan view. In other words, the isolation transformer region 110 is formed in a region of the first chip 60 that is closer to the second chip 70 (see FIG. 7 ) in a plan view. The isolation transformer region 110 extends over substantially the entire first chip 60 in the Y direction.

[0499] The circuit region 120 includes multiple functional units and multiple circuit elements of the receiver circuit 310 in FIG. 13 . The isolation transformer region 110 includes a first transformer 321 and a second transformer 322. That is, in the fourteenth embodiment, unlike the first embodiment, the isolation transformer region 110 includes two transformers. The first transformer 321 and the second transformer 322 are arranged at the same position in the X direction and spaced apart from each other in the Y direction. In the example shown in FIG. 60 , the first transformer 321 is arranged closer to the third chip side surface 65 in the isolation transformer region 110, and the second transformer 322 is arranged closer to the fourth chip side surface 66 in the isolation transformer region 110.

[0500] 60 and 62, the first transformer 321 includes a first front surface side coil 111A, a first back surface side coil 111B, a second front surface side coil 112A, and a second back surface side coil 112B. The second transformer 322 includes a third front surface side coil 113A, a third back surface side coil 113B, and a fourth front surface side coil 114A, and a fourth back surface side coil 114B.

[0501] 60, the first to fourth surface side coils 111A to 114A are arranged at the same positions in the X direction and spaced apart from one another in the Y direction. The first to fourth surface side coils 111A to 114A are arranged in the order of the first surface side coil 111A, the second surface side coil 112A, the third surface side coil 113A, and the fourth surface side coil 114A, moving from the third chip side surface 65 to the fourth chip side surface 66.

[0502] 62, the first to fourth back-side coils 111B to 114B are arranged at the same positions in the X direction and spaced apart from one another in the Y direction. The first to fourth back-side coils 111B to 114B are arranged in the order of the first back-side coil 111B, the second back-side coil 112B, the third back-side coil 113B, and the fourth back-side coil 114B, moving from the third chip side-face 65 to the fourth chip side-face 66.

[0503] Although not shown, the first front surface side coil 111A, the second front surface side coil 112A, the third front surface side coil 113A, and the fourth front surface side coil 114A are arranged at the same positions in the Z direction. The first back surface side coil 111B, the second back surface side coil 112B, the third back surface side coil 113B, and the fourth back surface side coil 114B are arranged at the same positions in the Z direction.

[0504] The first to fourth front-surface side coils 111A to 114A and the first to fourth back-surface side coils 111B to 114B may each contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten. For example, the first to fourth front-surface side coils 111A to 114A contain copper, and the first to fourth back-surface side coils 111B to 114B contain aluminum. For example, the first to fourth front-surface side coils 111A to 114A have a laminated structure of titanium and copper, and the first to fourth back-surface side coils 111B to 114B have a laminated structure of titanium nitride and aluminum.

[0505] 60, a plurality of first electrode pads 67 are formed in the insulating transformer region 110. The plurality of first electrode pads 67 are arranged at the same positions in the X direction and spaced apart from one another in the Y direction. The plurality of first electrode pads 67 include six first electrode pads 67A to 67F. The first electrode pads 67A to 67F are arranged in the order of first electrode pads 67A, 67B, 67C, 67D, 67E, and 67F as they move from the third chip side surface 65 to the fourth chip side surface 66.

[0506] 61 , the first surface-side coil 111A includes a first coil portion 111A1 that is spiral in plan view, a first outer coil end portion 111A2, and a first inner coil end portion 111A3. The first outer coil end portion 111A2 constitutes the end portion of the first coil portion 111A1 in the winding direction at the outermost periphery, and the first inner coil end portion 111A3 constitutes the end portion of the first coil portion 111A1 in the winding direction at the innermost periphery.

[0507] The second surface-side coil 112A includes a second coil portion 112A1 that is spiral in plan view, a second outer coil end portion 112A2, and a second inner coil end portion 112A3. The second outer coil end portion 112A2 constitutes the end portion of the second coil portion 112A1 in the winding direction at the outermost periphery, and the second inner coil end portion 112A3 constitutes the end portion of the second coil portion 112A1 in the winding direction at the innermost periphery.

[0508] The first electrode pad 67A is disposed in an inner space including the winding center of the first coil portion 111A1 in a plan view. The first electrode pad 67A can be said to be located more inward than the first coil portion 111A1. The first electrode pad 67A is connected to the first inner coil end portion 111A3. Therefore, the first electrode pad 67A can be said to be electrically connected to the first end portion of the first surface side coil 111A.

[0509] The first electrode pad 67B is disposed between the first surface side coil 111A and the second surface side coil 112A in the Y direction in a plan view. The first electrode pad 67B is connected to the first outer coil end 111A2 of the first surface side coil 111A. The first electrode pad 67B is also connected to the second outer coil end 112A2 of the second surface side coil 112A. Therefore, it can be said that the first electrode pad 67B is electrically connected to the second end of the first surface side coil 111A and the second end of the second surface side coil 112A.

[0510] The first electrode pad 67C is disposed in an inner space including the winding center of the second coil portion 112A1 in a plan view. The first electrode pad 67C can be said to be located more inward than the second coil portion 112A1. The first electrode pad 67C is connected to the second inner coil end portion 112A3. Therefore, the first electrode pad 67C can be said to be electrically connected to the first end portion of the second surface side coil 112A.

[0511] The third surface-side coil 113A includes a third coil portion 113A1 that is spiral in plan view, a third outer coil end portion 113A2, and a third inner coil end portion 113A3. The third outer coil end portion 113A2 constitutes the end portion of the third coil portion 113A1 in the winding direction at the outermost periphery, and the third inner coil end portion 113A3 constitutes the end portion of the third coil portion 113A1 in the winding direction at the innermost periphery.

[0512] The fourth surface-side coil 114A includes a fourth coil portion 114A1 that is spiral in plan view, a fourth outer coil end portion 114A2, and a fourth inner coil end portion 114A3. The fourth outer coil end portion 114A2 constitutes the end portion of the fourth coil portion 114A1 in the winding direction at the outermost periphery, and the fourth inner coil end portion 114A3 constitutes the end portion of the fourth coil portion 114A1 in the winding direction at the innermost periphery.

[0513] The first electrode pad 67D is disposed in an inner space including the winding center of the third coil portion 113A1 in a plan view. The first electrode pad 67D can be said to be located more inward than the third coil portion 113A1. The first electrode pad 67D is connected to the third inner coil end portion 113A3. Therefore, the first electrode pad 67D can be said to be electrically connected to the first end portion of the third surface side coil 113A.

[0514] The first electrode pad 67E is disposed between the third surface side coil 113A and the fourth surface side coil 114A in the Y direction in a plan view. The first electrode pad 67E is connected to the third outer coil end 113A2 of the third surface side coil 113A. The first electrode pad 67E is also connected to the fourth outer coil end 114A2 of the fourth surface side coil 114A. Therefore, it can be said that the first electrode pad 67E is electrically connected to the second end of the third surface side coil 113A and the second end of the fourth surface side coil 114A.

[0515] The first electrode pad 67F is disposed in an inner space including the winding center of the fourth coil portion 114A1 in a plan view. The first electrode pad 67F can be said to be located inward of the fourth coil portion 114A1. The first electrode pad 67F is connected to the fourth inner coil end portion 114A3. Therefore, the first electrode pad 67F can be said to be electrically connected to the first end portion of the fourth surface side coil 114A.

[0516] 60 and 61 , the first to fourth surface side coils 111A to 114A have the same number of windings. In a plan view, the winding direction of the first surface side coil 111A and the winding direction of the second surface side coil 112A are opposite to each other, and the winding direction of the third surface side coil 113A and the winding direction of the fourth surface side coil 114A are opposite to each other. The winding direction of the first surface side coil 111A and the winding direction of the third surface side coil 113A are the same, and the winding direction of the second surface side coil 112A and the winding direction of the fourth surface side coil 114A are the same.

[0517] As shown in FIG. 63 , the first back-side coil 111B is disposed opposite the first front-side coil 111A (see FIG. 60 ) in the Z direction. The first back-side coil 111B includes a first coil portion 111B1 having a spiral shape in a plan view, a first outer coil end portion 111B2, and a first inner coil end portion 111B3. The first outer coil end portion 111B2 constitutes the end portion of the outermost periphery of the first coil portion 111B1 in the winding direction, and the first inner coil end portion 111B3 constitutes the end portion of the innermost periphery of the first coil portion 111B1 in the winding direction. The first outer coil end portion 111B2 is connected to a first connection wiring 118A extending in the X direction. The first connection wiring 118A is electrically connected to the receiving unit 311 (see FIG. 13 ) of the circuit area 120 (see FIG. 60 ). The first inner coil end portion 111B3 is connected to a first wiring (not shown). The first wiring is electrically connected to the receiving section 311 of the circuit region 120 .

[0518] The second back-side coil 112B is positioned opposite the second front-side coil 112A (see FIG. 60 ) in the Z direction. The second back-side coil 112B includes a second coil portion 112B1 that is spiral-shaped in a plan view, a second outer coil end portion 112B2, and a second inner coil end portion 112B3. The second outer coil end portion 112B2 constitutes the end portion of the outermost periphery of the second coil portion 112B1 in the winding direction, and the second inner coil end portion 112B3 constitutes the end portion of the innermost periphery of the second coil portion 112B1 in the winding direction. The second outer coil end portion 112B2 is connected to a second connection wiring 118B that extends in the X direction. The second connection wiring 118B is positioned adjacent to the first connection wiring 118A in the Y direction. The second connection wiring 118B is positioned closer to the second back-side coil 112B than the first connection wiring 118A. The second connection wiring 118B is electrically connected to the receiving section 311 of the circuit area 120. The second inner coil end portion 112B3 is connected to a second wiring (not shown). The second wiring is electrically connected to the receiving section 311 of the circuit area 120.

[0519] The third back-surface-side coil 113B is disposed opposite the third front-surface-side coil 113A (see FIG. 60 ) in the Z direction. The third back-surface-side coil 113B includes a third coil portion 113B1 having a spiral shape in a plan view, a third outer coil end portion 113B2, and a third inner coil end portion 113B3. The third outer coil end portion 113B2 constitutes the end portion of the third coil portion 113B1 in the winding direction at the outermost periphery, and ...

Claims

1. a first chip including an isolation transformer; a second chip configured to transmit and / or receive signals to / from the first chip; a first die pad on which the first chip is mounted; a second die pad spaced apart from the first die pad in a first direction and on which the second chip is mounted; a plurality of first lead terminals arranged in the first direction and disposed in a second direction intersecting the first direction in a plan view with respect to both the first die pad and the second die pad; a plurality of second lead terminals arranged in the first direction and disposed on the opposite side of the plurality of first lead terminals with respect to both the first die pad and the second die pad in the second direction; an inter-chip wire connecting the first chip and the second chip; a first lead wire individually connecting the first chip and the plurality of first lead terminals, and comprising: the inter-chip wire is formed of a material containing gold; the first lead wire is formed of a material containing copper or aluminum A signal transmission device.

2. The first lead wire has a structure in which palladium is coated on the surface of a copper wire The signal transmission device according to claim 1.

3. The signal transmission device according to claim 1, further comprising a plurality of second lead wires individually connecting the second chip and the plurality of second lead terminals, and the second lead wire is formed of a material containing copper or aluminum The signal transmission device according to claim 1.

4. The signal transmission device according to claim 1, further comprising a first die pad wire connecting the first chip and the first die pad, and the first die pad wire is formed of a material containing copper or aluminum The signal transmission device according to claim 1.

5. The signal transmission device according to claim 1, further comprising a second die pad wire connecting the second chip and the second die pad, and the second die pad wire is formed of a material containing copper or aluminum The signal transmission device according to claim 1.

6. The first die pad wire is a bonding wire, and a security bond is formed at a joint of the first die pad wire with the first die pad The signal transmission device according to claim 4.

7. The second die pad wire is a bonding wire, A security bond is formed at the joint of the wire for the second die pad and the second die pad. The signal transmission device according to claim 5.

8. The plurality of first lead terminals A first portion extending in the second direction; A second portion that is continuously provided on the first portion and extends in a direction intersecting the first portion in a plan view with respect to the first portion, and The second portion includes a side surface that intersects in a plan view with the wire for the first lead connected to the second portion, The side surface faces the first die pad in a plan view. The signal transmission device according to claim 1.

9. The plurality of inter-chip wires are formed to be parallel to each other in a plan view. The signal transmission device according to claim 1.

10. Further provided is a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wire, the wire for the first lead, the first die pad, and the second die pad, and partially seals each of the first lead terminals and each of the second lead terminals, The plurality of first lead terminals A first connection terminal integrated with the first die pad; A first separated terminal disposed apart from the first die pad; And The first separated terminal has a through hole penetrating in the thickness direction of the first separated terminal, The through hole is filled with the sealing resin. The signal transmission device according to claim 1.

11. Further provided is a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wire, the wire for the first lead, the first die pad, and the second die pad, and partially seals each of the first lead terminals and each of the second lead terminals, Each of the first lead terminals A first outer lead portion exposed outside the sealing resin; A first inner lead portion provided inside the sealing resin and connected to the first outer lead portion, and The plurality of first lead terminals A first specific terminal having a through hole penetrating in the thickness direction of the first lead terminal formed in the first inner lead portion; A second specific terminal having no through hole formed in the first inner lead portion; And The plurality of wires for the first lead A first specific wire joined to the first specific terminal; A second specific wire joined to the second specific terminal; And A security bond is formed at the joint portion of the second specific wire joined to the second specific terminal. The signal transmission device according to claim 1.

12. Further provided is a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad, and partially seals each of the first lead terminals and the second lead terminals. The sealing resin has a sealing surface, a sealing back surface opposite to the sealing surface, and a sealing side surface connecting the sealing surface and the sealing back surface. The sealing side surface is a first sealing side surface where the plurality of first lead terminals are exposed, a second sealing side surface where the plurality of second lead terminals are exposed, a third sealing side surface and a fourth sealing side surface connecting the first sealing side surface and the second sealing side surface, and includes Both the third sealing side surface and the fourth sealing side surface are composed only of the sealing resin without exposing the conductive member. The signal transmission device according to claim 1.

13. The first chip includes an element insulating layer, a first resin layer provided on the element insulating layer, and a second resin layer provided on the first resin layer. The insulating transformer includes a surface-side coil disposed on the first resin layer and covered by the second resin layer, and a back-side coil disposed opposite to the surface-side coil in the thickness direction of the element insulating layer and embedded in the element insulating layer. The signal transmission device according to claim 1.

14. Further provided is a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad, and partially seals each of the first lead terminals and the second lead terminals. The first chip includes an element insulating layer, a passivation film formed on the element insulating layer so as to cover the element insulating layer, and a low dielectric layer formed on the surface of the passivation film and having a lower relative permittivity than the passivation film. The sealing resin covers the low dielectric layer. The signal transmission device according to claim 1.

15. The insulating transformer includes a surface-side coil disposed near the chip surface of the first chip, and a back-side coil disposed opposite to the surface-side coil. The surface-side coil includes a coil surface, and a coil back surface opposite to the coil surface. ​ ​ a coil side surface connecting the coil front surface and the coil back surface, having, a curved surface is formed between the coil front surface and the coil side surface The signal transmission device according to claim 1.

16. The first chip includes a flat substrate mounted on the first die pad, an element insulating layer formed on the substrate and provided with at least a part of the insulating transformer, The substrate includes a substrate back surface facing the first die pad, a substrate front surface on the side opposite to the substrate back surface, a substrate side surface connecting the substrate back surface and the substrate front surface, a first portion including the substrate back surface, a second portion provided on the first portion and including the substrate front surface, a stepped portion formed such that the second portion is located inside the substrate with respect to the first portion The signal transmission device according to claim 1.

17. The first lead terminal includes a first outer lead connection portion disposed at least partially offset with respect to the first die pad in the first direction, a first die pad connection portion connected to the first die pad, including, The first die pad connection portion extends linearly obliquely from the first outer lead connection portion toward the center of gravity of the first die pad in plan view The signal transmission device according to claim 1.

18. further comprising a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad and partially seals each of the first lead terminals and each of the second lead terminals, The first lead terminal includes a first inner lead portion provided in the sealing resin, The first inner lead portion includes a wire connection portion to which the first lead wire is connected, The wire connection portion includes an inner lead front surface to which the first lead wire is joined, an inner lead back surface facing the side opposite to the inner lead front surface, an inner lead side surface connecting the inner lead front surface and the inner lead back surface, having, The inner lead side surface includes a facing surface facing the first die pad in the second direction, a plating layer is formed on the inner lead front surface, the plating layer is not formed at an end portion of the inner lead front surface on the facing surface side and is in contact with the sealing resin The signal transmission device according to claim 1.

19. Further provided is a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad, and partially seals each of the first lead terminals and each of the second lead terminals. The plurality of first lead terminals include a first outer lead portion protruding outside the sealing resin. The first outer lead portion has an outer lead surface, an outer lead back surface facing the side opposite to the outer lead surface, an outer lead side surface connecting the outer lead surface and the outer lead back surface in the width direction of the first outer lead portion, and an outer lead end surface that is an end surface in the direction in which the first outer lead portion extends. It has, and a plating layer is formed on the outer lead surface, the outer lead back surface, and the outer lead side surface. The plating layer is continuously formed from the outer lead back surface toward the outer lead surface among the outer lead end surfaces and is separated from the outer lead surface. The signal transmission device according to claim 1.

20. Further provided is a rectangular plate-shaped sealing resin that seals the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad, and partially seals each of the first lead terminals and each of the second lead terminals. The outer surface of the sealing resin is formed such that the surface roughness Rz is 8 μm or more. The signal transmission device according to claim 1.