Signal transmission device
Patent Information
- Application Number
- JP2024549331
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Priority Date
- 2023-09-22
- Filing Date
- 2023-09-22
- Publication Date
- 2025-06-12
AI Technical Summary
Conventional signal transmission devices lack accurate inspection methods for the shape and wire height of interchip wires, which are crucial for ensuring insulation reliability.
The signal transmission device incorporates a first chip with an isolation transformer, a second chip, and interchip wires made of gold, along with lead terminals and lead wires made of copper or aluminum, allowing for precise inspection of wire height and configuration.
This configuration enables more accurate inspection and potentially enhances the insulation reliability of interchip connections, improving the overall performance of the signal transmission device.
Abstract
Description
signal transmission device
[0001] The present disclosure relates to a signal transmission device.
[0002] A signal transmission device has been known that includes a first die pad, a second die pad disposed at a distance from the first die pad, a first chip and a transformer chip mounted on the first die pad, a second chip mounted on the second die pad, and a sealing resin that seals the die pads and chips (see, for example, Patent Document 1). In such a signal transmission device, the first chip and the transformer chip are electrically connected by a wire, and the transformer chip and the second chip are electrically connected by another wire.
[0003] Japanese Patent Application Laid-Open No. 2016-207714
[0004] From the viewpoint of the insulation reliability of signal transmission devices, it is desired to inspect with higher accuracy the shape and height of inter-chip wires that electrically connect adjacent chips.
[0005] a first die pad on which the first chip is mounted; a second die pad disposed spaced apart from the first die pad in a first direction and on which the second chip is mounted; a plurality of first lead terminals disposed spaced apart on an opposite side of the first die pad from the second die pad in the first direction in a plan view and arranged in a second direction orthogonal to the first direction in a plan view; a plurality of second lead terminals disposed spaced apart on an opposite side of the second die pad from the first die pad in the first direction in a plan view and arranged in the second direction in a plan view; inter-chip wires electrically connecting the first chip and the second chip; and first lead wires individually connecting the first chip and the plurality of first lead terminals; The first end lead terminals, which are first lead terminals arranged at both ends, include a first lead portion extending in the first direction, a second lead portion connected to the first lead portion and extending obliquely toward the first die pad in the second direction as it approaches the second die pad in the first direction, and a third lead portion extending in the second direction to connect the second lead portion and the first die pad; the second end lead terminals, which are second lead terminals of the plurality of second lead terminals arranged at both ends in the second direction, include a fourth lead portion extending in the first direction, a fifth lead portion connected to the fourth lead portion and extending obliquely toward the second die pad in the second direction as it approaches the first die pad in the first direction, and a sixth lead portion extending in the second direction to connect the fifth lead portion and the second die pad; the inter-chip wire is formed of a material containing gold, and the first lead wire is formed of a material containing copper or aluminum.
[0006] According to the signal transmission device, the wire height of the inter-chip wires can be inspected with higher accuracy.
[0007] FIG. 1 is a perspective view of a signal transmission device of a first embodiment. FIG. 2 is a side view of the signal transmission device of FIG. 1. FIG. 3 is a side view of the signal transmission device of FIG. 1 viewed from a different direction than FIG. 2. FIG. 4 is an enlarged view of a second lead terminal and its periphery of FIG. 3. FIG. 5 is an enlarged view of an outer lead end face of the second lead terminal of FIG. 4. FIG. 6 is a side view of the signal transmission device mounted on a circuit board. FIG. 7 is a schematic plan view showing the internal configuration of the signal transmission device of FIG. 1. FIG. 8 is an enlarged view of a first die pad and its periphery of FIG. 7. FIG. 9 is an enlarged view of a first frame and its periphery of FIG. 7. FIG. 10 is a schematic cross-sectional view of a wire connection portion of the first lead terminal. FIG. 11 is an enlarged view of a second die pad and its periphery of FIG. 7. FIG. 12 is an enlarged view of a second frame and its periphery of FIG. 7. FIG. 13 is a schematic cross-sectional view of a wire connection portion of the second lead terminal. FIG. 14 is an enlarged view of an inter-chip wire and its periphery of FIG. 7. FIG. 15 is an enlarged perspective view of a second bond portion of a wire for a first die pad and its periphery. FIG. 16 is a circuit diagram of a signal transmission device according to the first embodiment. FIG. 17 is a schematic plan view showing an example of the internal structure of a first chip in the signal transmission device according to the first embodiment. FIG. 18 is a schematic plan view showing an example of the internal structure of a first chip at a position different from that shown in FIG. 17 in the thickness direction of the first chip. FIG. 19 is a cross-sectional view showing the cross-sectional structure of a first transformer of the first chip and its periphery. FIG. 20 is an enlarged view of a portion of the first chip in FIG. 19. FIG. 21 is an enlarged view of the conductor wire of the first front-side coil in the first chip in FIG. 20. FIG. 22 is an enlarged view of the conductor wire of the first back-side coil in the first chip in FIG. 20. FIG. 23 is a cross-sectional view showing the cross-sectional structure of a portion of the circuit region of the first chip. FIG. 24 is an enlarged view of the first via in FIG. 23 and its periphery. FIG. 25 is a schematic plan view showing an example of the internal structure of a second chip in the signal transmission device according to the first embodiment. Fig. 26 is a schematic plan view showing an example of the internal structure of the second chip at a position different in the thickness direction of the second chip from that in Fig. 25. Fig. 27 is an enlarged plan view of the first frame and its periphery in the signal transmission device of the second embodiment.FIG. 28 is an enlarged plan view of the second frame and its periphery in the signal transmission device of the second embodiment. FIG. 29 is an enlarged plan view of the first frame and its periphery in the signal transmission device of the third embodiment. FIG. 30 is an enlarged plan view of the second frame and its periphery in the signal transmission device of the third embodiment. FIG. 31 is an enlarged plan view of the first die pad, the second die pad, and their periphery in the signal transmission device of the fourth embodiment. FIG. 32 is a schematic cross-sectional view of the first chip and the first die pad in the signal transmission device of the fifth embodiment. FIG. 33 is a schematic cross-sectional view of the first chip and the first die pad cut in a direction different from that in FIG. 32. FIG. 34 is a schematic cross-sectional view of the second chip and the second die pad. FIG. 35 is a schematic cross-sectional view of the second chip and the second die pad cut in a direction different from that in FIG. 34. FIG. 36 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device of the fifth embodiment. FIG. 37 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 36 . FIG. 38 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 37 . FIG. 39 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 38 . FIG. 40 is a plan view schematically showing the internal structure of a signal transmission device of a sixth embodiment. FIG. 41 is a perspective view of a signal transmission device of a seventh embodiment. FIG. 42 is a schematic plan view showing the internal configuration of the signal transmission device of FIG. 41 . FIG. 43 is a plan view enlarged of a first frame and its periphery of the signal transmission device of FIG. 42 . FIG. 44 is a plan view enlarged of a second frame and its periphery of the signal transmission device of FIG. 42 . FIG. 45 is a circuit diagram of a signal transmission device of a seventh embodiment. FIG. 46 is a plan view enlarged of a first frame and its periphery of a signal transmission device of an eighth embodiment. FIG. 47 is a plan view enlarged of a second frame and its periphery of the signal transmission device of the eighth embodiment. Fig. 48 is an enlarged plan view of a first frame and its periphery in a signal transmission device of a ninth embodiment, Fig. 49 is an enlarged plan view of a second frame and its periphery in a signal transmission device of a ninth embodiment, and Fig. 50 is a plan view schematically showing the internal structure of a signal transmission device of a tenth embodiment.FIG. 51 is a cross-sectional view schematically showing an example of the cross-sectional structure of the first transformer on the first chip and its periphery in the signal transmission device of the eleventh embodiment. FIG. 52 is an enlarged cross-sectional view of a portion of the first transformer of FIG. 51 and its periphery. FIG. 53 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device of the eleventh embodiment. FIG. 54 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 53. FIG. 55 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 54. FIG. 56 is a cross-sectional view schematically showing the cross-sectional structure of the first transformer on the first chip and a portion of its periphery in the signal transmission device of the twelfth embodiment. FIG. 57 is an enlarged cross-sectional view of a portion of the first surface side coil in the first transformer on the first chip and its periphery in the signal transmission device of the thirteenth embodiment. FIG. 58 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device of the thirteenth embodiment. FIG. 59 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 58. FIG. 60 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 59 . FIG. 61 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 60 . FIG. 62 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 61 . FIG. 63 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 62 . FIG. 64 is an enlarged cross-sectional view of a portion of the first surface side coil and its periphery in the first transformer of the first chip for the signal transmission device of the fourteenth embodiment. FIG. 65 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device of the fourteenth embodiment. FIG. 66 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 65 . FIG. 67 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 66 . FIG. 68 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 67 . FIG. 69 is a cross-sectional view schematically showing an example of a manufacturing process for the signal transmission device subsequent to FIG. 68 . Fig. 70 is a schematic plan view showing an example of the internal structure of a first chip in a signal transmission device according to a fifteenth embodiment. Fig. 71 is a schematic plan view showing an example of the internal structure of the first chip at a position different from that in Fig. 70 in the thickness direction of the first chip.FIG. 72 is a plan view schematically showing the internal structure of a first chip in a signal transmission device of a sixteenth embodiment. FIG. 73 is an enlarged view of a transformer insulating region in the first chip of FIG. 72. FIG. 74 is a schematic plan view showing an example of the internal structure of the first chip at a position different in the thickness direction of the first chip from that of FIG. 72. FIG. 75 is an enlarged view of the transformer insulating region in the first chip of FIG. 74. FIG. 76 is a plan view showing an example of the internal structure of a first chip in a signal transmission device of a modified example. FIG. 77 is a schematic plan view showing the internal structure of the first chip at a position different in the thickness direction of the first chip from that of FIG. 76. FIG. 78 is a plan view schematically showing the internal structure of a signal transmission device of a modified example.
[0008] Hereinafter, several embodiments of a signal transmission device according to the present disclosure will be described with reference to the accompanying drawings. Note that for simplicity and clarity of description, the components shown in the drawings are not necessarily drawn to scale. Also, hatching lines may be omitted in cross-sectional views to facilitate understanding. The accompanying drawings merely illustrate embodiments of the present disclosure and should not be considered as limiting the present disclosure.
[0009] The following detailed description includes devices, systems, and methods embodying exemplary embodiments of the present disclosure. This detailed description is merely illustrative in nature and is not intended to limit the embodiments of the present disclosure or the application and uses of such embodiments.
[0010] <First Embodiment> A signal transmission device 10 according to the first embodiment will be described with reference to Figures 1 to 26. Figures 1 to 6 show the external structure of the signal transmission device 10. Figures 7 to 15 show the internal structure of the signal transmission device 10. Figure 16 shows the circuit configuration of the signal transmission device 10. Figures 17 to 24 show the internal structure of a first chip 60 (described later) of the signal transmission device 10. Figures 25 and 26 show the internal structure of a second chip 70 (described later) of the signal transmission device 10.
[0011] [External Configuration of Signal Transmission Device] Fig. 1 shows a perspective view of the signal transmission device 10. Figs. 2 and 3 show a side view of the signal transmission device 10. Fig. 4 shows an enlarged view of a portion of a second lead terminal 48 (described later) of the signal transmission device 10.
[0012] 1, the signal transmission device 10 has a small outline package (SOP) package structure. However, the package structure of the signal transmission device 10 can be changed as desired, and may be a quad for non-lead package (QFN), dual flat package (DFP), dual inline package (DIP), quad flat package (QFP), single inline package (SIP), small outline J-leaded package (SOJ), or any of a variety of similar package structures.
[0013] As shown in FIG. 1, the signal transmission device 10 includes a sealing resin 90, a plurality of first lead terminals 11 to 18 (eight in the first embodiment) protruding from the sealing resin 90, and a plurality of second lead terminals 41 to 48 (eight in the first embodiment) protruding from the sealing resin 90.
[0014] The sealing resin 90 is formed in a rectangular plate shape. Here, in this specification, the thickness direction of the sealing resin 90 is referred to as the "Z direction," and two mutually orthogonal directions perpendicular to the Z direction are referred to as the "X direction" and the "Y direction." Furthermore, the upper side of the Z direction is referred to as the "+Z direction," and the lower side is referred to as the "-Z direction." In FIG. 1 , the front side of the X direction is referred to as the "-X direction," and the rear side is referred to as the "+X direction." In FIG. 1 , the right side of the Y direction is referred to as the "+Y direction," and the left side is referred to as the "-Y direction." Furthermore, in this specification, the term "planar view" refers to viewing the signal transmission device 10 from the thickness direction of the sealing resin 90. Unless otherwise specified, the term "planar view" refers to viewing the signal transmission device 10 from the +Z direction.
[0015] The shape of the sealing resin 90 in plan view is a rectangle with the longitudinal direction in the Y direction and the lateral direction in the X direction. In one example, the dimension of the sealing resin 90 in the X direction is about 7.52 mm, the dimension of the sealing resin 90 in the Y direction is about 10.34 mm, and the dimension (thickness) of the sealing resin 90 in the Z direction is about 2.34 mm.
[0016] As shown in FIGS. 1 to 3 , the sealing resin 90 has a sealing surface 91, a sealing back surface 92 opposite the sealing surface 91, and first to fourth sealing side surfaces 93 to 96 connecting the sealing surface 91 and the sealing back surface 92. The sealing surface 91 faces in the +Z direction, and the sealing back surface 92 faces in the −Z direction. The first sealing side surface 93 and the second sealing side surface 94 constitute both end surfaces of the sealing resin 90 in the X direction, and the third sealing side surface 95 and the fourth sealing side surface 96 constitute both end surfaces of the sealing resin 90 in the Y direction. The first sealing side surface 93 faces in the +X direction, and the second sealing side surface 94 faces in the −X direction. The third sealing side surface 95 faces in the +Y direction, and the fourth sealing side surface 96 faces in the −Y direction.
[0017] 1, a recess 91A is formed in the sealing surface 91. The recess 91A is circular in plan view. The recess 91A is recessed in a curved concave shape from the sealing surface 91. The recess 91A is formed in a portion of the sealing surface 91 that is closer to the first sealing side surface 93 and the fourth sealing side surface 96. The recess 91A serves as a marker for distinguishing the first lead terminals 11 to 18 from the second lead terminals 41 to 48.
[0018] As shown in FIG. 3 , the first sealing side surface 93 includes a first front side surface 93A continuous with the sealing surface 91, a first back side surface 93B continuous with the sealing back surface 92, and a first central side surface 93C. The second sealing side surface 94 includes a second front side surface 94A continuous with the sealing surface 91, a second back side surface 94B continuous with the sealing back surface 92, and a second central side surface 94C. The first front side surface 93A and the second front side surface 94A are inclined away from each other as they extend from the sealing surface 91 toward the sealing back surface 92. The connection between the first front side surface 93A and the sealing surface 91 is curved. The connection between the second front side surface 94A and the sealing surface 91 includes an inclined surface 94AA. The angle formed by the inclined surface 94AA and the Z direction is larger than the angle formed by the second front side surface 94A and the Z direction. The angle between the inclined surface 94AA and the Z direction is, for example, 45°. The first rear surface side surface 93B and the second rear surface side surface 94B are inclined in directions away from each other as they move from the sealed rear surface 92 to the sealed front surface 91. The connection portions between the first rear surface side surface 93B and the second rear surface side surface 94B and the sealed rear surface 92 are curved. The first central side surface 93C is formed between the first front surface side surface 93A and the first rear surface side surface 93B in the Z direction. The first central side surface 93C is connected to both the first front surface side surface 93A and the first rear surface side surface 93B. The first central side surface 93C is formed as a flat surface along, for example, the YZ plane. The second central side surface 94C is formed between the second front surface side surface 94A and the second rear surface side surface 94B in the Z direction. The second central side surface 94C is connected to both the second front surface side surface 94A and the second rear surface side surface 94B. The second central side surface 94C is formed as a flat surface along the YZ plane, for example.
[0019] As shown in FIG. 2 , the third sealing side surface 95 includes a third front surface side surface 95A continuous with the sealing surface 91, a third back surface side surface 95B continuous with the sealing back surface 92, and a third central side surface 95C. The fourth sealing side surface 96 includes a fourth front surface side surface 96A continuous with the sealing surface 91, a fourth back surface side surface 96B continuous with the sealing back surface 92, and a fourth central side surface 96C. The third front surface side surface 95A and the fourth front surface side surface 96A are inclined in directions away from each other as they extend from the sealing surface 91 toward the sealing back surface 92. The connection portions between the third front surface side surface 95A and the fourth front surface side surface 96A and the sealing surface 91 are curved. The third back surface side surface 95B and the fourth back surface side surface 96B are inclined in directions away from each other as they extend from the sealing back surface 92 toward the sealing surface 91. The connection portions between the third back surface side surface 95B and the fourth back surface side surface 96B and the sealing back surface 92 are curved. The third central side surface 95C is connected to both the third front surface side surface 95A and the third back surface side surface 95B. The third central side surface 95C is formed, for example, as a flat surface along the XZ plane. The fourth central side surface 96C is formed between the fourth front surface side surface 96A and the fourth back surface side surface 96B in the Z direction. The fourth central side surface 96C is connected to both the fourth front surface side surface 96A and the fourth back surface side surface 96B. The fourth central side surface 96C is formed, for example, as a flat surface along the XZ plane.
[0020] The sealing resin 90 is formed, for example, by transfer molding. In one example, the third sealing side surface 95 has a trace (not shown) of the gate of a molding die. This trace is formed when a resin portion located at the gate of the molding die is separated from the sealing resin 90. The trace is formed, for example, on a third central side surface 95C of the third sealing side surface 95. In one example, as shown in FIG. 3 , the third central side surface 95C is partitioned into three regions R1 to R3 in the X direction. The regions R1 to R3 are regions of equal size. Region R1 is a region of the third central side surface 95C closer to the first sealing side surface 93, region R3 is a region of the third central side surface 95C closer to the second sealing side surface 94, and region R2 is a region between regions R1 and R3 in the X direction. The trace may be provided in region R1. Alternatively, the trace may be provided in region R2. The trace may be provided in region R3.
[0021] The gate trace of the molding die may be formed on the fourth sealing side surface 96 instead of the third sealing side surface 95. In this case, the gate trace is also formed on, for example, the fourth central side surface 96C of the fourth sealing side surface 96.
[0022] The surface roughness Rz of each of the sealing surface 91, sealing back surface 92, and first to fourth sealing side surfaces 93 to 96 of the sealing resin 90 is, for example, 5 μm or more and 20 μm or less. In the first embodiment, the surface roughness Rz across the entire surface of each of the sealing surface 91 and sealing back surface 92 is, for example, 5 μm or more and 20 μm or less. Furthermore, the surface roughness Rz across the entire surface of each of the first to fourth front side surfaces 93A to 96A and the first to fourth back side surfaces 93B to 96B of the first to fourth sealing side surfaces 93 to 96 is, for example, 5 μm or more and 20 μm or less. Here, the surface roughness Rz can be expressed as the sum of the height of the highest peak and the depth of the deepest valley of the profile curve over the reference length. In one example, the sealing surface 91, sealing back surface 92, and first to fourth sealing side surfaces 93 to 96 are subjected to a surface roughening treatment, thereby making each surface roughness Rz, for example, 5 μm or more and 20 μm or less. An example of the surface roughening treatment is shot blasting.
[0023] In one example, the surface roughness Rz of each of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 is, for example, 8 μm or more. In one example, the surface roughness Rz of each of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 is, for example, 8 μm or more and 20 μm or less.
[0024] In one example, the surface roughness Rz of the sealing surface 91 and the sealing back surface 92, and the first to fourth front side surfaces 93A to 96A and the first to fourth back side surfaces 93B to 96B may be greater than that of the first to fourth central side surfaces 93C to 95C. In one example, the surface roughness Rz of the sealing surface 91 and the sealing back surface 92, and the first to fourth front side surfaces 93A to 96A and the first to fourth back side surfaces 93B to 96B may be greater than the surface roughness Rz of the surfaces that form the recess 91A.
[0025] In the first embodiment, the surface roughness Rz of the sealing surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 was 5 μm or more and 20 μm or less, but this is not limited thereto. In one example, the surface roughness Rz of each of the third sealing side surface 95 and the fourth sealing side surface 96 may be less than 5 μm or greater than 20 μm. In another example, the surface roughness Rz of each of the first sealing side surface 93 and the second sealing side surface 94 may be less than 5 μm or greater than 20 μm. In another example, the surface roughness Rz of each of the first to fourth sealing side surfaces 93 to 96 may be less than 5 μm or greater than 20 μm. In another example, the surface roughness Rz of the sealing surface 91 may be less than 5 μm or greater than 20 μm. In short, it is sufficient that the surface roughness Rz of at least one of the sealing front surface 91, the sealing back surface 92, and the first to fourth sealing side surfaces 93 to 96 is 5 μm or more and 20 μm or less.
[0026] The sealing resin 90 is made of an insulating material. One example of the insulating material is black epoxy resin. The sealing resin 90 contains sulfur (S) as an additive. By including sulfur, the sealing resin 90 can enhance the adhesive strength between the sealing resin 90 and the first frame 10A and the second frame 10B, which will be described later. On the other hand, if the sealing resin 90 contains sulfur, there is a risk of sulfide corrosion of copper-based components in the signal transmission device 10. The sulfur concentration in the sealing resin 90 is set in consideration of the balance between improving the adhesive strength between the sealing resin 90 and the first frame 10A and the second frame 10B and suppressing sulfide corrosion. In one example, the sulfur concentration in the sealing resin 90 is set to 300 μg / g or less.
[0027] As shown in FIG. 1 , the first lead terminals 11 to 18 include first outer lead portions 11B to 18B that protrude outward from the sealing resin 90. In a plan view, the first outer lead portions 11B to 18B protrude from the first sealing side surface 93 toward the +X direction. The first outer lead portions 11B to 18B are arranged spaced apart from one another in the Y direction. The first outer lead portions 11B to 18B can be said to be arranged in the longitudinal direction of the sealing resin 90. The first outer lead portions 11B to 18B are arranged in the following order from the third sealing side surface 95 to the fourth sealing side surface 96: 11B, 12B, 13B, 14B, 15B, 16B, 17B, and 18B. In other words, the Y direction can be said to be the arrangement direction of the first outer lead portions 11B to 18B. In other words, the Y direction can be said to be the arrangement direction of the first lead terminals 11 to 18. In the first embodiment, the first outer lead portions 11B to 18B have the same shape.
[0028] The second lead terminals 41 to 48 include second outer lead portions 41B to 48B that protrude outward from the sealing resin 90. In a plan view, the second outer lead portions 41B to 48B protrude from the second sealing side surface 94 in the -X direction. The second outer lead portions 41B to 48B are arranged spaced apart from one another in the Y direction. The second outer lead portions 41B to 48B can be said to be arranged in the longitudinal direction of the sealing resin 90. The second outer lead portions 41B to 48B are arranged in the following order from the fourth sealing side surface 96 to the third sealing side surface 95: 41B, 42B, 43B, 44B, 45B, 46B, 47B, and 48B. In other words, the Y direction can be said to be the arrangement direction of the second outer lead portions 41B to 48B. In other words, the Y direction can be said to be the arrangement direction of the second lead terminals 41 to 48. In the first embodiment, the second outer lead portions 41B to 48B have the same shape.
[0029] The widths (size in the Y direction) of the first outer lead portions 11B to 18B and the widths (size in the Y direction) of the second outer lead portions 41B to 48B are equal to each other. The widths of the first outer lead portions 11B to 18B and the second outer lead portions 41B to 48B are, for example, approximately 0.4 mm. The pitch of the first outer lead portions 11B to 18B and the pitch of the second outer lead portions 41B to 48B are equal to each other. Here, the pitch of the first outer lead portions 11B to 18B can be defined by the center-to-center distance between two of the first outer lead portions 11B to 18B adjacent to each other in the Y direction. The pitch of the second outer lead portions 41B to 48B can be defined by the center-to-center distance between two of the second outer lead portions 41B to 48B adjacent to each other in the Y direction. The pitch of the first outer lead portions 11B to 18B and the pitch of the second outer lead portions 41B to 48B are each, for example, about 1.27 mm.
[0030] 3, the shape of the first outer lead portion 11B and the shape of the second outer lead portion 48B are the same when viewed from the X direction. Therefore, it can be said that the shapes of the first outer lead portions 11B to 18B and the shapes of the second outer lead portions 41B to 48B are the same.
[0031] The configuration of the second outer lead portions 41B to 48B will be described below. The detailed configuration of the second outer lead portion 48B will be described below, and a detailed description of the second outer lead portions 41B to 47B will be omitted.
[0032] The second outer lead portion 48B includes a protruding portion 48P extending in the -X direction from the second sealing side surface 94, an intermediate portion 48Q extending in the -Z direction from the protruding portion 48P, and a connecting portion 48R extending in the -X direction from the intermediate portion 48Q. A curved first bend is formed between the protruding portion 48P and the intermediate portion 48Q, and a curved second bend is formed between the intermediate portion 48Q and the connecting portion 48R. The connecting portion 48R may be inclined toward the -Z direction as it approaches the -X direction. The acute angle formed by the connecting portion 48R and the X direction is, for example, greater than 0° and equal to or less than 8°.
[0033] As shown in FIG. 4, the second outer lead portion 48B includes an outer lead body 20A made of a metal material. Examples of metal materials include copper and aluminum. The outer lead body 20A has an outer lead surface 21A, an outer lead back surface 22A opposite the outer lead surface 21A, a pair of outer lead side surfaces 23A (see FIG. 5) connecting the outer lead surface 21A and the outer lead back surface 22A, and an outer lead end surface 24A. The outer lead end surface 24A forms the tip surface of the connection portion 48R.
[0034] 5, the pair of outer lead side surfaces 23A are formed in a curved concave shape. In one example, the deepest position of the curved concave outer lead side surface 23A (the position where the pair of outer lead side surfaces 23A are closest to each other in the Y direction) is closer to the outer lead back surface 22A than the center in the Z direction of the outer lead end surface 24A.
[0035] The outer lead body 20A has a backside curved portion 25 formed at the connection portion between the outer lead back surface 22A and the outer lead side surface 23A. The backside curved portion 25 curves upward (in the +Z direction) as it moves outward in the width direction (Y direction) of the outer lead body 20A. Therefore, both ends of the outer lead back surface 22A in the Y direction are curved upward (in the +Z direction) as they move toward the pair of outer lead side surfaces 23A.
[0036] 4 and 5, the second outer lead portion 48B includes a plating layer 26 that covers the outer lead body 20A. More specifically, the plating layer 26 covers the entire surfaces of the outer lead front surface 21A, the outer lead back surface 22A, and the outer lead side surface 23A, as well as a part of the outer lead end surface 24A.
[0037] 5, the plating layer 26 includes an end-face plating layer 27 that covers the outer lead end face 24A continuously from the outer lead back surface 22A toward the outer lead front surface 21A. The end-face plating layer 27 is located apart in the Z direction from the edge of the outer lead end face 24A on the outer lead front surface 21A side. Therefore, the outer lead end face 24A is divided into a region covered by the end-face plating layer 27 and a main body exposed region 28 that is not covered by the end-face plating layer 27. In the main body exposed region 28, the outer lead main body 20A is exposed.
[0038] The end surface plating layer 27 extends from the outer lead back surface 22A to a position closer to the outer lead front surface 21A than the center of the outer lead end surface 24A in the Z direction. In one example, the end surface plating layer 27 covers approximately two-thirds of the outer lead end surface 24A in the Z direction. The leading edge 27A of the end surface plating layer 27 has a shape that becomes uneven in the Z direction as it extends in the Y direction. In one example, the leading edge 27A of the end surface plating layer 27 has a recess 27B near the center in the Y direction.
[0039] The shape of the leading edge 27A of the end surface plating layer 27 can be changed as desired. For example, the leading edge 27A of the end surface plating layer 27 may include a plurality of recesses 27B. For another example, the recesses 27B may be omitted from the leading edge 27A of the end surface plating layer 27.
[0040] Furthermore, the position of the leading edge 27A of the end surface plating layer 27 in the Z direction can be changed as desired. In one example, the end surface plating layer 27 may cover approximately one-half of the outer lead end surface 24A in the Z direction. In another example, the end surface plating layer 27 may cover approximately one-quarter of the outer lead end surface 24A in the Z direction. In another example, the end surface plating layer 27 may cover approximately three-quarters of the outer lead end surface 24A in the Z direction. In this way, the end surface plating layer 27 may cover a range of at least one-quarter but not more than three-quarters of the outer lead end surface 24A in the Z direction.
[0041] The configuration of the first outer lead portions 11B to 18B will be described below. The detailed configuration of the first outer lead portion 11B will be described below, and a detailed description of the configuration of the first outer lead portions 12B to 18B will be omitted.
[0042] 3, the first outer lead portion 11B includes a protruding portion 11P extending in the +X direction from the first sealing side surface 93, an intermediate portion 11Q extending in the -Z direction from the protruding portion 11P, and a connecting portion 11R extending in the +X direction from the intermediate portion 11Q. A curved first bend is formed between the protruding portion 11P and the intermediate portion 11Q, and a curved second bend is formed between the intermediate portion 11Q and the connecting portion 11R. The connecting portion 11R may be inclined toward the -Z direction as it approaches the +X direction. The acute angle formed by the connecting portion 11R and the X direction is, for example, greater than 0° and equal to or less than 8°.
[0043] Like the second outer lead portion 48B, the first outer lead portion 11B includes an outer lead body 20A and a plating layer 26 covering the outer lead body 20A (see FIG. 4 for both). Also, like the second outer lead portion 48B, the plating layer 26 of the first outer lead portion 11B includes an end face plating layer 27 (see FIG. 4).
[0044] A method for forming such an end face plating layer 27 is described below. A first lead frame (not shown) constituting the first outer lead portion 11B and a second lead frame (not shown) constituting the second outer lead portion 48B are cut using a die (punch). Cutting with a die can be performed, for example, on the first lead frame and the second lead frame connected to a frame. Then, the outer leads 11B to 18B, 41B to 48B formed by cutting are formed.
[0045] Here, both the first lead frame and the second lead frame before being cut by the mold include an outer lead body 20A and a plating layer 26 covering the outer lead surface 21A, the outer lead back surface 22A, and a pair of outer lead side surfaces 23A.
[0046] The mold cuts both the first lead frame and the second lead frame in the +Z direction, thereby forming the first outer lead portion 11B and the second outer lead portion 48B, each including the outer lead end surface 24A.
[0047] The corners of the cut portion of the mold are rounded and curved. In other words, the corners are R-chamfered. When the mold having such corners moves in the +Z direction so as to cut both the first lead frame and the second lead frame, the plating layer 26 on the back surface 22A of the outer lead is pulled toward the front surface 21A of the outer lead, thereby forming an end surface plating layer 27 on the end surface 24A of the outer lead.
[0048] Furthermore, because the end surface plating layer 27 is formed on both the first outer lead portion 11B and the second outer lead portion 48B, when the signal transmission device 10 is mounted on a circuit board PCB using a conductive bonding material SD such as solder paste or silver (Ag) paste, as shown in FIG. 6 , the bonding area between the first outer lead portion 11B and the second outer lead portion 48B and the conductive bonding material SD can be increased. More specifically, the outer lead back surface 22A of the connection portion 11R of the first outer lead portion 11B, a pair of outer lead side surfaces 23A (see FIG. 5 ), and the outer lead back surface 22A at the end of the intermediate portion 11Q on the connection portion 11R side are all bonded to the conductive bonding material SD. In addition, the end surface plating layer 27 of the first outer lead portion 11B bonds the outer lead end surface 24A (see FIG. 5 ) of the first outer lead portion 11B to the conductive bonding material SD. The bonding area between the first outer lead portion 11B and the conductive bonding material SD is increased by the bonding area between this end-face plating layer 27 and the conductive bonding material SD. The outer lead back surface 22A of the connection portion 48R of the second outer lead portion 48B, the pair of outer lead side surfaces 23A, and the outer lead back surface 22A of the end of the intermediate portion 48Q on the connection portion 48R side are all bonded to the conductive bonding material SD. Additionally, the end-face plating layer 27 of the second outer lead portion 48B bonds the outer lead end surface 24A of the second outer lead portion 48B to the conductive bonding material SD. The bonding area between the second outer lead portion 48B and the conductive bonding material SD is increased by the bonding area between this end-face plating layer 27 and the conductive bonding material SD. Additionally, the conductive bonding material SD bonded to the end-face plating layers 27 of the first outer lead portion 11B and the second outer lead portion 48B forms fillets. Although not shown in Figure 6, the bonding area with the conductive bonding material SD is also increased and fillets are formed for the first outer lead portions 11B to 17B and the second outer lead portions 42B to 48B (both see Figure 1).
[0049] [Internal Structure of Signal Transmission Device] Fig. 7 shows the overall internal structure of the signal transmission device 10. In Fig. 7, Fig. 9, and Fig. 12, the sealing resin 90 is indicated by a two-dot chain line to facilitate understanding of the drawings. In Fig. 7, a recess 39 of the first die pad 30 and a recess 59 of the second die pad 50, which will be described later, are omitted to facilitate understanding of the drawings. In addition, in Fig. 8, the first chip 60 is indicated by a two-dot chain line, and in Fig. 11, the second chip 70 is indicated by a two-dot chain line to facilitate understanding of the drawings.
[0050] 7, signal transmission device 10 includes a first frame 10A, a second frame 10B, a first chip 60 mounted on first frame 10A, and a second chip 70 mounted on second frame 10B. Sealing resin 90 seals first chip 60 and second chip 70 and also partially seals first frame 10A and second frame 10B.
[0051] The first frame 10A includes first lead terminals 11 to 18. The first frame 10A further includes a first die pad 30. The first lead terminals 11 to 18 and the first die pad 30 are formed of the same metal material. Examples of the metal material include copper and aluminum.
[0052] The first lead terminals 11 and 18, which are arranged at both ends in the Y direction, are connected to the first die pad 30. In one example, the first lead terminals 11 and 18 and the first die pad 30 are integrated. The first lead terminals 12 to 17, which are arranged between the first lead terminal 11 and the first lead terminal 18 in the Y direction, are arranged at a distance from the first die pad 30. The first lead terminals 12 and 17 are arranged dispersedly on both sides of the first die pad 30 in the Y direction. The first lead terminals 12 and 17 include portions that overlap with the first die pad 30 when viewed from the Y direction. The first lead terminals 13 to 16 are arranged closer to the first sealing side surface 93 with respect to the first die pad 30 and spaced apart from the first die pad 30 in the X direction. The first lead terminals 13 to 16 include portions that overlap with the first die pad 30 when viewed from the X direction.
[0053] The first die pad 30 is disposed closer to the first sealing side surface 93 than the center of the sealing resin 90 in the X direction. The shape of the first die pad 30 in plan view is rectangular, with the Y direction as the longitudinal direction and the X direction as the lateral direction.
[0054] The first chip 60 mounted on the first die pad 30 is formed in a flat plate shape. In plan view, the first chip 60 has a rectangular shape with the X direction as the short side direction and the Y direction as the long side direction. The first chip 60 is mounted on the first die pad 30 with a first conductive bonding material SD1. More specifically, the first chip 60 is die-bonded to the first die pad 30. The first chip 60 is disposed at the center of the first die pad 30 in the X direction. The first chip 60 is also disposed closer to the fourth sealing side surface 96 than the center of the first die pad 30 in the Y direction. The position of the first chip 60 relative to the first die pad 30 can be changed as desired.
[0055] The second frame 10B is disposed apart from the first frame 10A in the X direction. That is, in the first embodiment, the X direction can be said to be the arrangement direction of the first frame 10A and the second frame 10B. The second frame 10B includes second lead terminals 41 to 48. The second frame 10B further includes a second die pad 50. The second lead terminals 41 to 48 and the second die pad 50 are formed of the same metal material. Examples of metal materials include copper and aluminum. In one example, the second lead terminals 41 to 48 and the second die pad 50 are formed of the same metal material as the first lead terminals 11 to 18 and the first die pad 30.
[0056] The second lead terminals 41, 48, which are arranged at both ends in the Y direction, are connected to the second die pad 50. In one example, the second lead terminals 41, 48 and the second die pad 50 are integrated. The second lead terminals 42 to 47, which are arranged between the second lead terminal 41 and the second lead terminal 48 in the Y direction, are arranged at a distance from the second die pad 50. The second lead terminals 42, 47 are arranged dispersedly on both sides of the second die pad 50 in the Y direction. The second lead terminals 42, 47 include portions that overlap with the second die pad 50 when viewed from the Y direction. The second lead terminals 43 to 46 are arranged closer to the second sealing side surface 94 with respect to the second die pad 50 and spaced apart from the second die pad 50 in the X direction. The second lead terminals 43 to 46 include portions that overlap with the second die pad 50 when viewed from the X direction. As shown in FIG. 7, in the first embodiment, the shapes of the first lead terminals 11 to 18 and the second lead terminals 41 to 48 are symmetrical with respect to an imaginary line along the Y direction at the center of the sealing resin 90 in the X direction.
[0057] The second die pad 50 is disposed in the X direction closer to the second sealing side surface 94 relative to the first die pad 30 and spaced apart from the first die pad 30. In other words, the X direction can be considered to be the arrangement direction of the first die pad 30 and the second die pad 50. The first die pad 30 and the second die pad 50 can also be considered to be arranged in the short-side direction of the sealing resin 90. The second die pad 50 is disposed in the X direction closer to the second sealing side surface 94 than the center of the sealing resin 90. The shape of the second die pad 50 in a plan view is rectangular, with the Y direction being the longitudinal direction and the X direction being the short-side direction. In the first embodiment, the size of the second die pad 50 in the Y direction is equal to the size of the first die pad 30 in the Y direction. The size of the second die pad 50 in the X direction is larger than the size of the first die pad 30 in the X direction. Note that the sizes of the first die pad 30 and the second die pad 50 can be changed as desired.
[0058] The second chip 70 mounted on the second die pad 50 is formed in a flat plate shape. In a plan view, the second chip 70 has a rectangular shape with the X direction as the short side and the Y direction as the long side. The size of the second chip 70 in the X direction is larger than the size of the first chip 60 in the X direction. The size of the second chip 70 in the Y direction is larger than the size of the first chip 60 in the Y direction. The second chip 70 is mounted on the second die pad 50 by a second conductive bonding material SD2. More specifically, the second chip 70 is die-bonded to the second die pad 50. Note that, for example, solder paste or silver paste is used as both the first conductive bonding material SD1 and the second conductive bonding material SD2.
[0059] The second chip 70 is disposed at the center in the X direction and the center in the Y direction of the second die pad 50. When viewed from the X direction, the second chip 70 is disposed at a position overlapping the first chip 60. Note that the position of the second chip 70 relative to the second die pad 50 can be changed as desired.
[0060] The signal transmission device 10 further includes conductive members 10D and 10E. The conductive members 10D and 10E are formed, for example, from the same metal material as the first frame 10A and the second frame 10B. The conductive members 10D and 10E are arranged spaced apart from each other. Furthermore, the conductive members 10D and 10E are arranged spaced apart from both the first frame 10A and the second frame 10B. Therefore, both the conductive members 10D and 10E are in an electrically floating state.
[0061] The conductive members 10D and 10E are arranged so as to overlap each other when viewed from the Y direction. The conductive members 10D and 10E are arranged at the center of the sealing resin 90 in the Y direction. The conductive member 10D is arranged closer to the third sealing side surface 95 than the first frame 10A and the second frame 10B. The conductive member 10D is exposed from the third sealing side surface 95. More specifically, a recess 95D is formed in the portion of the third sealing side surface 95 where the conductive member 10D is exposed. The recess 95D is formed in the center of the third sealing side surface 95 in the Z direction. That is, the recess 95D is provided in the third central side surface 95C (see FIG. 2 ). The recess 95D is recessed from the third sealing side surface 95 toward the fourth sealing side surface 96. The recess 95D opens toward the +Y direction. The conductive member 10D forms the bottom surface of the recess 95D.
[0062] In a plan view, the conductive member 10D has a generally rectangular shape with its longitudinal direction in the X direction and its lateral direction in the Y direction. The size of the conductive member 10D in the X direction is greater than the distance between the first die pad 30 and the second die pad 50 in the X direction. Therefore, when viewed from the Y direction, the conductive member 10D includes portions that overlap with both the first die pad 30 and the second die pad 50.
[0063] The conductive member 10D has two through holes 10D1. Each through hole 10D1 penetrates the conductive member 10D in the thickness direction (Z direction) of the conductive member 10D. Each through hole 10D1 is filled with sealing resin 90. The two through holes 10D1 are arranged at the same position in the Y direction and spaced apart from each other in the X direction.
[0064] The conductive member 10E is disposed closer to the fourth sealing side surface 96 than the first frame 10A and the second frame 10B. The conductive member 10E is exposed from the fourth sealing side surface 96. More specifically, a recess 96D is formed in the portion of the fourth sealing side surface 96 from which the conductive member 10E is exposed. The recess 96D is formed in the center of the fourth sealing side surface 96 in the Z direction. In other words, the recess 96D is provided in the fourth central side surface 96C (see FIG. 2). The recess 96D is recessed from the fourth sealing side surface 96 toward the third sealing side surface 95. The recess 96D is open in the -Y direction. The conductive member 10E forms the bottom surface of the recess 96D.
[0065] In a plan view, the conductive member 10E has a generally rectangular shape with its longitudinal direction in the X direction and its lateral direction in the Y direction. The size of the conductive member 10E in the X direction is greater than the distance between the first die pad 30 and the second die pad 50 in the X direction. Therefore, when viewed from the Y direction, the conductive member 10E includes portions that overlap with both the first die pad 30 and the second die pad 50.
[0066] The conductive member 10E has two through holes 10E1. Each through hole 10E1 penetrates the conductive member 10E in the thickness direction (Z direction) of the conductive member 10E. Each through hole 10E1 is filled with sealing resin 90. The two through holes 10E1 are arranged at the same position in the Y direction and spaced apart from each other in the X direction.
[0067] The detailed planar structure of the first die pad 30 will be described. As shown in FIG. 8 , in a plan view, the first die pad 30 has a first tip surface 31, a first base surface 32, a first side surface 33, and a second side surface 34. The first tip surface 31 is an end surface of both end surfaces of the first die pad 30 in the X direction that is closer to the second sealing side surface 94 (see FIG. 7 ), and the first base surface 32 is an end surface of both end surfaces of the first die pad 30 in the X direction that is closer to the first sealing side surface 93 (see FIG. 7 ). The first tip surface 31 faces the second die pad 50 in the X direction. The first side surface 33 is an end surface of both end surfaces of the first die pad 30 in the Y direction that is closer to the third sealing side surface 95 (see FIG. 7 ), and the second side surface 34 is an end surface of both end surfaces of the first die pad 30 in the Y direction that is closer to the fourth sealing side surface 96 (see FIG. 7 ). Both the first distal end surface 31 and the first proximal end surface 32 are surfaces that extend along the Y direction in a plan view. Both the first side surface 33 and the second side surface 34 are surfaces that extend along the X direction in a plan view.
[0068] The first die pad 30 further has a first tip-side curved surface 35, a second tip-side curved surface 36, a first base-side curved surface 37, and a second base-side curved surface 38. The first tip-side curved surface 35 is formed between the first tip-side surface 31 and the first side surface 33. The first tip-side curved surface 35 is a R-chamfered portion between the first tip-side surface 31 and the first side surface 33. The second tip-side curved surface 36 is formed between the first tip-side surface 31 and the second side surface 34. The second tip-side curved surface 36 is a R-chamfered portion between the first tip-side surface 31 and the second side surface 34. The first base-side curved surface 37 is formed between the first base-end surface 32 and the first side surface 33. The first base-end curved surface 37 is a R-chamfered portion between the first base-end surface 32 and the first side surface 33. The second base-end curved surface 38 is formed between the first base-end surface 32 and the second side surface 34. The second base-end curved surface 38 has a shape in which the portion between the first base-end surface 32 and the second side surface 34 is R-chamfered.
[0069] In the first embodiment, the arc length of the first distal curved surface 35 in a plan view is equal to the arc lengths of the first proximal curved surface 37 and the second proximal curved surface 38 in a plan view. The arc length of the second distal curved surface 36 in a plan view is equal to the arc length of the first distal curved surface 35 in a plan view. Furthermore, the radius of curvature of the first distal curved surface 35 in a plan view is equal to the radius of curvature of the first proximal curved surface 37 and the radius of curvature of the second proximal curved surface 38 in a plan view. The radius of curvature of the second distal curved surface 36 in a plan view is equal to the radius of curvature of the first distal curved surface 35 in a plan view.
[0070] The first die pad 30 has a plurality of recesses 39 (28 in the first embodiment). Each recess 39 is recessed from the front surface of the first die pad 30 toward the back surface. Here, the front surface of the first die pad 30 is the surface on which the first chip 60 is mounted. The back surface of the first die pad 30 is the surface facing the opposite side to the front surface of the first die pad 30. The number of recesses 39 can be changed as desired.
[0071] In the first embodiment, the shape of the recesses 39 in plan view is circular. The multiple recesses 39 are arranged spaced apart from one another in both the X direction and the Y direction. In the example of FIG. 8 , the multiple recesses 39 are arranged in a lattice pattern. The number of recesses 39 arranged in the Y direction is greater than the number of recesses 39 arranged in the X direction. Note that the shape of each recess 39 in plan view can be changed as desired. Furthermore, the arrangement of the multiple recesses 39 can be changed as desired.
[0072] The recesses 39 that overlap with the first conductive bonding material SD1 (see FIG. 7) in plan view are filled with the first conductive bonding material SD1. The recesses 39 that do not overlap with the first conductive bonding material SD1 are filled with a sealing resin 90 (see FIG. 7).
[0073] The detailed configuration of each of the first lead terminals 11 to 18 will be described. As shown in Fig. 9, of the first lead terminals 11 to 18, the first lead terminals 11 and 12 are arranged closer to the third sealing side surface 95 than the first die pad 30 when viewed from the X direction. The first lead terminals 17 and 18 are arranged closer to the fourth sealing side surface 96 than the first die pad 30 when viewed from the X direction. Here, in the first embodiment, the first lead terminals 11 and 18 correspond to "first end lead terminals," which are first lead terminals arranged at both ends in the Y direction (second direction) among the first lead terminals 11 to 18.
[0074] The first lead terminals 11 to 18 include first inner lead portions 11A to 18A provided in the sealing resin 90 and the above-mentioned first outer lead portions 11B to 18B. The configuration of the first inner lead portions 11A to 18A will be described below.
[0075] The first inner lead portions 11A, 18A are connected to the first die pad 30. More specifically, the first inner lead portion 11A is connected to a first side surface 33 of the first die pad 30. The first inner lead portion 18A is connected to a second side surface 34 of the first die pad 30. The first inner lead portions 12A to 17A are arranged at a distance from the first die pad 30.
[0076] The first inner lead portion 11A includes a first lead portion 11AA, a second lead portion 11AB, and a third lead portion 11AC. The first lead portion 11AA is connected to the first outer lead portion 11B and extends in the X direction in a plan view. The first lead portion 11AA includes a narrow portion 11AA1 and a wide portion 11AA2. Of the side surfaces between the narrow portion 11AA1 and the wide portion 11AA2, the side surface closer to the first lead terminal 12 includes a curved surface. The curved surface connects the side surface of the narrow portion 11AA1 and the side surface of the wide portion 11AA2 and curves away from the first inner lead portion 12A.
[0077] The narrow portion 11AA1 constitutes a portion of the first lead portion 11AA closer to the first sealing side surface 93. The narrow portion 11AA1 is connected to the first outer lead portion 11B. The wide portion 11AA2 constitutes a portion of the first lead portion 11AA closer to the second lead portion 11AB. The wide portion 11AA2 is connected to the second lead portion 11AB. The wide portion 11AA2 is formed so as to be wider than the narrow portion 11AA1 by extending in the Y direction toward the first lead terminal 12. In one example, the width dimension (size in the Y direction) of the wide portion 11AA2 is approximately 1.5 times the width dimension (size in the Y direction) of the narrow portion 11AA1. The width dimensions of the narrow portion 11AA1 and the wide portion 11AA2 can be changed as desired.
[0078] The second lead portion 11AB is connected to the first lead portion 11AA. The second lead portion 11AB extends obliquely in the Y direction toward the first die pad 30 as it moves toward the second die pad 50 in the X direction. In the example of Fig. 9, the width of the second lead portion 11AB is larger than the width of the narrow portion 11AA1 of the first lead portion 11AA and smaller than the width of the wide portion 11AA2. Here, the width of the second lead portion 11AB can be defined by the size in a direction perpendicular to the direction in which the second lead portion 11AB extends in a plan view.
[0079] The third lead portion 11AC extends in the Y direction in plan view. The third lead portion 11AC connects the first die pad 30 and the second lead portion 11AB. In the example of FIG. 9 , the width dimension (size in the X direction) of the third lead portion 11AC is smaller than the width dimension of the second lead portion 11AB. The width dimension of the third lead portion 11AC is equal to or smaller than the width dimension of the narrow portion 11AA1 of the first lead portion 11AA. In the example of FIG. 9 , in plan view, curved surfaces are formed on both side surfaces of the third lead portion 11AC at the connection portions with the first die pad 30.
[0080] The third lead portion 11AC is connected to a portion of the first side surface 33 closer to the first base end surface 32. In other words, the distance in the X direction between the third lead portion 11AC and the first base end surface 32 is smaller than the distance in the X direction between the third lead portion 11AC and the first tip end surface 31.
[0081] The widths of the narrow portion 11AA1, the wide portion 11AA2, the second lead portion 11AB, and the third lead portion 11AC can be changed as desired. For example, the width of the third lead portion 11AC may be equal to or greater than the width of the second lead portion 11AB.
[0082] The first inner lead portion 18A includes a first lead portion 18AA, a second lead portion 18AB, and a third lead portion 18AC. The first inner lead portion 18A has a shape that is line-symmetrical with respect to the first inner lead portion 11A, with respect to an imaginary line that extends along the X direction at the center of the first die pad 30 in the Y direction. For this reason, only an overview of the first inner lead portion 18A will be described, and a detailed description thereof will be omitted.
[0083] The first lead portion 18AA includes a narrow portion 18AA1 and a wide portion 18AA2. The wide portion 18AA2 extends toward the first lead terminal 17 relative to the narrow portion 18AA1. Of the side surfaces between the narrow portion 18AA1 and the wide portion 18AA2, the side surface closer to the first lead terminal 17 includes a curved surface. The second lead portion 18AB extends obliquely toward the first die pad 30 in the Y direction as it approaches the second die pad 50 in the X direction. The third lead portion 18AC extends in the Y direction in a plan view and is connected to the first die pad 30.
[0084] The first inner lead portion 12A includes a wire connection portion 12AA and a lead connection portion 12AB extending from the wire connection portion 12AA toward the first sealing side surface 93. When viewed from the Y direction, the wire connection portion 12AA is disposed at a position overlapping the first die pad 30. When viewed from the Y direction, the wire connection portion 12AA is disposed between the third lead portion 11AC of the first inner lead portion 11A and the first base end surface 32 of the first die pad 30 in the X direction.
[0085] The tip surface of the wire connection portion 12AA faces the first side surface 33 of the first die pad 30 in the Y direction. The tip surface of the wire connection portion 12AA extends along the X direction in a plan view. The wire connection portion 12AA extends obliquely in the Y direction from the tip surface of the wire connection portion 12AA toward the lead connection portion 12AB toward the first sealing side surface 93.
[0086] The lead connection portion 12AB extends in the X direction in a plan view. The lead connection portion 12AB includes a narrow portion 12AB1 and a wide portion 12AB2. Of the side surfaces between the narrow portion 12AB1 and the wide portion 12AB2, the side surface closer to the first lead terminal 11 includes a curved surface. The curved surface connects the side surface of the narrow portion 12AB1 and the side surface of the wide portion 12AB2 and curves away from the first inner lead portion 11A.
[0087] The narrow width portion 12AB1 constitutes a portion of the lead connection portion 12AB that is closer to the first sealing side surface 93. The narrow width portion 12AB1 is connected to the first outer lead portion 12B. The width dimension (size in the Y direction) of the narrow width portion 12AB1 is equal to the width dimension of the narrow width portion 11AA1 of the first lead portion 11AA of the first inner lead portion 11A.
[0088] The wide portion 12AB2 constitutes the portion of the lead connection portion 12AB closer to the wire connection portion 12AA. The wide portion 12AB2 is connected to the wire connection portion 12AA. The wide portion 12AB2 is formed wider than the narrow portion 12AB1 by extending in the Y direction toward the first lead portion 11AA of the first inner lead portion 11A. The maximum width (size in the Y direction) of the wide portion 12AB2 is approximately twice the width (size in the Y direction) of the narrow portion 12AB1. The maximum width of the wide portion 12AB2 is larger than the width of the wide portion 11AA2 of the first lead portion 11AA of the first inner lead portion 11A. The widths of the narrow portion 12AB1 and the wide portion 12AB2 can be changed as desired.
[0089] The inner lead portion 12A has an inclined surface 12AC. The inclined surface 12AC is formed on the wide portion 12AB2. More specifically, the inclined surface 12AC is formed on one of both side surfaces of the wide portion 12AB2 closer to the first lead portion 11AA of the first inner lead portion 11A. The inclined surface 12AC is inclined toward the first die pad 30 as it approaches the wire connection portion 12AA. The inclination angle of the inclined surface 12AC with respect to the X direction is equal to the inclination angle of the second lead portion 11AB of the first inner lead portion 11A with respect to the X direction.
[0090] The first inner lead portion 17A includes a wire connection portion 17AA, a lead connection portion 17AB, and an inclined surface 17AC. The first inner lead portion 17A has a shape that is line-symmetrical with respect to the first inner lead portion 12A, with respect to an imaginary line that extends along the X direction at the center of the first die pad 30 in the Y direction. Therefore, only an overview of the first inner lead portion 17A will be described, and a detailed description thereof will be omitted.
[0091] When viewed from the Y direction, the wire connection portion 17AA is disposed at a position overlapping the first die pad 30. When viewed from the Y direction, the wire connection portion 17AA is disposed between the third lead portion 18AC of the first inner lead portion 18A and the first base end surface 32 of the first die pad 30 in the X direction.
[0092] The tip surface of the wire connection portion 17AA faces the second side surface 34 of the first die pad 30 in the Y direction. The wire connection portion 17AA extends obliquely in the Y direction from the tip surface of the wire connection portion 17AA toward the lead connection portion 17AB toward the first sealing side surface 93.
[0093] The lead connection portion 17AB extends in the X direction in a plan view. The lead connection portion 17AB includes a narrow portion 17AB1 and a wide portion 17AB2. Of the side surfaces between the narrow portion 17AB1 and the wide portion 17AB2, the side surface closer to the first lead terminal 18 includes a curved surface. The curved surface connects the side surface of the narrow portion 17AB1 and the side surface of the wide portion 17AB2 and curves away from the first inner lead portion 18A.
[0094] The inclined surface 17AC is formed on one of both side surfaces of the wide portion 17AB2 closer to the first lead portion 18AA of the first inner lead portion 18A. The inclined surface 17AC is inclined toward the first die pad 30 as it approaches the wire connection portion 17AA. The inclination angle of the inclined surface 17AC with respect to the X direction is equal to the inclination angle of the second lead portion 18AB of the first inner lead portion 18A with respect to the X direction.
[0095] The first inner lead portions 13A to 16A are arranged closer to the first sealing side surface 93 than the first die pad 30. The first inner lead portions 13A to 16A have the same shape. Therefore, the configuration of the first inner lead portion 13A will be described in detail, and a detailed description of the first inner lead portions 14A to 16A will be omitted.
[0096] The first inner lead portion 13A extends along the X direction and includes a wire connection portion 13AA and a lead connection portion 13AB extending from the wire connection portion 13AA toward the first sealing side surface 93. The lead connection portion 13AB is connected to the first outer lead portion 13B.
[0097] In plan view, the shape of the wire connection portion 13AA is a substantially rectangular shape with the Y direction as the longitudinal direction and the X direction as the lateral direction. In plan view, the portion of the wire connection portion 13AA closer to the lead connection portion 13AB is curved so that the width dimension (size in the Y direction) of the wire connection portion 13AA decreases toward the lead connection portion 13AB. In plan view, the tip and both ends in the Y direction of the wire connection portion 13AA are tapered so that the width dimension (size in the Y direction) of the wire connection portion 13AA decreases toward the tip surface of the wire connection portion 13AA. The tip surface of the wire connection portion 13AA faces the first die pad 30 in the X direction in plan view and extends along the Y direction.
[0098] The first inner lead portion 14A includes a wire connection portion 14AA and a lead connection portion 14AB extending from the wire connection portion 14AA toward the first sealing side surface 93. The lead connection portion 14AB is connected to the first outer lead portion 14B.
[0099] The first inner lead portion 15A includes a wire connection portion 15AA and a lead connection portion 15AB extending from the wire connection portion 15AA toward the first sealing side surface 93. The lead connection portion 15AB is connected to the first outer lead portion 15B.
[0100] The first inner lead portion 16A includes a wire connection portion 16AA and a lead connection portion 16AB extending from the wire connection portion 16AA toward the first sealing side surface 93. The lead connection portion 16AB is connected to the first outer lead portion 16B.
[0101] Here, the wire connection portions 12AA to 17AA of the first inner lead portions 12A to 17A correspond to the "second portion." The lead connection portions 12AB to 17AB of the first inner lead portions 12A to 17A correspond to the "first portion."
[0102] Next, the detailed cross-sectional structures of the wire connection portions 12AA to 17AA of the first inner lead portions 12A to 17A will be described. Figure 10 shows the cross-sectional structure of the wire connection portion 13AA of the first inner lead portion 13A. Note that the cross-sectional structures of the wire connection portions 12AA, 14AA to 17AA of the first inner lead portions 12A, 14A to 17A are similar to the cross-sectional structure of the wire connection portion 13AA, so detailed description thereof will be omitted.
[0103] 10 , the inner lead body 20B of the wire connection portion 13AA has an inner lead surface 21B, an inner lead back surface 22B opposite the inner lead surface 21B, and an inner lead side surface 23B connecting the inner lead surface 21B and the inner lead back surface 22B. The inner lead side surface 23B includes a tip surface 24B facing the first base end surface 32 (see FIG. 9 ) of the first die pad 30. The inner lead surface 21B is the surface to which a first lead wire WB (described later) is bonded, and faces the same side as the sealing surface 91 (see FIG. 1 ).
[0104] In the cross-sectional view of Fig. 10, the tip surface 24B is formed in a concave shape that is recessed away from the first die pad 30. The tip surface 24B is recessed from both the end on the inner lead front surface 21B side and the end on the inner lead back surface 22B side toward the center of the tip surface 24B in the Z direction. In one example, the deepest position of the concave tip surface 24B is located at a position approximately one-third of the thickness of the wire connection portion 12AA from the inner lead back surface 22B. Note that the shape of the tip surface 24B in the cross-sectional view of Fig. 10 can be changed as desired.
[0105] A plating layer 29 is formed on the inner lead surface 21B. The plating layer 29 is formed of a material containing silver, for example. The plating layer 29 is formed over substantially the entire inner lead surface 21B in the wire connection portion 13AA. The thickness of the plating layer 29 is thinner than the thickness of the inner lead body 20B in the wire connection portion 13AA.
[0106] An end surface 29A of the plating layer 29 closer to the tip surface 24B is formed at a position closer to the lead connection portion 13AB (see FIG. 9 ) than the edge of the inner lead surface 21B closer to the tip surface 24B. In other words, the plating layer 29 does not cover the end surface of the inner lead surface 21B closer to the tip surface 24B. As a result, the end of the inner lead surface 21B, including the edge closer to the tip surface 24B, is in contact with the sealing resin 90 (see FIG. 1 ).
[0107] End surface 29A of plating layer 29 is inclined so as to move away from the edge of inner lead surface 21B closer to tip surface 24B as it moves from the front surface to the back surface of plating layer 29. In one example, the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to tip surface 24B is, for example, equal to or greater than the thickness of plating layer 29. Note that the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to tip surface 24B can be changed as desired.
[0108] Furthermore, the plating layer 29 does not cover the tip surface 24B of the wire connection portion 13AA. Therefore, the tip surface 24B is in contact with the sealing resin 90. Furthermore, although not shown, the plating layer 29 does not cover the inner lead side surface 23B other than the tip surface 24B. Therefore, the inner lead side surface 23B is in contact with the sealing resin 90.
[0109] The configuration of the second die pad 50 will be described. As shown in FIG. 11 , in a plan view, the second die pad 50 has a second tip surface 51, a second base surface 52, a third side surface 53, and a fourth side surface 54. The second tip surface 51 is an end surface of the second die pad 50 in the X direction that is closer to the first sealing side surface 93 (see FIG. 7 ), and the second base surface 52 is an end surface of the second die pad 50 in the X direction that is closer to the second sealing side surface 94 (see FIG. 7 ). The third side surface 53 is an end surface of the second die pad 50 in the Y direction that is closer to the third sealing side surface 95 (see FIG. 7 ), and the fourth side surface 54 is an end surface of the second die pad 50 in the Y direction that is closer to the fourth sealing side surface 96 (see FIG. 7 ). Both the second tip surface 51 and the second base surface 52 are surfaces that extend along the Y direction in a plan view. Both the third side surface 53 and the fourth side surface 54 are surfaces that extend along the X direction in a plan view.
[0110] The second die pad 50 further has a third tip-side curved surface 55, a fourth tip-side curved surface 56, a third base-side curved surface 57, and a fourth base-side curved surface 58. The third tip-side curved surface 55 is formed between the second tip-side surface 51 and the third side surface 53. The third tip-side curved surface 55 is a R-chamfered portion between the second tip-side surface 51 and the third side surface 53. The fourth tip-side curved surface 56 is formed between the second tip-side surface 51 and the fourth side surface 54. The fourth tip-side curved surface 56 is a R-chamfered portion between the second tip-side surface 51 and the fourth side surface 54. The third base-side curved surface 57 is formed between the second base-end surface 52 and the third side surface 53. The third base-side curved surface 57 is a R-chamfered portion between the second base-end surface 52 and the third side surface 53. The fourth base-end curved surface 58 is formed between the second base-end surface 52 and the fourth side surface 54. The fourth base-end curved surface 58 has a shape in which the portion between the second base-end surface 52 and the fourth side surface 54 is R-chamfered.
[0111] In the first embodiment, the arc length of the third distal curved surface 55 in a plan view is equal to the arc lengths of the third proximal curved surface 57 and the fourth proximal curved surface 58 in a plan view. The arc length of the fourth distal curved surface 56 in a plan view is equal to the arc length of the third distal curved surface 55 in a plan view. Furthermore, the radius of curvature of the third distal curved surface 55 in a plan view is equal to the radius of curvature of the third proximal curved surface 57 and the fourth proximal curved surface 58 in a plan view. The radius of curvature of the fourth distal curved surface 56 in a plan view is equal to the radius of curvature of the third distal curved surface 55 in a plan view.
[0112] The second die pad 50 has a plurality of recesses 59 (28 in the first embodiment). Each recess 59 is recessed from the front surface of the second die pad 50 toward the back surface. Here, the front surface of the second die pad 50 is the surface on which the second chip 70 is mounted. The back surface of the second die pad 50 is the surface facing the opposite side to the front surface of the second die pad 50. The number of recesses 59 can be changed as desired.
[0113] In the first embodiment, the recesses 59 have a circular shape in a plan view. The recesses 59 are arranged at a distance from one another in both the X direction and the Y direction. In the example of FIG. 11 , the recesses 59 are arranged in a lattice pattern. The number of recesses 59 arranged in the Y direction is greater than the number of recesses 59 arranged in the X direction. The size of the recesses 59 is equal to the size of the recesses 39 of the first die pad 30. Note that the shape of each recess 59 in a plan view can be arbitrarily changed. Furthermore, the arrangement of the recesses 59 can be arbitrarily changed. Furthermore, the size of the recesses 59 can be arbitrarily changed. In one example, the size of the recesses 59 may be different from the size of the recesses 39. The recesses 59 that overlap with the second conductive bonding material SD2 (see FIG. 7 ) in a plan view are filled with the second conductive bonding material SD2.
[0114] The detailed configuration of each of the second lead terminals 41 to 48 will be described. As shown in FIG. 12 , of the second lead terminals 41 to 48, the second lead terminals 41 and 42 are disposed closer to the fourth sealing side surface 96 than the second die pad 50 when viewed from the X direction. The second lead terminals 47 and 48 are disposed closer to the third sealing side surface 95 than the second die pad 50 when viewed from the X direction. The second lead terminals 43 to 46 are disposed at positions overlapping the second die pad 50 when viewed from the X direction. Here, in the first embodiment, the second lead terminals 41 and 48 correspond to "second end lead terminals," which are second lead terminals disposed at both ends in the Y direction (second direction) among the second lead terminals 41 to 48.
[0115] The second lead terminals 41 to 48 include second inner lead portions 41A to 48A provided in the sealing resin 90 and the above-mentioned second outer lead portions 41B to 48B. The configuration of the second inner lead portions 41A to 48A will be described below.
[0116] The second inner lead portions 41A, 48A are connected to the second die pad 50. More specifically, the second inner lead portion 41A is connected to a third side surface 53 of the second die pad 50. The second inner lead portion 48A is connected to a fourth side surface 54 of the second die pad 50. The second inner lead portions 42A to 47A are arranged at a distance from the second die pad 50.
[0117] The second inner lead portion 41A includes a fourth lead portion 41AA, a fifth lead portion 41AB, and a sixth lead portion 41AC. The fourth lead portion 41AA is connected to the second outer lead portion 41B and extends in the X direction in a plan view. The fourth lead portion 41AA includes a narrow portion 41AA1 and a wide portion 41AA2. Of the side surfaces between the narrow portion 41AA1 and the wide portion 41AA2, the side surface closer to the second lead terminal 42 includes a curved surface. The curved surface connects the side surface of the narrow portion 41AA1 and the side surface of the wide portion 41AA2 and curves away from the second inner lead portion 42A.
[0118] The narrow portion 41AA1 constitutes a portion of the fourth lead portion 41AA closer to the second sealing side surface 94. The narrow portion 41AA1 is connected to the second outer lead portion 41B. The wide portion 41AA2 constitutes a portion of the fourth lead portion 41AA closer to the fifth lead portion 41AB. The wide portion 41AA2 is connected to the fifth lead portion 41AB. The wide portion 41AA2 is formed so as to be wider than the narrow portion 41AA1 by extending in the Y direction toward the second lead terminal 42. In one example, the width dimension (size in the Y direction) of the wide portion 41AA2 is approximately 1.5 times the width dimension (size in the Y direction) of the narrow portion 41AA1. The width dimensions of the narrow portion 41AA1 and the wide portion 41AA2 can be changed as desired.
[0119] The fifth lead portion 41AB is connected to the fourth lead portion 41AA. The fifth lead portion 41AB extends obliquely in the Y direction toward the second die pad 50 as it moves toward the first die pad 30 in the X direction. In the example of Fig. 12, the width of the fifth lead portion 41AB is larger than the width of the narrow portion 41AA1 of the fourth lead portion 41AA and smaller than the width of the wide portion 41AA2. Here, the width of the fifth lead portion 41AB can be defined by the size in a direction perpendicular to the direction in which the fifth lead portion 41AB extends in a plan view.
[0120] The sixth lead portion 41AC extends in the Y direction in plan view. The sixth lead portion 41AC connects the second die pad 50 and the sixth lead portion 41AC. In the example of FIG. 12 , the width dimension (size in the X direction) of the sixth lead portion 41AC is smaller than the width dimension of the fifth lead portion 41AB. The width dimension of the sixth lead portion 41AC is equal to or smaller than the width dimension of the narrow portion 41AA1 of the fourth lead portion 41AA. In the example of FIG. 12 , in plan view, curved surfaces are formed on both side surfaces of the sixth lead portion 41AC at the connection portions with the second die pad 50.
[0121] The sixth lead portion 41AC is connected to a portion of the third side surface 53 closer to the second base end surface 52. In other words, the distance in the X direction between the sixth lead portion 41AC and the second base end surface 52 is smaller than the distance in the X direction between the sixth lead portion 41AC and the second tip end surface 51.
[0122] The second inner lead portion 48A includes a fourth lead portion 48AA, a fifth lead portion 48AB, and a sixth lead portion 48AC. The second inner lead portion 48A has a shape that is line-symmetrical with respect to the second inner lead portion 41A, with respect to an imaginary line that extends along the X direction at the center of the second die pad 50 in the Y direction. For this reason, only an overview of the second inner lead portion 48A will be described, and a detailed description thereof will be omitted.
[0123] The fourth lead portion 48AA includes a narrow portion 48AA1 and a wide portion 48AA2. The wide portion 48AA2 extends relative to the narrow portion 48AA1 toward the second lead terminal 47. Of the side surfaces between the narrow portion 48AA1 and the wide portion 48AA2, the side surface closer to the second lead terminal 47 includes a curved surface. The fifth lead portion 48AB extends obliquely toward the second die pad 50 in the Y direction as it approaches the first die pad 30 in the X direction. The sixth lead portion 48AC extends in the Y direction in a plan view and is connected to the second die pad 50.
[0124] The second inner lead portion 42A includes a wire connection portion 42AA and a lead connection portion 42AB extending from the wire connection portion 42AA toward the second sealing side surface 94. When viewed from the Y direction, the wire connection portion 42AA is disposed at a position overlapping the second die pad 50. When viewed from the Y direction, the wire connection portion 42AA is disposed between the sixth lead portion 41AC of the second inner lead portion 41A and the second base end surface 52 of the second die pad 50 in the X direction.
[0125] The tip surface of the wire connection portion 42AA faces the third side surface 53 of the second die pad 50 in the Y direction. The tip surface of the wire connection portion 42AA extends along the X direction in a plan view. The wire connection portion 42AA extends obliquely in the Y direction from the tip surface of the wire connection portion 42AA toward the lead connection portion 42AB toward the second sealing side surface 94.
[0126] The lead connection portion 42AB extends in the X direction in a plan view. The lead connection portion 42AB includes a narrow portion 42AB1 and a wide portion 42AB2. Of the side surfaces between the narrow portion 42AB1 and the wide portion 42AB2, the side surface closer to the second lead terminal 41 includes a curved surface. The curved surface connects the side surface of the narrow portion 42AB1 and the side surface of the wide portion 42AB2 and curves away from the second inner lead portion 41A.
[0127] The narrow width portion 42AB1 constitutes a portion of the lead connection portion 42AB that is closer to the second sealing side surface 94. The narrow width portion 42AB1 is connected to the second outer lead portion 42B. The width dimension (size in the Y direction) of the narrow width portion 42AB1 is equal to the width dimension of the narrow width portion 41AA1 of the fourth lead portion 41AA of the second inner lead portion 41A.
[0128] The wide portion 42AB2 constitutes the portion of the lead connection portion 42AB closer to the wire connection portion 42AA. The wide portion 42AB2 is connected to the wire connection portion 42AA. The wide portion 42AB2 is formed wider than the narrow portion 42AB1 by extending in the Y direction toward the fourth lead portion 41AA of the second inner lead portion 41A. The width dimension (size in the Y direction) of the wide portion 42AB2 is approximately twice the width dimension (size in the Y direction) of the narrow portion 42AB1. The width dimension of the wide portion 42AB2 is larger than the width dimension of the wide portion 41AA2 of the fourth lead portion 41AA of the second inner lead portion 41A. The width dimensions of the narrow portion 42AB1 and the wide portion 42AB2 can be changed as desired.
[0129] The inner lead portion 42A has an inclined surface 42AC. The inclined surface 42AC is formed on the wide portion 42AB2. More specifically, the inclined surface 42AC is formed on one of both side surfaces of the wide portion 42AB2 that is closer to the fourth lead portion 41AA of the second inner lead portion 41A. The inclined surface 42AC is inclined toward the second die pad 50 as it approaches the wire connection portion 42AA. The inclination angle of the inclined surface 42AC with respect to the X direction is equal to the inclination angle of the fifth lead portion 41AB of the second inner lead portion 41A with respect to the X direction.
[0130] The second inner lead portion 47A includes a wire connection portion 47AA, a lead connection portion 47AB, and an inclined surface 47AC. The second inner lead portion 47A has a shape that is line-symmetrical with the second inner lead portion 42A about an imaginary line that extends along the X direction at the center of the second die pad 50 in the Y direction. Therefore, only an overview of the second inner lead portion 47A will be described, and a detailed description thereof will be omitted.
[0131] When viewed from the Y direction, the wire connection portion 47AA is disposed at a position overlapping the second die pad 50. When viewed from the Y direction, the wire connection portion 47AA is disposed between the sixth lead portion 48AC of the second inner lead portion 48A and the second base end surface 52 of the second die pad 50 in the X direction.
[0132] The tip surface of the wire connection portion 47AA faces the fourth side surface 54 of the second die pad 50 in the Y direction. The wire connection portion 47AA extends obliquely in the Y direction from the tip surface of the wire connection portion 47AA toward the lead connection portion 47AB toward the second sealing side surface 94.
[0133] The lead connection portion 47AB extends in the X direction in a plan view. The lead connection portion 47AB includes a narrow portion 47AB1 and a wide portion 47AB2. Of the side surfaces between the narrow portion 47AB1 and the wide portion 47AB2, the side surface closer to the second lead terminal 48 includes a curved surface. The curved surface connects the side surface of the narrow portion 47AB1 and the side surface of the wide portion 47AB2 and curves away from the second inner lead portion 48A.
[0134] The inclined surface 47AC is formed on one of the two side surfaces of the wide portion 47AB2 that is closer to the fourth lead portion 48AA of the second inner lead portion 48A. The inclined surface 47AC is inclined toward the second die pad 50 as it approaches the wire connection portion 47AA. The inclination angle of the inclined surface 47AC with respect to the X direction is equal to the inclination angle of the fifth lead portion 48AB of the second inner lead portion 48A with respect to the X direction.
[0135] The second inner lead portions 43A to 46A are arranged closer to the second sealing side surface 94 than the second die pad 50. The second inner lead portions 43A to 46A have the same shape. Therefore, the configuration of the second inner lead portion 43A will be described in detail, and a detailed description of the second inner lead portions 44A to 46A will be omitted.
[0136] The second inner lead portion 43A extends along the X direction and includes a wire connection portion 43AA and a lead connection portion 43AB extending from the wire connection portion 43AA toward the second sealing side surface 94. The lead connection portion 43AB is connected to the second outer lead portion 43B.
[0137] In plan view, the shape of the wire connection portion 43AA is a substantially rectangular shape with the Y direction as the longitudinal direction and the X direction as the lateral direction. In plan view, the portion of the wire connection portion 43AA closer to the lead connection portion 43AB is formed in a curved shape such that the width dimension (size in the Y direction) of the wire connection portion 43AA decreases toward the lead connection portion 43AB. In plan view, the tip end and both ends in the Y direction of the wire connection portion 43AA are formed in a tapered shape such that the width dimension (size in the Y direction) of the wire connection portion 43AA decreases toward the tip surface of the wire connection portion 43AA. The tip surface of the wire connection portion 43AA faces the second die pad 50 in the X direction in plan view and extends along the Y direction.
[0138] The second inner lead portion 44A includes a wire connection portion 44AA and a lead connection portion 44AB extending from the wire connection portion 44AA toward the second sealing side surface 94. The lead connection portion 44AB is connected to the second outer lead portion 44B.
[0139] The second inner lead portion 45A includes a wire connection portion 45AA and a lead connection portion 45AB extending from the wire connection portion 45AA toward the second sealing side surface 94. The lead connection portion 45AB is connected to the second outer lead portion 45B.
[0140] The second inner lead portion 46A includes a wire connection portion 46AA and a lead connection portion 46AB extending from the wire connection portion 46AA toward the second sealing side surface 94. The lead connection portion 46AB is connected to the second outer lead portion 46B.
[0141] Here, the wire connection portions 42AA to 47AA of the second inner lead portions 42A to 47A correspond to the "fourth portion." The lead connection portions 42AB to 47AB of the second inner lead portions 42A to 47A correspond to the "third portion."
[0142] Next, the detailed cross-sectional structure of the second inner lead portions 42A to 47A will be described. Figure 13 shows the cross-sectional structure of the wire connection portion 43AA of the second inner lead portion 43A. Note that the cross-sectional structures of the wire connection portions 42AA, 44AA to 47AA of the second inner lead portions 42A, 44A to 47A are similar to the cross-sectional structure of the wire connection portion 43AA, and therefore detailed description thereof will be omitted. For convenience, the reference numerals relating to the second inner lead portion 43A will be the same as those relating to the first inner lead portion 13A.
[0143] 13, the inner lead body 20B of the wire connection portion 43AA has an inner lead surface 21B, an inner lead back surface 22B opposite to the inner lead surface 21B, and an inner lead side surface 23B connecting the inner lead surface 21B and the inner lead back surface 22B. The inner lead surface 21B of the wire connection portion 43AA faces the same side as the inner lead surface 21B of the wire connection portion 13AA (see FIG. 10), and the inner lead back surface 22B of the wire connection portion 43AA faces the same side as the inner lead back surface 22B of the wire connection portion 13AA (see FIG. 10).
[0144] In the cross-sectional view of Figure 13, the tip surface 24B is formed as a concave shape recessed away from the second die pad 50 (see Figure 11). The tip surface 24B is recessed from both the end on the inner lead front surface 21B side and the end on the inner lead back surface 22B side toward the center of the tip surface 24B in the Z direction. In one example, the deepest position of the concave tip surface 24B is approximately 1 / 3 of the thickness of the wire connection portion 43AA from the inner lead back surface 22B. Note that the shape of the tip surface 24B in the cross-sectional view of Figure 13 can be changed as desired.
[0145] A plating layer 29 is formed on the inner lead surface 21B. The plating layer 29 is formed of a material containing, for example, silver. In one example, the plating layer 29 is formed of the same material as the plating layer 29 of the wire connection portion 12AA (see FIG. 10 ). The plating layer 29 is formed over substantially the entire inner lead surface 21B. The thickness of the plating layer 29 is thinner than the thickness of the inner lead body 20B of the wire connection portion 43AA. In one example, the thickness of the plating layer 29 of the wire connection portion 43AA is equal to the thickness of the plating layer 29 of the wire connection portion 13AA. Here, if the difference between the thicknesses of the plating layer 29 of the wire connection portion 43AA and the plating layer 29 of the wire connection portion 13AA is, for example, within 20% of the thickness of the plating layer 29 of the wire connection portion 43AA, then the thickness of the plating layer 29 of the wire connection portion 43AA can be said to be equal to the thickness of the plating layer 29 of the wire connection portion 13AA.
[0146] An end surface 29A of the plating layer 29 that is closer to the tip surface 24B of the wire connection portion 43AA is formed at a position closer to the lead connection portion 43AB (see FIG. 12) than the edge of the inner lead surface 21B that is closer to the tip surface 24B. In other words, the plating layer 29 does not cover the edge of the inner lead surface 21B that is closer to the tip surface 24B. As a result, the end of the inner lead surface 21B, including the edge that is closer to the tip surface 24B, is in contact with the sealing resin 90 (see FIG. 1).
[0147] 13 , end surface 29A of plating layer 29 is inclined away from the end surface of inner lead surface 21B closer to tip surface 24B as it moves from the front surface to the back surface of plating layer 29. The distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to tip surface 24B is, for example, equal to or greater than the thickness of plating layer 29. Note that the distance in the X direction between the back surface of plating layer 29 and the edge of inner lead surface 21B closer to tip surface 24B can be changed as desired.
[0148] Furthermore, the plating layer 29 does not cover the tip surface 24B of the wire connection portion 43AA. Therefore, the tip surface 24B is in contact with the sealing resin 90. Furthermore, although not shown, the plating layer 29 does not cover the inner lead side surface 23B other than the tip surface 24B. Therefore, the inner lead side surface 23B is in contact with the sealing resin 90.
[0149] Next, we will explain the general configuration of the first chip 60 and the second chip 70. As shown in Figure 7, the first chip 60 mounted on the first die pad 30 has a chip front surface 61, a chip back surface 62 (see Figure 19) facing the opposite side to the chip front surface 61 in the Z direction, and first to fourth chip side surfaces 63 to 66 connecting the chip front surface 61 and the chip back surface 62.
[0150] The chip front surface 61 faces the side opposite to the first die pad 30 with respect to the first chip 60, and the chip back surface 62 faces the side facing the first die pad 30. The first chip side surface 63 and the second chip side surface 64 constitute both end faces of the first chip 60 in the X direction in a plan view. The first chip side surface 63 is the chip side surface of the first chip 60 on the side where the first lead terminals 11 to 18 are arranged, and the second chip side surface 64 is the chip side surface of the first chip 60 on the side where the second chip 70 is arranged. The third chip side surface 65 and the fourth chip side surface 66 constitute both end faces of the first chip 60 in the Y direction in a plan view. The third chip side surface 65 is the chip side surface closer to the third sealing side surface 95 of the sealing resin 90, and the fourth chip side surface 66 is the chip side surface closer to the fourth sealing side surface 96.
[0151] The first chip 60 has a plurality of (six in the first embodiment) first electrode pads 67, a plurality of (seven in the first embodiment) second electrode pads 68, and a plurality of (two in the first embodiment) third electrode pads 69. Each of the first electrode pads 67, each of the second electrode pads 68, and each of the third electrode pads 69 is provided so as to be exposed from the chip surface 61.
[0152] Each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may include at least one of titanium (Ti), titanium nitride (TiN), copper (Cu), aluminum (Al), and tungsten (W). In one example, each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 has a laminated structure of titanium and copper. Note that the material constituting one or two of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 may be different from the material constituting the remaining electrode pads.
[0153] In another example, each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 contains aluminum. In this case, each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 exposed from the chip surface 61 has a thickness of 2 μm or more. Note that the thickness of each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 can be changed as desired.
[0154] The multiple first electrode pads 67 are electrode pads electrically connected to the second chip 70. The multiple first electrode pads 67 are provided at positions closer to the second chip side surface 64 than the center of the chip surface 61 in the X direction in a plan view. The multiple first electrode pads 67 can be divided into three first electrode pads 67 closer to the third chip side surface 65 and three first electrode pads 67 closer to the fourth chip side surface 66. The three first electrode pads 67 closer to the third chip side surface 65 are arranged at the same position as each other in the X direction and spaced apart from each other in the Y direction. The three first electrode pads 67 closer to the fourth chip side surface 66 are arranged closer to the second chip side surface 64 than the three first electrode pads 67 closer to the third chip side surface 65. The three first electrode pads 67 closer to the fourth chip side surface 66 are arranged at the same position as each other in the X direction and spaced apart from each other in the Y direction.
[0155] The second electrode pads 68 are electrode pads that are individually and electrically connected to the first lead terminals 12 to 17. The second electrode pads 68 are provided at positions closer to the first chip side surface 63 than the center in the X direction of the chip surface 61 in a plan view. The second electrode pads 68, except for the second electrode pads 68 at both ends in the Y direction, are arranged at the same positions in the X direction and spaced apart from each other in the Y direction. The second electrode pads 68 at both ends in the Y direction are arranged shifted closer to the second chip side surface 64 in the X direction relative to the other second electrode pads 68.
[0156] The multiple third electrode pads 69 are electrode pads electrically connected to the first die pad 30. Each third electrode pad 69 has the same potential as the first die pad 30, i.e., the first ground potential. The multiple third electrode pads 69 are provided at both ends in the Y direction of the chip surface 61 in a plan view. The multiple third electrode pads 69 are arranged between the multiple first electrode pads 67 and the multiple second electrode pads 68 in the X direction when viewed from the Y direction. The multiple third electrode pads 69 are arranged in positions that overlap each other when viewed from the Y direction.
[0157] The second chip 70 mounted on the second die pad 50 has a chip surface 71, a chip back surface (not shown) facing the opposite side of the chip surface 71 in the Z direction, and first to fourth chip side surfaces 73 to 76 connecting the chip surface 71 and the chip back surface.
[0158] The chip front surface 71 faces the side opposite to the second die pad 50 with respect to the second chip 70, and the chip back surface faces the side facing the second die pad 50. The first chip side surface 73 and the second chip side surface 74 constitute both end faces of the second chip 70 in the X direction in a plan view. The first chip side surface 73 is the chip side surface of the second chip 70 on the side where the first chip 60 is arranged, and the second chip side surface 74 is the chip side surface of the second chip 70 on the side where the second lead terminals 41 to 48 are arranged. The third chip side surface 75 and the fourth chip side surface 76 constitute both end faces of the second chip 70 in the Y direction in a plan view. The third chip side surface 75 is the chip side surface closer to the third sealing side surface 95 of the sealing resin 90, and the fourth chip side surface 76 is the chip side surface closer to the fourth sealing side surface 96.
[0159] The second chip 70 has a plurality of (six in the first embodiment) first electrode pads 77, a plurality of (seven in the first embodiment) second electrode pads 78, and a plurality of (three in the first embodiment) third electrode pads 79. Each of the first electrode pads 77, each of the second electrode pads 78, and each of the third electrode pads 79 is provided so as to be exposed from the chip surface 71.
[0160] Each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten. In one example, each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 has a laminated structure of titanium and copper. Note that the material constituting one or two of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 may be different from the material constituting the remaining electrode pads.
[0161] In another example, each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 contains aluminum. In this case, each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 exposed from the chip surface 71 has a thickness of 2 μm or more. Note that the thickness of each of the first electrode pads 77, second electrode pads 78, and third electrode pads 79 can be changed as desired.
[0162] The multiple first electrode pads 77 are electrode pads that are individually and electrically connected to the multiple first electrode pads 67 of the first chip 60. The multiple first electrode pads 77 are provided at positions closer to the first chip side surface 73 than the center of the chip surface 71 in the X direction in a plan view. The multiple first electrode pads 77 can be divided into three first electrode pads 77 closer to the third chip side surface 75 and three first electrode pads 77 closer to the fourth chip side surface 76. The three first electrode pads 77 closer to the third chip side surface 75 are arranged at the same position as each other in the X direction and spaced apart from each other in the Y direction. The three first electrode pads 77 closer to the fourth chip side surface 76 are arranged closer to the second chip side surface 74 than the three first electrode pads 77 closer to the third chip side surface 75. The three first electrode pads 77 closer to the fourth chip side surface 76 are arranged at the same position as each other in the X direction and spaced apart from each other in the Y direction.
[0163] The second electrode pads 78 are electrode pads that are individually and electrically connected to the second lead terminals 42 to 47. The second electrode pads 78 are provided at positions closer to the second chip side surface 74 than the center of the chip surface 71 in the X direction in a plan view.
[0164] The multiple third electrode pads 79 are electrode pads electrically connected to the second die pad 50. Each third electrode pad 79 has the same potential as the second die pad 50, i.e., the second ground potential. The multiple third electrode pads 79 are provided at both ends in the Y direction of the chip surface 71 in plan view.
[0165] Next, the electrical connection configuration between the first chip 60 and the second chip 70 will be described. As shown in Fig. 14, the first electrode pads 67 of the first chip 60 and the first electrode pads 77 of the second chip 70 are individually connected by a plurality of inter-chip wires WA (six in the first embodiment). This electrically connects the first electrode pads 67 and the first electrode pads 77 individually.
[0166] More specifically, the multiple first electrode pads 67 on the first chip 60 include first electrode pads 67A to 67F. The first electrode pads 67A to 67F are arranged in the order of 67A, 67B, 67C, 67D, 67E, and 67F from the third chip side surface 65 to the fourth chip side surface 66. The multiple first electrode pads 77 on the second chip 70 include first electrode pads 77A to 77F. The first electrode pads 77A to 77F are arranged in the order of 77A, 77B, 77C, 77D, 77E, and 77F from the fourth chip side surface 76 to the third chip side surface 75.
[0167] The first electrode pads 67A to 67F of the first chip 60 and the first electrode pads 77A to 77F of the second chip 70 are individually electrically connected by inter-chip wires WA1 to WA6.
[0168] The inter-chip wire WA1 connects the first electrode pad 67A of the first chip 60 and the first electrode pad 77F of the second chip 70. In other words, the inter-chip wire WA1 electrically connects the first electrode pad 67A and the first electrode pad 77F.
[0169] The inter-chip wire WA2 connects the first electrode pad 67B of the first chip 60 and the first electrode pad 77E of the second chip 70. In other words, the inter-chip wire WA2 electrically connects the first electrode pad 67B and the first electrode pad 77E.
[0170] The inter-chip wire WA3 connects the first electrode pad 67C of the first chip 60 and the first electrode pad 77D of the second chip 70. In other words, the inter-chip wire WA3 electrically connects the first electrode pad 67C and the first electrode pad 77D.
[0171] The inter-chip wire WA4 connects the first electrode pad 67D of the first chip 60 and the first electrode pad 77C of the second chip 70. In other words, the inter-chip wire WA4 electrically connects the first electrode pad 67D and the first electrode pad 77C.
[0172] The inter-chip wire WA5 connects the first electrode pad 67E of the first chip 60 and the first electrode pad 77B of the second chip 70. In other words, the inter-chip wire WA5 electrically connects the first electrode pad 67E and the first electrode pad 77B.
[0173] The inter-chip wire WA6 connects the first electrode pad 67F of the first chip 60 and the first electrode pad 77A of the second chip 70. In other words, the inter-chip wire WA6 electrically connects the first electrode pad 67F and the first electrode pad 77A.
[0174] In one example, the distance in the Y direction between the first electrode pad 67A and the first electrode pad 67B of the first chip 60 is equal to the distance in the Y direction between the first electrode pad 67B and the first electrode pad 67C. The distance in the Y direction between the first electrode pad 67D and the first electrode pad 67E is equal to the distance in the Y direction between the first electrode pad 67E and the first electrode pad 67F. In another example, the distance in the Y direction between the first electrode pad 67A and the first electrode pad 67B is equal to the distance in the Y direction between the first electrode pad 67D and the first electrode pad 67E.
[0175] In one example, the distance in the Y direction between first electrode pad 77A and first electrode pad 77B of second chip 70 is equal to the distance in the Y direction between first electrode pad 77B and first electrode pad 77C. The distance in the Y direction between first electrode pad 77D and first electrode pad 77E is equal to the distance in the Y direction between first electrode pad 77E and first electrode pad 77F. In another example, the distance in the Y direction between first electrode pad 77A and first electrode pad 77B is equal to the distance in the Y direction between first electrode pad 77D and first electrode pad 77E.
[0176] In one example, the distance in the Y direction between the first electrode pad 67A and the first electrode pad 67B of the first chip 60 is equal to the distance in the Y direction between the first electrode pad 77D and the first electrode pad 77E of the second chip 70. The distance in the Y direction between the first electrode pad 67B and the first electrode pad 67C of the first chip 60 is equal to the distance in the Y direction between the first electrode pad 77E and the first electrode pad 77F of the second chip 70.
[0177] In one example, the distance in the Y direction between the first electrode pad 77A and the first electrode pad 77B of the second chip 70 is equal to the distance in the Y direction between the first electrode pad 67D and the first electrode pad 67E of the first chip 60. The distance in the Y direction between the first electrode pad 77B and the first electrode pad 77C of the second chip 70 is equal to the distance in the Y direction between the first electrode pad 67E and the first electrode pad 67F of the first chip 60.
[0178] Therefore, in a planar view, the inter-chip wire WA1 connecting the first electrode pad 67A and the first electrode pad 77F and the inter-chip wire WA2 connecting the first electrode pad 67B and the first electrode pad 77E are parallel in a planar view. The inter-chip wire WA2 and the inter-chip wire WA3 connecting the first electrode pad 67C and the first electrode pad 77D are parallel in a planar view. The inter-chip wire WA4 and the inter-chip wire WA5 connecting the first electrode pad 67E and the first electrode pad 77B are parallel in a planar view. The inter-chip wire WA5 and the inter-chip wire WA6 connecting the first electrode pad 67F and the first electrode pad 77A are parallel in a planar view.
[0179] Here, if the acute angle formed between the inter-chip wires WA1 and WA2 in a plan view is 5° or less, the inter-chip wires WA1 and WA2 can be said to be parallel in a plan view. Therefore, the acute angle formed between the inter-chip wires WA1 and WA2 is 0° or greater and 5° or less. In one example, the acute angle formed between the inter-chip wires WA1 and WA2 is 0° or greater and 3° or less. In one example, the acute angle formed between the inter-chip wires WA1 and WA2 is greater than 3° and 5° or less.
[0180] Furthermore, if the acute angle formed between the inter-chip wires WA2 and WA3 in a plan view is 5° or less, the inter-chip wires WA2 and WA3 can be said to be parallel in a plan view. Therefore, the acute angle formed between the inter-chip wires WA2 and WA3 is 0° or greater and 5° or less. In one example, the acute angle formed between the inter-chip wires WA2 and WA3 is 0° or greater and 3° or less. In one example, the acute angle formed between the inter-chip wires WA2 and WA3 is greater than 3° and 5° or less.
[0181] Furthermore, if the acute angle formed between the inter-chip wires WA4 and WA5 in a plan view is 5° or less, the inter-chip wires WA4 and WA5 can be said to be parallel in a plan view. Therefore, the acute angle formed between the inter-chip wires WA4 and WA5 is 0° or greater and 5° or less. In one example, the acute angle formed between the inter-chip wires WA4 and WA5 is 0° or greater and 3° or less. In one example, the acute angle formed between the inter-chip wires WA4 and WA5 is greater than 3° and 5° or less.
[0182] Furthermore, if the acute angle formed between the inter-chip wires WA5 and WA6 in a plan view is 5° or less, the inter-chip wires WA5 and WA6 can be said to be parallel in a plan view. Therefore, the acute angle formed between the inter-chip wires WA5 and WA6 is 0° or greater and 5° or less. In one example, the acute angle formed between the inter-chip wires WA5 and WA6 is 0° or greater and 3° or less. In one example, the acute angle formed between the inter-chip wires WA5 and WA6 is greater than 3° and 5° or less.
[0183] In addition, in a plan view, the first electrode pads 67A and 77D are at the same position in the Y direction, the first electrode pads 67B and 77E are at the same position in the Y direction, and the first electrode pads 67C and 77F are at the same position in the Y direction. Therefore, each of the inter-chip wires WA1 to WA3 extends along the X direction in a plan view.
[0184] In addition, in a plan view, the first electrode pads 67D and 77A are in the same position in the Y direction, the first electrode pads 67E and 77B are in the same position in the Y direction, and the first electrode pads 67F and 77C are in the same position in the Y direction. Therefore, each of the inter-chip wires WA4 to WA6 extends along the X direction in a plan view.
[0185] Here, if the acute angle formed between the inter-chip wire WA1 and the X direction in a planar view is 5° or less, it can be said that the inter-chip wire WA1 extends along the X direction in a planar view. Therefore, the acute angle formed between the inter-chip wire WA1 and the X direction in a planar view is 0° or more and 5° or less. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction in a planar view is 0° or more and 3° or less. In one example, the acute angle formed between the inter-chip wire WA1 and the X direction in a planar view is greater than 3° and 5° or less. The same applies to each of the inter-chip wires WA2 to WA6.
[0186] 9, the second electrode pads 68 of the first chip 60 and the first lead terminals 12 to 17 are individually connected by a plurality of first lead wires WB (six in the first embodiment). This electrically connects the first chip 60 to the first lead terminals 12 to 17. Each of the first lead terminals 12 to 17 is individually connected to the second electrode pads 68 by a single first lead wire WB.
[0187] The first lead wire WB is a bonding wire formed by a wire bonding device. In one example, the first lead wire WB has a first bond portion bonded to the second electrode pad 68 and a second bond portion bonded to the first lead terminals 12 to 17. The first lead wire WB is connected to the wire connection portions 12AA to 17AA of the first inner lead portions 12A to 17A of the first lead terminals 12 to 17.
[0188] More specifically, the wire connection portion 12AA includes a side surface that intersects with the first lead wire WB connected to the wire connection portion 12AA in a plan view. This side surface faces the first die pad 30 in a plan view. In the first embodiment, the side surface of the wire connection portion 12AA forms the tip surface of the wire connection portion 12AA and faces the first side surface 33 of the first die pad 30 in the Y direction.
[0189] The wire connection portion 13AA includes a side surface that intersects with the first lead wire WB connected to the wire connection portion 13AA in a plan view. This side surface faces the first die pad 30 in a plan view. In the first embodiment, the side surface of the wire connection portion 13AA is an inclined surface formed on one of both ends of the wire connection portion 13AA in the Y direction that is closer to the wire connection portion 14AA. This inclined surface is inclined toward the first sealing side surface 93 as it approaches the wire connection portion 14AA.
[0190] The wire connection portion 14AA includes a side surface that intersects with the first lead wire WB connected to the wire connection portion 14AA in a plan view. This side surface faces the first die pad 30 in a plan view. In the first embodiment, the side surface of the wire connection portion 14AA forms the tip surface of the wire connection portion 14AA and faces the first base end surface 32 of the first die pad 30 in the X direction.
[0191] The wire connection portion 15AA includes a side surface that intersects with the first lead wire WB connected to the wire connection portion 15AA in a plan view. This side surface faces the first die pad 30 in a plan view. In the first embodiment, the side surface of the wire connection portion 15AA forms the tip surface of the wire connection portion 15AA and faces the first base end surface 32 of the first die pad 30 in the X direction.
[0192] The wire connection portion 16AA includes a side surface that intersects with the first lead wire WB connected to the wire connection portion 16AA in a plan view. This side surface faces the first die pad 30 in a plan view. In the first embodiment, the side surface of the wire connection portion 16AA forms the tip surface of the wire connection portion 16AA and faces the first base end surface 32 of the first die pad 30 in the X direction.
[0193] The wire connection portion 17AA includes a side surface that intersects with the first lead wire WB connected to the wire connection portion 17AA in a plan view. This side surface faces the first die pad 30 in a plan view. In the first embodiment, the side surface of the wire connection portion 17AA forms the tip surface of the wire connection portion 17AA and faces the second side surface 34 of the first die pad 30 in the Y direction.
[0194] The multiple third electrode pads 69 of the first chip 60 and the first die pad 30 are individually connected by multiple (two in the first embodiment) first die pad wires WC. As a result, the multiple third electrode pads 69 are electrically connected to the first die pad 30. In other words, the multiple third electrode pads 69 are at the first ground potential. It can also be said that the multiple third electrode pads 69 are electrically connected to the first lead terminals 11, 18.
[0195] The first die pad wire WC connected to the third electrode pad 69 of the first chip 60 closer to the third chip side surface 65 is connected to one of the ends of the first die pad 30 in the Y direction that is closer to the first side surface 33. The first die pad wire WC connected to the third electrode pad 69 of the first chip 60 closer to the fourth chip side surface 66 is connected to one of the ends of the first die pad 30 in the Y direction that is closer to the second side surface 34.
[0196] The first die pad wire WC is a bonding wire formed by a wire bonding apparatus. In one example, the first die pad wire WC has a first bond portion bonded to the third electrode pad 69 and a second bond portion bonded to the first die pad 30.
[0197] 12, the second electrode pads 78 of the second chip 70 and the second lead terminals 42 to 47 are individually connected by a plurality of second lead wires WD (six in the first embodiment). This electrically connects the second chip 70 to the second lead terminals 42 to 47 individually. Each of the second lead terminals 42 to 47 is individually connected to the second electrode pads 78 by a single second lead wire WD.
[0198] The second lead wire WD is a bonding wire formed by a wire bonding device. In one example, the bonded portion of the second lead wire WD to the second electrode pad 78 is a first bond portion, and the bonded portion of the second lead terminals 42 to 47 is a second bond portion. The second lead wire WD is connected to the wire connection portions 42AA to 47AA of the second inner lead portions 42A to 47A of the second lead terminals 42 to 47.
[0199] More specifically, the wire connection portion 42AA includes a side surface that intersects with the second lead wire WD connected to the wire connection portion 42AA in a plan view. This side surface faces the second die pad 50 in a plan view. In the first embodiment, the side surface of the wire connection portion 42AA forms the tip surface of the wire connection portion 42AA and faces the fourth side surface 54 of the second die pad 50 in the Y direction.
[0200] The wire connection portion 43AA includes a side surface that intersects with the second lead wire WD connected to the wire connection portion 43AA in a plan view. This side surface faces the second die pad 50 in a plan view. In the first embodiment, the side surface of the wire connection portion 43AA is an inclined surface formed on one of both ends of the wire connection portion 43AA in the Y direction that is closer to the wire connection portion 44AA. This inclined surface is inclined toward the first sealing side surface 93 as it approaches the wire connection portion 44AA.
[0201] The wire connection portion 44AA includes a side surface that intersects with the second lead wire WD connected to the wire connection portion 44AA in a plan view. This side surface faces the second die pad 50 in a plan view. In the first embodiment, the side surface of the wire connection portion 44AA forms the tip surface of the wire connection portion 44AA and faces the second base end surface 52 of the second die pad 50 in the X direction.
[0202] The wire connection portion 45AA includes a side surface that intersects with the second lead wire WD connected to the wire connection portion 45AA in a plan view. This side surface faces the second die pad 50 in a plan view. In the first embodiment, the side surface of the wire connection portion 45AA forms the tip surface of the wire connection portion 45AA and faces the second base end surface 52 of the second die pad 50 in the X direction.
[0203] The wire connection portion 46AA includes a side surface that intersects with the second lead wire WD connected to the wire connection portion 46AA in a plan view. This side surface faces the second die pad 50 in a plan view. In the first embodiment, the side surface of the wire connection portion 46AA forms the tip surface of the wire connection portion 46AA and faces the second base end surface 52 of the second die pad 50 in the X direction.
[0204] The wire connection portion 47AA includes a side surface that intersects with the second lead wire WD connected to the wire connection portion 47AA in a plan view. This side surface faces the second die pad 50 in a plan view. In the first embodiment, the side surface of the wire connection portion 47AA forms the tip surface of the wire connection portion 47AA and faces a third side surface 53 of the second die pad 50 in the Y direction.
[0205] The multiple third electrode pads 79 of the second chip 70 and the second die pad 50 are individually connected by multiple (two in the first embodiment) second die pad wires WE. This electrically connects the second chip 70 and the second die pad 50. Therefore, the third electrode pads 79 of the second chip 70 are at the second ground potential. It can also be said that the third electrode pads 79 are electrically connected to the second lead terminals 41, 48.
[0206] The second die pad wire WE connected to the third electrode pad 79 of the second chip 70 closer to the third chip side surface 75 is connected to the end of the second die pad 50 in the Y direction closer to the third side surface 53. The second die pad wire WE connected to the third electrode pad 69 of the second chip 70 closer to the fourth chip side surface 76 is connected to the end of the second die pad 50 in the Y direction closer to the fourth side surface 54.
[0207] The second die pad wire WE is a bonding wire formed by a wire bonding apparatus. In one example, the second die pad wire WE has a first bond portion at its bonded portion to the third electrode pad 79 and a second bond portion at its bonded portion to the second die pad 50.
[0208] 7, the inter-chip wires WA1 to WA6 are made of a material different from the material making up the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE. In one example, the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are made of the same material.
[0209] The inter-chip wires WA1 to WA6 are formed of a material containing gold. The first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each formed of a material containing copper. In one example, the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE are each configured such that the surface of the copper wire is coated with palladium (Pd). This allows for improved oxidation resistance and corrosion resistance compared to copper wires whose surfaces are not coated with palladium.
[0210] Each of the first lead wire WB, the first die pad wire WC, the second lead wire WD, and the second die pad wire WE may be made of a material containing aluminum.
[0211] In the first embodiment, a security bond WC1 is formed on the second bond portion of each first die pad wire WC, and a security bond WE1 is formed on the second bond portion of each second die pad wire WE.
[0212] 15 shows a perspective view of the second bond portion of the first die pad wire WC and its surrounding area. Note that since the configuration of the second bond portion of the first die pad wire WC and the configuration of the second bond portion of the second die pad wire WE are the same, the configuration of the second bond portion of the first die pad wire WC will be described in detail, and a detailed description of the configuration of the second bond portion of the second die pad wire WE will be omitted.
[0213] 15 , the second bond portion of the first die pad wire WC includes a bonding portion WCP bonded to the first die pad 30. The bonding portion WCP is a portion that is crushed by being pressed against the first die pad 30 by the wire bonding device. The thickness of the bonding portion WCP is smaller than the diameter of the first die pad wire WC.
[0214] The security bond WC1 is formed, for example, by providing a stud bump SB on the bonding portion WCP. In one example, the stud bump SB is formed by ball bonding using a wire bonding device. The bonding portion WCP is sandwiched between the first die pad 30 and the stud bump SB.
[0215] The configuration of the security bond WB1 formed on the second bond portion of the first lead wire WB and the security bond WD1 formed on the second bond portion of the second lead wire WD is the same as, for example, the configuration of the security bond WC1 of the first die pad wire WC.
[0216] [Circuit Configuration of Signal Transmission Device] The circuit configuration of the signal transmission device 10 of the first embodiment will be described with reference to Fig. 16. The signal transmission device 10 includes a first circuit 500, a second circuit 520, a first transformer 111, and a second transformer 112. In the first embodiment, the first chip 60 includes the first circuit 500 and the first transformer 111, and the second chip 70 includes the second circuit 520 and the second transformer 112. The first transformer 111 and the second transformer 112 are configured to insulate the first circuit 500 from the second circuit 520 and to enable signal exchange between the first circuit 500 and the second circuit 520.
[0217] The signal transmission device 10 also has first terminals P1 to P8 which are external terminals electrically connected to the first circuit 500, and second terminals Q1 to Q8 which are external terminals electrically connected to the second circuit 520.
[0218] The first terminal P1 is a ground terminal (GND1), the first terminal P2 is a positive input terminal (IN+), the first terminal P3 is a negative input terminal (IN-), the first terminal P4 is an input / output terminal (RDYC), the first terminal P5 is a detection terminal ( / FLT), the first terminal P6 is a reset terminal ( / RST), the first terminal P7 is a power supply terminal (VCC1), and the first terminal P8 is a ground terminal (GND1). The first terminal P1 and the first terminal P8 are electrically connected to each other. In one example, the first terminal P1 corresponds to the first lead terminal 11, the first terminal P2 corresponds to the first lead terminal 12, the first terminal P3 corresponds to the first lead terminal 13, the first terminal P4 corresponds to the first lead terminal 14, the first terminal P5 corresponds to the first lead terminal 15, the first terminal P6 corresponds to the first lead terminal 16, the first terminal P7 corresponds to the first lead terminal 17, and the first terminal P8 corresponds to the first lead terminal 18.
[0219] The second terminal Q1 is a negative power supply terminal (VEE2), the second terminal Q2 is a voltage detection terminal (DESAT), the second terminal Q3 is a ground terminal (GND2), the second terminal Q4 is a set terminal (TLSET), the second terminal Q5 is a positive power supply terminal (VCC2), the second terminal Q6 is an output terminal (OUT), the second terminal Q7 is a clamp terminal (CLAMP), and the second terminal Q8 is a negative power supply terminal (VEE2). The second terminals Q1 and Q8 are electrically connected to each other. In one example, the second terminal Q1 corresponds to the second lead terminal 41, the second terminal Q2 corresponds to the second lead terminal 42, the second terminal Q3 corresponds to the second lead terminal 43, the second terminal Q4 corresponds to the second lead terminal 44, the second terminal Q5 corresponds to the second lead terminal 45, the second terminal Q6 corresponds to the second lead terminal 46, the second terminal Q7 corresponds to the second lead terminal 47, and the second terminal Q8 corresponds to the second lead terminal 48.
[0220] The first circuit 500 includes a transmitting unit 501, a receiving unit 502, a logic unit 503, and a UVLO unit 504 as first functional units, and resistors 505, 506, 507, 509, and 511 and switching elements 508 and 510 as circuit elements.
[0221] The first terminals P2 to P6 are electrically connected to the logic unit 503, and the first terminal P7 is electrically connected to the UVLO unit 504. The logic unit 503 is electrically connected to the transmitting unit 501, the receiving unit 502, and the UVLO unit 504, individually.
[0222] The transmitting unit 501 is electrically connected to the first transformer 111. The transmitting unit 501 is configured to transmit the control signal input from the logic unit 503 to the second circuit 520 using the first transformer 111.
[0223] The receiving unit 502 is electrically connected to the second transformer 112. The receiving unit 502 is configured to receive a signal from the second circuit 520 via the second transformer 112 and output the received signal to the logic unit 503.
[0224] The logic unit 503 is configured to exchange various signals with an external control device (not shown) of the signal transmission device 10 via the first terminals P2 to P6, and to exchange various signals with the second circuit 520 using the transmitting unit 501 and the receiving unit 502.
[0225] The logic unit 503 includes, for example, a decoder electrically connected to the receiving unit 502, a first AND circuit electrically connected to the transmitting unit 501, a flip-flop circuit and a second AND circuit for generating a gate signal for the switching element 510, and a third AND circuit for generating a gate signal for the switching element 508. The logic unit 503 includes, for example, a first delay circuit provided between the first AND circuit and the first terminal P2, a second delay circuit provided between the first AND circuit and the first terminal P3, and a third delay circuit provided between the flip-flop circuit and the first terminal P6.
[0226] A resistor 505 is electrically connected to the conductive path between the first terminal P2 and the logic unit 503. A first terminal of the resistor 505 is electrically connected to the conductive path, and a second terminal of the resistor 505 is electrically connected to the first terminal P1 (P8). Therefore, the resistor 505 is a pull-down resistor.
[0227] A resistor 506 is electrically connected to the conductive path between the first terminal P3 and the logic unit 503. A first terminal of the resistor 506 is electrically connected to the first terminal P7, and a second terminal of the resistor 506 is electrically connected to the conductive path. Therefore, the resistor 506 is a pull-up resistor.
[0228] A switching element 508 and a resistor 507 are provided between the first terminal P4 and the logic unit 503. The switching element 508 is, for example, an n-channel MOSFET. A first terminal of the resistor 506 is electrically connected to the first terminal P7, and a second terminal of the resistor 506 is electrically connected to the drain of the switching element 508. The first terminal P4 is electrically connected to the connection point between the second terminal of the resistor 506 and the drain of the switching element 508. The source of the switching element 508 is electrically connected to the first terminal P1 (P8). The gate of the switching element 508 is electrically connected to the logic unit 503.
[0229] A switching element 510 and a resistor 509 are provided between the first terminal P5 and the logic unit 503. The switching element 510 is, for example, an n-channel MOSFET. A first terminal of the resistor 509 is electrically connected to the first terminal P7, and a second terminal of the resistor 509 is electrically connected to the drain of the switching element 510. The first terminal P5 is electrically connected to the connection point between the second terminal of the resistor 509 and the drain of the switching element 510. The source of the switching element 510 is electrically connected to the first terminal P1 (P8). The gate of the switching element 510 is electrically connected to the logic unit 503.
[0230] A resistor 511 is electrically connected to the conductive path between the first terminal P6 and the logic unit 503. A first terminal of the resistor 511 is electrically connected to the first terminal P7, and a second terminal of the resistor 511 is electrically connected to the conductive path. Therefore, the resistor 511 is a pull-up resistor.
[0231] The logic unit 503 changes the voltages at the first terminals P4 and P5 by turning on and off the switching elements 508 and 510. The control device can grasp the state of the signal transmission device 10 by monitoring the first terminals P4 and P5.
[0232] The UVLO unit 504 stops the operation of the logic unit 503 when the voltage of the control power supply electrically connected to the first terminal P7 falls below a threshold voltage, thereby preventing malfunction. The second circuit 520 includes, as second functional units, a receiving unit 521, a transmitting unit 522, a logic unit 523, a UVLO unit 524, a clamp control unit 525, an output control unit 526, and a desaturation fault detection unit 527, and, as circuit elements, a switching element 528, a first output switching element 529, a second output switching element 530, a third output switching element 531, resistors 532, 534, and 539, current sources 533 and 537, switching elements 535 and 538, and a comparator 536.
[0233] The second terminal Q2 is electrically connected to the desaturation fault detection unit 527, the second terminal Q4 is electrically connected to the comparator 536, the second terminal Q5 is electrically connected to the UVLO unit 524, the second terminal Q6 is electrically connected to the output control unit 526, and the second terminal Q7 is electrically connected to the clamp control unit 525. The logic unit 523 is electrically connected to the receiving unit 521, the transmitting unit 522, the UVLO unit 524, the clamp control unit 525, the output control unit 526, the desaturation fault detection unit 527, and the comparator 536, individually.
[0234] The receiving unit 521 is electrically connected to the first transformer 111. The receiving unit 521 is configured to receive a control signal from the transmitting unit 501 via the first transformer 111 and output the received control signal to the logic unit 523.
[0235] The transmitting unit 522 is electrically connected to the second transformer 112. The transmitting unit 522 transmits the signal input from the logic unit 523 to the receiving unit 521 using the second transformer 112.
[0236] The logic unit 523 individually controls the clamp control unit 525, the output control unit 526, and the desaturation fault detection unit 527. The logic unit 523 is configured to output signals from the clamp control unit 525, the output control unit 526, and the desaturation fault detection unit 527 to the transmission unit 522.
[0237] The UVLO unit 524 stops the operation of the logic unit 523 to prevent malfunction when the voltage of the control power supply electrically connected to the second terminal Q5 falls below a threshold voltage. The clamp control unit 525 is a circuit that controls the operation of the switching element 528. The switching element 528 may be, for example, an n-channel MOSFET. The drain of the switching element 528 is electrically connected to the second terminal Q7, and the source of the switching element 528 is electrically connected to the second terminal Q1 (Q8). The gate of the switching element 528 is electrically connected to the clamp control unit 525.
[0238] The clamp control unit 525 includes an AND circuit and a buffer circuit that control the switching element 528, and a comparator that compares the voltage at the second terminal Q7 with a preset voltage and outputs the comparison result to the AND circuit.
[0239] The output control unit 526 is a circuit that controls the operation of each of the first output switching element 529, the second output switching element 530, and the third output switching element 531. A p-channel MOSFET, for example, is used as the first output switching element 529, and n-channel MOSFETs, for example, are used as the second output switching element 530 and the third output switching element 531. The voltage at the second terminal Q6 changes based on the on / off operations of the first output switching element 529, the second output switching element 530, and the third output switching element 531, and an output signal is output from the second terminal Q6.
[0240] The gates of the first output switching element 529, the second output switching element 530, and the third output switching element 531 are electrically connected to the output control unit 526. The drain of the first output switching element 529 is electrically connected to the drain of the third output switching element 531. The connection point between the drain of the first output switching element 529 and the drain of the third output switching element 531 is electrically connected to the second terminal Q6. The source of the first output switching element 529 and the drain of the second output switching element 530 are electrically connected to the second terminal Q5. The source of the second output switching element 530 is electrically connected to both the second terminal Q6 and the output control unit 526. A resistor 532 is electrically connected between the source of the second output switching element 530 and the gate of the third output switching element 531.
[0241] The fault signal input to the second terminal Q2 is input to the desaturation fault detection unit 527. The desaturation fault detection unit 527 outputs the input fault signal to the logic unit 523. The desaturation fault detection unit 527 is electrically connected to the current source 533 and the switching element 535.
[0242] The current source 533 is electrically connected to the second terminal Q5 and the second terminal Q2. The current source 533 supplies current to the desaturation fault detection unit 527. An n-channel MOSFET is used as the switching element 535. The drain of the switching element 535 is electrically connected to the second terminal Q2 via the resistor 534, and the source of the switching element 535 is electrically connected to the second terminal Q2. The gate of the switching element 535 is electrically connected to the desaturation fault detection unit 527. Therefore, the desaturation fault detection unit 527 controls the operation of the switching element 535.
[0243] The desaturation fault detection unit 527 includes a comparator electrically connected to the second terminal Q2, a flip-flop circuit to which the output signal of the comparator is input, and an AND circuit that controls the switching element 535.
[0244] A current source 537, a switching element 538, and a resistor 539 are provided between the second terminal Q4 and the comparator 536. The current source 537 is electrically connected to the second terminal Q5 and the second terminal Q4. An n-channel MOSFET is used as the switching element 538. The drain of the switching element 538 is electrically connected to the second terminal Q4, and the source of the switching element 538 is electrically connected to the second terminal Q1 (Q8). The drain of the switching element 538 is electrically connected to the comparator 536. The resistor 539 is provided between the current source 537 and the second terminal Q4. The first terminal of the resistor 539 is electrically connected to the second terminal Q4, and the second terminal of the resistor 539 is electrically connected to the connection point between the current source 537 and the drain of the switching element 538.
[0245] [Detailed Configuration of First Chip] The detailed configuration of the first chip 60 including part of the circuit configuration of the signal transmission device 10 described above will be described with reference to FIGS. 17 to 24. FIG.
[0246] 17 and 18 show a schematic planar structure of an example of the internal configuration of the first chip 60. Figures 19 to 24 show a schematic cross-sectional structure of an example of the internal configuration of the first chip 60. Note that, to make the drawings easier to understand, some hatching lines have been omitted in the schematic cross-sectional structures of the first chip 60 in Figures 19 to 24.
[0247] (Planar Structure of First Chip) Fig. 17 shows a schematic planar structure of an example of the internal configuration of the first chip 60 near the chip front surface 61. Fig. 18 shows a schematic planar structure of an example of the internal structure of the first chip 60 near the chip back surface 62.
[0248] The first chip 60 has an isolation transformer region 110, a circuit region 120, and a peripheral guard ring 100 connected to the isolation transformer region 110 and surrounding the circuit region 120. The isolation transformer region 110 electrically insulates the circuit region 120 from the second chip 70 while allowing signal transmission between the circuit region 120 and the second chip 70. The isolation transformer region 110 is formed closer to the second chip side surface 64 with respect to the center of the first chip 60 in the X direction in a planar view. That is, the isolation transformer region 110 is formed in a region of the first chip 60 that is closer to the second chip 70 (see FIG. 7 ) in a planar view. The isolation transformer region 110 is formed closer to the third chip side surface 65 of the first chip 60.
[0249] The circuit region 120 is formed with the components of the first circuit 500 in Fig. 16 other than the first transformer 111. These components include the transmitting unit 501, receiving unit 502, logic unit 503, UVLO unit 504, resistors 505, 506, 507, 509, and 511, and switching elements 508 and 510 in Fig. 16. In the following description, the components of the first circuit 500 other than the first transformer 111 may be referred to as "plurality of first function units" and "plurality of circuit elements."
[0250] A first transformer 111 is formed in the insulating transformer region 110. As shown in Figures 17 and 18, the first transformer 111 includes a first front surface side coil 111A, a first back surface side coil 111B, a second front surface side coil 112A, and a second back surface side coil 112B.
[0251] 17, the first surface side coil 111A and the second surface side coil 112A are arranged at the same position in the X direction and spaced apart from each other in the Y direction. The first surface side coil 111A is arranged closer to the third chip side surface 65 than the second surface side coil 112A.
[0252] 18 , the first back-side coil 111B and the second back-side coil 112B are arranged at the same position in the X direction and spaced apart from each other in the Y direction. The first back-side coil 111B is arranged closer to the third chip side surface 65 than the second back-side coil 112B.
[0253] Although not shown, the first front surface side coil 111A and the second front surface side coil 112A are arranged at the same position in the Z direction. The first back surface side coil 111B and the second back surface side coil 112B are arranged at the same position in the Z direction.
[0254] The first front-side coil 111A, the second front-side coil 112A, the first back-side coil 111B, and the second back-side coil 112B may each contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten. In one example, the first front-side coil 111A and the second front-side coil 112A contain copper, and the first back-side coil 111B and the second back-side coil 112B contain aluminum. In another example, the first front-side coil 111A and the second front-side coil 112A have a laminated structure of titanium and copper, and the first back-side coil 111B and the second back-side coil 112B have a laminated structure of titanium nitride and aluminum.
[0255] 17, a plurality of first electrode pads 67A to 67C are formed in the insulating transformer region 110. The plurality of first electrode pads 67A to 67C are arranged at the same position in the X direction and spaced apart from one another in the Y direction. A plurality of first electrode pads 67D to 67F are formed in the circuit region 120. The plurality of first electrode pads 67D to 67F are arranged at the same position in the X direction and spaced apart from one another in the Y direction. The first electrode pads 67D to 67F are arranged closer to the second chip side surface 64 than the first electrode pads 67A to 67C.
[0256] The first surface-side coil 111A includes a first coil portion 111A1 that is spiral in plan view, a first outer coil end portion 111A2, and a first inner coil end portion 111A3. The first outer coil end portion 111A2 constitutes the end portion of the first coil portion 111A1 in the winding direction at the outermost periphery, and the first inner coil end portion 111A3 constitutes the end portion of the first coil portion 111A1 in the winding direction at the innermost periphery.
[0257] The second surface-side coil 112A includes a second coil portion 112A1 that is spiral in plan view, a second outer coil end portion 112A2, and a second inner coil end portion 112A3. The second outer coil end portion 112A2 constitutes the end portion of the second coil portion 112A1 in the winding direction at the outermost periphery, and the second inner coil end portion 112A3 constitutes the end portion of the second coil portion 112A1 in the winding direction at the innermost periphery.
[0258] The first electrode pad 67A is disposed in an inner space including the winding center of the first coil portion 111A1 in a plan view. The first electrode pad 67A can be said to be located more inward than the first coil portion 111A1. The first electrode pad 67A is connected to the first inner coil end portion 111A3. Therefore, the first electrode pad 67A can be said to be electrically connected to the first end portion of the first surface side coil 111A.
[0259] The first electrode pad 67B is disposed between the first surface side coil 111A and the second surface side coil 112A in the Y direction in a plan view. The first electrode pad 67B is connected to the first outer coil end 111A2 of the first surface side coil 111A. The first electrode pad 67B is also connected to the second outer coil end 112A2 of the second surface side coil 112A. Therefore, it can be said that the first electrode pad 67B is electrically connected to the second end of the first surface side coil 111A and the second end of the second surface side coil 112A.
[0260] The first electrode pad 67C is disposed in an inner space including the winding center of the second coil portion 112A1 in a plan view. The first electrode pad 67C can be said to be located more inward than the second coil portion 112A1. The first electrode pad 67C is connected to the second inner coil end portion 112A3. Therefore, the first electrode pad 67C can be said to be electrically connected to the first end portion of the second surface side coil 112A.
[0261] 17, the number of turns of the first surface side coil 111A and the number of turns of the second surface side coil 112A are equal to each other, and the winding directions of the first surface side coil 111A and the second surface side coil 112A are opposite to each other in a plan view.
[0262] As shown in FIG. 18 , the first back-side coil 111B is disposed opposite the first front-side coil 111A (see FIG. 17 ) in the Z direction. The first back-side coil 111B includes a first coil portion 111B1 having a spiral shape in a plan view, a first outer coil end portion 111B2, and a first inner coil end portion 111B3. The first outer coil end portion 111B2 constitutes the end portion of the outermost periphery of the first coil portion 111B1 in the winding direction, and the first inner coil end portion 111B3 constitutes the end portion of the innermost periphery of the first coil portion 111B1 in the winding direction. The first outer coil end portion 111B2 is connected to a first connection wiring 118A extending in the X direction. The first connection wiring 118A is electrically connected to the transmitter 501 (see FIG. 16 ) of the circuit area 120 (see FIG. 17 ). The first inner coil end portion 111B3 is connected to a first wiring (not shown). The first wiring is electrically connected to the transmitting section 501 of the circuit area 120 .
[0263] The second back-side coil 112B is positioned opposite the second front-side coil 112A (see FIG. 17 ) in the Z direction. The second back-side coil 112B includes a second coil portion 112B1 that is spiral-shaped in a plan view, a second outer coil end portion 112B2, and a second inner coil end portion 112B3. The second outer coil end portion 112B2 constitutes the end portion of the outermost periphery of the second coil portion 112B1 in the winding direction, and the second inner coil end portion 112B3 constitutes the end portion of the innermost periphery of the second coil portion 112B1 in the winding direction. The second outer coil end portion 112B2 is connected to a second connection wiring 118B that extends in the X direction. The second connection wiring 118B is positioned adjacent to the first connection wiring 118A in the Y direction. The second connection wiring 118B is positioned closer to the second back-side coil 112B than the first connection wiring 118A. The second connection wiring 118B is electrically connected to the transmitter 501 of the circuit area 120. The second inner coil end 112B3 is connected to a second wiring (not shown). The second wiring is electrically connected to the transmitter 501 of the circuit area 120.
[0264] Here, the number of turns of the first back-side coil 111B and the second back-side coil 112B are equal to each other. In a plan view, the winding direction of the first back-side coil 111B and the winding direction of the second back-side coil 112B are opposite to each other. In one example, the number of turns of the first back-side coil 111B and the second back-side coil 112B is equal to the number of turns of the first front-side coil 111A and the second front-side coil 112A.
[0265] 17, a front-side guard ring 115 is formed in the insulating transformer region 110. The front-side guard ring 115 surrounds the first front-side coil 111A, the second front-side coil 112A, and the first electrode pads 67A to 67C in a plan view. The front-side guard ring 115 has a track shape in a plan view.
[0266] 18 , a back-side guard ring 116 is formed in the insulating transformer region 110 to surround the first back-side coil 111B and the second back-side coil 112B in a plan view. The back-side guard ring 116 has a track-like shape in a plan view. The back-side guard ring 116 has the same shape and size as the front-side guard ring 115. In a plan view, the back-side guard ring 116 is formed at a position overlapping the front-side guard ring 115.
[0267] A plurality of vias 117 are formed in the insulating transformer region 110 to connect the front-side guard ring 115 and the back-side guard ring 116. The vias 117 are arranged at positions that overlap both the front-side guard ring 115 and the back-side guard ring 116 in a plan view.
[0268] As shown in FIG. 17 , the circuit region 120 is provided with a plurality of second electrode pads 68, a plurality of third electrode pads 69, and a plurality of wiring layers 121. The plurality of wiring layers 121 include a wiring layer that electrically connects the plurality of first functional units and a wiring layer that electrically connects the plurality of first functional units to the first transformer 111 in the insulating transformer region 110. The plurality of first functional units are formed in a position in the circuit region 120 closer to the chip back surface 62 (see FIG. 19 ) in the Z direction than the plurality of wiring layers 121. In one example, although not shown in FIG. 18 , the plurality of first functional units are formed in the same position in the Z direction as the first back surface side coil 111B and the second back surface side coil 112B. Note that the positions in the Z direction at which the plurality of first functional units are formed can be changed as desired.
[0269] 17 and 18 , the outer periphery guard ring 100 includes a front-side outer periphery guard ring 101 and a back-side outer periphery guard ring 102. As shown in Fig. 17 , the front-side outer periphery guard ring 101 is connected to a front-side guard ring 115. More specifically, the front-side outer periphery guard ring 101 is connected to a linear portion of the front-side guard ring 115 that is closer to the second chip side surface 64. This electrically connects the front-side outer periphery guard ring 101 to the front-side guard ring 115.
[0270] 18 , the back-side outer peripheral guard ring 102 is connected to the back-side guard ring 116. More specifically, the back-side outer peripheral guard ring 102 is connected to a straight portion of the back-side guard ring 116 that is closer to the second chip side surface 64. This electrically connects the back-side outer peripheral guard ring 102 to the back-side guard ring 116. The shape and size of the back-side outer peripheral guard ring 102 in a plan view are the same as those of the front-side outer peripheral guard ring 101. The back-side outer peripheral guard ring 102 is positioned so as to overlap the front-side outer peripheral guard ring 101 in a plan view.
[0271] Although not shown, the first chip 60 has a plurality of peripheral vias that connect the front-side peripheral guard ring 101 and the back-side peripheral guard ring 102. The front-side peripheral guard ring 101 and the back-side peripheral guard ring 102 are electrically connected by the plurality of peripheral vias. Each peripheral via extends in the Z direction.
[0272] (Cross-Sectional Structure of First Chip) The cross-sectional structure of the insulating transformer region 110 as an example of the internal configuration of the first chip 60 will be described with reference to FIGS.
[0273] Fig. 19 shows a cross-sectional structure of a portion of the first transformer 111. Fig. 20 is an enlarged view of a portion of the first transformer 111 in Fig. 19. Fig. 21 is an enlarged view of a portion F21 of the first front surface side coil 111A of the first transformer 111 in Fig. 20, and Fig. 22 is an enlarged view of a portion F22 of the first back surface side coil 111B of the first transformer 111 in Fig. 20. Note that hatching lines have been omitted in Fig. 19 to facilitate understanding of the drawing.
[0274] 19 , the first chip 60 includes the substrate 130 described above and an element insulating layer 150 formed on the substrate 130. The substrate 130 is formed, for example, of a semiconductor substrate. In the first embodiment, the substrate 130 is a semiconductor substrate formed of a material containing silicon (Si). Note that a wide bandgap semiconductor or a compound semiconductor may be used as the semiconductor substrate for the substrate 130. Alternatively, instead of a semiconductor substrate, the substrate 130 may be an insulating substrate formed of a material containing glass or a material containing ceramics such as alumina.
[0275] Wide bandgap semiconductors are semiconductor substrates with a bandgap of 2.0 eV or more. Wide bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), and gallium oxide (GaO). 2 O 3 The compound semiconductor may be any one of III-V compound semiconductors. The compound semiconductor may include at least one of aluminum nitride (AlN), indium nitride (InN), gallium nitride, and gallium arsenide (GaAs).
[0276] The substrate 130 is formed in a flat plate shape and has a substrate front surface 131 and a substrate back surface 132 opposite to the substrate front surface 131. The substrate back surface 132 constitutes the chip back surface 62 of the first chip 60.
[0277] The element insulating layer 150 is in contact with the substrate surface 131. In one example, the element insulating layer 150 is formed over the entire surface of the substrate surface 131. In one example, the element insulating layer 150 is made of silicon oxide (SiO 2 ) The element insulating layer 150 may be formed by stacking a plurality of such oxide films. The material forming the element insulating layer 150 can be changed as desired.
[0278] The element insulating layer 150 has a layer front surface 151 and a layer back surface 152 opposite to the layer front surface 151. The layer front surface 151 faces the same side as the substrate front surface 131, and the layer back surface 152 faces the same side as the substrate back surface 132. The layer back surface 152 is in contact with the substrate front surface 131.
[0279] On the element insulating layer 150, a plurality of first electrode pads 67A to 67F (not shown in FIG. 19, see FIG. 17), a passivation film 161, and a protective film 162 (see FIG. 20) are formed.
[0280] The plurality of first electrode pads 67A to 67F are in contact with the layer surface 151 of the element insulating layer 150. In one example, the plurality of first electrode pads 67A to 67F are formed at the same positions as one another in the Z direction.
[0281] As shown in FIG. 20 , the passivation film 161 is a film that protects the element insulating layer 150 and is formed to cover the layer surface 151. The passivation film 161 is formed to cover the multiple first electrode pads 67A to 67F. Meanwhile, the passivation film 161 has openings (not shown) that expose portions of the multiple first electrode pads 67A to 67F in the Z direction. The protective film 162 is formed on the passivation film 161. In one example, the passivation film 161 is formed of a single layer of a silicon nitride (SiN) film or a silicon oxynitride (SiON) film. In another example, the passivation film 161 is formed of a stacked structure of a silicon oxide film and a silicon nitride film. In this case, the silicon nitride film may be formed on a silicon oxide film. In another example, the passivation film 161 is formed of a stacked structure of a silicon oxide film and a silicon oxynitride film. In this case, the silicon oxynitride film may be formed on a silicon oxide film.
[0282] The thickness of the passivation film 161 (the size of the passivation film 161 in the Z direction) is thinner than the thickness of the protective film 162 (the size of the protective film 162 in the Z direction). In one example, the thickness of the passivation film 161 is ⅓ or less of the thickness of the protective film 162. In another example, the thickness of the passivation film 161 is ¼ or less of the thickness of the protective film 162. In another example, the thickness of the passivation film 161 is ⅕ or more of the thickness of the protective film 162. In the example shown in FIG. 20 , the thickness of the passivation film 161 is about 1.3 μm.
[0283] The protective film 162 is formed on the passivation film 161. The protective film 162 is a film that protects the first chip 60, and is formed of a material containing, for example, polyimide (PI). The protective film 162 can also be said to be a layer that relieves stress between the sealing resin 90 and the element insulating layer 150 and between the sealing resin 90 and the substrate 130. The protective film 162 forms the chip surface 61 of the first chip 60.
[0284] The first surface side coil 111A and the first back side coil 111B of the first transformer 111 are arranged opposite to each other with a gap in the Z direction. An element insulating layer 150 is interposed between the first surface side coil 111A and the first back side coil 111B in the Z direction. The first surface side coil 111A and the first back side coil 111B are provided in the element insulating layer 150. The first back side coil 111B can also be said to be embedded in the element insulating layer 150. The first surface side coil 111A is arranged closer to the layer surface 151 of the element insulating layer 150 than the first back side coil 111B. In other words, the first back side coil 111B is arranged closer to the layer back surface 152 of the element insulating layer 150 (closer to the substrate 130) than the first surface side coil 111A. The first surface side coil 111A is exposed from the layer surface 151 of the element insulating layer 150 in the Z direction. The first front surface side coil 111A is covered with a passivation film 161. The first back surface side coil 111B is disposed at a distance in the Z direction from the layer back surface 152 of the element insulating layer 150. In other words, the first back surface side coil 111B is disposed at a distance in the Z direction from the substrate 130. The element insulating layer 150 is interposed between the first back surface side coil 111B and the substrate 130.
[0285] As shown in Fig. 21 , the first surface side coil 111A is embedded in a recess 153 recessed from the layer front surface 151 toward the layer back surface 152 (see Fig. 20 ) of the element insulating layer 150. The recess 153 is formed in a spiral shape in a plan view. The first surface side coil 111A is formed by a single conductor 170 embedded in the recess 153. In other words, the first surface side coil 111A is configured by a single conductor 170 formed in a spiral shape in a plan view.
[0286] The conducting wire 170 has a coil front surface 171, a coil back surface 172 opposite the coil front surface 171, and a pair of coil side surfaces 173 connecting the coil front surface 171 and the coil back surface 172. The coil front surface 171 faces the same side as the layer front surface 151 of the element insulating layer 150, and the coil back surface 172 faces the same side as the layer back surface 152. The pair of coil side surfaces 173 are formed in a tapered shape whose size in the X direction decreases from the coil front surface 171 toward the coil back surface 172. The coil back surface 172 and the pair of coil side surfaces 173 are in contact with the recess 153. In other words, the coil back surface 172 and the pair of coil side surfaces 173 are in contact with the element insulating layer 150. The coil front surface 171 is covered with a passivation film 161.
[0287] The conductive wire 170 includes a barrier layer 174 and a metal layer 175 formed on the barrier layer 174. The barrier layer 174 is formed so as to contact the recess 153. The barrier layer 174 can be said to be a thin film interposed between the metal layer 175 and the element insulating layer 150. The metal layer 175 is formed so as to fill the recess 153.
[0288] The metal layer 175 is formed of a material containing, for example, copper. The barrier layer 174 has a function of suppressing the diffusion of copper, for example. The barrier layer 174 may contain at least one of titanium, titanium nitride, tantalum (Ta), and tantalum nitride (TaN). The metal layer 175 may also contain at least one of aluminum, gold (Au), silver, and tungsten (W).
[0289] The thickness of the conductor 170 of the first front-side coil 111A is thicker than the thickness of the passivation film 161 and thinner than the thickness of the protective film 162. The thickness of the conductor 170 is thicker than the thickness of the first back-side coil 111B (see FIG. 20 ). In one example, the thickness of the conductor 170 is between two and three times the thickness of the passivation film 161. In one example, the thickness of the conductor 170 is half or less the thickness of the protective film 162. In one example, the thickness of the conductor 170 is one-third or more the thickness of the protective film 162. Here, the thickness of the conductor 170 can be defined by the distance between the coil front surface 171 and the coil back surface 172 in the Z direction.
[0290] The width of coil surface 171 of conducting wire 170 (the length in the X direction in FIG. 21 ) is longer than the thickness of conducting wire 170. In one example, the width of coil surface 171 is more than twice the thickness of conducting wire 170. In another example, the width of coil surface 171 is less than three times the thickness of conducting wire 170. In the example of FIG. 21 , the width of coil surface 171 is approximately 6.8 μm.
[0291] In the first surface side coil 111A, an element insulating layer 150 is interposed between adjacent conductors 170 in the X direction. That is, in the first surface side coil 111A, the conductors 170 are spaced apart from each other in the X direction. The distance between adjacent conductors 170 in the X direction gradually increases from the coil front surface 171 toward the coil back surface 172.
[0292] In FIG. 21 , the distance between adjacent conductors 170 in the X direction, and the distance between the coil surfaces 171 of adjacent conductors 170 in the X direction, is defined as the inter-conductor distance. This inter-conductor distance refers to the minimum distance between adjacent conductors 170 in the X direction. The inter-conductor distance is smaller than the length of the coil surface 171 in the X direction. In one example, the inter-conductor distance is ½ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅓ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ¼ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅕ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅙ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅙ or less of the width of the coil surface 171. In one example, the inter-conductor distance is ⅙ or more of the width of the coil surface 171. The inter-conductor distance is smaller than the thickness of the conductors 170. In one example, the distance between the conductors is equal to or less than ½ of the thickness of the conductors 170. In another example, the distance between the conductors is equal to or more than ⅓ of the thickness of the conductors 170. In the example of Fig. 21, the distance between the conductors is about 1 µm.
[0293] 20 and 22, the first back-side coil 111B is composed of two coil layers 111BA and 111BB. The coil layer 111BA constitutes a conductor closer to the layer front surface 151 of the element insulating layer 150, and the coil layer 111BB constitutes a conductor closer to the layer back surface 152. The coil layers 111BA and 111BB are spaced apart in the Z direction. The element insulating layer 150 is interposed between the coil layers 111BA and 111BB in the Z direction. Each of the coil layers 111BA and 111BB includes a conductor 180. That is, the coil layer 111BA is constituted by a conductor 180 formed in a spiral shape in a plan view, and the coil layer 111BB is constituted by another conductor 180 formed in a spiral shape in a plan view. Here, the number of turns of the first back-side coil 111B can be defined as the sum of the number of turns of the coil layer 111BA and the number of turns of the coil layer 111BB.
[0294] As shown in Fig. 20, the coil layer 111BA and the coil layer 111BB are arranged to be offset from each other in the X direction. In plan view, the coil layer 111BA and the coil layer 111BB are arranged to partially overlap each other. In other words, in plan view, the coil layer 111BA and the coil layer 111BB are arranged to have portions that do not overlap each other. In the example shown in Fig. 22, the coil layer 111BA is arranged to be offset in the X direction from the coil layer 111BB by half the width dimension of the conductor 180 (the length in the X direction in Fig. 22).
[0295] Each of the coil layers 111BA and 111BB is disposed offset in the X direction with respect to the first surface side coil 111A. In a plan view, the coil layers 111BA and 111BB are disposed so as to partially overlap the first surface side coil 111A. In the example shown in FIG. 22 , the coil layer 111BA is offset toward the first chip side surface 63 (see FIG. 17 ) with respect to the first surface side coil 111A (see FIG. 20 ). The coil layer 111BB is offset toward the second chip side surface 64 (see FIG. 17 ) with respect to the first surface side coil 111A.
[0296] The number of turns of the coil layer 111BA and the number of turns of the coil layer 111BB are the same. The number of turns of the coil layers 111BA and 111BB is less than the number of turns of the first front-side coil 111A. In one example, the number of turns of the coil layer 111BA is half the number of turns of the first front-side coil 111A, and the number of turns of the coil layer 111BB is half the number of turns of the first front-side coil 111A. In other words, the sum of the number of turns of the coil layer 111BA and the number of turns of the coil layer 111BB is the same as the number of turns of the first front-side coil 111A. Therefore, the number of turns of the first back-side coil 111B is the same as the number of turns of the first front-side coil 111A.
[0297] The coil layers 111BA and 111BB are formed by identically shaped conductors 180 that are spirally wound in a plan view. The conductor 180 has a coil front surface 181, a coil back surface 182 opposite the coil front surface 181, and a pair of coil side surfaces 183 connecting the coil front surface 181 and the coil back surface 182. The coil front surface 181 faces the same side as the layer front surface 151 of the element insulating layer 150, and the coil back surface 172 faces the same side as the layer back surface 152. The pair of coil side surfaces 183 extend along the Z direction. The coil front surface 181, the coil back surface 182, and the pair of coil side surfaces 183 each contact the element insulating layer 150.
[0298] The conductor 180 includes a back-side barrier layer 184, a metal layer 185 formed on the back-side barrier layer 184, and a front-side barrier layer 186 formed on the metal layer 185. The back-side barrier layer 184 constitutes a coil back surface 182 of the conductor 180. The back-side barrier layer 184 can be said to be a thin film interposed between the back surface of the metal layer 185 and the element insulating layer 150 in the Z direction.
[0299] The front-side barrier layer 186 constitutes the coil surface 181 of the conductor 180. The front-side barrier layer 186 can be said to be a thin film interposed between the surface of the metal layer 185 and the element insulating layer 150 in the Z direction.
[0300] The metal layer 185 has a thickness greater than that of the back-side barrier layer 184 and the front-side barrier layer 186. A pair of side surfaces of the metal layer 185 are not covered by either the back-side barrier layer 184 or the front-side barrier layer 186 and are in contact with the element insulating layer 150. The pair of side surfaces of the metal layer 185 constitute part of the pair of coil side surfaces 183 in the Z direction.
[0301] The metal layer 185 is formed of a material containing, for example, aluminum. Both the back-side barrier layer 184 and the front-side barrier layer 186 may contain titanium or titanium nitride. In this way, the material constituting the first back-side coil 111B is different from the material constituting the first front-side coil 111A.
[0302] The materials constituting the first front-side coil 111A and the first back-side coil 111B can be changed as desired. For example, the materials constituting the first front-side coil 111A and the first back-side coil 111B may be the same.
[0303] As shown in FIG. 20 , the thickness of the conductor 180 of the first back-side coil 111B is thinner than the thickness of the protective film 162. The thickness of the conductor 180 is thinner than the thickness of the conductor 170. In one example, the thickness of the conductor 180 is half or less of the thickness of the conductor 170. In one example, the thickness of the conductor 180 is about one-third of the thickness of the conductor 170. The thickness of the conductor 180 is thinner than the thickness of the passivation film 161. The thickness of the conductor 180 is half or more of the thickness of the passivation film 161. Here, the thickness of the conductor 180 can be defined by the distance in the Z direction between the coil front surface 181 and the coil back surface 182.
[0304] The width of the conductor 180 (the length in the X direction in FIG. 20 ) is longer than the thickness of the conductor 180. In one example, the width of the conductor 180 is at least twice the thickness of the conductor 180. In one example, the width of the conductor 180 is at least five times the thickness of the conductor 180. In one example, the width of the conductor 180 is at least ten times the thickness of the conductor 180. In one example, the width of the conductor 180 is at least twelve times the thickness of the conductor 180. In one example, the width of the conductor 180 is at least fifteen times the thickness of the conductor 180. In one example, the width of the conductor 180 is at least sixteen times the thickness of the conductor 180. In one example, the width of the conductor 180 is approximately seventeen times the thickness of the conductor 180.
[0305] In one example, the width dimension of the conductor 180 is longer than the width dimension of the conductor 170. The width dimension of the conductor 180 is at least twice the width dimension of the conductor 170. The width dimension of the conductor 180 is no more than three times the width dimension of the conductor 170. In the example of FIG. 20 , the width dimension of the conductor 180 is approximately 15.8 μm. The width dimension of the conductor 170 can be defined as the size in a direction perpendicular to the direction in which the conductor 170 extends in a planar view. The width dimension of the conductor 180 can be defined as the size in a direction perpendicular to the direction in which the conductor 180 extends in a planar view.
[0306] In the coil layers 111BA and 111BB, an element insulating layer 150 is interposed between adjacent conductors 180 in the X direction. That is, in the coil layers 111BA and 111BB, the conductors 180 are spaced apart in the X direction. The distance between adjacent conductors 180 in the X direction (hereinafter referred to as the "inter-conductor distance") is the same from the coil front surface 181 to the coil back surface 182. The inter-conductor distance is smaller than the width of the conductors 180. For example, the inter-conductor distance is ½ or less of the width of the conductors 180. For example, the inter-conductor distance is ⅕ or less of the width of the conductors 180. For example, the inter-conductor distance is 1 / 10 or less of the width of the conductors 180. For example, the inter-conductor distance is 1 / 15 or less of the width of the conductors 180. For example, the inter-conductor distance is 1 / 16 or less of the width of the conductors 180. In one example, the inter-wire distance is 1 / 17 or less of the width dimension of the conductor 180. In one example, the inter-wire distance is 1 / 18 or less of the width dimension of the conductor 180. In one example, the inter-wire distance is 1 / 19 or less of the width dimension of the conductor 180. In one example, the inter-wire distance is 1 / 20 or more of the width dimension of the conductor 180. The inter-wire distance is smaller than the thickness of the conductor 180. On the other hand, the inter-wire distance is 1 / 2 or more of the thickness of the conductor 180. The inter-wire distance of the coil layers 111BA, 111BB is smaller than the inter-wire distance of the first surface-side coil 111A. In the example of FIG. 20 , the inter-wire distance is approximately 0.8 μm.
[0307] The distance in the Z direction between the first front surface side coil 111A and the first back surface side coil 111B is greater than the distance in the Z direction between the layer back surface 152 of the element insulating layer 150 and the first back surface side coil 111B. In one example, the distance in the Z direction between the first front surface side coil 111A and the first back surface side coil 111B is smaller than the width dimension of the conductive wire 180. The distance in the Z direction between the first front surface side coil 111A and the first back surface side coil 111B is, for example, approximately 12.8 μm. Here, the distance in the Z direction between the first front surface side coil 111A and the first back surface side coil 111B can be defined by the distance in the Z direction between the coil back surface 172 of the conductive wire 170 and the coil front surface 181 of the conductive wire 180 of the coil layer 111BA. The distance in the Z direction between the first front side coil 111A and the first back side coil 111B is set according to the desired dielectric strength and the electric field strength of each of the first front side coil 111A and the first back side coil 111B.
[0308] In the first embodiment, the conductor 170 of the first surface side coil 111A is formed so that the coil front surface 171 thereof is exposed from the element insulating layer 150 in the Z direction, but this is not limited to this. The conductor 170 of the first surface side coil 111A may be embedded in the element insulating layer 150. In other words, the coil front surface 171 of the conductor 170 may be in contact with the element insulating layer 150. In other words, the conductor 170 may be disposed closer to the layer rear surface 152 than the layer front surface 151 of the element insulating layer 150.
[0309] 23 and 24, an example of the wiring structure of the circuit region 120 will be described. The circuit region 120 includes a wiring layer 121 shown in FIG. 17 and a substrate-side wiring layer 122 disposed closer to the substrate 130 than the wiring layer 121.
[0310] In one example, the wiring layer 121 is formed at the same position in the Z direction as the first surface side coil 111A of the first transformer 111. That is, the surface of the wiring layer 121 is exposed from the layer surface 151 of the element insulating layer 150 and is covered with the passivation film 161. In the example shown in Fig. 23, the thickness of the wiring layer 121 is 2.8 µm.
[0311] The substrate-side wiring layer 122 is embedded in the element insulating layer 150. In one example, the substrate-side wiring layer 122 includes a first wiring layer 122A, a second wiring layer 122B, and a third wiring layer 122C. The first wiring layer 122A is arranged closer to the substrate 130 in the Z direction than the second wiring layer 122B and the third wiring layer 122C. The first wiring layer 122A is arranged spaced apart in the Z direction from the layer rear surface 152 of the element insulating layer 150. In other words, the first wiring layer 122A is arranged spaced apart from the substrate 130 in the Z direction. The element insulating layer 150 is interposed between the first wiring layer 122A and the substrate 130 in the Z direction.
[0312] The circuit region 120 includes a first via 123 that connects the wiring layer 121 and the substrate-side wiring layer 122. In the example shown in Fig. 23, the first via 123 connects the wiring layer 121 and the first wiring layer 122A. The first via 123 is formed of, for example, the same material as the wiring layer 121.
[0313] 24, first via 123 includes barrier layer 123A and metal layer 123B, similar to, for example, conductive wire 170. The materials constituting barrier layer 123A and metal layer 123B are the same as, for example, barrier layer 174 and metal layer 175 of conductive wire 170 (both see FIG. 21).
[0314] 23, the circuit region 120 includes a second via 124 connecting the first wiring layer 122A and the substrate 130, a third via 125 connecting the first wiring layer 122A and the second wiring layer 122B, and a fourth via 126 connecting the second wiring layer 122B and the third wiring layer 122C. As a result, in the example shown in Fig. 23, the substrate-side wiring layer 122 is electrically connected to the substrate 130. The first to fourth vias 123 to 126 are formed of a material containing, for example, tungsten.
[0315] As shown in FIG. 24 , the first wiring layer 122A, the second wiring layer 122B, and the third wiring layer 122C have different thicknesses. The thickness of the first wiring layer 122A is thinner than both the thickness of the second wiring layer 122B and the thickness of the third wiring layer 122C. The thickness of the second wiring layer 122B is the same as the thickness of the third wiring layer 122C. In other words, the thicknesses of the first to third wiring layers 122A to 122C are thinner in the Z direction near the substrate 130. In other words, the thicknesses of the first to third wiring layers 122A to 122C are thicker as they move away from the substrate 130 in the Z direction. In one example, the thicknesses of the second wiring layer 122B and the third wiring layer 122C are less than twice the thickness of the first wiring layer 122A. 24, the thickness of the first wiring layer 122A is, for example, 0.52 μm, and the thicknesses of the second wiring layer 122B and the third wiring layer 122C are, for example, 0.93 μm. In addition, in one example, the second wiring layer 122B is formed at the same position in the Z direction as the coil layer 111BB of the first back-side coil 111B, and the third wiring layer 122C is formed at the same position in the Z direction as the coil layer 111BA.
[0316] [Detailed Configuration of Second Chip] The detailed configuration of the second chip 70 will be described with reference to Fig. 25 and Fig. 26. Fig. 25 shows a schematic planar structure of an example of the internal configuration of the second chip 70 near the chip front surface 71. Fig. 26 shows a schematic planar structure of an example of the internal structure of the second chip 70 near the chip back surface (not shown).
[0317] 25 , the second chip 70 has an insulating transformer region 210, a circuit region 220, and a peripheral guard ring 200 that surrounds the insulating transformer region 210 and the circuit region 220. In one example, the circuit region 220 can be defined as the region surrounded by the peripheral guard ring 200 in a plan view, other than the insulating transformer region 210.
[0318] The insulation transformer region 210 electrically insulates the multiple second function units of the circuit region 220 from the first chip 60 while allowing signal transmission between the multiple second function units of the circuit region 220 and the first chip 60. The insulation transformer region 210 is formed closer to the second chip side surface 74 with respect to the center of the second chip 70 in the X direction in a planar view. That is, the distance between the insulation transformer region 210 and the second chip side surface 74 in the X direction is smaller than the distance between the insulation transformer region 210 and the first chip side surface 73 in the X direction. Furthermore, the insulation transformer region 210 is formed closer to the third chip side surface 75 with respect to the center of the second chip 70 in the Y direction in a planar view. That is, the distance between the insulation transformer region 210 and the third chip side surface 75 in the Y direction is smaller than the distance between the insulation transformer region 210 and the fourth chip side surface 76 in the Y direction. Thus, the insulation transformer region 210 is formed in a region of the second chip 70 closer to the first chip 60 in a planar view.
[0319] A first transformer 211 is formed in the insulating transformer region 210. In other words, one transformer is formed in the insulating transformer region 210. Furthermore, first electrode pads 77A to 77C are formed in the insulating transformer region 210. In other words, three first electrode pads 77 are formed in the insulating transformer region 210. The first electrode pads 77A to 77C are arranged at the same positions as each other in the Y direction and spaced apart from each other in the X direction.
[0320] The circuit region 220 includes the components of the second circuit 520 in Fig. 16 other than the first transformer 211. These components include the receiving unit 521, transmitting unit 522, logic unit 523, UVLO unit 524, clamp control unit 525, output control unit 526, desaturation fault detection unit 527, switching element 528, first output switching element 529, second output switching element 530, third output switching element 531, resistors 532, 534, and 539, current sources 533 and 537, switching elements 535 and 538, and comparator 536. In the following description, the components of the second circuit 520 other than the first transformer 211 may be referred to as "plurality of second function units" and "plurality of circuit elements."
[0321] A first transformer 211 is formed in the insulating transformer region 210. As shown in Figures 25 and 26, the first transformer 211 includes a first front surface side coil 211A, a first back surface side coil 211B, a second front surface side coil 212A, and a second back surface side coil 212B.
[0322] 25 , the first surface side coil 211A and the second surface side coil 212A are arranged at the same position in the X direction and spaced apart from each other in the Y direction. The first surface side coil 211A is arranged closer to the fourth chip side surface 76 than the second surface side coil 212A.
[0323] 26 , the first back-side coil 211B and the second back-side coil 212B are arranged at the same position in the X direction and spaced apart from each other in the Y direction. The first back-side coil 211B is arranged closer to the fourth chip side surface 76 than the second back-side coil 212B.
[0324] Although not shown, the first front surface side coil 211A and the second front surface side coil 212A are arranged at the same position in the Z direction. The first back surface side coil 211B and the second back surface side coil 212B are arranged at the same position in the Z direction.
[0325] The first front-side coil 211A, the second front-side coil 212A, the first back-side coil 211B, and the second back-side coil 212B may each contain at least one of titanium, titanium nitride, copper, aluminum, and tungsten. In one example, the first front-side coil 211A and the second front-side coil 212A contain copper, and the first back-side coil 211B and the second back-side coil 212B contain aluminum. In another example, the first front-side coil 211A and the second front-side coil 212A have a layered structure of titanium and copper, and the first back-side coil 211B and the second back-side coil 212B have a layered structure of titanium nitride and aluminum.
[0326] 25, a plurality of first electrode pads 77A to 77C are formed in the insulating transformer region 210. The plurality of first electrode pads 77A to 77C are arranged at the same position in the X direction and spaced apart from one another in the Y direction. A plurality of first electrode pads 77D to 77F are formed in the circuit region 220. The plurality of first electrode pads 77D to 77F are arranged at the same position in the X direction and spaced apart from one another in the Y direction. The first electrode pads 77D to 77F are arranged closer to the second chip side surface 74 than the first electrode pads 77A to 77C.
[0327] The first surface-side coil 211A includes a first coil portion 211A1 that is spiral in plan view, a first outer coil end portion 211A2, and a first inner coil end portion 211A3. The first outer coil end portion 211A2 constitutes the end portion of the outermost periphery of the first coil portion 211A1 in the winding direction, and the first inner coil end portion 211A3 constitutes the end portion of the innermost periphery of the first coil portion 211A1 in the winding direction.
[0328] The second surface-side coil 212A includes a second coil portion 212A1 that is spiral in plan view, a second outer coil end portion 212A2, and a second inner coil end portion 212A3. The second outer coil end portion 212A2 constitutes the end portion of the second coil portion 212A1 in the winding direction at the outermost periphery, and the second inner coil end portion 212A3 constitutes the end portion of the second coil portion 212A1 in the winding direction at the innermost periphery.
[0329] The first electrode pad 77A is disposed in an inner space including the winding center of the first coil portion 211A1 in a plan view. The first electrode pad 77A can be said to be located more inward than the first coil portion 211A1. The first electrode pad 77A is connected to the first inner coil end portion 211A3. Therefore, the first electrode pad 77A can be said to be electrically connected to the first end portion of the first surface side coil 211A.
[0330] The first electrode pad 77B is disposed between the first surface side coil 211A and the second surface side coil 212A in the Y direction in a plan view. The first electrode pad 77B is connected to the first outer coil end 211A2 of the first surface side coil 211A. The first electrode pad 77B is also connected to the second outer coil end 212A2 of the second surface side coil 212A. Therefore, it can be said that the first electrode pad 77B is electrically connected to the second end of the first surface side coil 211A and the second end of the second surface side coil 212A.
[0331] The first electrode pad 77C is disposed in an inner space including the winding center of the second coil portion 212A1 in a plan view. The first electrode pad 77C can be said to be located more inward than the second coil portion 212A1. The first electrode pad 77C is connected to the second inner coil end portion 212A3. Therefore, the first electrode pad 77C can be said to be electrically connected to the first end portion of the second surface side coil 212A.
[0332] 25 , the number of turns of the first surface side coil 211A and the number of turns of the second surface side coil 212A are equal to each other, and the winding directions of the first surface side coil 211A and the second surface side coil 212A are opposite to each other in a plan view.
[0333] As shown in FIG. 26 , the first back-side coil 211B is disposed opposite the first front-side coil 211A (see FIG. 25 ) in the Z direction. The first back-side coil 211B includes a first coil portion 211B1 having a spiral shape in a plan view, a first outer coil end portion 211B2, and a first inner coil end portion 211B3. The first outer coil end portion 211B2 constitutes the end portion of the outermost periphery of the first coil portion 211B1 in the winding direction, and the first inner coil end portion 211B3 constitutes the end portion of the innermost periphery of the first coil portion 211B1 in the winding direction. The first outer coil end portion 211B2 is connected to a third connection wiring (not shown) extending in the X direction. The third connection wiring is electrically connected to the transmitter 522 (see FIG. 16 ) of the circuit region 220 (see FIG. 25 ). The first inner coil end portion 211B3 is connected to a first wiring (not shown). The first wiring is electrically connected to the transmitting section 522 of the circuit region 220 .
[0334] The second back-surface-side coil 212B is disposed opposite the second front-surface-side coil 212A (see FIG. 25 ) in the Z direction. The second back-surface-side coil 212B includes a second coil portion 212B1 having a spiral shape in a plan view, a second outer coil end portion 212B2, and a second inner coil end portion 212B3. The second outer coil end portion 212B2 constitutes the end portion of the outermost periphery of the second coil portion 212B1 in the winding direction, and the second inner coil end portion 212B3 constitutes the end portion of the innermost periphery of the second coil portion 212B1 in the winding direction. The second outer coil end portion 212B2 is connected to a fourth connection wiring (not shown) extending in the X direction. The fourth connection wiring is electrically connected to the transmitter 522 of the circuit area 220. The second inner coil end portion 212B3 is connected to a second wiring (not shown). The second wiring is electrically connected to the transmitter 522 of the circuit area 220.
[0335] Here, the number of turns of the first back-side coil 211B and the second back-side coil 212B are equal to each other. In a plan view, the winding direction of the first back-side coil 211B and the winding direction of the second back-side coil 212B are opposite to each other. In one example, the number of turns of the first back-side coil 211B and the second back-side coil 212B is equal to the number of turns of the first front-side coil 211A and the second front-side coil 212A.
[0336] 25, a surface-side guard ring 215 that surrounds the first surface-side coil 211A, the second surface-side coil 212A, and the first electrode pads 77A to 77C in a plan view is formed in the insulating transformer region 210. The surface-side guard ring 215 has a track shape in a plan view.
[0337] 26 , a back-side guard ring 216 is formed in the insulating transformer region 210 to surround the first back-side coil 211B and the second back-side coil 212B in a plan view. The back-side guard ring 216 has a track-like shape in a plan view. The back-side guard ring 216 has the same shape and size as the front-side guard ring 215. In a plan view, the back-side guard ring 216 is formed at a position overlapping the front-side guard ring 215.
[0338] A plurality of vias 217 are formed in the insulating transformer region 210 to connect the front-side guard ring 215 and the back-side guard ring 216. The vias 217 are arranged at positions that overlap both the front-side guard ring 215 and the back-side guard ring 216 in a plan view.
[0339] 25 , the circuit region 220 is provided with a plurality of second electrode pads 78, a plurality of third electrode pads 79, and a plurality of wiring layers (not shown). The plurality of wiring layers includes a wiring layer that electrically connects the plurality of second functional units and a wiring layer that electrically connects the plurality of second functional units to the second transformer 112 in the isolation transformer region 210. The plurality of second functional units are formed in positions in the circuit region 220 closer to the chip back surface in the Z direction than the plurality of wiring layers. In one example, although not shown in FIG. 26 , the plurality of second functional units are formed in the same positions in the Z direction as the first back surface side coil 211B and the second back surface side coil 212B. Note that the positions in the Z direction at which the plurality of second functional units are formed can be changed as desired.
[0340] 25 and 26 , the outer periphery guard ring 200 includes a front-side outer periphery guard ring 201 and a back-side outer periphery guard ring 202. As shown in Fig. 25 , the front-side outer periphery guard ring 201 is connected to a front-side guard ring 215. More specifically, the front-side outer periphery guard ring 201 is connected to a linear portion of the front-side guard ring 215 that is closer to the second chip side surface 74. This electrically connects the front-side outer periphery guard ring 201 to the front-side guard ring 215.
[0341] 26 , the rear surface-side outer peripheral guard ring 202 is connected to the rear surface-side guard ring 216. More specifically, the rear surface-side outer peripheral guard ring 202 is connected to a straight portion of the rear surface-side guard ring 216 that is closer to the second chip side surface 74. This electrically connects the rear surface-side outer peripheral guard ring 202 to the rear surface-side guard ring 216. The shape and size of the rear surface-side outer peripheral guard ring 202 in a plan view are the same as those of the front surface-side outer peripheral guard ring 201. The rear surface-side outer peripheral guard ring 202 is positioned so as to overlap the front surface-side outer peripheral guard ring 201 in a plan view.
[0342] Although not shown, the second chip 70 has a plurality of peripheral vias that connect the front-side peripheral guard ring 201 and the back-side peripheral guard ring 202. The front-side peripheral guard ring 201 and the back-side peripheral guard ring 202 are electrically connected by the plurality of peripheral vias. Each peripheral via extends in the Z direction.
[0343] [Effects] The signal transmission device 10 of the first embodiment provides the following effects. (1-1) The signal transmission device 10 includes inter-chip wires WA that electrically connect the first chip 60 and the second chip 70, and first lead wires WB that individually connect the first chip 60 and the first lead terminals 11. The inter-chip wires WA are made of a material containing gold. The first lead wires WB are made of a material containing copper or aluminum.
[0344] The inter-chip wires WA are relatively important from the viewpoint of the insulation reliability of the signal transmission device 10, and the height and shape of the wires must be inspected with high precision. In this regard, in the first embodiment, the inter-chip wires WA are formed from a material containing gold, and therefore, when the height of the inter-chip wires WA is inspected using, for example, X-ray inspection, the inter-chip wires WA are displayed more clearly than when the inter-chip wires WA are formed from a material containing copper or aluminum. Therefore, the height of the inter-chip wires WA can be inspected accurately. Furthermore, the shape of the inter-chip wires WA can also be inspected accurately.
[0345] On the other hand, the first lead wires WB are less important than the inter-chip wires WA in terms of the insulation reliability of the signal transmission device 10. In this regard, in the first embodiment, the first lead wires WB are formed from a material containing copper or aluminum, which allows for cost reduction compared to when the first lead wires WB are formed from a material containing gold. In this way, it is possible to achieve both improved quality and cost reduction for the signal transmission device 10.
[0346] (1-2) The first lead wire WB is configured such that the surface of the copper wire is coated with palladium. With this configuration, the palladium coated on the surface of the copper wire can increase the bonding area of the bonding portion between the first lead wire WB, which serves as the second bond portion of the first lead wire WB, and the first lead terminals 11 to 18. This increases the bonding strength between the first lead wire WB and the first lead terminals 11 to 18, thereby suppressing the occurrence of cracks at the bonding portions between the first lead wire WB and the first lead terminals 11 to 18.
[0347] (1-3) The signal transmission device 10 further includes a plurality of second lead wires WD that individually connect the second chip 70 to the second lead terminals 42 to 47. The second lead wires WD are formed of a material containing copper or aluminum.
[0348] According to this configuration, the second lead wire WD, which is less important than the inter-chip wire WA from the standpoint of insulation reliability of the signal transmission device 10, is formed from a material containing copper or aluminum, thereby enabling cost reduction compared to when the second lead wire WD is formed from a material containing gold.
[0349] (1-4) The second lead wire WD is a copper wire whose surface is coated with palladium. This configuration provides the same effect as that of (1-2) above.
[0350] (1-5) The signal transmission device 10 further includes a first die pad wire WC that connects the first chip 60 and the first die pad 30. The first die pad wire WC is made of a material containing copper or aluminum. This configuration provides the same effect as the effect described in (1-3) above.
[0351] (1-6) The first die pad wire WC is a copper wire whose surface is coated with palladium. This configuration provides the same effect as that of (1-2) above.
[0352] (1-7) A security bond WC1 is formed at the bonding portion between the first die pad wire WC, which is the second bond portion of the first die pad wire WC, and the first die pad 30.
[0353] According to this configuration, the security bond WC1 can thicken the second bond portion of the first die pad wire WC, thereby suppressing the occurrence of cracks in the second bond portion of the first die pad wire WC.
[0354] (1-8) The signal transmission device 10 further includes a second die pad wire WE that connects the second chip 70 and the second die pad 50. The second die pad wire WE is made of a material containing copper or aluminum. This configuration provides the same effect as the effect described in (1-3) above.
[0355] (1-9) A security bond WE1 is formed at the joint between the second die pad wire WE, which is the second bond portion of the second die pad wire WE, and the second die pad 50. This configuration provides the same effect as in (1-7) above.
[0356] (1-10) Each of the first electrode pads 67, second electrode pads 68, and third electrode pads 69 of the first chip 60 has a thickness of 2 μm or more. With this configuration, even if an inter-chip wire WA is bonded to each of the first electrode pads 67, it is possible to prevent cracks from occurring in the element insulating layer 150 directly below each of the first electrode pads 67. Even if a first lead wire WB is bonded to each of the second electrode pads 68, it is possible to similarly prevent cracks from occurring in the element insulating layer 150. Even if a first die pad wire WC is bonded to each of the third electrode pads 69, it is possible to similarly prevent cracks from occurring in the element insulating layer 150.
[0357] (1-11) The sealing resin 90 contains sulfur as an additive. The concentration of sulfur added is 300 μg / g or less. This configuration can reduce sulfide corrosion of copper wires whose surfaces are coated with palladium, such as the first lead wire WB, the second lead wire WD, the first die pad wire WC, and the second die pad wire WE.
[0358] (1-12) A plating layer 29 is formed on the inner lead surface 21B of the wire connection portion 12AA of the first inner lead portion 12A of the first lead terminal 12. The plating layer 29 is not formed on the end of the inner lead surface 21B of the wire connection portion 12AA on the tip surface 24B side, and the end is in contact with the sealing resin 90.
[0359] This configuration can prevent peeling of the plating layer 29 at the end of the inner lead surface 21B of the wire connection portion 12AA near the tip surface 24B from the sealing resin 90. Note that the wire connection portions 13AA to 17AA of the first lead terminals 13 to 17 have a similar configuration, and therefore the same effect can be obtained.
[0360] (1-13) A plating layer 29 is formed on the inner lead surface 21B of the wire connection portion 42AA of the second inner lead portion 42A of the second lead terminal 42. The plating layer 29 is not formed on the end of the inner lead surface 21B of the wire connection portion 42AA on the tip surface 24B side, and the end is in contact with the sealing resin 90.
[0361] This configuration can prevent peeling of the plating layer 29 at the end of the wire connection portion 42AA on the inner lead surface 21B near the tip surface 24B from occurring between the sealing resin 90. Note that the wire connection portions 43AA to 47AA of the second lead terminals 43 to 47 have a similar configuration, and therefore the same effect can be obtained.
[0362] (1-14) A plating layer 26 is formed on the outer lead surface 21A, outer lead back surface 22A, and outer lead side surface 23A of the outer lead body 20A of the first outer lead portions 11B to 18B. The plating layer 26 is formed continuously from the outer lead back surface 22A to the outer lead surface 21A on the outer lead end surface 24A. The plating layer 26 is spaced apart from the outer lead surface 21A.
[0363] With this configuration, when the signal transmission device 10 is mounted on the circuit board PCB using the conductive bonding material SD, the conductive bonding material SD comes into contact with the plating layer 26 formed on the outer lead end surface 24A. This causes the conductive bonding material SD in contact with the outer lead end surface 24A to form a fillet. This makes it easy to check the state in which the signal transmission device 10 is mounted on the circuit board PCB.
[0364] (1-15) The outer surface of the sealing resin 90 is formed so that the surface roughness Rz is 8 μm or more. This configuration increases the creepage distance through the sealing resin 90 between the first lead terminals 11 to 18 and the second lead terminals 41 to 48. This improves the dielectric strength between the first lead terminals 11 to 18 and the second lead terminals 41 to 48.
[0365] (1-16) The inter-chip wires WA1 to WA3 connecting the first chip 60 and the second chip 70 are parallel to one another in a plan view. With this configuration, when inspecting the wire heights of the inter-chip wires WA1 to WA3, variations in the wire heights of the inter-chip wires WA1 to WA3 are less likely to occur. Therefore, the wire heights of the inter-chip wires WA1 to WA3 can be inspected with high precision.
[0366] Furthermore, the inter-chip wires WA4 to WA6 connecting the first chip 60 and the second chip 70 are parallel to one another in a plan view. With this configuration, when inspecting the wire heights of the inter-chip wires WA4 to WA6, variations in the wire heights of the inter-chip wires WA4 to WA6 are less likely to occur. Therefore, the wire heights of the inter-chip wires WA4 to WA6 can be inspected with high precision.
[0367] (1-17) A plurality of recesses 39 are formed in the first die pad 30. With this configuration, the first conductive bonding material SD1 fills the recesses 39, thereby improving the adhesion between the first die pad 30 and the first conductive bonding material SD1. Furthermore, the sealing resin 90 fills the recesses 39 that are not filled with the first conductive bonding material SD1. This improves the adhesion between the first die pad 30 and the sealing resin 90.
[0368] (1-18) A plurality of recesses 59 are formed in the second die pad 50. According to this configuration, the second conductive bonding material SD2 enters the recesses 59, thereby improving the adhesion between the second die pad 50 and the second conductive bonding material SD2.
[0369] 27 and 28, a signal transmission device 10 according to a second embodiment will be described. The signal transmission device 10 according to the second embodiment differs from the signal transmission device 10 according to the first embodiment in the configuration of the first frame 10A and the second frame 10B. In the following description, the configuration that differs from the first embodiment will be described in detail, and the same reference numerals will be used to denote the same components as those in the first embodiment, and the description thereof will be omitted.
[0370] The first frame 10A of the second embodiment differs from the first embodiment in the configuration of the first lead terminals 12 to 17 among the first lead terminals 11 to 18. More specifically, as shown in FIG. 27 , the first inner lead portions 12A to 17A of the first lead terminals 12 to 17 have through holes 12AD to 17AD that penetrate the first inner lead portions 12A to 17A in their thickness direction (Z direction). The first inner lead portions 12A and 17A also have through holes 12AE and 17AE that are separate from the through holes 12AD and 17AD. That is, the first inner lead portions 12A and 17A have two through holes. In one example, the through holes 12AD to 17AD, 12AE, and 17AE are circular in plan view. In the second embodiment, the through holes 12AD to 17AD, 12AE, and 17AE have the same diameter. The shape and size of each of the through holes 12AD to 17AD, 12AE, and 17AE in plan view can be changed arbitrarily.
[0371] The through holes 12AD to 17AD, 12AE, and 17AE are filled with sealing resin 90. In other words, the sealing resin 90 filled in the through holes 12AD to 17AD, 12AE, and 17AE connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 2) than the first inner lead portions 12A to 17A with the sealing resin 90 provided closer to the sealing back surface 92 (see FIG. 2) than the first inner lead portions 12A to 17A.
[0372] Here, the first lead terminals 11 and 18 are integrated with the first die pad 30 and therefore correspond to "first connection terminals." The first lead terminals 12 to 17 are arranged spaced apart from the first die pad 30 and therefore correspond to "first remote terminals." Because the through holes 12AD to 17AD are formed in the first lead terminals 12 to 17, it can be said that the first remote terminals have through holes that penetrate through the first remote terminals in the thickness direction. On the other hand, the first connection terminals do not have through holes.
[0373] 27, the through hole 12AD is formed in the wide portion 12AB2 of the lead connection portion 12AB. More specifically, the through hole 12AD is formed in a portion of the wide portion 12AB2 closer to the narrow portion 12AB1 than the inclined surface 12AC. The through hole 12AE is formed in the wire connection portion 12AA. More specifically, the through hole 12AE is formed in a portion of the wire connection portion 12AA closer to the lead connection portion 12AB.
[0374] The first lead wire WB corresponding to the wire connection portion 12AA is bonded to a portion of the wire connection portion 12AA that is closer to the first chip 60 than the through hole 12AD. The second bond portion of the first lead wire WB is disposed spaced apart from the through hole 12AD in the Y direction in plan view. This second bond portion can also be said to be formed in a portion that is closer to the tip surface of the wire connection portion 12AA than the through hole 12AD in plan view.
[0375] The through hole 13AD is formed in a portion of the wire connection portion 13AA of the first inner lead portion 13A that is closer to the lead connection portion 13AB. The first lead wire WB corresponding to the wire connection portion 13AA is bonded to a portion of the wire connection portion 13AA that is closer to the first chip 60 than the through hole 13AD. The second bond portion of the first lead wire WB is arranged spaced apart from the through hole 13AD in the X direction in a plan view.
[0376] The through hole 14AD is formed in a portion of the wire connection portion 14AA of the first inner lead portion 14A that is closer to the lead connection portion 14AB. The first lead wire WB corresponding to the wire connection portion 14AA is bonded to a portion of the wire connection portion 14AA that is closer to the first chip 60 than the through hole 14AD. The second bond portion of the first lead wire WB is arranged spaced apart from the through hole 14AD in the X direction in a plan view.
[0377] The through hole 15AD is formed in a portion of the wire connection portion 15AA of the first inner lead portion 15A that is closer to the lead connection portion 15AB. The first lead wire WB corresponding to the wire connection portion 15AA is bonded to a portion of the wire connection portion 15AA that is closer to the first chip 60 than the through hole 15AD. The second bond portion of the first lead wire WB is disposed spaced apart from the through hole 15AD in the X direction in a plan view.
[0378] The through hole 16AD is formed in a portion of the wire connection portion 16AA of the first inner lead portion 16A that is closer to the lead connection portion 16AB. The first lead wire WB corresponding to the wire connection portion 16AA is bonded to a portion of the wire connection portion 16AA that is closer to the first chip 60 than the through hole 16AD. The second bond portion of the first lead wire WB is arranged spaced apart from the through hole 16AD in the X direction in a plan view.
[0379] 27 , through hole 17AD is formed in wide portion 17AB2 of lead connection portion 17AB. More specifically, through hole 17AD is formed in a portion of wide portion 17AB2 closer to narrow portion 17AB1 than inclined surface 17AC. Through hole 17AE is formed in wire connection portion 17AA. More specifically, through hole 17AE is formed in a portion of wire connection portion 17AA closer to lead connection portion 17AB.
[0380] The first lead wire WB corresponding to the wire connection portion 17AA is bonded to a portion of the wire connection portion 17AA that is closer to the first chip 60 than the through hole 17AD. The second bond portion of the first lead wire WB is disposed spaced apart from the through hole 17AD in the Y direction in plan view. This second bond portion can also be said to be formed in a portion that is closer to the tip surface of the wire connection portion 17AA than the through hole 17AD in plan view.
[0381] The positions of the through holes 12AD-17AD, 12AE, and 17AE can be changed as desired. For example, the through holes 12AD-17AD may be formed in the lead connection portions 12AB-17AB. The through holes 12AD-17AD may also be formed across the wire connection portions 12AA-17AA and the lead connection portions 12AB-17AB. The through holes 12AE and 17AE may also be formed in portions of the wide portions 12AB2 and 17AB2 closer to the wire connection portions 12AA and 17AA. One of the through holes 12AD and 12AE may also be omitted from the first inner lead portion 12A. One of the through holes 17AD and 17AE may also be omitted from the first inner lead portion 17A.
[0382] As shown in FIG. 28 , the second frame 10B of the second embodiment differs from the first embodiment in the configuration of the second lead terminals 42 to 47 among the second lead terminals 41 to 48. More specifically, through holes 42AD to 47AD are formed in the second inner lead portions 42A to 47A of the second lead terminals 42 to 47, penetrating the second inner lead portions 42A to 47A in their thickness direction (Z direction). Furthermore, through holes 42AE and 47AE are formed in the second inner lead portions 42A and 47A in addition to the through holes 42AD and 47AD. In other words, the second inner lead portions 42A and 47A have two through holes. In one example, the through holes 42AD to 47AD, 42AE, and 47AE are circular in plan view. In the second embodiment, the through holes 42AD to 47AD, 42AE, and 47AE have the same diameter. The diameters of the through holes 42AD to 47AD, 42AE, and 47AE are equal to the diameters of the through holes 12AD to 17AD, 12AE, and 17AE. The shapes and sizes of the through holes 42AD to 47AD, 42AE, and 47AE in plan view can be changed as desired.
[0383] The through holes 42AD to 47AD, 42AE, and 47AE are filled with sealing resin 90. In other words, the sealing resin 90 filled in the through holes 42AD to 47AD, 42AE, and 47AE connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 2) than the second inner lead portions 42A to 47A with the sealing resin 90 provided closer to the sealing back surface 92 (see FIG. 2) than the second inner lead portions 42A to 47A.
[0384] Here, the second lead terminals 41, 48 are integrated with the second die pad 50 and therefore correspond to "second connection terminals." The second lead terminals 42 to 47 are disposed apart from the second die pad 50 and therefore correspond to "second remote terminals." Because the through holes 42AD to 47AD are formed in the second lead terminals 42 to 47, it can be said that the second remote terminals have through holes that penetrate through the second remote terminals in the thickness direction. On the other hand, the second connection terminals do not have through holes.
[0385] 28 , the through hole 42AD is formed in the wide portion 42AB2 of the lead connection portion 42AB. More specifically, the through hole 42AD is formed in a portion of the wide portion 42AB2 closer to the narrow portion 42AB1 than the inclined surface 42AC. The through hole 42AE is formed in the wire connection portion 42AA. More specifically, the through hole 42AE is formed in a portion of the wire connection portion 42AA closer to the lead connection portion 42AB.
[0386] The second lead wire WD corresponding to the wire connection portion 42AA is bonded to a portion of the wire connection portion 42AA that is closer to the second chip 70 than the through hole 42AD. The second bond portion of the second lead wire WD is disposed spaced apart from the through hole 42AD in the Y direction in plan view. This second bond portion can also be said to be formed in a portion that is closer to the tip surface of the wire connection portion 42AA than the through hole 42AD in plan view.
[0387] The through hole 43AD is formed in a portion of the wire connection portion 43AA of the second inner lead portion 43A that is closer to the lead connection portion 43AB. The second lead wire WD corresponding to the wire connection portion 43AA is bonded to a portion of the wire connection portion 43AA that is closer to the second chip 70 than the through hole 43AD. The second bond portion of the second lead wire WD is arranged spaced apart from the through hole 43AD in the X direction in a plan view.
[0388] The through hole 44AD is formed in a portion of the wire connection portion 44AA of the second inner lead portion 44A that is closer to the lead connection portion 44AB. The second lead wire WD corresponding to the wire connection portion 44AA is bonded to a portion of the wire connection portion 44AA that is closer to the second chip 70 than the through hole 44AD. The second bond portion of the second lead wire WD is arranged spaced apart from the through hole 44AD in the X direction in a plan view.
[0389] The through hole 45AD is formed in a portion of the wire connection portion 45AA of the second inner lead portion 45A that is closer to the lead connection portion 45AB. The second lead wire WD corresponding to the wire connection portion 45AA is bonded to a portion of the wire connection portion 45AA that is closer to the second chip 70 than the through hole 45AD. The second bond portion of the second lead wire WD is arranged spaced apart from the through hole 45AD in the X direction in a plan view.
[0390] The through hole 46AD is formed in a portion of the wire connection portion 46AA of the second inner lead portion 46A that is closer to the lead connection portion 46AB. The second lead wire WD corresponding to the wire connection portion 46AA is bonded to a portion of the wire connection portion 46AA that is closer to the second chip 70 than the through hole 46AD. The second bond portion of the second lead wire WD is disposed spaced apart from the through hole 46AD in the X direction in a plan view.
[0391] 28 , the through hole 47AD is formed in the wide portion 47AB2 of the lead connection portion 47AB. More specifically, the through hole 47AD is formed in a portion of the wide portion 47AB2 closer to the narrow portion 47AB1 than the inclined surface 47AC. The through hole 47AE is formed in the wire connection portion 47AA. More specifically, the through hole 47AE is formed in a portion of the wire connection portion 47AA closer to the lead connection portion 47AB.
[0392] The second lead wire WD corresponding to the wire connection portion 47AA is bonded to a portion of the wire connection portion 47AA that is closer to the second chip 70 than the through hole 47AD. The second bond portion of the second lead wire WD is disposed spaced apart from the through hole 47AD in the Y direction in plan view. This second bond portion can also be said to be formed in a portion that is closer to the tip surface of the wire connection portion 47AA than the through hole 47AD in plan view.
[0393] The positions of the through holes 42AD-47AD, 42AE, and 47AE can be changed as desired. For example, the through holes 42AD-47AD may be formed in the lead connection portions 42AB-47AB. The through holes 42AD-47AD may also be formed across the wire connection portions 42AA-47AA and the lead connection portions 42AB-47AB. The through holes 42AE and 47AE may also be formed in portions of the wide portions 42AB2 and 47AB2 closer to the wire connection portions 42AA and 47AA. One of the through holes 42AD and 42AE may also be omitted from the second inner lead portion 42A. One of the through holes 47AD and 47AE may also be omitted from the second inner lead portion 47A.
[0394] [Effects] The signal transmission device 10 of the second embodiment has the following effects: (2-1) The first lead terminals 12 to 17 have through holes 12AD to 17AD, 12AE, and 17AE. The through holes 12AD to 17AD, 12AE, and 17AE are filled with sealing resin 90.
[0395] According to this configuration, the sealing resin 90 filled in the through holes 12AD to 17AD, 12AE, and 17AE can prevent the first lead terminals 12 to 17 from moving when an external force is applied to the first lead terminals 12 to 17. Therefore, it is possible to prevent force from being applied to the first lead wires WB due to the movement of the first lead terminals 12 to 17.
[0396] (2-2) The second lead terminals 42 to 47 have through holes 42AD to 47AD, 42AE, and 47AE. The through holes 42AD to 47AD, 42AE, and 47AE are filled with a sealing resin 90.
[0397] According to this configuration, the sealing resin 90 filled in the through holes 42AD to 47AD, 42AE, and 47AE can prevent the second lead terminals 42 to 47 from moving when an external force is applied to the second lead terminals 42 to 47. Therefore, it is possible to prevent force from being applied to the second lead wires WD due to the movement of the second lead terminals 42 to 47.
[0398] 29 and 30 , a signal transmission device 10 according to a third embodiment will be described. The signal transmission device 10 according to the third embodiment differs from the signal transmission device 10 according to the second embodiment in the configuration of the first frame 10A and the second frame 10B and the configuration of the wires. In the following description, the configuration that differs from the second embodiment will be described in detail, and the same reference numerals will be used to denote the same components as those according to the second embodiment, and the description thereof will be omitted.
[0399] The first frame 10A of the third embodiment is different from the second embodiment in the configuration of the first lead terminals 13, 16 among the first lead terminals 11 to 18. More specifically, as shown in FIG. 29, the through holes 13AD, 16AD (see FIG. 27) are omitted from the first inner lead portions 13A, 16A of the first lead terminals 13, 16.
[0400] In other words, the first frame 10A includes two types of first lead terminals: first specific terminals (first lead terminals 12, 14, 15, 17 in the third embodiment) having through holes formed in the first inner lead portions 12A to 17A of the first lead terminals 12 to 17, and second specific terminals (first lead terminals 13, 16 in the third embodiment) having no through holes formed therein.
[0401] In the third embodiment, the configuration of the second bond portion of the first lead wire WB differs depending on the first specified terminal and the second specified terminal. More specifically, a security bond WB1 is formed on the second bond portion of the first lead wire WB connected to the wire connection portions 13AA, 16AA of the first inner lead portions 13A, 16A of the first lead terminals 13, 16 serving as the second specified terminals. On the other hand, no security bond WB1 is formed on the second bond portion of the first lead wire WB connected to the wire connection portions 13AA, 14AA, 15AA, 17AA of the first inner lead portions 13A, 14A, 15A, 17A of the first lead terminals 12, 14, 15, 17 serving as the first specified terminals. The configuration of the security bond WB1 is the same as the configuration of the security bond WC1 in the first embodiment shown in FIG. 15 .
[0402] That is, the plurality of first lead wires WB include first specified wires joined to first specified terminals (first lead terminals 12, 14, 15, and 17 in the third embodiment) and second specified wires joined to second specified terminals (first lead terminals 13 and 16 in the third embodiment). A security bond is formed at a joint (second bond portion) of the second specified wire joined to the second specified terminal.
[0403] The second frame 10B of the third embodiment is different from the second embodiment in the configuration of the second lead terminals 43, 46 among the second lead terminals 41 to 48. More specifically, as shown in FIG. 30 , the through holes 43AD, 46AD (see FIG. 28 ) are omitted from the second inner lead portions 43A, 46A of the second lead terminals 43, 46.
[0404] In other words, the second frame 10B includes two types of second lead terminals: third specific terminals (second lead terminals 42, 44, 45, 47 in the third embodiment) having through holes formed in the second inner lead portions 42A to 47A of the second lead terminals 42 to 47, and fourth specific terminals (second lead terminals 43, 46 in the third embodiment) having no through holes formed therein.
[0405] In the third embodiment, the configuration of the second bond portion of the second lead wire WD differs depending on the third and fourth specified terminals. More specifically, a security bond WD1 is formed in the second bond portion of the second lead wire WD connected to the wire connection portions 43AA, 46AA of the second inner lead portions 43A, 46A of the second lead terminals 43, 46 serving as the fourth specified terminals. On the other hand, no security bond WD1 is formed in the second bond portion of the second lead wire WD connected to the wire connection portions 43AA, 44AA, 45AA, 47AA of the second inner lead portions 43A, 44A, 45A, 47A of the second lead terminals 42, 44, 45, 47 serving as the third specified terminals. The configuration of the security bond WD1 is the same as the configuration of the security bond WC1 in the first embodiment shown in FIG. 15 .
[0406] That is, the plurality of second lead wires WD include a third specified wire joined to a third specified terminal (second lead terminals 42, 44, 45, 47 in the third embodiment) and a fourth specified wire joined to a fourth specified terminal (second lead terminals 43, 46 in the third embodiment). A security bond is formed at a bond portion (second bond portion) of the fourth specified wire joined to the fourth specified terminal.
[0407] [Effects] The signal transmission device 10 of the third embodiment has the following effects: (3-1) Of the first lead terminals 12 to 17, the first lead terminals 13 and 16 do not have through holes 13AD and 16AD. A security bond WB1 is formed on the second bond portion of the first lead wire WB joined to the wire connection portion 13AA and 16AA of the first lead terminals 13 and 16.
[0408] With this configuration, even if an external force is applied to the first lead terminals 13, 16 and the first lead terminals 13, 16 move, applying force to the first lead wire WB, the security bond WB1 can prevent the first lead wire WB from peeling off from the wire connection portions 13AA, 16AA.
[0409] (3-2) Through holes 12AD, 12AE, 14AD, 15AD, 17AD, and 17AE are formed in the first lead terminals 12, 14, 15, and 17 of the first lead terminals 12 to 17. No security bond is formed in the second bond portion of the first lead wire WB joined to the wire connection portions 12AA, 12AA, 14AA, 15AA, and 17AA of the first lead terminals 12, 14, 15, and 17.
[0410] With this configuration, the sealing resin 90 filled in the through holes 12AD, 12AE, 14AD, 15AD, 17AD, and 17AE suppresses movement of the first lead terminals 12, 14, 15, and 17, making it less likely that force will be applied to the first lead wires WB joined to the first lead terminals 12, 14, 15, and 17. Furthermore, there is no need to form security bonds on the first lead wires WB joined to the first lead terminals 12, 14, 15, and 17, simplifying the manufacturing process. This allows for a reduction in the manufacturing cost of the signal transmission device 10.
[0411] (3-3) Of the second lead terminals 42 to 47, the second lead terminals 43 and 46 do not have through holes 43AD and 46AD. A security bond WD1 is formed in the second bond portion of the second lead wire WD joined to the wire connection portions 43AA and 46AA of the second lead terminals 43 and 46.
[0412] According to this configuration, even if an external force is applied to the second lead terminals 43, 46 and the second lead terminals 43, 46 move, applying force to the second lead wire WD, the security bond WD1 can prevent the second lead wire WD from peeling off from the wire connection portions 43AA, 46AA.
[0413] (3-4) Through holes 42AD, 42AE, 44AD, 45AD, 47AD, and 47AE are formed in the second lead terminals 42, 44, 45, and 47 among the second lead terminals 42 to 47. No security bond is formed in the second bond portion of the second lead wire WD joined to the second lead terminals 42, 44, 45, and 47.
[0414] With this configuration, the sealing resin 90 filled in the through holes 42AD, 42AE, 44AD, 45AD, 47AD, and 47AE suppresses movement of the second lead terminals 42, 44, 45, and 47, making it less likely that force will be applied to the second lead wires WD joined to the second lead terminals 42, 44, 45, and 47. Furthermore, there is no need to form security bonds on the second lead wires WD joined to the second lead terminals 42, 44, 45, and 47, simplifying the manufacturing process. This allows for a reduction in the manufacturing cost of the signal transmission device 10.
[0415] <Fourth Embodiment> A signal transmission device 10 of a fourth embodiment will be described with reference to Fig. 31. The signal transmission device 10 of the fourth embodiment differs from the signal transmission device 10 of the first embodiment in the configuration of the first frame 10A and the second frame 10B. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be assigned the same reference numerals and their description will be omitted.
[0416] The first frame 10A and the second frame 10B of the fourth embodiment differ from those of the first embodiment in the shapes of the first die pad 30 and the second die pad 50. In a plan view, the arc length of the first distal curved surface 35 of the first die pad 30 is longer than the arc length of the first proximal curved surface 37. In a plan view, the arc length of the first distal curved surface 35 is longer than the arc length of the second proximal curved surface 38. In addition, in a plan view, the radius of curvature of the first distal curved surface 35 can be said to be larger than the radius of curvature of the first proximal curved surface 37. In a plan view, the radius of curvature of the first distal curved surface 35 can be said to be larger than the radius of curvature of the second proximal curved surface 38. In one example, in a plan view, the arc length of the first distal curved surface 35 is at least twice the arc length of the first proximal curved surface 37. In one example, in a plan view, the arc length of the first distal curved surface 35 is three times or more the arc length of the first proximal curved surface 37. In one example, in a plan view, the arc length of the first distal curved surface 35 is four times or less the arc length of the first proximal curved surface 37. In one example, in a plan view, the arc length of the first distal curved surface 35 is two times or more the arc length of the second proximal curved surface 38. In one example, in a plan view, the arc length of the first distal curved surface 35 is three times or more the arc length of the second proximal curved surface 38. In one example, in a plan view, the arc length of the first distal curved surface 35 is four times or less the arc length of the second proximal curved surface 38.
[0417] The arc length of the first distal curved surface 35 can be changed as desired. In one example, in a plan view, the arc length of the first distal curved surface 35 may be greater than four times the arc length of the first proximal curved surface 37. In another example, in a plan view, the arc length of the first distal curved surface 35 may be greater than the arc length of the first proximal curved surface 37 but less than twice the arc length of the first proximal curved surface 37. In another example, in a plan view, the arc length of the first distal curved surface 35 may be greater than four times the arc length of the second proximal curved surface 38. In another example, in a plan view, the arc length of the first distal curved surface 35 may be greater than the arc length of the second proximal curved surface 38 but less than twice the arc length of the second proximal curved surface 38.
[0418] In a plan view, the arc length of the second distal curved surface 36 of the first die pad 30 is longer than the arc length of the first proximal curved surface 37. In a plan view, the arc length of the second distal curved surface 36 is longer than the arc length of the second proximal curved surface 38. In addition, in a plan view, it can be said that the radius of curvature of the second distal curved surface 36 is larger than the radius of curvature of the first proximal curved surface 37. In a plan view, it can be said that the radius of curvature of the second distal curved surface 36 is larger than the radius of curvature of the second proximal curved surface 38. In one example, in a plan view, the arc length of the second distal curved surface 36 is at least twice the arc length of the first proximal curved surface 37. In one example, in a plan view, the arc length of the second distal curved surface 36 is at least three times the arc length of the first proximal curved surface 37. In one example, in a plan view, the arc length of the second distal curved surface 36 is four times or less the arc length of the first proximal curved surface 37. In one example, in a plan view, the arc length of the second distal curved surface 36 is two times or more the arc length of the second proximal curved surface 38. In one example, in a plan view, the arc length of the second distal curved surface 36 is three times or more the arc length of the second proximal curved surface 38. In one example, in a plan view, the arc length of the second distal curved surface 36 is four times or less the arc length of the second proximal curved surface 38.
[0419] The arc length of the second distal curved surface 36 can be changed as desired. In one example, in a plan view, the arc length of the second distal curved surface 36 may be greater than four times the arc length of the first proximal curved surface 37. In another example, in a plan view, the arc length of the second distal curved surface 36 may be greater than the arc length of the first proximal curved surface 37 but less than twice the arc length of the first proximal curved surface 37. In another example, in a plan view, the arc length of the second distal curved surface 36 may be greater than four times the arc length of the second proximal curved surface 38. In another example, in a plan view, the arc length of the second distal curved surface 36 may be greater than the arc length of the second proximal curved surface 38 but less than twice the arc length of the second proximal curved surface 38.
[0420] In one example, in a plan view, the arc length of the first distal curved surface 35 is equal to the arc length of the second distal curved surface 36. Here, if the difference between the arc length of the first distal curved surface 35 and the arc length of the second distal curved surface 36 is, for example, 10% or less of the arc length of the first distal curved surface 35, it can be said that the arc length of the first distal curved surface 35 is equal to the arc length of the second distal curved surface 36.
[0421] In a plan view, the arc length of the third distal curved surface 55 of the second die pad 50 is longer than the arc length of the third base curved surface 57. In a plan view, the arc length of the third distal curved surface 55 is longer than the arc length of the fourth base curved surface 58. In addition, in a plan view, it can be said that the radius of curvature of the third distal curved surface 55 is larger than the radius of curvature of the third base curved surface 57. In a plan view, it can be said that the radius of curvature of the third distal curved surface 55 is larger than the radius of curvature of the fourth base curved surface 58. In one example, in a plan view, the arc length of the third distal curved surface 55 is at least twice the arc length of the third base curved surface 57. In one example, in a plan view, the arc length of the third distal curved surface 55 is at least three times the arc length of the third base curved surface 57. In one example, in a plan view, the arc length of the third distal curved surface 55 is four times or less the arc length of the third proximal curved surface 57. In one example, in a plan view, the arc length of the third distal curved surface 55 is two times or more the arc length of the fourth proximal curved surface 58. In one example, in a plan view, the arc length of the third distal curved surface 55 is three times or more the arc length of the fourth proximal curved surface 58. In one example, in a plan view, the arc length of the third distal curved surface 55 is four times or less the arc length of the fourth proximal curved surface 58.
[0422] The arc length of the third distal curved surface 55 can be changed as desired. In one example, in a plan view, the arc length of the third distal curved surface 55 may be greater than four times the arc length of the third proximal curved surface 57. In another example, in a plan view, the arc length of the third distal curved surface 55 may be greater than the arc length of the third proximal curved surface 57 but less than twice the arc length of the third proximal curved surface 57. In another example, in a plan view, the arc length of the third distal curved surface 55 may be greater than four times the arc length of the fourth proximal curved surface 58. In another example, in a plan view, the arc length of the third distal curved surface 55 may be greater than the arc length of the fourth proximal curved surface 58 but less than twice the arc length of the fourth proximal curved surface 58.
[0423] In a plan view, the arc length of the fourth distal curved surface 56 of the second die pad 50 is longer than the arc length of the third proximal curved surface 57. In a plan view, the arc length of the fourth distal curved surface 56 is longer than the arc length of the fourth proximal curved surface 58. In addition, in a plan view, it can be said that the radius of curvature of the fourth distal curved surface 56 is larger than the radius of curvature of the third proximal curved surface 57. In a plan view, it can be said that the radius of curvature of the fourth distal curved surface 56 is larger than the radius of curvature of the fourth proximal curved surface 58. In one example, in a plan view, the arc length of the fourth distal curved surface 56 is at least twice the arc length of the third proximal curved surface 57. In one example, in a plan view, the arc length of the fourth distal curved surface 56 is at least three times the arc length of the third proximal curved surface 57. In one example, in a plan view, the arc length of the fourth distal curved surface 56 is four times or less the arc length of the third proximal curved surface 57. In one example, in a plan view, the arc length of the fourth distal curved surface 56 is two times or more the arc length of the fourth proximal curved surface 58. In one example, in a plan view, the arc length of the fourth distal curved surface 56 is three times or more the arc length of the fourth proximal curved surface 58. In one example, in a plan view, the arc length of the fourth distal curved surface 56 is four times or less the arc length of the fourth proximal curved surface 58.
[0424] The arc length of the fourth distal curved surface 56 can be changed as desired. In one example, in a plan view, the arc length of the fourth distal curved surface 56 may be greater than four times the arc length of the third proximal curved surface 57. In another example, in a plan view, the arc length of the fourth distal curved surface 56 may be greater than the arc length of the third proximal curved surface 57 but less than twice the arc length of the third proximal curved surface 57. In another example, in a plan view, the arc length of the fourth distal curved surface 56 may be greater than four times the arc length of the fourth proximal curved surface 58. In another example, in a plan view, the arc length of the fourth distal curved surface 56 may be greater than the arc length of the fourth proximal curved surface 58 but less than twice the arc length of the fourth proximal curved surface 58.
[0425] In one example, in a plan view, the arc length of third distal curved surface 55 is equal to the arc length of fourth distal curved surface 56. Here, if the difference between the arc length of third distal curved surface 55 and the arc length of fourth distal curved surface 56 is, for example, 10% or less of the arc length of third distal curved surface 55, it can be said that the arc length of third distal curved surface 55 is equal to the arc length of fourth distal curved surface 56.
[0426] In one example, in a plan view, the arc length of the third tip side curved surface 55 is equal to the arc length of the first tip side curved surface 35 of the first die pad 30. Here, if the difference between the arc length of the third tip side curved surface 55 and the arc length of the first tip side curved surface 35 is, for example, 10% or less of the arc length of the third tip side curved surface 55, it can be said that the arc length of the third tip side curved surface 55 is equal to the arc length of the first tip side curved surface 35.
[0427] In one example, in a plan view, the arc length of the fourth tip side curved surface 56 is equal to the arc length of the second tip side curved surface 36 of the first die pad 30. Here, if the difference between the arc length of the fourth tip side curved surface 56 and the arc length of the second tip side curved surface 36 is, for example, 10% or less of the arc length of the fourth tip side curved surface 56, it can be said that the arc length of the fourth tip side curved surface 56 is equal to the arc length of the second tip side curved surface 36.
[0428] [Effects] The signal transmission device 10 of the fourth embodiment has the following effects: (4-1) In the first die pad 30, the arc lengths of both the first tip-side curved surface 35 and the second tip-side curved surface 36 are longer than the arc lengths of both the first base-side curved surface 37 and the second base-side curved surface 38 in plan view.
[0429] According to this configuration, the first tip-side curved surface 35 and the second tip-side curved surface 36 can mitigate electric field concentration at the corner portion of the tip of the first die pad 30 that is close to the second die pad 50. This makes it possible to avoid dielectric breakdown between the first die pad 30 and the second die pad 50, thereby improving the dielectric strength voltage of the signal transmission device 10.
[0430] (4-2) In the second die pad 50, in a plan view, the arc lengths of both the third tip-side curved surface 55 and the fourth tip-side curved surface 56 are longer than the arc lengths of both the third base-side curved surface 57 and the fourth base-side curved surface 58.
[0431] According to this configuration, the third tip-side curved surface 55 and the fourth tip-side curved surface 56 can mitigate electric field concentration at the corner portion of the tip of the second die pad 50 that is close to the first die pad 30. This makes it possible to avoid dielectric breakdown between the first die pad 30 and the second die pad 50, thereby improving the dielectric strength voltage of the signal transmission device 10.
[0432] 32 to 39, a signal transmission device 10 according to a fifth embodiment will be described. The signal transmission device 10 according to the fifth embodiment differs from the signal transmission device 10 according to the first embodiment mainly in the configuration of each of the first chip 60 and the second chip 70. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be assigned the same reference numerals and will not be described again.
[0433] Fig. 32 shows a schematic cross-sectional structure of the first die pad 30 and the first chip 60 taken along the XZ plane, and Fig. 33 shows a schematic cross-sectional structure of the first die pad 30 and the first chip 60 taken along the YZ plane. For this reason, the wires WA to WC and the sealing resin 90 are omitted from the cross-sectional structures of Figs. 32 and 33.
[0434] 32 and 33 , substrate 130 of first chip 60 has first to fourth substrate side surfaces 133 to 136 that connect substrate front surface 131 and substrate back surface 132. First substrate side surface 133 constitutes a part of first chip side surface 63 of first chip 60, second substrate side surface 134 constitutes a part of second chip side surface 64, third substrate side surface 135 constitutes a part of third chip side surface 65, and fourth substrate side surface 136 constitutes a part of fourth chip side surface 66.
[0435] The substrate 130 can be divided into a first portion 137 and a second portion 138 by a step portion 139. The first portion 137 is a portion of the substrate 130 that is closer to the first die pad 30. The second portion 138 is a portion that is provided on the first portion 137. As shown in FIGS. 32 and 33 , the step portion 139 is formed around the entire periphery of the substrate 130.
[0436] In one example, the thickness dimension (size in the Z direction) of first portion 137 is larger than the thickness dimension (size in the Z direction) of second portion 138. In one example, the thickness dimension of first portion 137 is more than twice the thickness dimension of second portion 138. In one example, the thickness dimension of first portion 137 is more than three times the thickness dimension of second portion 138. In one example, the thickness dimension of first portion 137 is less than four times the thickness dimension of second portion 138.
[0437] 32 and 33 , the first conductive bonding material SD1 is interposed between the first portion 137 and the first die pad 30 in the Z direction, and has a portion that protrudes from the first chip 60 in a direction perpendicular to the Z direction. This protruding portion forms a first fillet SDA between the first portion 137 and the first conductive bonding material SD1. The first fillet SDA is not formed in the second portion 138 due to a step portion 139. In the example shown in FIGS. 32 and 33 , the first fillet SDA is formed over the entire first portion 137 in the Z direction.
[0438] The height dimension (size in the Z direction) of the first fillet SDA can be changed as desired as long as it is lower than the step portion 139. In one example, the height dimension of the first fillet SDA may be approximately half the thickness dimension of the first portion 137.
[0439] Furthermore, the position of the step portion 139 in the first chip 60 in the Z direction can be changed as desired. That is, the relationship between the thickness of the first portion 137 and the thickness of the second portion 138 can be changed as desired. In one example, the thickness of the first portion 137 may be equal to the thickness of the second portion 138. In one example, the thickness of the first portion 137 is ½ or less of the thickness of the second portion 138. In one example, the thickness of the first portion 137 is ⅓ or less of the thickness of the second portion 138. In one example, the thickness of the first portion 137 is ¼ or more of the thickness of the second portion 138. In one example, the thickness of the first portion 137 is ¼ or more and ¾ or less of the thickness (size in the Z direction) of the first chip 60.
[0440] The width H1 of the step portion 139 is equal to each other on the first to fourth substrate side surfaces 133 to 136. The width H1 of the step portion 139 is, for example, about 3 μm. Here, the width H1 of the step portion 139 can be defined, for example, by the distance between a portion of the first substrate side surface 133 corresponding to the first portion 137 and a portion corresponding to the second portion 138.
[0441] Fig. 34 shows a schematic cross-sectional structure of the second die pad 50 and the second chip 70 taken along the XZ plane, and Fig. 35 shows a schematic cross-sectional structure of the second die pad 50 and the second chip 70 taken along the YZ plane. For this reason, the wires WD, WE and the sealing resin 90 are omitted from the cross-sectional structures of Fig. 34 and Fig. 35.
[0442] 34 and 35 , the second chip 70 mounted on the second die pad 50 includes a substrate 230. The substrate 230 is formed, for example, of a semiconductor substrate. The substrate 230 is a semiconductor substrate formed of a material containing silicon. Note that a wide bandgap semiconductor or a compound semiconductor may be used as the semiconductor substrate for the substrate 230. Furthermore, instead of a semiconductor substrate, an insulating substrate formed of a material containing glass or an insulating substrate formed of a material containing ceramics such as alumina may be used as the substrate 230.
[0443] The wide bandgap semiconductor is a semiconductor substrate having a bandgap of 2.0 eV or greater. The wide bandgap semiconductor may be any one of silicon carbide, gallium nitride, and gallium oxide. The compound semiconductor may be a III-V compound semiconductor. The compound semiconductor may include at least one of aluminum nitride, indium nitride, gallium nitride, and gallium arsenide.
[0444] The substrate 230 of the second chip 70 has first to fourth substrate side surfaces 233 to 236 that connect the substrate front surface 231 and the substrate back surface 232. The first substrate side surface 233 constitutes a part of the first chip side surface 73 of the second chip 70, the second substrate side surface 234 constitutes a part of the second chip side surface 74, the third substrate side surface 235 constitutes a part of the third chip side surface 75, and the fourth substrate side surface 236 constitutes a part of the fourth chip side surface 76.
[0445] The substrate 230 can be divided into a first portion 237 and a second portion 238 by a step portion 239. The first portion 237 is a portion of the substrate 230 that is closer to the second die pad 50. The second portion 238 is a portion that is provided on the first portion 237. As shown in FIGS. 34 and 35 , the step portion 239 is formed around the entire periphery of the substrate 230.
[0446] In one example, the thickness dimension (size in the Z direction) of the first portion 237 is larger than the thickness dimension (size in the Z direction) of the second portion 238. In one example, the thickness dimension of the first portion 237 is more than twice the thickness dimension of the second portion 238. In one example, the thickness dimension of the first portion 237 is more than three times the thickness dimension of the second portion 238. In one example, the thickness dimension of the first portion 237 is less than four times the thickness dimension of the second portion 238.
[0447] 34 and 35 , the second conductive bonding material SD2 is interposed between the first portion 237 and the second die pad 50 in the Z direction, and has a portion that protrudes from the second chip 70 in a direction perpendicular to the Z direction. This protruding portion forms a second fillet SDB between the first portion 237 and the second conductive bonding material SD2. The second fillet SDB is not formed in the second portion 238 due to a step portion 239. In the example shown in FIGS. 34 and 35 , the second fillet SDB is formed over the entire first portion 237 in the Z direction.
[0448] The height dimension (size in the Z direction) of the second fillet SDB can be changed as desired as long as it is lower than the step portion 239. In one example, the height dimension of the second fillet SDB may be approximately half the thickness dimension of the first portion 237.
[0449] Furthermore, the position of the step portion 239 in the second chip 70 in the Z direction can be changed as desired. That is, the relationship between the thickness of the first portion 237 and the thickness of the second portion 238 can be changed as desired. In one example, the thickness of the first portion 237 may be equal to the thickness of the second portion 238. In one example, the thickness of the first portion 237 is ½ or less of the thickness of the second portion 238. In one example, the thickness of the first portion 237 is ⅓ or less of the thickness of the second portion 238. In one example, the thickness of the first portion 237 is ¼ or more of the thickness of the second portion 238. In one example, the thickness of the first portion 237 is ¼ or more and ¾ or less of the thickness (size in the Z direction) of the second chip 70.
[0450] The width H2 of the step portion 239 is equal to each other on the first to fourth substrate side surfaces 233 to 236. The width H2 of the step portion 239 is, for example, about 3 μm. Here, the width H2 of the step portion 239 can be defined, for example, by the distance between a portion of the first substrate side surface 233 corresponding to the first portion 237 and a portion of the first substrate side surface 233 corresponding to the second portion 238.
[0451] [Method for Manufacturing First Chip] An example of the manufacturing process for the first chip 60 will be described with reference to Figures 36 to 39. The method for manufacturing the first chip 60 includes the steps of preparing a substrate 830, forming an element insulating layer 850 on the substrate 830, forming a passivation film 861, forming a protective film 862, and singulating. An overview of each step will be described below. Note that Figures 36 to 39 show a schematic cross-sectional structure of the first chip 60. In Figures 37 to 39, the hatching lines of the passivation film 861 and the protective film 862 have been omitted to make the drawings easier to understand.
[0452] 36, in the step of preparing a substrate 830, a substrate 830 including a plurality of substrates 130 (see FIG. 32) is prepared. Here, in regions of the substrate 830 corresponding to each of the plurality of substrates 130, the transmitting unit 501, the receiving unit 502, the logic unit 503, the UVLO unit 504, the resistors 505, 506, 507, 509, 511, and the switching elements 508, 510 shown in FIG. 16 are formed.
[0453] As shown in FIG. 37, in the process of forming an element insulating layer 850 on a substrate 830, SiO 2 is deposited on a substrate surface 831 of the substrate 830 by, for example, a CVD method. 2 The film is laminated. 2 The film is a film that constitutes the element insulating layer 850. The element insulating layer 850 is made of, for example, a plurality of SiO 2 It is composed of a laminated film structure.
[0454] Although not shown, a step of forming the first back-side coil 111B and the second back-side coil 112B by, for example, sputtering and etching is performed during the step of forming the element insulating layer 850 on the substrate 830. Then, after the step of forming the first back-side coil 111B and the second back-side coil 112B is performed, the step of forming the element insulating layer 850 on the substrate 830 is performed again.
[0455] Although not shown, after the element insulating layer 850 is formed, a process is carried out to form the first surface side coil 111A, the second surface side coil 112A and the first to third electrode pads 67 to 69 by sputtering and etching.
[0456] Subsequently, in the step of forming the passivation film 861, the passivation film 861 is formed by, for example, a CVD method on the element insulating layer 850. Although not shown, the passivation film 861 also covers the second surface side coil 112A and the first to third electrode pads 67 to 69.
[0457] Subsequently, in the step of forming the protective film 862, the protective film 862 is formed on the passivation film 861 by, for example, a CVD method. The protective film 862 is formed over the entire surface of the passivation film 861, for example.
[0458] Subsequently, although not shown, openings are formed by, for example, etching in positions that overlap with portions of the first to third electrode pads 67 to 69 in both the protective film 862 and the passivation film 861. As a result, portions of the first to third electrode pads 67 to 69 are exposed in the Z direction from both the protective film 862 and the passivation film 861.
[0459] 38 and 39 , the singulation process includes a first dicing process and a second dicing process. As shown in FIG. 38 , in the first dicing process, the substrate 830 is first placed on the dicing tape DT. The back surface 832 of the substrate 830 is in contact with the dicing tape DT. Next, the first dicing blade DB1 cuts the protective film 862, the passivation film 861, and the element insulating layer 850, and also cuts a portion of the substrate 830 in the Z direction. As a result, a recess 833 is formed in the substrate 830.
[0460] 39, in the second dicing step, the substrate 830 is cut by a second dicing blade DB2. The second dicing blade DB2 is a blade that is narrower than the first dicing blade DB1. The second dicing blade DB2 cuts the substrate 830 from the recess 833 of the substrate 830. As a result, a step portion 839 is formed in the substrate 830. The dicing tape DT is then removed. Through the above steps, the first chip 60 is manufactured.
[0461] [Effects] The signal transmission device 10 of the fifth embodiment has the following effects: (5-1) The substrate 130 of the first chip 60 has a first portion 137 including the substrate back surface 132, a second portion 138 provided on the first portion 137, and a step portion 139 formed so that the second portion 138 is positioned inside the substrate 130 with respect to the first portion 137.
[0462] According to this configuration, when the first chip 60 is mounted on the first die pad 30 using the first conductive bonding material SD1, the step portion 139 can prevent the first conductive bonding material SD1 from creeping up to the chip surface 61 of the first chip 60.
[0463] (5-2) The substrate 230 of the second chip 70 has a first portion 237 including the back surface 232 of the substrate, a second portion 238 provided on the first portion 237, and a step portion 239 formed so that the second portion 238 is positioned inside the substrate 230 relative to the first portion 237.
[0464] According to this configuration, when the second chip 70 is mounted on the second die pad 50 using the second conductive bonding material SD2, the step portion 239 can prevent the second conductive bonding material SD2 from creeping up to the chip surface 71 of the second chip 70.
[0465] Sixth Embodiment A signal transmission device 10 of a sixth embodiment will be described with reference to Fig. 40. The signal transmission device 10 of the sixth embodiment differs from the signal transmission device 10 of the first embodiment in that the conductive members 10D and 10E are omitted. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be denoted by the same reference numerals and will not be described again.
[0466] 40 , the signal transmission device 10 does not include conductive members 10D and 10E (see FIG. 7 ). Therefore, the conductive member 10D is not exposed from the third sealing side surface 95 of the sealing resin 90. Furthermore, the conductive member 10E is not exposed from the fourth sealing side surface 96 of the sealing resin 90. In this way, both the third sealing side surface 95 and the fourth sealing side surface 96 are formed only from the resin material that constitutes the sealing resin 90.
[0467] Furthermore, due to the omission of conductive members 10D and 10E, recess 95D (see FIG. 7 ) is omitted from third sealing side surface 95, and recess 96D (see FIG. 7 ) is omitted from fourth sealing side surface 96. That is, the portion of third sealing side surface 95 between third front surface side surface 95A and third back surface side surface 95B forms a flat surface along the XZ plane over the entire X direction. The portion of fourth sealing side surface 96 between fourth front surface side surface 96A and fourth back surface side surface 96B forms a flat surface along the XZ plane over the entire X direction.
[0468] [Effects] According to the signal transmission device 10 of the sixth embodiment, the following effects can be obtained: (6-1) Both the third sealing side surface 95 and the fourth sealing side surface 96 of the sealing resin 90 are formed only by the sealing resin 90, without exposing the conductive member.
[0469] This configuration can prevent static electricity and the like from entering the sealing resin 90 via the conductive member, compared to a configuration in which the conductive member is exposed on at least one of the third sealing side surface 95 and the fourth sealing side surface 96. Furthermore, since the conductive member is not exposed, a large insulation distance can be secured between the first lead terminals 11 to 18 and the second lead terminals 41 to 48. This can improve the dielectric strength of the signal transmission device 10.
[0470] 41 to 45, a signal transmission device 10 according to a seventh embodiment will be described. The signal transmission device 10 according to the seventh embodiment differs from the signal transmission device 10 according to the first embodiment mainly in the configurations of the first frame 10A, the second frame 10B, the first chip 60, and the second chip 70. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be assigned the same reference numerals and will not be described again.
[0471] 41 , unlike the first embodiment, the seventh embodiment includes a signal transmission device 10 having ten first lead terminals 11M, 11N, 12 to 17, 18M, and 18N protruding from a first sealing side surface 93 of the sealing resin 90, and ten second lead terminals 41M, 41N, 42 to 47, 48M, and 48N protruding from a second sealing side surface 94. That is, the seventh embodiment has a greater number of first lead terminals and second lead terminals than the first embodiment.
[0472] Of the first lead terminals 11M, 11N, 12 to 17, 18M, and 18N, the configurations of the first outer lead portions 11MB, 11NB, 12B to 17B, 18MB, and 18NB outside the sealing resin 90 are the same as the configurations of the first outer lead portions 11B to 18B in the first embodiment. Of the second lead terminals 41M, 41N, 42 to 47, 48M, and 48N, the configurations of the second outer lead portions 41MB, 41NB, 42B to 47B, 48MB, and 48NB outside the sealing resin 90 are the same as the configurations of the second outer lead portions 41B to 48B in the first embodiment. Therefore, detailed description of the configurations of the first outer lead portions 11MB, 11NB, 12B to 17B, 18MB, and 18NB and the second outer lead portions 41MB, 41NB, 42B to 47B, 48MB, and 48NB will be omitted. In addition, the configuration of the sealing resin 90 is the same as the configuration of the sealing resin 90 in the first embodiment, so detailed description thereof will be omitted.
[0473] 42 , as described above, in the seventh embodiment, the first frame 10A includes ten first lead terminals 11M, 11N, 12 to 17, 18M, and 18N. The first lead terminals 11M, 11N, 12 to 17, 18M, and 18N are arranged spaced apart from one another in the Y direction. The first lead terminals 11M, 11N, 12 to 17, 18M, and 18N are arranged in the following order from the third sealing side surface 95 toward the fourth sealing side surface 96: first lead terminals 11M, 11N, 12, 13, 14, 15, 16, 17, 18N, and 18M.
[0474] The first lead terminals 11M, 11N, 18M, and 18N include first inner lead portions 11MA, 11NA, 18MA, and 18NA. Each of the first inner lead portions 11MA, 11NA, 18MA, and 18NA is connected to the first die pad 30. In one example, the first inner lead portions 11MA, 11NA, 18MA, and 18NA are integrated with the first die pad 30. The first lead terminals 12 to 17 are arranged at a distance from the first die pad 30, similar to the first embodiment.
[0475] 43, the configuration of each of the first inner lead portions 11MA, 11NA of the first lead terminals 11M, 11N includes configurations common to the configuration of the first inner lead portion 11A of the first lead terminal 11 of the first embodiment. For this reason, the configurations of each of the first inner lead portions 11MA, 11NA that are common to the configuration of the first inner lead portion 11A of the first embodiment are assigned the same reference numerals as the first inner lead portion 11A of the first embodiment, and detailed description thereof will be omitted.
[0476] The configuration of each of the first inner lead portions 18MA, 18NA of the first lead terminals 18M, 18N includes configurations common to the configuration of the first inner lead portion 18A of the first lead terminal 18 of the first embodiment. For this reason, the configurations of each of the first inner lead portions 18MA, 18NA that are common to the configuration of the first inner lead portion 18A of the first embodiment are denoted by the same reference numerals as the first inner lead portion 18A of the first embodiment, and detailed description thereof will be omitted.
[0477] The first die pad 30 includes a first protruding portion 33A protruding from the first side surface 33 toward the third sealing side surface 95, and a second protruding portion 34A protruding from the second side surface 34 toward the fourth sealing side surface 96. The size in the X direction of the first protruding portion 33A and the size in the X direction of the second protruding portion 34A are equal to each other and smaller than the size in the X direction of the first die pad 30.
[0478] Both the first protruding portion 33A and the second protruding portion 34A are disposed closer to the first tip surface 31 of the first die pad 30. That is, the distance in the X direction between the first protruding portion 33A and the second protruding portion 34A and the first tip surface 31 is smaller than the distance in the X direction between the first protruding portion 33A and the second protruding portion 34A and the first base end surface 32. Furthermore, when viewed from the Y direction, both the first protruding portion 33A and the second protruding portion 34A are formed at positions overlapping with the first chip 60.
[0479] The first inner lead portions 11MA, 11NA are connected to the first protrusion 33A. More specifically, the third lead portion 11AC of each of the first inner lead portions 11MA, 11NA is connected to the first protrusion 33A. Because the first inner lead portion 11MA is positioned closer to the third sealing side surface 95 than the first inner lead portion 11NA, the third lead portion 11AC of the first inner lead portion 11MA is positioned closer to the second frame 10B than the third lead portion 11AC of the first inner lead portion 11NA.
[0480] The first inner lead portions 18MA, 18NA are connected to the second protrusion portion 34A. More specifically, the third lead portion 18AC of each of the first inner lead portions 18MA, 18NA is connected to the second protrusion portion 34A. Because the first inner lead portion 18MA is positioned closer to the fourth sealing side surface 96 than the first inner lead portion 18NA, the third lead portion 18AC of the first inner lead portion 18NA is positioned closer to the second frame 10B than the third lead portion 18AC of the first inner lead portion 18NA.
[0481] 43 , the second bond portion of the first die pad wire WC connected to the third electrode pad 69 closer to the third chip side surface 65 of the first chip 60 is formed on the first protrusion 33A. The second bond portion of this first die pad wire WC has a security bond WC1 formed on the first protrusion 33A. The second bond portion of the first die pad wire WC connected to the third electrode pad 69 closer to the fourth chip side surface 66 of the first chip 60 is formed on the second protrusion 34A. The second bond portion of this first die pad wire WC has a security bond WC1 formed on the second protrusion 34A.
[0482] 42 , as described above, in the seventh embodiment, the second frame 10B includes ten second lead terminals 41M, 41N, 42 to 47, 48M, and 48N. The second lead terminals 41M, 41N, 42 to 47, 48M, and 48N are arranged spaced apart from one another in the Y direction. The second lead terminals 41M, 41N, 42 to 47, 48M, and 48N are arranged in the following order from the fourth sealing side surface 96 toward the third sealing side surface 95: 41M, 41N, 42, 43, 44, 45, 46, 47, 48N, and 48M.
[0483] The second lead terminals 41M, 41N, 48M, and 48N include second inner lead portions 41MA, 41NA, 48MA, and 48NA. Each of the second inner lead portions 41MA, 41NA, 48MA, and 48NA is connected to the second die pad 50. In one example, the second inner lead portions 41MA, 41NA, 48MA, and 48NA are integrated with the second die pad 50. The second lead terminals 42 to 47 are arranged at a distance from the second die pad 50, similar to the first embodiment.
[0484] 44, the configuration of each of the second inner lead portions 41MA, 41NA of the second lead terminals 41M, 41N includes configurations common to the configuration of the second inner lead portion 41A of the second lead terminal 41 of the first embodiment. For this reason, the configurations of each of the second inner lead portions 41MA, 41NA that are common to the configuration of the second inner lead portion 41A of the first embodiment are assigned the same reference numerals as the second inner lead portion 41A of the first embodiment, and detailed description thereof will be omitted.
[0485] The second die pad 50 includes a third protruding portion 53A protruding from the third side surface 53 toward the third sealing side surface 95, and a fourth protruding portion 54A protruding from the fourth side surface 54 toward the fourth sealing side surface 96. The size in the X direction of the third protruding portion 53A and the size in the X direction of the fourth protruding portion 54A are equal to each other and smaller than the size in the X direction of the second die pad 50.
[0486] Both the third protruding portion 53A and the fourth protruding portion 54A are disposed closer to the second tip surface 51 of the second die pad 50. That is, the distance in the X direction between the third protruding portion 53A and the fourth protruding portion 54A and the second tip surface 51 is smaller than the distance in the X direction between the third protruding portion 53A and the fourth protruding portion 54A and the second base end surface 52. Furthermore, when viewed from the Y direction, both the third protruding portion 53A and the fourth protruding portion 54A are formed at positions overlapping with the second chip 70.
[0487] The second inner lead portions 41MA, 41NA are connected to the third protrusion portion 53A. More specifically, the sixth lead portion 41AC of each of the second inner lead portions 41MA, 41NA is connected to the third protrusion portion 53A. Because the second inner lead portion 41MA is positioned closer to the third sealing side surface 95 than the second inner lead portion 41NA, the sixth lead portion 41AC of the second inner lead portion 41MA is positioned closer to the first frame 10A than the sixth lead portion 41AC of the second inner lead portion 41NA.
[0488] The second inner lead portions 48MA, 48NA are connected to the fourth protrusion portion 54A. More specifically, the sixth lead portion 48AC of each of the second inner lead portions 48MA, 48NA is connected to the fourth protrusion portion 54A. Because the second inner lead portion 48MA is positioned closer to the fourth sealing side surface 96 than the second inner lead portion 48NA, the sixth lead portion 48AC of the second inner lead portion 48NA is positioned closer to the first frame 10A than the sixth lead portion 48AC of the second inner lead portion 48NA.
[0489] 44 , the second bond portion of the second die pad wire WE connected to the third electrode pad 79 closer to the third chip side surface 75 of the second chip 70 is formed on the third protrusion 53A. The second bond portion of this second die pad wire WE has a security bond WE1 formed on the third protrusion 53A. The second bond portion of the second die pad wire WE connected to the third electrode pad 79 closer to the fourth chip side surface 76 of the second chip 70 is formed on the fourth protrusion 54A. The second bond portion of this second die pad wire WE has a security bond WE1 formed on the fourth protrusion 54A.
[0490] [Circuit Configuration of Signal Transmission Device] The circuit configuration of the signal transmission device 10 of the seventh embodiment will be described with reference to Fig. 45. The circuit configuration of the signal transmission device 10 of the seventh embodiment is different from the circuit configuration of the signal transmission device 10 of the first embodiment in the configurations of the first terminal and the second terminal. The configurations of the first terminal and the second terminal will be described below.
[0491] The signal transmission device 10 of the seventh embodiment includes first terminals PM1, PN1, P2 to P7, PM8, and PN8 which are external terminals electrically connected to the first circuit 500, and second terminals QM1, QN2, Q2 to Q7, QM8, and QN8 which are electrically connected to the second circuit 520.
[0492] The first terminals PM1 and PN1 constitute a ground terminal (GND1) similar to the first terminal P1 in the first embodiment. The first terminals PM8 and PN8 constitute a ground terminal (GND1) similar to the first terminal P8 in the first embodiment. The first terminals PM1, PN1, PM8, and PN8 are electrically connected to each other.
[0493] The second terminals QM1 and QN1 constitute a negative power supply terminal (VEE2) similar to the second terminal Q1 in the first embodiment. The second terminals QM8 and QN8 constitute a negative power supply terminal (VEE2) similar to the second terminal Q8 in the first embodiment. The second terminals QM1, QN1, QM8, and QN8 are electrically connected to each other. The signal transmission device 10 of the seventh embodiment can achieve the same effects as the first embodiment.
[0494] Eighth Embodiment A signal transmission device 10 of an eighth embodiment will be described with reference to Figures 46 and 47. The signal transmission device 10 of the eighth embodiment differs from the signal transmission device 10 of the second embodiment in the configuration of the first frame 10A and the second frame 10B. In the following description, configurations that differ from the first embodiment will be described in detail, and components that are common to the first embodiment will be assigned the same reference numerals and their description will be omitted.
[0495] The first frame 10A of the eighth embodiment differs from the second embodiment in the configuration of the first lead terminals corresponding to the first lead terminals 11 and 18 of the second embodiment. More specifically, as shown in FIG. 46 , the first frame 10A of the eighth embodiment includes first lead terminals 11M, 11N, 18M, and 18N, similar to the seventh embodiment. Meanwhile, the configuration of the first lead terminals 12 to 17 is similar to that of the first lead terminals 12 to 17 of the second embodiment. Specifically, the first inner lead portions 12A to 17A of the first lead terminals 12 to 17 are formed with through holes 12AD to 17AD that penetrate the first inner lead portions 12A to 17A in their thickness direction (Z direction). Furthermore, the first inner lead portions 12A and 17A are formed with through holes 12AE and 17AE, separate from the through holes 12AD and 17AD. That is, the first inner lead portions 12A and 17A have two through holes. In the eighth embodiment, the positions, shapes, and sizes of the through holes 12AD-17AD, 12AE, and 17AE are the same as those in the second embodiment. The positions of the second bond portions of the first lead wires WB are the same as those in the second embodiment. Therefore, detailed descriptions of the through holes 12AD-17AD, 12AE, and 17AE and the first lead wires WB are omitted. In the eighth embodiment, the security bond WB1 (see FIG. 42) is not formed in the second bond portion of the first lead wires WB.
[0496] The through holes 12AD to 17AD, 12AE, and 17AE are filled with sealing resin 90. In other words, the sealing resin 90 filled in the through holes 12AD to 17AD, 12AE, and 17AE connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 2) than the first inner lead portions 12A to 17A with the sealing resin 90 provided closer to the sealing back surface 92 (see FIG. 2) than the first inner lead portions 12A to 17A.
[0497] Here, the first lead terminals 11M, 11N, 18M, and 18N are integrated with the first die pad 30 and therefore correspond to "first connection terminals." The first lead terminals 12 to 17 are arranged spaced apart from the first die pad 30 and therefore correspond to "first remote terminals." Because the through holes 12AD to 17AD are formed in the first lead terminals 12 to 17, it can be said that the first remote terminals have through holes that penetrate through the first remote terminals in the thickness direction. On the other hand, the first connection terminals do not have through holes.
[0498] As shown in FIG. 47 , the second frame 10B of the eighth embodiment differs from the second embodiment in the configuration of the second lead terminals corresponding to the second lead terminals 41 and 48 of the second embodiment. More specifically, the second frame 10B of the eighth embodiment includes second lead terminals 41M, 41N, 48M, and 48N, similar to the seventh embodiment. Meanwhile, the configuration of the second lead terminals 42 to 47 is similar to that of the second lead terminals 42 to 47 of the second embodiment. That is, the second inner lead portions 42A to 47A of the second lead terminals 42 to 47 are formed with through holes 42AD to 47AD that penetrate the second inner lead portions 42A to 47A in their thickness direction (Z direction). Furthermore, the second inner lead portions 42A and 47A are formed with through holes 42AE and 47AE in addition to the through holes 42AD and 47AD. That is, the second inner lead portions 42A and 47A have two through holes. In the eighth embodiment, the positions, shapes, and sizes of the through holes 42AD to 47AD, 42AE, and 47AE are the same as those in the second embodiment. The positions of the second bond portions of the second lead wires WD are the same as those in the second embodiment. Therefore, detailed descriptions of the through holes 42AD to 47AD, 42AE, and 47AE and the second lead wires WD will be omitted. In the eighth embodiment, the security bond WD1 (see FIG. 42) is not formed in the second bond portion of the second lead wires WD.
[0499] The through holes 42AD to 47AD, 42AE, and 47AE are filled with sealing resin 90. In other words, the sealing resin 90 filled in the through holes 42AD to 47AD, 42AE, and 47AE connects the sealing resin 90 provided closer to the sealing surface 91 (see FIG. 2) than the second inner lead portions 42A to 47A with the sealing resin 90 provided closer to the sealing back surface 92 (see FIG. 2) than the second inner lead portions 42A to 47A.
[0500] Here, the second lead terminals 41M, 41N, 48M, and 48N are integrated with the second die pad 50 and therefore correspond to "second connection terminals." The second lead terminals 42 to 47 are arranged spaced apart from the second die pad 50 and therefore correspond to "second remote terminals." Because the through holes 42AD to 47AD are formed in the second lead terminals 42 to 47, the second remote terminals can be said to have through holes that penetrate through the second remote terminals in the thickness direction. On the other hand, the second connection terminals do not have through holes. Note that the signal transmission device 10 of the eighth embodiment can achieve the same effects as the second embodiment.
[0501] Ninth Embodiment A signal transmission device 10 of a ninth embodiment will be described with reference to Figures 48 and 49. The signal transmission device 10 of the ninth embodiment differs from the signal transmission device 10 of the third embodiment in the configuration of the first frame 10A and the second frame 10B. In the following description, configurations that differ from the third embodiment will be described in detail, and components that are common to the third embodiment will be assigned the same reference numerals and their description will be omitted.
[0502] The first frame 10A of the ninth embodiment is different from the third embodiment in the configuration of the first lead terminals corresponding to the first lead terminals 11 and 18 of the third embodiment. More specifically, as shown in FIG. 48 , the first frame 10A of the ninth embodiment includes first lead terminals 11M, 11N, 18M, and 18N, similar to the seventh embodiment. Meanwhile, the configuration of the first lead terminals 12 to 17 is similar to that of the first lead terminals 12 to 17 of the third embodiment. That is, the first frame 10A includes two types of first lead terminals: first specific terminals (first lead terminals 12, 14, 15, and 17 in the ninth embodiment) having through holes formed therein among the first inner lead portions 12A to 17A of the first lead terminals 12 to 17, and second specific terminals (first lead terminals 13 and 16 in the ninth embodiment) having no through holes formed therein.
[0503] In the ninth embodiment, the configuration of the second bond portion of the first lead wire WB differs depending on the first specified terminal and the second specified terminal. More specifically, a security bond WB1 is formed on the second bond portion of the first lead wire WB connected to the wire connection portions 13AA, 16AA of the first inner lead portions 13A, 16A of the first lead terminals 13, 16 serving as the second specified terminals. On the other hand, no security bond WB1 is formed on the second bond portion of the first lead wire WB connected to the wire connection portions 12AA, 14AA, 15AA, 17AA of the first inner lead portions 12A, 14A, 15A, 17A of the first lead terminals 12, 14, 15, 17 serving as the first specified terminals. The configuration of the security bond WB1 is the same as the configuration of the security bond WC1 in the first embodiment shown in FIG. 15 .
[0504] That is, the plurality of first lead wires WB include first specified wires joined to first specified terminals (first lead terminals 12, 14, 15, and 17 in the ninth embodiment) and second specified wires joined to second specified terminals (first lead terminals 13 and 16 in the ninth embodiment). A security bond is formed at a joint (second bond portion) of the second specified wire joined to the second specified terminal.
[0505] The second frame 10B of the ninth embodiment is different from the third embodiment in the configuration of the second lead terminals corresponding to the second lead terminals 41 and 48 of the third embodiment. More specifically, as shown in FIG. 49 , the second frame 10B of the ninth embodiment includes second lead terminals 41M, 41N, 48M, and 48N, similar to the seventh embodiment. Meanwhile, the configuration of the second lead terminals 42 to 47 is similar to that of the second lead terminals 42 to 47 of the third embodiment. That is, the second frame 10B includes two types of second lead terminals: third specific terminals (second lead terminals 42, 44, 45, and 47 in the ninth embodiment) having through holes formed therein among the second inner lead portions 42A to 47A of the second lead terminals 42 to 47, and fourth specific terminals (second lead terminals 43 and 46 in the ninth embodiment) having no through holes formed therein.
[0506] In the ninth embodiment, the configuration of the second bond portion of the second lead wire WD differs depending on the third and fourth specified terminals. More specifically, a security bond WD1 is formed in the second bond portion of the second lead wire WD connected to the wire connection portions 43AA, 46AA of the second inner lead portions 43A, 46A of the second lead terminals 43, 46 serving as the fourth specified terminals. On the other hand, no security bond WD1 is formed in the second bond portion of the second lead wire WD connected to the wire connection portions 42AA, 44AA, 45AA, 47AA of the second inner lead portions 42A, 44A, 45A, 47A of the second lead terminals 42, 44, 45, 47 serving as the third specified terminals. The configuration of the security bond WD1 is the same as the configuration of the security bond WC1 in the first embodiment shown in FIG. 15 .
[0507] That is, the plurality of second lead wires WD include a third specified wire joined to a third specified terminal (second lead terminals 42, 44, 45, and 47 in the ninth embodiment) and a fourth specified wire joined to a fourth specified terminal (second lead terminals 43 and 46 in the ninth embodiment). A security bond is formed at the bond portion (second bond portion) of the fourth specified wire joined to the fourth specified terminal. Note that the signal transmission device 10 of the ninth embodiment can achieve the same effects as the third embodiment.
[0508] <Tenth Embodiment> A signal transmission device 10 of a tenth embodiment will be described with reference to Fig. 50. The signal transmission device 10 of the tenth embodiment differs from the signal transmission device 10 of the sixth embodiment in the configuration of the first frame 10A and the second frame 10B. In the following description, configurations that differ from the sixth embodiment will be described in detail, and components that are common to the sixth embodiment will be assigned the same reference numerals and their description will be omitted.
[0509] The first frame 10A of the tenth embodiment is different from the sixth embodiment in the configuration of the first lead terminals corresponding to the first lead terminals 11, 18 of the sixth embodiment. More specifically, as shown in Fig. 50, the first frame 10A of the tenth embodiment includes first lead terminals 11M, 11N, 18M, and 18N, similar to the seventh embodiment.
[0510] The second frame 10B of the tenth embodiment differs from the sixth embodiment in the configuration of the first lead terminals corresponding to the second lead terminals 41, 48 of the sixth embodiment. More specifically, as shown in Fig. 50, the second frame 10B of the tenth embodiment includes second lead terminals 41M, 41N, 48M, and 48N, similar to the seventh embodiment. The signal transmission device 10 of the tenth embodiment provides the same effects as the sixth embodiment.
[0511] 51 to 55, a signal transmission device 10 of an eleventh embodiment will be described. The signal transmission device 10 of the eleventh embodiment differs from the signal transmission device 10 of the first embodiment in the configuration of the first chip 60. Below, differences in the configuration of the first chip 60 from the first embodiment will be described in detail. Furthermore, components common to the first embodiment will be assigned the same reference numerals, and descriptions thereof will be omitted.
[0512] 51 , a passivation film 161 is formed on the layer surface 151 of the element insulating layer 150, while the multiple first electrode pads 67 are not formed on the layer surface 151. In other words, the passivation film 161 is in contact with the layer surface 151, and the multiple first electrode pads 67 are arranged spaced apart from the layer surface 151 in the Z direction. The passivation film 161 is formed over the entire layer surface 151 of the element insulating layer 150.
[0513] The first chip 60 further includes a first organic insulating layer 191 formed on the passivation film 161, and a second organic insulating layer 192 formed on the first organic insulating layer 191. Here, the first organic insulating layer 191 corresponds to the "first resin layer," and the second organic insulating layer 192 corresponds to the "second resin layer."
[0514] Both the first organic insulating layer 191 and the second organic insulating layer 192 are formed of an insulating material having a relative dielectric constant different from that of the element insulating layer 150. Both the first organic insulating layer 191 and the second organic insulating layer 192 may contain at least one of polyimide, phenolic resin, and epoxy resin. The first organic insulating layer 191 and the second organic insulating layer...
Claims
1. A first chip including an isolation transformer; A second chip that receives at least one of signals from the first chip and transmits signals to the first chip; A first die pad on which the first chip is mounted; A second die pad that is spaced apart from the first die pad in a first direction and on which the second chip is mounted; A plurality of first lead terminals that are spaced apart from the first die pad on the opposite side of the second die pad in the first direction in a plan view and are arranged in a second direction orthogonal to the first direction in the plan view; A plurality of second lead terminals that are spaced apart from the second die pad on the opposite side of the first die pad in the first direction in a plan view and are arranged in the second direction in the plan view; An inter-chip wire that electrically connects the first chip and the second chip; A first lead wire that individually connects the first chip and the plurality of first lead terminals, and comprising: Among the plurality of first lead terminals, a first end lead terminal which is a first lead terminal arranged at both ends in the second direction, A first lead portion extending in the first direction; A second lead portion connected to the first lead portion and obliquely extending toward the first die pad in the second direction as it goes toward the second die pad in the first direction; A third lead portion extending in the second direction and connecting the second lead portion and the first die pad; Among the plurality of second lead terminals, a second end lead terminal which is a second lead terminal arranged at both ends in the second direction, A fourth lead portion extending in the first direction; A fifth lead portion connected to the fourth lead portion and obliquely extending toward the second die pad in the second direction as it goes toward the first die pad in the first direction; A sixth lead portion extending in the second direction and connecting the fifth lead portion and the second die pad; The inter-chip wire is formed of a material containing gold; The first lead wire is formed of a material containing copper or aluminum. A signal transmission device.
2. The first lead wire has a structure in which palladium is coated on the surface of a copper wire. The signal transmission device according to Claim 1.
3. Further comprising a plurality of second lead wires that individually connect the second chip and the plurality of second lead terminals. The wire for the second lead is formed of a material containing copper or aluminum. The signal transmission device according to claim 1.
4. The signal transmission device further includes a wire for the first die pad that connects the first chip and the first die pad. The wire for the first die pad is formed of a material containing copper or aluminum. The signal transmission device according to claim 1.
5. The signal transmission device further includes a wire for the second die pad that connects the second chip and the second die pad. The wire for the second die pad is formed of a material containing copper or aluminum. The signal transmission device according to claim 1.
6. The wire for the first die pad is a bonding wire. A security bond is formed at a joint portion of the wire for the first die pad with the first die pad. The signal transmission device according to claim 4.
7. The wire for the second die pad is a bonding wire. A security bond is formed at a joint portion of the wire for the second die pad with the second die pad. The signal transmission device according to claim 5.
8. The plurality of first lead terminals include first spaced terminals spaced apart from the first die pad. The first spaced terminal includes a first portion extending in the first direction, and a second portion provided continuously to the first portion and extending in a direction intersecting the first direction with respect to the first portion in a plan view. The second portion includes a side surface intersecting in a plan view with the wire for the first lead connected to the second portion. The side surface faces the first die pad in a plan view. The signal transmission device according to claim 1.
9. The plurality of inter-chip wires are formed to be parallel to each other in a plan view. The signal transmission device according to claim 1.
10. The signal transmission device further includes a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wires, the wire for the first lead, the first die pad, and the second die pad and partially seals each of the first lead terminals and each of the second lead terminals. The plurality of first lead terminals include a first connection terminal integrated with the first die pad, and a first spaced terminal spaced apart from the first die pad. including The first spaced terminal has a through hole penetrating in a thickness direction of the first spaced terminal. The through hole is filled with the sealing resin. The signal transmission device according to claim 1.
11. Further provided with a rectangular flat sealing resin for sealing the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad, and partially sealing each of the first lead terminals and each of the second lead terminals, Each of the first lead terminals A first outer lead portion exposed outside the sealing resin, A first inner lead portion provided inside the sealing resin and connected to the first outer lead portion, The plurality of first lead terminals A first specific terminal in which a through hole penetrating in the thickness direction of the first lead terminal is formed in the first inner lead portion, A second specific terminal in which the through hole is not formed in the first inner lead portion, Including The plurality of first lead wires A first specific wire joined to the first specific terminal, A second specific wire joined to the second specific terminal, Including A security bond is formed at a joint portion of the second specific wire joined to the second specific terminal. The signal transmission device according to claim 1.
12. Further provided with a rectangular flat sealing resin for sealing the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad, and partially sealing each of the first lead terminals and each of the second lead terminals, The sealing resin has a sealing surface, a sealing back surface opposite to the sealing surface, and a sealing side surface connecting the sealing surface and the sealing back surface, The sealing side surface A first sealing side surface where the plurality of first lead terminals are exposed, A second sealing side surface where the plurality of second lead terminals are exposed, A third sealing side surface and a fourth sealing side surface connecting the first sealing side surface and the second sealing side surface, Including Both the third sealing side surface and the fourth sealing side surface are composed only of the sealing resin without exposing the conductive member. The signal transmission device according to claim 1.
13. The first chip An element insulating layer, A first resin layer provided on the element insulating layer, A second resin layer provided on the first resin layer, Comprising The insulating transformer A surface-side coil disposed on the first resin layer and covered by the second resin layer, A back-side coil disposed opposite to the surface-side coil in the thickness direction of the element insulating layer and embedded in the element insulating layer. The signal transmission device according to any one of claims 1 to 12.
14. Further comprising a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad, and partially seals each of the first lead terminals and each of the second lead terminals, The first chip is an element insulating layer, a passivation film formed on the element insulating layer so as to cover the element insulating layer, and a low dielectric layer formed on the surface of the passivation film and having a lower relative dielectric constant than the passivation film, The sealing resin covers the low dielectric layer The signal transmission device according to any one of claims 1 to 12.
15. The insulating transformer is a surface side coil disposed near the chip surface of the first chip, a back side coil disposed opposite to the surface side coil, and includes The surface side coil is a coil surface, a coil back surface opposite to the coil surface, and a coil side surface connecting the coil surface and the coil back surface, and has a curved surface is formed between the coil surface and the coil side surface The signal transmission device according to any one of claims 1 to 12.
16. The first chip is a flat substrate mounted on the first die pad, and an element insulating layer formed on the substrate and provided with at least a part of the insulating transformer, The substrate is a substrate back surface facing the first die pad, a substrate surface opposite to the substrate back surface, a substrate side surface connecting the substrate back surface and the substrate surface, a first portion including the substrate back surface, a second portion provided on the first portion and including the substrate surface, and a stepped portion formed such that the second portion is located inside the substrate with respect to the first portion. The signal transmission device according to any one of claims 1 to 12.
17. The first die pad is a first tip surface facing the second die pad in a plan view in the first direction, a first base surface opposite to the first tip surface in a plan view, a first side surface and a second side surface constituting both side surfaces in the second direction, a first tip side curved surface formed between the first tip surface and the first side surface, a second tip side curved surface formed between the first tip surface and the second side surface, a first base side curved surface formed between the first base surface and the first side surface, A second base-end side curved surface formed between the first base-end surface and the second side surface; having In a plan view, the arc lengths of both the first tip-side curved surface and the second tip-side curved surface are longer than the arc lengths of both the first base-end side curved surface and the second base-end side curved surface. The signal transmission device according to any one of claims 1 to 10.
18. Further comprising a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad and partially seals each of the first lead terminals and the second lead terminals; The first lead terminal includes a first inner lead portion provided in the sealing resin; The first inner lead portion includes a wire connection portion to which the first lead wire is connected; The wire connection portion An inner lead surface to which the first lead wire is joined; An inner lead back surface facing the side opposite to the inner lead surface; An inner lead side surface connecting the inner lead surface and the inner lead back surface; having The inner lead side surface includes a tip surface facing the first die pad in the first direction; A plating layer is formed on the inner lead surface; A plating layer is not formed on the end portion of the inner lead surface on the tip surface side, and it is in contact with the sealing resin. The signal transmission device according to any one of claims 1 to 10.
19. Further comprising a rectangular flat sealing resin that seals the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad and partially seals each of the first lead terminals and the second lead terminals; The plurality of first lead terminals include a first outer lead portion protruding outside the sealing resin; The first outer lead portion An outer lead surface; An outer lead back surface facing the side opposite to the outer lead surface; An outer lead side surface connecting the outer lead surface and the outer lead back surface at both ends in the width direction of the first outer lead portion; An outer lead end surface that is an end surface in the direction in which the first outer lead portion extends; having A plating layer is formed on the outer lead surface, the outer lead back surface, and the outer lead side surface. The plating layer is continuously formed from the back surface of the outer lead toward the front surface of the outer lead on the end face of the outer lead, and is spaced apart from the front surface of the outer lead. The signal transmission device according to any one of claims 1 to 10.
20. Further provided is a rectangular plate-shaped encapsulating resin that encapsulates the first chip, the second chip, the inter-chip wire, the first lead wire, the first die pad, and the second die pad, and partially encapsulates each of the first lead terminals and each of the second lead terminals. The outer surface of the encapsulating resin is formed such that the surface roughness Rz is 8 μm or more. The signal transmission device according to any one of claims 1 to 12.