Semiconductor device

Abstract

A semiconductor device 1C is a semiconductor device in which at least a first chip 30 is packaged. A first chip 30 comprises: a microcomputer 31; a first non-volatile memory 32b; and an interface 34 to which a rewritable second non-volatile memory 41 physically separated from the first chip 30 can be connected. The microcomputer 31 reads a program from the first non-volatile memory 32b or from the second non-volatile memory 41 via the interface 34 and executes the program.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Semiconductor devices equipped with microcomputers are used in a variety of applications. For such semiconductor devices to operate independently, non-volatile memory is essential for storing the programs executed by the microcomputer.

[0003] An example of the related prior art is disclosed in Japanese Patent Application Laid-Open No. 2003-222299.

[0004] Japanese Patent Application Laid-Open No. 2000-123599

[0005] However, in conventional semiconductor devices, it was necessary to completely reconsider the system and circuit configuration of the semiconductor device and to carry out design, verification, and evaluation each time depending on the type of nonvolatile memory to be mounted.

[0006] For example, the semiconductor device disclosed in this specification is a packaged device that includes at least a first chip, the first chip including a microcontroller, a first non-volatile memory, and an interface to which a rewritable second non-volatile memory that is physically separated from the first chip can be connected, and the microcontroller reads and executes a program from the first non-volatile memory or from the second non-volatile memory via the interface.

[0007] Still other features, elements, steps, advantages, and characteristics will become more apparent from the detailed description that follows and the accompanying drawings related thereto.

[0008] The present disclosure can reduce the development costs of semiconductor devices that accompany changes to the mounting of nonvolatile memories.

[0009] Fig. 1 is a diagram illustrating a first comparative example of a semiconductor device. Fig. 2 is a diagram illustrating a second comparative example of a semiconductor device. Fig. 3 is a diagram illustrating a first embodiment of a semiconductor device. Fig. 4 is a diagram illustrating a second embodiment of a semiconductor device.

[0010] <Semiconductor Device (Comparative Example)> FIGS. 1 and 2 are diagrams showing a first comparative example and a second comparative example of a semiconductor device, respectively (each an example of a circuit configuration to be compared with the embodiments described later).

[0011] The semiconductor device 1A of the first comparative example (FIG. 1) is a single-chip type device packaged with a single semiconductor chip 10. The semiconductor chip 10 integrates a microcomputer 11, a memory 12, and an additional function unit 13. The memory 12 includes a volatile memory 12a and a non-volatile memory 12b.

[0012] The microcomputer 11 reads and executes a program from the memory 12 (particularly the non-volatile memory 12b). The microcomputer 11 can be a main controller of the other functional units 13. A CPU (central processing unit), for example, can be suitably used as the microcomputer 11.

[0013] The volatile memory 12a stores data in a volatile manner and is mainly used as a cache area when the microcomputer 11 executes a program. An SRAM (static random access memory) or the like can be suitably used as the volatile memory 12a.

[0014] The nonvolatile memory 12b stores data in a nonvolatile manner and is mainly used as a storage area for programs executed by the microcomputer 11. As the nonvolatile memory 12b, an EEPROM (electrically erasable programmable read-only memory) or a flash memory, which allows data (e.g., programs) to be electrically erased and rewritten, can be suitably used.

[0015] On the other hand, the semiconductor device 1B of the second comparative example (FIG. 2), like the first comparative example (FIG. 1), is a single-chip type in which a single semiconductor chip 20 is packaged. The semiconductor chip 20 integrates a microcomputer 21, a memory 22, and an additional function unit 23. The memory 22 includes a volatile memory 22a and a non-volatile memory 22b.

[0016] These components 21 to 23 basically have the same functions as the components 11 to 13 of the first comparative example (FIG. 1).

[0017] However, in the semiconductor device 1B of this comparative example, a ROM or OTPROM (one time programmable ROM) that is cheaper and smaller than the nonvolatile memory 12b is used as the nonvolatile memory 22b, and therefore, unlike the nonvolatile memory 12b of the first comparative example (FIG. 1), the program cannot be electrically erased or rewritten.

[0018] <Considerations Regarding Changes to Non-Volatile Memory Implementation> In the semiconductor device 1A (FIG. 1) that employs a non-volatile memory 12b such as an EEPROM as a program storage area, the program can be rewritten any number of times. This makes it easier to debug the program when releasing a new product. However, EEPROMs generally have a larger circuit area and more configuration layers than ROMs. Therefore, the unit price of the semiconductor device 1A is higher than that of the semiconductor device 1B.

[0019] Therefore, when a new product is released, a semiconductor device 1A equipped with a rewritable non-volatile memory 12b is commercialized as a launch version, and after the program is confirmed through debugging, a semiconductor device 1B in which the non-volatile memory 12b is replaced with an inexpensive and small non-volatile memory 22b is redeveloped as a shrink version (low-cost version).

[0020] Incidentally, the semiconductor chip 20 of the semiconductor device 1B is smaller than the semiconductor chip 10 of the semiconductor device 1A in order to reduce costs. Also, the non-volatile memory 22b, such as a ROM, is smaller than the non-volatile memory 12b, such as an EEPROM. Therefore, in the semiconductor device 1B, not only is the non-volatile memory 12b of the semiconductor device 1A simply replaced with the non-volatile memory 22b, but various modifications to the other components are also required.

[0021] For example, the layout of the microcomputer 21, volatile memory 22a, and other functional units 23 in the semiconductor chip 20 may differ significantly from the layout of the microcomputer 11, volatile memory 12a, and other functional units 13 in the semiconductor chip 10.

[0022] Therefore, even if a circuit block was found to have no problems in the evaluation of the semiconductor device 1A (launch version) during development, if the layout is changed during the redevelopment of the semiconductor device 1B (shrink version), it must be verified and evaluated again. Therefore, the redevelopment of the semiconductor device 1B required approximately the same amount of time and cost as the development of the semiconductor device 1A. Furthermore, if the redevelopment of the semiconductor device 1B is delayed, the release date of the semiconductor device 1B may be missed, which could lead to a loss of sales opportunities.

[0023] In the following, in consideration of the above considerations, a new embodiment is proposed that can reduce the development costs of a semiconductor device that accompanies a change in the mounting of a nonvolatile memory.

[0024] 3 and 4 are diagrams showing a first and a second embodiment of a semiconductor device, respectively. The semiconductor device 1C of the first embodiment (FIG. 3) is a multi-chip type in which two semiconductor chips 30 and 40 are packaged.

[0025] The semiconductor chip 30 (corresponding to the first chip) integrates a microcomputer 31, a memory 32, an additional function unit 33, and an interface 34. The memory 32 includes a volatile memory 32a and a nonvolatile memory 32b. The nonvolatile memory 32b corresponds to a first nonvolatile memory in which data cannot be electrically rewritten.

[0026] On the other hand, a nonvolatile memory 41 is integrated in the semiconductor chip 40. The nonvolatile memory 41 is physically separated from the semiconductor chip 30 and corresponds to a second nonvolatile memory in which data can be electrically erased and rewritten.

[0027] The microcomputer 31 reads and executes a program from the memory 32 (particularly the non-volatile memory 32b) or from the semiconductor chip 40 (particularly the non-volatile memory 41) via the interface 34. The microcomputer 11 can be a main controller of the other functional units 13, etc. A CPU, for example, can be suitably used as the microcomputer 11.

[0028] For example, when the non-volatile memory 41 is not connected to the interface 34, the microcomputer 31 reads and executes the program from the non-volatile memory 32b. Also, when the non-volatile memory 41 is connected to the interface 34, the microcomputer 31 reads and executes the program from the non-volatile memory 41 via the interface 34.

[0029] The volatile memory 32a stores data in a volatile manner and is mainly used as a cache area when the microcomputer 31 executes a program. An SRAM or the like can be suitably used as the volatile memory 32a.

[0030] The nonvolatile memories 32b and 41 each store data in a nonvolatile manner. The nonvolatile memories 32b and 41 are each used primarily as storage areas for programs executed by the microcomputer 31. The nonvolatile memory 32b may be a ROM or OTPROM, which is less expensive and smaller than the nonvolatile memory 41. On the other hand, the nonvolatile memory 41 may suitably be an EEPROM or flash memory, which allows data to be electrically erased and rewritten. Note that the nonvolatile memory 32b, such as a ROM, generally has a smaller area and fewer constituent layers than the nonvolatile memory 41, such as an EEPROM.

[0031] A semiconductor chip 40 (and hence a non-volatile memory 41) can be connected to the interface 34. The interface 34 transfers data (for example, programs) between the microcomputer 31 and the non-volatile memory 41.

[0032] On the other hand, the semiconductor device 1D of the second embodiment (FIG. 4) is based on the first embodiment (FIG. 3), but the aforementioned semiconductor chip 40 has been removed, and only the semiconductor chip 30 is packaged as a single chip type. The semiconductor chip 30 is no different from that of the first embodiment except that a debugged program is stored in the non-volatile memory 32b. In other words, the layout of the circuit blocks in the semiconductor chip 30 is completely the same in both the first embodiment (FIG. 3) and the second embodiment (FIG. 4).

[0033] <Technical Significance of Multi-Chip Design> A multi-chip semiconductor device 1C (FIG. 3) equipped with a rewritable non-volatile memory 41 facilitates program debugging, etc. Therefore, the semiconductor device 1C is suitable as a launch version of a new product.

[0034] In the semiconductor device 1C, the program executed by the microcomputer 31 is read from the nonvolatile memory 41 via the interface 34. Therefore, it does not matter whether the program of the microcomputer 31 is stored in the nonvolatile memory 32b.

[0035] On the other hand, a single-chip semiconductor device 1D (FIG. 4) that does not include a nonvolatile memory 41 is suitable for market release as a shrink version that is cheaper than the semiconductor device 1C (FIG. 3) after the program has been confirmed by debugging.

[0036] An important point here is that the semiconductor chip 30 packaged in common for each of the semiconductor devices 1C and 1D is pre-installed with a non-volatile memory 32b (= alternative storage means for reducing the cost of the non-volatile memory 41).

[0037] As mentioned above, the semiconductor device 1C, which is suitable as a launch version of a new product, includes a rewritable non-volatile memory 41 to facilitate program debugging. Therefore, when considering the semiconductor device 1C alone, the non-volatile memory 32b is not actually used as a program storage area. Therefore, integrating the non-volatile memory 32b into the semiconductor chip 30 may seem wasteful and counter to cost reduction. However, when considering the redevelopment of a shrink version, the fact that the non-volatile memory 32b is pre-integrated into the semiconductor chip 30 has great technical significance.

[0038] In a shrink-type semiconductor device 1D that does not have non-volatile memory 41 to reduce costs, the non-volatile memory 32b described above is used as a program storage area. In this case, the redevelopment work for the semiconductor device 1D simply involves removing the semiconductor chip 40 (=non-volatile memory 41) that is physically separated from the semiconductor chip 30 and storing the debugged program in the non-volatile memory 32b. In other words, when focusing on the semiconductor chip 30, the only difference between the first embodiment (FIG. 3) and the second embodiment (FIG. 4) is that the final version of the program is stored in the non-volatile memory 32b; there is no change whatsoever in the layout of the circuit blocks, or in the characteristics of the semiconductor chip 30.

[0039] Therefore, for the semiconductor chip 30 that was found to have no problems in the evaluation during development of the semiconductor device 1C (launch version), there is no need to perform verification and evaluation again when redeveloping the semiconductor device 1D (shrink version). Therefore, the time and cost required for redeveloping the semiconductor device 1D can be significantly reduced compared to the comparative example ( FIGS. 1 and 2 ).

[0040] In this way, if the semiconductor chip 30 (= microcomputer + ROM) and the semiconductor chip 40 (= EEPROM) are prepared separately, it becomes easy to develop launch and shrink versions of the product. For example, if the multi-chip type first embodiment (FIG. 3) is adopted, it is possible to commercialize a launch version semiconductor device 1C that has the advantage of non-volatile memory 41, that is, data can be rewritten any number of times. On the other hand, if the single-chip type second embodiment (FIG. 4) is adopted, it is possible to commercialize an inexpensive shrink version semiconductor device 1D in a short period of time.

[0041] Consider also the case where there are components, such as EEPROM and ROM, that have similar functions but differ greatly in cost and usability (especially components that can be substituted for one another). In this case, by dividing each component into multiple semiconductor chips and appropriately selecting the semiconductor chip to be incorporated into the system, it becomes possible to easily realize a product that makes the most of the advantages of each component.

[0042] <Summary> The various embodiments described above will be summarized below.

[0043] For example, the semiconductor device disclosed in this specification is a packaged device that includes at least a first chip, the first chip including a microcontroller, a first non-volatile memory, and an interface to which a rewritable second non-volatile memory physically separated from the first chip can be connected, and the microcontroller is configured to read and execute a program from the first non-volatile memory or from the second non-volatile memory via the interface (first configuration).

[0044] In the semiconductor device according to the first configuration described above, the microcontroller may be configured (second configuration) to read and execute the program from the first non-volatile memory when the second non-volatile memory is not connected to the interface, and to read and execute the program from the second non-volatile memory via the interface when the second non-volatile memory is connected to the interface.

[0045] The semiconductor device according to the first or second configuration may be configured as a multi-chip type (third configuration) in which the first chip and a second chip including the second nonvolatile memory are packaged together.

[0046] In the semiconductor device according to the third configuration, the first nonvolatile memory may have a smaller area than the second nonvolatile memory (fourth configuration).

[0047] In the semiconductor device according to the third or fourth configuration, the first nonvolatile memory may have fewer layers than the second nonvolatile memory (fifth configuration).

[0048] The semiconductor device according to the first or second configuration may be configured as a single chip in which only the first chip is packaged (sixth configuration).

[0049] In the semiconductor device according to any one of the first to sixth configurations, the first nonvolatile memory may be a ROM or an OTPROM (seventh configuration).

[0050] In the semiconductor device according to any one of the first to seventh configurations, the second nonvolatile memory may be an EEPROM or a flash memory (eighth configuration).

[0051] <Others> In addition to the above-described embodiments, the various technical features disclosed in this specification can be modified in various ways without departing from the spirit of the technical creation. In other words, the above-described embodiments should be considered to be illustrative and not restrictive in all respects. Furthermore, the technical scope of the present disclosure is defined by the claims, and should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0052] 1A, 1B, 1C, 1D Semiconductor device 10 Semiconductor chip 11 Microcomputer 12 Memory 12a Volatile memory (SRAM) 12b Non-volatile memory (EEPROM or flash memory) 13 Other functional unit 20 Semiconductor chip 21 Microcomputer 22 Memory 22a Volatile memory (SRAM) 22b Non-volatile memory (ROM or OTPROM) 23 Other functional unit 30 Semiconductor chip 31 Microcomputer 32 Memory 32a Volatile memory (SRAM) 32b Non-volatile memory (ROM or OTPROM) 33 Other functional unit 34 Interface 40 Semiconductor chip 41 Non-volatile memory (EEPROM or flash memory)

Claims

1. A semiconductor device in which at least a first chip is packaged, the first chip includes a microcomputer, a first nonvolatile memory, and an interface to which a rewritable second nonvolatile memory physically separated from the first chip can be connected; The microcomputer reads and executes a program from the first nonvolatile memory or from the second nonvolatile memory via the interface.

2. 2. The semiconductor device according to claim 1, wherein the microcomputer reads and executes the program from the first non-volatile memory when the second non-volatile memory is not connected to the interface, and reads and executes the program from the second non-volatile memory via the interface when the second non-volatile memory is connected to the interface.

3. 2. The semiconductor device according to claim 1, wherein the semiconductor device is a multi-chip type in which the first chip and a second chip including the second nonvolatile memory are packaged.

4. 4. The semiconductor device according to claim 3, wherein said first nonvolatile memory has an area smaller than that of said second nonvolatile memory.

5. The semiconductor device according to claim 3 , wherein said first nonvolatile memory has fewer layers than said second nonvolatile memory.

6. 2. The semiconductor device according to claim 1, wherein said semiconductor device is a single-chip type in which only said first chip is packaged.

7. 2. The semiconductor device according to claim 1, wherein said first nonvolatile memory is a ROM or an OTPROM.

8. 8. The semiconductor device according to claim 1, wherein the second nonvolatile memory is an EEPROM or a flash memory.