Wiring board, electronic component mounting board using wiring board, and electronic module
Patent Information
- Application Number
- JP2024566183
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Priority Date
- 2023-12-22
- Filing Date
- 2023-12-22
- Publication Date
- 2025-09-24
AI Technical Summary
Conventional wiring boards face issues with impedance decrease and increased signal loss due to high dielectric constant substrates, and the risk of electrical short circuits when conductor layers are brought close together, especially as they become smaller.
The wiring board design incorporates a substrate with a conductor portion and terminal portion, featuring strategically placed openings with specific shapes and dimensions to adjust impedance and prevent short circuits, using materials like ceramic and metal, and employing additive manufacturing for precise conductor arrangement.
This design effectively reduces signal loss and impedance fluctuations, allowing for reliable transmission of high-frequency signals while minimizing the risk of electrical short circuits by optimizing the conductor layout and using materials with lower dielectric constants.
Abstract
Description
Wiring board, electronic component mounting board using wiring board, and electronic module
[0001] The present invention relates to a wiring board, a substrate for mounting electronic components using the wiring board, and an electronic module.
[0002] A conventional wiring board is described in, for example, Patent Document 1 (see Patent Document 1).
[0003] JP 2013-110310 A
[0004] In one embodiment (1), a wiring board has a substrate, a conductor portion, and a terminal portion. The substrate has a first surface and an opening region located on the first surface. The conductor portion is located on the first surface. The conductor portion has a first conductor and a second conductor. The terminal portion has a first pin terminal and a second pin terminal. The opening region has a first opening. The second conductor is located spaced apart from the first conductor in a first direction. The first pin terminal is electrically connected to the first conductor. The first pin terminal extends above the first surface. The second pin terminal is electrically connected to the second conductor. The second pin terminal extends above the first surface. In a plan view, when a virtual line extending in a first direction and passing through the first conductor and the second conductor is defined as a first virtual line, and a virtual line extending in a second direction perpendicular to the first direction and passing through the midpoints of the first conductor and the second conductor in the first direction is defined as a second virtual line, the first opening is located spaced apart from the first conductor, the second conductor, and the first virtual line in the second direction. The first opening is also located on the second virtual line.
[0005] (2) In the wiring board of (1) above, the opening region further includes a second opening, which is located on the opposite side of the first imaginary line from the first opening.
[0006] (3) In the wiring substrate of (1) or (2), the opening region further includes a third opening, the third opening being located on the first imaginary line between the first conductor and the second conductor.
[0007] (4) In the wiring board of (3) above, the third opening connects the first opening and the second opening in a plan view.
[0008] (5) In the wiring board of (3) or (4) above, the dimension of the third opening in the first direction on the first virtual line is smaller than at least one of the maximum dimension of the first opening in the first direction and the maximum dimension of the second opening in the first direction.
[0009] (6) In the wiring board of any one of (2) to (5) above, the first opening and the second opening have a circular shape in a plan view.
[0010] (7) In the wiring substrate according to any one of (2) to (6), at least one third opening has a rectangular shape in plan view, and one of two opposing sides of the third opening is positioned along the second direction in plan view.
[0011] (8) In the wiring board of any one of (2) to (7) above, the opening region has a shape that follows the outer edge of the first conductor and also follows the outer edge of the second conductor in a plan view.
[0012] (9) In the wiring boards of (2) to (8) above, the opening region has a shape that is symmetrical with respect to the first imaginary line in plan view.
[0013] (10) In the wiring board of any one of (3) to (9), the conductor portion further includes a third conductor and a fourth conductor. The terminal portion further includes a third pin terminal and a fourth pin terminal. The opening region further includes a fourth opening and a fifth opening. The second conductor is positioned a first distance from the first conductor in the first direction. The third conductor is positioned a second distance from the first conductor in the second direction. The fourth conductor is positioned a third distance from the second conductor in the second direction. The third conductor and the fourth conductor are positioned a fourth distance from each other in the first direction. The third pin terminal is electrically connected to the third conductor and extends above the first surface. The fourth pin terminal is electrically connected to the fourth conductor and extends above the first surface. The second distance and the third distance are equal. The first distance and the fourth distance are equal. The first opening is surrounded by the first conductor, the second conductor, the third conductor, and the fourth conductor. The fourth opening is located on the opposite side of the first opening from the second opening. The fifth opening is located on the second imaginary line between the third conductor and the fourth conductor and connects the first opening and the fourth opening.
[0014] (11) In the wiring board of (10) above, when viewed in a plane, a virtual line passing through the second conductor and the third conductor is defined as a third virtual line, and the intersection of the second virtual line and the third virtual line is defined as a first intersection, the opening area is symmetrical in shape with respect to the first intersection.
[0015] (12) In the wiring board of any one of (1) to (11), the board has a circular outer edge in plan view. The distance between the first conductor and the outer edge is smaller than the distance between the second conductor and the outer edge. The opening region further has a sixth opening spaced from the first conductor in the first direction and between the outer edge and the first conductor. The sixth opening has a linear shape that is aligned with a tangent to the outer edge in plan view.
[0016] (13) In the wiring board of any one of (4) to (12), the opening region further includes a seventh opening spaced apart from the first opening and the second opening, the seventh opening being located on the first imaginary line, and the first conductor being located between the seventh opening and the third opening in the first direction.
[0017] (14) In the wiring board of (13), the opening region further includes an eighth opening spaced apart from the first opening and the second opening, the eighth opening being located on the first imaginary line, and the second conductor being located between the eighth opening and the third opening in the first direction.
[0018] (15) In the wiring board of any one of (1) to (14) above, the depth of the opening region is smaller than the distance in the first direction between the first conductor and the second conductor.
[0019] (16) In one embodiment, an electronic component mounting substrate includes the wiring board according to any one of (1) to (15) above and an electronic component connecting electrode located on a second surface opposite to the first surface, wherein the first conductor and the second conductor are electrically connected to the electronic component connecting electrode.
[0020] (17) In one embodiment, an electronic module includes the electronic component mounting substrate according to (16) above, and an electronic component electrically connected to the electronic component connection electrode.
[0021] 5 is a perspective view of a wiring board according to an embodiment; FIG. 6 is a perspective view of a wiring board according to an embodiment, viewed from the negative direction of the z-axis; FIG. 7 is a plan view of a wiring board according to an embodiment; FIG. 8 is a perspective view of a terminal portion according to an embodiment; FIG. 9 is a perspective view of a wiring board according to an embodiment, with the terminal portion omitted; FIG. 10 is an enlarged view of a main part A shown in FIG. 3; FIG. 11 is an enlarged view of a main part B shown in FIG. 5; FIG. 12 is an enlarged plan view of a wiring board according to a second embodiment; FIG. 13 is an enlarged perspective view of a wiring board according to a third embodiment; FIG. 14 is an enlarged plan view of a wiring board according to a modification of the third embodiment; FIG. 15 is an enlarged plan view of a wiring board according to a fourth embodiment; FIG. 16 is an enlarged plan view of a wiring board according to a fifth embodiment;
[0022] The wiring board described in Patent Document 1 includes a motherboard, a conductor layer provided on the motherboard, and lead pins bonded to the conductor layer. The conductor layer is electrically connected to electronic components via wiring conductors located inside the motherboard. In such a wiring board, the motherboard has a high dielectric constant, which may result in reduced impedance in the conductor layer and the wiring conductor. This may increase loss in high-frequency signal transmission. Furthermore, as wiring boards become smaller, the conductor layers must be placed closer to each other. However, if the conductor layers are placed closer to each other, overflowing adhesive material used to bond the lead pins to the conductor layers may connect the conductor layers and cause an electrical short circuit.
[0023] <Configuration of Wiring Board> Several exemplary embodiments will be described below with reference to the drawings. Note that while any direction of the wiring board may be considered up or down, for convenience, a Cartesian coordinate system xyz is defined, with the positive z-direction being considered up. In the present disclosure, a plan view is a concept that includes a planar perspective view. In the present disclosure, the first direction refers to, for example, the x-direction in the drawings. The second direction refers to, for example, the y-direction in the drawings. The first and second directions may be opposite to each other in some locations. The third direction refers to, for example, the z-direction in the drawings. In the present disclosure, width, length, and thickness may refer to the dimension in the x-direction, the dimension in the y-direction, and the dimension in the z-direction, respectively. In the following, only the configurations of the second and third embodiments that differ from those of the respective embodiments will be described. The remaining configurations will be denoted by the same reference numerals as those in the respective embodiments, and description thereof will be omitted.
[0024] 1 to 7, a wiring board 101 according to a first embodiment will be described. The wiring board 101 has a substrate 1, a conductor portion 2, and a terminal portion 3. Note that, for convenience, the terminal portion 3 (e.g., first pin terminal 31, second pin terminal 32) is omitted in some of the drawings.
[0025] The substrate 1 has a first surface 1t and an open region z1 located on the first surface 1t. The substrate 1 may also have a second surface 1b. Examples of materials that can be used for the substrate 1 include ceramic materials such as aluminum oxide sintered body, mullite sintered body, silicon carbide sintered body, aluminum nitride sintered body, and silicon nitride sintered body, and dielectric materials such as glass ceramic material and glass epoxy material.
[0026] The substrate 1 may be a single layer or may have a configuration in which multiple insulating layers are laminated. The substrate 1 has, for example, a circular or rectangular shape in plan view, a size of 4 mm × 4 mm to 50 mm × 50 mm, and a thickness of 0.5 mm to 10 mm.
[0027] The substrate 1 can be manufactured, for example, as follows: A plurality of green sheets are processed using a mold or the like to prepare a plurality of green sheets formed to the outer shape of the substrate 1. Next, the plurality of green sheets are stacked so that their outer edges coincide with each other to form a green sheet laminate. The green sheet laminate is fired to sinter the plurality of green sheets, thereby obtaining the substrate 1.
[0028] The substrate 1 may have a conductor layer therein. The conductor layer may be electrically connected to the conductor portion 2. The substrate 1 and the conductor portion 2 may be produced by additive manufacturing (AM) using a 3D printer.
[0029] The conductor portion 2 is located on the first surface 1t. Examples of materials for the conductor portion 2 include metal materials such as gold, silver, copper, nickel, tungsten, molybdenum, and manganese. The conductor portion 2 may be formed by sintering a metal paste on the substrate 1 in a green sheet state, or may be formed using a thin-film formation technique such as a vapor deposition method or a sputtering method. The conductor portion 2 may have a structure in which conductors are arranged at regular intervals in a lattice pattern. An insulating film such as ceramic (e.g., an alumina coating) and / or resin may further be located on a portion of the conductor portion 2. Some of the conductor portions 2 do not necessarily need to be independent from each other, and some of the conductor portions 2 may be integrated.
[0030] The conductor portion 2 may have a portion extending toward the inside of the substrate 1. In other words, the conductor portion 2 may be electrically connected to the inside of the substrate 1 and / or the second surface 1b by a via or the like.
[0031] The conductor portion 2 has a first conductor 21 and a second conductor 22. The conductor portion 2 may have a plurality of first conductors 21 and / or second conductors 22. The second conductor 22 is positioned at a distance from the first conductor 21 in a first direction (i.e., the x direction). When the conductor portion 2 has a plurality of first conductors 21 and / or second conductors 22, some of the second conductors 22 may be positioned at a distance from the first conductor 21 in a second direction (i.e., the y direction) perpendicular to the first direction. The distance between the second conductor 22 and the first conductor 21 in the first direction may be defined as a first distance L1. Here, the first distance L1 refers to the shortest distance between the first conductor 21 and the second conductor 22.
[0032] In addition to the terminal portion 3 described later, a solder ball may be joined to the conductor portion 2. In this case, the wiring board 101 can be a so-called BGA (Ball Grid Array).
[0033] The first conductor 21 and the second conductor 22 may be circular or rectangular in plan view. The shapes of the first conductor 21 and the second conductor 22 may be the same or different. At least one of the first conductor 21 and the second conductor 22 may be a signal conductor that transmits a signal, or both may be signal conductors that transmit other signal conductors. When both the first conductor 21 and the second conductor 22 are signal conductors, the first conductor 21 and the second conductor 22 may transmit a pair of differential signals. At least one of the first conductor 21 and the second conductor 22 may be a ground conductor.
[0034] The terminal portion 3 has a first pin terminal 31 and a second pin terminal 32. The terminal portion 3 may have a plurality of first pin terminals 31 and second pin terminals 32. The terminal portion 3 may be a member known as a lead terminal or a lead pin. The wiring board 101 has the terminal portion 3, and thus is a so-called PGA (Pin Grid Array). The terminal portion 3 is joined to the conductor portion 2 by a joining material such as brazing material and / or solder.
[0035] On the side opposite to the first surface 1t, the terminal portion 3 may be connected to an external substrate such as a flexible printed circuit (FPC) or a printed circuit board (PCB) on which an electronic circuit is formed.
[0036] Examples of materials for the terminal portion 3 include metal materials such as iron, copper, nickel, chromium, cobalt, molybdenum, and tungsten, or alloys of a combination of these metal materials. The terminal portion 3 can be formed by subjecting an ingot of such a metal material to a metal processing method such as rolling or punching. The terminal portion 3 may be cylindrical or prismatic.
[0037] As an example of the terminal portion 3, a first pin terminal 31 will be described with reference to FIG. 4 . The following configuration can be adopted as the same or similar configuration in terminal portions 3 other than the first pin terminal 31 (e.g., the second pin terminal 32). In one embodiment, the first pin terminal 31 is cylindrical. The first pin terminal 31 may have a columnar portion 311 and a pedestal portion 312. The pedestal portion 312 may have a bonding surface 31b. The bonding surface 31b can be bonded to the first conductor 21. The bonding surface 31b does not need to be a flat surface, and may have a shape that is convex in the negative direction of the z-axis, for example.
[0038] The columnar portion 311 extends in the z direction and has a larger dimension in the z direction than the base portion 312. In a plan view, the base portion 312 has a larger diameter than the columnar portion 311. The first pin terminal 31 has the base portion 312, which increases the area of the bonding surface 31b, allowing the first pin terminal 31 to be stably mounted on the first conductor 21.
[0039] Furthermore, when connecting the wiring board 101 to the external board, the pedestal 312 comes into contact with the external board, thereby reducing the possibility that the external board will come into contact with the first surface 1t, thereby reducing the possibility that the impedance value of the conductor 2 will fluctuate.
[0040] The first pin terminal 31 is electrically connected to the first conductor 21. The first pin terminal 31 extends above the first surface 1t. The second pin terminal 32 is electrically connected to the second conductor 22. The second pin terminal 32 extends above the first surface 1t. Here, "extending upward" refers to, for example, extending in the z direction, and does not necessarily have to be perpendicular to the first surface 1t.
[0041] The open region z1 has a first opening O1. The open region z1 may be formed by punching the substrate 1 before sintering, or by performing a known hole-making process such as drilling, blasting, or laser processing on the sintered substrate 1. In one embodiment, the open region z1 does not penetrate the substrate 1, but the open region z1 may penetrate the substrate 1.
[0042] In one embodiment, the first opening O1 has a rectangular shape with rounded corners when viewed in a plan view, but the first opening O1 may have a square shape or a circular shape including an elliptical shape when viewed in a plan view.
[0043] The opening region z1 is filled with at least one dielectric material, such as air, a resin material, or a glass material, and has a lower dielectric constant than the substrate 1. This allows the characteristic impedance of the first conductor 21 and / or the second conductor 22 to be adjusted to a desired value when transmitting a high-frequency signal. This reduces the signal power loss that occurs in the first conductor 21 and / or the second conductor 22. This makes it possible to provide a wiring substrate 101 that can transmit high-frequency signals more effectively.
[0044] Furthermore, because the opening region z1 is located around the conductor portion 2, when the terminal portion 3 is joined using a joining material, the excess joining material can be contained in the opening region z1. This reduces the possibility of the conductor portion 2 being electrically short-circuited by the excess joining material. Furthermore, by keeping the excess joining material away from the conductor portion 2, the possibility of the impedance value of the conductor portion 2 fluctuating can be reduced.
[0045] In a plan view, a first imaginary line T1 is defined as a virtual line extending in the x direction and passing through the first conductor 21 and the second conductor 22, and a second imaginary line T2 is defined as a virtual line extending in the y direction perpendicular to the x direction and passing through the midpoints of the first conductor 21 and the second conductor 22 in the x direction. In this case, the first opening O1 is positioned spaced apart from the first conductor 21, the second conductor 22, and the first imaginary line T1 in the y direction. The first opening O1 is also positioned on the second imaginary line T2. This allows the opening region z1 including the first opening O1 to be positioned close to the first conductor 21 and the second conductor 22, while still ensuring a region for forming the first conductor 21 and the second conductor 22.
[0046] The first virtual line T1 can be defined as a line passing through the center of the first conductor 21 in the x direction and the y direction and the center of the second conductor 22 in the x direction and the y direction. The first virtual line T1 may also be defined as a line passing through the center of gravity of the first conductor 21 and the center of gravity of the second conductor 22. The first virtual line T1 may also be defined as a line connecting the points of the first conductor 21 and the second conductor 22 that are closest to each other.
[0047] The opening region z1 may further include a second opening O2. The second opening O2 may be located on the opposite side of the first virtual line T1 from the first opening O1. This means that the first conductor 21 and the second conductor 22 are sandwiched between the first opening O1 and the second opening O2 in the y direction. This reduces the possibility of a decrease in the impedance value in the conductor portion 2. Note that the first opening O1 and the second opening O2 do not necessarily need to be connected.
[0048] The opening region z1 further has a third opening O3. The third opening O3 may be located between the first conductor 21 and the second conductor 22 on the first imaginary line T1. That is, the third opening O3 is located between the first conductor 21 and the second conductor 22 in the x direction. Furthermore, the third opening O3 is located between the first opening O1 and the second opening O2 in the y direction. Therefore, if both the first conductor 21 and the second conductor 22 are signal conductors, it is possible to reduce the possibility that the impedance value will decrease in the region sandwiched between the first conductor 21 and the second conductor 22.
[0049] In a plan view, the third opening O3 may connect the first opening O1 and the second opening O2. When the third opening O3 connects the first opening O1 and the second opening O2, the first opening O1, the second opening O2, and the third opening O3 may be collectively referred to as the first portion O11. By connecting the third opening O3 to the first opening O1 and the second opening O2, the first portion O11 can be formed collectively, further facilitating the manufacture of the wiring substrate 101. Furthermore, because the first portion O11 is located between the first conductor 21 and the second conductor 22, the opening region z1 can be further widened, thereby reducing the possibility of a decrease in the impedance value in the first conductor 21 and / or the second conductor 22.
[0050] The dimension Lx3 of the third opening O3 in the x-direction on the first imaginary line T1 may be smaller than at least one of the maximum dimension Lx1 of the first opening O1 in the x-direction and the maximum dimension Lx2 of the second opening O2 in the x-direction. That is, the opening region z1 may be gradually smaller from the first opening O1 to the second opening O2, or gradually larger from the first opening O1 to the second opening O2, or may have a constricted shape at the third opening O3 located between the first opening O1 and the second opening O2. Therefore, in the area where the first conductor 21 and the second conductor 22 are close to each other (on the first imaginary line T1 in one embodiment), the third opening O3 can be made as large as possible, while the first opening O1 and the second opening O2, which sandwich the first conductor 21 and the second conductor 22 in the y-direction, can be further enlarged. This allows the volume of the substrate 1, which has a relatively high dielectric constant, to be reduced around the first conductor 21 and the second conductor 22, thereby reducing the possibility of a decrease in the impedance value of the conductor portion 2.
[0051] The maximum dimension Lx1 of the first opening O1 in the x-direction and the maximum dimension Lx2 of the second opening O2 in the x-direction may be the same. Furthermore, the first opening O1 and the second opening O2 may have a circular shape in a planar view. Here, the circular shape of the first opening O1 refers to the fact that at least a portion of the outer edge in a planar view is circular (i.e., arc-shaped). The first opening O1 and the second opening O2 do not have to be perfect circles. This allows the first opening O1 and the second opening O2 to be efficiently positioned close to other conductors 2 (e.g., the third conductor 23 and the fourth conductor 24 described below). This effectively reduces the possibility of a decrease in the impedance value of the conductor 2. Furthermore, the first opening O1 and the second opening O2 having the above-described shape have fewer or no corners than when the first opening O1 and the second opening O2 are rectangular. This reduces the possibility of the substrate 1 being damaged even when heat or stress is applied to the substrate 1.
[0052] As shown in Figures 6 and 7, at least one third opening O3 may be rectangular in plan view. In this case, one of two opposing sides of the third opening O3 may be located along the y direction in plan view. In other words, one of two opposing sides of the rectangular third opening O3 may be perpendicular to the first virtual line T1. This makes the third opening O3 closer to a simple rectangle, making it easier to form the third opening O3 on the substrate 1. This also effectively reduces the possibility of a decrease in the impedance value between the first conductor 21 and the second conductor 22.
[0053] In a plan view, the opening region z1 (more specifically, the first portion O11) may have a shape that is line-symmetrical with respect to the first virtual line T1, which makes it easier to align the impedance values of the first conductor 21 and the second conductor 22.
[0054] The opening region z1 may further include a seventh opening O7 spaced apart from the first opening O1 and the second opening O2. The seventh opening O7 is located on the first imaginary line T1. The first conductor 21 is located between the seventh opening O7 and the third opening O3 in the x-direction. In other words, the first conductor 21 is sandwiched between the seventh opening O7 and the third opening O3 (more specifically, the first portion O11) in the x-direction. Therefore, when the first conductor 21 is a signal conductor, the volume of the substrate 1 surrounding the first conductor 21 can be further reduced. This further reduces the possibility of a further decrease in impedance value in the first conductor 21. Therefore, high-frequency signals can be transmitted through the first conductor 21 with low loss. The shape of the seventh opening O7 may be the same as or different from that of the first portion O11.
[0055] The opening region z1 may further include an eighth opening O8 spaced apart from the first opening O1 and the second opening O2. The eighth opening O8 is located on the first imaginary line T1. The second conductor 22 is located between the eighth opening O8 and the third opening O3 in the x-direction. In other words, the second conductor 22 is sandwiched between the eighth opening O8 and the third opening O3 (more specifically, the first portion O11) in the x-direction. Therefore, when the second conductor 22 is a signal conductor, the volume of the substrate 1 surrounding the second conductor 22 can be further reduced. This further reduces the possibility of a further decrease in impedance value in the second conductor 22. Therefore, high-frequency signals can be transmitted through the second conductor 22 with low loss. The shape of the eighth opening O8 may be the same as or different from the shape of the seventh opening O7 and / or the first portion O11. In other words, the shape of the eighth opening O8 may be symmetrical to the shape of the seventh opening O7 with respect to the second virtual line T2.
[0056] 7, the depth D1 of the opening region z1 may be smaller than the distance in the x direction between the first conductor 21 and the second conductor 22. This reduces the possibility of a decrease in the strength of the substrate 1. The depth here refers to the maximum distance in the z direction from the first surface 1t to the bottom surface of the opening region z1. Note that when the opening region z1 penetrates the substrate 1, the depth D1 of the opening region z1 is equal to the thickness of the substrate 1.
[0057] When the opening region z1 does not penetrate the substrate 1, the bottom surface of the opening region z1 does not necessarily have to be flat. That is, the bottom surface of the opening region z1 may have a stepped shape in a cross-sectional view. For example, the third opening O3 of the first portion O11 may be deeper at a position where the first virtual line T1 and the second virtual line T2 overlap. Furthermore, the depth D1 of the opening region z1 does not have to be the same for each opening, such as the first opening O1, the second opening O2, and the third opening O3. Furthermore, a conductor may be exposed on at least a portion of the bottom surface of the opening region z1.
[0058] Second Embodiment A wiring board 101 according to a second embodiment will be described with reference to FIG. 8 . In a plan view, the opening region z1 may have a shape that follows the outer edge of the first conductor 21 and also follows the outer edge of the second conductor 22. This configuration allows the opening region z1 (more specifically, the first portion O11) to be closer to the first conductor 21 and the second conductor 22, reducing a decrease in impedance, while ensuring an area on the first surface 1t where the first conductor 21 and the second conductor 22 are formed. Here, "following" refers to at least a portion being spaced apart by a constant distance. For example, in one embodiment, the distance L121 between the first conductor 21 and the opening region z1 may be constant.
[0059] The substrate 1 may also have a circular outer edge 1e in a planar view. In this case, the distance L41 between the first conductor 21 and the outer edge 1e is smaller than the distance L42 between the second conductor 22 and the outer edge 1e. In other words, the first conductor 21 is located closer to the outer edge 1e than the second conductor 22. Here, the distance L41 between the first conductor 21 and the outer edge 1e can be defined as the distance in the x direction at which the tangent T4 to the outer edge 1e at a certain point is closest to the outer edge of the first conductor 21. The distance L42 between the second conductor 22 and the outer edge 1e can also be defined in the same way as above.
[0060] The opening region z1 may further include a sixth opening O6 spaced from the first conductor 21 in the x direction and located between the outer edge 1e and the first conductor 21. The sixth opening O6 may have a linear shape O6t extending along a tangent T4 to the outer edge 1e in a plan view. In one embodiment, the tangent T4 extends along the y direction. The tangent T4 does not necessarily have to be a tangent to the outer edge 1e closest to the first conductor 21. If the opening region z1 is positioned too close to the outer edge 1e, damage such as cracks may occur in the substrate 1. Therefore, the above configuration allows the sixth opening O6 to be as large as possible while maintaining a sufficient distance from the outer edge 1e. This reduces the possibility of a decrease in the strength of the substrate 1 and a decrease in the impedance value of the conductor portion 2.
[0061] 9 to 11, a wiring board 101 according to a third embodiment will be described. The conductor portion 2 may further include a third conductor 23 and a fourth conductor 24. The material and shape of the third conductor 23 and / or the fourth conductor 24 may be the same as or different from the material and shape of the first conductor 21 and / or the second conductor 22. The third conductor 23 and / or the fourth conductor 24 may be electrically connected to the first conductor 21 and / or the second conductor 22 within the substrate 1. The third conductor 23 and / or the fourth conductor 24 may all be signal conductors, or only one of them may be a signal conductor.
[0062] The terminal portion 3 may further include a third pin terminal 33 and a fourth pin terminal 34. The third pin terminal 33 is electrically connected to the third conductor 23 and extends above the first surface 1t. The fourth pin terminal 34 is electrically connected to the fourth conductor 24 and extends above the first surface 1t. The material and shape of the third pin terminal 33 and / or the fourth pin terminal 34 may be the same as or different from the material and shape of the first pin terminal 31 and / or the second pin terminal 32.
[0063] The third conductor 23 is positioned at a second distance L2 in the y direction from the first conductor 21. The fourth conductor 24 is positioned at a third distance L3 in the y direction from the second conductor 22. The third conductor 23 and the fourth conductor 24 are positioned at a fourth distance L4 in the x direction.
[0064] The second distance L2 and the third distance L3 may be equal. The first distance L1 and the fourth distance L4 may be equal. Furthermore, the first distance L1, the second distance L2, the third distance L3, and the fourth distance L4 may all be equal. In other words, the first conductors 21, the second conductors 22, the third conductors 23, and the fourth conductors 24 may be arranged in a lattice pattern on the first surface 1t. The first distance L1, the second distance L2, the third distance L3, and the fourth distance L4 may be 0.5 mm to 5 mm.
[0065] The first opening O1 is surrounded by the first conductor 21, the second conductor 22, the third conductor 23, and the fourth conductor 24. The distances from the first opening O1 to the outer edges of the first conductor 21, the second conductor 22, the third conductor 23, and the fourth conductor 24 may be equal.
[0066] The opening region z1 may further include a fourth opening O4 and a fifth opening O5. The fourth opening O4 is located on the opposite side of the first opening O1 from the second opening O2. The fifth opening O5 may be located on the second imaginary line T2 between the third conductor 23 and the fourth conductor 24 and connect the first opening O1 to the fourth opening O4. In other words, the opening region z1 (in other words, the first opening O1, the second opening O2, the third opening O3, the fourth opening O4, and the fifth opening O5) has the above configuration, extending in the y direction from at least between the first conductor 21 and the second conductor 22 to between the third conductor 23 and the fourth conductor 24. This reduces the volume of the substrate 1 around the first conductor 21, the second conductor 22, the third conductor 23, and the fourth conductor 24. This effectively reduces the possibility of a decrease in the impedance value of the conductor portion 2. In particular, when the first conductor 21, the second conductor 22, the third conductor 23, and the fourth conductor 24 are all signal conductors, the above-mentioned configuration can reduce the possibility of a decrease in impedance value, thereby enabling even higher frequency signals to be transmitted with lower loss. Furthermore, because the first opening O1, the second opening O2, the third opening O3, the fourth opening O4, and the fifth opening O5 are connected, the opening region z1 can be formed in one step, thereby reducing the number of steps of drilling holes in the substrate 1.
[0067] In a plan view, when a virtual line passing through the second conductor 22 and the third conductor 23 is defined as a third virtual line T3 and an intersection of the second virtual line T2 and the third virtual line T3 is defined as a first intersection p1, the opening region z1 may have a shape symmetrical with respect to the first intersection p1. With this configuration, it is possible to easily align the impedance values of the first conductor 21, the second conductor 22, the third conductor 23, and the fourth conductor 24.
[0068] Fourth Embodiment A wiring board 101 according to a fourth embodiment will be described with reference to FIG. 12 . In the fourth embodiment, the third conductor 23, the first conductor 21, the second conductor 22, and the fourth conductor 24 are arranged in this order in the x direction. In this case, the first conductor 21 and the second conductor 22 may be signal conductors, and the third conductor 23 and the fourth conductor 24 may be ground conductors. In this case, the third conductor 23, the first conductor 21, the second conductor 22, and the fourth conductor 24 form a so-called GSSG wiring.
[0069] In this case, a seventh opening O7 may be located between the first conductor 21 and the third conductor 23 in the x direction. Furthermore, an eighth opening O8 may be located between the second conductor 22 and the fourth conductor 24 in the x direction.
[0070] In the fourth embodiment, the opening region z1 may have a ninth opening O9 and a tenth opening O1a. In this case, as shown in Fig. 12, the third conductor 23 may be located between the seventh opening O7 and the ninth opening O9 in the x direction. Furthermore, the fourth conductor 24 may be located between the eighth opening O8 and the tenth opening O1a in the x direction.
[0071] The seventh opening O7 and the eighth opening O8 may have shapes symmetrical in the x direction with the first portion O11 in between. The ninth opening O9 and the tenth opening O1a may have shapes symmetrical in the x direction with the first portion O11 in between.
[0072] Fifth Embodiment The conductor portion 2 may further include a fifth conductor 25. A wiring substrate 101 according to a fifth embodiment will be described with reference to Fig. 13. The same parts as those in the fourth embodiment are denoted by the same reference numerals, and descriptions thereof may be omitted.
[0073] In the fifth embodiment, the third conductor 23, the first conductor 21, the second conductor 22, the fourth conductor 24, and the fifth conductor 25 are arranged in this order in the x direction. In this case, the first conductor 21 and the fourth conductor 24 may be signal conductors, and the third conductor 23, the fifth conductor 25, and the second conductor 22 may be ground conductors. In this case, it can be said that the third conductor 23, the first conductor 21, the second conductor 22, the fourth conductor 24, and the fifth conductor 25 form a so-called GSGSG wiring.
[0074] The opening region z1 may further include an eleventh opening O1b. In this case, as shown in FIG. 13 , the fifth conductor 25 may be located between the tenth opening O1a and the eleventh opening O1b in the x direction. Furthermore, the ninth opening O9 and the tenth opening O1a may be line-symmetric in the x direction with the second conductor 22 in between. Furthermore, the seventh opening O7 and the tenth opening O1a may be line-symmetric in the x direction with the second conductor 22 in between.
[0075] <Configuration of Electronic Component Mounting Board> In one embodiment, electronic component mounting board 10a includes wiring board 101 and electronic component connecting electrodes 4 located on second surface 1b opposite first surface 1t. First conductors 21 and second conductors 22 are electrically connected to electronic component connecting electrodes 4.
[0076] An electronic component 5 (described later) may be mounted directly on the electronic component connecting electrode 4, or may be mounted indirectly via a bonding wire, a lead terminal, or a flexible substrate. The terminal portion 3 and the conductor portion 2 are electrically connected to the electronic component 5 via the electronic component connecting electrode 4.
[0077] <Configuration of Electronic Module> In one embodiment, the electronic module 10 includes an electronic component mounting substrate 10 a and an electronic component 5 electrically connected to an electronic component connection electrode 4 .
[0078] The electronic component 5 may be a component that performs signal processing, such as converting a radio signal or an optical signal into an electrical signal, or converting an electrical signal into a radio signal or an optical signal. The electronic component 5 may be directly bonded to the substrate 1, or may be located on the second surface 1b via a submount. In other words, the electronic component 5 may be indirectly bonded to the substrate 1.
[0079] Examples of the electronic component 5 include optical semiconductor elements such as a semiconductor laser (LD: Laser Diode) or a photodiode (PD: Photodiode), semiconductor integrated circuit elements such as a field effect transistor (FET), and sensor elements such as an optical sensor. The electronic component 5 can be formed from a semiconductor material such as gallium arsenide or gallium nitride.
[0080] The electronic component 5 may be resin-sealed on the substrate 1. The electronic module 10 may also have a lid positioned to cover the substrate 1, in which case the electronic component 5 may be covered by the lid. Furthermore, if the electronic component 5 is a light-emitting element such as a semiconductor laser, a light-transmitting member such as a lens may be attached to the lid. Note that various combinations of the embodiments and modified examples are not limited to the examples of the above-described embodiments. Furthermore, combinations of the embodiments and modified examples are also possible.
[0081] The present disclosure can be used as a wiring board, a substrate for mounting electronic components using the wiring board, and an electronic module.
[0082] 1 Substrate 1t First surface 1b Second surface 1e Outer edge portion 2 Conductor portion 21 First conductor 22 Second conductor 23 Third conductor 24 Fourth conductor 25 Fifth conductor 3 Terminal portion 31 First pin terminal 311 Column portion 312 Base portion 31b Joint surface 32 Second pin terminal 33 Third pin terminal 34 Fourth pin terminal T1 First virtual line T2 Second virtual line T3 Third virtual line T4 Tangent line p1 First intersection z1 Opening area O11 First portion O1 First opening O2 Second opening O3 Third opening O4 Fourth opening O5 Fifth opening O6 Sixth opening O6t Linear shape O7 Seventh opening O8 Eighth opening O9 Ninth opening O1a Tenth opening O1b Eleventh opening D1 Depth of opening area L1 First distance L2 Second distance L3 Third distance L4 Fourth distance L121 Distance between first conductor and opening region L41 Distance between first conductor and outer edge L42 Distance between second conductor and outer edge 4A-B Electronic component connecting electrode 5 Electronic component 10 Electronic module 10a Electronic component mounting substrate 101 Wiring substrate
Claims
1. a substrate having a first surface and an open area located in the first surface; a conductor portion having a first conductor and a second conductor and located on the first surface; a terminal portion having a first pin terminal and a second pin terminal, the opening region has a first opening; the second conductor is positioned at a distance from the first conductor in a first direction; the first pin terminal is electrically connected to the first conductor and extends above the first surface; the second pin terminal is electrically connected to the second conductor and extends above the first surface; In a plan view, when a virtual line extending in the first direction and passing through the first conductor and the second conductor is defined as a first virtual line, and a virtual line extending in a second direction perpendicular to the first direction and passing through midpoints of the first conductor and the second conductor in the first direction is defined as a second virtual line, The first opening is located in the second direction with a space between it and the first conductor, the second conductor, and the first imaginary line, and is located on the second imaginary line.
2. the opening region further includes a second opening; The wiring board according to claim 1 , wherein the second opening is located on the opposite side of the first imaginary line from the first opening.
3. the opening region further includes a third opening; The wiring board according to claim 2 , wherein the third opening is located on the first imaginary line between the first conductor and the second conductor.
4. The wiring board according to claim 3 , wherein the third opening connects the first opening and the second opening in a plan view.
5. 5. The wiring board according to claim 3, wherein the dimension of the third opening in the first direction on the first virtual line is smaller than at least one of the maximum dimension of the first opening in the first direction and the maximum dimension of the second opening in the first direction.
6. The wiring board according to claim 2 , wherein the first opening and the second opening have a circular shape in a plan view.
7. In a plan view, at least one of the third openings has a rectangular shape, The wiring board according to claim 3 , wherein one of two opposing sides of the third opening is located along the second direction in plan view.
8. The wiring board according to claim 1 , wherein the opening region has a shape that follows an outer edge of the first conductor and also follows an outer edge of the second conductor in a plan view.
9. The wiring board according to claim 1 , wherein the opening region has a shape that is line-symmetrical with respect to the first imaginary line in a plan view.
10. the conductor portion further includes a third conductor and a fourth conductor; the terminal portion further includes a third pin terminal and a fourth pin terminal, the opening region further includes a fourth opening and a fifth opening; a distance between the second conductor and the first conductor in the first direction is defined as a first distance; the third conductor is positioned at a second distance from the first conductor in the second direction; the fourth conductor is positioned at a third distance from the second conductor in the second direction; the third conductor and the fourth conductor are positioned at a fourth distance in the first direction; the third pin terminal is electrically connected to the third conductor and extends above the first surface; the fourth pin terminal is electrically connected to the fourth conductor and extends above the first surface; the second distance and the third distance are equal, the first distance and the fourth distance are equal; the first opening is surrounded by the first conductor, the second conductor, the third conductor, and the fourth conductor; the fourth opening is located on the opposite side of the first opening from the second opening, 4. The wiring board according to claim 2, wherein the fifth opening is located between the third conductor and the fourth conductor on the second imaginary line and connects the first opening and the fourth opening.
11. In a plan view, when a virtual line passing through the second conductor and the third conductor is defined as a third virtual line, and an intersection of the second virtual line and the third virtual line is defined as a first intersection, The wiring board according to claim 10 , wherein the opening region has a shape symmetrical with respect to the first intersection point in a plan view.
12. the substrate has a circular outer edge in a plan view, a distance between the first conductor and the outer edge portion is smaller than a distance between the second conductor and the outer edge portion; the opening region further includes a sixth opening positioned with a space between the first conductor and the outer edge portion in the first direction, and the sixth opening is positioned between the outer edge portion and the first conductor; The wiring board according to claim 1 , wherein the sixth opening has a linear shape along a tangent to the outer edge portion in a plan view.
13. the opening region further includes a seventh opening spaced apart from the first opening and the second opening, the seventh opening is located on the first virtual line, The wiring board according to claim 3 , wherein the first conductor is located between the seventh opening and the third opening in the first direction.
14. the opening region further includes an eighth opening spaced apart from the first opening and the second opening, the eighth opening is located on the first virtual line, The wiring board according to claim 3 , wherein the second conductor is located between the eighth opening and the third opening in the first direction.
15. The wiring board according to claim 1 , wherein the depth of the opening region is smaller than the distance between the first conductor and the second conductor in the first direction.
16. The wiring board according to claim 1 or 2; an electronic component connecting electrode located on a second surface opposite to the first surface, The first conductor and the second conductor are electrically connected to the electronic component connecting electrode.
17. The electronic component mounting substrate according to claim 16 , an electronic component electrically connected to the electronic component connection electrode.