Electric power conversion apparatus

Abstract

The present invention addresses the problem of suppressing a voltage drop in a bootstrap circuit. A control unit (60) has: a first control mode in which a first switching element (Q1) is turned on, a second switching element (Q2) is turned on, a third switching element (Q3) is turned off, and a fourth switching element (Q4) is turned off; a second control mode in which the first switching element (Q1) is turned off, the second switching element (Q2) is turned on, the third switching element (Q3) is turned on, and the fourth switching element (Q4) is turned off; and a third control mode in which the first switching element (Q1) is turned off, the second switching element (Q2) is turned on, the third switching element (Q3) is turned off, and the fourth switching element (Q4) is turned on. When the polarity of the current flowing through an output terminal (41) is positive, the control unit (60) shifts, immediately after the third control mode, to the second mode and then to the first control mode.

Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device, and more particularly to a power conversion device including a bootstrap circuit.

[0002] Patent Document 1 discloses a switching element drive circuit for a three-level neutral point clamped inverter.

[0003] The neutral point clamped inverter disclosed in Patent Document 1 includes a series circuit (switching circuit) of a first switching element, a second switching element, a third switching element, and a fourth switching element, a first clamp diode (first diode), a second clamp diode (second diode), and a series circuit (DC power supply unit) of two smoothing capacitors that smooth the DC voltage and generate its neutral point potential.

[0004] The switching element drive circuit includes a first gate drive circuit (first gate driver) for driving the first switching element, a second gate drive circuit (second gate driver) for driving the second switching element, a third gate drive circuit (third gate driver) for driving the third switching element, and a fourth gate drive circuit (fourth gate driver) for driving the fourth switching element. Switching signals are input to the first gate drive circuit, the second gate drive circuit, the third gate drive circuit, and the fourth gate drive circuit from a control circuit (control unit).

[0005] The switching element drive circuit also includes a gate power supply (power supply unit). The negative terminal of the gate power supply is connected to the negative power supply line together with the negative terminal of the fourth gate drive circuit. The positive terminal of the gate power supply is connected to the positive terminal of the third gate drive circuit via a forward diode together with the positive terminal of the fourth gate drive circuit.

[0006] The negative terminal of the third gate drive circuit is connected to the common connection point of the third switching element and the fourth switching element, and a capacitor is connected in parallel to the third gate drive circuit.

[0007] In the power conversion device disclosed in Patent Document 1, which includes a three-level neutral point clamped inverter and a switching element drive circuit, a voltage drop in a bootstrap circuit including a capacitor and a diode connected in parallel to the third gate drive circuit can become a problem.

[0008] Japanese Patent Application Laid-Open No. 2018-133876

[0009] An object of the present disclosure is to provide a power conversion device capable of suppressing a voltage drop in a bootstrap circuit.

[0010] A power conversion device according to one aspect of the present disclosure includes a DC power supply unit, a switching circuit, a first diode, a second diode, an output terminal, a first gate driver, a second gate driver, a third gate driver, a fourth gate driver, a bootstrap circuit, a power supply unit, and a control unit. The DC power supply unit has a positive electrode, a negative electrode, and an intermediate potential point. The switching circuit includes a first switching element, a second switching element, a third switching element, and a fourth switching element. In the switching circuit, the first switching element, the second switching element, the third switching element, and the fourth switching element are connected in series between the positive electrode and the negative electrode in this order from the positive electrode side. The first diode has a cathode connected to a first connection point between the first switching element and the second switching element, and an anode connected to the intermediate potential point. The second diode has an anode connected to a second connection point between the third switching element and the fourth switching element and a cathode connected to the intermediate potential point. The output terminal is connected to a third connection point between the second switching element and the third switching element and is connected to an AC load. The first gate driver drives the first switching element. The second gate driver drives the second switching element. The third gate driver drives the third switching element. The fourth gate driver drives the fourth switching element. The bootstrap circuit supplies a voltage to the third gate driver. The power supply unit supplies a voltage to the bootstrap circuit and the fourth gate driver. The control unit controls the first gate driver, the second gate driver, the third gate driver, and the fourth gate driver. The control unit has a first control mode, a second control mode, and a third control mode. In the first control mode, the control unit turns on the first switching element, turns on the second switching element, turns off the third switching element, and turns off the fourth switching element.In the second control mode, the control unit turns off the first switching element, turns on the second switching element, turns on the third switching element, and turns off the fourth switching element. In the third control mode, the control unit turns off the first switching element, turns on the second switching element, turns off the third switching element, and turns on the fourth switching element. When the polarity of the current flowing through the output terminal is positive, the control unit transitions to the first control mode after passing through the second control mode immediately after the third control mode.

[0011] FIG. 1 is a circuit diagram of a system including a power conversion device according to an embodiment. FIG. 2 is an explanatory diagram of a current path in the power conversion device when the switching circuit is in a first switching state (when the control unit operates in a first control mode). FIG. 3 is an explanatory diagram of a discharge path and a charge path in the power conversion device when the switching circuit is in the first switching state. FIG. 4 is an explanatory diagram of a current path in the power conversion device when the switching circuit is in a second switching state. FIG. 5 is an explanatory diagram of a discharge path and a charge path in the power conversion device when the switching circuit is in the second switching state. FIG. 6 is an explanatory diagram of a current path in the power conversion device when the switching circuit is in a third switching state. FIG. 7 is an explanatory diagram of a discharge path and a charge path in the power conversion device when the switching circuit is in the third switching state. FIG. 8 is an explanatory diagram of a current path in the power conversion device when the switching circuit is in a fourth switching state. FIG. 9 is an explanatory diagram of a discharge path and a charge path in the power conversion device when the switching circuit is in the fourth switching state. FIG. 10 is an explanatory diagram of an output current waveform in the power conversion device. Fig. 11 is an explanatory diagram of the operation of the power conversion device of the same. Fig. 12 is an operational waveform diagram of the power conversion device of the same. Fig. 13 is an operational waveform diagram of the power conversion device of the same. Fig. 14 is an operational waveform diagram of the power conversion device of the same. Fig. 15 is an explanatory diagram of voltage command values ​​for each phase in the power conversion device of the same. Fig. 16 is an explanatory diagram of a group of voltage vectors related to the power conversion device of the same. Fig. 17 is a more detailed explanatory diagram of a group of voltage vectors related to the power conversion device of the same. Fig. 18 is a vector diagram for explaining the operation of a control unit in the power conversion device of the same. Fig. 19 is a circuit diagram of a system including a power conversion device according to a modified example.

[0012] (Embodiment) Hereinafter, a power conversion device 100 according to an embodiment will be described with reference to Figs.

[0013] (1) Overview As shown in Fig. 1 , for example, a power conversion device 100 includes a DC power supply unit 3, a plurality of (e.g., three) inverter circuits 1, and a control device 6. The DC power supply unit 3 has a positive electrode P1, a negative electrode N1, and an intermediate potential point M1. The plurality of inverter circuits 1 are connected between the positive electrode P1 and the negative electrode N1 of the DC power supply unit 3. The control device 6 controls the plurality of inverter circuits 1. The "intermediate potential point M1" is a point at an intermediate potential between the potential of the positive electrode P1 and the potential of the negative electrode N1 of the DC power supply unit 3.

[0014] The power conversion device 100 is a diode-clamped three-level three-phase inverter. In the power conversion device 100, each of a plurality of inverter circuits 1 has an output terminal 41. In the power conversion device 100, an AC load RA1 is connected to the plurality of output terminals 41.

[0015] The AC load RA1 is, for example, a three-phase motor. In the power conversion device 100, one of the multiple inverter circuits 1 is an inverter circuit 1U that outputs a U-phase voltage, another is an inverter circuit 1V that outputs a V-phase voltage, and the remaining is an inverter circuit 1W that outputs a W-phase voltage.

[0016] Each of the plurality of inverter circuits 1 includes a switching circuit 10 and a diode D1, a diode D2, a diode D3, and a diode D4. Each of the plurality of inverter circuits 1 also includes a diode (first diode) D5 (hereinafter also referred to as the first diode D5) and a diode D6 (hereinafter also referred to as the second diode D6). In the power conversion device 100, the potential of the intermediate potential point M1 is clamped by the first diode D5 and the second diode D6 of each inverter circuit 1.

[0017] Each switching circuit 10 has a first switching element Q1, a second switching element Q2, a third switching element Q3, and a fourth switching element Q4. In each switching circuit 10, the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 are connected in series from the positive electrode P1 side to the negative electrode N1 side of the DC power supply unit 3 in the order of the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4.

[0018] In each inverter circuit 1, the diode D1 is connected in anti-parallel to the first switching element Q1. The diode D2 is connected in anti-parallel to the second switching element Q2. The diode D3 is connected in anti-parallel to the third switching element Q3. The diode D4 is connected in anti-parallel to the fourth switching element Q4. The first diode D5 has its cathode connected to a first connection point 11 between the first switching element Q1 and the second switching element Q2, and its anode connected to the intermediate potential point M1. The second diode D6 has its anode connected to a second connection point 12 between the third switching element Q3 and the fourth switching element Q4, and its cathode connected to the intermediate potential point M1.

[0019] The control device 6 has a plurality of (e.g., three) first gate drivers 61, a plurality of (e.g., three) second gate drivers 62, a plurality of (e.g., three) third gate drivers 63, and a plurality of (e.g., three) fourth gate drivers 64. The control device 6 also has a plurality of (e.g., three) first bootstrap circuits 71, a plurality of (e.g., three) second bootstrap circuits 72, a plurality of (e.g., three) third bootstrap circuits 73, a power supply unit 9, and a control unit 60.

[0020] The plurality of first gate drivers 61 drive the first switching element Q1 of each of the plurality of inverter circuits 1. The plurality of second gate drivers 62 drive the second switching element Q2 of each of the plurality of inverter circuits 1. The plurality of third gate drivers 63 drive the third switching element Q3 of each of the plurality of inverter circuits 1. The plurality of fourth gate drivers 64 drive the fourth switching element Q4 of each of the plurality of inverter circuits 1.

[0021] The plurality of first bootstrap circuits 71 correspond one-to-one to the plurality of first gate drivers 61. Each of the plurality of first bootstrap circuits 71 supplies a voltage to the corresponding first gate driver 61. The plurality of second bootstrap circuits 72 correspond one-to-one to the plurality of second gate drivers 62. Each of the plurality of second bootstrap circuits 72 supplies a voltage to the corresponding second gate driver 62. The plurality of third bootstrap circuits 73 correspond one-to-one to the plurality of third gate drivers 63. Each of the plurality of third bootstrap circuits 73 supplies a voltage to the corresponding third gate driver 63. The power supply unit 9 supplies a voltage to the plurality of fourth gate drivers 64.

[0022] The control unit 60 controls a plurality of first gate drivers 61 , a plurality of second gate drivers 62 , a plurality of third gate drivers 63 and a plurality of fourth gate drivers 64 .

[0023] (2) Details of the Power Conversion Device The DC power supply unit 3 includes a first capacitor C1 and a second capacitor C2. In the DC power supply unit 3, the first capacitor C1 and the second capacitor C2 are connected in series. The DC power supply unit 3 further includes a first DC terminal 31 connected to the positive electrode P1 and a second DC terminal 32 connected to the negative electrode N1. In the DC power supply unit 3, a first end of the first capacitor C1 is connected to the first DC terminal 31, a second end of the first capacitor C1 is connected to a first end of the second capacitor C2, and a second end of the second capacitor C2 is connected to the second DC terminal 32. In the DC power supply unit 3, the connection point between the first capacitor C1 and the second capacitor C2 is an intermediate potential point M1. For example, a DC voltage source E1 is connected between the first DC terminal 31 and the second DC terminal 32. In this case, the output voltage Vdc of the DC voltage source E1 is applied between the positive electrode P1 and the negative electrode N1 of the DC power supply unit 3. The capacitance of the second capacitor C2 is the same as the capacitance of the first capacitor C1. The phrase "the capacitance of the second capacitor C2 is the same as the capacitance of the first capacitor C1" does not necessarily mean that the capacitance of the second capacitor C2 exactly matches the capacitance of the first capacitor C1, but may mean that the capacitance of the second capacitor C2 is within a range of 95% to 105% of the capacitance of the first capacitor C1.

[0024] Hereinafter, for convenience of explanation, with regard to the multiple switching circuits 10, the switching circuit 10 included in inverter circuit 1U may be referred to as switching circuit 10U, the switching circuit 10 included in inverter circuit 1V may be referred to as switching circuit 10V, and the switching circuit 10 included in inverter circuit 1W may be referred to as switching circuit 10W. Furthermore, of the multiple output terminals 41, the output terminal 41 included in inverter circuit 1U may be referred to as output terminal 41U, the output terminal 41 included in inverter circuit 1V may be referred to as output terminal 41V, and the output terminal 41 included in inverter circuit 1W may be referred to as output terminal 41W.

[0025] The first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 of each switching circuit 10 have a control terminal, a first main terminal, and a second main terminal. The first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 of each switching circuit 10 are, for example, MOSFETs. Therefore, the control terminal, the first main terminal, and the second main terminal of each of the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 of each switching circuit 10 are, for example, normally-off n-channel MOSFETs. The MOSFETs constituting each of the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 of each switching circuit 10 are, for example, normally-off n-channel MOSFETs. While the MOSFETs are Si-based MOSFETs, they are not limited to Si-based MOSFETs and may be, for example, SiC-based MOSFETs.

[0026] A control terminal of the first switching element Q1 of each switching circuit 10 is connected to a corresponding one of the plurality of first gate drivers 61. A control terminal of the second switching element Q2 of each switching circuit 10 is connected to a corresponding one of the plurality of second gate drivers 62. A control terminal of the third switching element Q3 of each switching circuit 10 is connected to a corresponding one of the plurality of third gate drivers 63. A control terminal of the fourth switching element Q4 of each switching circuit 10 is connected to a corresponding one of the plurality of fourth gate drivers 64.

[0027] In each switching circuit 10, a first main terminal of a first switching element Q1 is connected to a positive electrode P1 of the DC power supply 3, and a second main terminal of the first switching element Q1 is connected to a first main terminal of a second switching element Q2. In each switching circuit 10, a second main terminal of the second switching element Q2 is connected to a first main terminal of a third switching element Q3. In each switching circuit 10, a second main terminal of the third switching element Q3 is connected to a first main terminal of a fourth switching element Q4, and a second main terminal of the fourth switching element Q4 is connected to a negative electrode N1 of the DC power supply 3.

[0028] In the inverter circuit 1U, a third connection point 13 between the second switching element Q2 and the third switching element Q3 in the switching circuit 10U is connected to the output terminal 41U. In the inverter circuit 1V, a third connection point 13 between the second switching element Q2 and the third switching element Q3 in the switching circuit 10V is connected to the output terminal 41V. In the inverter circuit 1W, a third connection point 13 between the second switching element Q2 and the third switching element Q3 in the switching circuit 10W is connected to the output terminal 41W. The third connection point 13 of the inverter circuit 1U is connected to, for example, the U-phase of the AC load RA1 via the output terminal 41U. The third connection point 13 of the inverter circuit 1V is connected to, for example, the V-phase of the AC load RA1 via the output terminal 41V. The third connection point 13 of the inverter circuit 1W is connected to, for example, the W-phase of the AC load RA1 via the output terminal 41W.

[0029] In each inverter circuit 1, the anode of diode D1 is connected to the second main terminal (source terminal) of the first switching element Q1, and the cathode of diode D1 is connected to the first main terminal (drain terminal) of the first switching element Q1. In each inverter circuit 1, the anode of diode D2 is connected to the second main terminal (source terminal) of the second switching element Q2, and the cathode of diode D2 is connected to the first main terminal (drain terminal) of the second switching element Q2. In each inverter circuit 1, the anode of diode D3 is connected to the second main terminal (source terminal) of the third switching element Q3, and the cathode of diode D3 is connected to the first main terminal (drain terminal) of the third switching element Q3. In each inverter circuit 1, the anode of diode D4 is connected to the second main terminal (source terminal) of the fourth switching element Q4, and the cathode of diode D4 is connected to the first main terminal (drain terminal) of the fourth switching element Q4.

[0030] In each inverter circuit 1, the diode D1 may be substituted with a parasitic diode of the MOSFET that constitutes the first switching element Q1. In each inverter circuit 1, the diode D2 may be substituted with a parasitic diode of the MOSFET that constitutes the second switching element Q2. In each inverter circuit 1, the diode D3 may be substituted with a parasitic diode of the MOSFET that constitutes the third switching element Q3. In each inverter circuit 1, the diode D4 may be substituted with a parasitic diode of the MOSFET that constitutes the fourth switching element Q4.

[0031] In each inverter circuit 1, the cathode of the first diode D5 is connected to a first connection point 11 between the first switching element Q1 and the second switching element Q2. The anode of the first diode D5 is connected to an intermediate potential point M1 of the DC power supply unit 3. In this embodiment, the intermediate potential point M1 is connected to ground, and therefore the potential of the intermediate potential point M1 is 0 V. In this case, when the voltage across the DC power supply unit 3 is Vdc, the potential of the positive electrode P1 is Vdc / 2, and the potential of the negative electrode N1 is −Vdc / 2.

[0032] The cathode of the second diode D6 is connected to the intermediate potential point M1, and the anode of the second diode D6 is connected to the second connection point 12 between the third switching element Q3 and the fourth switching element Q4.

[0033] The plurality of first gate drivers 61 correspond one-to-one to the plurality of first switching elements Q1. Each of the plurality of first gate drivers 61 is connected to a control terminal of a corresponding first switching element Q1. Each of the plurality of first gate drivers 61 drives a corresponding first switching element Q1. The plurality of first gate drivers 61 are connected to a control unit 60. The control unit 60 outputs a plurality of first control signals S1 (see FIG. 2 ) that correspond one-to-one to the plurality of first gate drivers 61. Each of the plurality of first gate drivers 61 controls the on / off of the first switching element Q1 based on the provided first control signal S1.

[0034] The second gate drivers 62 correspond one-to-one to the second switching elements Q2. Each of the second gate drivers 62 is connected to a control terminal of a corresponding second switching element Q2. Each of the second gate drivers 62 drives a corresponding second switching element Q2. The second gate drivers 62 are connected to a control unit 60. The control unit 60 outputs second control signals S2 (see FIG. 2 ) that correspond one-to-one to the second gate drivers 62. Each of the second gate drivers 62 controls the on / off of the second switching element Q2 based on the second control signal S2 provided thereto.

[0035] The plurality of third gate drivers 63 correspond one-to-one to the plurality of third switching elements Q3. Each of the plurality of third gate drivers 63 is connected to a control terminal of a corresponding third switching element Q3. Each of the plurality of third gate drivers 63 drives a corresponding third switching element Q3. The plurality of third gate drivers 63 are connected to a control unit 60. The control unit 60 outputs a plurality of third control signals S3 (see FIG. 2 ) that correspond one-to-one to the plurality of third gate drivers 63. Each of the plurality of third gate drivers 63 controls the on / off of the third switching element Q3 based on the provided third control signal S3.

[0036] The plurality of fourth gate drivers 64 correspond one-to-one to the plurality of fourth switching elements Q4. Each of the plurality of fourth gate drivers 64 is connected to a control terminal of a corresponding fourth switching element Q4. Each of the plurality of fourth gate drivers 64 drives a corresponding fourth switching element Q4. The plurality of fourth gate drivers 64 are connected to a control unit 60. The control unit 60 outputs a plurality of fourth control signals S4 (see FIG. 2 ) that correspond one-to-one to the plurality of fourth gate drivers 64. Each of the plurality of fourth gate drivers 64 controls the on / off of the fourth switching element Q4 based on the received fourth control signal S4.

[0037] The first bootstrap circuits 71 correspond one-to-one to the first gate drivers 61. Each of the first bootstrap circuits 71 supplies a voltage to the corresponding first gate driver 61. Each of the first bootstrap circuits 71 includes a diode D17, a resistor R17, and a capacitor C17 (also referred to as a boost capacitor C17). In each first bootstrap circuit 71, the anode of the diode D17 is connected to the positive terminal of the power supply unit 9 via diodes D27 and D37, and the cathode of the diode D17 is connected to a first end of the capacitor C17 via the resistor R17. The first end of the capacitor C17 is connected to a high-potential power supply terminal 61H (see FIG. 3 ) of the first gate driver 61, and the second end of the capacitor C17 is connected to a low-potential power supply terminal 61L (see FIG. 3 ) of the first gate driver 61. The first bootstrap circuit 71 supplies a voltage required to turn on the first switching element Q1 in the first gate driver 61 to the first gate driver 61. Each of the multiple first bootstrap circuits 71 further includes a Zener diode Z17 connected in parallel to the capacitor C17.

[0038] The second bootstrap circuits 72 correspond one-to-one to the second gate drivers 62. Each of the second bootstrap circuits 72 supplies a voltage to the corresponding second gate driver 62. Each of the second bootstrap circuits 72 includes a diode D27, a resistor R27, and a capacitor C27 (also referred to as a boost capacitor C27). In each second bootstrap circuit 72, the anode of the diode D27 is connected to the positive terminal of the power supply unit 9 via a diode D37, and the cathode of the diode D27 is connected to a first end of the capacitor C27 via a resistor R27. The first end of the capacitor C27 is connected to a high-potential power supply terminal 62H (see FIG. 3 ) of the second gate driver 62, and the second end of the capacitor C27 is connected to a low-potential power supply terminal 62L (see FIG. 3 ) of the second gate driver 62. The second bootstrap circuit 72 supplies the second gate driver 62 with a voltage required to turn on the second switching element Q2 in the second gate driver 62. Each of the second bootstrap circuits 72 further includes a Zener diode Z27 connected in parallel to the capacitor C27.

[0039] The third bootstrap circuits 73 correspond one-to-one to the third gate drivers 63. Each of the third bootstrap circuits 73 supplies a voltage to the corresponding third gate driver 63. Each of the third bootstrap circuits 73 includes a diode D37, a resistor R37, and a capacitor C37 (also referred to as a boost capacitor C37). In each third bootstrap circuit 73, the anode of the diode D37 is connected to the positive terminal of the power supply unit 9, and the cathode of the diode D37 is connected to a first end of the capacitor C37 via the resistor R37. The first end of the capacitor C37 is connected to a high-potential power supply terminal 63H (see FIG. 3 ) of the third gate driver 63, and the second end of the capacitor C37 is connected to a low-potential power supply terminal 63L (see FIG. 3 ) of the third gate driver 63. The third bootstrap circuit 73 supplies the third gate driver 63 with a voltage required to turn on the third switching element Q3 in the third gate driver 63. Each of the plurality of third bootstrap circuits 73 further includes a Zener diode Z37 connected in parallel with the capacitor C37.

[0040] The power supply unit 9 supplies voltages to the plurality (three) of first bootstrap circuits 71, the plurality (three) of second bootstrap circuits 72, the plurality (three) of third bootstrap circuits 73, and the plurality (three) of fourth gate drivers 64. The power supply unit 9 is, for example, a DC power supply including an isolated DC-DC converter 91. A positive terminal of the power supply unit 9 is connected to the high-potential power supply terminal 64H (see FIG. 3) of each of the plurality of fourth gate drivers 64, and a negative terminal of the power supply unit 9 is connected to the low-potential power supply terminal 64L (see FIG. 3) of each of the plurality of fourth gate drivers 64.

[0041] The control unit 60 controls a plurality of first gate drivers 61, a plurality of second gate drivers 62, a plurality of third gate drivers 63, and a plurality of fourth gate drivers 64. Thus, the control unit 60 controls a plurality of first switching elements Q1, a plurality of second switching elements Q2, a plurality of third switching elements Q3, and a plurality of fourth switching elements Q4. The execution entity of the control unit 60 includes a computer system. The computer system has one or more computers. The computer system is primarily composed of a processor and memory as hardware. The processor executes a program stored in the memory of the computer system, thereby realizing the function of the control unit 60 as the execution entity in the present disclosure. The program may be pre-stored in the memory of the computer system, provided via a telecommunications line, or provided by being recorded on a non-transitory recording medium such as a memory card, optical disk, or hard disk drive (magnetic disk) readable by the computer system. The processor of the computer system is composed of one or more electronic circuits including a semiconductor integrated circuit (IC) or a large-scale integrated circuit (LSI). The electronic circuits may be integrated into a single chip or distributed across multiple chips. The plurality of chips may be integrated into one device, or may be distributed among a plurality of devices.

[0042] The control unit 60 outputs a plurality of (three) first control signals S1 (see FIG. 2 ) for controlling a plurality of (three) first switching elements Q1, a plurality of (three) second control signals S2 (see FIG. 2 ) for controlling a plurality of (three) second switching elements Q2, a plurality of (three) third control signals S3 (see FIG. 2 ) for controlling a plurality of third switching elements Q3, and a plurality of (three) fourth control signals S4 for controlling a plurality of (three) fourth switching elements Q4. Note that FIG. 2 illustrates only one inverter circuit 1 of the three inverter circuits 1 (see FIG. 1 ), and the remaining two inverter circuits 1 are not shown. Also, FIG. 2 does not illustrate a plurality of first gate drivers 61, a plurality of second gate drivers 62, a plurality of third gate drivers 63, a plurality of fourth gate drivers 64, a plurality of first bootstrap circuits 71, a plurality of second bootstrap circuits 72, a plurality of third bootstrap circuits 73, and the power supply unit 9 shown in FIG. 1 . 3 illustrates only one of the three inverter circuits 1 (see FIG. 1 ), and omits the illustration of the remaining two inverter circuits 1. Also, in FIG. 3 , the two first gate drivers 61, the two second gate drivers 62, the two third gate drivers 63, the two fourth gate drivers 64, the two first bootstrap circuits 71, the two second bootstrap circuits 72, and the two third bootstrap circuits 73 shown in FIG. 1 are omitted.

[0043] The three first control signals S1 include a first control signal S1U that controls the first switching element Q1 of the switching circuit 10U, a first control signal S1V that controls the first switching element Q1 of the switching circuit 10V, and a first control signal S1W that controls the first switching element Q1 of the switching circuit 10W.

[0044] The three second control signals S2 include a second control signal S2U that controls the second switching element Q2 of the switching circuit 10U, a second control signal S2V that controls the second switching element Q2 of the switching circuit 10V, and a second control signal S2W that controls the second switching element Q2 of the switching circuit 10W.

[0045] The three third control signals S3 include a third control signal S3U that controls the third switching element Q3 of the switching circuit 10U, a third control signal S3V that controls the third switching element Q3 of the switching circuit 10V, and a third control signal S3W that controls the third switching element Q3 of the switching circuit 10W.

[0046] The three fourth control signals S4 include a fourth control signal S4U that controls the fourth switching element Q4 of the switching circuit 10U, a fourth control signal S4V that controls the fourth switching element Q4 of the switching circuit 10V, and a fourth control signal S4W that controls the fourth switching element Q4 of the switching circuit 10W.

[0047] Each of the plurality of first control signals S1, the plurality of second control signals S2, the plurality of third control signals S3 and the plurality of fourth control signals S4 is, for example, a signal whose potential level changes between a first potential level (hereinafter also referred to as a low level) and a second potential level (hereinafter also referred to as a high level) that is higher than the first potential level.

[0048] The first potential level is, for example, 0 V, and the second potential level is a potential level greater than the gate threshold voltage of the MOSFET. That is, for each of the plurality of control signals (the plurality of first control signals S1, the plurality of second control signals S2, the plurality of third control signals S3, and the plurality of fourth control signals S4), the first potential level is a potential level for turning off the switching element corresponding to that control signal, and the second potential level is a potential level for turning on the switching element corresponding to that control signal.

[0049] Each of the plurality of first switching elements Q1 is turned on when the corresponding first control signal S1 is at a high level and turned off when it is at a low level. Each of the plurality of second switching elements Q2 is turned on when the corresponding second control signal S2 is at a high level and turned off when it is at a low level. Each of the plurality of third switching elements Q3 is turned on when the corresponding third control signal S3 is at a high level and turned off when it is at a low level. Each of the plurality of fourth switching elements Q4 is turned on when the corresponding fourth control signal S4 is at a high level and turned off when it is at a low level.

[0050] In the power conversion device 100, each of the multiple inverter circuits 1 is controlled to a first switching state, a second switching state, a third switching state, or a fourth switching state. That is, in the power conversion device 100, the switching state of the switching circuit 10 in each of the three inverter circuits 1U, 1V, and 1W is controlled to one of a first switching state, a second switching state, a third switching state, and a fourth switching state. The first switching state, the second switching state, the third switching state, and the fourth switching state differ in the combination of the on / off states of the first to fourth switching elements Q1 to Q4. In each of the multiple inverter circuits 1, the output voltage in the first switching state, the output voltage in the second switching state, and the output voltage in the third switching state differ from one another. That is, in each of the multiple inverter circuits 1, the potential level of the output voltage changes between three levels depending on the states of the first to fourth switching elements Q1 to Q4. Regarding the output voltages of the multiple inverter circuits 1, the output voltage of the U-phase inverter circuit 1U, the output voltage of the V-phase inverter circuit 1V, and the output voltage of the W-phase inverter circuit 1W are out of phase with each other.

[0051] The first switching state is a combination in which both the first switching element Q1 and the second switching element Q2 are in the ON state and both the third switching element Q3 and the fourth switching element Q4 are in the OFF state. When controlled to the first switching state, each of the multiple inverter circuits 1 can output an output voltage at the potential level of the positive electrode P1 of the DC power supply unit 3. In each of the multiple inverter circuits 1, in the first switching state, the potential of the third connection point 13 becomes the potential level of the positive electrode P1 of the DC power supply unit 3 (e.g., Vdc / 2).

[0052] The second switching state is a combination in which both the first switching element Q1 and the fourth switching element Q4 are in the off state and both the second switching element Q2 and the third switching element Q3 are in the on state. When controlled to the second switching state, each of the multiple inverter circuits 1 can output an output voltage at the potential level of the intermediate potential point M1 of the DC power supply unit 3. In each of the multiple inverter circuits 1 in the second switching state, the potential of the third connection point 13 becomes the potential level of the intermediate potential point M1 (e.g., 0).

[0053] The third switching state is a combination in which both the first switching element Q1 and the second switching element Q2 are in the OFF state and both the third switching element Q3 and the fourth switching element Q4 are in the ON state. When controlled to the third switching state, each of the multiple inverter circuits 1 can output an output voltage at the potential level of the negative electrode N1 of the DC power supply unit 3. In each of the multiple inverter circuits 1, in the third switching state, the potential of the third connection point 13 becomes the potential level of the negative electrode N1 of the DC power supply unit 3 (e.g., −Vdc / 2).

[0054] The fourth switching state is a combination in which both the second switching element Q2 and the fourth switching element Q4 are in the ON state and both the first switching element Q1 and the third switching element Q3 are in the OFF state. When controlled to the fourth switching state, each of the multiple inverter circuits 1 can output an output voltage at the potential level of the intermediate potential point M1 of the DC power supply unit 3. In each of the multiple inverter circuits 1, in the fourth switching state, the potential of the third connection point 13 becomes the potential level of the intermediate potential point M1 (e.g., 0).

[0055] When the switching circuit 10 of the inverter circuit 1 is in the first switching state, as shown in FIG. 2, a current I1 flows through the path of the positive electrode P1 of the DC power supply unit 3, the first switching element Q1, the second switching element Q2, the third connection point 13, and the output terminal 41, and the voltage value of the output voltage to the AC load RA1 (see FIG. 1) becomes approximately Vdc / 2.

[0056] Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the first switching state, a voltage required for the first gate driver 61 to turn on the first switching element Q1 is supplied from the capacitor C17 of the first bootstrap circuit 71 to the first gate driver 61. Therefore, as shown in FIG. 3 , the charge in the capacitor C17 of the first bootstrap circuit 71 is discharged through a discharge path Ru1 that connects the capacitor C17 to the high-potential power supply terminal 61H of the first gate driver 61, the low-potential power supply terminal 61L of the first gate driver 61, and the capacitor C17. As a result, in the first bootstrap circuit 71, the voltage across the capacitor C17 decreases over time.

[0057] Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the first switching state, a voltage required for the second gate driver 62 to turn on the second switching element Q2 is supplied from capacitor C27 of the second bootstrap circuit 72 to the second gate driver 62. Therefore, the charge in capacitor C27 of the second bootstrap circuit 72 is discharged via a discharge path Ru2 that runs from capacitor C27 to the high-potential power supply terminal 62H of the second gate driver 62 to the low-potential power supply terminal 62L of the second gate driver 62 and back to capacitor C27. As a result, in the second bootstrap circuit 72, the voltage across capacitor C27 decreases over time.

[0058] Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the first switching state, the capacitor C17 is charged by the capacitor C27 if a first condition is met. As shown in FIG. 3 , if the voltages across the capacitor C17 are Vo1, Vo2, Vd1, VR1, and Vf2, respectively, the first condition is Vo2 > (Vo1 + Vd1 + VR1 + Vf2). The charging path Ru21 along which the capacitor C17 is charged is the path of the capacitor C27, resistor R27, diode D17, resistor R17, capacitor C17, first node 11, second switching element Q2, and capacitor C27.

[0059] 4, when the switching circuit 10 of the inverter circuit 1 is in the second switching state and the polarity of the output current is positive, a current I1 flows through a path (indicated by a thick solid arrow) of the intermediate potential point M1 of the DC power supply unit 3, the first diode D5, the second switching element Q2, the third connection point 13, and the output terminal 41, and the voltage value of the output voltage to the AC load RA1 becomes 0. More specifically, when the switching circuits 10U, 10V, and 10W are in the second switching state, the third switching state, and the third switching state, respectively, a current I1 flows through a path of the intermediate potential point M1 of the DC power supply unit 3, the first diode D5 of the inverter circuit 1U, the second switching element Q2 of the switching circuit 10U, the third connection point 13, and the output terminal 41.

[0060] 4, when the switching circuit 10 of the inverter circuit 1 is in the second switching state and the polarity of the output current is negative, a current I1 flows through a path (indicated by a thick dashed arrow) of the output terminal 41-the third node 13-the third switching element Q3-the second node 12-the second diode D6, and the voltage value of the output voltage to the AC load RA1 becomes 0. More specifically, when the switching circuits 10U, 10V, and 10W are in the second switching state, the second switching state, and the first switching state, respectively, in the inverter circuit 1U, a current I1 flows through a path (indicated by a thick dashed arrow) of the output terminal 41-the third node 13-the third switching element Q3-the second node 12-the second diode D6, and the voltage value of the output voltage to the AC load RA1 becomes 0.

[0061] Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the second switching state, a voltage required for turning on the second switching element Q2 is supplied from capacitor C27 of the second bootstrap circuit 72 to the second gate driver 62 by the second gate driver 62. Therefore, the charge in capacitor C27 of the second bootstrap circuit 72 is discharged along a discharge path Ru2 that connects capacitor C27 to the high-potential power supply terminal 62H of the second gate driver 62, the low-potential power supply terminal 62L of the second gate driver 62, and then capacitor C27, as shown in FIG. 5 . Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the second switching state, a voltage required for turning on the third switching element Q3 is supplied from capacitor C37 of the third bootstrap circuit 73 to the third gate driver 63 by the third gate driver 63. Therefore, the charge in the capacitor C37 of the third bootstrap circuit 73 is discharged through a discharge path Ru3 that runs from the capacitor C37 to the high potential power supply terminal 63H of the third gate driver 63 to the low potential power supply terminal 63L of the third gate driver 63 and back to the capacitor C37.

[0062] Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the second switching state, the capacitor C27 is charged by the capacitor C37 when the second condition is met, and the capacitor C17 is charged by the capacitor C27 when the third condition is met. As shown in Fig. 5, if the voltages across the capacitors C17, C27, and C37 are Vo1, Vo2, and Vo3, respectively, the voltages across the diodes D17 and D27 are Vd1 and Vd2, respectively, the voltages across the resistors R17 and R27 are VR1 and VR2, respectively, and the voltages across the second switching element Q2 and the third switching element Q3 are Vf2 and Vf3, respectively, the second condition is Vo3 > (Vo2 + Vd2 + VR2 + Vf3). The third condition is Vo2 > (Vo1 + Vd1 + VR1 + Vf2). A charging path Ru32 through which the capacitor C27 is charged by the capacitor C37 is a path of the capacitor C37-resistor R37-diode D27-resistor R27-capacitor C27-third node 13-third switching element Q3-capacitor C37. A charging path Ru21 through which the capacitor C17 is charged by the capacitor C27 is a path of the capacitor C27-resistor R27-diode D17-resistor R17-capacitor C17-first node 11-second switching element Q2-capacitor C27.

[0063] 6, when the switching circuit 10 of the inverter circuit 1 is in the third switching state, current I1 flows through the path from the output terminal 41 to the third connection point 13, the third switching element Q3, the fourth switching element Q4, and the negative pole N1 of the DC power supply unit 3, resulting in an output voltage value of −Vdc / 2 to the AC load RA1. When the switching circuit 10 of the inverter circuit 1 is in the third switching state, capacitor C37 charges capacitor C27 of the second bootstrap circuit 72 (see FIG. 1), causing the voltage of capacitor C27 to increase over time until capacitor C27 is fully charged. When the switching circuit 10 of the inverter circuit 1 is in the third switching state, capacitor C37 of the third bootstrap circuit 73 supplies the third gate driver 63 with the voltage required to turn on the third switching element Q3. 7, the charge in capacitor C37 of the third bootstrap circuit 73 is discharged along a discharge path Ru3 that connects capacitor C37 to the high potential power supply terminal 63H of the third gate driver 63 to the low potential power supply terminal 63L of the third gate driver 63 and then to capacitor C37. Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the third switching state, capacitor C37 is charged by the power supply unit 9 if the fourth condition is met, and capacitor C27 is charged by capacitor C37 if the fifth condition is met. 7 , the voltage across the power supply unit 9 is Voo, the voltages across the capacitors C27 and C37 are Vo2 and Vo3, the voltages across the diodes D27 and D37 are Vd2 and Vd3, the voltages across the resistors R27 and R37 are VR2 and VR3, and the voltages across the third switching element Q3 and the fourth switching element Q4 are Vf3 and Vf4. The fourth condition is Voo > (Vo3 + Vd3 + VR3 + Vf4). The fifth condition is Vo3 > (Vo2 + Vd2 + VR2 + Vf3). The charging path Ru93 along which the power supply unit 9 charges the capacitor C37 is the path from the positive terminal of the power supply unit 9 to the diode D37, the resistor R37, the capacitor C37, the second node 12, the fourth switching element Q4, and the negative terminal of the power supply unit 9.A charging path Ru32 for charging the capacitor C27 by the capacitor C37 is a path of the capacitor C37-resistor R37-diode D27-resistor R27-capacitor C27-third node 13-third switching element Q3-capacitor C37.

[0064] Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the fourth switching state, as shown in FIG. 8, a current I1 flows through the path of the intermediate potential point M1 of the DC power supply unit 3, the first diode D5, the second switching element Q2, the third connection point 13, and the output terminal 41, and the voltage value of the output voltage to the AC load RA1 becomes 0.

[0065] Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the fourth switching state, a voltage required for the second gate driver 62 to turn on the second switching element Q2 is supplied from capacitor C27 of the second bootstrap circuit 72 to the second gate driver 62 by the second gate driver 62. Therefore, as shown in FIG. 9 , the charge in capacitor C27 of the second bootstrap circuit 72 is discharged along a discharge path Ru2 from capacitor C27 to the high-potential power supply terminal 62H of the second gate driver 62 to the low-potential power supply terminal 62L of the second gate driver 62 to capacitor C27. Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the fourth switching state, a voltage required for the fourth gate driver 64 to turn on the fourth switching element Q4 is supplied from the power supply unit 9 to the fourth gate driver 64 by the fourth gate driver 64. Furthermore, when the switching circuit 10 of the inverter circuit 1 is in the fourth switching state, capacitor C37 is charged by the power supply unit 9. As shown in Figure 9, the charging path Ru93 for charging the capacitor C37 by the power supply unit 9 is a path from the positive terminal of the power supply unit 9 - diode D37 - resistor R37 - capacitor C37 - second connection point 12 - fourth switching element Q4 - negative terminal of the power supply unit 9.

[0066] The control unit 60 has a first control mode, a second control mode, and a third control mode.

[0067] In the first control mode, the control unit 60 turns on the first switching element Q1, turns on the second switching element Q2, turns off the third switching element Q3, and turns off the fourth switching element Q4. More specifically, in the first control mode, the control unit 60 controls the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 so that the switching circuit 10 is in the first switching state.

[0068] In the second control mode, the control unit 60 turns off the first switching element Q1, turns on the second switching element Q2, turns on the third switching element Q3, and turns off the fourth switching element Q4. More specifically, in the second control mode, the control unit 60 controls the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 so that the switching circuit 10 is in the second switching state.

[0069] In the third control mode, the control unit 60 turns off the first switching element Q1, turns on the second switching element Q2, turns off the third switching element Q3, and turns on the fourth switching element Q4. More specifically, in the third control mode, the control unit 60 controls the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 so that the switching circuit 10 is in a fourth switching state.

[0070] In the inverter circuit 1, when the polarity of the output current (current I1) flowing through the output terminal 41 is defined as positive when it flows from the third connection point 13 to the output terminal 41 and negative when it flows from the output terminal 41 to the third connection point 13, the waveform of the output current is sinusoidal, for example, as shown in Fig. 10. The U-phase output current, the V-phase output current, and the W-phase output current are sinusoidal currents that are, for example, 120° out of phase with each other.

[0071] When the polarity of the current flowing through the output terminal 41 is positive, the control unit 60 alternates between the first control mode and the second control mode. Here, as shown in FIG. 11 , when transitioning from the first control mode to the second control mode, the control unit 60 performs control in the third control mode between the first control mode and the second control mode. Therefore, immediately after the third control mode, the control unit 60 transitions to the first control mode via the second control mode. Note that in FIG. 11 , the low level and the high level of the potential levels of the first control signal S1, the second control signal S2, the third control signal S3, and the fourth control signal S4 are represented as "L" and "H," respectively.

[0072] The control unit 60 also sets a dead time period Td between the period when the potential level of the control signal S4 is high and the period when the potential level of the control signal S3 is high so that the on-period of the fourth switching element Q4 does not overlap with the on-period of the third switching element Q3. The control unit 60 also sets a dead time period Td between the period when the potential level of the control signal S1 is high and the period when the potential level of the control signal S4 is high so that the on-period of the first switching element Q1 does not overlap with the on-period of the fourth switching element Q4. The control unit 60 also sets a dead time period Td between the period when the potential level of the control signal S3 is high and the period when the potential level of the control signal S1 is high so that the on-period of the third switching element Q3 does not overlap with the on-period of the first switching element Q1. The length of the dead time period Td may be zero. Furthermore, in the power conversion device 100 according to this embodiment, in the third control mode, the control unit 60 sets the length T4 of the on-period of the fourth switching element Q4 to be equal to or greater than 90% and equal to or less than 110% of the CR time constant of the third bootstrap circuit 73 that supplies a voltage to the third gate driver 63. In the power conversion device 100 according to this embodiment, the CR time constant of the third bootstrap circuit 73 is determined by the capacitance of the capacitor C37 and the resistance value of the resistor R37 of the third bootstrap circuit 73.

[0073] The control unit 60 also has a fourth control mode. In the fourth control mode, the control unit 60 turns off the first switching element Q1, turns off the second switching element Q2, turns on the third switching element Q3, and turns on the fourth switching element Q4. More specifically, in the fourth control mode, the control unit 60 controls the first switching element Q1, the second switching element Q2, the third switching element Q3, and the fourth switching element Q4 so that the switching circuit 10 is in a third switching state.

[0074] When the polarity of the output current (current I1) flowing through the output terminal 41 is negative, the control unit 60 alternates between the second control mode and the fourth control mode.

[0075] 12 shows waveforms of the current I1, the voltage Vo1 across the capacitor C17, the voltage Vo2 across the capacitor C27, and the voltage Vo3 across the capacitor C37 during a period when the polarity of the output current flowing through the output terminal 41 is positive in this example. Note that FIG. 12 shows an example in which the switching frequency is set to 20 kHz and the frequency of the output current (current I1) is set to 50 Hz. Also, FIG. 12 shows an example in which the length of the dead time period Td is set to 0.

[0076] FIG. 13 also shows the waveforms of the current I1, the control signal S3, the control signal S4, the voltage VQ3 across the third switching element Q3, the voltage VQ4 across the fourth switching element Q4, the voltage Vo1 across the capacitor C17, the voltage Vo2 across the capacitor C27, and the voltage Vo3 across the capacitor C37 for a portion of the period during which the polarity of the output current flowing through the output terminal 41 is positive in the above embodiment.

[0077] In Fig. 13, the period between time t1 and time t2 is the period during which the control mode of the control unit 60 is the second control mode. In Fig. 13, the period between time t2 and time t3 is the period during which the control mode of the control unit 60 is the first control mode. In Fig. 13, the period between time t3 and time t4 is the period during which the control mode of the control unit 60 is the third control mode. In Fig. 13, the period between time t4 and time t5 is the period during which the control mode of the control unit 60 is the second control mode.

[0078] From FIG. 13, it can be seen that the capacitor C37 of the third bootstrap circuit 73 is charged during each period in which the control unit 60 is performing control in the third control mode, and a decrease in the voltage of the third bootstrap circuit 73 (the voltage Vo3 across the capacitor C37) is suppressed.

[0079] FIG. 14 shows waveforms of the current I1, the voltage Vo1 across the capacitor C17 of the first bootstrap circuit 71, the voltage Vo2 across the capacitor C27 of the second bootstrap circuit 72, and the voltage Vo3 across the capacitor C37 of the third bootstrap circuit 73 for the above-described example and comparative example. In the comparative example, the control unit 60 does not have the third control mode, and the first control mode and the second control mode are alternately repeated during periods when the output current is positive. In FIG. 14, "A0" represents the waveform of the current I1 in the above-described example. The current I1 in the comparative example is not reduced from the current I1 in the above-described example and overlaps with "A0," so it is not shown. Regarding the voltage Vo1 across the capacitor C17 of the first bootstrap circuit 71, "A1" represents the waveform in the above-described example, and "B1" represents the waveform in the above-described comparative example. Regarding the voltage Vo2 across the capacitor C27 of the second bootstrap circuit 72, "A2" shows the waveform in the above-described example, and "B2" shows the waveform in the above-described comparative example. Regarding the voltage Vo3 across the capacitor C37 of the third bootstrap circuit 73, "A3" shows the waveform in the above-described example, and "B3" shows the waveform in the above-described comparative example.

[0080] 14 shows that in the above example, the voltage Vo1 across capacitor C17, the voltage Vo2 across capacitor C27, and the voltage Vo3 across capacitor C37 can be suppressed without affecting the output current, as compared to the above comparative example, which makes it possible to maintain the voltages required for the first gate driver 61, the second gate driver 62, and the third gate driver 63.

[0081] The control unit 60 employs voltage vector control as a control method. The voltage vector control performed by the control unit 60 will be described below with reference to FIGS.

[0082] The control unit 60 generates first to fourth control signals S1U to S4U, first to fourth control signals S1V to S4V, and first to fourth control signals S1W to S4W based on voltage commands Vu, Vv, and Vw (see FIG. 15) related to the output voltages of the inverter circuits 1U, 1V, and 1W, respectively. The first to fourth control signals S1U to S4U are the first to fourth control signals S1 to S4 for the first to fourth switching elements Q1 to Q4 of the inverter circuit 1U. The first to fourth control signals S1V to S4V are the first to fourth control signals S1 to S4 for the first to fourth switching elements Q1 to Q4 of the inverter circuit 1V. The first to fourth control signals S1W to S4W are the first to fourth control signals S1 to S4 for the first to fourth switching elements Q1 to Q4 of the inverter circuit 1W.

[0083] As shown in FIG. 15 , the voltage commands Vu, Vv, and Vw are sinusoidal signals whose phases are, for example, 120° apart, and whose values ​​(voltage command values) change over time. The voltage commands Vu, Vv, and Vw each have the same cycle length. The control unit 60 may perform proportional integral (PI) control of the voltage commands Vu, Vv, and Vw based on information output from a detector 8 (see FIG. 1 ) that detects the state of the AC load RA1. If the AC load RA1 is a three-phase motor, the information output from the detector 8 may include, for example, at least one of the following: information on the detection results of multiple current sensors that detect the output currents flowing through the U, V, and W phases of the AC load RA1; and information on the detection results of an encoder that detects the rotation speed, rotation angle, etc. of the three-phase motor.

[0084] Below, we will explain the operation of one of the three inverter circuits 1 (for example, the U-phase inverter circuit 1U). The operations of the V-phase inverter circuit 1V and the W-phase inverter circuit 1W are similar to the operation of the U-phase inverter circuit 1U. The output voltages of the U-phase inverter circuit 1U, the V-phase inverter circuit 1V, and the W-phase inverter circuit 1W are out of phase with each other.

[0085] The control unit 60 controls a plurality of first gate drivers 61, a plurality of second gate drivers 62, a plurality of third gate drivers 63, and a plurality of fourth gate drivers 64 by performing voltage vector control.

[0086] The voltage vector control by the control unit 60 will be described in more detail below.

[0087] The control unit 60 stores a group of voltage vectors in advance. Each of the group of voltage vectors is determined by a combination of the potential levels of the connection point (third connection point 13) between the second switching element Q2 and the third switching element Q3 of the multiple inverter circuits 1. In other words, the group of voltage vectors is determined by the switching state of the switching circuit 10U corresponding to the U phase, the switching state of the switching circuit 10V corresponding to the V phase, and the switching state of the switching circuit 10W corresponding to the W phase. The number of voltage vectors included in the group of voltage vectors is 3. ３ = 27 pieces.

[0088] As shown in FIG. 16, the group of voltage vectors includes three zero vectors V0p, V0n, and V0o, each of which has a magnitude of zero. The group of voltage vectors also includes three zero vectors V0p, V0n, and V0o, each of which has a magnitude of (2 / 3) １／２ The group of voltage vectors includes six voltage vectors V1, V2, V3, V4, V5, and V6, each of which is 2 Vdc and points in different directions. The magnitude of each of the voltage vectors is (2 / 3) １／２ The group of voltage vectors includes 12 voltage vectors V7p, V7n, V8p, V8n, V9p, V9n, V10p, V10n, V11p, V11n, V12p, and V12n, each of which has a magnitude of (2 / 3) １／２ ・3 １／２- Includes six voltage vectors V13, V14, V15, V16, V17, and V18 that are Vdc and have different directions. In Figure 16, the angle between any two adjacent voltage vectors among the six voltage vectors V1, V2, V3, V4, V5, and V6 is 60 degrees. Also, the angle between any two adjacent voltage vectors among the six voltage vectors V13, V14, V15, V16, V17, and V18 is 60 degrees. Note that Figure 16 is a vector diagram illustrating a group of voltage vectors on an orthogonal d-q coordinate system.

[0089] A group of voltage vectors can be expressed as shown in FIG. 17 by representing the first switching state, the second switching state, and the third switching state with the symbols "P," "0," and "N," respectively, and notating the U phase, V phase, and W phase in that order.

[0090] As shown in FIG. 17 , three zero vectors V0p, V0n, and V0o can be expressed as V0p[PPP], V0n[NNN], and V0o

[000] , respectively. For example, V0p[PPP] represents that, with respect to the zero vector V0p, the switching state of the U-phase switching circuit 10U is "P," the switching state of the V-phase switching circuit 10V is "P," and the switching state of the W-phase switching circuit 10W is "P." For example, a voltage vector with a "p" appended, such as V10p, includes "P" but does not include "N." This also applies hereinafter. A voltage vector with a "n" appended, such as V10n, includes "N" but does not include "P." This also applies hereinafter. A voltage vector with a "o" appended, such as V0o, includes "0" and does not include "P" or "N." When the switching state of the switching circuit 10 is "P", the potential of the third connection point 13 in the switching circuit 10 becomes the potential of the positive electrode P1 of the DC power supply unit 3. When the switching state of the switching circuit 10 is "N", the potential of the third connection point 13 in the switching circuit 10 becomes the potential of the negative electrode N1 of the DC power supply unit 3. When the switching state of the switching circuit 10 is "0", the potential of the third connection point 13 in the switching circuit 10 becomes the potential of the intermediate potential point M1 of the DC power supply unit 3.

[0091] Furthermore, the six voltage vectors V1, V2, V3, V4, V5, and V6 can be expressed as V1[PNN], V2[PPN], V3[NPN], V4[NPP], V5[NNP], and V6[PNP], respectively. Voltage vectors that do not have "p," "n," or "o" added after the number added to "V," such as V1[PNN], V2[PPN], V3[NPN], V4[NPP], V5[NNP], and V6[PNP], include "P" and "N" as the switching states of the three phases.

[0092] Furthermore, the 12 voltage vectors V7p, V7n, V8p, V8n, V9p, V9n, V10p, V10n, V11p, V11n, V12p, and V12n can be expressed as V7p[P00], V7n[0NN], V8p[PP0], V8n[00N], V9p[0P0], V9n[N0N], V10p[0PP], V10n[N00], V11p[00P], V11n[NN0], V12p[P0P], and V12n[0N0], respectively.

[0093] Furthermore, the six voltage vectors V13, V14, V15, V16, V17, and V18 can be expressed as V13[P0N], V14[0PN], V15[NP0], V16[NOP], V17[0NP], and V18[PN0], respectively.

[0094] The control unit 60 calculates the instantaneous value of the command voltage for each output voltage of the plurality of inverter circuits 1 as a command voltage vector V ＊ (See FIG. 18) The command voltage vector V ＊ The d-axis component of the orthogonal d-q coordinate system is Vd, and the command voltage vector V ＊ If the q-axis component on the orthogonal d-q coordinate system is Vq, then the command voltage vector V ＊ can be calculated using equation (1).

[0095]

[0096] The control unit 60 selects a command voltage vector V ＊In the example of Fig. 18, the voltage vectors are V8p[PP0], V8n[00N], V13[P0N], V7p[P00], and V7n[0NN].

[0097] Command voltage vector V ＊ The voltage vector closest to the ＊ The angle between them is less than 30 degrees.

[0098] The control unit 60 calculates the command voltage vector V within a predetermined control period Ts. ＊ The resultant vector of the vectors at the vertices of the equilateral triangle surrounding ＊ That is, the control unit 60 converts the resultant vector of the voltage vector VV1 (V8p[PP0] and V8n[00N] in the example of FIG. 18), the voltage vector V13[P0N], and the voltage vectors V7p[P00] and V7n[0NN] into the command voltage vector V ＊ The control period Ts is one period of the carrier signal. In the control unit 60, in the two voltage vectors arranged in time series within the control period Ts, the switching state of only one of the U-phase, V-phase, and W-phase changes between "P" and "0" or between "0" and "N", and the same voltage vector is output twice. If the allocation time of the voltage vectors V8p and V8n for the control period Ts is T0, the allocation time of the voltage vector V13 is T1, and the allocation time of the voltage vectors V7p and V7n is T2, then for T0, T1, and T2, the command voltage vector V ＊ The voltage vectors at the vertices of the equilateral triangle surrounding are Va, Vb, and Vc, and the command voltage vector V ＊ Assuming that the magnitude of the voltage V is V and the angle θ is θ, T0, T1, and T2 are determined so as to satisfy equations (2) and (3). "j" in equation (2) is an imaginary unit. In the example of FIG. 18 , for example, the voltage vector Va is the voltage vector V8p[PP0] and V8n[00N], the voltage vector Vb is the voltage vector V13[P0N], and the voltage vector Vc is the voltage vector V7p[P00] and V7n[0NN].

[0099]

[0100]

[0101] (3) Advantages In the power conversion device 100 according to the embodiment, when the polarity of the current I1 flowing through the output terminal 41 is positive, the control unit 60 transitions from the third control mode to the first control mode via the second control mode.

[0102] According to the above configuration, it is possible to suppress voltage drops in each of the plurality of first bootstrap circuits 71, the plurality of second bootstrap circuits 72, and the plurality of third bootstrap circuits 73.

[0103] However, if the control unit 60 were to transition to the first control mode immediately after the third control mode without passing through the second control mode, the voltage VQ3 across the third switching element Q3 would become larger than the voltage VQ4 across the fourth switching element Q4, which could result in dielectric breakdown of the third switching element Q3. More specifically, when the control unit 60 transitions to the first control mode, Vdc / 2 is divided between the third switching element Q3 and the fourth switching element Q4 while maintaining the voltage applied to the third switching element Q3 in the third control mode. One possible reason why the voltage VQ3 across the third switching element Q3 becomes larger than the voltage VQ4 across the fourth switching element Q4 is that the charge stored in the parasitic capacitor of the MOSFET constituting the third switching element Q3 during the third control mode remains undischarged when the control unit 60 transitions to the first control mode.

[0104] Furthermore, in the power conversion device 100 according to the embodiment, in the third control mode, the control unit 60 sets the length T4 of the on-period of the fourth switching element Q4 to be 90% or more and 110% or less of the CR time constant of the third bootstrap circuit 73 that supplies voltage to the third gate driver 63.

[0105] According to the above configuration, the third gate driver 63 can be made smaller.

[0106] Furthermore, in the power conversion device 100 according to the embodiment, the DC-DC converter 91 included in the power supply unit 9 supplies voltage to the plurality of fourth gate drivers 64 and the plurality of third bootstrap circuits 73. This makes it possible for the power conversion device 100 according to the embodiment to be miniaturized while suppressing voltage drops in each of the plurality of third bootstrap circuits 73.

[0107] (Modifications) The above embodiment is merely one of various embodiments of the present disclosure. The above embodiment can be modified in various ways depending on the design and the like as long as the object of the present disclosure can be achieved.

[0108] Each of the first switching elements Q1, the second switching elements Q2, the third switching elements Q3, and the fourth switching elements Q4 is not limited to a MOSFET, and may be, for example, an IGBT (Insulated Gate Bipolar Transistor). In this case, the control terminal, the first main terminal, and the second main terminal of each of the first switching elements Q1, the second switching elements Q2, the third switching elements Q3, and the fourth switching elements Q4 are a gate terminal, a collector terminal, and an emitter terminal, respectively.

[0109] Furthermore, the control unit 60 is not limited to being configured to perform voltage vector control, but may also be configured to perform PWM control.

[0110] Furthermore, each of the plurality of first bootstrap circuits 71 includes the Zener diode Z17, but may not include the Zener diode Z17. Furthermore, each of the plurality of second bootstrap circuits 72 includes the Zener diode Z27, but may not include the Zener diode Z27. Furthermore, each of the plurality of third bootstrap circuits 73 includes the Zener diode Z37, but may not include the Zener diode Z37.

[0111] Each of the first bootstrap circuits 71 includes a resistor R17, and the CR time constant is determined by the capacitance of the capacitor C17 and the resistance of the resistor R17. Alternatively, the CR time constant may be determined by the capacitance of the capacitor C17 and the equivalent series resistance (ESR) of the capacitor C17 without including the resistor R17. Each of the second bootstrap circuits 72 includes a resistor R27, and the CR time constant is determined by the capacitance of the capacitor C27 and the resistance of the resistor R27. Alternatively, the CR time constant may be determined by the capacitance of the capacitor C27 and the ESR of the capacitor C27 without including the resistor R27. Furthermore, each of the plurality of third bootstrap circuits 73 includes a resistor R37, and the CR time constant is determined by the capacitance of the capacitor C37 and the resistance value of the resistor R37. However, the configuration may be such that the CR time constant is determined by the capacitance of the capacitor C37 and the ESR of the capacitor C37 without including the resistor R37.

[0112] Furthermore, the power conversion device 100 is not limited to a configuration including one DC-DC converter 91 as shown in FIG. 1 as the power supply unit 9 that supplies voltage to the three fourth gate drivers 64. For example, as in a power conversion device 100 according to a modified example shown in FIG. 19 , the power supply unit 9 may be configured to include multiple (three) DC-DC converters 91. The multiple DC-DC converters 91 correspond to the multiple (three) fourth gate drivers 64 and supply voltages to the corresponding fourth gate drivers 64. In the power conversion device 100 according to the modified example, in each of the multiple first bootstrap circuits 71, the anode of a diode D17 is connected to the positive terminal of a corresponding one of the multiple DC-DC converters 91. In each of the multiple second bootstrap circuits 72, the anode of a diode D27 is connected to the positive terminal of a corresponding one of the multiple DC-DC converters 91. In each of the third bootstrap circuits 73, the anode of a diode D37 is connected to the positive terminal of the corresponding one of the DC-DC converters 91.

[0113] The power conversion device 100 may also include a plurality of DC-DC converters in place of each of the plurality of first bootstrap circuits 71. The power conversion device 100 may also include a plurality of DC-DC converters in place of each of the plurality of second bootstrap circuits 72.

[0114] Furthermore, the power conversion device 100 is not limited to a configuration including a plurality of switching circuits 10, and may be configured to include a single switching circuit 10. When the power conversion device 100 is configured to include a single switching circuit 10 instead of a plurality of switching circuits 10, there is also one each of the first gate driver 61, second gate driver 62, third gate driver 63, and fourth gate driver 64, and there is also one each of the first bootstrap circuit 71, second bootstrap circuit 72, and third bootstrap circuit 73. In this case as well, a DC-DC converter may be provided in place of each of the first bootstrap circuit 71 and the second bootstrap circuit 72.

[0115] The power conversion device 100 may be a three-level or higher power conversion device, for example, a five-level inverter.

[0116] (Aspects) The following aspects are disclosed in this specification.

[0117] A power conversion device (100) according to a first aspect includes a DC power supply unit (3), a switching circuit (10), a first diode (D5), a second diode (D6), an output terminal (41), a first gate driver (61), a second gate driver (62), a third gate driver (63), a fourth gate driver (64), a bootstrap circuit (third bootstrap circuit 73), a power supply unit (9), and a control unit (60). The DC power supply unit (3) has a positive electrode (P1), a negative electrode (N1), and an intermediate potential point (M1). The switching circuit (10) has a first switching element (Q1), a second switching element (Q2), a third switching element (Q3), and a fourth switching element (Q4). In the switching circuit (10), a first switching element (Q1), a second switching element (Q2), a third switching element (Q3), and a fourth switching element (Q4) are connected in series between a positive electrode (P1) and a negative electrode (N1) in the order of the first switching element (Q1), the second switching element (Q2), the third switching element (Q3), and the fourth switching element (Q4) from the positive electrode (P1) side. The cathode of the first diode (D5) is connected to a first connection point (11) between the first switching element (Q1) and the second switching element (Q2), and the anode is connected to an intermediate potential point (M1). The anode of the second diode (D6) is connected to a second connection point (12) between the third switching element (Q3) and the fourth switching element (Q4), and the cathode is connected to the intermediate potential point (M1). The output terminal (41) is connected to a third connection point (13) between the second switching element (Q2) and the third switching element (Q3), and is connected to an AC load (RA1). The first gate driver (61) drives the first switching element (Q1). The second gate driver (62) drives the second switching element (Q2). The third gate driver (63) drives the third switching element (Q3). The fourth gate driver (64) drives the fourth switching element (Q4). The bootstrap circuit (third bootstrap circuit 73) supplies voltage to the third gate driver (63). The power supply unit (9) supplies voltage to the bootstrap circuit (third bootstrap circuit 73) and the fourth gate driver (64).The control unit (60) controls the first gate driver (61), the second gate driver (62), the third gate driver (63), and the fourth gate driver (64). The control unit (60) has a first control mode, a second control mode, and a third control mode. In the first control mode, the control unit (60) turns on the first switching element (Q1), turns on the second switching element (Q2), turns off the third switching element (Q3), and turns off the fourth switching element (Q4). In the second control mode, the control unit (60) turns off the first switching element (Q1), turns on the second switching element (Q2), turns on the third switching element (Q3), and turns off the fourth switching element (Q4). In the third control mode, the control unit (60) turns off the first switching element (Q1), turns on the second switching element (Q2), turns off the third switching element (Q3), and turns on the fourth switching element (Q4). When the polarity of the current flowing through the output terminal (41) is positive, the control unit (60) transitions from the third control mode to the first control mode via the second control mode.

[0118] According to this embodiment, it is possible to suppress a voltage drop in the bootstrap circuit (third bootstrap circuit 73).

[0119] The power conversion device (100) according to the second aspect is the power conversion device according to the first aspect, and further includes a bootstrap circuit (first bootstrap circuit 71) that supplies a voltage to the first gate driver (61), and a bootstrap circuit (second bootstrap circuit 72) that supplies a voltage to the second gate driver (62).

[0120] According to this aspect, it is possible to further reduce the size of the power conversion device (100).

[0121] In the power conversion device (100) according to the third aspect, in the first or second aspect, the control unit (60) sets the length (T4) of the on-period of the fourth switching element (Q4) to be 90% or more and 110% or less of the CR time constant of a bootstrap circuit (third bootstrap circuit 73) that supplies a voltage to the third gate driver (63) in the third control mode.

[0122] According to this aspect, it is possible to prevent the output voltage of the bootstrap circuit (third bootstrap circuit 73) that supplies voltage to the third gate driver (63) from falling below a predetermined value.

[0123] In the power conversion device (100) according to the fourth aspect, in any one of the first to third aspects, the bootstrap circuit (third bootstrap circuit 73) that supplies a voltage to the third gate driver (63) includes a capacitor (C37) and a diode (D37) connected in series with the capacitor (C37).

[0124] In the power conversion device (100) according to the fifth aspect, in the fourth aspect, the bootstrap circuit (third bootstrap circuit 73) that supplies a voltage to the third gate driver (63) further includes a resistor (R37) connected in series with the capacitor (C37).

[0125] In the power conversion device (100) according to a sixth aspect, in any one of the first to fifth aspects, the power supply unit (9) includes a DC-DC converter (91).

[0126] A power conversion device (100) according to a seventh aspect is the first aspect and includes a plurality of switching circuits (10), a plurality of first gate drivers (61), a plurality of second gate drivers (62), a plurality of third gate drivers (63), a plurality of fourth gate drivers (64), and a plurality of bootstrap circuits (third bootstrap circuits 73). A power supply unit (9) supplies voltage to at least the plurality of fourth gate drivers (64) and the plurality of bootstrap circuits (third bootstrap circuits 73).

[0127] According to this aspect, it is possible to suppress the voltage drop in each of the plurality of bootstrap circuits (third bootstrap circuit 73) while achieving miniaturization.

[0128] REFERENCE SIGNS LIST 1 inverter circuit 3 DC power supply unit 6 control device 60 control unit 61 first gate driver 62 second gate driver 63 third gate driver 64 fourth gate driver 9 power supply unit 91 DC-DC converter 10 switching circuit 11 first connection point 12 second connection point 13 third connection point 41 output terminal 71 first bootstrap circuit 72 second bootstrap circuit 73 third bootstrap circuit 100 power conversion device C17, C27, C37 capacitor D1 diode D2 diode D3 diode D4 diode D5 first diode D6 second diode D17, D27, D37 diode P1 positive pole Q1 first switching element Q2 second switching element Q3 third switching element Q4 fourth switching element M1 intermediate potential point N1 negative pole R17, R27, R37 Resistance V0p, V0n, V0o Zero vector V1 to V6 Voltage vector V7p, V7n, V8p, V8n, V9p, V9n, V10p, V10n, V11p, V11n, V12p, V12n Voltage vector V13 to V18 Voltage vector V ＊ Command voltage vector

Claims

1. a DC power supply unit having a positive electrode, a negative electrode, and an intermediate potential point; a switching circuit including a first switching element, a second switching element, a third switching element, and a fourth switching element, the first switching element, the second switching element, the third switching element, and the fourth switching element being connected in series between the positive electrode and the negative electrode in the order of the first switching element, the second switching element, the third switching element, and the fourth switching element from the positive electrode side; a first diode having a cathode connected to a first connection point between the first switching element and the second switching element and an anode connected to the intermediate potential point; a second diode having an anode connected to a second connection point between the third switching element and the fourth switching element and a cathode connected to the intermediate potential point; an output terminal connected to a third connection point between the second switching element and the third switching element and connected to an AC load; a first gate driver that drives the first switching element; a second gate driver that drives the second switching element; a third gate driver that drives the third switching element; a fourth gate driver that drives the fourth switching element; a bootstrap circuit for supplying a voltage to the third gate driver; a power supply unit that supplies a voltage to the bootstrap circuit and the fourth gate driver; a control unit that controls the first gate driver, the second gate driver, the third gate driver, and the fourth gate driver, The control unit a first control mode in which the first switching element is turned on, the second switching element is turned on, the third switching element is turned off, and the fourth switching element is turned off; a second control mode in which the first switching element is turned off, the second switching element is turned on, the third switching element is turned on, and the fourth switching element is turned off; a third control mode in which the first switching element is turned off, the second switching element is turned on, the third switching element is turned off, and the fourth switching element is turned on, When the polarity of the current flowing through the output terminal is positive, the control unit: Immediately after the third control mode, the control mode is shifted to the second control mode and then to the first control mode. Power conversion device.

2. a bootstrap circuit for supplying a voltage to the first gate driver; a bootstrap circuit that supplies a voltage to the second gate driver. The power conversion device according to claim 1 .

3. The control unit In the third control mode, the length of an on-period of the fourth switching element is set to be 90% or more and 110% or less of a CR time constant of the bootstrap circuit that supplies a voltage to the third gate driver. The power conversion device according to claim 1 or 2.

4. The bootstrap circuit for supplying a voltage to the third gate driver includes: A capacitor, a diode connected in series with the capacitor. The power conversion device according to claim 1 or 2.

5. The bootstrap circuit for supplying a voltage to the third gate driver includes: further comprising a resistor connected in series with the capacitor; The power conversion device according to claim 4.

6. The power supply unit DC-DC converter, The power conversion device according to claim 1 or 2.

7. a plurality of the switching circuits; a plurality of the first gate drivers; a plurality of the second gate drivers; a plurality of the third gate drivers; a plurality of the fourth gate drivers; a plurality of the bootstrap circuits; The power supply unit supplying voltages to at least the plurality of fourth gate drivers and the plurality of bootstrap circuits; The power conversion device according to claim 1 .