High-Side Current Sensor and Offset Compensation Circuit thereof

Abstract

The present invention relates to a current sensor having a differential output, and more specifically to a High-Side current sensor and an offset correction circuit thereof that uses two single-ended amplifiers in a symmetrical structure instead of using a fully differential amplifier.

Description

Technology Field

[0001] The present invention relates to a current sensor having a differential output, and more specifically to a High-Side current sensor and an offset correction circuit thereof that uses two single-ended amplifiers in a symmetrical structure instead of using a fully differential amplifier. Background Technology

[0003] Recently, high-tech markets such as solar power generation, data centers, and electric vehicle batteries are rapidly growing as key application areas for future technologies. According to data from the International Energy Agency (IEA), solar power generation is showing an average annual growth rate of 37.8%, and the global data center market is expected to record a compound annual growth rate of 11.39% from 2024 to 2034. Furthermore, the electric vehicle battery market is projected to grow 14-fold over 10 years, from $14 billion in 2020 to $194 billion in 2030.

[0004] With the growth of these markets, solar power generation systems require tracking of power generation at the module level, while data center servers and electric vehicle battery systems require precise power management to maximize battery life and ensure safety. What these systems have in common is the need for accurate current measurement technology to increase power management efficiency, maintain system stability, and prevent power problems such as overloads.

[0005] Current measurement methods can be broadly divided into low-side current sensing and high-side current sensing.

[0006] Low-side current sensing connects the system load to the power supply and the sensing resistor to ground; it has the advantage of easy circuit implementation due to the low level of the common-mode signal. However, it is not suitable for systems requiring accuracy and stability because the voltage at the system load ground varies depending on the magnitude of the sensing current.

[0007] In contrast, High-Side current sensing connects the sensing resistor to the power supply and the system load to ground; because the system load utilizes pure grounding, it offers the advantage of high system accuracy and stability. Additionally, as it can detect current even under short-circuit conditions, it is more suitable for high-reliability applications such as solar power generation systems and battery management systems.

[0008] However, high-side current sensing has the disadvantage of complex circuit implementation due to the high level of the common-mode signal. In particular, when using an amplifier, a high input common-mode range and accurate differential amplification are required. If a fully differential amplifier is used, it requires a Common Mode Feedback (CMFB) circuit and a high reference voltage, which leads to circuit complexity and increased power consumption.

[0009] Furthermore, amplifiers implemented in CMOS processes exhibit an offset of 1 to 10 mV due to imbalances in transistor threshold voltage, mobility, and W / L, which is a major cause of reduced measurement accuracy in current sensors. Since this offset can fluctuate with temperature changes or device degradation, continuous monitoring and correction are required.

[0010] Therefore, there is a need for technology that can effectively correct the offset of High-Side current sensors and amplifiers for accurate and stable current measurement in high-voltage environments such as photovoltaic power generation systems and battery management systems. The problem to be solved

[0012] Accordingly, the present invention aims to provide a current sensor capable of having a differential output while minimizing the number of external resistors, by designing a single-ended amplifier in a symmetrical structure to implement the operation of a fully differential amplifier and using an amplifier with a folded cascode structure to provide a high input common-mode voltage and a wide output voltage swing range.

[0013] In addition, we aim to provide an ADC and DAC-based offset correction circuit that can improve measurement accuracy by effectively correcting the amplifier offset error that may occur in the current sensor. means of solving the problem

[0015] The High-Side current sensor of the embodiment is a single shunt resistor (R) for sensing current. SEN ); first and second input resistors (R1, R2) connected to both sides of the direct path; first and second internal resistors (R) electrically connected to both ends of the shunt resistor 00 , R 01 ); a first single-ended amplifier (A1) connected between a first input node and ground and having a first output node (OUTP); a second single-ended amplifier (A2) connected between a second input node and ground and having a second output node (OUTM); a first output resistor (R3) connected between the first output node and ground; a second output resistor (R4) connected between the second output node and ground; a first current source (I) connected between the first output node and the first output resistor C1 ); a second current source (I) connected between the second output node and the second output resistor above C2 ); The above second internal resistance (R 01 A first bias current source (I) connected between ) and ground BIAS1 ); and the first internal resistance (R 00 A second bias current source (I) connected between ) and ground BIAS2 It includes ); and a differential voltage is generated between the first output node and the second output node in proportion to the current flowing through the single shunt resistor.

[0016] The above first and second bias current sources (I BIAS1 , I BIAS2 ) can be adjusted to correct the offset error of the first and second single-ended amplifiers.

[0017] The first and second current sources (IC1, IC2) are set so that the differential voltage of the first and second output nodes is symmetrical with respect to 0V.

[0018] The first and second single-ended amplifiers have NMOS input terminals to operate at high input common-mode voltages.

[0019] The above differential voltage (V SENSE,DIFF ) is V SENSE,DIFF = (R3 / R2) Х {2R SENISEN + R 01 (I BIAS1 - I BIAS2 )} - R3(I C1 - I C2 It is expressed as ), and here, I SEN E is the sensing current, R2 and R3 are the second input resistance and the first output resistance, respectively, R 01 is the second internal resistance, I BIAS1 , I BIAS2 is the current of the first and second bias current sources, I C1 , I C2 is the current of the first and second current sources, respectively.

[0020] The above differential output voltage is provided as an input to an ADC (Analog-to-Digital Converter) and converted into a digital value.

[0021] A circuit for offset correction in a High-Side current sensor of another embodiment includes: a comparator that compares the voltages of a first output node (SENSEP) and a second output node (SENSEM); a 6-bit counter that increases or decreases a count value according to the output (UP / DN) of the comparator; a current digital-to-analog converter (C-DAC) that generates a variable current according to the output of the counter; a bias circuit that adjusts the gate voltages (Ip0_bias, Ip1_bias) of a MOSFET using the output of the C-DAC; and a signal input unit that receives a mode signal (MODE) that controls the operating mode of the circuit. When the mode signal is in a first state (high), it operates in an offset correction mode, and when it is in a second state (low), it operates in a current sensing mode.

[0022] The above comparator includes a function to correct the offset of the comparator itself through an auto-zeroing technique, and includes a first capacitor (C1) and a second capacitor (C2) that store offset information of the signal; and a switching circuit that controls the offset correction step and the comparison step according to the clock signal.

[0023] The above current digital-to-analog converter (C-DAC) has a 6-bit resolution, a current step per bit of 0.3125uA, and the output of the C-DAC is converted into a voltage through a resistor and used as the gate voltage of the MOSFET.

[0024] The above counter output is latched and stored when the mode signal switches to a second state (low), and the stored counter value is used to maintain an offset correction state during the current sensing mode.

[0025] The above offset correction circuit can correct an offset in the range of -10mV to 10mV. Effects of the invention

[0027] The present invention implements a High-Side current sensor with a high power-efficient differential output and avoids temperature drift by arranging two single-ended amplifiers in a symmetrical structure without using a full differential amplifier, while increasing sensing accuracy by integrating a circuit capable of automatically correcting the amplifier offset and solving the problem of resistance imbalance caused by manufacturing process variability by minimizing the number of external resistors. Brief explanation of the drawing

[0029] FIG. 1 is a circuit diagram of a High-Side current sensor of the present invention according to one embodiment. Figure 2 shows a current sensor according to the prior art. FIG. 3 is an offset correction circuit according to one embodiment. Figure 4 shows the configuration of a comparator in an offset correction circuit according to one embodiment. Specific details for implementing the invention

[0030] Embodiments of the present invention will be described in detail below with reference to the drawings. However, detailed descriptions of known functions or configurations that may obscure the essence of the present invention in the following description and the attached drawings are omitted. Additionally, throughout the specification, the term 'comprising' a component means that, unless specifically stated otherwise, it does not exclude other components but may include additional components.

[0031] Additionally, terms such as first, second, etc. may be used to describe various components, but said components should not be limited by said terms. said terms may be used for the purpose of distinguishing one component from another component. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component.

[0032] The terms used in this invention are used merely to describe specific embodiments and are not intended to limit the invention. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, terms such as "comprising" or "comprising" are intended to specify the existence of the described features, numbers, steps, actions, components, parts, or combinations thereof, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0033] Unless specifically defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which the present invention pertains. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in this application.

[0035] FIG. 1 is a circuit diagram of a High-Side current sensor of the present invention according to one embodiment.

[0036] As illustrated in FIG. 1, a High-Side current sensor of one embodiment has a single shunt resistor (R) for sensing current. SEN ); first and second input resistors (R1, R2) connected to both sides of the direct path; first and second internal resistors (R) electrically connected to both ends of the shunt resistor 00 , R 01); a first single-ended amplifier (A1) connected between a first input node and ground and having a first output node (OUTP); a second single-ended amplifier (A2) connected between a second input node and ground and having a second output node (OUTM); a first output resistor (R3) connected between the first output node and ground; a second output resistor (R4) connected between the second output node and ground; a first current source (I) connected between the first output node and the first output resistor C1 ); a second current source (I) connected between the second output node and the second output resistor above C2 ); the above second internal resistance (R 01 A first bias current source (I) connected between ) and ground BIAS1 ); and the first internal resistance (R 00 A second bias current source (I) connected between ) and ground BIAS2 It includes ); and a differential voltage is generated between the first output node and the second output node in proportion to the current flowing through the single shunt resistor.

[0037] In the embodiment, the first and second bias current sources (I BIAS1 , I BIAS2 ) can be adjusted to correct the offset error of the first and second single-ended amplifiers.

[0038] In addition, the first and second current sources (I C1 , I C2 ) is set so that the differential voltage of the first and second output nodes is symmetrical with respect to 0V.

[0039] In the embodiment, the first and second single-ended amplifiers have NMOS input terminals to operate at a high input common-mode voltage.

[0040] In the embodiment, the differential voltage (V SENSE,DIFF ) is V SENSE,DIFF = (R3 / R2) Х {2R SENISEN + R 01 (I BIAS1- I BIAS2 )} - R3(I C1 - I C2 It is expressed as ), and here, I SEN E is the sensing current, R2 and R3 are the second input resistance and the first output resistance, respectively, R 01 is the second internal resistance, I BIAS1 , I BIAS2 is the current of the first and second bias current sources, I C1 , I C2 is the current of the first and second current sources, respectively.

[0041] Here, the differential output voltage is provided as an input to an ADC (Analog-to-Digital Converter) and converted into a digital value.

[0043] Below, the High-Side current sensor of the embodiment configured as described above will be explained in more detail.

[0044] Although the present invention has a method using a fully differential amplifier, this method requires a Common Mode Feedback (CMFB) circuit and a high level of reference voltage. Therefore, to overcome the disadvantages of the fully differential amplifier, the present invention proposes a structure that obtains a differential output by symmetrically arranging single-ended amplifiers.

[0045] In the present invention, by selecting an amplifier with a folded-cascode structure, high voltage gain can be obtained due to high output resistance, and phase margin can also be secured. In addition, the folded structure has the advantage of widening the operating range of the input signal and increasing the output voltage swing.

[0046] Before describing the present invention, a current sensor according to the prior art reflecting an offset voltage is shown in FIG. 2.

[0047] The general high-side current sensor of Fig. 2 is a circuit designed to obtain a differential output by utilizing two single-ended operational amplifiers. In this circuit, the current to be sensed is R SEN Measures the voltage drop that occurs when passing through a resistor. The circuit uses a sensing resistor R SEN , input resistance network (R1, R0, R2), output resistance (R3, R4), bias current source (I BIAS0 It consists of ), and two operational amplifiers.

[0048] However, this circuit has several significant problems. The most prominent issue is the error caused by the operational amplifier's offset voltage. All real operational amplifiers, due to internal imbalance, V OS1 , V OS2 It has an offset voltage like that. This offset voltage causes an error in the output voltage, affecting the differential output voltage.

[0049] In addition, as the sensing current increases, if the voltage of the OUTM node drops below 0V, the output is limited to 0V, which means the loss of the signal, and consequently, the accuracy of sensing in the high current region is significantly reduced.

[0050] Furthermore, in this circuit configuration, the output voltage of the OUTP node maintains a constant value regardless of the sensing current. This cannot be considered a differential output in the true sense and becomes a factor that prevents the subsequent ADC from efficiently utilizing the input range. In an ideal differential output, both outputs should change symmetrically in proportion to the sensing current.

[0051] In addition, the single-output method has the disadvantage of being susceptible to drift caused by temperature changes. This is a factor that degrades measurement accuracy, particularly during prolonged operation or in environments with significant temperature fluctuations.

[0052] These problems combined result in conventional current sensors having various limitations in accurate current measurement. Therefore, the present invention proposes a current sensor circuit illustrated in FIG. 1 through various improvement measures to overcome these disadvantages.

[0053] First, in the present invention, a circuit to eliminate the offset (approx. 3mV) occurring in the amplifier is added, and two current sources (I BIAS1 , I BIAS2 Errors caused by offset were corrected using ).

[0054] As illustrated in FIG. 1, the current sensor of the embodiment has internal resistors (R 00 , R 01 A first bias current source (I) connected between each of the ground and ground BIAS1 ) and the second bias current source (I BIAS2 It adjusts the input common mode voltage, including ). These two current sources effectively eliminate errors caused by the amplifier's offset.

[0055] If an offset occurs in the amplifier and the output voltage becomes distorted, current source I BIAS1 and I BIAS2 Errors can be corrected so that the output voltage falls within the desired range by adjusting the bias voltage that generates it.

[0057] In addition, the present invention uses only one external resistor, and the output voltage equation is as shown in Equation 1 below.

[0058]

[0059] Here, both OUTP and OUTM nodes are voltages that change according to the sensing current, and the voltage gain increases by a factor of 2.

[0060] This increase in voltage gain offers significant advantages in terms of ADC utilization. A doubling of the voltage gain at the sensor output means that the input signal range of the ADC is also doubled. This allows for more efficient utilization of the ADC's input range to increase resolution, and since the signal magnitude increases and the proportion of noise is relatively lower, the signal-to-noise ratio (SNR) is improved, enabling the provision of higher signal quality.

[0061] Also, shunt resistor R SEN is V IN and V IN-RSEN*ISENSE While connected in between, R 00 and R 01 It is a new arrangement of resistors. In the example, R 00 One side of V through R1 IN It is connected to, and the other side is I P0 It is connected to the node (+input of the first amplifier (A1)). And, R 01 One side of is V through R2 IN-RSEN*ISENSE It is connected to, and the other side is I P1 Connected to the node (+input of the second amplifier (A2)), I P0 Node and I P1 Nodes are connected to each other.

[0063] Meanwhile, the offset error generated by the amplifier reduces the accuracy of the current sensor, and the current source I of the example BIAS1 , I BIAS2 Since the bias voltage that creates it always has a fixed value, through this voltage I BIAS1 , I BIAS2 It is impossible to adjust it. Accordingly, another embodiment of the present invention discloses an offset method for an amplifier that solves this problem.

[0064] In order to utilize the proposed offset correction technique, V ip0_bias , V ip1_biasSince the value must be converted in mV units, it may be difficult to accurately correct the offset. Additionally, the amplifier's offset can change due to variations in temperature or device degradation, so there are limitations to the method of changing the gate voltage each time.

[0065] Therefore, a method is needed to correct the offset within the circuit. When there is no sensing current in the current sensor of Fig. 1, an ideal bias current due to the amplifier's virtual ground and an error current due to the amplifier's offset flow through the output resistors (R3, R4) of the sensor.

[0066] However, the output node voltage has the same value when there is no sensing current and amplifier offset, but the values ​​of the two voltages become different when an offset occurs. Utilizing this characteristic, the two voltages are compared, and current source I is used to make the two voltages equal. BIAS1 , I BIAS2 If you change it, the offset can be corrected internally within the circuit even if the amplifier's offset changes.

[0067] FIG. 3 is an offset correction circuit according to one embodiment. When MODE, which is the input signal of the counter, is high, it operates as an offset correction circuit, and when it becomes low, it operates as a current sensor.

[0068] The offset correction circuit of the embodiment includes: a comparator that compares the voltages of a first output node (SENSEP) and a second output node (SENSEM); a 6-bit counter that increases or decreases a count value according to the output (UP / DN) of the comparator; a current digital-to-analog converter (C-DAC) that generates a variable current according to the output of the counter; a bias circuit that adjusts the gate voltages (Ip0_bias, Ip1_bias) of a MOSFET using the output of the C-DAC; and a signal input unit that receives a mode signal (MODE) that controls the operating mode of the circuit. When the mode signal is in a first state (high), it operates in an offset correction mode, and when it is in a second state (low), it operates in a current sensing mode.

[0069] Here, the comparator includes a function to correct the offset of the comparator itself through an auto-zeroing technique as exemplified in FIG. 4, and is configured to include a first capacitor (C1) and a second capacitor (C2) that store offset information of the signal; and a switching circuit that controls the offset correction step and the comparison step according to the clock signal.

[0070] In addition, the current digital-to-analog converter (C-DAC) has a 6-bit resolution, the current step per bit is 0.3125uA, and the output of the C-DAC is converted into a voltage through a resistor and used as the gate voltage of the MOSFET.

[0071] In addition, the above counter output is latched and stored when the mode signal switches to a second state (low), and the stored counter value is used to maintain an offset correction state during the current sensing mode.

[0072] In addition, the offset correction circuit can correct an offset in the range of -10mV to 10mV.

[0074] The present invention has been described above with reference to various embodiments. Those skilled in the art will understand that the present invention may be implemented in modified forms without departing from the essential characteristics of the invention. Therefore, the disclosed embodiments should be considered in an illustrative rather than a restrictive sense. The scope of the invention is defined by the claims, not by the foregoing description, and all variations within the scope of the claims should be interpreted as being included in the invention.

Claims

Claim 1 A single shunt resistor (R) for sensing current SEN ); first and second input resistors (R1, R2) connected to both sides of the direct path; first and second internal resistors (R) electrically connected to both ends of the shunt resistor 00 , R 01 ); a first single-ended amplifier (A1) connected between a first input node and ground and having a first output node (OUTP); a second single-ended amplifier (A2) connected between a second input node and ground and having a second output node (OUTM); a first output resistor (R3) connected between the first output node and ground; a second output resistor (R4) connected between the second output node and ground; and a first current source (I) connected between the first output node and the first output resistor. C1 ); A second current source (I) connected between the second output node and the second output resistor above C2 );the above second internal resistance (R 01 A first bias current source (I) connected between ) and ground BIAS1 ); and the first internal resistance (R 00 A second bias current source (I) connected between ) and ground BIAS2 A High-Side current sensor comprising ); and generating a differential voltage between the first output node and the second output node in proportion to the current flowing through the single shunt resistor. Claim 2 In claim 1, the first and second bias current sources (I BIAS1 , I BIAS2 ) is an adjustable, High-Side current sensor for correcting offset errors of the first and second single-ended amplifiers. Claim 3 In claim 1, the first and second current sources (IC1, IC2) are high-side current sensors configured such that the differential voltage of the first and second output nodes is symmetrical with respect to 0V. Claim 4 In claim 1, the first and second single-ended amplifiers are high-side current sensors having NMOS input terminals to operate at a high input common-mode voltage. Claim 5 In claim 1, the differential voltage (V SENSE,DIFF ) is V SENSE,DIFF = (R3 / R2) Х {2R SENISEN + R 01 (I BIAS1 - I BIAS2 )} - R3(I C1 - I C2 It is expressed as ), and here, I SEN E is the sensing current, R2 and R3 are the second input resistance and the first output resistance, respectively, R 01 is the second internal resistance, I BIAS1 , I BIAS2 is the current of the first and second bias current sources, I C1 , I C2 High-Side current sensor, which is the current of the first and second current sources, respectively. Claim 6 A high-side current sensor according to claim 1, wherein the differential voltage is provided as an input to an ADC (Analog-to-Digital Converter) and converted into a digital value. Claim 7 An offset correction circuit for a High-Side current sensor described in any one of claims 1 to 6, comprising: a comparator that compares the voltages of a first output node (SENSEP) and a second output node (SENSEM); a 6-bit counter that increases or decreases a count value according to the output (UP / DN) of the comparator; a current digital-to-analog converter (C-DAC) that generates a variable current according to the output of the counter; a bias circuit that adjusts the gate voltages (Ip0_bias, Ip1_bias) of a MOSFET using the output of the C-DAC; and a signal input unit that receives a mode signal (MODE) that controls the operating mode of the circuit; wherein the offset correction circuit operates in an offset correction mode when the mode signal is in a first state (high) and operates in a current sensing mode when the mode signal is in a second state (low). Claim 8 In claim 7, the comparator includes a function to correct the offset of the comparator itself through an auto-zeroing technique, and comprises a first capacitor (C1) and a second capacitor (C2) that store offset information of a signal; and a switching circuit that controls an offset correction step and a comparison step according to a clock signal; an offset correction circuit. Claim 9 In claim 8, the current digital-to-analog converter (C-DAC) has a 6-bit resolution, the current step per bit is 0.3125uA, and the output of the C-DAC is converted into a voltage through a resistor and used as the gate voltage of the MOSFET, an offset correction circuit. Claim 10 In claim 7, the output of the counter is latched and stored when the mode signal is switched to a second state (low), and the stored output value of the counter is used to maintain an offset correction state during a current sensing mode, an offset correction circuit.

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