Gate trench semiconductor device with deep shielding regions and tuneable contact density

Abstract

A gate trench semiconductor device and a method of manufacturing such semiconductor device, the semiconductor device comprising gate trenches of different widths, wherein first gate trenches have a width narrower than a width of second gate trenches, wherein a first shielding region is located vertically below and at least partly laterally around a center of each of the first gate trenches, and wherein a second shielding region is located vertically below of each of the second gate trenches but not at least partly around a center of each of the second gate trenches.