Display panel and display device

Abstract

Embodiments of the present application disclose a display panel and a display device. The display panel comprises a substrate, a pixel definition layer, a light-emitting layer, and partition parts. The pixel definition layer comprises first grooves and second grooves formed in non-light-emitting areas; each partition part comprises a first portion and a second portion which are connected, the first portion corresponds to a second groove, and the width of the second portion is greater than that of the first portion; and the second portion is spaced apart from the surface of the side of the pixel definition layer distant from the substrate.

Description

Display panel and display device Technical Field

[0001] The present application relates to the field of display, and in particular to a display panel and a display device. Background Art

[0002] With the continuous development of display technology, Organic Light Emitting Diode (OLED) has gradually become the mainstream in the display field due to its excellent performance such as self-luminescence, high contrast, wide viewing angle, low power consumption, and bendability. The OLED device in the OLED display panel is composed of an anode, a light-emitting layer and a cathode. Part of the film layer in the light-emitting layer is formed by open mask evaporation. This can reduce the use of fine metal mask (FMM) and thus save preparation costs. However, this common film layer will inevitably produce lateral leakage between adjacent pixels, causing pixels to be brighter and thus affecting the display effect.

[0003] Therefore, a display panel and a display device are urgently needed to solve the above technical problems. SUMMARY OF THE INVENTION

[0004] The present application provides a display panel and a display device, which can alleviate the current technical problem of pixel stealth affecting the display effect.

[0005] To solve the above problems, the technical solutions provided by this application are as follows:

[0006] An embodiment of the present application provides a display panel, comprising a plurality of light-emitting areas spaced apart from each other and a non-light-emitting area between the light-emitting areas. The display panel includes:

[0007] substrate;

[0008] a pixel definition layer, disposed on one side of the substrate, comprising a first groove correspondingly disposed in the light-emitting area and a second groove disposed in the non-light-emitting area;

[0009] a plurality of partitioning portions disposed in the non-luminescent region and located on a side of the pixel definition layer away from the substrate, the partitioning portions comprising: a first portion disposed corresponding to the second groove, and a second portion disposed on a side of the first portion away from the substrate, the second portion having a width greater than a width of the first portion, and the second portion being spaced apart from a surface of the pixel definition layer away from the substrate;

[0010] A light-emitting layer is arranged on a side of the pixel definition layer and the partition portion away from the substrate, the light-emitting layer includes pixels arranged corresponding to the first groove, the light-emitting layer includes a plurality of stacked sub-film layers, and at least some of the sub-film layers of the light-emitting layer are disconnected at the partition portion.

[0011] In some embodiments, a sidewall of the first portion is disposed in contact with the pixel definition layer.

[0012] In some embodiments, the display panel further includes a first layer located in the non-luminous area, wherein the first layer is disposed between a surface of the pixel definition layer away from the substrate and the second portion, and is disposed close to the first portion.

[0013] In some embodiments, the light-emitting layer is spaced apart from the first layer at an end portion on one side of the partition portion.

[0014] In some embodiments, the display panel further includes a first layer located in the non-luminous area, and the first layer is at least disposed between a sidewall of the first portion and a sidewall of the second groove.

[0015] In some embodiments, the first layer is further disposed between a bottom surface of the first portion and a bottom surface of the second groove.

[0016] In some embodiments, the first layer further extends between a surface of the pixel definition layer away from the substrate and the second portion, and the light-emitting layer is spaced apart from the first layer at an end portion on the side of the partition portion.

[0017] In some embodiments, the light-emitting layer includes a first light-emitting sublayer, a second light-emitting sublayer located on the side of the first light-emitting sublayer away from the substrate, and a charge generation layer located between the first light-emitting sublayer and the second light-emitting sublayer; wherein the charge generation layer is disconnected at the partition portion.

[0018] In some embodiments, the display panel further includes an anode layer and a cathode layer, the anode layer is arranged on the side of the light-emitting layer close to the substrate, and the cathode layer is arranged on the side of the light-emitting layer away from the substrate; wherein the cathode layer is continuously arranged at the partition portion.

[0019] In some embodiments, the display panel further includes: a driving circuit layer, disposed between the substrate and the pixel definition layer; and a planar layer, disposed between the driving circuit layer and the pixel definition layer; wherein the second groove passes through the pixel definition layer, and the first portion is disposed in contact with the planar layer.

[0020] In some embodiments, the partition portion further includes a third groove disposed on a side of the second portion away from the substrate, and at least a portion of a sub-film layer of the light-emitting layer is disposed in the third groove.

[0021] In some embodiments, at least part of the sub-layers of the light-emitting layer are discontinuously disposed in the third groove.

[0022] In some embodiments, the third groove passes through the second portion and the first portion.

[0023] In some embodiments, the second portion includes a first surface close to the first portion and a second surface away from the first portion, and an orthographic projection of the first surface on the substrate is located within an orthographic projection of the second surface on the substrate.

[0024] In some embodiments, an outer contour of an orthographic projection of the first surface on the substrate is spaced apart from an outer contour of an orthographic projection of the second surface on the substrate.

[0025] In some embodiments, at least one second groove is disposed between two adjacent light-emitting areas, and at least a portion of the second groove extends along an edge of an adjacent light-emitting area.

[0026] In some embodiments, the second groove is arranged in a closed loop around at least one of the pixels.

[0027] An embodiment of the present application further provides a display device, comprising a display panel, the display panel comprising a plurality of spaced-apart luminous areas and a non-luminous area between the luminous areas, the display panel comprising:

[0028] substrate;

[0029] a pixel definition layer, disposed on one side of the substrate, comprising a first groove correspondingly disposed in the light-emitting area and a second groove disposed in the non-light-emitting area;

[0030] a plurality of partitioning portions disposed in the non-luminescent region and located on a side of the pixel definition layer away from the substrate, the partitioning portions comprising: a first portion disposed corresponding to the second groove, and a second portion disposed on a side of the first portion away from the substrate, the second portion having a width greater than a width of the first portion, and the second portion being spaced apart from a surface of the pixel definition layer away from the substrate;

[0031] A light-emitting layer is arranged on a side of the pixel definition layer and the partition portion away from the substrate, the light-emitting layer includes pixels arranged corresponding to the first groove, the light-emitting layer includes a plurality of stacked sub-film layers, and at least some of the sub-film layers of the light-emitting layer are disconnected at the partition portion.

[0032] In some embodiments, a sidewall of the first portion is disposed in contact with the pixel definition layer.

[0033] In some embodiments, the display panel further includes a first layer located in the non-luminous area, and the first layer is at least disposed between a sidewall of the first portion and a sidewall of the second groove. Beneficial effects

[0034] The present application sets a partition portion in the non-luminous area, wherein the first portion of the partition portion corresponds to the second groove, the second portion of the partition portion is wider than the first portion, and at the same time, the second portion of the partition portion is spaced apart from the pixel definition layer, which is beneficial for disconnecting at least part of the sub-film layer of the luminous layer at the side of the second portion, thereby reducing the leakage path of the leakage current and reducing the risk of pixel secret lighting. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] FIG1 is a schematic top view of a first structure of a display panel provided in an embodiment of the present application;

[0036] FIG2 is a schematic top view of a second structure of a display panel provided in an embodiment of the present application;

[0037] FIG3 is a schematic top view of a third structure of a display panel provided in an embodiment of the present application;

[0038] FIG4 is a schematic diagram of a first structure along the D1-D2 section of FIG1 ;

[0039] FIG5 is an enlarged schematic diagram of region E in FIG4 ;

[0040] FIG6 is a schematic diagram of a second structure along the D1-D2 section of FIG1 ;

[0041] FIG7 is a schematic diagram of a third structure along the D1-D2 section of FIG1;

[0042] FIG8 is a schematic diagram of a fourth structure along the D1-D2 section of FIG1;

[0043] FIG9 is a schematic diagram of a fifth structure along the D1-D2 section of FIG1 ;

[0044] FIG10 is a sixth structural schematic diagram along the D1-D2 section of FIG1;

[0045] FIG11 is a schematic diagram of a seventh structure along the D1-D2 section of FIG1 ;

[0046] FIG12 is a schematic diagram of an eighth structure along the D1-D2 section of FIG1;

[0047] FIG13 is a schematic diagram of a ninth structural example along the D1-D2 section of FIG1 ;

[0048] FIG14 is an enlarged schematic diagram of region E in FIG13 ;

[0049] FIG15 is a schematic diagram of the tenth structure along the D1-D2 section of FIG1;

[0050] FIG16 is an enlarged schematic diagram of region E in FIG15 ;

[0051] FIG17 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present application;

[0052] FIG18 is a schematic top view of a step in a method for manufacturing a display panel provided in an embodiment of the present application;

[0053] 19A to 19F are schematic diagrams of a first process of a method for manufacturing a display panel provided in an embodiment of the present application;

[0054] 20A to 20F are schematic diagrams of a second process of the method for manufacturing a display panel provided in an embodiment of the present application;

[0055] 21A to 21D are schematic diagrams of a third process of the method for manufacturing a display panel provided in an embodiment of the present application;

[0056] FIG22 is a schematic structural diagram of a display device provided in an embodiment of the present application. Modes for Carrying Out the Invention

[0057] The present application provides a display panel and a display device. To make the purpose, technical solution, and effects of the present application clearer and more explicit, the present application is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.

[0058] The embodiments of the present application provide a display panel and a display device. Detailed descriptions are provided below. It should be noted that the order in which the following embodiments are described does not limit the preferred order of the embodiments.

[0059] Referring to FIG. 1 to FIG. 16 , an embodiment of the present application provides a display panel 100 including a plurality of spaced-apart luminous areas A and a non-luminous area C located between the luminous areas A. The display panel 100 includes:

[0060] substrate 210;

[0061] The pixel definition layer 300 is disposed on the substrate 210 and includes a first groove G1 correspondingly disposed in the light-emitting area A and a second groove G2 disposed in the non-light-emitting area C;

[0062] a plurality of partitioning portions 700 disposed in the non-luminescent region C and located on a side of the pixel definition layer 300 away from the substrate 210, the partitioning portion 700 including a first portion 710 disposed corresponding to the second groove G2, and a second portion 720 disposed on a side of the first portion 710 away from the substrate 210, the second portion 720 having a width greater than that of the first portion 710, and the second portion 720 being spaced apart from a surface of the pixel definition layer 300 away from the substrate 210;

[0063] The light-emitting layer 400 is arranged on the side of the pixel definition layer 300 and the partition portion 700 away from the substrate 210. The light-emitting layer 400 includes pixels arranged corresponding to the first groove G1. The light-emitting layer 400 includes a plurality of stacked sub-film layers, and at least part of the sub-film layers of the light-emitting layer 400 are disconnected at the partition portion 700.

[0064] The present application provides a partition portion in the non-luminous area, wherein the first part of the partition portion is provided in the second groove, the second part of the partition portion is wider than the first part, and at the same time, the second part of the partition portion is spaced apart from the pixel definition layer, which is beneficial for disconnecting at least part of the sub-film layer of the luminous layer at the side of the second part, thereby reducing the leakage path of the leakage current and reducing the risk of pixel stealing. At the same time, a second groove is provided in the non-luminous area, and the first part of the partition portion is provided in the second groove, thereby reducing the overall height of the partition portion, improving the leveling of the organic film layer in the encapsulation layer, and improving the encapsulation reliability of the encapsulation layer. While effectively improving the poor display caused by pixel stealing, it can also ensure better encapsulation reliability.

[0065] The technical solution of this application is now described in conjunction with specific embodiments.

[0066] In this embodiment, please refer to Figures 1 to 3. The display panel 100 includes a display area, which includes a plurality of spaced-apart luminous areas A and a non-luminous area C located between the plurality of luminous areas A, wherein the luminous area A is the area where the display panel 100 actually emits light when displaying, and is used to set the light-emitting unit. The non-luminous area C is the area where the display panel 100 remains in a black state when displaying, and is used to set the necessary structures such as circuits and wiring for driving the light-emitting unit to emit light. The luminous area A generally includes a first color luminous area A1 for setting a first color light-emitting unit, a second color luminous area A2 for setting a second color light-emitting unit, and a third color luminous area A3 for setting a third color light-emitting unit. For example, the first color is blue, the second color is green, and the third color is red. One luminous area A corresponds to one pixel, the first color luminous area A1 corresponds to a blue pixel b, the second color luminous area A2 corresponds to a green pixel g, and the third color luminous area A3 corresponds to a red pixel r. Pixels can be represented by any of r, g, and b, which will not be repeated below.

[0067] 4 , the display panel 100 includes a substrate 210 and an anode layer 910 , a pixel definition layer 300 , a light emitting layer 400 , a cathode layer 920 , and an encapsulation layer 800 disposed on the substrate 210 .

[0068] Specifically, referring to Figure 4, the anode layer 910 includes a plurality of anodes arranged corresponding to the plurality of the light-emitting areas A; the pixel definition layer 300 is arranged on the substrate 210, including a plurality of first grooves G1 corresponding to the plurality of the light-emitting areas A and a second groove G2 arranged in the non-light-emitting area C, and each of the first grooves G1 makes the corresponding anode exposed; the light-emitting layer 400 is arranged on the pixel definition layer 300 and the anode layer 910; the cathode layer 920 is arranged on the light-emitting layer 400; the encapsulation layer 800 is arranged on the side of the cathode layer 920 away from the substrate 210, that is, on the side of the light-emitting layer 400 away from the substrate 210 and the side of the partition portion 700 away from the substrate 210.

[0069] Specifically, taking a tandem light-emitting device (Tandem device) as an example, the light-emitting layer 400 includes a first light-emitting sublayer 510, a second light-emitting sublayer 520 located on a side of the first light-emitting sublayer 510 away from the substrate 210, and a charge generation layer 610 (CGL) located between the first light-emitting sublayer 510 and the second light-emitting sublayer 520. The light-emitting layer includes a common layer 600, which may include the charge generation layer 610.

[0070] Referring to Figures 4, 5, and 6, the display panel 100 further includes a partition portion 700 disposed in the non-luminous area C. The partition portion 700 includes: a first portion 710 disposed corresponding to the second groove G2, and a second portion 720 disposed on a side of the first portion 710 away from the substrate 210. The width of the second portion 720 is greater than the width of the first portion 710, and the second portion 720 is spaced apart from the surface of the pixel definition layer 300 away from the substrate 210.

[0071] Specifically, referring to Figures 5 and 6, the second part 720 includes a first sub-part 724 and a second sub-part 725 located outside the first sub-part 724, and the first sub-part 724 is connected to the first part 710; wherein, the second sub-part 725 is spaced apart from the pixel definition layer 300.

[0072] Specifically, please refer to Figures 4, 5, and 6. The second sub-portion 725 of at least one of the partition portions 700 is spaced apart from the pixel definition layer 300. When forming the light-emitting layer 400, such as the charge generation layer 610, the second sub-portion 725 is in a suspended state, which increases the probability of the charge generation layer 610 being disconnected at the side of the second sub-portion 725, and has a greater probability of reducing the leakage path of the leakage current, thereby reducing the risk of pixel stealth.

[0073] In some embodiments, referring to Figures 4, 5, and 6, the sidewalls of the first portion 710 are disposed in contact with the pixel definition layer 300. Direct contact between the sidewalls of the first portion 710 and the pixel definition layer 300 allows for a simpler manufacturing process to achieve an undercut structure formed between the second portion 720 and the pixel definition layer 300. This increases the probability that at least a portion of the sub-layer of the light-emitting layer 400 will be disconnected at the side of the second sub-portion 725, thereby reducing leakage paths for current and minimizing the risk of pixel flashing.

[0074] In some embodiments, referring to Figures 13 to 16 , the second portion 720 is disposed in contact with the surface of the pixel definition layer 300 on a side away from the substrate 210. A second groove is provided in the non-luminescent region, and the first portion of the partition portion is disposed within the second groove. This reduces the overall height of the partition portion, improves the leveling of the organic film layer in the encapsulation layer, and enhances the encapsulation reliability of the encapsulation layer. This effectively improves display defects caused by pixel stealing while also ensuring excellent encapsulation reliability.

[0075] In some embodiments, referring to FIG. 6 , the display panel 100 further includes a first layer 1000 located in the non-luminous area C. The first layer 1000 is disposed between a surface of the pixel definition layer 300 away from the substrate 210 and the second portion 720 , and is disposed close to the first portion 710 .

[0076] During the manufacturing process, the first layer 1000 can be set between the surface of the pixel definition layer 300 away from the substrate 210 and the second part 720 by adjusting the etching process conditions, and set close to the first part 710, so as to provide better support for the second part 720 and reduce the risk of the second part sinking.

[0077] In some embodiments, referring to FIG. 6 and FIG. 7 , the light-emitting layer 400 is spaced apart from the first layer 1000 at an end portion on one side of the partition portion 700 .

[0078] The material of the first layer 1000 may include an inorganic material or a metal oxide material, or a combination of any one or more metal oxide materials such as ITO, IZO, etc. In this case, the first layer 1000 may be conductive, and the light-emitting layer 400 (such as the first light-emitting sublayer 510) is spaced apart from the first layer 1000 to avoid generating a new leakage path and reduce the risk of pixel stealth.

[0079] In some embodiments, referring to FIG. 7 , the display panel 100 further includes a first layer 1000 located in the non-luminous area C. The display panel 100 further includes a first layer 1000 located between the partition portion 700 and the pixel definition layer 300. The first layer 1000 is at least disposed between the side wall of the first portion 710 and the side wall of the second groove G2.

[0080] Please refer to Figures 7, 20E, and 20F. During the production, the first material layer 1001 can be set on the side wall of the second groove G2 and the surface of the pixel definition layer 300, and then the material film layer of the partition part 700 is formed. The material film layer of the partition part 700 is patterned, and then the first material layer 1001 is patterned to remove part of the first material layer 1001 between the second part 720 and the pixel definition layer 300 to form the first layer 1000. At the same time, the second part 720 is suspended. When the common layer 600 is subsequently formed, the probability of the common layer 600 being disconnected on the side of the second sub-part 725 is increased, and there is a greater probability of reducing the leakage path of the leakage current, thereby reducing the risk of pixel secret lighting.

[0081] In some embodiments, referring to FIG. 7 , the first layer 1000 is further disposed between the bottom surface of the first portion 710 and the bottom surface of the second groove G2 .

[0082] Through the process shown in Figures 20A to 20F, the first layer 1000 is provided between the bottom surface of the first portion 710 and the bottom surface of the second groove G2, so that the partition portion 700 can be appropriately raised, the spacing distance between the second portion 720 and the pixel definition layer 300 can be increased, and the light-emitting layer 400, for example, the probability of the common layer 600 being disconnected on the side of the second sub-portion 725, is increased, and there is a greater probability of reducing the leakage path of the leakage current and reducing the risk of pixel stealth.

[0083] In some embodiments, referring to FIG. 7 , the first layer 1000 further extends between the surface of the pixel definition layer 300 away from the substrate 210 and the second portion 720 , and the light-emitting layer 400 is spaced apart from the first layer 1000 at the end portion on the side of the partition portion 700 .

[0084] During the manufacturing process, the first layer can be extended outward from the second groove to below the second part by adjusting the etching process conditions, thereby providing better support for the second part and reducing the risk of the second part sinking.

[0085] In some embodiments, the first material layer, i.e., the first layer 1000, includes a metal oxide material or an inorganic material. The metal oxide material includes any one or more combinations of ITO, IZO, etc., and the inorganic material, such as an insulating material, includes any one or more combinations of silicon oxides, silicon nitride compounds, silicon oxynitride, etc. The first layer 1000 can be used to allow the second portion 720 to be suspended after patterning. This is for example only and is not intended to be a specific limitation.

[0086] In some embodiments, referring to Figures 7 and 8 , the light-emitting layer 400 is spaced apart from the first layer 1000. The material of the first layer 1000 may include a metal oxide material, such as any one or more combinations of ITO and IZO. In this case, the first layer 1000 may be conductive. Spaced apart from the light-emitting layer 400 (e.g., the first light-emitting sublayer 510) to avoid creating new leakage paths and reduce the risk of pixels being strayed from the light.

[0087] In some embodiments, referring to FIG. 8 , the distance between the end surface of the first layer 1000 away from the substrate 210 and the substrate 210 is smaller than the distance between the surface of the pixel definition layer 300 away from the substrate 210 and the substrate 210 .

[0088] When the first material layer 1001 is patterned to form the first layer 1000, a portion of the first material layer 1001 located on the side wall of the second groove G2 can be etched away by controlling the patterning time, such as the etching time, so as to reduce the risk of contact between the common layer 600 and the first layer 1000. The material of the first layer 1000 may include a metal oxide material, such as any one or more combinations of ITO, IZO, etc. The common layer 600 and the first layer 1000 are spaced apart to avoid the generation of a new leakage path and reduce the risk of pixel stealth.

[0089] In some embodiments, referring to FIG. 5 , FIG. 14 , and FIG. 16 , a distance (a second distance L2 ) from the second surface 722 to a surface of the first portion 710 close to the substrate 210 is 0.1 μm to 4 μm.

[0090] The distance between the first surface 721 and the surface of the pixel definition layer 300 near the second portion 720 is preferably less than the second distance L2. This distance can be adjusted based on actual conditions, such as manufacturing accuracy and process requirements. This is merely an example and is not intended to be limiting.

[0091] In some embodiments, referring to FIG5 , in the top view, the distance (third distance L3) between the farthest end point of the second sub-portion 725 away from the first sub-portion 724 and the first portion 710 is greater than or equal to 0.2 μm, so as to reduce the probability of contact between the first layer 1000 and at least part of the sub-film layer (such as the common layer 600) of the light-emitting layer when the first layer 1000 is a metal oxide, avoid the generation of new leakage paths, and reduce the risk of pixel stealth.

[0092] In some embodiments, referring to FIG. 5 , the second portion 720 includes a first surface 721 close to the first portion 710 and a second surface 722 away from the first portion 710 , and the orthographic projection of the first surface 721 on the substrate 210 is within the orthographic projection of the second surface 722 on the substrate 210 .

[0093] The area of ​​the upper surface of the second part 720 is greater than or equal to the area of ​​the lower surface of the second part 720. The second part 720 forms a non-regular trapezoidal structure, which is beneficial for at least part of the sub-film layers of the light-emitting layer (such as the common layer 600) to be disconnected on the side of the second part 720, reducing and minimizing the flow path of the leakage current, which is beneficial to reducing the risk of pixel stealing, and especially improving the visual effect of the display panel at low grayscale. For the convenience of description, the side of the second part 720 is represented by the first side 723, which will not be repeated below.

[0094] If the partition portion is directly set on the pixel definition layer, the part of the partition portion protruding from the pixel definition layer is too high. During the evaporation process, it will contact with the mask and scratch the partition portion, thereby generating particles, which can easily cause the encapsulation layer to fail. In addition, a thicker organic material is required for leveling during encapsulation, which increases the risk of the module process and leads to a decrease in yield. If the height of the partition portion is directly removed, a fine mask is required and related process steps are increased, which increases the cost. Therefore, please refer to Figure 4, the first part 710 of the partition portion 700 is set in the second groove G2, thereby reducing the overall height of the partition portion 700 and the thickness of the second part 720. The leveling property of the organic film layer in the encapsulation layer 800 is improved, the number of bubbles generated during the curing of the organic film layer is reduced, and the encapsulation layer 800 has better encapsulation reliability. While effectively improving the display defects caused by pixel stealing, it can also ensure better encapsulation reliability.

[0095] In some embodiments, referring to FIG. 5 , an outer contour of an orthographic projection of the first surface 721 on the substrate 210 and an outer contour of an orthographic projection of the second surface 722 on the substrate 210 are spaced apart.

[0096] The second portion 720 of the partition portion 700 has an inverted trapezoidal structure that is wider at the top and narrower at the bottom, which is more conducive to disconnecting at least part of the sub-film layer of the light-emitting layer 400 at the side of the second portion 720, thereby reducing the leakage path of the leakage current and reducing the risk of pixel stealth.

[0097] In some embodiments, referring to FIG. 5 , an included angle θ between the side surface of the second portion 720 and the first surface 721 is in a range of 100° to 120°.

[0098] The side surface of the second portion 720 forms an undercut structure with the pixel definition layer 300, thereby increasing the probability that at least a portion of the sub-film layers of the light-emitting layer 400 will be disconnected at the side surface of the second portion 720. If the angle between the side surface of the second portion 720 and the substrate 210 is too small, the probability of at least a portion of the sub-film layers of the light-emitting layer 400 being disconnected at the side surface of the second portion 720 will be reduced. If the angle between the side surface of the second portion 720 and the substrate 210 is too large, the process of forming the partition portion 700 will be more difficult and costly. The angle θ between the side surface of the second portion 720 and the first surface 721 is between 100° and 120°, which not only increases the probability that at least a portion of the sub-film layers of the light-emitting layer 400 will be disconnected at the side surface of the second portion 720, but also facilitates manufacturing.

[0099] In some embodiments, referring to FIG. 14 , in a top view of the display panel 100, corresponding to the same side surface of the second portion 720, the distance (first distance L1) between the farthest point of the second surface 722 away from the first sub-portion 724 and the farthest point of the first surface 721 away from the first sub-portion 724 is 0.1 μm to 2 μm. It will be appreciated that the definition of L1 also applies to any of the embodiments in FIG. 4 to FIG. 12 .

[0100] The side surfaces of the second portion 720 and the pixel definition layer 300 form an undercut structure, thereby increasing the probability that at least a portion of the sub-layers of the light-emitting layer 400 will be disconnected at the side surfaces of the second portion 720. If the first distance L1 is too small, the probability of at least a portion of the sub-layers of the light-emitting layer 400 being disconnected at the side surfaces of the second portion 720 will decrease. If the first distance L1 is too large, the process difficulty and cost of forming the partition portion 700 will increase. The first distance L1 is between 0.1 μm and 2 μm, which not only increases the probability of at least a portion of the sub-layers of the light-emitting layer 400 being disconnected at the side surfaces of the second portion 720, but also facilitates manufacturing.

[0101] In some embodiments, the material of the partition portion 700 may be a negative photoresist. Due to the characteristics of the negative photoresist, it is convenient to form the second portion 720 into an inverted trapezoidal structure that is wider at the top and narrower at the bottom.

[0102] 4 , the light emitting layer 400 is disposed at intervals on the side of the second portion 720. It is easy to understand that the definition of the light emitting layer 400 being disposed at intervals on the side of the second portion 720 is also applicable to any embodiment in FIG. 4 to FIG. 12 .

[0103] Any film layer of the light-emitting layer 400 is disconnected at the side of the second portion 720 , thereby minimizing the leakage path of the leakage current and reducing the risk of pixels secretly lighting up.

[0104] In some embodiments, the first light-emitting sublayer 510 includes a first light-emitting material layer 511 and a hole injection transport layer 620 (HITL) located on the side of the first light-emitting material layer 511 close to the substrate 210; wherein the first light-emitting material layer 511 is disconnected at the partition portion 700, and the hole injection transport layer 620 is disconnected at the partition portion 700.

[0105] The hole injection transport layer 620 and the first light-emitting material layer 511 are paths for generating leakage current. Disconnecting these two paths reduces the leakage path of the leakage current and reduces the risk of pixel secret lighting. Specifically, the common layer 600 may further include the hole injection transport layer 620.

[0106] It is easy to understand that the embodiment in which the first light-emitting material layer 511 and the hole injection transport layer 620 are spaced apart on the side of the second portion 720 can be applied to a single device, which is only used as an example and not specifically limited.

[0107] In some embodiments, referring to Figure 4, the light-emitting layer 400 includes a first light-emitting sublayer 510, a second light-emitting sublayer 520 located on the side of the first light-emitting sublayer 510 away from the substrate 210, and a charge generation layer 610 located between the first light-emitting sublayer 510 and the second light-emitting sublayer 520; wherein the charge generation layer 610 is disconnected at the partition portion 700.

[0108] In a stacked light-emitting layer (Tandem device), a charge generation layer 610 is provided between the first light-emitting sublayer 510 and the second light-emitting sublayer 520, as shown in FIG12 . Compared with the hole injection transport layer 620 and the first light-emitting material layer 511, leakage current is more likely to be generated in the charge generation layer 610, so that adjacent pixels are secretly lit, and the main leakage current path of the Tandem device is disconnected to reduce the leakage path of the leakage current and reduce the risk of pixel secret lighting.

[0109] In some embodiments, referring to FIG. 12 , the common layer 600 further includes a hole injection transport layer 620 located on the side of the first light-emitting material layer 511 close to the substrate 210 ; wherein the first light-emitting material layer 511 is spaced apart on the side of the second portion 720 , and the hole injection transport layer 620 is spaced apart on the side of the second portion 720 .

[0110] It is easy to understand that the embodiment in which the first light-emitting material layer 511 and the hole injection and transport layer 620 are spaced apart on the side of the second portion 720 can be applied to a tandem device. This is only an example and is not a specific limitation. The hole injection and transport layer 620 and the first light-emitting material layer 511 are both paths for generating leakage current. Disconnecting these two paths can reduce the leakage path of the leakage current and reduce the risk of pixel secret lighting.

[0111] In some embodiments, in a tandem device, only the charge generation layer 610 may be disposed at intervals on the side of the second portion 720; alternatively, in a tandem device, the charge generation layer 610 and the first light-emitting material layer may be disposed at intervals on the side of the second portion 720; alternatively, in a tandem device, the charge generation layer 610, the first light-emitting material layer, and the hole injection and transport layer 620 may all be disposed at intervals on the side of the second portion 720. This is merely an example and is not intended to be limiting.

[0112] In some embodiments, referring to FIG. 4 , the display panel 100 further includes an anode layer 910 and a cathode layer 920 . The anode layer 910 is disposed on the substrate 210 , the pixel definition layer 300 exposes a portion of the anode layer 910 , and the cathode layer 920 is disposed on a side of the light-emitting layer 400 away from the substrate 210 .

[0113] In some embodiments, referring to FIG. 4 , the cathode layer 920 is continuously disposed at the partition portion 700. By adjusting parameters such as the height of the partition portion 700, the spacing between the second portion 720 and the pixel definition layer 300, and the slope of the side surface of the second portion 720, the cathode layer 920 is continuously disposed at the partition portion 700, thereby preventing the cathode layer from being broken and affecting electrical performance, and reducing the risk of the cathode signal not being transmitted to the light-emitting area A.

[0114] In some embodiments, referring to FIG. 15 , the cathode layer 920 is spaced apart on the side of the second portion 720. By adjusting parameters such as the height of the partition 700, the spacing between the second portion 720 and the pixel definition layer 300, and the slope of the side of the second portion 720, the cathode layer 920 can be disconnected on the side of the second portion 720. To achieve a continuous cathode layer 920 on the side of the second portion 720, process parameters and the thickness of the second portion 720 must be controlled, which increases process costs. Therefore, the thickness requirement for the second portion 720 can be relaxed to reduce costs, so that the cathode layer 920 is disconnected on the side of the second portion 720. It will be appreciated that the spacing of the cathode layer 920 on the side of the second portion 720 also applies to any of the embodiments shown in FIG. 4 through FIG. 12 .

[0115] In some embodiments, the display panel 100 further includes a cathode layer 920 , which is disposed on a side of the light-emitting layer 400 away from the substrate 210 . The common layer 600 may further include an electron transport layer between the cathode layer 920 and the second light-emitting sublayer 520 .

[0116] In some embodiments, the electron transport layer may be spaced apart from each other on the side of the second portion 720 .

[0117] In some embodiments, the electron transport layer may be continuously disposed on the side of the second portion 720. This is merely an example and does not specifically limit the electron transport layer.

[0118] In some embodiments, referring to FIG. 1 , the display panel 100 includes a plurality of pixels, each of which is arranged corresponding to the light-emitting area A. The cathode layer 920 is arranged at intervals on the side of the second portion 720 , and the corresponding second groove G2 is arranged in a non-closed loop around one of the pixels.

[0119] When the cathode layer 920 is disconnected at the side of the second portion 720 , the corresponding second groove G2 cannot be arranged in a closed loop around the pixel to avoid the cathode layer 920 in the light-emitting area A from becoming an isolated island and avoiding the technical problem that the cathode signal cannot be transmitted to the light-emitting area A.

[0120] In some embodiments, referring to Figures 4, 5, and 6, the display panel 100 further includes a driving circuit layer 220 located on one side of the substrate 210 and a flat layer 230 located on the driving circuit layer 220. The flat layer 230 is located on the surface of the driving circuit layer 220 away from the substrate 210. The second groove G2 penetrates the pixel definition layer 300 to expose the flat layer 230, so that the first portion 710 can contact the flat layer 230.

[0121] The deeper the depth of the second groove G2, the larger the volume of the second groove G2, and the larger the volume of the first part 710 filled in the second groove G2, thereby reducing the thickness of the second part 720, reducing the overall height of the partition part 700, improving the leveling of the organic film layer in the encapsulation layer 800, and improving the encapsulation reliability of the encapsulation layer 800; at the same time, the deeper the depth of the second groove G2, the larger the contact area between the pixel definition layer 300 and the first part 710, and the improvement of the adhesion between the pixel definition layer 300 and the partition part 700, reducing the risk of the partition part 700 falling off, improving the leveling of the organic film layer in the encapsulation layer 800, and improving the encapsulation reliability of the encapsulation layer 800.

[0122] In some embodiments, referring to FIG. 4 , the driving circuit layer 220 may include an active layer 221 , a gate layer 222 , a source / drain layer 223 , and an insulating layer between adjacent film layers that require insulation.

[0123] Specifically, referring to FIG. 4 , the structure of the driving circuit layer 220 can be a top-gate design or a bottom-gate design, which is only used as an example and is not specifically limited.

[0124] In some embodiments, the second groove G2 penetrates the pixel definition layer 300 and forms a first depression in a portion of the planar layer 230, which is filled with the first portion 710. This further increases the contact area between the first portion 710 and the planar layer 230, thereby improving the adhesion between the substrate 210 and the partition portion 700, reducing the risk of the partition portion 700 falling off, and improving the leveling of the organic film layer in the encapsulation layer 800, thereby enhancing the encapsulation reliability of the encapsulation layer 800.

[0125] In some embodiments, referring to FIG. 9 , the partition portion 700 further includes a third groove G3 disposed on a side of the second portion 720 away from the substrate 210 , and at least a portion of a sub-film layer of the light-emitting layer 400 is disposed in the third groove G3 .

[0126] Grooving is performed on the second portion 720 of the partition portion 700 to form a third groove G3, which can increase the probability of at least part of the sub-film layer of the light-emitting layer 400 being broken within the third groove G3, thereby reducing the risk of leakage current leakage path formation and reducing the risk of pixel stealth.

[0127] In some embodiments, referring to FIG. 10 , at least part of the sub-layers of the light-emitting layer 400 are discontinuously disposed in the third groove G3 .

[0128] At least part of the sub-layers of the light-emitting layer 400 are broken in the third groove G3, preferably the charge generation layer 610, and less preferably the first light-emitting material layer 511 and / or the hole injection transport layer 620, thereby reducing the leakage path of the leakage current and reducing the risk of pixel stealth.

[0129] In some embodiments, referring to FIG. 11 , the third groove G3 passes through the second portion 720 and the first portion 710 .

[0130] The deeper the third groove G3 is, the greater the probability that at least part of the sub-film layer of the light-emitting layer 400 is broken in the third groove G3, thereby having a greater probability of reducing the leakage path of the leakage current and reducing the risk of pixel stealth.

[0131] In some embodiments, referring to FIG. 11 , the third groove G3 penetrates the second portion 720 , the first portion 710 and the pixel definition layer 300 , and at least part of the sub-layer of the light-emitting layer 400 is in contact with the planar layer 230 through the third groove G3 .

[0132] In some embodiments, referring to FIG. 11 , the display panel 100 further includes a driving circuit layer 220 located on one side of the substrate 210 and a flat layer 230 located on the driving circuit layer 220 . The flat layer 230 is located on the surface of the driving circuit layer 220 away from the substrate 210 . The third groove G3 passes through the second portion 720 , the first portion 710 and the pixel definition layer 300 to expose the flat layer 230 , so that at least part of the sub-film layer of the light-emitting layer 400 can contact the flat layer 230 .

[0133] In some embodiments, the third groove G3 penetrates the second portion 720, the first portion 710, and the pixel definition layer 300, and forms a second recess in a portion of the planar layer 230. The second recess is filled with the common layer 600. Increasing the depth of the third groove G3 increases the probability that at least a portion of the sub-layer of the light-emitting layer 400 will break within the third groove G3, thereby reducing the leakage path of the leakage current and the risk of pixel light leakage.

[0134] In some embodiments, referring to Figures 9 and 11, the display panel 100 further includes an anode layer 910 and a cathode layer 920, the anode layer 910 is disposed on the substrate 210, the pixel definition layer 300 exposes a portion of the anode layer 910, and the cathode layer 920 is disposed on the side of the light-emitting layer 400 away from the substrate 210; wherein the cathode layer 920 is disposed in the third groove G3.

[0135] The cathode layer 920 is also disposed in the third groove G3 and can fill the third groove G3 to prevent the groove from being too deep, thereby reducing the difficulty of covering the packaging layer 800 and reducing the risk of packaging failure.

[0136] In some embodiments, referring to FIG. 1 to FIG. 3 , at least one second groove G2 is disposed between two adjacent light-emitting areas A, and at least a portion of the second groove G2 extends along an edge of an adjacent light-emitting area A.

[0137] For example, please refer to Figure 1. A second groove G2 is provided between the second color light-emitting area A2 and the third color light-emitting area A3, and two second grooves G2 are provided between the second color light-emitting area A2 and the first color light-emitting area A1. It is easy to understand that the number between two adjacent light-emitting areas A can be three or even more. The number between two adjacent light-emitting areas A can be adjusted according to actual conditions such as space occupancy, and is not specifically limited here.

[0138] For example, if the second color light-emitting area A2 is elliptical, the second groove G2 between the second color light-emitting area A2 and the first color light-emitting area A1 is set as a curved groove extending along the edge of the adjacent second color light-emitting area A2. In this way, the second groove G2 between the second color light-emitting area A2 and the first color light-emitting area A1 can be further extended in the direction of the second groove G2 between the second color light-emitting area A2 and the third color light-emitting area A3, thereby reducing the distance between the two second grooves G2, and then narrowing the connecting channel of the common layer 600 here, so that the size of the lateral leakage flow here is kept below the target value.

[0139] The description here is merely an example based on the specific pixel arrangement. In actual applications, depending on the specific pixel arrangement structure, the second groove G2 may be a wavy groove, a broken line groove, etc. in addition to the above-mentioned curved groove. The shapes of each pixel and each color light-emitting area are merely examples. In actual applications, they are adjusted according to specific circumstances.

[0140] In some embodiments, referring to FIG. 2 , the display panel 100 includes a plurality of pixels, each of which is disposed corresponding to the light-emitting area A. The second groove G2 is disposed in a closed loop around at least one of the pixels.

[0141] The second groove G2 arranged around the pixel closed loop can increase the probability of the common layer being broken at the side of the second portion 720, thereby reducing the risk of leakage current leakage path formation and the risk of pixel stealth.

[0142] When the cathode layer 920 is disconnected at the side of the second portion 720 , the corresponding second groove G2 cannot be arranged in a closed loop around the pixel to avoid the cathode layer 920 in the light-emitting area A from becoming an isolated island and avoiding the technical problem that the cathode signal cannot be transmitted to the light-emitting area A.

[0143] 4 , the display panel 100 further includes a color filter layer 810 located on a side of the encapsulation layer 800 away from the substrate 210 . The color filter layer 810 includes a plurality of color resists 820 . The colors of the color resists 820 correspond to the colors of the pixels.

[0144] The present application provides a partition portion in the non-luminous area, wherein the first part of the partition portion is provided in the second groove, the second part of the partition portion is wider than the first part, and at the same time, the second part of the partition portion is spaced apart from the pixel definition layer, which is beneficial for disconnecting at least part of the sub-film layer of the luminous layer at the side of the second part, thereby reducing the leakage path of the leakage current and reducing the risk of pixel stealing. At the same time, a second groove is provided in the non-luminous area, and the first part of the partition portion is provided in the second groove, thereby reducing the overall height of the partition portion, improving the leveling of the organic film layer in the encapsulation layer, and improving the encapsulation reliability of the encapsulation layer. While effectively improving the poor display caused by pixel stealing, it can also ensure better encapsulation reliability.

[0145] Referring to FIG. 17 , an embodiment of the present application provides a method for manufacturing a display panel 100 . Referring to FIG. 18 , the display panel 100 includes a plurality of spaced-apart luminous areas A and a non-luminous area C located between the luminous areas A. The method for manufacturing the display panel 100 includes:

[0146] S100 , providing a substrate 210 , and forming a pixel definition layer 300 on the substrate 210 , including a first groove G1 formed in the light-emitting area A and a second groove G2 formed in the non-light-emitting area C.

[0147] S200 , forming a partition material layer 701 on the substrate 210 and the pixel definition layer 300 .

[0148] S300. Using patterning processing, the partition material layer 701 is formed into a partition portion 700 arranged in the non-luminous area C and including a first portion 710 and a second portion 720. The first portion 710 is arranged corresponding to the second groove G2, and the second portion 720 is arranged on a side of the first portion 710 away from the substrate 210. The width of the second portion 720 is greater than the width of the first portion 710. The second portion 720 is spaced apart from the surface of the pixel definition layer 300 away from the substrate 210.

[0149] S400 , forming a light-emitting layer 400 on the substrate 210 and the pixel definition layer 300 , wherein the light-emitting layer 400 includes a plurality of stacked sub-film layers, and at least some of the sub-film layers of the light-emitting layer 400 are disconnected at the partition portion 700 .

[0150] The present application provides a partition portion in the non-luminous area, wherein the first part of the partition portion is provided in the second groove, the second part of the partition portion is wider than the first part, and at the same time, the second part of the partition portion is spaced apart from the pixel definition layer, which is beneficial for disconnecting at least part of the sub-film layer of the luminous layer at the side of the second part, thereby reducing the leakage path of the leakage current and reducing the risk of pixel stealing. At the same time, a second groove is provided in the non-luminous area, and the first part of the partition portion is provided in the second groove, thereby reducing the overall height of the partition portion, improving the leveling of the organic film layer in the encapsulation layer, and improving the encapsulation reliability of the encapsulation layer. While effectively improving the poor display caused by pixel stealing, it can also ensure better encapsulation reliability.

[0151] The technical solution of this application is now described in conjunction with specific embodiments.

[0152] In this embodiment, the manufacturing method of the display panel 100 includes:

[0153] S100 , providing a substrate 210 , and forming a pixel definition layer 300 on the substrate 210 , including a first groove G1 formed corresponding to the light-emitting area A and a second groove G2 formed in the non-light-emitting area C, please refer to FIG. 19A and FIG. 19C .

[0154] In some embodiments, the second portion 720 of the partition portion 700 formed in a subsequent step includes a first sub-portion 724 and a second sub-portion 725 located outside the first sub-portion 724, and the first sub-portion 724 is connected to the first portion 710. Specifically, the second sub-portion 725 can be disposed in contact with the pixel definition layer 300, or the second sub-portion 725 can be spaced apart from the pixel definition layer 300, so that when the light-emitting layer 400 is formed, the second sub-portion 725 is in a suspended state. Therefore, according to different formation processes, step S100 may include:

[0155] S110a, providing a substrate 210, and forming a pixel definition layer 300 on the substrate 210, including a first groove G1 formed corresponding to the light-emitting area A, please refer to FIG. 19A.

[0156] S120a, forming a first material layer 1001 on the substrate 210 and the pixel definition layer 300, refer to FIG. 19B.

[0157] S130a, using a patterning process to form a second groove G2 in the non-light-emitting area C on the pixel definition layer 300, and remove the first material layer 1001 corresponding to the second groove G2, see FIG19C.

[0158] In some embodiments, according to different forming processes, step S100 may include:

[0159] S110b, providing a substrate 210, and forming a pixel definition layer 300 on the substrate 210, including a first groove G1 formed corresponding to the light-emitting area A, please refer to FIG. 20A.

[0160] S120b: Using a patterning process, a second groove G2 is formed in the non-light-emitting area C on the pixel definition layer 300, as shown in FIG20B.

[0161] S130b, forming a first material layer 1001 on the substrate 210 and the pixel definition layer 300, refer to FIG. 20C .

[0162] In some embodiments, the material of the first material layer 1001 includes a metal oxide material or an inorganic material. The metal oxide material includes any one or more combinations of ITO, IZO, etc., and the inorganic material, such as an insulating material, includes any one or more combinations of silicon oxides, silicon nitrides, silicon oxynitride, etc.

[0163] In some embodiments, according to different forming processes, step S100 may include:

[0164] S110c, providing a substrate 210, and forming a pixel definition layer 300 on the substrate 210, including a first groove G1 formed corresponding to the light-emitting area A, please refer to FIG. 21A.

[0165] S120c: Using a patterning process, a second groove G2 is formed in the non-light-emitting area C on the pixel definition layer 300, as shown in FIG21B.

[0166] In some embodiments, referring to FIG. 21A , the step of providing a substrate 210 may include providing a substrate 210 ; forming a driving circuit layer 220 on the substrate 210 ; forming a planarizing layer 230 on the driving circuit layer 220 ; and forming an anode layer 910 on the planarizing layer 230 .

[0167] In some embodiments, steps S110c and S120c may be performed in one step.

[0168] S200 , forming a partition material layer 701 on the substrate 210 and the pixel definition layer 300 , refer to FIG. 19D , FIG. 20D , and FIG. 21C .

[0169] In some embodiments, the material of the partition material layer 701 may be a negative photoresist, which facilitates forming the second portion 720 into an inverted trapezoidal structure that is wider at the top and narrower at the bottom.

[0170] S300. Using patterning processing, the partition material layer 701 is formed into a partition portion 700 arranged in the non-luminous area C and including a first portion 710 and a second portion 720. The first portion 710 is arranged corresponding to the second groove G2, and the second portion 720 is arranged on a side of the first portion 710 away from the substrate 210. The width of the second portion 720 is greater than the width of the first portion 710. The second portion 720 is spaced apart from the surface of the pixel definition layer 300 away from the substrate 210. Please refer to Figures 19E and 20E.

[0171] In some embodiments, an outer contour of the orthographic projection of the first surface 721 on the substrate 210 and an outer contour of the orthographic projection of the second surface 722 on the substrate 210 are spaced apart from each other, as shown in FIG. 4 and FIG. 5 .

[0172] The second portion 720 of the partition part 700 has an inverted trapezoidal structure that is wider at the top and narrower at the bottom, which is more conducive to disconnecting the film layer of the common layer 600 at the side of the second portion 720, thereby reducing the leakage path of the leakage current and reducing the risk of pixel stealth.

[0173] In some embodiments, referring to FIG. 5 , an angle between a side surface of the second portion 720 and the substrate 210 is 100° to 120°.

[0174] The side surfaces of the second portion 720 and the pixel definition layer 300 form an undercut structure, thereby increasing the probability of the common layer 600 being disconnected at the side surfaces of the second portion 720. If the angle between the side surfaces of the second portion 720 and the substrate 210 is too small, the probability of the light-emitting layer 400 being disconnected at the side surfaces of the second portion 720 is reduced. If the angle between the side surfaces of the second portion 720 and the substrate 210 is too large, the process of forming the partition portion 700 becomes more difficult and expensive. The angle between the side surfaces of the second portion 720 and the substrate 210 is between 100° and 120°, which not only increases the probability of the light-emitting layer 400 being disconnected at the side surfaces of the second portion 720 but also facilitates manufacturing.

[0175] S400, forming a light-emitting layer 400 on the substrate 210 and the pixel definition layer 300, wherein the light-emitting layer 400 includes a plurality of stacked sub-film layers, and at least part of the sub-film layers of the light-emitting layer 400 are disconnected at the partition portion 700, please refer to FIG. 4 and FIG. 5.

[0176] In some embodiments, referring to FIG. 5 , the second portion 720 includes a first sub-portion 724 and a second sub-portion 725 located outside the first sub-portion 724 , and the first sub-portion 724 is connected to the first portion 710 .

[0177] In some embodiments, according to different forming processes, step S400 may include:

[0178] S410a, removing the first material layer 1001 to form the second sub-portion 725 spaced apart from the pixel definition layer 300, see FIG19F.

[0179] In some embodiments, referring to FIG. 19F , the first material layer 1001 is removed to form the second sub-portion 725 spaced apart from the pixel definition layer 300 so that the second sub-portion 725 is suspended.

[0180] S420a, forming a light-emitting layer 400 on the substrate 210 and the pixel definition layer 300, wherein the light-emitting layer 400 includes a plurality of stacked sub-film layers, and at least part of the sub-film layers of the light-emitting layer 400 are disconnected at the partition portion 700, please refer to Figures 4 and 5.

[0181] In some embodiments, according to different forming processes, step S400 may include:

[0182] S410b, removing the first material layer 1001 outside the second groove G2 to form a first layer 1000 located inside the second groove G2, refer to FIG. 20F .

[0183] In some embodiments, the first material layer 1001 outside the second groove G2 is removed to form the second sub-portion 725 spaced apart from the pixel definition layer 300 so that the second sub-portion 725 is suspended, see FIG. 20F .

[0184] In some embodiments, referring to FIG. 8 , the distance between the end surface of the first layer 1000 away from the substrate 210 and the substrate 210 is smaller than the distance between the surface of the pixel definition layer 300 away from the substrate 210 and the substrate 210 .

[0185] When the first material layer 1001 is patterned to form the first layer 1000, a portion of the first material layer 1001 located on the side wall of the second groove G2 can be etched away by controlling the patterning time, such as the etching time, so as to reduce the risk of contact between the common layer 600 and the first layer 1000. The material of the first layer 1000 may include a metal oxide material, such as any one or more combinations of ITO, IZO, etc. The common layer 600 and the first layer 1000 are spaced apart to avoid the generation of a new leakage path and reduce the risk of pixel stealth.

[0186] In some embodiments, referring to FIG8 , in the top view, the distance (third distance L3) between the farthest end point of the second sub-portion 725 away from the first sub-portion 724 and the first portion 710 is greater than or equal to 0.2 μm, so as to reduce the probability of contact between the first layer 1000 and the common layer 600 when the first layer 1000 is a metal oxide, avoid the generation of new leakage paths, and reduce the risk of pixel stealth.

[0187] S420b, forming a light-emitting layer 400 on the substrate 210 and the pixel definition layer 300, wherein the light-emitting layer 400 includes a plurality of stacked sub-film layers, and at least part of the sub-film layers of the light-emitting layer 400 are disconnected at the partition portion 700, please refer to Figures 7 and 8.

[0188] In some embodiments, according to different forming processes, step S400 may include:

[0189] S410c, forming a light-emitting layer 400 on the substrate 210 and the pixel definition layer 300, wherein the light-emitting layer 400 includes a plurality of stacked sub-film layers, and at least part of the sub-film layers of the light-emitting layer 400 are disconnected at the partition portion 700, please refer to Figures 15 and 16.

[0190] In some embodiments, the method for manufacturing the display panel 100 further includes:

[0191] S500 , forming a cathode layer 920 on the light emitting layer 400 , please refer to FIG. 4 .

[0192] In some embodiments, the cathode layer 920 is disposed continuously, as shown in FIG. 4 .

[0193] In some embodiments, as shown in FIG15 , the cathode layer 920 is spaced apart on the side of the second portion 720. By adjusting the thickness of the second portion 720, the cathode layer 920 can be disconnected on the side of the second portion 720. To connect the cathode layer 920 on the side of the second portion 720 requires controlling process parameters and the thickness of the second portion 720, which increases process costs. Therefore, the thickness requirement for the second portion 720 can be appropriately relaxed to reduce costs, and the cathode layer 920 can be disconnected on the side of the second portion 720.

[0194] In some embodiments, referring to FIG. 2 , the display panel 100 includes a plurality of pixels, each of which is arranged corresponding to the light-emitting area A. The cathode layer 920 is arranged at intervals on the side of the second portion 720 , and the corresponding second groove G2 is arranged in a non-closed loop around one of the pixels.

[0195] When the cathode layer 920 is disconnected at the side of the second portion 720 , the corresponding second groove G2 cannot be arranged in a closed loop around the pixel to avoid the cathode layer 920 in the light-emitting area A from becoming an isolated island and avoiding the technical problem that the cathode signal cannot be transmitted to the light-emitting area A.

[0196] S600 , forming an encapsulation layer 800 on the cathode layer 920 , please refer to FIG. 4 .

[0197] In some embodiments, the encapsulation layer includes a first inorganic layer, a second inorganic layer, and an organic film layer located between the first inorganic layer and the second inorganic layer.

[0198] The present application provides a partition portion in the non-luminous area, wherein the first part of the partition portion is provided in the second groove, the second part of the partition portion is wider than the first part, and at the same time, the second part of the partition portion is spaced apart from the pixel definition layer, which is beneficial for disconnecting at least part of the sub-film layer of the luminous layer at the side of the second part, thereby reducing the leakage path of the leakage current and reducing the risk of pixel stealing. At the same time, a second groove is provided in the non-luminous area, and the first part of the partition portion is provided in the second groove, thereby reducing the overall height of the partition portion, improving the leveling of the organic film layer in the encapsulation layer, and improving the encapsulation reliability of the encapsulation layer. While effectively improving the poor display caused by pixel stealing, it can also ensure better encapsulation reliability.

[0199] Referring to FIG. 22 , an embodiment of the present invention further provides a display device 10 , including any of the above-mentioned display panels 100 .

[0200] The specific structure of the display panel 100 can be found in any of the above embodiments and drawings of the display panel 100 , and will not be described in detail here.

[0201] In this embodiment, referring to FIG. 22 , the display device 10 further includes a device body 20 , and the device body 20 and the display panel 100 are integrated into one body.

[0202] In this embodiment, the device body 20 may include a middle frame, frame glue, etc., and the display device 10 may be a display terminal such as a mobile phone, a tablet, or a television, which is not limited here.

[0203] The embodiments of the present application disclose a display panel and a display device; the display panel includes a light-emitting area and a non-light-emitting area, the display panel includes a substrate, a pixel definition layer, a light-emitting layer and a partition portion, the pixel definition layer includes a first groove and a second groove arranged in the non-light-emitting area, the partition portion includes a first part and a second part that are connected, the first part corresponds to the second groove, the width of the second part is greater than the width of the first part, and the second part is spaced apart from the surface of the pixel definition layer away from the substrate; the present application arranges a partition portion in the non-light-emitting area, the first part of the partition portion is arranged in the second groove, the second part of the partition portion is wider than the first part, and at the same time, the second part of the partition portion is spaced apart from the pixel definition layer, which is beneficial for at least part of the sub-film layer of the light-emitting layer to be disconnected at the side of the second part, thereby reducing the leakage path of the leakage current and reducing the risk of pixel secret lighting.

[0204] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of this application, and all these changes or substitutions should fall within the scope of protection of the claims attached to this application.

Claims

1. A display panel, in, The display panel comprises a plurality of light-emitting areas arranged at intervals and a non-light-emitting area between the light-emitting areas, and comprises: substrate; A pixel definition layer is disposed on one side of the substrate, and includes a first groove correspondingly disposed in the light-emitting area and a second groove disposed in the non-light-emitting area; A plurality of partitions are arranged in the non-luminous area and located on a side of the pixel definition layer away from the substrate, the partitions comprising: a first portion arranged corresponding to the second groove, and a second portion arranged on a side of the first portion away from the substrate, the width of the second portion is greater than the width of the first portion, and the second portion is spaced apart from a surface of the pixel definition layer away from the substrate; A light-emitting layer is arranged on a side of the pixel definition layer and the partition portion away from the substrate, the light-emitting layer includes pixels arranged corresponding to the first groove, the light-emitting layer includes a plurality of stacked sub-film layers, and at least some of the sub-film layers of the light-emitting layer are disconnected at the partition portion.

2. The display panel according to claim 1, in, The side wall of the first portion is disposed in contact with the pixel definition layer.

3. The display panel according to claim 2, in, The display panel further includes a first layer located in the non-luminescent area, wherein the first layer is disposed between a surface of the pixel definition layer away from the substrate and the second portion, and is disposed close to the first portion.

4. The display panel according to claim 3, in, The light emitting layer is disposed at an end portion on one side of the partition portion and is spaced apart from the first layer.

5. The display panel according to claim 1, in, The display panel further includes a first layer located in the non-luminescent area, wherein the first layer is at least disposed between a side wall of the first portion and a side wall of the second groove.

6. The display panel according to claim 5, in, The first layer is also disposed between a bottom surface of the first portion and a bottom surface of the second groove.

7. The display panel according to claim 5, in, The first layer further extends between the surface of the pixel definition layer away from the substrate and the second portion, and the light emitting layer is spaced apart from the first layer at an end portion on the side of the partition portion.

8. The display panel according to claim 1, in, The light-emitting layer includes a first light-emitting sublayer, a second light-emitting sublayer located on a side of the first light-emitting sublayer away from the substrate, and a charge generation layer located between the first light-emitting sublayer and the second light-emitting sublayer; Wherein, the charge generation layer is disconnected at the partition portion.

9. The display panel according to claim 1, in, The display panel further comprises an anode layer and a cathode layer, wherein the anode layer is arranged on a side of the light-emitting layer close to the substrate, and the cathode layer is arranged on a side of the light-emitting layer away from the substrate; Wherein, the cathode layer is continuously arranged at the partition portion.

10. The display panel according to claim 1, in, The display panel further includes: A driving circuit layer, disposed between the substrate and the pixel definition layer; A planar layer, disposed between the driving circuit layer and the pixel definition layer; The second groove penetrates the pixel definition layer, and the first portion is disposed in contact with the planar layer.

11. The display panel according to claim 1, in, The partition portion further includes a third groove arranged on a side of the second portion away from the substrate, and at least a part of the sub-film layer of the light-emitting layer is arranged in the third groove.

12. The display panel according to claim 11, in, At least part of the sub-film layers of the light-emitting layer are intermittently arranged in the third groove.

13. The display panel according to claim 12, in, The third groove passes through the second portion and the first portion.

14. The display panel according to claim 1, in, The second portion includes a first surface close to the first portion and a second surface far from the first portion, and an orthographic projection of the first surface on the substrate is located within an orthographic projection of the second surface on the substrate.

15. The display panel according to claim 14, in, An outer contour of an orthographic projection of the first surface on the substrate is spaced apart from an outer contour of an orthographic projection of the second surface on the substrate.

16. The display panel according to claim 1, in, At least one second groove is disposed between two adjacent light-emitting areas, and at least a portion of the second groove is extended along an edge of an adjacent light-emitting area.

17. The display panel according to claim 16, in, The second groove is arranged in a closed loop at the periphery of at least one of the pixels.

18. A display device, in, The display device comprises a display panel, the display panel comprises a plurality of light-emitting areas arranged at intervals and a non-light-emitting area located between the light-emitting areas, and the display panel comprises: substrate; A pixel definition layer is disposed on one side of the substrate, and includes a first groove correspondingly disposed in the light-emitting area and a second groove disposed in the non-light-emitting area; A plurality of partitions are arranged in the non-luminous area and located on a side of the pixel definition layer away from the substrate, the partitions comprising: a first portion arranged corresponding to the second groove, and a second portion arranged on a side of the first portion away from the substrate, the width of the second portion is greater than the width of the first portion, and the second portion is spaced apart from a surface of the pixel definition layer away from the substrate; A light-emitting layer is arranged on a side of the pixel definition layer and the partition portion away from the substrate, the light-emitting layer includes pixels arranged corresponding to the first groove, the light-emitting layer includes a plurality of stacked sub-film layers, and at least some of the sub-film layers of the light-emitting layer are disconnected at the partition portion.

19. The display device according to claim 18, in, The side wall of the first portion is disposed in contact with the pixel definition layer.

20. The display device according to claim 18, in, The display panel further includes a first layer located in the non-luminescent area, wherein the first layer is at least disposed between a side wall of the first portion and a side wall of the second groove.

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