Repair patch generation method, storage medium, and electronic device

By converting program code into type flow graphs and generating feature vectors, and combining syntax rule vocabulary to generate repair patches, the problem of missing type information in deep learning defective code repair methods is solved, and the type accuracy and repair efficiency of patches are improved.

WO2024255477A1PCT designated stage expired Publication Date: 2024-12-19ZTE CORP +1
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Patent Information

Application Number
PCT/CN2024/090980
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-06-14
Filing Date
2024-04-30
Publication Date
2024-12-19

AI Technical Summary

Technical Problem

Existing deep learning program defect repair methods cannot effectively learn and perceive code type rules, resulting in incorrect repair patch types generated, inefficient compilation process, and possible exclusion of correct patches.

Method used

By constructing a program containing defective code into an abstract syntax tree, converting it into a type flow graph, using the type flow graph encoder to generate feature vectors, and generating repair patches in combination with the grammar rule vocabulary list to ensure that the patch carries type information.

Benefits of technology

Improves the type accuracy of repair patches, reduces filtering time during compilation, and improves the efficiency of defect repair systems.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of the present disclosure provide a repair patch generation method, a storage medium, and an electronic device. The method comprises: constructing a program code comprising a defect code into a first abstract syntax tree, and converting the first abstract syntax tree into a type flow graph by means of a type flow graph constructor, wherein the first abstract syntax tree carries type information; traversing the type flow graph to obtain a node sequence, an attribute sequence and a relation matrix, and inputting the node sequence, the attribute sequence and the relation matrix into a type flow graph encoder to obtain a feature vector; and inputting the feature vector and a grammar rule word list into a syntax-directed generator to obtain a second abstract syntax tree, and performing code instantiation on the second abstract syntax tree to generate a repair patch, wherein the second abstract syntax tree carries the type information.
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Description

Repair patch generation method, storage medium and electronic device

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This disclosure is based on Chinese patent application CN202310709070.3, filed on June 14, 2023, entitled “Repair Patch Generation Method, Storage Medium and Electronic Device”, and claims the priority of the patent application, and all the contents disclosed therein are incorporated into this disclosure by reference. Technical Field

[0003] The embodiments of the present disclosure relate to the field of computer technology, and in particular to a repair patch generation method, a storage medium, and an electronic device. Background Art

[0004] Currently, syntax-guided program defect repair methods based on deep learning can only ensure that the generated repair patches comply with grammatical rules. However, the neural network in the deep learning model cannot perceive the type rules of the program and is prone to generating a large number of incorrectly typed patches. Although these patches can eventually be filtered out by the compiler, filtering these incorrectly typed patches takes a lot of time when compiling large projects, and the efficiency of the defect repair system is low. When using a search algorithm to determine the grammatical rule path with a higher probability, the neural network may also assign a higher probability to the incorrectly typed grammatical rules. In this way, the correct patch may be excluded from the candidate patches, resulting in the inability to repair the defect.

[0005] How to abstract the type of code and how neural networks represent and learn type rules are technical problems that need to be solved.

[0006] Summary of the Invention

[0007] The embodiments of the present disclosure provide a repair patch generation method, a storage medium, and an electronic device to at least solve the problem that the existing deep learning defect code repair method in the related art lacks the ability to learn type information.

[0008] According to one embodiment of the present disclosure, a repair patch generation method is provided, comprising: constructing a program code containing a defective code into a first abstract syntax tree, converting the first abstract syntax tree into a type flow graph through a type flow graph constructor, wherein the first abstract syntax tree carries type information; traversing the type flow graph to obtain a node sequence, an attribute sequence, and a relationship matrix, inputting the node sequence, the attribute sequence, and the relationship matrix into a type flow graph encoder to obtain a feature vector; inputting the feature vector and a grammar rule vocabulary into a grammar-guided generator to obtain a second abstract syntax tree, and code-instantiating the second abstract syntax tree to generate a repair patch, wherein the second abstract syntax tree carries the type information.

[0009] According to another embodiment of the present disclosure, a computer-readable storage medium is provided, in which a computer program is stored. The computer program is configured to execute the steps of any one of the above method embodiments when running.

[0010] According to another embodiment of the present disclosure, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any one of the above method embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] FIG1 is a hardware structure block diagram of a computer terminal for executing a repair patch generation method according to an embodiment of the present disclosure;

[0012] FIG2 is a flowchart of a repair patch generation method according to an embodiment of the present disclosure;

[0013] FIG3 is a structural block diagram of a repair patch generating apparatus according to an embodiment of the present disclosure;

[0014] FIG4 is a schematic diagram of a repair patch generation process according to an embodiment of the present disclosure;

[0015] FIG5 is a schematic diagram of the internal structure of a type flow graph encoder according to an embodiment of the present disclosure;

[0016] FIG6 is a flow chart of a method for automatically repairing program defects based on type constraints according to an embodiment of the present disclosure;

[0017] FIG7 is a schematic diagram of an abstract syntax tree and defect code according to an embodiment of the present disclosure;

[0018] FIG8 is a schematic diagram of a type flow graph according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0019] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings and in conjunction with embodiments.

[0020] The terms "first," "second," and the like in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, but are not necessarily used to describe a specific sequence or order.

[0021] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Taking running on a computer terminal as an example, Figure 1 is a hardware structure block diagram of a computer terminal that runs a repair patch generation method in an embodiment of the present disclosure. As shown in Figure 1, the computer terminal may include one or more (only one is shown in Figure 1) processors 102 (the processor 102 may include but is not limited to a processing device of a microprocessor or a programmable logic device) and a memory 104 for storing data, wherein the above-mentioned computer terminal may also include a transmission device 106 and an input and output device 108 for communication functions. It can be understood by those skilled in the art that the structure shown in Figure 1 is only for illustration and does not limit the structure of the above-mentioned computer terminal. For example, the computer terminal may also include more or fewer components than those shown in Figure 1, or have a configuration different from that shown in Figure 1.

[0022] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the repair patch generation method in the embodiment of the present disclosure. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above-mentioned method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely located relative to the processor 102, and these remote memories may be connected to the computer terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0023] The transmission device 106 is used to receive or transmit data via a network. A specific example of the aforementioned network may include a wireless network provided by a computer terminal's communications provider. In one embodiment, the transmission device 106 includes a network interface controller (NIC), which can be connected to other network devices via a base station to enable communication with the Internet. In another embodiment, the transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0024] In this embodiment, a repair patch generation method running on the above-mentioned computer terminal is provided. FIG2 is a flow chart of the repair patch generation method according to an embodiment of the present disclosure. As shown in FIG2 , the flow chart includes the following steps:

[0025] Step S202: constructing the program code containing the defective code into a first abstract syntax tree, and converting the first abstract syntax tree into a type flow graph using a type flow graph constructor, wherein the first abstract syntax tree carries type information;

[0026] In this embodiment, the abstract type system defines a set of rules that can abstract the types of variables, constants, and operators in the program source code, thereby converting the program source code into an abstract syntax tree with type information. Therefore, before step S202, the method also includes: converting the program source code corpus into multiple third abstract syntax trees through the abstract type system, wherein the third abstract syntax trees carry the type information; traversing all the third abstract syntax trees to obtain the grammar rule vocabulary, wherein the grammar rule vocabulary carries the type information, and the vocabulary can be used for subsequent neural network generation of a repair code abstract syntax tree. Among them, this rule is also used to construct the program code containing defective code into a first abstract syntax tree.

[0027] In one embodiment, the rules defined by the abstract type system include: 1) converting the program code or the program source code corpus into an abstract syntax tree, where the variables, constants, and operators in the program code or the program source code corpus statements are leaf nodes of the abstract syntax tree; 2) defining five abstract types: universal type, string type, numerical type, Boolean type, and empty type, where the empty type is a subtype of the string type, numerical type, and Boolean type; the universal type is a parent type of the string type, numerical type, and Boolean type; the parent type of the universal type is the universal type, and the subtype of the empty type is the empty type; 3) according to the types defined above, the variables in the program source code are Quantities or constants can be abstracted as one of the string type, numeric type, and Boolean type, and NULL is classified as the empty type; 4) The type of an operator is determined by the type of its operands. If all operand types of an operator are the same, the operator type is the same as the operand type; if there are two or more operand types, the operator type is the parent type of all operand types; 5) The type of a non-leaf node in the abstract syntax tree is determined by the type of its child nodes. If all child nodes of a non-leaf node are of the same type, the type of the node is the same as the type of its child nodes; if there are two or more child node types, the type of the node is the parent type of all child node types.

[0028] Through the rules defined by the abstract type system, the types of variables, constants, and operators in the program source code or defective code can be abstracted. When constructing the abstract syntax tree, the abstract type information is carried accordingly on the abstract syntax tree, thus obtaining a typed abstract syntax tree.

[0029] In step S202 of this embodiment, the first abstract syntax tree is converted into a type flow graph through a type flow graph constructor, including: converting each node in the first abstract syntax tree into an abstract syntax tree node in the type flow graph; abstracting the variables in the program code into variable nodes in the type flow graph; wherein, the abstract syntax tree nodes, the variable nodes, and the abstract syntax tree nodes and the variable nodes corresponding to the same variable are connected by edges with different attributes.

[0030] Among them, the attributes of the edges between the abstract syntax tree nodes include: parent-child, child-parent, left brother, right brother; the attributes of the edges between the variable nodes include: same type, compatible type, incompatible type; the attributes of the edges connecting the abstract syntax tree node and the variable node corresponding to the same variable include: declaration-variable, use-variable, variable-declaration, variable-use.

[0031] Step S204, traversing the type flow graph to obtain a node sequence, an attribute sequence, and a relationship matrix, and inputting the node sequence, the attribute sequence, and the relationship matrix into a type flow graph encoder to obtain a feature vector;

[0032] In this embodiment, the type flow graph encoder is an organic stack of multiple neural network layers, wherein the multiple neural network layers include: an embedding layer, type-sensitive self-attention neurons, a gating layer, and a linear layer. Except for the embedding layer whose input is a node sequence, attribute sequence, and relationship matrix input from the external world, the input of the remaining neural network layers is the output of the previous neural network layer.

[0033] In an exemplary embodiment, traversing the type flow graph to obtain a node sequence includes: traversing the abstract syntax tree node names of the first abstract syntax tree in the type flow graph, and forming all the abstract syntax tree node names into a first sequence segment; traversing the variable node names in the first abstract syntax tree according to the order of appearance of each variable in the program code context, and forming the variable node names accessible at the defective code into a second sequence segment; and splicing the first sequence segment and the second sequence segment to obtain the node sequence.

[0034] In an exemplary embodiment, traversing the type flow graph to obtain an attribute sequence includes: obtaining the node attribute values ​​corresponding to each abstract syntax tree node and each variable node in turn according to the arrangement order of the abstract syntax tree nodes and the variable nodes in the node sequence, and combining all the node attribute values ​​into the attribute sequence.

[0035] In this embodiment, the abstract syntax tree node includes the following attributes: type attribute and replicability; the variable node includes the following attributes: type attribute and accessibility.

[0036] In step S204 of this embodiment, the node sequence, the attribute sequence, and the relationship matrix are input into a type flow graph encoder to obtain a feature vector, including: obtaining a node embedding vector, an attribute embedding vector, and a relationship embedding vector based on the input node sequence, the attribute sequence, and the relationship matrix through an embedding layer in the type flow graph encoder; fusing the node embedding vector and the relationship embedding vector through a type-sensitive self-attention neuron in the type flow graph encoder to obtain a first fused vector; fusing the attribute embedding vector and the first fused vector through a gating layer in the type flow graph encoder to obtain a second fused vector; and performing a linear transformation on the second fused vector through a linear layer in the type flow graph encoder to obtain the feature vector.

[0037] Through the type flow graph and its construction rules, the adjacency relationship between typed abstract syntax tree nodes and user-defined variable nodes can be recorded, realizing the organic integration of the syntax rules and type rules of program source code or defective code.

[0038] Step S206: input the feature vector and the grammar rule vocabulary into a grammar-guided generator to obtain a second abstract syntax tree, and instantiate the second abstract syntax tree into code to generate a repair patch, wherein the second abstract syntax tree carries the type information.

[0039] Through the type flow graph encoder and its neural network architecture, by extracting the node sequence, attribute sequence and relationship matrix of the type flow graph, the grammatical rules and type rules of the program source code are encoded using a neural network, and type constraints can be given to the repair patch (code) during the patch generation process.

[0040] In an exemplary embodiment, the value of the feature vector is a floating point number.

[0041] In step S206 of this embodiment, the feature vector and the grammar rule vocabulary are input into a grammar-guided generator to obtain a second abstract syntax tree, including: inputting the feature vector and the grammar rule vocabulary into the grammar-guided generator, predicting a first grammar rule, and performing an editing operation on the abstract syntax tree according to the first grammar rule to obtain a first partial abstract syntax tree, wherein the first grammar rule carries type information; predicting a second grammar rule based on the first partial abstract syntax tree, the feature vector, and the grammar rule vocabulary, and performing an editing operation on the abstract syntax tree according to the second grammar rule to obtain a second partial abstract syntax tree, wherein the second grammar rule carries type information; iteratively performing the steps of predicting the grammar rule and editing the abstract syntax tree until a complete second abstract syntax tree is obtained.

[0042] Through the above steps, the defective code is constructed into a first abstract syntax tree that can carry type information, thus achieving abstraction of the code type. In the type flow graph converted from the first abstract syntax tree, the grammatical rules in the program code and the type rules can be organically integrated. Then, the feature vectors obtained based on the type flow graph and the grammatical rule vocabulary are input into the syntax-guided generator to obtain a second abstract syntax tree that will carry type information, and the repair patch code obtained from the second abstract syntax tree will be assigned type constraints. Therefore, the problem of the existing deep learning defective code repair methods in the related art lacking the ability to learn type information can be solved, achieving the effect of expanding the capabilities of the existing deep learning defective code repair methods.

[0043] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present disclosure is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present disclosure.

[0044] This embodiment also provides a repair patch generation device for implementing the above-mentioned embodiments and preferred implementations. Details already described will not be repeated. As used below, the term "module" may refer to a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.

[0045] FIG3 is a structural block diagram of a repair patch generating device according to an embodiment of the present disclosure. As shown in FIG3 , the device includes: a conversion module 10 , a traversal module 20 and a generation module 30 .

[0046] a conversion module 10 configured to construct a program code containing a defective code into a first abstract syntax tree, and convert the first abstract syntax tree into a type flow graph through a type flow graph constructor, wherein the first abstract syntax tree carries type information;

[0047] A traversal module 20 is configured to traverse the type flow graph to obtain a node sequence, an attribute sequence, and a relationship matrix, and input the node sequence, the attribute sequence, and the relationship matrix into a type flow graph encoder to obtain a feature vector;

[0048] The generation module 30 is configured to input the feature vector and the grammar rule vocabulary into a grammar-guided generator to obtain a second abstract syntax tree, and perform code instantiation on the second abstract syntax tree to generate a repair patch, wherein the second abstract syntax tree carries the type information.

[0049] The above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: all the above modules are located in the same processor; or the above modules are located in different processors in any combination.

[0050] To facilitate understanding of the technical solutions provided by the present disclosure, embodiments of specific scenarios will be described in detail below.

[0051] FIG4 is a schematic diagram of a repair patch generation process according to an embodiment of the present disclosure. As shown in FIG4 , the process involves the following modules: an abstract type system, a type flow graph constructor, a type flow graph encoder, and a syntax-guided generator.

[0052] In one embodiment, the abstract type system defines a set of rules that can abstract the types of variables, constants, and operators in program source code and convert the program source code into an abstract syntax tree with type information.

[0053] A type flow graph constructor is used to convert an abstract syntax tree into a type flow graph, which is used to record the adjacency relationship between typed abstract syntax tree nodes and user-defined variable nodes; based on the type flow graph and its construction rules, the embodiment of the present disclosure can organically integrate the syntax rules and type rules of the program source code.

[0054] The type flow graph encoder is used to generate feature vectors based on the node sequence, attribute sequence and relationship matrix recorded in the type flow graph. By extracting the node sequence, attribute sequence and relationship matrix of the type flow graph, the grammatical rules and type rules of the program source code are encoded using a neural network, and type constraints can be assigned to the repair patch during the patch generation process.

[0055] In one embodiment, the abstract type system defines the following five rules:

[0056] 1) Convert the program source code into an abstract syntax tree. The variables, constants, and operators in the program source code statements are the leaf nodes of the abstract syntax tree.

[0057] 2) Define five abstract types: generic type, string type, numeric type, Boolean type, and null type. Null type is a subtype of string type, numeric type, and Boolean type; generic type is a supertype of string type, numeric type, and Boolean type; the supertype of generic type is generic type, and the subtype of null type is null type.

[0058] 3) According to the types defined above, variables or constants in the program source code can be abstracted as one of the string type, numeric type, and Boolean type, and NULL is classified as the empty type.

[0059] 4) The type of an operator is determined by the type of its operands. If all operand types of an operator are the same, the operator type is the same as the operand type; if there are two or more operand types, the operator type is the supertype of all operand types.

[0060] 5) The type of a non-leaf node in the abstract syntax tree is determined by the type of its child nodes. If all child nodes of a non-leaf node are of the same type, the type of the node is the same as the type of its child nodes. If there are two or more types of child nodes, the type of the node is the parent type of all child node types.

[0061] In one embodiment, a type flow graph is a graph data structure that includes a set of nodes and a set of edges. The construction rules of the type flow graph are as follows:

[0062] 1) The node set includes an abstract syntax tree node subset (the elements of which are called Anodes) and a variable node subset (the elements of which are called Vnodes).

[0063] 2) Each Anode has two attributes: a type attribute and a replicability attribute. The value of the type attribute is one of five abstract types; the replicability attribute is a Boolean value that indicates whether the abstract syntax subtree with this node as the root node depends on the variables of the local context so that the abstract syntax subtree can be independently copied to other locations.

[0064] 3) Each Vnode represents a user-defined element (variable or parameter) within a context, where the context refers to the scope of the program source code corresponding to the abstract syntax tree. Each Vnode has two attributes: a type attribute and an accessibility attribute. The type attribute's value is the actual type of the element at its definition; the accessibility attribute is a Boolean value indicating whether the element is accessible at the location of the defective code.

[0065] 4) The edge set contains four subsets: Anode-Anode, Anode-Vnode, Vnode-Anode, and Vnode-Vnode. The edges in the edge set are directed and have an attribute label. The specific edge attribute information is shown in Table 1.

[0066] Table 1

[0067] 5) The edges in the Anode-Anode set represent the grammatical relationship between the abstract syntax tree nodes. The relationship between two Anodes is one of the four relationships: parent-child, child-parent, left sibling, and right sibling.

[0068] 6) The edges in the Vnode-Anode set represent the relationship between the variables in the context and the abstract syntax tree nodes. If the root node of the abstract syntax subtree corresponding to the declaration statement of variable x is y, then x has an edge with the "variable-declaration" attribute connected to y; similarly, if the abstract syntax tree node m uses the variable n, then n has an edge with the "variable-use" attribute connected to m.

[0069] 7) An edge in the Anode-Vnode set is the inverse of the corresponding edge in the Vnode-Anode set.

[0070] 8) The edge in the Vnode-Vnode set represents the compatibility relationship between two variable types.

[0071] In one embodiment, the type flow graph constructor converts the typed abstract syntax tree into a type flow graph that satisfies the above rules.

[0072] In one embodiment, the type flow graph encoder is an organic stack of a series of neural network layers, which is used to encode the type flow graph information into a feature vector through learning. Its internal structure is shown in Figure 5.

[0073] As shown in Figure 5, the inputs to the type flow graph encoder are attribute sequences, node sequences, and relationship matrices, and the output is a feature vector. Each of these inputs passes through its own embedding layer to obtain the attribute embedding vector, node embedding vector, and relationship embedding vector. The node and relationship embedding vectors are fused using type-sensitive self-attention neurons, then passed through a gating layer with the attribute embedding vector, and finally linearly transformed using a linear layer.

[0074] In this embodiment, the embedding layer, type-sensitive self-attention neurons, gating layer and linear layer are all from neural network units disclosed in the industry, which together constitute a neural network block.

[0075] In this embodiment, the type flow graph encoder is composed of N neural network blocks connected in series, where N is an integer greater than 0. Except for the first neural network block whose input is the embedding vector of the attribute sequence, node sequence and relationship matrix, the input of other neural network blocks are all the output of the previous neural network block.

[0076] Figure 6 is a flowchart of the method for automatically repairing program defects based on type constraints according to an embodiment of the disclosed scenario. Taking the Java example defective code fragment (hereinafter referred to as defective code) in Figure 7(a) as an example, the following describes in detail how to repair the defect in Figure 7(a) through the method for automatically repairing program defects in this embodiment.

[0077] In this embodiment, the lines starting with “-” in the defective code are defective code lines, and the lines starting with “+” are corresponding repair code lines.

[0078] As shown in Figure 7(a), four variables are defined in the defective code: loc0, loc1, loc2, and loc3. Loc0 is of type Boolean, and the other three variables are of type double. Variables loc0, loc1, and loc2 are defined before the defective code line and are therefore accessible there. Variable loc3 is defined after the defective code line and is therefore inaccessible there.

[0079] In one embodiment, as shown in FIG6 , the method for automatically repairing program defects based on type constraints in this embodiment includes the following steps:

[0080] S601: Collect a large amount of program source code corpus, convert it into multiple typed abstract syntax trees through an abstract type system, and obtain a typed grammar rule vocabulary by traversing the abstract syntax trees.

[0081] In this embodiment, by extracting a large amount of program source code, multiple typed abstract syntax trees are generated. By traversing each typed abstract syntax tree, multiple grammar rules are obtained. After deduplication, these grammar rules are combined to form a typed grammar rule vocabulary, which can be used by the subsequent neural network to generate the abstract syntax tree of the repaired code.

[0082] S602: The defective code obtains a typed abstract syntax tree through the abstract type system, and then obtains a type flow graph through the type flow graph constructor.

[0083] In this embodiment, an abstract type system is used to convert the defective code into a typed abstract syntax tree. The resulting abstract syntax tree is shown in FIG7( b ). The type information in the abstract syntax tree is determined as follows:

[0084] For example, according to the definition of the abstract type system, the type of an operator must either be consistent with the types of all its operands or be a supertype of all its operand types. The "-" operator has two operands, "loc2" and "1." The actual type of "loc2" is double, abstracted as a numeric type; "1" is a numeric constant, also abstracted as a numeric type. Therefore, the type of the "-" operator is consistent with the types of its two operands, namely, numeric types. The deduction of types for other operators in the abstract syntax tree is similar.

[0085] For another example, according to the definition of the abstract type system, the type of a parent node is either the same as the type of all its child nodes, or the parent type of all its child node types. As shown in Figure 7(b), the parent node "BinOp_N" has three child nodes "L-Op_N", "Operator_N" and "R-Op_N". These three child nodes are all numeric types, so the parent node "BinOp_N" is also a numeric type. The type deduction of other parent nodes is similar.

[0086] Similar to step S601, by traversing the child nodes of the typed abstract syntax tree obtained in step S602, a series of grammar rules can be obtained, for example: "Assignment_N->L-Expr_N AssignOp_N R-Expr_N", which means that the three child nodes "L-Expr_N", "AssignOp_N" and "R-Expr_N" can be derived from the "Assignment_N" node.

[0087] According to the definition of type flow graph, we convert the typed abstract syntax tree in Figure 7(b) into a type flow graph. The resulting type flow graph is shown in Figure 8.

[0088] As shown in Figure 8, the type flow graph contains two types of nodes:

[0089] (1) Abstract syntax tree node Anode (represented by a rectangular box in Figure 8), which has type attributes and replicability attributes.

[0090] The type attribute takes one of the five types defined by the abstract type system, namely, generic type, string type, numeric type, Boolean type, and null type;

[0091] The replicability attribute takes a value of 0 or 1. A value of 0 indicates that the node depends on context variables, and the subtree rooted at that node cannot be replicated elsewhere for reuse. For example, the "BinOp_N" node has a numeric type attribute and a replicability attribute of 0 because it depends on the variable "loc2."

[0092] (2) Another type of node is the variable node Vnode (represented by an ellipse in Figure 8), which has type attributes and accessibility attributes.

[0093] The value of the type attribute is consistent with the actual type of the variable. The accessibility attribute takes a value of 0 or 1. A value of 0 indicates that the variable is inaccessible at the defective code line. For example, the ellipse node "loc3" is of type double, and its accessibility attribute is 0. This is because the variable statement corresponding to this node, "double loc3 = 0," is defined after the defective code "loc1 = loc2 - 1," making the variable inaccessible at the defective code line.

[0094] The type flow graph also contains four types of edges with a total of 11 attributes, for example, as shown in Figure 8:

[0095] The edge from node "BinOp_N" to node "L-Op_N" belongs to the Anode-Anode parent-child attribute, and the corresponding attribute number in Table 1 is 1;

[0096] The edge from the rectangular node "loc1" to the elliptical node "loc1" belongs to the Anode-Vnode using variable attribute, which means that the rectangular node "loc1" uses the elliptical node "loc1", and the corresponding attribute number in Table 1 is 6;

[0097] The edge from the ellipse node "loc1" to the rectangle node "loc1" belongs to the Vnode-Anode variable usage attribute, which means that the rectangle node "loc1" uses the ellipse node "loc1", and the corresponding attribute number in Table 1 is 8; the same applies to the two edges between the rectangle node "loc2" and the ellipse node "loc2";

[0098] The edge attributes of the edge from the ellipse node "loc1" to the ellipse node "loc2", the edge attributes of the edge from the ellipse node "loc1" to the ellipse node "loc3", and the edge attributes of the edge from the ellipse node "loc2" to the ellipse node "loc3" all indicate the same type;

[0099] The edge attributes between ellipse node "loc0" and ellipse nodes "loc1," "loc2," and "loc3" all have incompatible types. For example, while ellipse nodes "loc1" and "loc2" have the same type, the double type of ellipse node "loc2" and the boolean type of ellipse node "loc0" are incompatible. There are also other types of edge attributes that are compatible. For example, in C, type int is compatible with type int64.

[0100] S603, pre-order traversal of the node names in the type flow graph to obtain the first part of the node sequence, i.e., the Anode sequence; then traversal of the variable names according to the order in which the variables appear in the defect code context, and determination of the second part of the node sequence, i.e., the Anode sequence, based on the variable names. The two parts of the sequence are concatenated to obtain a complete node sequence.

[0101] In one embodiment, traversing the type flow graph of FIG8 can obtain three data: node sequence, attribute sequence, and relationship matrix, including:

[0102] Perform a pre-order traversal of the typed abstract syntax tree nodes in Figure 8 to obtain the Anode sequence:

[0103] [Assignment_N, L-Expr_N, loc1, AssignOp_N, =, R-Expr_N, BinOp_N, L-Op_N, loc2, Operator_N, -, R-Op_N, 1];

[0104] Since the accessibility attribute of the ellipse node "loc3" is 0, the defective code line cannot access the variable loc3. Therefore, the Vnode sequence does not contain the ellipse node "loc3", that is, the Vnode sequence is:

[0105] [loc0, loc1, loc2].

[0106] That is, the Vnode sequence is a sequence fragment of variable names that can be accessed at the defect code.

[0107] The node sequence is the concatenation of the Anode sequence and the Vnode sequence, namely:

[0108] [Assignment_N,L-Expr_N,loc1,AssignOp_N,=,R-Expr_N,BinOp_N,L-Op_N,loc2,Operator_N,-,R-Op_N,1,loc0,loc1,loc2].

[0109] S604: Obtain the node attribute value of each node in the order of the node sequence to obtain an attribute sequence.

[0110] Based on the above node sequence and in the order of the node sequence, replacing each variable in the node sequence with the corresponding type, we can get an attribute sequence: [(value, 0), (value, 0), (value, 0), (value, 1), (value, 1), (value, 0), (value, 0), (value, 0), (value, 1), (value, 1), (value, 1), (boolean, 1), (double, 1), (double, 1)].

[0111] Among them, the first 13 are Anode nodes, which include type attributes and reproducibility attributes, "0" represents non-reproducibility and "1" represents reproducibility; the last 3 are Vnode nodes, which include type attributes and accessibility attributes, "1" represents accessibility.

[0112] S605, obtaining a relationship matrix of type flow graph nodes;

[0113] In one embodiment, the relationship matrix of a type flow graph is an adjacency matrix between the nodes of the type flow graph, and the matrix size is 16x16. A portion of the relationship matrix is ​​shown in Table 2. The rows and columns of the relationship matrix are both node sequences. If two nodes are adjacent, the value of the matrix is ​​the attribute number corresponding to the edge of the two nodes, and the value range is 1 to 11, as shown in Table 1. If the two nodes are not adjacent, the value of the matrix is ​​0, and the nodes themselves are considered non-adjacent. Since the edges of the type flow graph are directed, the values ​​of the relationship matrix are read from rows to columns.

[0114] For example, the value of the second column of the first row (excluding the header) in Table 2 is 1, indicating that the node "Assignment_N" to the node "L-Expr_N" is a parent-child node relationship.

[0115] Table 2

[0116] S606: Obtain a feature vector by passing the node sequence, attribute sequence, and relationship matrix through a type flow graph encoder.

[0117] In one embodiment, the node sequence, attribute sequence, and relationship matrix obtained above are input into the type flow graph encoder of Figure 4. The node sequence, attribute sequence, and relationship matrix are first passed through the embedding layer to obtain the node embedding vector, attribute embedding vector, and relationship embedding vector respectively. These three embedding vectors are all floating-point matrices.

[0118] The node embedding vector and the relationship embedding vector are fused through type-sensitive self-attention neurons. The fused vector is fused with the attribute embedding vector through a gating layer, and finally a linear transformation is performed through a linear layer to output the feature vector of the first neural network block.

[0119] The entire type flow graph encoder is composed of N neural network blocks connected in series. In this embodiment, the value of N is 8. The three inputs of the latter neural network block are obtained by copying the output of the previous neural network block. The output of the last neural network block is the output of the entire type flow graph encoder, that is, a feature vector is output, and the value is a floating point number.

[0120] S607: Input the feature vector and the grammar rule vocabulary into the grammar-directed generator to predict a grammar rule with a type, which represents an editing operation on an abstract syntax tree node.

[0121] In one embodiment, the grammar-directed generator starts to generate the first grammar rule according to the input feature vector and the typed grammar rule vocabulary, for example: "Assignment_N->L-Expr_N AssignOp_N R-Expr_N";

[0122] S608 , predicting grammatical rules and editing the abstract syntax tree are iteratively performed until a complete abstract syntax tree is generated. The abstract syntax tree is different from the abstract syntax tree obtained based on the defective code in step S602 .

[0123] In one embodiment, a second grammar rule is generated based on the first grammar rule in step S607, for example: "L-Expr_N->loc1". The generation process is performed iteratively until a complete abstract syntax tree is generated, as shown in Figure 7(c).

[0124] S609: Instantiate the abstract syntax tree generated in step S608 to obtain a repair patch.

[0125] In one embodiment, the generated abstract syntax tree needs to be further restored to the program source code "loc1=1;", which is the repair code (patch) for the defective code "loc1=loc2-1;". That is, the repair of this program is to change the value of loc1 from "loc2-1" to the constant 1.

[0126] The above-mentioned embodiments of the present disclosure can be applied to a program defect repair tool.

[0127] Through the above-mentioned embodiments of the present disclosure, a repair patch that can simultaneously meet the grammatical rules and type constraints can be output based on the input defect code, thereby expanding the capabilities of the existing syntax-guided defect repair method, avoiding the generation of incorrect type patches, and improving the accuracy of defect repair, thereby improving the efficiency of software development and maintenance and reducing labor costs.

[0128] An embodiment of the present disclosure further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any one of the above method embodiments when run.

[0129] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0130] An embodiment of the present disclosure further provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0131] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0132] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail here.

[0133] Obviously, those skilled in the art should understand that the modules or steps of the present disclosure described above can be implemented using a general-purpose computing device, they can be concentrated on a single computing device, or distributed across a network composed of multiple computing devices, they can be implemented using program code executable by the computing device, and thus, they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be performed in a different order than herein, or they can be fabricated into separate integrated circuit modules, or multiple modules or steps can be fabricated into a single integrated circuit module for implementation. Thus, the present disclosure is not limited to any particular combination of hardware and software.

[0134] The foregoing description is merely a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. Those skilled in the art will readily appreciate that various modifications and variations of the present disclosure are possible. Any modifications, equivalent substitutions, or improvements made within the principles of the present disclosure shall be included within the scope of protection of the present disclosure.

Claims

1. A repair patch generation method, comprising: Constructing a program code containing a defective code into a first abstract syntax tree, and converting the first abstract syntax tree into a type flow graph by a type flow graph constructor, wherein the first abstract syntax tree carries type information; Traversing the type flow graph to obtain a node sequence, an attribute sequence, and a relationship matrix, and inputting the node sequence, the attribute sequence, and the relationship matrix into a type flow graph encoder to obtain a feature vector; The feature vector and the grammar rule vocabulary are input into a grammar-directed generator to obtain a second abstract syntax tree, and the second abstract syntax tree is instantiated into code to generate a repair patch, wherein the second abstract syntax tree carries the type information.

2. The method according to claim 1, wherein: Before constructing the program code containing the defective code into a first abstract syntax tree, the method further includes: Converting the program source code corpus into a plurality of third abstract syntax trees through an abstract type system, wherein the third abstract syntax trees carry the type information; All the third abstract syntax trees are traversed to obtain the grammar rule vocabulary, wherein the grammar rule vocabulary carries the type information.

3. The method according to claim 1 or 2, wherein: The leaf nodes in the first abstract syntax tree are obtained by abstracting constants, variables, and operators in the program code; The leaf nodes in the third abstract syntax tree are obtained by abstracting constants, variables, and operators in the program source code corpus.

4. The method according to claim 3, wherein: The type information includes the following types: general type, string type, numerical type, Boolean type and empty type; The empty type is a subtype of the string type, the numeric type, and the Boolean type; The generic type is a parent type of the string type, the numeric type, and the Boolean type; The parent type of the generic type is the generic type, and the child type of the empty type is the empty type.

5. The method according to claim 4, wherein: The type of the constant in the program code or the program source code corpus includes one of the following: string type, numerical type, Boolean type; The type of the variable in the program code or the program source code corpus includes one of the following: string type, numerical type, Boolean type; The type of an operator in the program code or the program source code corpus is determined by the type of its operand; NULL in the program code or the program source code corpus is classified as the empty type.

6. The method according to claim 5, wherein: The type of an operator in the program code or the program source code corpus is determined by the type of its operand, including: If all operands of the operator are of the same type, the operator type is the same as the type of its operands; If there are multiple types of operands of the operator, the operator type is the supertype of all its operand types.

7. The method according to claim 4, wherein: The type of a non-leaf node in the first abstract syntax tree or the third abstract syntax is determined by the type of its child node; In the case where all child nodes of the non-leaf node are of the same type, the type of the non-leaf node is the same as the type of its child nodes; In the case that the non-leaf node has multiple types of child nodes, the type of the non-leaf node is the parent type of all its child node types.

8. The method according to claim 1, wherein: Converting the first abstract syntax tree into a type flow graph by a type flow graph constructor includes: Convert each node in the first abstract syntax tree into an abstract syntax tree node in the type flow graph; Abstracting the variables in the program code into variable nodes in the type flow graph; The abstract syntax tree nodes, the variable nodes, and the abstract syntax tree nodes and the variable nodes corresponding to the same variable are connected by edges with different attributes.

9. The method according to claim 8, wherein: The attributes of the edges between the nodes of the abstract syntax tree include: parent-child, child-parent, left brother, right brother; The attributes of the edges between the variable nodes include: same type, compatible type, incompatible type; The attributes of the edge connecting the abstract syntax tree node and the variable node corresponding to the same variable include: declaration-variable, use-variable, variable-declaration, variable-use.

10. The method according to claim 8, wherein: Traversing the type flow graph to obtain a node sequence includes: Traversing the abstract syntax tree node names of the first abstract syntax tree in the type flow graph, and composing all the abstract syntax tree node names into a first sequence segment; According to the order of appearance of each variable in the program code context, traverse the variable node names in the first abstract syntax tree, and form the variable node names accessible at the defective code into a second sequence segment; The first sequence fragment and the second sequence fragment are spliced ​​to obtain the node sequence.

11. The method according to claim 10, wherein: Traversing the type flow graph to obtain a sequence of attributes includes: According to the arrangement order of the abstract syntax tree nodes and the variable nodes in the node sequence, the node attribute values ​​corresponding to each of the abstract syntax tree nodes and each of the variable nodes are obtained in sequence, and all of the node attribute values ​​are combined into the attribute sequence.

12. The method according to claim 11, wherein: The abstract syntax tree node includes the following attributes: type attribute, replicability; the variable node includes the following attributes: type attribute, accessibility.

13. The method according to claim 1, wherein: The node sequence, the attribute sequence, and the relationship matrix are input into a type flow graph encoder to obtain a feature vector, including: Obtaining a node embedding vector, an attribute embedding vector, and a relationship embedding vector through an embedding layer in the type flow graph encoder based on the input node sequence, the attribute sequence, and the relationship matrix; fusing the node embedding vector and the relationship embedding vector through a type-sensitive self-attention neuron in the type flow graph encoder to obtain a first fused vector; fusing the attribute embedding vector and the first fused vector through a gating layer in the type flow graph encoder to obtain a second fused vector; The second fused vector is linearly transformed through the linear layer in the type flow graph encoder to obtain the feature vector.

14. The method according to claim 1, wherein: The value of the feature vector is a floating point number.

15. The method according to claim 1, wherein: Inputting the feature vector and the grammar rule vocabulary into a grammar-directed generator to obtain a second abstract syntax tree, including: Inputting the feature vector and the grammar rule vocabulary into a grammar-directed generator, predicting a first grammar rule, and performing an editing operation on an abstract syntax tree according to the first grammar rule to obtain a first partial abstract syntax tree, wherein the first grammar rule carries type information; Predicting a second grammar rule based on the first partial abstract syntax tree, the feature vector, and the grammar rule vocabulary, and performing an editing operation on the abstract syntax tree according to the second grammar rule to obtain a second partial abstract syntax tree, wherein the second grammar rule carries type information; The grammar rule prediction step and the abstract syntax tree editing step are iterated until the second abstract syntax tree is completely obtained.

16. A computer-readable storage medium, wherein: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 15 when executed by a processor.

17. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 15 are implemented.

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