Display device, display device control method, and computer storage medium

By setting a test line in the display device and determining the length of the connecting circuit board by using the sending and receiving time of the test line, the problem of poor applicability of the display device in the prior art is solved, and the connecting circuit board suitable for various lengths is realized, which simplifies the Development process and reduce costs.

WO2025001665A1PCT designated stage expired Publication Date: 2025-01-02BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
PCT/CN2024/095088
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-06-30
Filing Date
2024-05-24
Publication Date
2025-01-02

AI Technical Summary

Technical Problem

In different application scenarios, the existing display devices need to write sampling clocks of different phases due to different lengths of the connection circuit boards, resulting in poor applicability and increasing the difficulty of secondary development.

Method used

By setting a test line in the display device, determining the length of the connection circuit board using the transmission and reception time of the test line, and determining the phase of the sampling clock based on the length, connecting circuit boards suitable for various lengths is realized.

Benefits of technology

It improves the applicability of the display device, simplifies the application in different application scenarios, and reduces the difficulty of development and manufacturing costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display device, a display device control method, and a computer storage medium. The display device is provided with a test circuit (332), and the test circuit (332) comprises two first test lines (s1) extending in a first direction (fl). Two ends of each first test line (s1) are respectively located at the end of a connection circuit board (33) close to a first control assembly (32) and the end of the connection circuit board (33) close to a second control assembly (34), and the two first test lines (S1) are electrically connected to the second control assembly (34), respectively. In this way, a test signal can be sent to the test lines (s1) by means of the second control assembly (34), and after the reception of the test signal, the length of the connection circuit board (33) is determined on the basis of the sending time point and receiving time point of the test signal; then, the phase of a sampling clock is further determined on the basis of the length of the connection circuit board, such that the display device can be applicable to connection circuit boards (33) of different lengths. The effect of improving the applicability of display devices is achieved.
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Description

Display device, display device control method, and computer storage medium

[0001] This application claims priority to Chinese patent application No. 202310812949.0, filed on June 30, 2023, entitled “Display device, control method for display device, and computer storage medium.” The entire contents of the above case are incorporated by reference into this disclosure. Technical Field

[0002] The present application relates to the field of display technology, and in particular to a display device, a control method for a display device, and a computer storage medium. Background Art

[0003] A display device is a device that can realize display function.

[0004] A display device includes a display panel, a source driver circuit, a connecting circuit board, and a timing controller. The source driver circuit is connected to the display panel, and the connecting circuit board is connected to the source driver circuit and the timing controller, respectively. The source driver circuit can obtain a measurement signal from the display panel and transmit the measurement signal to the timing controller. The timing controller samples the measurement signal using a preset sampling clock and controls the display panel based on the measurement signal.

[0005] However, in different application scenarios, the length of the connecting circuit board in the display device may be different, and thus sampling clocks of different phases need to be written into the timing controller, resulting in poor applicability of the above display device.

[0006] Summary of the Invention

[0007] The embodiments of the present application provide a display device, a control method for the display device, and a computer storage medium. The technical solution is as follows:

[0008] According to one aspect of an embodiment of the present application, a display device is provided, comprising: a display panel, a first control component, a connection circuit board, and a second control component;

[0009] The display panel is connected to the first control component, one end of the connecting circuit board is connected to the first control component, and the other end of the connecting circuit board is connected to the second control component;

[0010] The connecting circuit board includes a board body, a test circuit located on the board body, and a signal transmission line, the test circuit including two first test lines extending along a first direction, the first ends of the two first test lines being electrically connected and both located at an end of the connecting circuit board close to the first control component, the second ends of the two first test lines being located at an end of the connecting circuit board close to the second control component, and the second ends of the two first test lines being electrically connected to the second control component, respectively, the first direction being a direction parallel to the signal transmission line, and the signal transmission line being used to transmit signals between the first control component and the second control component;

[0011] The second control component is used to: send a test signal to the second end of one of the two first test lines, and receive the test signal from the second end of the other of the two first test lines, determine the length of the connecting circuit board in the first direction based on the sending time and the receiving time of the test signal, and determine the phase of the sampling clock based on the length of the connecting circuit board in the first direction.

[0012] Optionally, the test circuit also includes an even number of second test lines extending along the first direction, the first end of the second test line is located at one end of the connecting circuit board close to the first control component, the second end of the second test line is located at one end of the connecting circuit board close to the second control component, the even number of second test lines are connected in series, and the even number of second test lines are connected in series with the first ends of the two first test lines.

[0013] Optionally, the plate body includes a plurality of strip-shaped plate bodies, and the length direction of the strip-shaped plate bodies is parallel to the first direction.

[0014] Optionally, the test lines in the test circuit are respectively located on at least two of the plurality of strip-shaped plates, and the test lines in the test circuit include the first test line and the second test line.

[0015] Optionally, the first test line and the second test line are both located on a first strip plate among the plurality of strip plates.

[0016] Optionally, the display device further includes a first connection structure, which is located in the first control component and the second control component, and is connected to the even-numbered second test lines, and connects the even-numbered second test lines in series with the first ends of the two first test lines.

[0017] Optionally, the connection circuit board further includes a second connection structure located on the board body, the second connection structure is connected to the even-numbered second test lines, and connects the even-numbered second test lines and the first ends of the two first test lines in series.

[0018] Optionally, the display device further includes a third connecting structure and a fourth connecting structure, the third connecting structure is located on the connecting circuit board, and the fourth connecting structure is located in the first control component or the second control component;

[0019] When the fourth connection structure is located in the first control assembly, the third connection structure is connected to the second ends of the even-numbered second test lines, the fourth connection structure is connected to the first ends of the even-numbered second test lines, and the even-numbered second test lines are connected in series with the first ends of the two first test lines;

[0020] When the fourth connection structure is located in the second control component, the fourth connection structure is connected to the second ends of the even-numbered second test lines, the third connection structure is connected to the first ends of the even-numbered second test lines, and the even-numbered second test lines are connected in series with the first ends of the two first test lines.

[0021] Optionally, the first control component includes a first circuit board, a fifth connecting structure, and a plurality of first controllers, wherein the fifth connecting structure is located on the first circuit board, and the plurality of first controllers are electrically connected to the first circuit board;

[0022] The third connection structure is connected to the first ends of the two first test lines.

[0023] Optionally, the second control component includes a second circuit board, a connecting line located on the second circuit board, and a second controller, and the second controller is electrically connected to the second ends of the two first test lines through the connecting line;

[0024] The connecting line is connected to the first ends of the two first test lines.

[0025] Optionally, the second circuit board includes an edge area connected to the connection circuit board, and the second controller is located in the edge area.

[0026] Optionally, the first control component is a source driver control component, and the second controller is a timing control component.

[0027] Optionally, the connecting circuit board includes a flexible circuit board.

[0028] According to another aspect of an embodiment of the present application, a method for controlling a display device is provided, which is used for the second control component in the above-mentioned display device. The method includes:

[0029] sending a test signal to a second end of one of the two first test lines in the display device;

[0030] receiving the test signal from a second end of the other first test line of the two first test lines;

[0031] determining a length of the connecting circuit board in the first direction based on a sending time and a receiving time of the test signal;

[0032] The phase of the sampling clock is determined based on the length of the connection circuit board in the first direction.

[0033] Optionally, determining the length of the connecting circuit board in the first direction based on the sending time and the receiving time of the test signal includes:

[0034] Determining a transmission time of the test signal in the test line based on a sending time and a receiving time of the test signal;

[0035] The length of the connecting circuit board in the first direction is determined based on the transmission time and the transmission speed of the test signal in the test line.

[0036] Optionally, determining the length of the connecting circuit board in the first direction based on the transmission duration and the transmission speed of the test signal in the test line includes:

[0037] Obtaining a duration difference between the transmission duration and a reference duration;

[0038] determining a length difference based on the time difference and a transmission speed of the test signal in the test line;

[0039] determining a length of the connecting circuit board in the first direction based on the length difference and a reference length;

[0040] The reference duration is the transmission duration of the test signal in the reference connection circuit board of the reference length.

[0041] Optionally, determining the length of the connected circuit board based on the sending time and the receiving time of the test signal includes:

[0042] Determining a transmission time of the test signal in the test line based on a sending time and a receiving time of the test signal;

[0043] Based on the transmission duration, searching in a preset lookup table whether there is a corresponding reference length, wherein the preset lookup table records a plurality of reference transmission durations and a reference length of the connection circuit board corresponding to each reference transmission duration;

[0044] In response to the presence of a reference length corresponding to the transmission duration in the preset lookup table, the reference length is determined as the length of the connecting circuit board in the first direction.

[0045] Optionally, receiving the test signal from the second end of the other first test line of the two first test lines includes:

[0046] The second end of the other first test line of the two first test lines is sampled by a sampling clock of a preset frequency to obtain the test signal.

[0047] According to another aspect of an embodiment of the present application, a display device is provided, comprising: a display panel, a first control component, a connecting circuit board, and a second control component;

[0048] The display panel is connected to the first control component, one end of the connecting circuit board is connected to the first control component, and the other end of the connecting circuit board is connected to the second control component;

[0049] The connecting circuit board includes a board body, a test circuit located on the board body, and a signal transmission line. The test circuit includes two first test lines extending along a first direction. The first ends of the two first test lines are electrically connected and are both located at an end of the connecting circuit board close to the first control component. The second ends of the two first test lines are located at an end of the connecting circuit board close to the second control component, and the second ends of the two first test lines are respectively electrically connected to the second control component. The first direction is a direction parallel to the signal transmission line. The signal transmission line is used to transmit signals between the first control component and the second control component.

[0050] The second control component includes:

[0051] a sending module, configured to send a test signal to a second end of one of the two first test lines in the display device;

[0052] a receiving module, configured to receive the test signal from a second end of the other first test line of the two first test lines;

[0053] a length determination module, configured to determine the length of the connection circuit board in the first direction based on a sending time and a receiving time of the test signal;

[0054] The phase determination module is configured to determine the phase of the sampling clock based on the length of the connecting circuit board in the first direction.

[0055] According to another aspect of an embodiment of the present application, a display device is provided, comprising a processor and a memory, wherein the memory stores at least one instruction, at least one program, a code set, or an instruction set, and the at least one instruction, the at least one program, the code set, or the instruction set is loaded and executed by the processor to implement a control method for the display device as described above.

[0056] According to another aspect of an embodiment of the present application, a non-volatile computer storage medium is provided, wherein the computer storage medium stores at least one instruction, at least one program, a code set, or an instruction set, and the at least one instruction, the at least one program, the code set, or the instruction set is loaded and executed by a processor to implement the control method of the display device as described above.

[0057] According to another aspect of an embodiment of the present application, a computer program product or computer program is provided, the computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the methods provided in the various optional implementations described above.

[0058] The beneficial effects of the technical solutions provided in the embodiments of the present application include at least:

[0059] By setting a test circuit in the display device, and the test circuit includes two first test lines extending along a first direction, the two ends of the first test line are respectively located on the connecting circuit board at one end close to the first control component and at one end close to the second control component, and the two first test lines are respectively electrically connected to the second control component, so that a test signal can be sent to the test line through the second control component, and after receiving the test signal, the length of the connecting circuit board is determined based on the sending time and receiving time of the test signal, and the phase of the sampling clock is further determined based on the length of the connecting circuit board, so that the display device can be applicable to connecting circuit boards of various lengths, which solves the problem of poor applicability of the display device in the related art and achieves the effect of improving the applicability of the display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0061] FIG1 is a schematic structural diagram of a display device;

[0062] FIG2 is a schematic diagram showing the correspondence between a sampling clock and a detection signal in an embodiment of the present application;

[0063] FIG3 is a schematic structural diagram of a display device provided in an embodiment of the present application;

[0064] FIG4 is a schematic structural diagram of another display device provided in an embodiment of the present application;

[0065] FIG5 is a schematic structural diagram of another display device provided in an embodiment of the present application;

[0066] FIG6 is a schematic structural diagram of another display device provided in an embodiment of the present application;

[0067] FIG7 is a schematic structural diagram of a circuit in a display device provided by the present application;

[0068] FIG8 is a schematic structural diagram of another display device provided in an embodiment of the present application;

[0069] FIG9 is a schematic structural diagram of another display device provided in an embodiment of the present application;

[0070] FIG10 is a schematic structural diagram of another display device provided in an embodiment of the present application;

[0071] FIG11 is a flow chart of a method for controlling a display device provided in an embodiment of the present application;

[0072] FIG12 is a flow chart of another method for controlling a display device provided in an embodiment of the present application;

[0073] FIG13 is a schematic diagram of a timing diagram of sending and receiving a test signal according to an embodiment of the present application;

[0074] FIG14 is a block diagram of a display device provided in an embodiment of the present application.

[0075] The above drawings illustrate specific embodiments of the present application, which will be described in more detail below. These drawings and the textual description are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION

[0076] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0077] A display device is a device that can realize a display function, as shown in FIG1 , which is a structural diagram of a display device. The display device includes a display panel 11 , a source drive control component 12 , a connecting circuit board 13 and a timing control component 14 .

[0078] The display panel 11 is connected to the source drive control component 12 . One end of the connection circuit board 13 is connected to the source drive control component 12 , and the other end of the connection circuit board 13 is connected to the timing control component 14 .

[0079] The source driver control component 12 may include a circuit board and a plurality of source driver integrated circuits (ICs) located on the circuit board. These plurality of source driver integrated circuits may obtain some detection signals from the display panel 11 and send the detection signals to the connecting circuit board 13. The connecting circuit board 13 transmits the detection signals to the timing control component 14. The timing control component 14 may determine a control signal based on the detection signal and control the display panel 11 through the control signal to improve the display effect of the display panel 11.

[0080] However, when the timing control component 14 obtains the detection signal, it needs to use the sampling clock of the corresponding phase for sampling according to the frequency of the detection signal. However, in different application scenarios, the source drive control component 12 and the timing control component 14 may be connected through connecting circuit boards 13 of different lengths, and the lengths of the traces in the connecting circuit boards 13 of different lengths will also be different, which will cause the timing control component 14 to receive the detection signal with different delays.

[0081] For example, as shown in FIG. 2 , FIG. 2 is a schematic diagram illustrating the correspondence between a sampling clock and a detection signal in an embodiment of the present application. FIG. 2 illustrates that, under different time delays, the timing control component needs to sample the detection signal using sampling clocks of different phases. The d in the detection signal may be data included in the detection signal.

[0082] In this regard, the current approach is: based on different delays, a corresponding program is written into the timing control component, in which the phase of the corresponding sampling clock is recorded. Then, when the display device is running, the timing control component can sample the detection signal using the phase of the sampling clock in the pre-written program.

[0083] However, the application of the above method is relatively cumbersome. In different application scenarios, the timing control component may need to be reprogrammed, which seriously increases the difficulty of secondary development of the display device and results in low applicability of the display panel.

[0084] The embodiments of the present application provide a display device, a method for controlling a display device, and a computer storage medium, which can solve some problems existing in the above-mentioned related technologies.

[0085] FIG3 is a schematic structural diagram of a display device provided in an embodiment of the present application. The display device includes a display panel 31 , a first control component 32 , a connecting circuit board 33 , and a second control component 34 .

[0086] The display panel 31 is connected to the first control assembly 32. One end of the connecting circuit board 33 is connected to the first control assembly 32, and the other end of the connecting circuit board 33 is connected to the second control assembly 34. In other words, the two ends of the connecting circuit board 33 are connected to the first control assembly 32 and the second control assembly 34 respectively.

[0087] The connecting circuit board 33 includes a board body 331, a test circuit 332 located on the board body 331, and a signal transmission line h1. The test circuit 332 includes two first test lines s1 extending along the first direction f1. The first ends s11 of the two first test lines s1 are respectively electrically connected to the first control component 32, and are both located at one end of the connecting circuit board 33 close to the first control component 32. The second ends s12 of the two first test lines s1 are located at one end of the connecting circuit board 33 close to the second control component 34, and the second ends s12 of the two first test lines s1 are respectively electrically connected to the second control component 34. The first direction f1 is a direction parallel to the signal transmission line h1. The signal transmission line h1 is used to transmit signals between the first control component 32 and the second control component 34. For example, it can be used to transmit various signals such as return signals, display control signals, and display data signals.

[0088] The second control component 34 is used to: send a test signal to the second end s12 of one of the two first test lines s1, and receive a test signal from the second end s12 of the other of the two first test lines s1, determine the length of the connecting circuit board 33 in the first direction f1 based on the sending time and the receiving time of the test signal, and determine the phase of the sampling clock based on the length of the connecting circuit board 33 in the first direction f1.

[0089] Among them, the first test line s1 extends along the first direction f1, and the first direction f1 is a direction parallel to the signal transmission line h1. The length of the signal transmission line h1 can be equivalent to the length of the connecting circuit board 33 in the first direction f1, and thus the first test line s1 can reflect the length of the connecting circuit board 33 in the first direction f1.

[0090] It should be noted that the second control component 34 can determine the phase of the sampling clock based on the length of the connecting circuit board 33 in the first direction f1 in a variety of ways. For example, it can pre-test to obtain the phase of the sampling clock corresponding to the sampling effect of connecting circuit boards 33 of various lengths that meets the requirements, and after obtaining the length of the connecting circuit board 33, the corresponding sampling clock phase can be selected based on the test. Alternatively, the signal transmission delay can be calculated based on the length of the connecting circuit board 33 and the transmission speed of the signal in the connecting circuit board 33, and the sampling clock phase can be determined based on the delay.

[0091] To sum up, the display device provided by the embodiment of the present application is configured to set a test circuit in the display device, and the test circuit includes two first test lines extending along a first direction, and the two ends of the first test line are respectively located on the connecting circuit board near one end of the first control component and one end near the second control component, and the two first test lines are respectively electrically connected to the second control component, so that a test signal can be sent to the test line through the second control component, and after receiving the test signal, the length of the connecting circuit board is determined based on the sending time and receiving time of the test signal, and the phase of the sampling clock is further determined based on the length of the connecting circuit board, so that the display device can be applicable to connecting circuit boards of various lengths, thereby solving the problem of poor applicability of the display device in the related art and achieving the effect of improving the applicability of the display device.

[0092] FIG4 is a schematic structural diagram of another display device provided in an embodiment of the present application, in which some adjustments are made to the display device shown in FIG3 .

[0093] The test circuit 332 further includes an even number of second test lines s2 extending along the first direction f1 (FIG. 4 shows a case where the number of second test lines s2 is 4, but this is not a limitation). The first end s21 of the second test line s2 is located at an end of the connection circuit board 33 close to the first control component 32, and the second end s22 of the second test line s2 is located at an end of the connection circuit board 33 close to the second control component 34. The even number of second test lines s2 are connected in series, and the even number of second test lines s2 are connected in series with the first ends s11 of the two first test lines s1. That is, the even number of second test lines s2 are connected in series to form a circuit, and the circuit formed in series is connected in series with the first ends s11 of the two first test lines s1.

[0094] Series connection is a basic way to connect circuit elements. In this way, various circuit elements can be connected end to end one by one. In the embodiment of the present application, an even number of second test lines s2 can be connected into an S-shaped circuit, and one end of the S-shaped circuit is electrically connected to the first end s11 of a first test line s1, and the other end is electrically connected to the first end s11 of another first test line s1. In this way, the even number of second test lines s2 are connected in series with the first ends s11 of two first test lines s1.

[0095] In this way, the length of the test circuit 332 can be extended to extend the transmission time of the test signal on the test circuit 332, thereby reducing the difficulty of the second control component 34 receiving the test signal.

[0096] In addition, it should be noted that, for the solution of directly connecting the first points s11 of the two first test lines s1, the length of the loop formed by the test line 332 and the second control component 34 is approximately the sum of the lengths of the two first test lines s1. For example, if the length of the first test line is 20 cm, the length of the loop formed by the test line 332 and the second control component 34 is 40 cm. The transmission time can be obtained by a preset formula, which may include:

[0097] Among them, v is the transmission speed of the test signal (electrical signal) in the first test line, c is the propagation speed of light in a vacuum, which can be 30 cm / nanosecond, Er is the dielectric constant of the first test line s1 on the connecting circuit board 33, which can be 4, L is the length of the loop formed by the test line 332 and the second control component 34, which is 40 cm, and t is the transmission time. Then the calculated v is about 15 cm / nanosecond and t is about 2.67 nanoseconds. To ensure accurate measurement, 1 nanometer must be sampled at least twice, that is, the sampling clock frequency is 2 gigahertz (GHz), which places very high demands on the processing speed of the second control component 34 (the sampling clock frequency of the detection signal). This may increase the manufacturing difficulty and manufacturing cost of the display device. In the scheme shown in Figure 4, by setting a plurality of S-shaped lines on the connecting circuit board to make multiple round trips on the connecting circuit board to increase the length of the loop formed by the test line 332 and the second control component 34, the transmission time of the test signal in the loop can be extended. For example, if the number of second test lines s2 is 8, then these 8 second test lines s2 and the two first test lines s1 can form a loop including 5 round trips. Compared with the above-mentioned scheme of directly connecting the first points s11 of the two first test lines s1, the length of the loop formed by the test line 332 and the second control component 34 in this scheme is increased by 5 times, and the transmission time is also increased by 5 times. The frequency requirement of the sampling clock of the second control component 34 is also reduced to 1 / 5 of the original, that is, 200 MHz. This frequency can be achieved for both field programmable gate arrays (FPGA) and application specific integrated circuits (ASIC). In this way, the processing speed requirement for the second control component 34 is reduced, thereby reducing the manufacturing difficulty and manufacturing cost of the display device.

[0098] The connecting circuit board 33 can be used to connect the first control component 32 and the second control component 34. The connecting circuit board 33 can have multiple lines, which can be used to transmit various signals between the first control component 32 and the second control component 34. These signals may include signals for implementing the display function of the display device. In addition, the connecting circuit board 33 is connected to the first control component 32 and the second control component 34 via a connector, but the number of connection terminals (or pins) of the connector is limited. In addition to the connection terminals occupied by the circuits on the connecting circuit board for implementing the display function, the remaining connection terminals of the connector can become redundant connection terminals. The number of second test lines s2 can be determined based on the number of redundant connection terminals on the connecting circuit board 33. For example, the number of second test lines s2 can be positively correlated with the number of redundant connection terminals, that is, the more redundant connection terminals, the more second test lines s2 can be correspondingly increased. In addition, the number of second test lines s2 can also be determined based on other factors. For example, the number of second test lines s2 can be negatively correlated with the length of the connecting circuit board 33 in the first direction, that is, the longer the length of the connecting circuit board 33 in the first direction, the fewer second test lines s2 can be.

[0099] It should be noted that the electrical connection between the two structures involved in the embodiments of the present application may include an electrical connection in which the two structures are in direct contact, or it may refer to an indirect electrical connection between the two structures achieved through some other electrical devices (such as wires, switches, resistors, diodes, circuit boards and other devices).

[0100] In an exemplary embodiment, the first control component 32 is a source driver control component, which may include a source driver integrated circuit (Source IC) that can be used to control source traces in the display panel. The second controller 34 is a timing control component (TCON).

[0101] In addition, in the embodiment of the present application, the electrical connection relationship between the first test line s1, the second test line s2 and the second control component 34 involved in the above embodiment can be achieved in various ways.

[0102] Optionally, the display device further includes a first connection structure 35, which is located in the first control component 32 and the second control component 34. The first connection structure 35 is connected to the even-numbered second test lines s2 and connects the even-numbered second test lines s2 in series with the first ends s11 of the two first test lines s1.

[0103] In this structure, the electrical connection between the first test line s1, the second test line s2, and the second control component 34 is achieved by providing a first connection structure 35 in the first control component 32 and the second control component 34. The first connection structure 35 may include conductive lines and conductive structures located in the first control component 32 and the second control component 34.

[0104] In an exemplary embodiment, the first control component 32 includes a first circuit board 321 and a plurality of first controllers 323. The plurality of first controllers 323 are electrically connected to the first circuit board 321. The first circuit board 321 may include a printed circuit board (PCB), such as an xPCB (horizontally printed circuit board), and the first controllers 323 may be driver integrated circuits. In addition, the plurality of first controllers 323 are also electrically connected to the display panel 31 to control the display panel 31.

[0105] The second control component 34 includes a second circuit board 341 and a second controller 343 located on the second circuit board 341. The second controller 343 may include an FPGA or an ASIC.

[0106] The first connecting structure 35 includes a first part 351 located on the first circuit board 321 and a second part 352 located on the second circuit board 341. The first part 351 and the second part 352 can connect an even number of second test lines s2 into one line, and connect the second test lines s2 connected into one line in series with the two first test lines s1. In addition, the second part 352 located on the second circuit board 341 can also connect the two first test lines s1 to the second controller 343.

[0107] In the display device shown in FIG4 , a first connection structure 35 is connected to an even number of second test lines s2, connecting these even number of second test lines s2 into a single circuit (an S-shaped circuit) and connecting these even number of second test lines s2 in series with the first ends s11 of the two first test lines s1. In this structure, the connection between the first test lines s1 and the second test lines s2 is achieved on the first circuit board 321 in the first control component 32 and the second circuit board 341 in the second control component 34. This connection method does not require modifications to the connecting circuit board 33, further enhancing the applicability of the display panel provided by the embodiments of the present application.

[0108] Optionally, the connection circuit board 33 includes a flexible circuit board, which may be a flexible printed circuit (FPC) or a flexible flat cable (FFC).

[0109] It should be noted that the connecting circuit board 33 includes a flexible circuit board, and the length of the connecting circuit board 33 in the first direction f1 may refer to the length of the connecting circuit board 33 in the first direction f1 when it is in a flat state.

[0110] It should be noted that in order to clearly illustrate various lines in FIG. 4 , different thicknesses, dashed lines, and solid lines are used to represent various lines, but this is not a limitation.

[0111] Of course, in the display device provided in the embodiment of the present application, the connection relationship between the first test line and the second test line can also be realized by other methods. For example, as shown in Figure 5, Figure 5 is a structural schematic diagram of another display device provided in the embodiment of the present application, wherein the connecting circuit board 33 includes a second connecting structure 333 located on the board body 331, and the second connecting structure 333 is connected to the even number of second test lines s2, and the even number of second test lines are connected in series with the first ends s11 of the two first test lines s1. It should be noted that the second connecting structure 333 is to connect the even number of second test lines s2 connected into one line in series with the first ends s11 of the two first test lines s1.

[0112] In the solution shown in FIG. 5 , the connection relationship between the first test line and the second test line is realized by connecting the circuits on the circuit board 33 .

[0113] In addition, the connection relationship between the first test line and the second test line can be realized by cooperating with the connection circuit board 33 through the first control component 32 and one of the second control components.

[0114] For example, as shown in Figure 6, Figure 6 is a structural schematic diagram of another display device provided in an embodiment of the present application, wherein the display device also includes a third connecting structure 36 and a fourth connecting structure 37, the third connecting structure 36 is located on the connecting circuit board 33, and the fourth connecting structure 37 is located in the first control component 32 or the second control component 34 (Figure 6 shows the case where the fourth connecting structure 37 is located in the second control component 34, but this is not limited to this).

[0115] When the fourth connection structure 37 is located in the second control component 34, the fourth connection structure 37 is connected to the second ends s22 of the even-numbered second test lines s2, the third connection structure 36 is connected to the first ends s21 of the even-numbered second test lines s2, and the even-numbered second test lines s2 are connected in series with the first ends s11 of the two first test lines s1.

[0116] Correspondingly, when the fourth connection structure is located in the first control component, the third connection structure is connected to the second ends of the even-numbered second test lines, the fourth connection structure is connected to the first ends of the even-numbered second test lines, and the even-numbered second test lines are connected in series with the first ends of the two first test lines.

[0117] In the display device provided in an embodiment of the present application, the first control component can be used to obtain some data inside the display panel. In an exemplary embodiment, please refer to Figure 7, which is a structural schematic diagram of a circuit in the display device provided in the present application. The circuit is a 3T1C pixel circuit, which includes three thin film transistors (TFTs) T1, T2, and T3, and a capacitor C. Among them, T2 is a driving TFT, T1 and T3 are switching TFTs, and T3 is connected to a sense line. The sense line can obtain a detection signal from a sub-pixel and transmit the detection signal to a source driver integrated circuit. Since the detection signal transmitted to the source driver integrated circuit is a voltage analog signal, the analog-to-digital converter in the source driver integrated circuit can convert the voltage analog signal into a digital signal and transmit it to the timing control component via a low-voltage differential signaling (LVDS) format. The timing control component can calculate compensation data based on the detection signal in the LVDS format and compensate each sub-pixel to improve the display effect. Of course, in the display device provided in the embodiment of the present application, the pixel circuit may also have other structures, and the embodiment of the present application does not limit this.

[0118] It should be noted that a display panel may include multiple thin-film transistors to drive the display panel for display. However, there may be inconsistencies in the manufacturing process of the multiple thin-film transistors, which may result in different sizes of electrical signals on different thin-film transistors and lead to uneven display. This problem is particularly serious in active-matrix organic light-emitting diode (AMOLED) display panels. Therefore, it is necessary to supplement the sub-pixels to improve the uniformity of different sub-pixels in the display panel, thereby improving the display effect of the display panel. However, in current display devices, because the length of the connecting circuit board between the source driver integrated circuit and the timing controller is different in different application scenarios, it is necessary to write different programs into the timing controller in different application scenarios, which greatly reduces the applicability of the display device.

[0119] The display device provided in the embodiment of the present application obtains the length of the connected circuit board through a test line, so that the display device can be simply and quickly applied to various application scenarios, thereby improving the applicability of the display device.

[0120] FIG8 is a schematic diagram of the structure of another display device provided by an embodiment of the present application. Similar to the display device shown in FIG4 , the test circuit 332 also includes an even number of second test lines s2 extending along the first direction f1. The first ends s21 of the second test lines s2 are located at an end of the connection circuit board 33 near the first control assembly 32, and the second ends s22 of the second test lines s2 are located at an end of the connection circuit board 33 near the second control assembly 34. Furthermore, the even number of second test lines s2 is connected in series with the first ends s11 of the two first test lines s1.

[0121] In addition, the board body 331 of the connecting circuit board 33 includes a plurality of strip-shaped boards 331a, the length direction of each strip-shaped board 331a being parallel to the first direction f1. Each strip-shaped board 331a may include a board body and some circuits located on the board body.

[0122] Optionally, the first test line s1 and the second test line s2 are both located on a first strip plate 331a1 among the plurality of strip plates 331a. The first strip plate 331a1 can be any one of the plurality of strip plates 331a, or a predetermined strip plate 331a. For example, the strip plate 331a with the most redundant connection terminals can be determined as the first strip plate 331a1.

[0123] Alternatively, the first control assembly 32 may include two first circuit boards 321 ( FIG. 5 shows this scenario), and the strip board 331a connected to the first circuit board 321 with more redundant ports among the two first circuit boards 321 may be selected as the first strip board 331a1 to balance the lines connected to the two first circuit boards 321.

[0124] Figure 8 shows a solution for realizing the connection relationship between the first test line and the second test line through the structures on the first control component 32 and the second control component 34, but the display device shown in Figure 8 can also realize the connection relationship between the first test line and the second test line through any one of the multiple structures provided in the above embodiments, and the embodiments of the present application are not limited to this.

[0125] Optionally, the second circuit board 341 includes an edge region q1 connected to the connection circuit board 33, and the second controller 343 is located in the edge region q1. This shortens the length of the line connecting the second controller 343 to the first test line s1 in the connection circuit board 33, reducing the impact of this line when determining the length of the connection circuit board.

[0126] FIG9 is a schematic diagram of the structure of another display device provided by an embodiment of the present application. Similar to the display device shown in FIG4 , the test circuit 332 also includes an even number of second test lines s2 extending along the first direction f1. The first ends s21 of the second test lines s2 are located at an end of the connection circuit board 33 near the first control component 32, and the second ends s22 of the second test lines s2 are located at an end of the connection circuit board 33 near the second control component 34. Furthermore, the even number of second test lines s2 is connected in series with the first ends s11 of the two first test lines s1.

[0127] In addition, the connecting circuit board 33 includes a plurality of strip-shaped plates 331 a , and the length direction of the strip-shaped plates 331 a is parallel to the first direction f1 .

[0128] In an exemplary embodiment, the test lines of the test circuit 332 are respectively located on at least two of the plurality of strip plates 331a. The test lines in the test circuit 332 include a first test line s1 and a second test line s2. In this solution, the multiple test lines (s1 and s2) are arranged on the multiple strip plates 331a. This ensures that the number of test lines on a strip plate 331a is not excessive, thereby reducing the impact of these multiple test lines on a particular strip plate 331a. The multiple test lines can be arranged in various ways on the multiple strip plates 331a. For example, based on the number n of strip plates 331a, the multiple test lines can be divided into n groups, each group of test lines being arranged on a corresponding strip plate 331a. In other words, the multiple test lines are evenly arranged on each strip plate 331a. This ensures that the number of test lines on each strip plate 331a is not excessive. FIG6 illustrates such a solution. Alternatively, test lines may be set based on the number of redundant connection terminals on each strip plate 331a. The number of redundant connection terminals on the strip plate 331a may be positively correlated with the number of test lines, that is, more test lines may be set on the strip plate 331a with more redundant connection terminals, and fewer test lines may be set on the strip plate 331a with fewer redundant connection terminals, or no test lines may be set.

[0129] Figure 9 shows a solution for realizing the connection relationship between the first test line and the second test line through the structures on the first control component 32 and the second control component 34, but the display device shown in Figure 9 can also realize the connection relationship between the first test line and the second test line through any one of the multiple structures provided in the above embodiments, and the embodiments of the present application are not limited to this.

[0130] Figure 10 is a schematic diagram of the structure of another display device provided by an embodiment of the present application. The board 331 connected to the circuit board 33 includes multiple strip-shaped boards 331a, the length of which is parallel to the first direction f1. The first control assembly 32 includes a first circuit board 321, a fifth connecting structure 322, and multiple first controllers 323. The fifth connecting structure 322 is located on the first circuit board 321, and the multiple first controllers 323 are electrically connected to the first circuit board 321. The fifth connecting structure 322 is connected to the first ends s11 of the two first test lines s1.

[0131] In addition, the display device provided in the embodiment of the present application can apply at least one display device control method provided in the subsequent embodiments.

[0132] To sum up, the display device provided by the embodiment of the present application is configured to set a test circuit in the display device, and the test circuit includes two first test lines extending along a first direction, and the two ends of the first test line are respectively located on the connecting circuit board near one end of the first control component and one end near the second control component, and the two first test lines are respectively electrically connected to the second control component, so that a test signal can be sent to the test line through the second control component, and after receiving the test signal, the length of the connecting circuit board is determined based on the sending time and receiving time of the test signal, and the phase of the sampling clock is further determined based on the length of the connecting circuit board, so that the display device can be applicable to connecting circuit boards of various lengths, thereby solving the problem of poor applicability of the display device in the related art and achieving the effect of improving the applicability of the display device.

[0133] FIG11 is a flow chart of a method for controlling a display device according to an embodiment of the present application. The method may be used for the second control component in the above-mentioned display device. The method may include the following steps:

[0134] Step 1101: Send a test signal to the second end of one of two first test lines in a display device.

[0135] Step 1102: Receive a test signal from the second end of the other first test line of the two first test lines.

[0136] Step 1103: Determine the length of the connected circuit board based on the sending time and the receiving time of the test signal.

[0137] Step 1104: Determine the phase of the sampling clock based on the length of the connected circuit board.

[0138] To sum up, the control method of the display device provided in the embodiment of the present application sends a test signal to the test line through the second control component, and after receiving the test signal, determines the length of the connecting circuit board based on the sending time and receiving time of the test signal, and further determines the phase of the sampling clock based on the length of the connecting circuit board, so that the display device can be applicable to connecting circuit boards of various lengths, which solves the problem of poor applicability of the display device in the related art and achieves the effect of improving the applicability of the display device.

[0139] FIG12 is a flow chart of another method for controlling a display device provided in an embodiment of the present application. The method can be used for the second control component in the above-mentioned display device. The method may include the following steps:

[0140] Step 1201: Send a test signal to the second end of one of two first test lines in a display device.

[0141] When applying the method provided in the embodiment of the present application, the second control component can send a test signal to the second end of one of the two first test lines. Taking the display device shown in FIG8 as an example, the second control component 34 can send a test signal to one first test line s1.

[0142] Step 1202: Sample the second end of the other first test line of the two first test lines using a sampling clock of a preset frequency to obtain a test signal.

[0143] The second control component can sample the second end of the other first test line of the two first test lines by a sampling clock of a preset frequency to obtain a test signal. The sampling clock can be determined based on the number of times the loop formed by the test line (the test line may include the first test line and the second test line) travels around the connecting circuit board and the transmission speed of the test signal in the test line. Since the length of the loop formed by the test line is unknown, the frequency required to obtain the test signal can be determined as the preset frequency of the sampling clock when the connecting circuit board is at its shortest (when the first control component and the second control component are connected by the connecting circuit board, the connecting circuit board may have a shortest length).

[0144] In addition, it can be seen from the above embodiments that the display device provided in the embodiments of the present application increases the length of the loop formed by the test circuit by increasing the number of times the test circuit detours on the connecting circuit board, thereby extending the transmission time of the test signal in the test circuit and reducing the preset frequency of the sampling clock, so that the second control component can obtain the test signal at a lower frequency.

[0145] Step 1203: Determine the transmission duration of the test signal in the test line based on the sending time and receiving time of the test signal.

[0146] After the second control component obtains the test signal from the first test line, it can determine the transmission time of the test signal in the test line based on the sending time and the receiving time of the test signal.

[0147] FIG13 is a schematic diagram of the timing of sending and receiving a test signal provided by an embodiment of the present application, wherein the time between the sending time t1 when a first test line s1′ sends a test signal and the receiving time t2 when another first test line s1″ receives the test signal is the transmission time T of the test signal in the test line.

[0148] Step 1204: Determine the length of the connected circuit board based on the transmission duration.

[0149] The second control component can determine the length of the connected circuit board based on the transmission time determined in the above step.

[0150] In the embodiment of the present application, the length of the connecting circuit board can be determined in a variety of ways. The length of the connecting circuit board can be the length of the connecting circuit board 33 in the first direction f1 as shown in FIG8 .

[0151] The first solution: This solution can determine the length of the connected circuit board based on the transmission time and the transmission speed of the test signal in the test line. Specifically, step 1204 may include:

[0152] 1) Obtain the difference between the transmission duration and the reference duration.

[0153] The second control component can obtain the difference between the transmission duration and the reference duration, where the reference duration is the transmission duration of the test signal in the reference connection circuit board of the reference length. The transmission duration of the test signal in the reference connection circuit board of the reference length can be obtained in advance through experiments. The structure, connection method and number of the first test line and the second test line on the reference connection circuit board can be the same as the connection circuit board in the display device provided in the embodiment of the present application. The reference duration is the duration obtained by testing when the reference connection circuit board is set in the display device provided in the embodiment of the present application.

[0154] 2) Determine the length difference based on the time difference and the transmission speed of the test signal in the test line.

[0155] The second control component can determine the length difference based on the duration difference and the transmission speed of the test signal in the test circuit. For example, the duration difference is Δt, and the transmission speed of the test signal in the test circuit can be v. Then the length difference can be the product of the duration difference and the transmission speed divided by n, where n is the number of detours of the test circuit on the connecting circuit board (the number of detours can be equal to the sum of the number of first test lines and the number of second test lines. For the display panel shown in Figure 8, the number of detours is 6), that is, Δt*v / n. The length difference is the difference between the length of the connecting circuit board in the display device provided in the embodiment of the present application and the length of the reference connecting circuit board.

[0156] 3) Determine the length of the connected circuit boards based on the length difference and the reference length.

[0157] The second control component can determine the sum of the length difference and the reference length as the length of the connected circuit board.

[0158] In the display device shown in Figure 8, some connection lines for connecting the first test line s1 and the second test line s2 located in the first control component 32 and the second control component 34 (the connection lines may include some connection structures in the above-mentioned embodiments, such as the first connection structure, the second connection structure, etc.) will have a certain impact on the total length of the line transmitting the test signal. In this way, the length of this part of the connection line can be subtracted by determining the length difference to avoid this part of the connection line affecting the calculation of the length of the connecting circuit board.

[0159] The second option could include:

[0160] 1) Based on the transmission duration, a search is performed in a preset lookup table to determine whether there is a corresponding reference length.

[0161] The second control component can search a preset lookup table based on the transmission duration to determine whether a corresponding reference length exists. The preset lookup table records multiple reference transmission durations and the reference length of the connected circuit board corresponding to each reference transmission duration. The preset lookup table can be obtained through preliminary experiments, for example, by obtaining transmission durations corresponding to connected circuit boards of various lengths.

[0162] 2) In response to a reference length corresponding to the transmission duration existing in a preset lookup table, the reference length is determined as the length of the connected circuit board.

[0163] When there is a reference length corresponding to the transmission duration in the preset lookup table, the second control component can determine the reference length as the length of the connected circuit board. It should be noted that each reference duration in the preset lookup table can correspond to a reference duration range. When the transmission duration is within the reference duration range, the second control component can determine the reference length corresponding to the reference duration corresponding to the reference duration range as the length of the connected circuit board. This method can also avoid some connection lines for connecting the first test line and the second test line located in the first control component and the second control component from affecting the process of determining the length of the connected circuit board.

[0164] Step 1205: Determine the phase of the sampling clock based on the length of the connected circuit board.

[0165] The second control component can determine the phase of the sampling clock based on the length of the connecting circuit board in a variety of ways. For example, it can pre-test to obtain the sampling clock phase that meets the required sampling effect for connecting circuit boards of various lengths, and select the corresponding sampling clock phase based on the test after obtaining the length of the connecting circuit board. Alternatively, it can calculate the signal transmission delay based on the length of the connecting circuit board and the transmission speed of the signal in the connecting circuit board, and determine the sampling clock phase based on the delay. Thereafter, the second control component can sample the signal obtained from the display panel according to the phase, so as to supplement the sub-pixels in the display panel and improve the display effect of the display device.

[0166] To sum up, the control method of the display device provided in the embodiment of the present application sends a test signal to the test line through the second control component, and after receiving the test signal, determines the length of the connecting circuit board based on the sending time and receiving time of the test signal, and further determines the phase of the sampling clock based on the length of the connecting circuit board, so that the display device can be applicable to connecting circuit boards of various lengths, which solves the problem of poor applicability of the display device in the related art and achieves the effect of improving the applicability of the display device.

[0167] FIG14 is a block diagram of a display device provided in an embodiment of the present application. The display device includes a display panel 1410 , a first control component 1420 , a connecting circuit board 1430 , and a second control component 1440 .

[0168] The display panel 1410 is connected to the first control component 1420 . One end of the connection circuit board 1430 is connected to the first control component 1420 , and the other end of the connection circuit board 1430 is connected to the second control component 1440 .

[0169] The connecting circuit board 1430 includes a board body, a test circuit located on the board body, and a signal transmission line. The test circuit includes two first test lines extending along a first direction. The first ends of the two first test lines are electrically connected and located at one end of the connecting circuit board close to the first control component. The second ends of the two first test lines are located at one end of the connecting circuit board close to the second control component, and the second ends of the two first test lines are electrically connected to the second control components respectively. The first direction is a direction parallel to the signal transmission line. The signal transmission line is used to transmit signals between the first control component and the second control component. For example, it can be used to transmit various signals such as return signals, display control signals, and display data signals.

[0170] The second control component 1440 includes:

[0171] The sending module 1441 sends a test signal to the second end of one of the two first test lines in the display device.

[0172] The receiving module 1442 is configured to receive a test signal from a second end of the other first test line of the two first test lines.

[0173] The length determination module 1443 is configured to determine the length of the connected circuit board based on the sending and receiving times of the test signal.

[0174] The phase determination module 1444 is configured to determine the phase of the sampling clock based on the length of the connecting circuit board.

[0175] To sum up, the display device provided by the embodiment of the present application is configured to set a test circuit in the display device, and the test circuit includes two first test lines extending along a first direction, and the two ends of the first test line are respectively located on the connecting circuit board near one end of the first control component and one end near the second control component, and the two first test lines are respectively electrically connected to the second control component, so that a test signal can be sent to the test line through the second control component, and after receiving the test signal, the length of the connecting circuit board is determined based on the sending time and receiving time of the test signal, and the phase of the sampling clock is further determined based on the length of the connecting circuit board, so that the display device can be applicable to connecting circuit boards of various lengths, thereby solving the problem of poor applicability of the display device in the related art and achieving the effect of improving the applicability of the display device.

[0176] In addition, an embodiment of the present application also provides a non-volatile computer storage medium, in which at least one instruction, at least one program, a code set or an instruction set is stored. The at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by a processor to implement a control method for a display device as described in any of the above embodiments.

[0177] The present application also provides a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the control method for a display device provided in the various optional implementations described above.

[0178] In this application, the term "at least one of A and B" simply describes an association relationship between associated objects, indicating that three possible relationships exist. For example, "at least one of A and B" can mean: A exists alone, A and B exist simultaneously, and B exists alone. Similarly, "at least one of A, B, and C" means that seven possible relationships exist, indicating: A exists alone, B exists alone, C exists alone, A and B exist simultaneously, A and C exist simultaneously, C and B exist simultaneously, and A, B, and C exist simultaneously. Similarly, "at least one of A, B, C, and D" means that fifteen possible relationships exist, indicating: A exists alone, B exists alone, C exists alone, D exists alone, A and B exist simultaneously, A and C exist simultaneously, A and D exist simultaneously, C and B exist simultaneously, D and B exist simultaneously, C and D exist simultaneously, C and D exist simultaneously, A, B, and C exist simultaneously, A, B, and D exist simultaneously, A, C, and D exist simultaneously, B, C, and D exist simultaneously, and A, B, C, and D exist simultaneously.

[0179] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it may be the only layer between the two layers or elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0180] In this application, the terms "first", "second", "third", "fourth" and "fifth" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The term "plurality" refers to two or more, unless otherwise expressly limited.

[0181] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0182] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0183] Those skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware, or by a program to instruct the relevant hardware, and the program may be stored in a computer-readable storage medium, which may be a read-only memory, a disk, or an optical disk, etc.

[0184] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A display device, characterized in that: The display device comprises: a display panel, a first control component, a connecting circuit board and a second control component; The display panel is connected to the first control component, one end of the connecting circuit board is connected to the first control component, and the other end of the connecting circuit board is connected to the second control component; The connecting circuit board includes a board body, a test circuit located on the board body, and a signal transmission line, the test circuit includes two first test lines extending along a first direction, the first ends of the two first test lines are electrically connected and are both located at one end of the connecting circuit board close to the first control component, the second ends of the two first test lines are located at one end of the connecting circuit board close to the second control component, and the second ends of the two first test lines are electrically connected to the second control component respectively, the first direction is a direction parallel to the signal transmission line, and the signal transmission line is used to transmit signals between the first control component and the second control component; The second control component is used to: send a test signal to the second end of one of the two first test lines, and receive the test signal from the second end of the other of the two first test lines, determine the length of the connecting circuit board in the first direction based on the sending time and the receiving time of the test signal, and determine the phase of the sampling clock based on the length of the connecting circuit board in the first direction.

2. The display device according to claim 1, characterized in that The test circuit also includes an even number of second test lines extending along the first direction, the first end of the second test line is located at one end of the connecting circuit board close to the first control component, the second end of the second test line is located at one end of the connecting circuit board close to the second control component, the even number of second test lines are connected in series, and the even number of second test lines are connected in series with the first ends of the two first test lines.

3. The display device according to claim 2, characterized in that: The plate body includes a plurality of strip-shaped plate bodies, and the length direction of the strip-shaped plate bodies is parallel to the first direction.

4. The display device according to claim 3, characterized in that: The test lines in the test circuit are respectively located on at least two of the plurality of strip-shaped plates, and the test lines in the test circuit include the first test line and the second test line.

5. The display device according to claim 3, characterized in that: The first test line and the second test line are both located on a first strip plate among the plurality of strip plates.

6. The display device according to claim 2, characterized in that: The display device further includes a first connection structure, which is located in the first control component and the second control component, and is connected to the even-numbered second test lines, and connects the even-numbered second test lines in series with the first ends of the two first test lines.

7. The display device according to claim 2, characterized in that: The connection circuit board further includes a second connection structure located on the board body, the second connection structure is connected to the even-numbered second test lines, and connects the even-numbered second test lines in series with the first ends of the two first test lines.

8. The display device according to claim 2, characterized in that: The display device further comprises a third connection structure and a fourth connection structure, wherein the third connection structure is located on the connection circuit board, and the fourth connection structure is located in the first control component or the second control component; When the fourth connection structure is located in the first control assembly, the third connection structure is connected to the second ends of the even-numbered second test lines, the fourth connection structure is connected to the first ends of the even-numbered second test lines, and the even-numbered second test lines are connected in series with the first ends of the two first test lines; When the fourth connection structure is located in the second control component, the fourth connection structure is connected to the second ends of the even-numbered second test lines, the third connection structure is connected to the first ends of the even-numbered second test lines, and the even-numbered second test lines are connected in series with the first ends of the two first test lines.

9. The display device according to claim 1, characterized in that: The first control component includes a first circuit board, a fifth connection structure and a plurality of first controllers, the fifth connection structure is located on the first circuit board, and the plurality of first controllers are electrically connected to the first circuit board; The fifth connection structure is connected to the first ends of the two first test lines.

10. The display device according to claim 1, characterized in that: The second control component includes a second circuit board, a connecting line located on the second circuit board, and a second controller, and the second controller is electrically connected to the second ends of the two first test lines through the connecting line; The connecting line is connected to the first ends of the two first test lines.

11. The display device according to claim 10, characterized in that: The second circuit board includes an edge area connected to the connection circuit board, and the second controller is located in the edge area.

12. The display device according to claim 1, characterized in that: The first control component is a source drive control component, and the second controller is a timing control component; The connecting circuit board includes a flexible circuit board.

13. A method for controlling a display device, characterized in that: A second control component used in a display device according to any one of claims 1 to 12, the method comprising: Sending a test signal to a second end of one of the two first test lines in the display device; receiving the test signal from a second end of another first test line of the two first test lines; Determining the length of the connecting circuit board in the first direction based on the sending time and the receiving time of the test signal; The phase of the sampling clock is determined based on the length of the connection circuit board in the first direction.

14. The method according to claim 13, characterized in that The determining the length of the connecting circuit board in the first direction based on the sending time and the receiving time of the test signal includes: Determine the transmission time of the test signal in the test line based on the sending time and the receiving time of the test signal; The length of the connecting circuit board in the first direction is determined based on the transmission time and the transmission speed of the test signal in the test line.

15. The method according to claim 14, characterized in that The determining the length of the connecting circuit board in the first direction based on the transmission duration and the transmission speed of the test signal in the test line includes: Obtaining a duration difference between the transmission duration and a reference duration; Determine a length difference based on the time difference and a transmission speed of the test signal in the test line; Determining the length of the connecting circuit board in the first direction based on the length difference and a reference length; The reference duration is the transmission duration of the test signal in the reference connection circuit board of the reference length.

16. The method according to claim 13, characterized in that The determining the length of the connecting circuit board in the first direction based on the sending time and the receiving time of the test signal includes: Determine the transmission time of the test signal in the test line based on the sending time and the receiving time of the test signal; Based on the transmission duration, searching in a preset lookup table whether there is a corresponding reference length, wherein the preset lookup table records a plurality of reference transmission durations and a reference length of the connected circuit board corresponding to each reference transmission duration; In response to the presence of a reference length corresponding to the transmission duration in the preset lookup table, the reference length is determined as the length of the connecting circuit board in the first direction.

17. The method according to claim 13, characterized in that The step of receiving the test signal from the second end of another first test line of the two first test lines comprises: The second end of the other first test line of the two first test lines is sampled by a sampling clock of a preset frequency to obtain the test signal.

18. A display device, characterized in that: The display device comprises: a display panel, a first control component, a connecting circuit board and a second control component; The display panel is connected to the first control component, one end of the connecting circuit board is connected to the first control component, and the other end of the connecting circuit board is connected to the second control component; The connecting circuit board includes a board body, a test circuit located on the board body, and a signal transmission line, the test circuit includes two first test lines extending along a first direction, the first ends of the two first test lines are electrically connected and are both located at one end of the connecting circuit board close to the first control component, the second ends of the two first test lines are located at one end of the connecting circuit board close to the second control component, and the second ends of the two first test lines are electrically connected to the second control component respectively, the first direction A direction is parallel to the signal transmission line, and the signal transmission line is used to transmit signals between the first control component and the second control component; The second control component comprises: A sending module, sending a test signal to a second end of one of the two first test lines in the display device; A receiving module, used for receiving the test signal from a second end of another first test line of the two first test lines; A length determination module, used to determine the length of the connecting circuit board in the first direction based on the sending time and the receiving time of the test signal; The phase determination module is used to determine the phase of the sampling clock based on the length of the connecting circuit board in the first direction.

19. A display device, characterized in that: The display device includes a processor and a memory, wherein the memory stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the control method of the display device as described in any one of claims 15 to 18.

20. A non-volatile computer storage medium, characterized in that: The computer storage medium stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the control method of the display device as described in any one of claims 15 to 18.

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