Apparatus and method for time-domain delay spread and delay shift estimation

Abstract

According to another aspect of the present disclosure, an apparatus for wireless communication of a user equipment (UE) is provided. The apparatus may demodulate a reference signal (RS) received from a base station. The apparatus may perform a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS received from the base station. The apparatus may perform channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shift estimation procedure.

Description

APPARATUS AND METHOD FOR TIME-DOMAIN DELAY SPREAD AND DELAY SHIFT ESTIMATIONBACKGROUND

[0001] Embodiments of the present disclosure relate to apparatus and method for wireless communication.

[0002] Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcasts. In cellular communication, such as the 4th-gen eration (4G) Long Term Evolution (LTE) and the 5th- generation (5G) New Radio (NR), the 3rd Generation Partnership Project (3GPP) defines various mechanisms for performing channel estimation.SUMMARY

[0003] According to another aspect of the present disclosure, an apparatus for wireless communication of a user equipment (UE) is provided. The apparatus may include at least one processor. The apparatus may include memory storing instructions, which when executed by the at least one processor, causes the at least one processor to demodulate a reference signal (RS) received from a base station. The apparatus may include memory storing instructions, which when executed by the at least one processor, causes the at least one processor to perform a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS received from the base station. The apparatus may include memory storing instructions, which when executed by the at least one processor, causes the at least one processor to perform channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shift estimation procedure.

[0004] According to another aspect of the present disclosure, a method of wireless communication of a UE is provided. The method may include demodulating, by at least one processor, an RS received from a base station. The method may include performing, by the at least one processor, a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS from the base station. The method may include performing, by the at least one processor, channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shift estimation procedure.

[0005] According to yet another aspect of the present disclosure, a non-transitorycomputer-readable medium is provided. The non-transitory computer-readable medium stores instructions, which when executed by at least one processor, may cause at least one processor to demodulate an RS received from a base station. The non-transitory computer-readable medium stores instructions, which when executed by at least one processor, may cause at least one processor to perform a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS from the base station. The non-transitory computer- readable medium stores instructions, which when executed by at least one processor, may cause at least one processor to perform channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shift estimation procedure.

[0006] These illustrative embodiments are mentioned not to limit or define the present disclosure, but to provide examples to aid understanding thereof. Additional embodiments are discussed in the Detailed Description, and further description is provided there.BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable a person skilled in the pertinent art to make and use the present disclosure.

[0008] FIG. 1 illustrates an exemplary wireless network, according to some embodiments of the present disclosure.

[0009] FIG. 2 illustrates a block diagram of an exemplary node, according to some embodiments of the present disclosure.

[0010] FIG. 3 illustrates a block diagram of an exemplary apparatus including a baseband chip, a radio frequency (RF) chip, and a host chip, according to some embodiments of the present disclosure.

[0011] FIG. 4 illustrates first exemplary operations performed by a delay spread / delay shift calculation component of the baseband chip of FIG. 3, according to some embodiments of the present disclosure.

[0012] FIG. 5 illustrates second exemplary operations performed by a delay spread / delay shift calculation component of the baseband chip of FIG. 3, according to some embodiments of the present disclosure.

[0013] FIG. 6 illustrates third exemplary operations performed by a delay spread / delayshift calculation component of the baseband chip of FIG. 3, according to some embodiments of the present disclosure.

[0014] FIG. 7 is a flowchart of a method of wireless communication, according to some embodiments of the present disclosure.

[0015] Embodiments of the present disclosure will be described with reference to the accompanying drawings.DETAILED DESCRIPTION

[0016] Although specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the pertinent art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present disclosure. It will be apparent to a person skilled in the pertinent art that the present disclosure can also be employed in a variety of other applications.

[0017] It is noted that references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” “some embodiments,” “certain embodiments,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

[0018] In general, terminology may be understood at least in part from usage in context. For example, the term “one or more” as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense. Similarly, terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.

[0019] Various aspects of wireless communication systems will now be described withreference to various apparatus and methods. These apparatus and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, units, components, circuits, steps, operations, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, firmware, computer software, or any combination thereof. Whether such elements are implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system.

[0020] The techniques described herein may be used for various wireless communication networks, such as code division multiple access (CDMA) system, time division multiple access (TDMA) system, frequency division multiple access (FDMA) system, orthogonal frequency division multiple access (OFDMA) system, single-carrier frequency division multiple access (SC- FDMA) system, wireless local area network (WLAN) system, and other networks. The terms “network” and “system” are often used interchangeably. A CDMA network may implement a radio access technology (RAT), such as Universal Terrestrial Radio Access (UTRA), evolved UTRA (E-UTRA), CDMA 2000, etc. A TDMA network may implement a RAT, such as the Global System for Mobile Communications (GSM). An OFDMA network may implement a RAT, such as LTE or NR. A WLAN system may implement a RAT, such as Wi-Fi. The techniques described herein may be used for the wireless networks and RATs mentioned above, as well as other wireless networks and RATs.

[0021] In telecommunications, the delay spread is a measure of the multipath richness of a communications channel. In general, it can be interpreted as the difference between the time-of- arrival of the earliest significant multipath component (typically the line-of-sight component) and the time-of-arrival of the last multipath component. Delay shift, on the other hand, may be viewed as a spectral widening or broadening in the received signal’s power spectrum of a received signal and may vary from path to path.

[0022] In LTE and 5G NR wireless communication systems, a reference signal (RS) tone, e.g., such as the cell-specific reference signal (CRS) in LTE, or demodulation reference signal (DMRS), or tracking reference signal (TRS) in 5GNR, is inserted in the physical downlink channel frequency band, which a user equipment (UE) uses for channel estimation. Due to multipath conditions, the RS received by the UE may have an associated delay spread and delay shift that needs to be accounted for to achieve channel estimation with a high degree of accuracy.

[0023] To begin the process of channel estimation, the UE may demodulate / descramblethe received RS. After RS demodulation / descrambling, the estimated channel coefficient may be contaminated by noise. To improve the accuracy of the channel estimation, a filter, e.g., such as a Wiener filter, is generally applied to the estimated channel coefficients, where the channel autocorrelation function (ACF) may be used to generate the Wiener filter coefficients. However, for implementation simplification, some systems use a delay spread and delay shift estimation, rather than channel ACF, to generate the Wiener coefficients.

[0024] Once the delay spread and the delay shift are estimated, the UE may estimate the channel. However, frequency-domain estimations of the delay spread and delay shift generally involve complex computations and thus, require an undesirable amount of time, power, and processing resources.

[0025] Thus, there exists an unmet need for a delay spread / delay shift estimation technique that avoids the complex computations associated with estimation in the frequency-domain.

[0026] To overcome these and other challenges, the present disclosure provides an exemplary time-domain delay spread / delay shift estimation procedure that involves a simplified set of computations, as compared to estimation in the frequency-domain. For example, the exemplary time-domain delay spread / delay shift estimation procedure may include a search of the delay spread and delay shift of the channel in the time-domain along the power delay profile (PDP). This technique minimizes the mean square error (MSE) of the filtered channel estimation along the frequency direction, thereby reducing computational complexity. Additional details of the time-domain delay spread / delay shift estimation procedure are set forth below in connection with FIGs. 1-7.

[0027] FIG. 1 illustrates an exemplary wireless network 100, in which some aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure. As shown in FIG. 1, wireless network 100 may include a network of nodes, such as user equipment 102, an access node 104, and a core network element 106. User equipment 102 may be any terminal device, such as a mobile phone, a desktop computer, a laptop computer, a tablet, a vehicle computer, a gaming console, a printer, a positioning device, a wearable electronic device, a smart sensor, or any other device capable of receiving, processing, and transmitting information, such as any member of a vehicle to everything (V2X) network, a cluster network, a smart grid node, or an Internet-of-Things (loT) node. It is understood that user equipment 102 is illustrated as a mobile phone simply by way of illustration and not by way of limitation.

[0028] Access node 104 may be a device that communicates with user equipment 102, suchas a wireless access point, a base station (BS), a Node B, an enhanced Node B (eNodeB or eNB), a next-generation NodeB (gNodeB or gNB), a cluster master node, or the like. Access node 104 may have a wired connection to user equipment 102, a wireless connection to user equipment 102, or any combination thereof. Access node 104 may be connected to user equipment 102 by multiple connections, and user equipment 102 may be connected to other access nodes in addition to access node 104. Access node 104 may also be connected to other user equipments. When configured as a gNB, access node 104 may operate in millimeter wave (mmW) frequencies and / or near mmW frequencies in communication with the user equipment 102. When access node 104 operates in mmW or near mmW frequencies, the access node 104 may be referred to as an mmW base station. Extremely high frequency (EHF) is part of the radio frequency (RF) in the electromagnetic spectrum. EHF has a range of 30 GHz to 200 GHz and a wavelength between 1 millimeter and 10 millimeters. Radio waves in the band may be referred to as a millimeter wave. Near mmW may extend down to a frequency of 3 GHz with a wavelength of 100 millimeters. The super high frequency (SHF) band extends between 3 GHz and 30 GHz, also referred to as centimeter wave. Communications using the mmW or near mmW radio frequency band have extremely high path loss and a short range. The mmW base station may utilize beamforming with user equipment 102 to compensate for the extremely high path loss and short range. It is understood that access node 104 is illustrated by a radio tower by way of illustration and not by way of limitation.

[0029] Access nodes 104, which are collectively referred to as E-UTRAN in the evolved packet core network (EPC) and as NG-RAN in the 5G core network (5GC), interface with the EPC and 5GC, respectively, through dedicated backhaul links (e.g., SI interface). In addition to other functions, access node 104 may perform one or more of the following functions: transfer of user data, radio channel ciphering and deciphering, integrity protection, header compression, mobility control functions (e.g., handover, dual connectivity), inter-cell interference coordination, connection setup and release, load balancing, distribution for non-access stratum (NAS) messages, NAS node selection, synchronization, radio access network (RAN) sharing, multimedia broadcast multicast service (MBMS), subscriber and equipment trace, RAN information management (RIM), paging, positioning, and delivery of warning messages. Access nodes 104 may communicate directly or indirectly (e.g., through the 5GC) with each other over backhaul links (e.g., X2 interface). The backhaul links may be wired or wireless.

[0030] Core network element 106 may serve access node 104 and user equipment 102 to provide core network services. Examples of core network element 106 may include a homesubscriber server (HSS), a mobility management entity (MME), a serving gateway (SGW), or a packet data network gateway (PGW). These are examples of core network elements of an evolved packet core (EPC) system, which is a core network for the LTE system. Other core network elements may be used in LTE and in other communication systems. In some embodiments, core network element 106 includes an access and mobility management function (AMF), a session management function (SMF), or a user plane function (UPF) of the 5GC for the NR system. The AMF may be in communication with a Unified Data Management (UDM). The AMF is the control node that processes the signaling between the user equipment 102 and the 5GC. Generally, the AMF provides QoS flow and session management. All user Internet protocol (IP) packets are transferred through the UPF. The UPF provides user equipment (UE) IP address allocation as well as other functions. The UPF is connected to the IP Services. The IP Services may include the Internet, an intranet, an IP Multimedia Subsystem (IMS), a PS Streaming Service, and / or other IP services. It is understood that core network element 106 is shown as a set of rack-mounted servers by way of illustration and not by way of limitation.

[0031] Core network element 106 may connect with a large network, such as the Internet 108, or another Internet Protocol (IP) network, to communicate packet data over any distance. In this way, data from user equipment 102 may be communicated to other user equipments connected to other access points, including, for example, a computer 110 connected to Internet 108, for example, using a wired connection or a wireless connection, or to a tablet 112 wirelessly connected to Internet 108 via a router 114. Thus, computer 110 and tablet 112 provide additional examples of possible user equipments, and router 114 provides an example of another possible access node.

[0032] A generic example of a rack-mounted server is provided as an illustration of core network element 106. However, there may be multiple elements in the core network including database servers, such as a database 116, and security and authentication servers, such as an authentication server 118. Database 116 may, for example, manage data related to user subscription to network services. A home location register (HLR) is an example of a standardized database of subscriber information for a cellular network. Likewise, authentication server 118 may handle authentication of users, sessions, and so on. In the NR system, an authentication server function (AUSF) device may be the entity to perform user equipment authentication. In some embodiments, a single server rack may handle multiple such functions, such that the connections between core network element 106, authentication server 118, and database 116, may be local connections within a single rack.

[0033] Each element in FIG. 1 may be considered a node of wireless network 100. More detail regarding the possible implementation of a node is provided by way of an example in the description of a node 200 in FIG. 2. Node 200 may be configured as user equipment 102, access node 104, or core network element 106 in FIG. 1. Similarly, node 200 may also be configured as computer 110, router 114, tablet 112, database 116, or authentication server 118 in FIG. 1. As shown in FIG. 2, node 200 may include a processor 202, a memory 204, and a transceiver 206. These components are shown as connected to one another by a bus, but other connection types are also permitted. When node 200 is user equipment 102, additional components may also be included, such as a user interface (UI), sensors, and the like. Similarly, node 200 may be implemented as a blade in a server system when node 200 is configured as core network element 106. Other implementations are also possible.

[0034] Transceiver 206 may include any suitable device for sending and / or receiving data. Node 200 may include one or more transceivers, although only one transceiver 206 is shown for simplicity of illustration. An antenna 208 is shown as a possible communication mechanism for node 200. Multiple antennas and / or arrays of antennas may be utilized for receiving multiple spatially multiplex data streams. Additionally, examples of node 200 may communicate using wired techniques rather than (or in addition to) wireless techniques. For example, access node 104 may communicate wirelessly to user equipment 102 and may communicate by a wired connection (for example, by optical or coaxial cable) to core network element 106. Other communication hardware, such as a network interface card (NIC), may be included as well.

[0035] As shown in FIG. 2, node 200 may include processor 202. Although only one processor is shown, it is understood that multiple processors can be included. Processor 202 may include microprocessors, microcontroller units (MCUs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described throughout the present disclosure. Processor 202 may be a hardware device having one or more processing cores. Processor 202 may execute software. Software shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Software can includecomputer instructions written in an interpreted language, a compiled language, or machine code. Other techniques for instructing hardware are also permitted under the broad category of software.

[0036] As shown in FIG. 2, node 200 may also include memory 204. Although only one memory is shown, it is understood that multiple memories can be included. Memory 204 can broadly include both memory and storage. For example, memory 204 may include random-access memory (RAM), read-only memory (ROM), static RAM (SRAM), dynamic RAM (DRAM), ferroelectric RAM (FRAM), electrically erasable programmable ROM (EEPROM), compact disc readonly memory (CD-ROM) or other optical disk storage, hard disk drive (HDD), such as magnetic disk storage or other magnetic storage devices, Flash drive, solid-state drive (SSD), or any other medium that can be used to carry or store desired program code in the form of instructions that can be accessed and executed by processor 202. Broadly, memory 204 may be embodied by any computer-readable medium, such as a non-transitory computer-readable medium.

[0037] Processor 202, memory 204, and transceiver 206 may be implemented in various forms in node 200 for performing wireless communication functions. In some embodiments, at least two of processor 202, memory 204, and transceiver 206 are integrated into a single system- on-chip (SoC) or a single system-in-package (SiP). In some embodiments, processor 202, memory 204, and transceiver 206 of node 200 are implemented (e.g., integrated) on one or more SoCs. In one example, processor 202 and memory 204 may be integrated on an application processor (AP) SoC (sometimes known as a “host,” referred to herein as a “host chip”) that handles application processing in an operating system (OS) environment, including generating raw data to be transmitted. In another example, processor 202 and memory 204 may be integrated on a baseband processor (BP) SoC (sometimes known as a “modem,” referred to herein as a “baseband chip”) that converts the raw data, e.g., from the host chip, to signals that can be used to modulate the carrier frequency for transmission, and vice versa, which can run a real-time operating system (RTOS). In still another example, processor 202 and transceiver 206 (and memory 204 in some cases) may be integrated on an RF SoC (sometimes known as a “transceiver,” referred to herein as an “RF chip”) that transmits and receives RF signals with antenna 208. It is understood that in some examples, some or all of the host chip, baseband chip, and RF chip may be integrated as a single SoC. For example, a baseband chip and an RF chip may be integrated into a single SoC that manages all the radio functions for cellular communication.

[0038] Referring back to FIG. 1, in some embodiments, user equipment 102 may perform an exemplary time-domain delay spread / delay shift estimation procedure. The exemplary time-domain delay spread / delay shift estimation procedure may include a search of the delay spread and delay shift of the channel in the time-domain along the PDP by minimizing the MSE of the filtered channel estimation along the frequency direction.

[0039] FIG. 3 illustrates a block diagram of an apparatus 300 including a baseband chip 302, an RF chip 304, and a host chip 306, according to some embodiments of the present disclosure.

[0040] Referring to FIG. 3, apparatus 300 may be implemented as user equipment 102 of wireless network 100 in FIG. 1. As shown in FIG. 3, apparatus 300 may include baseband chip 302, RF chip 304, host chip 306, and one or more antennas 310. In some embodiments, baseband chip 302 is implemented by a processor and a memory, and RF chip 304 is implemented by a processor, a memory, and a transceiver. Besides the on-chip memory 318 (also known as “internal memory,” e.g., registers, buffers, or caches) on each chip 302, 304, or 306, apparatus 300 may further include an external memory 308 (e.g., the system memory or main memory) that can be shared by each chip 302, 304, or 306 through the system / main bus. Although baseband chip 302 is illustrated as a standalone SoC in FIG. 3, it is understood that in one example, baseband chip 302 and RF chip 304 may be integrated as one SoC or one SiP; in another example, baseband chip 302 and host chip 306 may be integrated as one SoC or one SiP; in still another example, baseband chip 302, RF chip 304, and host chip 306 may be integrated as one SoC or one SiP, as described above.

[0041] In the uplink, host chip 306 may generate raw data and send it to baseband chip 302 for encoding, modulation, and mapping. Interface 314 of baseband chip 302 may receive the data from host chip 306. Baseband chip 302 may also access the raw data generated by host chip 306 and stored in external memory 308, for example, using the direct memory access (DMA). Baseband chip 302 may first encode (e.g., by source coding and / or channel coding) the raw data and modulate the coded data using any suitable modulation techniques, such as multi-phase shift keying (MPSK) modulation or quadrature amplitude modulation (QAM). Baseband chip 302 may perform any other functions, such as symbol or layer mapping, to convert the raw data into a signal that can be used to modulate the carrier frequency for transmission. In the uplink, baseband chip 302 may send the modulated signal to RF chip 304 via interface 314. RF chip 304, through the transmitter, may convert the modulated signal in the digital form into analog signals, i.e., RF signals, and perform any suitable front-end RF functions, such as filtering, digital pre-distortion, up-conversion, or sample-rate conversion. Antenna 310 (e.g., an antenna array) may transmit the RF signals provided by the transmitter of RF chip 304.

[0042] In the downlink, antenna 310 may receive RF signals from an access node or other wireless device. The RF signals may be passed to the receiver (Rx) of RF chip 304. RF chip 304 may perform any suitable front-end RF functions, such as filtering, IQ imbalance compensation, down-paging conversion, or sample-rate conversion, and convert the RF signals (e.g., transmission) into low-frequency digital signals (baseband signals) that can be processed by baseband chip 302.

[0043] Still referring to FIG. 3, baseband chip 302 includes a demodulation / descrambling component 320, a delay spread / delay shift calculation component 322, and a channel estimation component 324.

[0044] Delay spread / delay shift calculation component 322 may perform the exemplary time-domain delay spread / delay shift estimation procedure, as described herein. The Rx of RF chip 304 may receive an RS via the PDCCH, and pass the RS to demodulation / descrambling component 320. The demodulated / descrambled RS may be modeled according to expression (1), as shown below. y = h + n, (1), where y is the demodulated / descrambled RS, h is the channel, and n is the additive Gaussian white noise. Each of y, h, and n are N X 1 vectors. Using a linear minimum mean square error (LMMSE) estimator, the channel may be estimated as h = Wy, where the weight matrix W may be expressed according to expression (2), as shown below.1 where (3 = — = and Rhhis the normalized auto-correlation matrix (NACM), which is theunit power on the diagonal element. Then, the associated MSE of the RS signal may be calculated according to expression (3), as shown below.MSE

[0045] With the relation between the auto-correlation coefficient in the frequency domain and the PDP and the assumption that the PDP is uniformly distributed like a rectangular function, after some mathematical derivations, expression (3) may be rewritten as expression (4).V where a is a scaling factor defined byis the number of elements in the set£lDS= {Ko, KQ + 1, ••• , Ko+ NDS}> KO and NDSdenote the channel first path and the delay spread of the associated PDP, respectively, P may represent the average power of channel vector (e.g., which is used to normalize the auto-correlation matrix (ACM) in expression (2) and results in themay be the 1thelement of PDP. As a result, estimating the channel delay spread is equivalent to solving the optimization problem shown below as expression (5).which can be implemented by searching the two variables Koand NDSalong the PDP vector.

[0046] Finally, the delay spread / delay shift calculation component 322 may calculate the delay spread and delay shift according to expressions (6) and (7), respectively.DSp = >'«Nn'r‘: (6), andwhere y0and Yi is configurable scaling factors determined by the physical resource block (PRB) bundle size for channel estimation. Based at least in part on Dspand Dsyt, channel estimation component 324 may perform channel estimation.

[0047] FIG. 4 illustrates first exemplary operations 400 performed by delay spread / delay shift calculation component 322 of the baseband chip 302 of FIG. 3, according to some embodiments of the present disclosure. Referring to FIG. 4, delay spread / delay shift calculation component 322 may include, e.g., a PDP peak determination component 402, a noise removal / sum power component 404, a partial sum calculation component 406, a weight coefficient calculation component 408, and a first path searching / delay spread component 410. The first exemplary operations 400 for searching delay spread and delay shift is implemented by a two-dimension search of all the possible NDS, Koalong the PDP to minimize MSE.

[0048] To begin, the PDP vector is received by PDP peak determination component 402. PDP peak determination component 402 may determine the peak of PDP, the peak pDPand the associated index kmaxmay be its output. Noise removal / sum power component 404 may removenoise and calculate the sum power of PDP PPDP. Moreover, noise removal / sum power component 404 may set the PDP sample to 0 if it is less than a threshold, e.g., pPDP= 0, if pPDP< ThrHld * Pfcm ' otherwise, PPDP= PPDP+ p?DP.

[0049] Next, delay spread / delay shift calculation component 322 may implement a two- dimensional search using partial sum calculation component 406 and weight coefficient calculation component 408. For instance, partial sum calculation component 406 may calculate PDP partialj = 0, ■■■ , Df^ax— 1, where Df^axis the pre-defined maximum delay spread searched. Weight coefficient calculation component 408 may calculate the weight factors mi andwhere a = N p*SNR2, SNR*a2— 77 '=£7 • = - i+l ’1(a+SNR')2'1(a+SNR)2

[0050] First path searching / delay spread component 410 may calculate the MSE for each delay spread and delay shift according to expression (8), as shown below.

[0051] Based on the MSE for each, first path searching / delay spread component 410 may find the optimal delay spread and delay shift according to expression (9), as shown below( / Vp , / f0)=minmin MSE (,i,j) (9),I J where Koand NDSdenote the channel first path and the delay spread of the associated PDP, respectively. Then, delay spread / delay shift calculation component 322 may calculate the delay spread and the delay shift according to expressions (6) and (7), shown above.

[0052] FIG. 5 illustrates second exemplary operations 500 performed by delay spread / delay shift calculation component 322 of the baseband chip 302 of FIG. 3, according to some embodiments of the present disclosure. Referring to FIG. 5, delay spread / delay shift calculation component 322 may include, e.g., a PDP peak determination component 502, a noise removal / sum power / coarse first path estimation component 504, a course search / delay spread component 506, and a fine search / first path estimation / delay spread component 508.

[0053] Second exemplary operations 500 of FIG. 5 may include a simplified version of first exemplary operations 400. For instance, second exemplary operations 500 may involve two searches, e.g., namely, coarse search and fine search, rather than a single two-dimensional search.

[0054] For the coarse search, the first non-zero PDP is assumed to be the first path / ft°oaand the associated delay spread Np°ais searched, which can be realized by a 1 -dimensionsearch. After that, the fine search may be realized by a two-dimensional search around K^oaand N °a, where the associated searching lengths are reduced to Lfpand Lds, respectively.

[0055] To begin, the PDP vector is received by PDP peak determination component 502. PDP peak determination component 502 may determine the peak of PDP, the peak p TDTIPG.X and the associated index kmaxmay be its output. Noise removal / sum power / coarse first path estimation component 504 may remove the noise and calculate the sum power of PDP PPDP. The PDP sample may be set to 0 if it is less than the thresholdO ,P^max’ otherwise, PPDP= PPDP+ pPDP. The first sample of the PDP that is greater than or equal to threshold! may be set as the first path, and the last sample that is larger than 0 may be set as the last path. Threshold 1 may be the same or greater than or equal to threshold 0, for example.

[0056] Then, course search / delay spread component 506 may perform the coarse delay spread path N °asearch. This may be followed by the fine delay spread path N^esearch, which is performed by the fine search / first path estimation / delay spread component 508. For example, the device may further search both the start-point (e.g., K0 in expression (5)) of PDP (e.g., delay shift) and the associated delay spread (e.g., number of samples in PDP) using expression (5), which means the MSE for each pair (e.g.,Ko) is calculated. For the coarse search, the start-point (e.g., K0 in expression (5)) is fixed at the first non-zero sampleto find the best delay spreadiVn.9 from the start-point to the last path. This is a one-dimensional search. For the fine search, the start point K0 belongs to [Acoa ,+^,0 ] . Given each start point, the associated delay spread can only be in the rangeTherefore, the fine search attempts to calculate more accurate result around the coarse search result.

[0057] Then, delay spread / delay shift calculation component 322 may calculate the delay spread and the delay shift according to expressions (6) and (7), shown above.

[0058] FIG. 6 illustrates third exemplary operations 600 performed by delay spread / delay shift calculation component 322 of the baseband chip 302 of FIG. 3, according to some embodiments of the present disclosure. Referring to FIG. 6, delay spread / delay shift calculation component 322 may include, e.g., a PDP peak determination component 602, a noise removal / sum power / first path estimation component 604, and a coarse search / delay spread search component 606.

[0059] To further simplify the algorithm complexity, third exemplary operations 600 only perform the coarse search described above in connection with FIG. 5. As a result, the two-dimension search is removed and the processing latency and thus, the power consumption, may be reduced.

[0060] To begin, the PDP vector is received by PDP peak determination component 602. PDP peak determination component 602 may determine the peak of PDP, the peak pDPand the associated index kmaxmay be its output. Noise removal / sum power / coarse first path estimation component 504 may remove the noise and calculate the sum power of PDP PPDP. The PDP sample may be set to 0 if it is less than the thresholdO , e.g., pPDP= 0, if pPDP< ThrHld * otherwise, PPDP= PPDP+ pPDP. The first sample of the PDP that is greater than or equal to threshold! may be set as the first path, and the last sample that is larger than 0 may be set as the last path.

[0061] Then, course search / delay spread search component 606 may perform the coarse delay spread path N^°asearch. Finally, delay spread / delay shift calculation component 322 may calculate the delay spread and the delay shift according to expressions (6) and (7), shown above.

[0062] FIG. 7 illustrates a flowchart of an exemplary method 700 of wireless communication, according to embodiments of the disclosure. Exemplary method 700 may be performed by an apparatus for wireless communication, e.g., such as a UE, a baseband chip, a demodulation / descrambling component, a delay spread / delay shift calculation component, a PDP peak determination component, a noise removal / sum power component, a partial sum calculation component, a weight coefficient calculation component, a first path search / delay spread component, a noise removal / sum power / coarse first path estimation component, a coarse search / delay spread component, and / or a fine search / first path estimation / delay spread component, just to name a few. Method 700 may include steps 702-706 as described below. It is to be appreciated that some of the steps may be optional, and some of the steps may be performed simultaneously, or in a different order than shown in FIG. 7.

[0063] Referring to FIG. 7, at 702, the apparatus may demodulate an RS received (e.g., via a physical downlink control channel (PDCCH), a physical downlink shared channel (PDSCH), or a TRS) from a base station. For example, referring to FIG. 3, The Rx of RF chip 304 may receive an RS, and pass the RS to demodulation / descrambling component 320. The demodulated / descrambled RS may be modeled according to expression (1), as shown above.

[0064] At 704, the apparatus may perform a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the received RS . For example, the time-domain delay spread / delay shift estimation procedure may be performedaccording to first exemplary operations 400, second exemplary operations 500, or third exemplary operations 600 described above in connection with FIGs. 4, 5, and 6, respectively.

[0065] At 706, the apparatus may perform channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shift estimation procedure. For example, referring to FIG. 3, based at least in part on Dspand DSft(e.g., calculated at 704), channel estimation component 324 may perform channel estimation.

[0066] In various aspects of the present disclosure, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or encoded as instructions or code on a non-transitory computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computing device, such as node 200 in FIG. 2. By way of example, and not limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, HDD, such as magnetic disk storage or other magnetic storage devices, Flash drive, SSD, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a processing system, such as a mobile device or a computer. Disk and disc, as used herein, includes CD, laser disc, optical disc, digital video disc (DVD), and floppy disk where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0067] According to another aspect of the present disclosure, an apparatus for wireless communication of a UE is provided. The apparatus may include at least one processor. The apparatus may include memory storing instructions, which when executed by the at least one processor, causes the at least one processor to demodulate a reference signal (RS) received from a base station. The apparatus may include memory storing instructions, which when executed by the at least one processor, causes the at least one processor to perform a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS received from the base station. The apparatus may include memory storing instructions, which when executed by the at least one processor, causes the at least one processor to perform channel estimation based on the delay spread and the delay shift estimated based on the timedomain delay spread / delay shift estimation procedure.

[0068] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS receivedfrom the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to determine a value of a PDP sample and its associated index for the RS received from the base station.

[0069] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to perform noise cancellation and calculate a sum power of the PDP. In some embodiments, the value of the PDP sample may be set to zero if the value of the PDP sample is less than a threshold value.

[0070] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to calculate a partial PDP sum based on the sum power of the PDP and a maximum delay spread search space. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to calculate a plurality of weighted filter coefficients. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to calculate a MSE associated with the delay spread and delay shift based on the partial PDP sum and the plurality of weighted filter coefficients. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate the delay shift and the delay spread based on the MSE.

[0071] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to perform noise cancellation and calculate a sum power of the PDP. In some embodiments, the value of the PDP sample is set to zero if thevalue of the PDP sample is less than a first threshold value. In some embodiments, when the value of the PDP sample is greater than a second threshold value, the PDP sample is set as a first path.

[0072] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate a fine delay spread associated with the first path based on a 2-dimensional fine delay spread search based on the coarse delay spread. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate the delay spread and the delay shift based on the fine delay spread associated with the first path based on the fine delay spread.

[0073] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate the delay spread and the delay shift based on the coarse delay spread associated with the first path.

[0074] According to another aspect of the present disclosure, a method of wireless communication of a UE is provided. The method may include demodulating, by at least one processor, an RS received from a base station. The method may include performing, by the at least one processor, a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS received from the base station. The method mayinclude performing, by the at least one processor, channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shift estimation procedure.

[0075] In some embodiments, the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include determining a value of a PDP sample and its associated index for the RS received from the base station.

[0076] In some embodiments, the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include performing noise cancellation and calculate a sum power of the PDP. In some embodiments, the value of the PDP sample is set to zero if the value of the PDP sample is less than a threshold value.

[0077] In some embodiments, the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include calculating a partial PDP sum based on the sum power of the PDP and a maximum delay spread search space. In some embodiments, the performing, by the at least one processor, the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include calculating a plurality of weighted filter coefficients. In some embodiments, the performing, by the at least one processor, the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include calculating an MSE associated with the delay spread and delay shift based on the partial PDP sum and the plurality of weighted filter coefficients. In some embodiments, the performing, by the at least one processor, the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include estimating the delay shift and the delay spread based on the MSE.

[0078] In some embodiments, the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include performing noise cancellation and calculating a sum power of the PDP. In some embodiments, the value of the PDP sample may be set to zero if the value of the PDP sample is less than a first threshold value. In someembodiments, when the value of the PDP sample is greater than a second threshold value, the PDP sample may be set as a first path.

[0079] In some embodiments, the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include estimating a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search. In some embodiments, the performing, by the at least one processor, the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include estimating a fine delay spread associated with the first path based on a 2-dimensional fine delay spread search based on the coarse delay spread. In some embodiments, the performing, by the at least one processor, the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include estimating the delay spread and the delay shift based on the fine delay spread associated with the first path based on the fine delay spread.

[0080] In some embodiments, the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include estimating a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search. In some embodiments, the performing, by the at least one processor, the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station may include estimating the delay spread and the delay shift based on the coarse delay spread associated with the first path.

[0081] According to a further aspect of the present disclosure, a non-transitory computer- readable medium is provided. The non-transitory computer-readable medium may store instructions, which when executed by the at least one processor, may cause the at least one processor to demodulate an RS received from a base station. The non-transitory computer-readable medium may store instructions, which when executed by the at least one processor, may cause the at least one processor to perform a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS received from the base station. The non-transitory computer-readable medium may store instructions, which when executed by the at least one processor, may cause the at least one processor to perform channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shiftestimation procedure.

[0082] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to determine a value of a PDP sample and its associated index for the RS received from the base station.

[0083] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to perform noise cancellation and calculate a sum power of the PDP. In some embodiments, the value of the PDP sample may be set to zero if the value of the PDP sample is less than a threshold value. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to calculate a partial PDP sum based on the sum power of the PDP and a maximum delay spread search space. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to calculate a plurality of weighted filter coefficients. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to calculate an MSE associated with the delay spread and delay shift based on the partial PDP sum and the plurality of weighted filter coefficients. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate the delay shift and the delay spread based on the MSE.

[0084] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, mayfurther cause the at least one processor to perform noise cancellation and calculate a sum power of the PDP. In some embodiments, the value of the PDP sample may be set to zero if the value of the PDP sample is less than a first threshold value. In some embodiments, when the value of the PDP sample is greater than a second threshold value, the PDP sample may be set as a first path.

[0085] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate a fine delay spread associated with the first path based on a 2-dimensional fine delay spread search based on the coarse delay spread. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate the delay spread and the delay shift based on the fine delay spread associated with the first path based on the fine delay spread.

[0086] In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search. In some embodiments, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, may further cause the at least one processor to estimate the delay spread and the delay shift based on the coarse delay spread associated with the first path.

[0087] The foregoing description of the specific embodiments will so reveal the general nature of the present disclosure that others can, by applying knowledge within the skill of the art, readily modify and / or adapt for various applications such specific embodiments, without undue experimentation, without departing from the general concept of the present disclosure. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalentsof the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

[0088] Embodiments of the present disclosure have been described above with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed.

[0089] The Summary and Abstract sections may set forth one or more but not all exemplary embodiments of the present disclosure as contemplated by the inventor(s), and thus, are not intended to limit the present disclosure and the appended claims in any way.

[0090] Various functional blocks, modules, and steps are disclosed above. The particular arrangements provided are illustrative and without limitation. Accordingly, the functional blocks, modules, and steps may be re-ordered or combined in different ways than in the examples provided above. Likewise, certain embodiments include only a subset of the functional blocks, modules, and steps, and any such subset is permitted.

[0091] The breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

WHAT IS CLAIMED IS:

1. An apparatus for wireless communication of a user equipment, comprising: at least one processor; and memory storing instructions, which when executed by the at least one processor, causes the at least one processor to: demodulate a reference signal (RS) received from a base station; perform a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS received from the base station; and perform channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shift estimation procedure.

2. The apparatus of claim 1, wherein, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, further causes the at least one processor to: determine a value of a power delay profile (PDP) sample and its associated index for the RS received from the base station.

3. The apparatus of claim 2, wherein, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, further causes the at least one processor to: perform noise cancellation and calculate a sum power of the PDP, wherein the value of the PDP sample is set to zero if the value of the PDP sample is less than a threshold value.

4. The apparatus of claim 3, wherein, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, further causes the at least one processor to: calculate a partial PDP sum based on the sum power of the PDP and a maximum delay spread search space;calculate a plurality of weighted filter coefficients; calculate a mean square error (MSE) associated with the delay spread and delay shift based on the partial PDP sum and the plurality of weighted filter coefficients; and estimate the delay shift and the delay spread based on the MSE.

5. The apparatus of claim 2, wherein, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, further causes the at least one processor to: perform noise cancellation and calculate a sum power of the PDP, wherein the value of the PDP sample is set to zero if the value of the PDP sample is less than a first threshold value, and wherein, when the value of the PDP sample is greater than a second threshold value, the PDP sample is set as a first path.

6. The apparatus of claim 5, wherein, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station , the memory storing instructions, which when executed by the at least one processor, further causes the at least one processor to: estimate a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search; estimate a fine delay spread associated with the first path based on a 2-dimensional fine delay spread search based on the coarse delay spread; and estimate the delay spread and the delay shift based on the fine delay spread associated with the first path based on the fine delay spread.

7. The apparatus of claim 5, wherein, to perform the time-domain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the memory storing instructions, which when executed by the at least one processor, further causes the at least one processor to: estimate a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search; andestimate the delay spread and the delay shift based on the coarse delay spread associated with the first path.

8. A method of wireless communication of a user equipment (UE), comprising: demodulating, by at least one processor, a reference signal (RS) received from a base station; performing, by the at least one processor, a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS received from the base station; and performing, by the at least one processor, channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shift estimation procedure.

9. The method of claim 8, wherein the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station comprises: determining a value of a power delay profile (PDP) sample and its associated index for the RS received from the base station.

10. The method of claim 9, wherein the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station comprises: performing noise cancellation and calculate a sum power of the PDP, wherein the value of the PDP sample is set to zero if the value of the PDP sample is less than a threshold value.

11. The method of claim 10, wherein the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station comprises: calculating a partial PDP sum based on the sum power of the PDP and a maximum delay spread search space; calculating a plurality of weighted filter coefficients; calculating a mean square error (MSE) associated with the delay spread and delay shiftbased on the partial PDP sum and the plurality of weighted filter coefficients; and estimating the delay shift and the delay spread based on the MSE.

12. The method of claim 9, wherein the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station comprises: performing noise cancellation and calculating a sum power of the PDP, wherein the value of the PDP sample is set to zero if the value of the PDP sample is less than a first threshold value, and wherein, when the value of the PDP sample is greater than a second threshold value, the PDP sample is set as a first path.

13. The method of claim 12, wherein the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station comprises: estimating a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search; estimating a fine delay spread associated with the first path based on a 2-dimensional fine delay spread search based on the coarse delay spread; and estimating the delay spread and the delay shift based on the fine delay spread associated with the first path based on the fine delay spread.

14. The method of claim 12, wherein the performing, by the at least one processor, the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station comprises: estimating a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search; and estimating the delay spread and the delay shift based on the coarse delay spread associated with the first path.

15. A non-transitory computer-readable medium storing instructions, which when executed by at least one processor, causes at least one processor to:demodulate a reference signal (RS) received from a base station; perform a time-domain delay spread / delay shift estimation procedure to estimate a delay spread and a delay shift associated with the RS received from the base station; and perform channel estimation based on the delay spread and the delay shift estimated based on the time-domain delay spread / delay shift estimation procedure.

16. The non-transitory computer-readable medium of claim 15, wherein, to perform the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, further cause the at least one processor to: determine a value of a power delay profile (PDP) sample and its associated index for the RS received from the base station.

17. The non-transitory computer-readable medium of claim 16, wherein, to perform the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, further cause the at least one processor to: perform noise cancellation and calculate a sum power of the PDP, wherein the value of the PDP sample is set to zero if the value of the PDP sample is less than a threshold value; calculate a partial PDP sum based on the sum power of the PDP and a maximum delay spread search space; calculate a plurality of weighted filter coefficients; calculate a mean square error (MSE) associated with the delay spread and delay shift based on the partial PDP sum and the plurality of weighted filter coefficients; and estimate the delay shift and the delay spread based on the MSE.

18. The non-transitory computer-readable medium of claim 16, wherein, to perform the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, further cause the at least one processor to: perform noise cancellation and calculate a sum power of the PDP, wherein the value of the PDP sample is set to zero if the value of the PDP sampleis less than a first threshold value, and wherein, when the value of the PDP sample is greater than a second threshold value, the PDP sample is set as a first path.

19. The non-transitory computer-readable medium of claim 18, wherein, to perform the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received from the base station, the instructions, which when executed by the at least one processor, further cause the at least one processor to: estimate a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search; estimate a fine delay spread associated with the first path based on a 2-dimensional fine delay spread search based on the coarse delay spread; and estimate the delay spread and the delay shift based on the fine delay spread associated with the first path based on the fine delay spread.

20. The non-transitory computer-readable medium of claim 18, wherein, to perform the timedomain delay spread / delay shift estimation procedure to estimate the delay spread and a delay shift associated with the RS received, the instructions, which when executed by the at least one processor, further cause the at least one processor to: estimate a coarse delay spread associated with the first path based on a 1 -dimensional coarse delay spread search; and estimate the delay spread and the delay shift based on the coarse delay spread associated with the first path.

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