Space forming member and semiconductor package assembly

Abstract

Disclosed are a space forming member and a semiconductor package assembly. The space forming member may comprise: an insulating body part extending in a lateral direction so as to correspond to the shape of a lead body part of a lead that is drawn out from a semiconductor package; and an insulating extension part extending downward from one side of the insulating body part so as to correspond to the shape of a lead extension part of the lead extending downward from an outer end of the lead body part. A heat conductive plate of the semiconductor package is in contact with a heat sink, the insulating body part is disposed between the semiconductor package and the heat sink in a vertical direction, and the insulating extension part may be disposed so as to cover the entirety or a portion of the lead extension part at a rear side of the semiconductor package. An upper surface corresponding part having a non-flat shape is formed on an upper surface of the semiconductor package, and a first distance extension part having a non-flat shape corresponding to the upper surface corresponding part is formed on a lower surface of the insulating body part, so that the insulating body part can be placed on the upper surface of the semiconductor package.

Description

Space forming member and semiconductor package assembly

[0001] The present invention relates to a space forming member disposed between a semiconductor package and a heat sink, and a semiconductor package assembly in which the space forming member is disposed.

[0002] For semiconductor devices to operate stably, their temperature must be maintained below a certain level. To limit the temperature rise of the operating semiconductor devices, a heatsink is attached to the surface of the semiconductor package that houses the devices.

[0003] When designing semiconductor packages that require high voltage input (e.g., power modules for power control, IGBT modules for motor drive control, etc.), safety standards (e.g., UL Standard) must be satisfied, and clearance distance and creepage distance between the voltage input leads of the semiconductor package and the metal heat sink must also be secured. The clearance distance, defined as the shortest distance through the air between two conductive objects, and the creepage distance, defined as the shortest distance along the surface of an insulating material between two conductive objects, are intended to ensure the normal operation of semiconductor devices.

[0004] Since a potential difference exists between two conductive objects with electrical potential, if the distance between the two conductive objects is not sufficient, the insulation may be broken down, causing damage or malfunction of the electrical system, and threatening the safety of the user.

[0005] FIG. 1 and FIG. 2 are cross-sectional views of a semiconductor package assembly comprising a semiconductor package, a heat sink, and an insulating member according to the prior art.

[0006] As illustrated in Fig. 1, an insulating member (25) is placed between a semiconductor package (11) and a heat sink (29). The semiconductor package (11) illustrated in Fig. 1 can be mounted on an external substrate using through-hole technology (THT).

[0007] A semiconductor package (11) is encapsulated using a molding material such as EMC (epoxy mold compound), ceramic, etc., and an internal substrate (15) on which one or more semiconductor elements (13) are formed within the semiconductor package (11) is coupled to a heat conducting plate (19) for heat dissipation. The semiconductor elements (13) may be, for example, a silicon-controlled rectifier (SCR), a power transistor, an insulated-gate bipolar transistor (IGBT), etc.

[0008] A semiconductor element (13) is electrically connected to a lead (21) by a bonding wire (17), and the lead (21) is extended to the outside of the semiconductor package (11). The lead (21) can be formed in a bent shape consisting of a lead body portion (22) extended horizontally from the semiconductor package (11) and a lead extension portion (23) extended downward from an outer end of the lead body portion (22).

[0009] The thermal conductive plate (19) is exposed through the upper surface of the semiconductor package (11) and is combined with a heat sink (29) for heat dissipation. The thermal conductive plate (19) can be formed of a metal material, ceramic, EMC, etc.

[0010] In order to prevent the insulation between the lead (21) of the semiconductor package (11) operating at high voltage and the heat sink (29) from being destroyed, the semiconductor package (11) and the heat sink (29) are designed so that a space distance and a creepage distance based on the operating voltage of the semiconductor package (11) are secured.

[0011] An insulating member (25) is sometimes placed between the semiconductor package (11) and the heat sink (29). The insulating member (25) is formed of an insulating material, such as an inorganic oxide or rubber.

[0012] The insulating member (25) can be formed in a bent shape corresponding to the shape of the lead (21), consisting of an insulating main body portion (26) extending horizontally and an insulating extension portion (27) extending downward from the outer end of the insulating main body portion (26).

[0013] When an adhesive is applied to the attachment surface formed in a flat L shape with a step on the upper surface of the semiconductor package (11) and the insulating member (25) is adhered, as illustrated in FIG. 2, the creepage distance as the insulating distance is calculated as the path of R2_cr that extends along the upper side area of ​​the semiconductor package (11) and the folded surface area of ​​the insulating member (25) to reach the heat sink (29).

[0014] In contrast, as illustrated in Fig. 2, the spatial distance as the insulation distance is calculated as the path of R2_cl, which is the shortest distance through the air. The R2_cl path is configured to connect the vertical space of the shortest distance between the lead (21) and the insulating member (25), the bottom surface area and the outer surface area of ​​the insulating member (25), and the upper part of the outer surface area of ​​the insulating member (25) and the heat sink (29) through the shortest distance through the air.

[0015] This is based on the assumption that the semiconductor package (11) and the insulating member (25) are perfectly adhered to each other by the adhesive member, so that there is no continuous space between the heat sink (29) and the lead (21) along the R1 path. Compared to the case where the insulating member (25) is not arranged, when the insulating member (25) is adhered to each other, the creepage distance and the space distance as the insulating distance are relatively expanded.

[0016] However, if the insulating member (25) is not in an incomplete state of adhesion to the upper surface of the semiconductor package (11) and a gap exists, the creepage distance and the space distance as the insulating distance are calculated along the path of R1 (i.e., the shortest path) along the interface where the semiconductor package (11) and the insulating member (25) come into contact, so there is a problem that a sufficient insulating distance is not secured even if the insulating member (25) is attached. There is also a limitation that a gap cannot but exist between the insulating member (25) and the semiconductor package (11) unless the insulating member (25) and the semiconductor package (11) are manufactured as one piece at once.

[0017] In addition, due to the high temperature generated during the operation of the semiconductor element (13), the semiconductor package (11) repeatedly expands and contracts. In this state, if the insulating member (25) is adhered to the upper surface of the semiconductor package (11) by the adhesive member, cracks may occur in the cured adhesive. Due to the cracks that occur, the creepage distance and the space distance as the insulating distance are calculated as the path of R1 along the interface where the semiconductor package (11) and the insulating member (25) come into contact, so there is also a problem that a sufficient insulating distance is not secured despite the attachment of the insulating member (25).

[0018] In addition, surface mount technology (SMT), which solders and fixes a semiconductor package (11) to the surface of an external substrate, is also widely used as a method of mounting a semiconductor package (11). Since the semiconductor package (11) is mounted using the surface mount technology by a machine pre-programmed to perform a specific operation, the mounting time is greatly reduced.

[0019] Generally, semiconductor packages (11) mounted using the surface-mount technique are manufactured with a structure that does not include a heat sink (29). As a result, semiconductor packages (11) using the surface-mount technique are not easily capable of dissipating heat generated from semiconductor elements (13), and are therefore only intended for small-capacity, low-voltage, and low-current semiconductor elements (13).

[0020] As semiconductor technology develops, semiconductor elements (13) are being developed to be able to respond to high voltage and high current in a small size, and therefore the frequency of use of heat sinks that release heat generated from semiconductor elements (13) to the outside is also increasing.

[0021] Accordingly, a method is required to ensure that a heat sink is used for a semiconductor package (11) of a surface mount technique to promote heat dissipation while ensuring a sufficient insulation distance between the lead (21) of the semiconductor package (11) and the heat sink.

[0022] The matters described in the technical background of this invention are for understanding the background of the invention, and cannot be determined to be prior art already known to a person with ordinary skill in the field to which this technology belongs.

[0023] The present invention provides a space forming member and a semiconductor package assembly in which the creepage distance and the clearance between a lead and a heat sink can be sufficiently expanded regardless of the mounting method of various semiconductor packages mounted by the insertion-mount technique (THT) or the surface-mount technique (SMT).

[0024] The present invention provides a space forming member and a semiconductor package assembly that stably maintains the bonding state of a semiconductor package and a space forming member so that sufficient creepage distance and space distance can be maintained even when the thermal expansion coefficients between the semiconductor package and the space forming member do not match, and when the contact interface between the semiconductor package and the space forming member is not in perfect close contact by an adhesive member.

[0025] The present invention provides a space forming member and semiconductor package assembly that can maximize the degree of freedom in shape design of a heat sink by securing sufficient creepage distance and space distance.

[0026] The present invention provides a space forming member and a semiconductor package assembly in which a sufficient creepage distance and space distance between leads are secured, thereby preventing insulation breakdown between adjacent leads.

[0027] The present invention provides a space forming member and a semiconductor package assembly capable of protecting a semiconductor package from static electricity by covering a sufficient area while the space forming member is in contact with leads drawn from the semiconductor package.

[0028] Other problems to be solved by the present invention can be easily understood through the following explanation.

[0029] According to one aspect of the present invention, a space forming member is provided, comprising: an insulating body portion extending laterally corresponding to the shape of a lead body portion of a lead drawn out from a semiconductor package; and an insulating extension portion extending downward from one side of the insulating body portion corresponding to the shape of a lead extension portion of the lead extending downward from an outer end of the lead body portion. Here, a heat conducting plate of the semiconductor package is in contact with a heat sink, the insulating body portion is disposed between the semiconductor package and the heat sink in a vertical direction, and the insulating extension portion may be disposed to cover all or part of the lead extension portion on the side of the semiconductor package. An upper surface corresponding portion having a non-planar shape is formed on an upper surface of the semiconductor package, and a first distance extension portion having a non-planar shape corresponding to the upper surface corresponding portion is formed on a lower surface of the insulating body portion, so that the insulating body portion may be placed on an upper surface of the semiconductor package. The upper surface corresponding portion and the first distance extension portion may be shaped so that the creepage distance (L_R1_cr) and the space distance (L_R1_cl) calculated from the interface path (R1 path) defined as the boundary area between the upper surface of the semiconductor package and the lower surface of the insulating body portion are relatively longer than or match the creepage distance (L_R0_cr) and the space distance (L_R0_cl) calculated from the minimum insulation distance specified in advance for the semiconductor package.

[0030] The insulating main body is placed on the upper side of the semiconductor package, and a concave groove that is positionally corresponding to a convex protrusion formed on one of the upper surface corresponding portion and the first distance extension portion is formed on the other of the upper surface corresponding portion and the first distance extension portion, so that the upper surface corresponding portion and the first distance extension portion can be shaped into a non-flat shape corresponding to each other.

[0031] The non-flat shapes corresponding to each other of the upper surface corresponding portion and the first distance extension portion can be formed to a size that forms a gap between the surface of the insulating body portion and the surface of the semiconductor package.

[0032] If a creepage distance (L_R2_cr) calculated from a bypass path (R2 path) that is defined to pass through at least one of the bottom portion and the outer surface of the insulating extension is smaller than a creepage distance (L_R0_cr) calculated from the minimum insulation distance, or if a clearance distance (L_R2_cl) calculated from the bypass path is smaller than a clearance distance (L_R0_cl) calculated from the minimum insulation distance, a second distance extension having an uneven shape may be formed in the insulating extension. The second distance extension may be formed in at least one area of ​​the bottom portion and the outer surface of the insulating extension.

[0033] The non-flat shape of each of the first distance extension portion and the second distance extension portion formed in the space forming member may be formed to include at least one of a concave portion and a convex portion.

[0034] The above insulating main body portion and the insulating extension portion may be formed of an insulating material having antistatic properties. The space forming member and the semiconductor package may be arranged such that only the lower surface of the insulating main body portion contacts the upper surface of the lead main body portion, or only the inner surface of the insulating extension portion contacts the outer surface of the lead extension portion, or the lower surface of the insulating main body portion contacts the upper surface of the lead main body portion and the outer surface of the lead extension contacts the inner surface of the insulating extension portion.

[0035] When the lead is fixed to be electrically connected to the external substrate, the insulating extension may be formed to a length such that the bottom portion contacts the upper surface of the external substrate. The bottom portion of the insulating extension may be formed to have the same height throughout so that the bottom portion of the insulating extension contacts the upper surface of the external substrate, or the bottom portion of the insulating extension may be formed to have an uneven height so that only a portion of the bottom portion of the insulating extension contacts the upper surface of the external substrate.

[0036] When the lead is fixed to be electrically connected to the external substrate, the insulating extension may be inserted into an insertion hole formed in the external substrate. The bottom of the insulating extension may be positioned at a height corresponding to the lower surface of the external substrate or may be positioned below the external substrate.

[0037] A partition wall may be formed in contact with at least one of the insulating main body and the insulating extension and may protrude toward the surface of the semiconductor package. The partition wall may be positioned to cover the side of a lead drawn out from the semiconductor package.

[0038] The above-mentioned partition walls may be formed on the inner surface and outer end of the space forming member, respectively. The partition walls formed on the inner surface of the space forming member are positioned corresponding to the distance securing groove formed on the surface of the semiconductor package, and may be formed to a size that enters the inner space of the distance securing groove and covers the side of the lead.

[0039] A third distance extension having a non-flat shape can be formed on the outer surface of the bulkhead formed at the outermost end of the above-mentioned space forming member.

[0040] When the insulating body part of the space forming member is placed on the upper surface of the semiconductor package, a hook may be formed on the inner surface of the partition wall formed on the outermost side of the space forming member so as to be caught by at least one of the lower surface of the semiconductor package, the fixing groove formed on one side of the semiconductor package, and the lead body part.

[0041] The above-mentioned bulkhead may be formed at a height that contacts the upper surface of the external substrate when the lead is fixed to be electrically connected to the external substrate.

[0042] When the above lead is fixed to be electrically connected to the external substrate, the partition wall may be formed to have a length such that the lower end of the partition wall is positioned corresponding to the lower surface of the external substrate or a length such that the lower end of the partition wall is positioned below the external substrate.

[0043] The space forming member, which is a unilateral space forming member, can be independently mounted on the first direction side and the second direction side from which the leads are each drawn out from the semiconductor package.

[0044] The above space forming member may be formed as an integral space forming member in which one-sided space forming members, which are respectively mounted on the first direction side and the second direction side from which leads are respectively drawn out from the semiconductor package, are connected by a connecting portion. An opening exposing the heat conducting plate to be in contact with the heat sink may be formed in the integral space forming member.

[0045] A fixing portion may be formed by extending downward from the insulating main body, and a hook may be formed at a lower end of the fixing portion that is bent toward the semiconductor package. When the space forming member is placed so as to contact the upper surface of the semiconductor package, the fixing portion may be formed with a length such that the hook catches at least one of the lower surface of the semiconductor package, a fixing groove formed on one side of the semiconductor package, and the lead main body.

[0046] The semiconductor package and the heat sink may be fastened by a screw whose head is covered with a shield washer. The shield washer may be formed concavely, including a washer portion having a screw hole formed in the center thereof through which the screw is inserted, and a shield portion extending upwardly and protruding continuously along the circumference of the washer portion. The body of the screw may be inserted into the screw hole so that the head is positioned in the internal space formed by the washer portion and the shield portion, and the head may be positioned at the lower portion of the semiconductor package so that the washer portion contacts the bottom surface of the semiconductor package, thereby fastening the semiconductor package and the heat sink.

[0047] According to another aspect of the present invention, a space forming member is provided, which includes a first unilateral space forming member arranged on a first direction side of a first semiconductor package; a multi-sided space forming member arranged between a second semiconductor package arranged adjacent to the first semiconductor package and the first semiconductor package; and a second unilateral space forming member arranged on a second direction side of the second semiconductor package. Each of the first unilateral space forming member and the second unilateral space forming member may include an insulating body portion extending laterally corresponding to a shape of a lead body portion of a lead drawn out from a corresponding semiconductor package; and an insulating extension portion extending downward from one side of the insulating body portion corresponding to a shape of a lead extension portion of the lead extending downward from an outer end of the lead body portion. The thermal conductive plates of each of the first semiconductor package and the second semiconductor package are in contact with a heat sink, the insulating main body is disposed between the corresponding semiconductor package and the heat sink in the vertical direction, and the insulating extension may be disposed to cover all or part of the lead extension on the side of the corresponding semiconductor package. An upper surface corresponding portion having a non-flat shape is formed on an upper surface of the corresponding semiconductor package, and a first distance extension portion having a non-flat shape corresponding to the upper surface corresponding portion is formed on a lower surface of the insulating main body, so that the insulating main body may be placed on an upper surface of the corresponding semiconductor package. The upper surface corresponding portion and the first distance extension portion may be shaped such that the creepage distance (L_R1_cr) and the clearance distance (L_R1_cl) calculated from the interface path (R1 path) defined as the boundary area between the upper surface of the corresponding semiconductor package and the lower surface of the insulating body portion are relatively longer than or match the creepage distance (L_R0_cr) and the clearance distance (L_R0_cl) calculated from the minimum insulation distance specified in advance for the corresponding semiconductor package.

[0048] The above space forming member may be formed as an integral space forming member in which the first unilateral space forming member, the multi-sided space forming member, and the second unilateral space forming member are connected to each other by a connecting portion. Openings exposing the heat conducting plates of each of the first semiconductor package and the second semiconductor package may be formed in the integral space forming member.

[0049] According to another aspect of the present invention, a multi-shaped space forming member is provided, comprising: a first insulating body part extending laterally in correspondence with the shape of a lead body part of a lead drawn out in a first direction from a first semiconductor package; a second insulating body part extending laterally in correspondence with the shape of a lead body part of a lead drawn out in a second direction opposite to the first direction from a second semiconductor package disposed adjacent to the first semiconductor package; and an insulating extension part formed to extend downward from one side of the first insulating body part and fixing one end of the second insulating body part to extend in an opposite direction to the first insulating body part. Each of the first semiconductor package and the second semiconductor package has a thermally conductive plate in contact with a heat sink, and the first insulating body part and the second insulating body part are positioned on upper surfaces of the corresponding semiconductor packages and are disposed between the corresponding semiconductor packages and the heat sink in the vertical direction, and the insulating extension part can be positioned between the first semiconductor package and the second semiconductor package. A first distance extension portion having a non-planar shape is formed on the lower surface of each of the first insulating body portion and the second insulating body portion, and an upper surface corresponding to the first distance extension portion of the first insulating body portion or the second insulating body portion may be formed on the upper surface of the corresponding semiconductor package. The upper surface corresponding portion and the first distance extension portion may be respectively shaped such that the creepage distance (L_R1_cr) and the clearance distance (L_R1_cl) calculated from an interface path (R1 path) defined as a boundary area between the lower surface of the first insulating body portion or the second insulating body portion and the upper surface of the corresponding semiconductor package are relatively longer or identical to each other, compared to a creepage distance (L_R0_cr) and a clearance distance (L_R0_cl) calculated from a minimum insulation distance specified in advance for the corresponding semiconductor package.

[0050] According to another aspect of the present invention, an integrated space forming member is provided, which includes a body and two or more openings formed vertically through the body. The body has a polygonal shape when viewed from above, is placed to cover two or more semiconductor packages mounted on the external substrate, and may be positioned below a heat sink. In order to allow the heat conducting plates of each of the semiconductor packages to contact the lower surface of the heat sink, each of the openings may be formed in the body to correspond to the position and size of the heat conducting plates of the semiconductor packages to be exposed.

[0051] A first distance extension of a non-planar shape may be formed on a lower surface of the body adjacent to the opening, and an upper surface corresponding to the first distance extension may be formed on an upper surface of the semiconductor package through which a heat conducting plate is exposed, such that the upper surface corresponding to the first distance extension corresponds to the first distance extension in a position corresponding to the first distance extension in a vertical direction.

[0052] The upper surface counterpart and the first distance extension may be shaped so that the creepage distance (L_R1_cr) and the clearance distance (L_R1_cl) calculated from the interface path defined as the boundary area between the semiconductor package and the body are relatively longer or matched with the creepage distance (L_R0_cr) and the clearance distance (L_R0_cl) calculated from the minimum insulation distance specified in advance for the semiconductor package in which the thermal conductive plate is exposed through the opening.

[0053] The above first distance extension portion may be formed only on the side in which the lead is drawn out from the semiconductor package based on the opening.

[0054] One or more insulating extensions may be formed extending downward from the lower surface of the body in a shape that covers all or part of the leads drawn out from the semiconductor package. The insulating extensions may be formed to have a width length that is equal to or relatively larger than the side width length from which the leads are drawn out from the semiconductor package.

[0055] A bulkhead may be formed extending downward from the lower side of the body, and the bulkhead may be positioned to cover the side of the lead drawn out from the semiconductor package.

[0056] According to another aspect of the present invention, a semiconductor package assembly is provided, comprising: two or more semiconductor packages mounted on an external substrate; an integrated space forming member having two or more openings formed vertically in a body having a polygonal shape when viewed from above, and raised to cover the semiconductor packages from above; and a heat sink disposed on an upper portion of the integrated space forming member so as to contact a heat conducting plate of each of the semiconductor packages exposed through the openings. A first distance extension portion having a non-planar shape may be formed on a lower surface of the body adjacent to the openings, and an upper surface corresponding portion having a non-planar shape corresponding to the first distance extension may be formed on an upper surface of a semiconductor package whose heat conducting plate is exposed through the openings so as to correspond in position to the first distance extension portion in a vertical direction.

[0057] The upper surface counterpart and the first distance extension may be shaped so that the creepage distance (L_R1_cr) and the clearance distance (L_R1_cl) calculated from the interface path defined as the boundary area between the semiconductor package and the body are relatively longer or matched with the creepage distance (L_R0_cr) and the clearance distance (L_R0_cl) calculated from the minimum insulation distance specified in advance for the semiconductor package in which the thermal conductive plate is exposed through the opening.

[0058] Other aspects, features and advantages other than those described above will become apparent from the following drawings, claims and detailed description of the invention.

[0059] According to an embodiment of the present invention, there is an effect of sufficiently extending the creepage distance and the space distance between the lead and the heat sink, regardless of the mounting method of various semiconductor packages mounted by the insertion mounting technique (THT) or the surface mount technique (SMT).

[0060] In addition, even when the thermal expansion coefficients between the semiconductor package and the space forming member do not match, and even when the contact interface between the semiconductor package and the space forming member is not in perfect contact with each other by the adhesive member, the bonding state between the semiconductor package and the space forming member is stably maintained, thereby maintaining sufficient creepage distance and space distance.

[0061] Additionally, the freedom of heat sink shape design is maximized by ensuring sufficient surface distance and space distance.

[0062] In addition, since sufficient creepage distance and space distance are secured between the leads, there is also an effect of preventing insulation breakdown between adjacent leads.

[0063] In addition, since the space forming member covers a sufficient area while in contact with the leads drawn from the semiconductor package, there is also an effect of protecting the semiconductor package from static electricity.

[0064] The effects that can be obtained from the present invention are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood by a person having ordinary skill in the art to which the present invention belongs from the description below.

[0065] Figures 1 and 2 are cross-sectional views of a semiconductor package assembly comprising a semiconductor package, a heat sink, and an insulating member according to the prior art.

[0066] FIG. 3 is a cross-sectional view of a semiconductor package assembly comprising a semiconductor package, a heat sink, and a space forming member according to one embodiment of the present invention.

[0067] Figures 4 to 7 are drawings illustrating various shapes of the first distance extension according to embodiments of the present invention.

[0068] FIGS. 8, 9, and 10 are cross-sectional views showing the combined shape of a semiconductor package and a space forming member according to one embodiment of the present invention.

[0069] Figures 11 to 13 are drawings illustrating various formation locations and shapes of second distance extensions according to embodiments of the present invention.

[0070] FIG. 14 is a side view of a semiconductor package assembly comprising a semiconductor package, a heat sink, and a space forming member according to one embodiment of the present invention.

[0071] FIGS. 15 to 21 are cross-sectional views of a semiconductor package assembly comprising a semiconductor package, a heat sink, and a space forming member according to other embodiments of the present invention.

[0072] FIG. 22 is a cross-sectional view of a semiconductor package assembly comprising a semiconductor package, a heat sink, and a space forming member according to another embodiment of the present invention.

[0073] FIG. 23 is a drawing showing the bonding relationship between a one-sided space forming member and a semiconductor package according to another embodiment of the present invention.

[0074] FIG. 24 is a side view of a semiconductor package assembly comprising a semiconductor package, a heat sink, and a space forming member according to another embodiment of the present invention.

[0075] FIGS. 25, 26 and 27 are bottom views of a semiconductor package assembly comprising a semiconductor package, a heat sink and a space forming member according to further embodiments of the present invention.

[0076] FIG. 28 is a drawing showing the bonding relationship between a one-sided space forming member and a semiconductor package according to another embodiment of the present invention.

[0077] Fig. 29 is a drawing illustrating the shape of the outermost bulkhead according to another embodiment of the present invention.

[0078] FIGS. 30 and 31 are drawings showing the external appearance of an integral space forming member according to another embodiment of the present invention.

[0079] FIGS. 32 to 34 are cross-sectional views of a semiconductor package assembly comprising a semiconductor package, a heat sink, and a space forming member according to further embodiments of the present invention.

[0080] FIGS. 35 and 36 are drawings showing a fixing structure of an integrated space forming member and a semiconductor package according to further embodiments of the present invention.

[0081] FIG. 37 is a cross-sectional view of a semiconductor package assembly comprising a semiconductor package, a heat sink, and a space forming member according to another embodiment of the present invention.

[0082] FIG. 38 is a cross-sectional view of a semiconductor package assembly comprising a plurality of semiconductor packages, a heat sink, and a space forming member according to another embodiment of the present invention.

[0083] FIGS. 39 to 45 are drawings showing the shape of a polygonal space forming member according to further embodiments of the present invention.

[0084] FIGS. 46 to 54 are drawings showing the upper surface shape of an integral space forming member according to further embodiments of the present invention.

[0085] FIG. 55 and FIG. 56 are drawings illustrating a fixing form of a heat sink and a semiconductor package according to one embodiment of the present invention.

[0086] The present invention is susceptible to various modifications and embodiments, and specific embodiments are illustrated in the drawings and described in detail in the detailed description. However, this is not intended to limit the present invention to specific embodiments, but should be understood to include all modifications, equivalents, and substitutes included in the spirit and technical scope of the present invention. In the drawings, each component may be illustrated in an exaggerated size for convenience of description and understanding, and it is understood that the present invention is not limited to the sizes and proportions of the components illustrated in the drawings. It is understood that the embodiments described in each drawing may be reconfigured into various embodiments by combining with other embodiments.

[0087] FIG. 3 is a cross-sectional view of a semiconductor package assembly including a semiconductor package, a heat sink, and a space forming member according to an embodiment of the present invention, and FIGS. 4 to 7 are drawings illustrating various shapes of a first distance extension portion according to embodiments of the present invention. FIGS. 8, 9, and 10 are cross-sectional views illustrating a combined shape of a semiconductor package and a space forming member according to an embodiment of the present invention, and FIGS. 11 to 13 are drawings illustrating various formation positions and shapes of a second distance extension portion according to embodiments of the present invention. FIG. 14 is a side view of a semiconductor package assembly including a semiconductor package, a heat sink, and a space forming member according to an embodiment of the present invention, and FIGS. 15 to 21 are cross-sectional views of a semiconductor package assembly including a semiconductor package, a heat sink, and a space forming member according to other embodiments of the present invention.

[0088] Referring to FIG. 3, a semiconductor package assembly may include a semiconductor package (11), a heat sink (29), and a space forming member (125). The shape of the heat sink (29) illustrated is according to one embodiment, and the shape of the heat sink (29) may vary.

[0089] A space forming member (125) is placed on the upper side of the semiconductor package (11) and arranged between the semiconductor package (11) and the heat sink (29). The semiconductor package (11) can be formed to be mounted on an external substrate (150) using a through-hole technology (THT).

[0090] The semiconductor package (11) is encapsulated using a molding material such as EMC (epoxy mold compound), ceramic, etc., and an internal substrate (15) on which one or more semiconductor elements (13) are formed within the semiconductor package (11) is coupled to a heat conducting plate (19) for heat dissipation. Here, the shape of the semiconductor package (11) may be various, such as when the semiconductor package (11) is formed so that the heat conducting plate (19) is not exposed to the outside. The semiconductor element (13) accommodated in the semiconductor package (11) may be, for example, a silicon-controlled rectifier (SCR), a power transistor, an insulated-gate bipolar transistor (IGBT), etc.

[0091] The semiconductor element (13) is electrically connected to a lead (21) by a bonding wire (17), and the lead (21) is extended to the outside of the semiconductor package (11). The lead (21) may be formed in a bent shape consisting of a lead body portion (22) extended horizontally from the semiconductor package (11) and a lead extension portion (23) extending downward from an outer end of the lead body portion (22). The lead extension portion (23) may extend downward and be electrically connected to an external substrate (150) disposed at the lower portion of the semiconductor package (11).

[0092] The space forming member (125) can be formed in a bent shape comprising an insulating body portion (126) extending laterally to correspond to the shape of the lead (21) and an insulating extension portion (127) extending downward from one side of the insulating body portion (126). Thus, the space forming member (125) can be mounted on the upper surface of the semiconductor package (11) and arranged between the semiconductor package (11) and the heat sink (29), and can be mounted so as to cover the outside of the lead (21) (see FIGS. 14, 23, and 24).

[0093] The space forming member (125) may be formed of an insulating material such as, for example, an inorganic oxide, rubber, paper, plastic, or ceramics. The space forming member (125) may be formed in a filled shape, but in order to save material, the interior of the space forming member (125) may be formed in a shape with a large number of bubbles or a hollow shape.

[0094] The lateral direction in which the insulating body part (126) extends may be, for example, a horizontal direction or an inclined direction toward the side of the semiconductor package (11). The shape in which the insulating body part (126) extends laterally may also vary, such as a straight shape or a shape with a step.

[0095] In Fig. 3, a case is exemplified where the insulating extension portion (127) extends downward from the outer end of the insulating main body portion (126) so that the space forming member (125) is formed in an 'ㄱ' shape. However, the portion where the insulating extension portion (127) extends downward is not limited to the outer end of the insulating main body portion (126), and the space forming member (125) may be formed in a 'T' shape, etc. However, the following description will be given as an example a case where the insulating extension portion (127) is formed to extend downward from the outer end of the insulating main body portion (126).

[0096] The space forming member (125) can be formed in a shape that substantially covers or fills the space between the semiconductor package (11) and the heat sink (29) and contacts and covers the opposing surface of the lead (21) exposed to the outside of the semiconductor package (11). In this case, as a surface area relatively close to the space forming member (125), the entire area of ​​the upper surface of the lead body portion (22) exposed to the outside of the semiconductor package (11) and at least a portion of the outer surface of the lead extension portion (23) are contacted and covered by the space forming member (125).

[0097] As another example, the space forming member (125) may be disposed between the semiconductor package (11) and the heat sink (29), and the upper surface of the lead body (22) of the lead (21) exposed to the outside of the semiconductor package (11) may be in contact with and cover the upper surface, but the insulating extension (127) may be formed so as to be spaced apart from the surface of the lead extension (23). Of course, it goes without saying that the space forming member (125) may have an inner surface formed so as not to be in contact with the lead (21) exposed to the outside of the semiconductor package (11), or so as to be in contact with the surface of the lead extension (23) but spaced apart from the upper surface of the lead body (22).

[0098] When the inner surface of the space forming member (125) is formed to have a sufficient area in contact with the opposing surface of the lead (21), the space forming member (125) can provide an electrostatic protection function. For this purpose, the space forming member (125) can be made of an antistatic material.

[0099] For example, in the case of a THT (Threaded-Housing Technology) type semiconductor package (11) assembled by having a lead (21) penetrate an external substrate (150), a person directly connects the semiconductor package (11) to the external substrate (150). In the process of inserting and mounting the semiconductor package (11), the semiconductor element (13) inside the semiconductor package (11) is often destroyed due to static electricity generated from a person's hand.

[0100] To prevent this, the semiconductor element (13) is designed and manufactured in a direction to strengthen the electrostatic tolerance, but this has the problem of increasing the size of the semiconductor package (11), thereby increasing the manufacturing cost. In contrast, the present embodiment can solve the problem of the semiconductor element (13) being destroyed by electrostatic by manufacturing the space forming member (125) with an anti-static material and mounting the semiconductor package (11) on the external substrate (150) while the space forming member (125) is secured.

[0101] As described below, when the space forming member (125) according to the present embodiment is placed between the semiconductor package (11) and the heat sink (29), the lead (21) is in direct contact with the space forming member (125) with a large contact area, and as illustrated in FIG. 22, a partition wall (310) formed of an insulating material is inserted into the space between adjacent leads (21), thereby increasing the equivalent capacitance using the two leads (21) as electrode plates. Through this, static electricity applied from the outside is absorbed, thereby preventing a direct influence of static electricity on the semiconductor element (13), and thus the resistance to static electricity can be maximized. Considering the minimum insulation distance specified in advance for the semiconductor package, the space forming member (125) in which the partition wall (310) is formed may have a shape having only the first distance extension portion (128), or may have a shape having both the first distance extension portion (128) and the second distance extension portion (129).

[0102] In addition, when the space forming member (125) is mounted on the semiconductor package (11) from above, the space forming member (125) is mounted while maintaining contact with the lead (21) (i.e., the lead extension (23)), so that there is an advantage in that the space forming member (125) is prevented from being damaged during the mounting process.

[0103] As illustrated in Fig. 3, a heat sink (29) that is relatively large compared to the lateral length of the insulating main body (126) can be mounted, thereby sufficiently improving heat dissipation performance. In addition, as described below, a space forming member (125) having an insulating extension (127) and / or an outermost partition wall (310) (see Figs. 28 and 29) can be arranged, thereby sufficiently securing an insulating distance for the heat sink (29).

[0104] When a space forming member (125) is placed between a semiconductor package (11) and a heat sink (29), a first insulation breakdown path (hereinafter referred to as an interface path) determined by the boundary area between the upper surface of the semiconductor package (11) and the insulating main body (126) of the space forming member (125) as an insulation breakdown path reaching the heat sink (29) from the lead (21) of the semiconductor package (11) is formed, and a second insulation breakdown path (hereinafter referred to as a bypass path) passing through at least one of the bottom portion and the outer surface of the insulating extension portion (127) is formed. In Fig. 3, the interface path is exemplified by the R1 path, and the bypass paths are exemplified by the R2_cr path and the R2_cl path, respectively. Here, the path R2_cr, which is the path of the creepage distance, and the path R2_cl, which is the path of the space distance, are each depicted in different locations of the insulation extension (127) for convenience of expression, but it is obvious that the space distance and the creepage distance can be calculated from either insulation extension (127).

[0105] The length (L_R1) of the interface path (R1 path) formed between the upper surface of the semiconductor package (11) and the space forming member (125) is equal to or is shaped to have a relatively long insulation distance, which is equal to the minimum insulation distance (L_R0) required for stable operation in the use environment of the semiconductor package (11). That is, the relationship of L_R0 ≤ L_R1 is satisfied between the length of the interface path and the minimum insulation distance, and the creepage distance (L_R1_cr) and the space distance (L_R1_cl) in the R1 path become equal to or relatively larger than the creepage distance (L_R0_cr) and the space distance (L_R0_cl) according to the minimum insulation distance.

[0106] Here, insulation requirements, such as the minimum insulation distance required depending on the usage environment for stable operation of the semiconductor package (11), may be pre-specified by international standards (e.g., IEC, UL, VDE, etc.) or corporate regulations. In addition, the creepage distance and space distance in the R1 path, which is composed of a gap area between the upper surface of the semiconductor package (11) and the insulating main body (126), may be calculated as substantially similar distances, as described below (see FIG. 10).

[0107] In addition, the length (L_R2) of the bypass path (R2 path) formed by using the insulating extension (127) of the space forming member (125) as the main path is also shaped to be equal to the minimum insulation distance (L_R0) or to have a relatively long insulation distance. However, the length (L_R2) of the bypass path may be formed to be equal to, smaller than, or larger than the length (L_R1) of the interface path.

[0108] That is, the relationship L_R0 ≤ L_R1 < L_R2, L_R0 ≤ L_R2 < L_R1, or L_R0 ≤ (L_R1 = L_R2) is satisfied between the length of the interface path, the length of the bypass path, and the minimum insulation distance. Therefore, the creepage distance (L_R2_cr) and the clearance distance (L_R2_cl) in the R2 path become equal to or relatively larger than the creepage distance (L_R0_cr) and the clearance distance (L_R0_cl) according to the minimum insulation distance.

[0109] However, when the creepage distance (L_R2_cr) in the interface path and the creepage distance (L_R1_cr) in the bypass path are compared, one of the interface path and the bypass path with a relatively shorter creepage distance becomes the insulation breakdown path. In addition, when the space distance (L_R2_cl) in the interface path and the space distance (L_R1_cl) in the bypass path are compared, one of the interface path and the bypass path with a relatively shorter space distance becomes the insulation breakdown path. However, since both the interface path and the bypass path are shaped to have an insulation distance that is equal to or relatively long than the minimum insulation distance, stable operation of the semiconductor package (11) can be ensured.

[0110] Hereinafter, with reference to the related drawings, a structure for shaping each of the interface path and the bypass path to satisfy the minimum insulation distance required for the semiconductor package (11) will be described.

[0111] First, the structure that shapes the interface path shown as the R1 path in Fig. 3 is described.

[0112] In order to form an interface path, a first distance extension portion (128) is formed on the lower surface of the insulating body portion (126) that contacts the upper surface of the semiconductor package (11) so that a sufficient clearance distance and creepage distance are secured.

[0113] The first distance extension portion (128) may be formed in a non-flat shape (e.g., a rough-concave shape) with alternating convex and concave portions, as illustrated in Fig. 3. To correspond to the first distance extension portion (128), an upper surface corresponding portion (160) with an non-flat shape (e.g., a rough-concave shape) with alternating convex and concave portions may also be formed on the upper surface of the semiconductor package (11).

[0114] Of course, the corresponding non-flat shape of the first distance extension portion (128) and the upper surface counterpart portion (160) is not limited to an uneven shape with alternating convex and concave portions. As exemplified in FIGS. 4 to 6, the peripheral area of ​​the upper surface of the semiconductor package (11), which is formed at a height relatively lower than the maximum height area of ​​the semiconductor package (11) (i.e., the area where the heat conduction plate (19) is formed), has a flat portion (e.g., a flat or inclined flat portion), and the upper surface counterpart portion (160) formed in a part or the entire area of ​​the flat portion can be formed in various non-flat shapes, such as one or more concave grooves formed, one or more convex protrusions formed, or a concave groove and a convex protrusion formed together.

[0115] Alternatively, as illustrated in FIG. 7, the non-flat shape formed to correspond to the first distance extension portion (128) and the upper surface counterpart portion (160) may be formed in an L-shape, a step shape, etc. That is, the region where the heat conduction plate (19) is formed on the upper surface of the semiconductor package (11) and the surrounding region may be formed to have a height difference. The region where the heat conduction plate (19) is formed may be formed relatively higher or lower than the surrounding region. Although not illustrated, it is obvious that the region where the heat conduction plate (19) is formed may also be formed relatively lower than the surrounding region in the non-flat shapes illustrated in FIGS. 4 to 6.

[0116] In the case where the area where the heat conduction plate (19) is formed on the upper surface of the semiconductor package (11) is formed relatively lower than the surrounding area, the corresponding area of ​​the heat sink (29) may be formed to protrude downward to contact the heat conduction plate (19), or a heat transfer member (e.g., a metal piece, etc.) may be placed on the upper surface of the heat conduction plate (19) so as to contact the lower surface of the heat sink (29) formed flat and the heat conduction plate (19).

[0117] In addition, the non-flat shape formed to correspond to the first distance extension (128) and the upper surface corresponding portion (160) may be diverse.

[0118] In this specification, the corresponding non-flat shape of the first distance extension portion (128) and the upper surface counterpart portion (160) means that at least one concave groove and one convex protrusion are formed to form a positionally corresponding pair. FIGS. 3, 8, and 9 illustrate a case where a convex protrusion is formed on the first distance extension portion (128) and a positionally corresponding concave groove is formed on the upper surface counterpart portion (160). However, it is obvious that the concave groove and the convex protrusion may both be formed spaced apart from each other on the first distance extension portion (128), and a convex protrusion and a concave groove may also be formed on the upper surface counterpart portion (160) so as to positionally correspond thereto.

[0119] The corresponding non-planar shape is not limited to the case where the concave grooves and convex protrusions are formed in a matching number so as to be positionally corresponding, and may also include a case where the number of concave grooves is relatively greater than the number of convex protrusions formed (see Fig. 9). For example, in the corresponding non-planar shape, the number of convex protrusions formed to form a positionally corresponding pair with the concave grooves may be determined by considering the size of the insulation distance (i.e., creepage distance and clearance distance) to be secured in the interface path (R1 path).

[0120] Furthermore, the sizes of the concave grooves and convex protrusions that are positionally corresponding in the corresponding non-planar shapes are not limited to being identical. As illustrated in Fig. 10, the concave grooves may be formed to be relatively larger than the convex protrusions. Alternatively, the convex protrusions may be formed to be relatively larger than the concave grooves, such as when a triangular convex protrusion is inserted into a rectangular concave groove that is positionally corresponding.

[0121] In addition, even when a plurality of concave grooves and a plurality of convex protrusions are formed to form a corresponding non-flat shape, the size of the protrusions formed must be uniform, or the size of the grooves formed is not limited to being uniform.

[0122] The first distance extension portion (128) may be sufficiently formed on the lower surface of the insulating main body portion (126), and there is no limitation on the specific method of forming the first distance extension portion (128). For example, the first distance extension portion (128) may be formed by surface treatment of the lower surface of the insulating main body portion (126). Alternatively, the insulating main body portion (126) may be folded one or more times so that a zigzag cross-section with a concave groove and a convex protrusion shape is formed, so that the first distance extension portion (128) is formed on the lower surface of the insulating main body portion (126). Alternatively, the insulating main body portion (126) may be placed on the upper surface of the semiconductor package (11) and pressure may be applied from above, so that an uneven shape corresponding to the upper surface corresponding portion (160) of the semiconductor package (11) is formed on the lower surface of the insulating main body portion (126).

[0123] As illustrated in FIGS. 3, 8, and 9, a first distance extension portion (128) is formed on the lower surface of the insulating main body portion (126) in a shape corresponding to the non-flat shape of the upper surface counterpart portion (160). The outer end region of the space forming member (125) where the insulating main body portion (126) and the insulating extension portion (127) are connected may be bent into a right-angled shape (see FIG. 8) or formed into an inclined surface as a third distance extension portion to extend the creepage distance (see FIG. 9).

[0124] That is, by using the non-flat shape formed to correspond to the upper surface corresponding portion (160) of the semiconductor package (11) and the first distance extension portion (128) of the insulating body portion (126), the space forming member (125) can be stably placed on the upper surface of the semiconductor package (11). In addition, when the heat sink (29) presses the space forming member (125) or the heat sink (29) and the space forming member (125) are adjacent to each other, the space forming member (125) can be stably positioned without being separated between the heat sink (29) and the semiconductor package (11) even if an adhesive material is not applied.

[0125] A first distance extension portion (128) formed on an insulating body portion (126) is inserted into the upper surface corresponding portion (160) of the semiconductor package (11), so that the space forming member (125) can be stably placed on the upper surface of the semiconductor package (11). In addition, since the space forming member (125) is pressed by the heat sink (29), even if an adhesive material is not applied, the space forming member (125) can be stably positioned and fixed between the heat sink (29) and the semiconductor package (11).

[0126] Of course, as described later, a gap may be formed between the space forming member (125) and the heat sink (29) (see FIG. 10), and it is natural that an adhesive material may be applied to a portion of the space forming member (125) and attached to the upper surface of the semiconductor package (11) so as to be positionally fixed.

[0127] Here, the location where the gap is formed may also vary. For example, the gap may be formed in a flat area (i.e., an area other than a non-flat shape area on the upper side of the semiconductor package (11)) and / or an inclined area as shown in FIG. 10 where the space forming member (125) and the heat sink (29) are in surface contact, or the gap may be formed in an area where non-flat shapes formed to correspond to each other in the semiconductor package (11) and the space forming member (125) are combined.

[0128] Even when the space forming member (125) is mounted, in order to ensure that the thermal conductive plate (19) of the semiconductor package (11) comes into contact with the lower surface of the heat sink (29), the non-flat upper surface counterpart (160) is formed at a lower height than the highest position of the semiconductor package (11) in consideration of the thickness of the space forming member (125). Since the non-flat shape formed to correspond to the first distance extension portion (128) and the upper surface counterpart (160) are inserted and joined, even if the insulation breakdown path is determined as the interface path between the space forming member (125) and the semiconductor package (11) (see path R1 in FIG. 3), the non-flat interface path has the advantage of having a relatively long creepage distance compared to the conventional structure having a flat surface shape (see FIG. 2). In addition, since the upper space of the semiconductor package (11) is covered by the space forming member (125), there is also the advantage of the space distance being calculated as the interface path and being lengthened by a distance substantially similar to the creepage distance.

[0129] As illustrated in FIG. 10, the corresponding non-flat shapes of the first distance extension portion (128) and the upper surface counterpart portion (160) can be formed to a size that forms a gap between the combined semiconductor package (11) and the space forming member (125), and the space forming member (125) can be formed to a thickness that also forms a gap on the lower surface of the heat sink (29).

[0130] Due to the heat generated from the semiconductor element (13), the molding member and the space forming member (125) of the semiconductor package (11) may each thermally expand. By the formed gap, even if the molding member forming the semiconductor package (11) and the forming member of the space forming member (125) are formed of materials having different thermal expansion rates, a space is secured through which the molding member and the space forming member (125) of the semiconductor package (11) can expand to different lengths, thereby preventing damage to the semiconductor package assembly composed of the semiconductor package, the heat sink, and the space forming member.

[0131] As another example, if the molding member forming the semiconductor package (11) and the forming member of the space forming member (125) are made of materials with the same thermal expansion rate or there is no concern about damage due to thermal expansion, the non-flat shape of the first distance extension portion (128) and the upper surface corresponding portion (160) may be formed in a size that does not form a gap between the semiconductor package (11) and the space forming member (125).

[0132] The space forming member (125) may be formed as one-sided space forming members, as illustrated in FIG. 23, and placed so as to be placed on both sides of the upper surface of the semiconductor package (11) to form a pair. Alternatively, the space forming member (125) may be manufactured as an integral space forming member having a shape in which a pair of space forming member regions, each of which is coupled to both sides of the semiconductor package (11), is connected to each other by a connecting portion (340), as illustrated in FIGS. 30 and 31. An opening (390) is formed on the upper surface of the space forming member (125) manufactured as an integral space forming member to expose a heat conducting plate (19) to be in contact with a heat sink (29).

[0133] A space forming member (125) manufactured as a one-sided space forming member or an integral space forming member may have a fixing member (350) formed thereon to stably maintain a state of bonding with the semiconductor package (11).

[0134] Referring to FIGS. 35 and 36, which illustrate a space forming member (125) manufactured as an integral space forming member, a fixing member (350) may be formed to extend downward from the space forming member (125), and a hook bent inward may be formed at a lower end of the fixing member (350). As illustrated in FIGS. 8 and 9, by inserting the space forming member (125) from above the semiconductor package (11) so that the hook of the fixing member (350) is fixed to the lower surface or the lid (21) of the semiconductor package (11), a stable bonding state between the space forming member (125) and the semiconductor package (11) can be maintained even without an adhesive member.

[0135] Next, a structure for shaping a detour path illustrated as the R2 path (i.e., the R2_cr path, the R2_cl path) in Fig. 3 is described.

[0136] Referring again to FIG. 3, when the upper surface of the semiconductor package (11) and the lower surface of the insulating body (126) are completely adhered to each other with an adhesive material so that complete insulation is achieved in the interface path (i.e., R1 path), the insulation distance, which is the creepage distance and the space distance, is determined in the detour path shown as the R2_cr path and the R2_cl path. Alternatively, even if complete insulation is not achieved in the interface path, the insulation distance is determined in the detour path if the length of the detour path from which the creepage distance and the space distance are calculated is relatively short compared to the interface path.

[0137] In Fig. 3, for convenience of expression, the R1, R2_cr and R2_cl paths are indicated by dotted lines spaced from the surface of the space forming member (125), but it is natural that the R1 path and the R2 (i.e., R2_cr or R2_cl) path are determined along the surface of the space forming member (125) or as the shortest distance in space.

[0138] In order to ensure that a sufficient insulation distance can be secured in the bypass path, a second distance extension (129) may be formed in the insulation extension (127) of the space forming member (125). Of course, if the insulation distance in the bypass path matches the minimum insulation distance (L_R0) required for stable operation of the semiconductor package (11) or is relatively large, the second distance extension (129) may not be formed.

[0139] The second distance extension portion (129) may be formed in a non-flat shape (e.g., a rough shape) with alternating convexities and concave portions in the height direction of the second insulation extension portion (127) on the outer surface of the insulation extension portion (127) (see FIGS. 14 and 23). Alternatively, the outer surface of the insulation extension portion (127) may be formed with one or more convexities or concave portions (see FIGS. 12 and 13). At this time, the shapes of the convexities and concave portions may be various, such as a square shape, a semicircle, a trapezoid, or a triangle.

[0140] Of course, the formation location of the second distance extension portion (129) is not limited to the outer surface of the insulating extension portion (127). For example, as illustrated in FIG. 11, an uneven shape may be formed in the width direction of the bottom portion of the insulating extension portion (127). As illustrated in FIG. 24, an uneven shape may be formed in the length direction of the bottom portion of the insulating extension portion (127) in order to extend the creepage distance between adjacent leads (21). In this way, the second distance extension portion (129) may be formed without limitation in various locations, such as the outer surface and bottom portion of the insulating extension portion (127).

[0141] The length of the insulating extension (127) of the space forming member (125) can also be selected in various ways. For example, as illustrated in FIGS. 3 and 14, when the lead extension (23) of the lead (21) of the semiconductor package (11) is fixed to be electrically connected to the external substrate (150), the space forming member (125) can be formed with a length such that the insulating extension (127) does not reach the external substrate (150).

[0142] Alternatively, as illustrated in FIGS. 15, 16 and 17, when the lead extension (23) of the lead (21) of the semiconductor package (11) is fixed to be electrically connected to the external substrate (150), the space forming member (125) may be formed to a length such that the bottom of the insulating extension (127) contacts the upper surface of the external substrate (150).

[0143] At this time, as illustrated in FIG. 16, the bottom of the insulating extension (127) may be formed to have the same height as a whole so that the bottom of the insulating extension (127) is in contact with the upper surface of the external substrate (150). Alternatively, as illustrated in FIG. 17, the bottom of the insulating extension (127) may be formed to have an uneven height so that only some areas (e.g., end areas on both sides) of the bottom of the insulating extension (127) are in contact with the upper surface of the external substrate (150).

[0144] When the bottom of the insulating extension (127) is formed to a length that contacts the upper surface of the external substrate (150), a stopper (210) may be formed on the bottom of the insulating extension (127), as illustrated in FIG. 15. The stopper (210) may function to regulate the mounting height of the semiconductor package (11) when the semiconductor package (11) equipped with the space forming member (125) is mounted on the external substrate (150) using a through-the-hole mounting technique (THT). In order to expand the area in which the bottom of the insulating extension (127) contacts the upper surface of the external substrate (150), the stopper (210) may be formed to protrude outwardly from the insulating extension (127). However, if the bottom of the insulating extension (127) is formed to have a sufficient area in contact with the upper surface of the external substrate (150), the stopper (210) may be omitted.

[0145] In addition, when the bottom of the insulating extension (127) is formed to a length that contacts the upper surface of the external substrate (150), one or more guide bars (220) may be formed on the bottom of the insulating extension (127), as illustrated in FIGS. 18 and 19. The guide bars (220) of the space forming member (125) may be inserted into guide holes formed in the external substrate (150), so that the space forming member (125) mounted on the semiconductor package (11) may be fixed to the external substrate (150). When the space forming member (125) is fixed to the external substrate (150) by the guide bars (220), the guide bars (220) may function to disperse vibrations applied to the heat sink (29) by the driving of the system in which the semiconductor package (11) is mounted to the external substrate (150).

[0146] As another example, the space forming member (125) may be formed to have an insulating extension (127) of a length such that the lower end of the insulating extension (127) reaches the lower surface of the external substrate (150) by being inserted into an insertion hole formed in the external substrate (150) (see FIG. 20) or the lower end of the insulating extension (127) penetrates the external substrate (150) and is positioned below the external substrate (150) (see FIG. 21). A stopper (210) that functions to regulate the mounting height of the semiconductor package (11) may also be formed on such a space forming member (125).

[0147] That is, as illustrated in FIG. 3, when the insulation distance is determined by a detour path, the space forming member (125) can be formed to have an insulating extension (127) of an appropriate length to form the creepage distance and space distance required for insulation.

[0148] FIG. 22 is a cross-sectional view of a semiconductor package assembly including a semiconductor package, a heat sink, and a space forming member according to another embodiment of the present invention, and FIG. 23 is a drawing showing a coupling relationship between a unilateral space forming member and a semiconductor package according to another embodiment of the present invention. FIG. 24 is a side view of a semiconductor package assembly including a semiconductor package, a heat sink, and a space forming member according to another embodiment of the present invention, and FIGS. 25, 26, and 27 are bottom views of semiconductor package assemblies including a semiconductor package, a heat sink, and a space forming member according to still other embodiments of the present invention. FIG. 28 is a drawing showing a coupling relationship between a unilateral space forming member and a semiconductor package according to still another embodiment of the present invention, and FIG. 29 is a drawing exemplifying a shape of an outermost bulkhead according to still another embodiment of the present invention. FIGS. 30 and 31 are views showing the external appearance of an integrated space forming member according to another embodiment of the present invention, FIGS. 32 to 34 are cross-sectional views of a semiconductor package assembly comprising a semiconductor package, a heat sink, and a space forming member according to another embodiment of the present invention, and FIGS. 35 and 36 are views showing a fixing structure of an integrated space forming member and a semiconductor package according to another embodiment of the present invention.

[0149] Compared to the space forming member (125) already described with reference to FIGS. 3 to 21, the space forming member (125) illustrated in FIGS. 22 and 23 has a difference in that a plurality of partition walls (310) are formed to contact the inner surface (i.e., to contact the lower surface of the insulating main body portion (126) and the inner surface of the insulating extension portion (127). The partition walls (310) may be formed of the same insulating material as the space forming member (125). However, as previously explained, if the insulating extension (127) is formed in a shape such that the space forming member (125) contacts and covers the upper surface of the lead body (22) of the lead (21) exposed to the outside of the semiconductor package (11) but is spaced apart from the surface of the lead extension (23), the partition wall (310) may be formed in a shape such that it contacts only the lower surface of the insulating body (126) and extends downward to cover the side surface of the lead (21) (see FIG. 40). Of course, the partition wall (310) may also be formed in a shape such that it contacts only the inner surface of the insulating extension (127) and extends forward to cover the side surface of the lead (21).

[0150] Each of the partition walls (310) formed on the inner surface of the space forming member (125) can be formed at a spatial position corresponding to a distance securing groove (330) formed on the surface of the semiconductor package (11), as illustrated in FIGS. 25, 26, and 27. In order to increase the spatial distance between adjacent leads (21), each of the partition walls (310) can be inserted and positioned in the space between adjacent leads (21).

[0151] In FIGS. 25, 26 and 27, the distance securing groove (330) is shown as having a shape bent at a right angle, but the shape of the distance securing groove (330) may be various, such as a trapezoidal shape, a concave groove shape, etc.

[0152] The distance securing groove (330) may be formed between one or more leads (21) spaced apart from each other in the body of the semiconductor package (11), but may not be formed between specific leads (21). The description will focus on the case where the partition wall (310) is formed to correspond to the formation position of the distance securing groove (330), but the partition wall (310) formed to isolate adjacent leads (21) from each other may also be formed at a position where the distance securing groove (330) is not formed.

[0153] The bulkhead (310) may be formed in a flat shape, as illustrated in FIGS. 23 and 25, and may be formed to a length that enters the space of the distance securing groove (330) and contacts the surface of the distance securing groove (330).

[0154] As another example of formation, the bulkhead (310) may be formed to a size that has clearance in the internal space of the distance securing groove (330) to accommodate thermal expansion of the space forming member (125) and the semiconductor package (11), as illustrated in FIG. 26.

[0155] The bulkhead (310) may be formed in a flat shape, but as illustrated in Fig. 27, it may be formed in a protruding shape with a protruding portion that enters the distance securing groove (330) while covering the side surfaces of the leads (21). It may also be formed on the inner surface of the insulating extension (127) in a T-shape, trapezoidal shape, or triangular shape.

[0156] Figures 25, 26 and 27 merely illustrate examples of the formation of a distance securing groove (330) and a bulkhead (310) for the convenience of understanding, and it is obvious that the shape and size of the distance securing groove (330) and the bulkhead (310) are not limited thereto.

[0157] As described above, the leads (21) drawn out from the semiconductor package (11) and arranged adjacent to each other are isolated by the partition wall (310) formed on the inner surface of the space forming member (125). Short-circuit defects between the leads (21) can be prevented by the partition wall (310) formed to isolate the leads (21), and even if the size of the semiconductor package (11) is maintained the same, there is an effect in which the creepage distance and the space distance between the adjacent leads (21) are sufficiently expanded by the partition wall (310).

[0158] As illustrated in FIGS. 23, 25, 26 and 27, a bulkhead (310) is formed on the inner surface of the insulation extension (127) so as to be inserted into the space between adjacent leads (21).

[0159] Additionally, as illustrated in FIG. 28, a partition wall (310) may be further formed on the outermost side of the space forming member (125) (i.e., on both ends of the insulating main body (126)) to isolate the outermost leads (21). The partition wall (310) formed on the outermost side of the space forming member (125) functions to sufficiently expand the insulation breakdown distance between the outermost leads (21) and the heat sink (29).

[0160] The partition wall (310) formed on the outermost side of the space forming member (125) may be formed to be relatively larger than the width of the partition walls (310) formed on the inner side so that the lower part of the insulating main body (126) is completely covered, as illustrated in FIG. 29. Although not illustrated, the second distance extension portion (129) of an uneven shape formed on the outer surface of the insulating extension portion (127) may also be formed on the outer surface of the partition wall (310) formed on the outermost side.

[0161] Just as the insulating extension (127) can be formed at various heights, the partition wall (310) formed on the space forming member (125) can also be formed at various heights. For example, as illustrated in FIG. 22, when the lead extension (23) of the lead (21) of the semiconductor package (11) is fixed to be electrically connected to the external substrate (150), the space forming member (125) can be formed at a length such that the partition wall (310) does not reach the external substrate (150).

[0162] As another forming example, as illustrated in FIG. 32, the space forming member (125) may be formed to a length such that the lower end of the bulkhead (310) contacts the upper surface of the external substrate (150).

[0163] As another forming example, the space forming member (125) may be formed to have a length of the partition wall (310) such that the lower end of the partition wall (310) reaches the lower surface of the external substrate (150) (see FIG. 33) or the lower end of the partition wall (310) penetrates the external substrate (150) and is positioned below the external substrate (150) (see FIG. 34). That is, the height of the partition wall (310) formed on the space forming member (125) may be variously modified based on the creepage distance and space distance required between adjacent leads (21).

[0164] In FIGS. 22 to 23 and FIGS. 30 to 36, the height of the insulating extension (127) of the space forming member (125) and the height of the partition wall (310) are shown to be the same, but depending on the creepage distance and spatial distance to be secured, the partition wall (310) and the insulating extension (127) may be formed to have non-consistent lengths. In addition, a plurality of partition walls (310) formed on the inner surface of the space forming member (125) may also be formed to have inconsistent heights.

[0165] The space forming member (125) in which the partition wall (310) is formed may be formed as a pair of unilateral space forming members, as illustrated in FIG. 23, and placed so as to be placed on each side of the upper surface of the semiconductor package (11). Alternatively, the space forming member (125) may be manufactured as an integral space forming member in which a pair of space forming member regions, each of which is joined to each side of the semiconductor package (11), is connected to each other by a connecting portion (340), as illustrated in FIGS. 30 and 31.

[0166] The space forming members (125) arranged on each side of the semiconductor package (11) may have corresponding shapes in the case of a semiconductor package (11) in which leads (21) are drawn out on both sides.

[0167] At this time, if the quantity or arrangement of the leads (21) drawn out on both sides of the semiconductor package (11) is different, the space forming members (125) arranged on each side of the semiconductor package (11) may have corresponding external shapes, but the number and arrangement of the formed partition walls (310) may be different.

[0168] In addition, if the lead (21) is drawn out only on one side of the semiconductor package (11), the shapes of the space forming members (125) arranged on each side of the semiconductor package (11) may not correspond to each other.

[0169] A space forming member (125) manufactured as a one-sided space forming member or an integral space forming member may also have a fixing member (350) formed thereon to stably maintain a state of bonding with the semiconductor package (11).

[0170] Referring to FIGS. 35 and 36, which illustrate a space forming member (125) manufactured as an integral space forming member, a fixing member (350) may be formed to extend downward from the space forming member (125), and a hook bent inward may be formed at a lower end of the fixing member (350). As illustrated in FIGS. 8 and 9, by inserting the space forming member (125) from above the semiconductor package (11) so that the hook of the fixing member (350) is fixed to the lower surface of the semiconductor package (11) or the lower surface of the lid body (22), a stable bonding state between the space forming member (125) and the semiconductor package (11) can be maintained even without an adhesive member.

[0171] In order to fix the hook of the fixing member (350) to the lower surface of the semiconductor package (11), the length of the fixing member (350) of the space forming member (125) may be formed to correspond to the height of the semiconductor package (11). In order to stably fix using the hook, a fixing groove (360) may be formed on the lower surface of the semiconductor package (11).

[0172] As previously described with reference to FIGS. 28 and 29, when a partition wall (310) for isolating a lead (21) located at the outermost side of a semiconductor package (11) is further formed at the outermost side of a space forming member (125), the fixing portion (350) may be omitted, and a hook may be formed on the inner surface of the partition wall (310) formed at the outermost side. At this time, the hook is formed to correspond to the height of the lead (21) to be fixed or the lower surface of the semiconductor package (11).

[0173] FIG. 37 is a cross-sectional view of a semiconductor package assembly comprising a semiconductor package, a heat sink, and a space forming member according to further embodiments of the present invention, and FIG. 38 is a cross-sectional view of a semiconductor package assembly comprising a plurality of semiconductor packages, a heat sink, and a space forming member according to further embodiments of the present invention. FIGS. 39 to 45 are views illustrating shapes of polygonal space forming members according to further embodiments of the present invention, and FIGS. 46 to 54 are views illustrating upper surface shapes of integral space forming members according to further embodiments of the present invention.

[0174] Referring to FIG. 37, the semiconductor package assembly may include a semiconductor package (11), a heat sink (29), and a space forming member (125).

[0175] Compared to the semiconductor package assembly described with reference to FIGS. 3 to 36 above, the semiconductor package (11) illustrated in FIG. 37 has a difference in that it is mounted on an external substrate (150) using surface mount technology (SMT).

[0176] Since the area occupied by the hole in the external substrate (150) is large, the mounting method of the semiconductor package (11) is changed from the insertion mounting technique to the surface mounting technique to facilitate lightweight and compact design, and the arrangement structure of the semiconductor package (11), heat sink (29), and space forming member (125) may be substantially the same as the semiconductor package assembly already described above. However, since the height of the semiconductor package (11) mounted on the external substrate (150) is relatively low, the insulation distance in the bypass path may be relatively short.

[0177] Accordingly, the various technical ideas already described with reference to FIGS. 3 to 36 can be applied without limitation to the semiconductor package assembly illustrated in FIG. 37. For example, the insulating body portion (126) of the space forming member (125) is formed with a thickness such that the heat conducting plate (19) contacts the lower surface of the heat sink (29), and a first distance extension portion (128) and an upper surface counterpart portion (160) may be formed on the lower surface of the insulating body portion (126) and the upper surface of the semiconductor package (11) to form an interface path, respectively. A plurality of partition walls (310) may be formed on the inner surface and the outermost surface of the space forming member (125), and a second distance extension portion (129) may be formed on at least one of the outer surface and the bottom portion of the insulating extension portion (127) of the space forming member (125) to form a bypass path.

[0178] As illustrated in Fig. 38, for various purposes, a plurality of semiconductor packages (11) may be arranged adjacently, or adjacently arranged semiconductor packages (11) may be connected in series or parallel. When arranging a plurality of semiconductor packages (11) adjacently, only semiconductor packages (11) of the same type may be arranged, or various different semiconductor packages (11) may be combined.

[0179] In addition, when each of the semiconductor packages (11) to be in contact by sharing a heat sink (29) is mounted on a circuit board (150), they may be mounted consistently using a through-hole mounting technique (THT) or a surface mount technique (SMT), or the through-hole mounting technique (THT) and the surface mount technique (SMT) may be different depending on the semiconductor package (11).

[0180] In this case, the maximum height points of the semiconductor packages (11) connected in series or parallel or used adjacently may be consistent, but the maximum height points may not be consistent due to differences in mounting techniques, differences in sizes between different types of semiconductor packages (11), etc. In the case where the maximum height points of the semiconductor packages (11) are consistent, the lower surface of the heat sink (29) that contacts the thermal conductive plate (19) of each of the semiconductor packages (11) may be formed in a flat shape, as illustrated in FIG. 38.

[0181] In contrast, in a case where the maximum height points of the semiconductor packages (11) do not coincide with each other, in order to allow the heat sink (29) to commonly contact the heat conduction plate (19) of each of the semiconductor packages (11) as illustrated in FIGS. 53 and 54, the lower surface of the heat sink (29) may be formed to have a concave or convex region or a step corresponding to the upper surface height of each of the semiconductor packages (11) (i.e., the height of the heat conduction plate (19)). In this case, the multi-faceted space forming member (520) may be formed to have a deformation region (410) that is formed to be concave, convex, or a step corresponding to the shape of the lower surface of the heat sink (29) and the upper surface height of each of the semiconductor packages (11).

[0182] As illustrated in Fig. 38, when the first semiconductor package (11a) and the second semiconductor package (11b) are arranged adjacent to each other, a space forming member (125) is mounted on the left side of the first semiconductor package (11a), the area between the first semiconductor package (11a) and the second semiconductor package (11b), and the right side of the second semiconductor package.

[0183] Hereinafter, for convenience of explanation, the space forming member (125) is referred to as a unilateral space forming member (510), a multilateral space forming member (520), or an integral space forming member (530) depending on the shape, arrangement position, etc.

[0184] Here, the unilateral space forming member (510) refers to a space forming member (125) individually mounted on the left side of the first semiconductor package (11a) and the right side of the second semiconductor package (11b), and the multilateral space forming member (520) refers to a space forming member (125) mounted in the area between the first semiconductor package (11a) and the second semiconductor package (11b).

[0185] The integral space forming member (530) refers to a space forming member (125) having a body in which an insulating main body (126) extends laterally and one or more openings (390) are formed in the body. The integral space forming member (530) can be formed to correspond to a shape in which two or more unilateral space forming members (510) are connected by a connecting portion (340), a shape in which one or more unilateral space forming members (510) and one or more multilateral space forming members (520) are connected by a connecting portion (340), etc., as described below.

[0186] In order to replace the multi-sided space forming member (520), it is natural that unilateral space forming members (510) may be mounted on the right side of the first semiconductor package (11a) and the left side of the second semiconductor package (11b), respectively. In addition, if the first semiconductor package (11a) and the second semiconductor package (11b) have a shape in which the leads (21) are pulled out only in the opposite direction and the leads (21) are not pulled out on the opposite side, the multi-sided space forming members (520) may be mounted only in the area between the first semiconductor package (11a) and the second semiconductor package (11b) from which the leads (21) are pulled out, and the unilateral space forming members (510) may be omitted.

[0187] As illustrated in FIGS. 39 and 40, the multi-faceted space forming member (520) shares one insulating extension (127), and the first insulating body part (126a) and the second insulating body part (126b) may be formed as a T-shaped body extending to both sides of the insulating extension (127). For example, when the multi-faceted space forming member (520) is placed between two adjacent semiconductor packages in the lateral direction, a boundary is formed by the insulating extension (127) when viewed from below. It may be formed in a shape. In another example, when placed between four adjacent semiconductor packages in all directions, it is bordered in a + shape by an insulating extension (127) when viewed from below. It can also be formed into a shape. In addition, the shape of the polygonal space forming member (520) can be varied.

[0188] Assuming that a polygonal space forming member (520) having an insulating extension (127) is placed between two adjacent semiconductor packages, as illustrated in FIG. 39, the insulating extension (127) can be formed with a width length (L1) corresponding to the spacing between the first semiconductor package (11a) and the second semiconductor package (11b) that are placed adjacent to each other.

[0189] In FIGS. 39 to 42, the first insulating body part (126a) and the second insulating body part (126b) are exemplified as being arranged at the same height, but the formation heights of the first insulating body part (126a) and the second insulating body part (126b) may be different depending on the height of the corresponding semiconductor package.

[0190] On the lower surface of each of the first insulating body portion (126a) and the second insulating body portion (126b), a first distance extension portion (128) is formed in a non-flat shape corresponding to the upper surface corresponding portion (160) formed on the upper surface of the corresponding first semiconductor package (11a) or second semiconductor package (11b).

[0191] A plurality of partition walls (310) corresponding to the number and arrangement of leads (21) extended outward from the right side of the corresponding first semiconductor package (11a) may be formed on the lower surface of the first insulating body part (126a) and the inner surface of the insulating extension part (127). Similarly, a plurality of partition walls (310) corresponding to the number and arrangement of leads (21) extended outward from the left side of the corresponding second semiconductor package (11b) may be formed on the lower surface of the second insulating body part (126b) and the inner surface of the insulating extension part (127).

[0192] Although not shown, it is obvious that a partition wall (310) may be further formed on the outermost side of the first and second insulating body parts (126a, 126b) to isolate the leads located on the outermost side of the first and second semiconductor packages (11a, 11b) (see FIG. 28). The partition wall (310) formed on the outermost side may be formed to be relatively larger than the width of the partition walls (310) formed on the inner side so that the lower portions of the first and second insulating body parts (126a, 126b) are completely covered (see FIG. 29).

[0193] In addition, as illustrated in FIG. 40, the insulating extension portion (127) of the polygonal space forming member (520) may be formed with a relatively narrow width length (L2) compared to the spacing between the first semiconductor package (11a) and the second semiconductor package (11b) that are arranged adjacent to each other. In this case, the partition wall (310) may have a size that covers the side surface of the lead (21) and may be formed in a shape that extends downwards while contacting only the lower surface of the insulating main body portion (126). Of course, it goes without saying that the partition wall (310) may be formed in a size that extends further in the lateral direction and contacts both the lower surface of the insulating main body portion (126) and the inner surface of the insulating extension portion (127).

[0194] In addition, the polygonal space forming member (520) may be formed as a body in which the insulating extension (127) is omitted, and the first insulating body part (126a) and the second insulating body part (126b) are connected, as illustrated in FIG. 41, so as to be placed over the upper surfaces of adjacent semiconductor packages (11). For example, if the insulating distance between the leads (21) drawn out from each of the first and second semiconductor packages (11a, 11b) and the heat sink (29) is sufficiently secured by being covered by the body of the polygonal space forming member (520), and if the insulating distance between the leads (21) of the first semiconductor package (11a) and the leads (21) of the second semiconductor package (11b) is also satisfied, the insulating extension (127) may be omitted in the polygonal space forming member (520). Of course, even when the insulation distance is satisfied, it is natural that an insulation extension (127) may be formed in the space between the first and second semiconductor packages (11a, 11b) for stable support of the multi-faceted space forming member (520).

[0195] In this case, as illustrated in Fig. 42, a partition wall (310) may be formed on the lower surface of the body of the multi-faceted space forming member (520) to enter the space between the leads (21) drawn from the first semiconductor package (11a) and the second semiconductor package (11b).

[0196] Regardless of whether the insulating extension portion (125) and / or the partition wall (310) are formed, the body of the polygonal space forming member (520) can be supported and placed over the upper surfaces of the adjacent first and second semiconductor packages (11a, 11b) (see FIG. 38). At this time, a first distance extension portion (128) can be formed on the lower surface of each of the first insulating body portion (126a) and the second insulating body portion (126b) in a non-flat shape corresponding to the upper surface corresponding portion (160) formed on the upper surface of the corresponding first semiconductor package (11a) or second semiconductor package (11b).

[0197] In addition, as illustrated in FIGS. 43 to 45, the polygonal space forming member (520) may have a shape in which a pair of unilateral space forming members (510) are connected by a connecting portion (340). At this time, as illustrated in FIG. 43, one or more connecting portions (340) may be formed to have a narrow width, or as illustrated in FIGS. 44 and 45, they may be formed to be as long as the length in the longitudinal direction of the unilateral space forming member (510). A second distance extension portion (129) may or may not be formed on a pair of unilateral space forming members (510) formed by the polygonal space forming member (520) to secure a necessary insulation distance.

[0198] The aforementioned unilateral space forming member (510) and / or multi-sided space forming member can be placed at appropriate positions to secure an insulating distance between the semiconductor packages (11) mounted on the external substrate (150) and the heat sink (29) and an insulating distance between the semiconductor packages (11). For example, the general space forming members (125) can be placed at positions in the direction in which the leads (21) are drawn out from each of the semiconductor packages (11), and the multi-sided space forming members (520) can be placed in the space between adjacent semiconductor packages (11) from which the leads (21) are drawn out to face each other.

[0199] At this time, the unilateral space forming member (510) and / or the multilateral space forming member (520) may not be individually placed at the required positions, but may be placed as an integral space forming member (530) as exemplified in FIGS. 30, 46 to 54, etc. Although a concave groove shape corresponding to the shape of the semiconductor package (11) is shown on the inner surface of the connecting portion (340) illustrated in FIGS. 30, 46 to 50, etc. for use in screw fastening, etc., it is obvious that the concave groove may not be formed on the inner surface of the connecting portion (340).

[0200] The integral space forming member (530) has corresponding openings (390) to expose the heat conducting plates (19) of the target semiconductor packages (11), and is formed in a shape to be placed so as to cover the upper surfaces of the target semiconductor packages (11) to secure an insulating distance.

[0201] As illustrated in FIGS. 30 and 31, a pair of unilateral space forming members (510) covering leads (21) drawn out on both sides of the semiconductor package (11) may be connected by a connecting member (340) to form an opening (390) to form an integral space forming member (530).

[0202] In addition, as illustrated in FIGS. 46 to 54, the integral space forming member (530) is formed as a body with an insulating main body portion (126) extending laterally, and two or more openings (390) extending vertically through the body may be formed to expose the heat conducting plates (19) of the target semiconductor packages (11). The integral space forming member (530) is placed on the upper side of the target semiconductor packages (11), and the heat conducting plates (19) of the target semiconductor packages (11) exposed through the corresponding openings (390) are in contact with the heat sink (29) placed on the upper side of the integral space forming member (530).

[0203] As illustrated in Fig. 46, when the leads (21) are all drawn out in the first direction side and the second direction side in each of the first semiconductor package (11a) and the second semiconductor package (11b), in order to secure an insulating distance between the leads (21) and the heat sink (29), an integral space forming member (530) having an insulating extension (127) formed in the space between the first and second semiconductor packages (11b), the first direction side of the first semiconductor package (11a), and the second direction side of the second semiconductor package (11b) may be disposed.

[0204] As illustrated in Fig. 47, when the insulation distance between the leads (21) drawn out from the first and second semiconductor packages (11a, 11b) and the heat sink (29) is sufficiently secured by being covered by the body of the integral space forming member (530), and when the insulation distance between the leads (21) of the first semiconductor package (11a) and the facing leads (21) of the second semiconductor package (11b) is also satisfied, the insulation extension portion (127) may not be formed in the space between. In this case, a partition wall (310) may be formed on the lower surface of the body of the multi-sided space forming member (520) so as to enter the space between the leads (21) drawn out from the first semiconductor package (11a) and the second semiconductor package (11b). Of course, even when the insulation distance is satisfied, it is natural that an insulation extension (127) may be formed in the space between the first and second semiconductor packages (11a, 11b) for stable support of the integral space forming member (530).

[0205] As illustrated in Fig. 48, when the lead (21) is drawn out only in the first direction side from the first semiconductor package (11a) and the lead (21) is drawn out only in the first direction side from the second semiconductor package (11b), an integral space forming member (530) in which an insulating extension portion (127) is formed on the first direction side of the first semiconductor package (11a) and the second direction side of the second semiconductor package (11b) can be arranged.

[0206] As illustrated in Fig. 49, when the leads (21) are drawn out only into the space between the first semiconductor package (11a) and the second semiconductor package (11b), an integral space forming member (530) having a shape in which an insulating extension (127) is formed only in the space between the first and second semiconductor packages (11b) can be placed.

[0207] Alternatively, as illustrated in FIG. 50, even if the leads (21) are all drawn out in the first direction side and the second direction side from each of the first semiconductor package (11a) and the second semiconductor package (11b), if the insulation distance between the leads (21) drawn out from each of the first and second semiconductor packages (11a, 11b) and the heat sink (29) is sufficiently secured, and if the insulation distance between the leads (21) of the first semiconductor package (11a) and the facing leads (21) of the second semiconductor package (11b) is also satisfied, the insulating extension portion (127) may not be formed in the integral space forming member (530).

[0208] Alternatively, as illustrated in FIG. 51, when the thickness of the first semiconductor package (11a) (i.e., the height of the heat conduction plate (19)) and the thickness of the second semiconductor package (11b) are different, the integrated space forming member (530) may be formed in a shape having a step. That is, in order to form an opening (390) at a corresponding height corresponding to the different heights of the heat conduction plates (19) in the first and second semiconductor packages (11a, 11b), the body of the integrated space forming member (530) may be formed to have a step, in which the insulating main body portion (126) extends laterally. Of course, when the thickness of the first semiconductor package (11a) (i.e., the height of the heat conduction plate (19)) and the thickness of the second semiconductor package (11b) are different, the integrated space forming member (530) may be formed in a shape in which the upper surface is formed parallel, but only the lower surface has a step, as illustrated in FIG. 51. In this case, a corresponding area of ​​the heat sink (29) may be formed to protrude downwards to contact the heat conducting plate (19) formed on the upper surface of the semiconductor package (11) having a relatively small thickness, or a heat transfer member (e.g., a metal piece, etc.) may be placed on the upper surface of the heat conducting plate (19) so as to contact the lower surface of the heat sink (29) formed flat and the heat conducting plate (19), respectively.

[0209] In addition, the shape and arrangement of the insulating extension (127) formed on the lower surface of the integral space forming member (530) may vary depending on the shape and arrangement of the semiconductor packages (11) on which the integral space forming member (530) is placed in order to secure an insulating distance.

[0210] As seen from above, the integral space forming member (530) may be formed in a polygonal flat plate shape having one or more openings (390). As described below, the flat plate shape of the integral space forming member (530) is not limited to a horizontal shape, and may have steps in some areas, as illustrated in FIG. 51.

[0211] Here, the opening (390) is a hole that exposes the heat conduction plate (19) of the semiconductor package (11) positioned on the lower side of the integral space forming member (530) so that it comes into contact with the heat sink (29) positioned on the upper side of the integral space forming member (530). Therefore, the size, position, and number of the openings (390) formed in the integral space forming member (530) may correspond to the size, position, and number of the heat conduction plates (19) provided in the semiconductor packages (11) mounted on the external substrate (150) to be covered by the integral space forming member (530).

[0212] In addition, as illustrated in FIGS. 46 to 54, in order to secure an insulating distance longer than the minimum insulating distance required for the semiconductor package (11) arranged to correspond to each opening (390), a first distance extension portion (128) is formed in a non-planar shape on the lower surface of the integral space forming member (530) adjacent to the opening (390) to extend the insulating distance in the interface path (see path R1 of FIG. 3). The shape and width of the first distance extension portion (128) can be determined in consideration of the minimum insulating distance required for the corresponding semiconductor package (11). The first distance extension portion (128) can be formed in a shape perpendicular to the direction in which the lead (21) is drawn out from the corresponding semiconductor package (11), and an upper surface corresponding portion (160) having a non-planar shape corresponding to the first distance extension portion (128) is formed on the upper surface of the semiconductor package (11).

[0213] As illustrated in FIGS. 48, 49, and 53, respectively, if the lead (21) is pulled out only in one direction from the semiconductor package (11), the first distance extension portion (128) may be formed adjacent to the opening (390) only on the side in which the lead (21) is pulled out, based on the opening (390), on the lower surface of the integrated space forming member (530). Of course, regardless of whether the lead (21) is pulled out, the first distance extension portion (128) may be formed to correspond to both sides of the opening (390).

[0214] As illustrated in FIGS. 46 to 49, a partition wall (310) may be formed at the bottom of the integral space forming member (530) to secure an insulating distance between leads (21) drawn from each of the semiconductor packages (11).

[0215] Although not shown in FIGS. 52 to 54, it is understood that a joining hole for joining a heat sink (29) to the space forming member can be formed at an appropriate location.

[0216] FIG. 55 and FIG. 56 are drawings illustrating a fixing form of a heat sink and a semiconductor package according to one embodiment of the present invention.

[0217] The shape and arrangement of the space forming member (125) have been described with reference to the related drawings according to various embodiments of the present invention.

[0218] In addition, in order to release heat generated inside the semiconductor package (11), it was explained that the heat conduction plate (19) of the semiconductor package (11) is in contact with the heat sink (29) through an opening formed in the space forming member (125). At this time, in order to apply an external force to stably maintain the contact state between the heat conduction plate (19) of the semiconductor package (11) and the heat sink (29), a screw (320) may be used as illustrated in FIG. 55.

[0219] However, when the semiconductor package (11) and the heat sink (29) are fixed using a screw (610), the conductive heat sink (29) and the conductive screw (610) come into direct contact, thereby creating an effect in which the conductive area expands in the opposite direction of the heat sink (29) (i.e., the bottom surface of the semiconductor package (11)).

[0220] That is, the head and body of the screw (610) are generally formed of a conductor, and the head is fixed to the end of the body with a relatively large diameter. If the head is positioned on the bottom surface of the semiconductor package (11), even if a groove is formed on the bottom surface of the semiconductor package (11) corresponding to the head and the lead (21), the spatial distance is not extended, and there is a limitation that the spatial distance and creepage distance between the screw (610) and the lead (21) cannot be extended by the space forming members (125) described above.

[0221] To solve this problem, as illustrated in Fig. 55, the screw (610) can be installed to fasten the semiconductor package (11) and the heat sink (29) in a form in which the head of the screw (610) is covered with a cover washer (620).

[0222] The shield washer (620) is formed in a concave shape, including a washer portion (624) having a screw hole (626) formed in the center through which a screw (610) is inserted, and a shield portion (624) that extends upwardly and protrudes continuously along the circumference of the washer portion (624). The shield washer (620) may be formed of an insulating material such as, for example, an inorganic oxide, rubber, paper, plastic, or ceramics. The shape of the washer portion (624) may vary, for example, from a circle to a square to a triangle.

[0223] In order to fasten the semiconductor package (11) and the heat sink (29) using the screw (610), the body of the screw (610) is inserted into the screw hole (626) so that the head of the screw (610) is positioned in the internal space formed by the washer portion (622) and the covering portion (624) (see FIG. 56).

[0224] In this state, the screw (610) is rotated so that the lower end of the body of the screw (610) and the washer portion (622) face the bottom surface of the semiconductor package (11), and the tip and thread of the body of the screw (610) are fitted into the fastening hole formed in the semiconductor package (11), thereby causing the screw (610) to rise.

[0225] The washer part (622) is rotated until it comes into contact with the bottom surface of the semiconductor package (11) and the tip of the screw (610) and the threads of a certain area are inserted into the heat sink (29), so that the semiconductor package (11) and the heat sink (29) can be fixedly connected by the screw (610).

[0226] At this time, the washer part (622) can prevent deformation or damage to the bottom surface of the semiconductor package (11) by dispersing the load applied when the bottom surface of the semiconductor package (11) is fixed by the screw (610), and can increase frictional force to prevent the screw (610) from loosening.

[0227] In addition, the head of the screw (610) is positioned so that its periphery is entirely covered by the covering member (624). This has the advantage that both the spatial distance and the creepage distance are expanded by the covering member (624) that entirely covers the periphery of the head.

[0228] The semiconductor package (11) may have different insulation distances and / or space distances required depending on the system environment to which it is applied, and it is natural that the shield washer (620) may be manufactured to have a shielding portion (624) of a height corresponding thereto. If the screw (610) that fastens the semiconductor package (11) and the heat sink (29) is manufactured from a non-conductor, the shield washer (620) may be omitted.

[0229] Although the present invention has been described above with reference to embodiments thereof, it will be understood by those skilled in the art that various modifications and changes may be made to the present invention without departing from the spirit and scope of the present invention as set forth in the claims below.

Claims

1. An insulating body portion extending laterally corresponding to the shape of the lead body portion of the lead drawn from the semiconductor package; and In response to the shape of the lead extension of the lead extending downward from the outer end of the lead body, an insulating extension extending downward from one side of the insulating body is included. The thermal conductive plate of the semiconductor package is in contact with the heat sink, the insulating main body is disposed between the semiconductor package and the heat sink in the vertical direction, and the insulating extension is disposed to cover all or part of the lead extension on the side of the semiconductor package. A non-flat shape upper surface corresponding portion is formed on the upper surface of the semiconductor package, and a non-flat shape first distance extension portion corresponding to the upper surface corresponding portion is formed on the lower surface of the insulating body, so that the insulating body is placed on the upper surface of the semiconductor package. A space forming member characterized in that the upper surface corresponding portion and the first distance extension portion are each shaped so that the creepage distance (L_R1_cr) and the space distance (L_R1_cl) calculated from the interface path (R1 path) defined as the boundary area between the upper surface of the semiconductor package and the lower surface of the insulating body portion are relatively longer than or match the creepage distance (L_R0_cr) and the space distance (L_R0_cl) calculated from the minimum insulation distance specified in advance for the semiconductor package.

2. In paragraph 1, The above insulating body part is placed on the upper side of the semiconductor package, A space forming member characterized in that a pair of concave grooves positionally corresponding to a convex projection formed on one of the upper surface corresponding portion and the first distance extension portion is formed on the other of the upper surface corresponding portion and the first distance extension portion, so that the upper surface corresponding portion and the first distance extension portion are shaped into a non-flat shape corresponding to each other.

3. In paragraph 1, A space forming member characterized in that the non-flat shapes corresponding to each other of the upper surface corresponding portion and the first distance extension portion are formed to a size that forms a gap between the surface of the insulating body portion and the surface of the semiconductor package.

4. In paragraph 1, If the creepage distance (L_R2_cr) calculated from a bypass path (R2 path) that is defined to pass through at least one of the bottom and outer surfaces of the above-mentioned insulating extension is smaller than the creepage distance (L_R0_cr) calculated from the minimum insulation distance, or if the clearance distance (L_R2_cl) calculated from the bypass path is smaller than the clearance distance (L_R0_cl) calculated from the minimum insulation distance, a second distance extension having an uneven shape is formed in the above-mentioned insulating extension, A space forming member characterized in that the second distance extension is formed in at least one area of ​​the bottom portion of the insulating extension and the outer surface of the insulating extension.

5. In paragraph 4, A space forming member characterized in that the non-flat shape of each of the first distance extension portion and the second distance extension portion formed in the space forming member is formed to include at least one of a concave portion and a convex portion.

6. In paragraph 1, The above insulating main body and the above insulating extension are formed of an insulating material having antistatic properties, A space forming member characterized in that the space forming member and the semiconductor package are arranged so that only the lower surface of the insulating main body part contacts the upper surface of the lead main body part, or only the inner surface of the insulating extension part contacts the outer surface of the lead extension part, or the lower surface of the insulating main body part contacts the upper surface of the lead main body part and the outer surface of the lead extension part contacts the inner surface of the insulating extension part.

7. In paragraph 1, When the above lead is fixed to be electrically connected to the external substrate, the insulating extension is formed to a length such that the bottom part contacts the upper surface of the external substrate, The bottom of the insulating extension is formed to have the same height as a whole so that the bottom of the insulating extension is in contact with the upper surface of the external substrate as a whole, or A space forming member characterized in that the bottom of the insulating extension is formed with an uneven height so that only a portion of the bottom of the insulating extension comes into contact with the upper surface of the external substrate.

8. In paragraph 1, When the above lead is fixed to be electrically connected to the external substrate, the insulating extension is inserted into an insertion hole formed in the external substrate, A space forming member characterized in that the bottom part of the insulating extension is positioned at a height corresponding to the lower surface of the external substrate or is positioned below the external substrate.

9. In paragraph 1, The bulkhead is formed in contact with at least one of the insulating main body and the insulating extension and protrudes toward the surface of the semiconductor package. A space forming member characterized in that the above bulkhead is positioned to cover the side of the lead drawn out from the semiconductor package.

10. In paragraph 9, The above bulkheads are formed on the inner and outer ends of the space forming member, respectively, A space forming member characterized in that the partition formed on the inner surface of the space forming member is positioned at a position corresponding to a distance securing groove formed on the surface of the semiconductor package, and is formed to a size that enters the inner space of the distance securing groove and covers the side of the lead.

11. In paragraph 10, A space forming member characterized in that a third distance extension having an uneven shape is formed on the outer surface of the bulkhead formed at the outermost end of the space forming member.

12. In paragraph 10, A space forming member characterized in that, when the insulating body part of the space forming member is placed on the upper surface of the semiconductor package, a hook is formed on the inner surface of a partition formed on the outermost side of the space forming member so as to be caught by at least one of the lower surface of the semiconductor package, a fixing groove formed on one side of the semiconductor package, and the lead body part.

13. In paragraph 9, A space forming member characterized in that the above bulkhead is formed at a height that contacts the upper surface of the external substrate when the lead is fixed to be electrically connected to the external substrate.

14. In paragraph 9, A space forming member characterized in that when the lead is fixed to be electrically connected to the external substrate, the partition wall is inserted into an insertion hole formed in the external substrate and formed with a length such that the lower end of the partition wall corresponds to the lower surface of the external substrate or is positioned below the external substrate.

15. In paragraph 1, A space forming member characterized in that the space forming member, which is a unilateral space forming member, is independently mounted on the first direction side and the second direction side from which leads are each drawn out from the semiconductor package.

16. In paragraph 1, The above space forming member is formed as an integral space forming member in which one-sided space forming members are connected by a connecting portion and are respectively mounted on the first direction side and the second direction side from which the leads are respectively drawn out from the semiconductor package. A space forming member characterized in that an opening is formed in the integrated space forming member to expose the heat conducting plate to be in contact with the heat sink.

17. In paragraph 1, A fixing portion is formed by extending downward from the above insulating body portion, and a hook bent toward the semiconductor package is formed at the lower end of the fixing portion. A space forming member characterized in that the fixing member is formed with a length such that when the space forming member is placed so as to be in contact with the upper surface of the semiconductor package, the hook is caught by at least one of the lower surface of the semiconductor package, the fixing groove formed on one side of the semiconductor package, and the lead body.

18. In paragraph 1, The above semiconductor package and the above heat sink are fastened by a screw whose head is covered with a cover washer, The above shield washer is formed concavely, including a washer portion having a screw hole formed in the center through which the screw is inserted, and a shield portion formed by protruding and extending upward continuously along the circumference of the washer portion. The body of the screw is inserted into the screw hole so that the head is positioned in the internal space formed by the washer and the covering portion, A space forming member characterized in that the screw connects the semiconductor package and the heat sink in a form in which the head is positioned at the bottom of the semiconductor package so that the washer portion comes into contact with the bottom surface of the semiconductor package.

19. A first unilateral space forming member arranged on the first direction side of the first semiconductor package; A multi-faceted space forming member disposed between the first semiconductor package and the second semiconductor package disposed adjacent to the first semiconductor package; and Including a second unilateral space forming member arranged on the second direction side of the second semiconductor package, Each of the first unilateral space forming member and the second unilateral space forming member, An insulating body portion extending laterally corresponding to the shape of the lead body portion of the lead drawn from the corresponding semiconductor package; and In response to the shape of the lead extension of the lead extending downward from the outer end of the lead body, an insulating extension extending downward from one side of the insulating body is included. The thermal conductive plates of each of the first semiconductor package and the second semiconductor package are in contact with a heat sink, the insulating main body is disposed between the corresponding semiconductor package and the heat sink in the vertical direction, and the insulating extension is disposed to cover all or part of the lead extension on the side of the corresponding semiconductor package. A non-flat top-surface corresponding portion is formed on the upper surface of the corresponding semiconductor package, and a non-flat first distance extension portion corresponding to the top-surface corresponding portion is formed on the lower surface of the insulating main body, so that the insulating main body is placed on the upper surface of the corresponding semiconductor package. A space forming member characterized in that the upper surface corresponding portion and the first distance extension portion are each shaped such that the creepage distance (L_R1_cr) and the space distance (L_R1_cl) calculated from the interface path (R1 path) defined as the boundary area between the upper surface of the corresponding semiconductor package and the lower surface of the insulating body portion are relatively longer than or match the creepage distance (L_R0_cr) and the space distance (L_R0_cl) calculated from the minimum insulation distance specified in advance for the corresponding semiconductor package.

20. In paragraph 19, The above space forming member is formed as an integral space forming member in which the first unilateral space forming member, the multi-sided space forming member, and the second unilateral space forming member are connected to each other by a connecting portion, A space forming member characterized in that openings are formed in the integrated space forming member to expose the heat conducting plates of each of the first semiconductor package and the second semiconductor package.

21. A first insulating body part extending laterally corresponding to the shape of the lead body part of the lead drawn out in the first direction from the first semiconductor package; A second insulating body portion extending laterally corresponding to the shape of the lead body portion of the lead drawn in a second direction opposite to the first direction in a second semiconductor package disposed adjacent to the first semiconductor package; and Including an insulating extension portion formed to extend downward from one side of the first insulating body portion and fixing one end of the second insulating body portion to extend in the opposite direction to the first insulating body portion, The thermal conductive plates of each of the first semiconductor package and the second semiconductor package are in contact with a heat sink, the first insulating body portion and the second insulating body portion are placed on the upper side of the corresponding semiconductor package and are arranged between the corresponding semiconductor package and the heat sink in the vertical direction, and the insulating extension portion is positioned between the first semiconductor package and the second semiconductor package. A first distance extension portion having a non-flat shape is formed on the lower surface of each of the first insulating body portion and the second insulating body portion, and an upper surface corresponding to the first distance extension portion of the first insulating body portion or the second insulating body portion is formed on the upper surface of the corresponding semiconductor package. A multi-faceted space-formed member, characterized in that the upper surface corresponding portion and the first distance extension portion are each shaped so that the creepage distance (L_R1_cr) and the clearance distance (L_R1_cl) calculated from an interface path (R1 path) defined as a boundary area between the lower surface of the first insulating body portion or the second insulating body portion and the upper surface of the corresponding semiconductor package are relatively longer or identical to each other, compared to the creepage distance (L_R0_cr) and the clearance distance (L_R0_cl) calculated from a predetermined minimum insulation distance for the corresponding semiconductor package.

22. Body; and Including two or more openings formed vertically penetrating the body, The above body has a polygonal shape when viewed from above, The above body is placed so as to cover two or more semiconductor packages mounted on the external substrate, and is located below the heat sink, An integrated space forming member characterized in that each of the openings is formed in the body to correspond to the position and size of the thermal conductive plate of the semiconductor package to be exposed so that the thermal conductive plate of each of the semiconductor packages comes into contact with the lower surface of the heat sink.

23. In paragraph 22, An integral space forming member characterized in that a first distance extension of a non-planar shape is formed on a lower surface of the body adjacent to the opening, and an upper surface corresponding to the first distance extension is formed on an upper surface of the semiconductor package through which a heat conducting plate is exposed so as to correspond in position to the first distance extension in a vertical direction.

24. In paragraph 23, An integral space forming member characterized in that the upper surface corresponding portion and the first distance extension portion are each shaped so that the creepage distance (L_R1_cr) and the clearance distance (L_R1_cl) calculated from an interface path defined as a boundary area between the semiconductor package and the body are relatively longer or matched with the creepage distance (L_R0_cr) and the clearance distance (L_R0_cl) calculated from a predetermined minimum insulation distance for a semiconductor package in which a heat conducting plate is exposed through the opening.

25. In paragraph 23, An integrated space forming member, characterized in that the first distance extension is formed only on the side in which the lead is drawn out from the semiconductor package based on the opening.

26. In paragraph 22, One or more insulating extensions are formed by extending downward from the lower side of the body in a shape that covers all or part of the leads drawn from the semiconductor package. An integral space forming member, characterized in that the insulating extension is formed to have a width length that is equal to or relatively larger than the side width length from which the leads are drawn out from the semiconductor package.

27. In paragraph 22, The bulkhead is formed by extending downward from the lower side of the body, An integral space forming member, characterized in that the above-mentioned bulkhead is positioned to cover the side of the lead drawn out from the above-mentioned semiconductor package.

28. Two or more semiconductor packages mounted on an external substrate; An integrated space forming member having a body having a polygonal shape when viewed from above, in which two or more openings are formed in an up-down direction, and which is raised to cover the semiconductor packages from above; and Including a heat sink disposed on the upper part of the integrated space forming member so as to contact the thermal conductive plate of each of the semiconductor packages exposed through the opening, A semiconductor package assembly characterized in that a first distance extension of a non-planar shape is formed on a lower surface of the body adjacent to the opening, and an upper surface corresponding to the first distance extension is formed on an upper surface of the semiconductor package through which a heat conducting plate is exposed so as to correspond in position to the first distance extension in a vertical direction.

29. In paragraph 28, A semiconductor package assembly, characterized in that the upper surface counterpart and the first distance extension are each shaped so that the creepage distance (L_R1_cr) and the clearance distance (L_R1_cl) calculated from an interface path defined as a boundary area between the semiconductor package and the body are relatively longer or matched with the creepage distance (L_R0_cr) and the clearance distance (L_R0_cl) calculated from a predetermined minimum insulation distance for a semiconductor package in which a thermal conductive plate is exposed through the opening.

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