Quantum error filtering method and device using quantum error filtering code

Abstract

The present disclosure relates to a quantum error filtering method and device using a quantum error filtering code, and the device may be configured to: encode a quantum state for input data to output, to a quantum circuit, a plurality of logical qubits, each of which is implemented by a plurality of physical qubits on the basis of a predefined quantum error filtering code; and detect a quantum error of one of the logical qubits input through the quantum circuit on the basis of parities measured from the physical qubits for the input logical qubits.

Description

Quantum error filtering method and device using quantum error filtering code

[0001] The present disclosure relates to a quantum error filtering method and device using a quantum error filtering code.

[0002] Typically, quantum computers perform calculations by leveraging quantum mechanical physical phenomena. Quantum computers, utilizing quantum information communication, can simultaneously process multiple calculations on a single processor, exponentially outperforming conventional computers in terms of information processing capacity and speed when solving specific problems. However, when designing quantum circuits using quantum hardware (HW) to implement these quantum computers, noise in the quantum hardware can cause quantum errors in the quantum circuits. Therefore, existing technologies utilize quantum error correction codes (QECCs) to detect and correct quantum errors in the output of quantum circuits. However, these technologies are inefficient because they only correct the output of the quantum circuit while maintaining the quantum circuit itself.

[0003] The present disclosure provides a quantum error filtering method and device using a quantum error filtering code.

[0004] The present disclosure provides a quantum error filtering device, which may include an encoder that outputs a plurality of logical qubits, each of which is implemented as a plurality of physical qubits, to a quantum circuit based on a predefined quantum error filtering code, and a filter that is configured to detect a quantum error of one of the input logical qubits based on parities measured from the physical qubits for the logical qubits input through the quantum circuit.

[0005] The present disclosure provides a quantum error filtering method of a computer device, wherein the quantum error filtering method may include a step of outputting a plurality of logical qubits, each of which is implemented as a plurality of physical qubits, to a quantum circuit based on a predefined quantum error filtering code, and a step of detecting a quantum error of one of the input logical qubits based on parities measured from the physical qubits for the logical qubit input through the quantum circuit.

[0006] The present disclosure provides a computer program stored in a non-transitory computer-readable recording medium for executing a quantum error filtering method on a computer device, wherein the quantum error filtering method may include a step of outputting a plurality of logical qubits, each of which is implemented as a plurality of physical qubits, to a quantum circuit based on a predefined quantum error filtering code, and a step of detecting a quantum error of one of the input logical qubits based on parities measured from the physical qubits for the logical qubits input through the quantum circuit.

[0007] According to the present disclosure, quantum errors in quantum circuits can be detected more efficiently using a quantum error filtering code. This allows for the design of quantum circuits free of quantum errors, eliminating quantum circuits with quantum errors, for implementing quantum computers. This allows for the collection of only results free of quantum errors from quantum computers, thereby amplifying the accuracy of quantum computing calculation results. This technology could also be applied to cloud quantum computing.

[0008] FIG. 1 is a diagram schematically illustrating the configuration of a computer device according to various embodiments.

[0009] FIG. 2 is a diagram illustrating a quantum error filtering device according to the first embodiment.

[0010] FIG. 3 is a diagram illustrating a quantum error filtering device according to the second embodiment.

[0011] FIG. 4 is a diagram for explaining the performance of a quantum error filtering device according to the first and second embodiments.

[0012] FIG. 5 is a diagram illustrating a quantum error filtering device according to a third embodiment.

[0013] FIG. 6 is a diagram illustrating a quantum error filtering method according to various embodiments.

[0014] Hereinafter, various embodiments of the present disclosure are described with reference to the attached drawings.

[0015]

[0016] FIG. 1 is a diagram schematically illustrating the configuration of a computer device (100) according to various embodiments.

[0017] Referring to FIG. 1, the computer device (100) may include at least one of a communication module (110), an input module (120), an output module (130), a memory (140), or a processor (150). In some embodiments, at least one of the components of the computer device (100) may be omitted, and at least one other component may be added. In some embodiments, at least two of the components of the computer device (100) may be implemented as a single integrated circuit.

[0018] The communication module (110) can communicate with an external device in the computer device (100). The communication module (110) can establish a communication channel between the computer device (100) and the external device, and can communicate with the external device through the communication channel. Here, the external device may include at least one of another computer device, a base station, or a server. The communication module (110) may include at least one of a wired communication module or a wireless communication module. The wired communication module is connected to the external device via a wire and can communicate via a wire. The wireless communication module may include at least one of a short-range communication module or a long-range communication module. The short-range communication module can communicate with the external device via a short-range communication method. For example, the short-range communication method may include at least one of Bluetooth, WiFi direct, or infrared data association (IrDA). The long-range communication module can communicate with the external device via a long-range communication method. Here, the long-range communication module can communicate with the external device via a network. For example, the network may include at least one of a cellular network, the Internet, or a computer network such as a local area network (LAN) or a wide area network (WAN).

[0019] The input module (120) can input a signal to be used in at least one component of the computer device (100). The input module (120) can be configured to detect a signal directly input by a user or to generate a signal by detecting a change in the surroundings. For example, the input module (120) can include at least one of a mouse, a keypad, a microphone, or a sensing module having at least one sensor. In some embodiments, the input module (120) can include at least one of touch circuitry configured to detect a touch or a sensor circuitry configured to measure the intensity of a force generated by a touch.

[0020] The output module (130) can output information to the outside of the computer device (100). The output module (130) can include at least one of a display module configured to visually output information or an audio output module capable of outputting information as an audio signal. For example, the audio output module can include at least one of a speaker or a receiver.

[0021] The memory (140) can store various data used by at least one component of the computer device (100). For example, the memory (140) can include at least one of volatile memory and non-volatile memory. The data can include at least one program and input data or output data related thereto. The program can be stored in the memory (140) as software including at least one command and can include at least one of an operating system, middleware, or an application.

[0022] The processor (150) can execute a program in the memory (140) to control at least one component of the computer device (100). Through this, the processor (150) can perform data processing or calculation. At this time, the processor (150) can execute a command stored in the memory (140). The processor (150) may be provided to perform a quantum error filtering method. Specifically, the processor (150) can detect quantum errors occurring in a quantum circuit using a predefined quantum error filtering code (QEFC), thereby removing a quantum circuit with a quantum error. Here, the quantum error may include at least one of a bit error (which may also be referred to as an X error) or a phase error (which may also be referred to as a Z error). To this end, the processor (150) may include a quantum error filtering device.

[0023] A quantum error filtering code may include a 2-qubit quantum error filtering code and a 4-qubit quantum error filtering code. The 2-qubit quantum error filtering code may be used to detect either a bit error or a phase error. According to a first embodiment, the 2-qubit quantum error filtering code is used to detect a bit error and may be defined by two logical qubits as in [Mathematical Formula 1] below. According to a second embodiment, the 2-qubit quantum error filtering code is used to detect a phase error and may be defined by two logical qubits as in [Mathematical Formula 2] below. The 4-qubit quantum error filtering code may be used to detect both a bit error and a phase error. According to a third embodiment, the 4-qubit quantum error filtering code may be defined by two logical qubits as in [Mathematical Formula 3] below.

[0024]

[0025]

[0026]

[0027] Here, represents a logical qubit of 0 qubits, represents the logical qubits of 1 qubit, 0 and 1 represent bits, and + and - can represent phases.

[0028] FIG. 2 is a diagram illustrating a quantum error filtering device (200) according to the first embodiment.

[0029] Referring to FIG. 2, a quantum error filtering device (200) of the first embodiment is provided to detect a bit error and can be placed on a quantum circuit including two qubit lines (211, 213). At this time, the quantum error filtering device (200) can detect a bit error for the qubit lines (211, 213). This quantum error filtering device (200) can include an encoder (220) and a filter (230). Here, a quantum state ( ) can be prepared.

[0030] The encoder (220) can encode the input quantum state and output two logical qubits based on a 2-qubit quantum error filtering code to a quantum circuit. At this time, each of the logical qubits can be implemented with two physical qubits of the same states as in [Mathematical Formula 1] above. Here, the states represent bits, and the logical qubit of 0 qubit can be implemented with physical qubits corresponding to 0, and the logical qubit of 1 qubit can be implemented with physical qubits corresponding to 1. To this end, the encoder (220) can include one CNOT gate (221), and the CNOT gate (221) can be applied to one of the qubit lines (211, 213).

[0031] At this time, a quantum error (E) may occur in the quantum circuit. That is, a quantum error (E), i.e., a bit error, may occur between the encoder (220) and the filter (230). In this case, at least one physical qubit among the logical qubits output from the encoder (220) may change from the same states to different states. For example, one of the physical qubits may change from 0 to 1 or from 1 to 0.

[0032] The filter (230) can determine whether a quantum error (E) occurs in the quantum circuit based on the parities measured for the logical qubits input through the quantum circuit. Specifically, the filter (230) measures the parity from the physical qubits for each of the logical qubits input, thereby measuring the parities of the logical qubits input, respectively. Here, if the physical qubits are in the same state, the parity will be 0, and if the physical qubits are in different states, the parity will be 1. Therefore, the filter (230) can determine whether a quantum error (E) occurs in the quantum circuit from the sum of the parities. To this end, the filter (230) includes an additional qubit line (231), two CNOT gates (233, 234) applied to the additional qubit line (231), and a measurement unit (235), and the measurement unit (235) can substantially obtain the sum of the parities. If the sum of the parities is 0, the filter (230) determines that there is no quantum error (E) in the input logical qubits, and it can be determined that no quantum error (E) has occurred in the quantum circuit. In this case, the quantum circuit may not be removed. If the sum of the parities is 1, the filter (230) determines that there is a quantum error (E) in one of the input logical qubits, and it can be determined that a quantum error (E) has occurred in the quantum circuit. In this case, the quantum circuit may be removed.

[0033] FIG. 3 is a diagram illustrating a quantum error filtering device (300) according to the second embodiment.

[0034] Referring to FIG. 3, a quantum error filtering device (300) of the second embodiment is provided to detect a phase error and can be placed on a quantum circuit including two qubit lines (311, 313). At this time, the quantum error filtering device (300) can detect a phase error for the qubit lines (311, 313). This quantum error filtering device (300) can include an encoder (320) and a filter (350). Here, a quantum state (consisting of 0 qubit and 1 qubit) ) can be prepared.

[0035] The encoder (320) can encode the input quantum state and output two logical qubits based on a 2-qubit quantum error filtering code to a quantum circuit. At this time, each of the logical qubits can be implemented with two physical qubits of the same states as in [Mathematical Formula 2] above. Here, the states represent phases, and the logical qubit of 0 qubit can be implemented with physical qubits corresponding to + (positive), and the logical qubit of 1 qubit can be implemented with physical qubits corresponding to - (negative). To this end, the encoder (320) may include one CNOT gate (321) and two H (Hadamard) gates (323, 324), wherein the CNOT gate (321) is applied to one of the qubit lines (311, 313), and the H gates (323, 324) may be applied to each of the qubit lines (311, 313) behind the CNOT gate (321).

[0036] At this time, a quantum error (E) may occur in the quantum circuit. That is, a quantum error (E), i.e., a phase error, may occur between the encoder (320) and the filter (350). In this case, at least one physical qubit among the logical qubits output from the encoder (320) may change from the same states to different states. For example, one of the physical qubits may change from + to - or from - to +.

[0037] The filter (350) can determine whether a quantum error (E) occurs in the quantum circuit based on the parities measured for the logical qubits input through the quantum circuit. Specifically, the filter (350) measures the parity from the physical qubits for each of the logical qubits input, thereby measuring the parities of the logical qubits input, respectively. Here, if the physical qubits are in the same state, the parity will be 0, and if the physical qubits are in different states, the parity will be 1. Therefore, the filter (350) can determine whether a quantum error (E) occurs in the quantum circuit based on the sum of the parities. To this end, the filter (350) includes two H gates (351, 352), an additional qubit line (353), and two CNOT gates (355, 356) applied to the additional qubit line (353) after the H gates (351, 352), and a measurement unit (357), wherein the measurement unit (357) can substantially obtain the sum of the parities. If the sum of the parities is 0, the filter (350) can determine that there is no quantum error (E) in the input logical qubits, and can determine that no quantum error (E) has occurred in the quantum circuit. In this case, the quantum circuit may not be eliminated. If the sum of the parities is 1, the filter (350) can determine that there is a quantum error (E) in one of the input logical qubits, and can determine that a quantum error (E) has occurred in the quantum circuit. In this case, the quantum circuit may be eliminated.

[0038] FIG. 4 is a drawing for explaining the performance of a quantum error filtering device (200, 300) according to the first and second embodiments.

[0039] Referring to Figure 4, the performance of a quantum circuit with noise is compared when no quantum error filtering code is used (Q1), when the 2-qubit quantum error filtering code of the first embodiment is used (Q2), and when a conventional quantum error correction code is used (Q3). Here, noise in the quantum circuit is modeled as the product of a single-qubit line and a quantum error, as follows: . Here, p e represents an error rate, and X represents an X(Pauli-X)) gate. At this time, the performance is determined by the accuracy according to the error rate. As a result of the comparison, when the 2-qubit quantum error filtering code of the first embodiment is used (Q2), the performance is superior to that of when the existing quantum error correction code is used (Q3). And, by using the 2-qubit quantum error filtering code of the first embodiment, p s Successfully filtering quantum errors with a probability of . Similarly, the performance of the 2-qubit quantum error filtering code of the second embodiment can also be predicted. In this case, noise in the quantum circuit will be modeled as follows: . Here, Z can represent the Z (Pauli-Z) gate.

[0040] FIG. 5 is a diagram illustrating a quantum error filtering device (500) according to the third embodiment.

[0041] Referring to FIG. 5, a quantum error filtering device (500) of the third embodiment is provided to detect bit errors and phase errors, and may be placed on a quantum circuit including four qubit lines (511, 513, 515, 517). Here, the qubit lines (511, 513, 515, 517) may be configured as a first qubit line (511), a second qubit line (513), a third qubit line (515), and a fourth qubit line (517). At this time, the quantum error filtering device (500) may detect bit errors and phase errors for the qubit lines (511, 513, 515, 517). This quantum error filtering device (500) may include an encoder (520) and filters (530, 550). Here, a quantum state consisting of 0 qubits and 1 qubits ( ) can be prepared.

[0042] The encoder (520) can encode the input quantum state and output two logical qubits based on a 4-qubit quantum error filtering code to a quantum circuit. At this time, each of the logical qubits can be implemented as a combination of a plurality of pairs, each of which is composed of two physical qubits of the same states, as in [Mathematical Formula 3] above. Here, the states of each physical qubit of the pairs represent one of bits or phases, and thus, the combination can represent a combination of bits and phases. That is, the logical qubit of 0 qubit can be implemented as a pair of physical qubits corresponding to 0, a pair of physical qubits corresponding to 1, and a pair of physical qubits corresponding to +, and the logical qubit of 1 qubit can be implemented as a pair of physical qubits corresponding to 0, a pair of physical qubits corresponding to 1, and a pair of physical qubits corresponding to -. To this end, the encoder (520) may include one CNOT gate (521) positioned in front, two H gates (523, 524), and two CNOT gates (525, 526) positioned in the back, wherein the front CNOT gate (521) is applied to one of the third qubit lines (515), the H gates (523, 524) are applied to the first qubit line (511) and the third qubit line (515) behind the front CNOT gate (521), respectively, and the rear CNOT gates (525, 526) may be applied to the second qubit line (513) and the fourth qubit line (517) behind the H gates (523, 524), respectively.

[0043] At this time, a quantum error (E) may occur on the quantum circuit. That is, at least one of a bit error or a quantum error may occur between the encoder (520) and the filter (530, 550). In this case, at least one physical qubit among the logical qubits output from the encoder (520) may change from the same states to different states. For example, one of the physical qubits may change from 0 to 1, or from 1 to 0, or one of the physical qubits may change from + to -, or from - to +.

[0044] The filters (530, 550) can determine whether a quantum error (E) occurs in a quantum circuit based on the parities measured for the logical qubits input through the quantum circuit. The filters (530, 550) can include a first filter (530) and a second filter (550). The first filter (530) can determine whether a bit error occurs for each of the logical qubits input through the quantum circuit. To this end, the first filter (530) can be divided into a first filtering unit and a second filtering unit. The second filter (550) can determine whether a phase error occurs for each of the logical qubits input through the quantum circuit.

[0045] In the first filter (530), the first filtering unit corresponds to the first qubit line (511) and the second qubit line (513), and can determine whether a bit error occurs for one of the input logical qubits, i.e., the first logical qubit. Specifically, the first filtering unit measures parity from physical qubits for each of pairs representing bits in the first logical qubit, and thereby can measure the parities of the corresponding pairs in the first logical qubit, respectively. Here, in each of the pairs, if the physical qubits are in the same state, the parity will be 0, and if the physical qubits are in different states, the parity will be 1. Therefore, the first filtering unit can determine whether a bit error occurs for the first logical qubit from the sum of the parities. To this end, the first filtering unit includes an additional qubit line (531), two CNOT gates (533, 534) applied to the additional qubit line (531), and a measurement unit (535), wherein the measurement unit (535) can substantially obtain the sum of the parities. Additionally, the first filtering unit may further include an additional CNOT gate (537) applied to the second qubit line (513) after the CNOT gates (533, 534). If the sum of the parities is 0, the first filtering unit may determine that there is no bit error in the first logical qubit. In this case, the quantum circuit may not be removed. If the sum of the parities is 1, the first filtering unit may determine that there is a bit error in the first logical qubit. In this case, the quantum circuit may be removed.

[0046] Similarly, in the first filter (530), the second filtering unit corresponds to the third qubit line (515) and the fourth qubit line (517), and can determine whether a bit error occurs for another one of the input logical qubits, i.e., the second logical qubit. Specifically, the second filtering unit measures parity from the physical qubits for each of the pairs representing bits in the second logical qubit, thereby measuring the parities of the corresponding pairs in the second logical qubit, respectively. Here, in each of the pairs, if the physical qubits are in the same states, the parity will be 0, and if the physical qubits are in different states, the parity will be 1. Therefore, the first filtering unit can determine whether a bit error occurs for the second logical qubit from the sum of the parities. To this end, the second filtering unit includes an additional qubit line (531), two CNOT gates (533, 534) applied to the additional qubit line (531), and a measurement unit (535), wherein the measurement unit (535) can substantially obtain the sum of the parities. Additionally, the second filtering unit may further include an additional CNOT gate (547) applied to the fourth qubit line (517) after the CNOT gates (543, 544). If the sum of the parities is 0, the second filtering unit may determine that there is no bit error in the second logical qubit. In this case, the quantum circuit may not be removed. If the sum of the parities is 1, the second filtering unit may determine that there is a bit error in the second logical qubit. In this case, the quantum circuit may be removed.

[0047] The second filter (550) corresponds to the first qubit line (511) and the third qubit line (515), and measures parity from physical qubits representing phases for each of the input logical qubits, thereby measuring the parities of the input logical qubits, respectively. Here, if the physical qubits are in the same states, the parity is 0, and if the physical qubits are in different states, the parity will be 1. Therefore, the filter (350) can determine whether a phase error occurs in a quantum circuit from the sum of the parities. To this end, the second filter (350) includes two H gates (551, 552), an additional qubit line (553), and two CNOT gates (555, 556) applied to the additional qubit line (553) after the H gates (551, 552), and a measurement unit (557), wherein the measurement unit (557) can substantially obtain the sum of the parities. If the sum of the parities is 0, the second filter (550) can determine that there is no phase error in the input logical qubits, and can determine that no phase error has occurred in the quantum circuit. In this case, the quantum circuit may not be removed. If the sum of the parities is 1, the second filter (550) can determine that there is a phase error in one of the input logical qubits, and can determine that a phase error has occurred in the quantum circuit. In this case, the quantum circuit may be removed.

[0048] In this way, if the first filter (530) determines that there is a bit error in one of the input logical qubits, the quantum circuit can be removed without the second filter (550) determining whether there is a phase error in the input logical qubits. Here, since the Y error is the product of the bit error (i.e., X error) and the phase error (i.e., Z error), if there is a Y error in the quantum circuit, the quantum circuit can also be removed by the first filter (530). On the other hand, if the first filter (530) determines that there is no bit error in the input logical qubits, the second filter (550) can determine whether there is a phase error in the input logical qubits. And, if the second filter (550) determines that there is a phase error in one of the input logical qubits, the quantum circuit can be removed. Through this, if it is determined that there is no quantum error (E) in the logical qubits input to both the first filter (530) and the second filter (550), the quantum circuit may not be removed.

[0049] FIG. 6 is a diagram illustrating a quantum error filtering method of a computer device (100) according to various embodiments.

[0050] Referring to FIG. 6, the computer device (100) can prepare a quantum state at step 610. The processor (150) can prepare a quantum state composed of 0 qubits and 1 qubits. The processor (150) includes a quantum error filtering device (200, 300, 500), and the quantum error filtering device (200, 300, 500) can include an encoder (220, 320, 520) and a filter (230, 350, 530, 550).

[0051] Next, the computer device (100) can encode the quantum state in step 620 to output a plurality of logical qubits, each of which is implemented with a plurality of physical qubits, to a quantum circuit based on a quantum error filtering code. The quantum error filtering code can include a 2-qubit quantum error filtering code and a 4-qubit quantum error filtering code. According to the first embodiment, the 2-qubit quantum error filtering code can be defined with two logical qubits as in [Mathematical Formula 1] above. Therefore, the encoder (220) of the quantum error filtering device (200) outputs two logical qubits based on the 2-qubit quantum error filtering code to the quantum circuit, and each of the logical qubits can be implemented with two physical qubits of the same bits. According to the second embodiment, the 2-qubit quantum error filtering code can be defined with two logical qubits as in [Mathematical Formula 2] above. Accordingly, the encoder (320) of the quantum error filtering device (300) outputs two logical qubits based on the 2-qubit quantum error filtering code to the quantum circuit, and each of the logical qubits can be implemented with two physical qubits of the same phases. According to the third embodiment, the 4-qubit quantum error filtering code can be defined with two logical qubits as in [Mathematical Formula 3] above. Accordingly, the encoder (520) of the quantum error filtering device (500) outputs two logical qubits based on the 4-qubit quantum error filtering code to the quantum circuit, and each of the logical qubits can be implemented with a combination of a plurality of pairs, each of which is formed by two physical qubits of the same states.

[0052] At this time, a quantum error (E) may occur on the quantum circuit. That is, at least one of a bit error or a quantum error may occur between the encoder (220, 320, 520) and the filter (230, 350, 530, 550). In this case, at least one physical qubit among the logical qubits output from the encoder (220, 320, 520) may change from the same states to different states. For example, one of the physical qubits may change from 0 to 1, or from 1 to 0, or one of the physical qubits may change from + to -, or from - to +.

[0053] Next, the computer device (100) can measure parities for the logical qubits input through the quantum circuit at step 630. According to the first embodiment, the filter (230) measures the parity from the physical qubits for each of the input logical qubits, thereby measuring the parities of the input logical qubits, respectively. Here, if the physical qubits are in the same state, the parity will be 0, and if the physical qubits are in different states, the parity will be 1. According to the second embodiment, the filter (350) measures the parity from the physical qubits for each of the input logical qubits, thereby measuring the parities of the input logical qubits, respectively. Here, if the physical qubits are in the same state, the parity will be 0, and if the physical qubits are in different states, the parity will be 1. According to a third embodiment, the first filter (530) measures parity from physical qubits for each of pairs representing bits in each of the input logical qubits, thereby measuring the parities of the corresponding pairs in each of the logical qubits, respectively. Meanwhile, according to the third embodiment, the second filter (550) measures parity from physical qubits representing phases in each of the input logical qubits, thereby measuring the parities of the input logical qubits, respectively.

[0054] Next, the computer device (100) can detect a quantum error (E) in one of the input logical qubits based on the parities in step 640. According to the first embodiment, the filter (230) can determine whether a bit error has occurred in the quantum circuit from the sum of the parities. If the sum of the parities is 0, the filter (230) can determine that there is no bit error in the input logical qubits, and can determine that a quantum error (E) has not occurred in the quantum circuit. If the sum of the parities is 1, the filter (230) can determine that there is a quantum error (E) in one of the input logical qubits, and can determine that a quantum error (E) has occurred in the quantum circuit. According to the second embodiment, the filter (350) can determine whether a quantum error (E) has occurred in the quantum circuit from the sum of the parities. If the sum of the parities is 0, the filter (350) can determine that there is no quantum error (E) in the input logical qubits, and can determine that no quantum error (E) has occurred in the quantum circuit. If the sum of the parities is 1, the filter (350) can determine that there is a quantum error (E) in one of the input logical qubits, and can determine that a quantum error (E) has occurred in the quantum circuit. According to the third embodiment, the first filter (530) can determine whether a bit error has occurred in the quantum circuit from the sum of the parities. Meanwhile, according to the third embodiment, the second filter (550) can determine whether a phase error has occurred in the quantum circuit from the sum of the parities.

[0055] In this way, if the filter (230, 530) determines that there is a bit error in one of the input logical qubits, the quantum circuit can be removed. Here, since the Y error is the product of the bit error (i.e., X error) and the phase error (i.e., Z error), if there is a Y error in the quantum circuit, the quantum circuit can also be removed by the filter (230, 530). On the other hand, if the filter (350, 550) determines that there is a phase error in one of the input logical qubits, the quantum circuit can be removed. According to the first embodiment, if the filter (230) determines that there is no bit error in the input logical qubits, the quantum circuit may not be removed. According to the second embodiment, if the filter (350) determines that there is no phase error in the input logical qubits, the quantum circuit may not be removed. According to the third embodiment, if it is determined that there is no quantum error (E) in the logical qubits input to both the first filter (530) and the second filter (550), the quantum circuit may not be removed.

[0056] According to the present disclosure, quantum errors in quantum circuits can be detected more efficiently using a quantum error filtering code. This allows for the design of quantum circuits free of quantum errors, eliminating quantum circuits with quantum errors, for implementing quantum computers. This allows for the collection of only results free of quantum errors from quantum computers, thereby amplifying the accuracy of quantum computing calculation results. This technology could also be applied to cloud quantum computing.

[0057]

[0058] In summary, the present disclosure provides a quantum error filtering method and device using a quantum error filtering code.

[0059] A quantum error filtering device (200, 300, 500) of the present disclosure may include an encoder (220, 320, 520) that outputs a plurality of logical qubits, each implemented with a plurality of physical qubits, to a quantum circuit based on a predefined quantum error filtering code, and a filter (230, 350, 530, 550) that is configured to detect a quantum error (E) of one of the input logical qubits based on parities measured from the physical qubits for the logical qubits input through the quantum circuit.

[0060] According to some embodiments, the quantum error filtering code comprises a two-qubit quantum error filtering code, and the encoder (220, 320) can be configured to output two logical qubits, each implemented with two physical qubits of identical states, based on the two-qubit quantum error filtering code.

[0061] According to some embodiments, when a quantum error (E) occurs between the encoder (220, 320) and the filter (230, 350), at least one physical qubit among the output logical qubits may change from the same states to different states.

[0062] According to some embodiments, the states represent either bits or phases, and the quantum error (E) can be either a bit error due to physical qubits changing from identical bits to different bits, or a phase error due to physical qubits changing from identical phases to different phases.

[0063] According to some embodiments, the filter (230, 350) may be configured to determine that there is no quantum error (E) in the input logical qubits if the sum of the parities for the input logical qubits is 0, and to determine that there is a quantum error (E) in one of the input logical qubits if the sum of the parities for the input logical qubits is 1.

[0064] According to the first embodiment, a two-qubit quantum error filtering code can be defined with two logical qubits as in [Mathematical Formula 1] above.

[0065] According to the second embodiment, a two-qubit quantum error filtering code can be defined with two logical qubits as in [Mathematical Formula 2] above.

[0066] In another embodiment, the quantum error filtering code comprises a 4-qubit quantum error filtering code, and the encoder (520) can be configured to output two logical qubits each implemented as a combination of a plurality of pairs, each pair consisting of two physical qubits in the same states, based on the 4-qubit quantum error filtering code.

[0067] In another embodiment, if an error occurs between the encoder (520) and the filters (530, 550), at least one of the pairs of physical qubits in at least one of the output logical qubits may change from the same states to different states.

[0068] According to other embodiments, the states of each of the pairs of physical qubits represent either bits or phases, the combination represents a combination of bits and phases, and the quantum error (E) may include bit errors due to the physical qubits changing from identical bits to different bits and phase errors due to the physical qubits changing from identical phases to different phases.

[0069] According to other embodiments, the filters (530, 550) may include a first filter (530) configured to detect a bit error for each of the input logical qubits, and a second filter (550) configured to detect a phase error for one of the input logical qubits.

[0070] According to other embodiments, a 4-qubit quantum error filtering code can be defined with two logical qubits as in [Mathematical Formula 3] above.

[0071] The quantum error filtering method of the computer device (100) of the present disclosure may include a step (step 620) of outputting a plurality of logical qubits, each implemented as a plurality of physical qubits, to a quantum circuit based on a predefined quantum error filtering code, and a step (steps 630 and 640) of detecting a quantum error (E) of one of the input logical qubits based on parities measured from the physical qubits for the logical qubits input through the quantum circuit.

[0072] According to some embodiments, the quantum error filtering code comprises a two-qubit quantum error filtering code, and the step of outputting to a quantum circuit (step 620) may include a step of outputting two logical qubits each implemented with two physical qubits of identical states based on the two-qubit quantum error filtering code.

[0073] According to some embodiments, when a quantum error (E) occurs in a quantum circuit, at least one physical qubit among the output logical qubits may change from the same states to different states.

[0074] According to some embodiments, the states represent either bits or phases, and the quantum error (E) can be either a bit error due to physical qubits changing from identical bits to different bits, or a phase error due to physical qubits changing from identical phases to different phases.

[0075] According to some embodiments, the step of detecting a quantum error (E) (steps 630 and 640) may include the step of determining that there is no quantum error (E) in the input logical qubits if the sum of the parities for the input logical qubits is 0, and the step of determining that there is a quantum error (E) in the input logical qubits if the sum of the parities for the input logical qubits is 1.

[0076] In another embodiment, the quantum error filtering code comprises a 4-qubit quantum error filtering code, and the step of outputting to a quantum circuit (step 620) may include a step of outputting two logical qubits each implemented as a combination of a plurality of pairs, each of which is composed of two physical qubits in the same states, based on the 4-qubit quantum error filtering code.

[0077] In another embodiment, when an error occurs in a quantum circuit, at least one physical qubit among the pairs of logical qubits outputted may change from the same states to different states.

[0078] In another embodiment, the states of each of the physical qubits of the pairs represent either bits or phases, the combination represents a combination of bits and phases, and the quantum error (E) may include bit errors due to the physical qubits changing from identical bits to different bits and phase errors due to the physical qubits changing from identical phases to different phases.

[0079] In another embodiment, the step of detecting a quantum error (E) (steps 630 and 640) may include the step of detecting a bit error for each of the input logical qubits, and the step of detecting a phase error for one of the input logical qubits.

[0080] The devices described above may be implemented as hardware components, software components, and / or a combination of hardware components and software components. For example, the devices and components described in the embodiments may be implemented using one or more general-purpose computers or special-purpose computers, such as a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a programmable logic unit (PLU), a microprocessor, or any other device capable of executing instructions and responding to them. The processing device may execute an operating system (OS) and one or more software applications running on the operating system. The processing device may also access, store, manipulate, process, and generate data in response to the execution of the software. For ease of understanding, the processing device is sometimes described as being used alone; however, one of ordinary skill in the art will recognize that the processing device may include multiple processing elements and / or multiple types of processing elements. For example, a processing unit may include multiple processors, or a processor and a controller. Other processing configurations, such as parallel processors, are also possible.

[0081] Software may include a computer program, code, instructions, or a combination of one or more of these, which may configure a processing device to perform a desired operation or may, independently or collectively, command the processing device. The software and / or data may be embodied in any type of machine, component, physical device, computer storage medium, or device for interpretation by the processing device or for providing instructions or data to the processing device. The software may be distributed over networked computer systems and stored or executed in a distributed manner. The software and data may be stored on one or more computer-readable recording media.

[0082] Methods according to various embodiments may be implemented in the form of program commands that can be executed through various computer means and recorded on a computer-readable medium. In this case, the medium may be one that continuously stores a computer-executable program or one that temporarily stores it for execution or download. In addition, the medium may be various recording or storage means in the form of a single or multiple hardware combinations, and is not limited to a medium directly connected to a computer system, but may also be distributed over a network. Examples of the medium may include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical recording media such as CD-ROMs and DVDs, magneto-optical media such as floptical disks, and those configured to store program commands, including ROM, RAM, and flash memory. In addition, examples of other media may include recording or storage media managed by app stores that distribute applications, sites that supply or distribute various software, servers, etc.

[0083] The various embodiments of this document and the terminology used herein are not intended to limit the technology described in this document to a specific embodiment, but should be understood to include various modifications, equivalents, and / or substitutes of the embodiment. In connection with the description of the drawings, similar reference numerals may be used for similar components. The singular expressions may include plural expressions unless the context clearly indicates otherwise. In this document, expressions such as "A or B", "at least one of A and / or B", "A, B, or C", or "at least one of A, B, and / or C" may include all possible combinations of the items listed together. Expressions such as "first", "second", "first", or "second" may modify the corresponding components regardless of order or importance, and are only used to distinguish one component from another, but do not limit the corresponding components. When it is said that a component (e.g., a first component) is “(functionally or communicatively) connected” or “connected” to another component (e.g., a second component), said component may be directly connected to said other component, or may be connected via another component (e.g., a third component).

[0084] According to various embodiments, each component (e.g., a module or a program) of the described components may include one or more entities. According to various embodiments, one or more components or steps of the aforementioned components may be omitted, or one or more other components or steps may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to integration. According to various embodiments, the steps performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the steps may be executed in a different order, omitted, or one or more other steps may be added.

Claims

1. In a quantum error filtering device, An encoder that outputs a plurality of logical qubits, each implemented as a plurality of physical qubits, to a quantum circuit based on a predefined quantum error filtering code; and A filter configured to detect a quantum error of one of the input logical qubits based on parities measured from the physical qubits for the logical qubits input through the quantum circuit. including, Quantum error filtering device.

2. In paragraph 1, The above quantum error filtering code includes a 2-qubit quantum error filtering code, The above encoder, configured to output two logical qubits each implemented with two physical qubits of the same states based on the above 2-qubit quantum error filtering code, Quantum error filtering device.

3. In paragraph 2, When a quantum error occurs between the encoder and the filter, at least one of the physical qubits among the output logical qubits changes from the same states to different states. Quantum error filtering device.

4. In paragraph 2, The above states represent either bits or phases, The quantum error is either a bit error due to the physical qubits changing from identical bits to different bits or a phase error due to the physical qubits changing from identical phases to different phases. Quantum error filtering device.

5. In paragraph 2, The above filter is, If the sum of the parities for the input logical qubits is 0, it is determined that there is no quantum error in the input logical qubits, If the sum of the parities of the input logical qubits is 1, it is determined that there is a quantum error in one of the input logical qubits. Quantum error filtering device.

6. In paragraph 2, The above 2-qubit quantum error filtering code is, It is defined by two logical qubits as shown in the following mathematical formula: Here, represents a logical qubit of 0 qubits, represents the logical qubits of 1 qubit, and 0 and 1 represent bits, Quantum error filtering device.

7. In paragraph 2, The above 2-qubit quantum error filtering code is, It is defined by two logical qubits as shown in the following mathematical formula: Here, represents a logical qubit of 0 qubits, represents the logical qubits of 1 qubit, and + and - represent the phases, Quantum error filtering device.

8. In paragraph 1, The above quantum error filtering code includes a 4-qubit quantum error filtering code, The above encoder, It is configured to output two logical qubits, each implemented as a combination of multiple pairs, each of which is composed of two physical qubits of the same states, based on the above 4-qubit quantum error filtering code, Quantum error filtering device.

9. In paragraph 8, If an error occurs between the encoder and the filter, at least one of the pairs of physical qubits among at least one of the output logical qubits changes from the same states to different states. Quantum error filtering device.

10. In paragraph 8, The states of each of the physical qubits of the above pairs represent either bits or phases, The above combination represents a combination of bits and phases, The quantum errors include bit errors due to the physical qubits changing from identical bits to different bits and phase errors due to the physical qubits changing from identical phases to different phases. The above filter is, a first filter configured to detect the bit error for each of the input logical qubits; and A second filter configured to detect the phase error for one of the input logical qubits. including, Quantum error filtering device.

11. In paragraph 8, The above 4-qubit quantum error filtering code is, It is defined by two logical qubits as shown in the following mathematical formula: Here, represents a logical qubit of 0 qubits, represents the logical qubits of 1 qubit, 0 and 1 represent bits, + and - represent phases, Quantum error filtering device.

12. In a quantum error filtering method of a computer device, A step of outputting a plurality of logical qubits, each implemented as a plurality of physical qubits, to a quantum circuit based on a predefined quantum error filtering code; and A step of detecting a quantum error of one of the input logical qubits based on parities measured from the physical qubits for the logical qubits input through the quantum circuit. including, Quantum error filtering method.

13. In paragraph 12, The above quantum error filtering code includes a 2-qubit quantum error filtering code, The step of outputting to the above quantum circuit is: A step of outputting two logical qubits each implemented with two physical qubits of the same states based on the above 2-qubit quantum error filtering code. including, Quantum error filtering method.

14. In paragraph 13, When a quantum error occurs in the quantum circuit, at least one of the physical qubits among the output logical qubits changes from the same states to different states. Quantum error filtering method.

15. In paragraph 13, The above states represent either bits or phases, The quantum error is either a bit error due to the physical qubits changing from identical bits to different bits or a phase error due to the physical qubits changing from identical phases to different phases. Quantum error filtering method.

16. In paragraph 13, The step of detecting the above quantum error is: If the sum of the parities for the input logical qubits is 0, a step of determining that there is no quantum error in the input logical qubits; and A step of determining that there is a quantum error in the input logical qubits if the sum of the parities for the input logical qubits is 1. including, Quantum error filtering method.

17. In paragraph 12, The above quantum error filtering code includes a 4-qubit quantum error filtering code, The step of outputting to the above quantum circuit is: A step of outputting two logical qubits, each implemented as a combination of multiple pairs of two physical qubits of the same states, based on the above 4-qubit quantum error filtering code. including, Quantum error filtering method.

18. In paragraph 17, When an error occurs in the quantum circuit, at least one of the pairs of physical qubits among at least one of the output logical qubits changes from the same states to different states. Quantum error filtering method.

19. In paragraph 17, The states of each of the physical qubits of the above pairs represent either bits or phases, The above combination represents a combination of bits and phases, The quantum errors include bit errors due to the physical qubits changing from identical bits to different bits and phase errors due to the physical qubits changing from identical phases to different phases. The step of detecting the above quantum error is: A step of detecting the bit error for each of the input logical qubits; and A step of detecting the phase error for one of the input logical qubits including, Quantum error filtering method.

20. In a computer program stored in a non-transitory computer-readable recording medium for executing a quantum error filtering method on a computer device, The above quantum error filtering method is, A step of outputting a plurality of logical qubits, each implemented as a plurality of physical qubits, to a quantum circuit based on a predefined quantum error filtering code; and A step of detecting a quantum error of one of the input logical qubits based on parities measured from the physical qubits for the logical qubits input through the quantum circuit. including, Computer program.

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