Quantum device

Abstract

This quantum device has one or more qubits. Each qubit has a first conductor, a second conductor, and a Josephson junction element connected between the first conductor and the second conductor. The capacitance of the qubit relative to the ground potential is 10-30 fF inclusive. The quantum device can be used in, for example, quantum computing.

Description

quantum devices

[0001] The present disclosure relates to quantum devices.

[0002] One type of quantum bit used in quantum computers is known to be a quantum bit equipped with a Josephson junction device.

[0003] Japanese Patent Application Publication No. 2020-61447 Japanese Patent Publication No. 2021-516389 US Patent Application Publication No. 2014 / 0246652 Japanese Patent Application Publication No. 2018-512729

[0004] It is desirable for a quantum bit to respond efficiently to a signal input that controls the quantum bit state. Efficient response of a quantum bit can be achieved by providing a quantum device that can obtain a large internal current in response to a signal input to the quantum bit.

[0005] An object of the present disclosure is to provide a quantum device that can increase the internal current of a quantum bit obtained in response to an input signal.

[0006] According to one aspect of the present disclosure, there is provided a quantum device having one or more quantum bits, the quantum bits including a first conductor, a second conductor, and a Josephson junction element connected between the first conductor and the second conductor, and the capacitance of the quantum bit to ground potential is equal to or greater than 10 fF and equal to or less than 30 fF.

[0007] According to the present disclosure, it is possible to increase the internal current of a quantum bit obtained in response to an input signal.

[0008] FIG. 1 is a circuit diagram showing a model used in the simulation. FIG. 2 is a graph showing the relationship between the capacitance of a capacitor and an internal current. FIG. 3 is a diagram showing a preferred range of the capacitance ratio R of two capacitors with respect to the resonant frequency fr. FIG. 4 is a diagram showing a preferred range of the capacitance ratio R of two capacitors with respect to the critical current Ic of a Josephson junction device. FIG. 5 is a schematic diagram showing a quantum device according to a first embodiment. FIG. 6 is a schematic diagram showing a quantum device according to a second embodiment. FIG. 7 is a schematic diagram showing a quantum device according to a third embodiment. FIG. 8 is a schematic diagram showing a quantum device according to a fourth embodiment. FIG. 9 is a schematic diagram showing an extension portion of a quantum device according to a fifth embodiment. FIG. 10 is a schematic diagram showing an extension portion of a quantum device according to a sixth embodiment. FIG. 11 is a cross-sectional view (part 1) showing an example of the cross-sectional shape of an extension portion and a relay conductor. FIG. 12 is a cross-sectional view (part 2) showing an example of the cross-sectional shape of an extension portion and a relay conductor. FIG. 13 is a schematic diagram showing a quantum device according to a seventh embodiment. Fig. 14 is a schematic diagram showing a quantum device according to the eighth embodiment. Fig. 15 is a schematic diagram showing an extension portion in a quantum device according to the ninth embodiment. Fig. 16 is a schematic diagram showing a quantum device according to the tenth embodiment. Fig. 17 is a schematic diagram showing a quantum device according to the eleventh embodiment. Fig. 18 is a schematic diagram showing a quantum device according to the twelfth embodiment. Fig. 19 is a schematic diagram showing a quantum device according to the thirteenth embodiment.

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In this specification and drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description may be omitted.

[0010] (Basic Principles of the Present Disclosure) First, the basic principles of the present disclosure will be described. Josephson junction devices are known to behave as nonlinear inductors. Therefore, the present inventors considered modeling a quantum bit having a Josephson junction device so that the quantum bit can be handled in a superconducting circuit simulator while treating the Josephson junction device as a nonlinear inductor. In this modeling, the behavior of the quantum bit when an external signal having a resonant frequency is applied to the quantum bit, such as during gate operation, was examined. The signal having the resonant frequency was assumed to be a signal that causes a perturbation while the quantum bit remains in the ground state, rather than transitioning to an excited state. Using such a signal, a model is obtained in which an internal current flows that is smaller than the zero-point oscillation at the ground state, has the resonant frequency, and is zero when averaged over time. For example, when this model is applied to a transmon, a type of gate-type quantum bit, the quantum bit remains at the bottom of the ground state, ensuring that the transmon region is satisfied in the simulation. Furthermore, when a signal with a resonant frequency is applied, the changes that occur in the qubit and in the system coupled to the qubit can be observed as internal currents in the circuit using a superconducting circuit simulator. In this way, by regarding the Josephson junction as a nonlinear inductor and including a capacitor in the qubit equivalent circuit, the qubit can be handled using a superconducting circuit simulator.

[0011] Furthermore, in quantum devices in which two quantum bits are capacitively coupled to each other, inductance exists in the capacitive coupling line. Therefore, the inventors of the present application decided to adopt a model in which, taking into account the inductance of this line, there is a resistance between the end of the line that becomes the open end for capacitive coupling and ground. For example, for transmons, they decided to adopt a model in which a Josephson junction element, a capacitor, and a resistor are connected in parallel. Figure 1 is a circuit diagram showing the model used in the simulation.

[0012] As shown in Fig. 1, this model has a current source 1, a capacitor 2, a Josephson junction device 3, a capacitor 4, a resistor 5, and a capacitor 6. The quantum bit 10 has the Josephson junction device 3, the capacitor 4, and the resistor 5. The Josephson junction device 3 and the capacitor 4 are connected in parallel with each other, and the capacitor 6 is connected between a node 7 of one of the Josephson junction device 3 and the capacitor 4 and ground. The resistor 5 is connected between a node 8 of the other of the Josephson junction device 3 and the capacitor 4 and ground. The current source 1 is connected between a node 9 and ground, and the capacitor 2 is connected between the node 8 and the node 9. The capacitance C6 of the capacitor 6 corresponds to the capacitance Cg between the quantum bit 10 and ground.

[0013] The present inventors performed a simulation using the model shown in FIG. 1 and obtained the results shown in FIG. 2. FIG. 2 is a graph showing the relationship between the capacitance C6 of the capacitor 6 and the internal current Ip. The horizontal axis of FIG. 2 represents the capacitance C6 of the capacitor 6, and the vertical axis represents the internal current Ip. FIG. 2 shows results when the resonant frequency fr is 5 GHz and when it is 8 GHz. In this simulation, the size of the Josephson junction element 3 was constant. Therefore, differences in the resonant frequency fr reflect differences in the capacitance of the capacitor 4. Although there is a difference in the magnitude of the internal current Ip between the resonant frequency fr of 5 GHz and the resonant frequency fr of 8 GHz, the trends in the changes in the internal current Ip are similar. This indicates that the trends in the changes in the internal current Ip are similar even when the capacitance of the capacitor 4 is different. For example, in both cases, the peak of the internal current Ip appears when the capacitance C6 of the capacitor 6 is 18 fF to 20 fF, and a high internal current Ip is obtained when the capacitance C6 of the capacitor 6 is 10 fF or more and 30 fF or less. The range of 10 fF or more and 30 fF or less roughly corresponds to the range of ±3σ when the results shown in FIG. 2 are approximated to a normal distribution.

[0014] Thus, the simulation method newly discovered by the inventors of the present application has revealed that when the capacitance between quantum bit 10 and ground is 10 fF or more and 30 fF or less, a large internal current Ip can be obtained in quantum bit 10. Note that, according to confirmation by the inventors of the present application, in conventional quantum devices, the capacitance between quantum bit and ground is at least 100 fF.

[0015] Furthermore, the preferred range of the ratio R of the capacitance C6 of the capacitor 6 to the capacitance C4 of the capacitor 4, obtained through simulations by the inventors of the present application, is as follows: Fig. 3 is a diagram showing a preferred range of the ratio R with respect to the resonant frequency fr, and Fig. 4 is a diagram showing a preferred range of the ratio R with respect to the critical current Ic of the Josephson junction device 3. The horizontal axis of Fig. 3 represents the resonant frequency fr, and the vertical axis represents the ratio R. The horizontal axis of Fig. 4 represents the critical current Ic, and the vertical axis represents the ratio R. When the capacitance Cg between the quantum bit 10 and ground is 10 fF or more and 20 fF or less, the ratio R is preferably in the range between the two curves in Fig. 3 depending on the resonant frequency fr, and the ratio R is preferably in the range between the two curves in Fig. 4 depending on the critical current Ic.

[0016] First Embodiment First, a first embodiment will be described. The first embodiment relates to a quantum device. Fig. 5 is a schematic diagram showing a quantum device according to the first embodiment.

[0017] As shown in FIG. 5 , the quantum device 100 according to the first embodiment includes a quantum bit 110, a ground conductor 120, and a substrate 130. The quantum bit 110 includes an internal conductor 111, an external conductor 112, and a Josephson junction element 113. The internal conductor 111, the external conductor 112, the Josephson junction element 113, and the ground conductor 120 are provided on a major surface of a substrate 130. In a plan view perpendicular to the major surface of the substrate 130, the external conductor 112 surrounds the internal conductor 111. The internal conductor 111 and the external conductor 112 are electrically insulated from each other. In a plan view perpendicular to the major surface of the substrate 130, the ground conductor 120 is provided outside the external conductor 112 and surrounds the internal conductor 111 and the external conductor 112. The external conductor 112 and the ground conductor 120 are electrically insulated from each other. The Josephson junction element 113 is provided between the internal conductor 111 and the external conductor 112 and is connected between the internal conductor 111 and the external conductor 112. In this embodiment, an electrical control signal is supplied to the internal conductor 111. The internal conductor 111 is an example of a first conductor, and the external conductor 112 is an example of a second conductor.

[0018] The quantum device 100 has a capacitor 151 including an internal conductor 111 and an external conductor 112, and a capacitor 152 including an external conductor 112 and a ground conductor 120. The capacitance of the capacitor 151 corresponds to the capacitance C4 of the capacitor 4 in FIG. 1 , and the capacitance of the capacitor 152 corresponds to the capacitance C6 of the capacitor 6 in FIG. 1 . The capacitance of the quantum bit 110 with respect to ground is 10 fF or more and 30 fF or less. The capacitance of the capacitor 152 may be 10 fF or more and 30 fF or less. The capacitance of the capacitor 152 can be adjusted, for example, by adjusting the facing area between the external conductor 112 and the ground conductor 120 and the distance between the external conductor 112 and the ground conductor 120. The ground conductor 120 has a ground potential.

[0019] In the first embodiment, the capacitance of quantum bit 110 to ground is 10 fF or more and 30 fF or less, so that a large internal current can be obtained in quantum bit 110.

[0020] Second Embodiment Next, a second embodiment will be described. The second embodiment differs from the first embodiment mainly in the configuration of the quantum bits. Fig. 6 is a schematic diagram showing a quantum device according to the second embodiment.

[0021] As shown in FIG. 6 , the quantum device 200 according to the second embodiment includes a quantum bit 210, a ground conductor 220, and a substrate 130. The quantum bit 210 includes a first conductor 211, a second conductor 212, and a Josephson junction element 213. The first conductor 211, the second conductor 212, the Josephson junction element 213, and the ground conductor 220 are provided on the main surface of the substrate 130. In a plan view perpendicular to the main surface of the substrate 130, the first conductor 211 and the second conductor 212 are arranged side by side. In a plan view perpendicular to the main surface of the substrate 130, the ground conductor 220 surrounds the first conductor 211 and the second conductor 212. The first conductor 211, the second conductor 212, and the ground conductor 220 are electrically insulated from one another. The Josephson junction element 213 is provided between the first conductor 211 and the second conductor 212 and is connected between the first conductor 211 and the second conductor 212. In this embodiment, an electrical control signal is supplied to the first conductor 211. The ground conductor 220 has a ground potential.

[0022] The quantum device 200 includes a capacitor 251 including the first conductor 211 and the second conductor 212, a capacitor 252 including the second conductor 212 and the ground conductor 220, and a capacitor 253 including the first conductor 211 and the ground conductor 220. The capacitance of the capacitor 251 corresponds to the capacitance C4 of the capacitor 4 in FIG. 1 , and the combined capacitance of the capacitances of the capacitors 252 and 253 corresponds to the capacitance C6 of the capacitor 6 in FIG. 1 . The capacitance of the quantum bit 210 with respect to ground is 10 fF or more and 30 fF or less. The combined capacitance of the capacitances of the capacitors 252 and 253 may be 10 fF or more and 30 fF or less. The capacitance of the capacitor 252 can be adjusted, for example, by adjusting the facing area between the second conductor 212 and the ground conductor 220 and the distance between the second conductor 212 and the ground conductor 220. The capacitance of the capacitor 253 can be adjusted by, for example, the facing area between the first conductor 211 and the ground conductor 220 and the distance between the first conductor 211 and the ground conductor 220 .

[0023] In the second embodiment, the capacitance of quantum bit 210 to ground is 10 fF or more and 30 fF or less, so that a large internal current can be obtained in quantum bit 210.

[0024] Third Embodiment Next, a third embodiment will be described. The third embodiment differs from the first embodiment mainly in that it includes a plurality of quantum bits. Fig. 7 is a schematic diagram showing a quantum device according to the third embodiment.

[0025] As shown in FIG. 7 , the quantum device 300 according to the third embodiment includes a quantum bit 310, a quantum bit 340, a ground conductor 320, a relay conductor 350, and a substrate 130. The quantum bit 310 includes an internal conductor 311, an external conductor 312, and a Josephson junction element 313. The quantum bit 340 includes an internal conductor 341, an external conductor 342, and a Josephson junction element 343. The internal conductor 311, the external conductor 312, and the Josephson junction element 313 have the same configurations as the internal conductor 311, the external conductor 312, and the Josephson junction element 313, respectively. The internal conductor 341, the external conductor 342, and the Josephson junction element 343 also have the same configurations as the internal conductor 311, the external conductor 312, and the Josephson junction element 313, respectively. The external conductors 312 and 342 are electrically insulated from each other. The ground conductor 320 has a ground potential.

[0026] The relay conductor 350 is provided on the main surface of the substrate 130 between the external conductor 312 and the external conductor 342 and is electrically insulated from the external conductors 312 and 342. The relay conductor 350 faces each of the external conductors 312 and 342 and is capacitively coupled to each of the external conductors 312 and 342. The external conductors 312 and 342 are capacitively coupled to each other via the relay conductor 350. In a plan view perpendicular to the main surface of the substrate 130, the ground conductor 320 is provided outside the external conductors 312 and 342 and surrounds the internal conductors 311, 341, external conductor 312, external conductor 342, and relay conductor 350. In this embodiment, an electrical control signal is supplied to the internal conductors 311 and 341. The internal conductors 311 and 341 are examples of first conductors, and the external conductors 312 and 342 are examples of second conductors.

[0027] Quantum device 300 includes capacitor 351 including inner conductor 311 and outer conductor 312, and capacitor 352 including outer conductor 312 and ground conductor 320. The capacitance of capacitor 351 corresponds to capacitance C4 of capacitor 4 in FIG. 1 , and the capacitance of capacitor 352 corresponds to capacitance C6 of capacitor 6 in FIG. 1 . Quantum device 300 further includes capacitor 361 including inner conductor 341 and outer conductor 342, and capacitor 362 including outer conductor 342 and ground conductor 320. The capacitance of capacitor 361 corresponds to capacitance C4 of capacitor 4 in FIG. 1 , and the capacitance of capacitor 362 corresponds to capacitance C6 of capacitor 6 in FIG. 1 . The capacitance of quantum bit 310 with respect to ground and the capacitance of quantum bit 340 with respect to ground are both 10 fF or more and 30 fF or less. The capacitance of capacitor 352 and capacitor 362 may be 10 fF or more and 30 fF or less. The capacitance of the capacitor 352 can be adjusted, for example, by changing the facing area between the outer conductor 312 and the ground conductor 320 and the distance between the outer conductor 312 and the ground conductor 320. The capacitance of the capacitor 362 can be adjusted, for example, by changing the facing area between the outer conductor 342 and the ground conductor 320 and the distance between the outer conductor 342 and the ground conductor 320.

[0028] In the third embodiment, the capacitance of quantum bit 310 with respect to ground is not less than 10 fF and not more than 30 fF, so that a large internal current can be obtained in quantum bit 310. Furthermore, the capacitance of quantum bit 340 with respect to ground is not less than 10 fF and not more than 30 fF, so that a large internal current can be obtained in quantum bit 340.

[0029] Furthermore, because the capacitance of quantum bit 310 to ground and the capacitance of quantum bit 340 to ground are small, at between 10 fF and 30 fF, it is possible to obtain a distinguishable capacitive coupling between quantum bit 310 and quantum bit 340, even if the capacitance between external conductor 312 and relay conductor 350 and the capacitance between external conductor 342 and relay conductor 350 are small. Therefore, even if quantum bit 310 or 340 is capacitively coupled to another quantum bit, crosstalk can be suppressed.

[0030] Fourth Embodiment Next, a fourth embodiment will be described. The fourth embodiment differs from the third embodiment mainly in the configuration of the capacitive coupling between quantum bits. Fig. 8 is a schematic diagram showing a quantum device according to the fourth embodiment.

[0031] 8 , quantum device 400 according to the fourth embodiment includes quantum bit 310, quantum bit 340, ground conductor 320, and substrate 130. Quantum device 400 does not include relay conductor 350. External conductor 312 has extension 412 extending toward external conductor 342, and external conductor 342 has extension 442 extending toward external conductor 312. Extensions 412 and 442 face each other and are capacitively coupled to each other.

[0032] Other configurations of the fourth embodiment are the same as those of the third embodiment, and the fourth embodiment can also achieve the same effects as those of the third embodiment.

[0033] Fifth Embodiment Next, a fifth embodiment will be described. The fifth embodiment differs from the fourth embodiment mainly in the configuration of the extension portion of the external conductor. Fig. 9 is a schematic diagram showing the extension portion in the quantum device according to the fifth embodiment.

[0034] 9 , in the quantum device 500 according to the fifth embodiment, a plurality of recesses 515 and a plurality of protrusions 516 are alternately formed in the portion of the extension portion 412 facing the extension portion 442, and a plurality of recesses 545 and a plurality of protrusions 546 are alternately formed in the portion of the extension portion 442 facing the extension portion 412. That is, the portion of the extension portion 412 facing the extension portion 442 has a comb-like shape, and the portion of the extension portion 442 facing the extension portion 412 has a comb-like shape. The protrusions 516 fit into the recesses 545, and the protrusions 546 fit into the recesses 515. The recesses 515 are an example of first recesses, and the protrusions 516 are an example of first protrusions. The recesses 545 are an example of second recesses, and the protrusions 546 are an example of second protrusions.

[0035] Other configurations of the fifth embodiment are the same as those of the fourth embodiment. The fifth embodiment can also achieve the same effects as those of the fourth embodiment. Furthermore, in the fifth embodiment, a large opposing area can be obtained between the extension portion 412 and the extension portion 442, and therefore a large capacitance can be obtained between the quantum bit 310 and the quantum bit 340.

[0036] Sixth Embodiment Next, a sixth embodiment will be described. The sixth embodiment differs from the fifth embodiment mainly in the configuration of the capacitive coupling between quantum bits. Fig. 10 is a schematic diagram showing an extension portion in a quantum device according to the sixth embodiment.

[0037] 10 , in the quantum device 600 according to the sixth embodiment, similarly to the fifth embodiment, a plurality of recesses 515 and a plurality of protrusions 516 are formed in the extension portion 412, and a plurality of recesses 545 and a plurality of protrusions 546 are alternately formed in the extension portion 442. The quantum device 600 also includes a relay conductor 650. A plurality of recesses 615 and a plurality of protrusions 616 are alternately formed in a portion of the relay conductor 650 facing the extension portion 442, and a plurality of recesses 645 and a plurality of protrusions 646 are alternately formed in a portion facing the extension portion 412. That is, the portion of the relay conductor 650 facing the extension portion 442 has a comb-like shape, and the portion facing the extension portion 412 has a comb-like shape. The protrusions 516 fit into the recesses 645, the protrusions 646 fit into the recesses 515, the protrusions 546 fit into the recesses 615, and the protrusions 616 fit into the recesses 545. The recess 515 is an example of a fifth recess, and the protrusion 516 is an example of a fifth protrusion. The recess 645 is an example of a sixth recess, and the protrusion 646 is an example of a sixth protrusion. The recess 615 is an example of a seventh recess, and the protrusion 616 is an example of a seventh protrusion. The recess 545 is an example of an eighth recess, and the protrusion 546 is an example of an eighth protrusion.

[0038] Other configurations of the sixth embodiment are the same as those of the fifth embodiment. The sixth embodiment can also achieve the same effects as those of the fifth embodiment.

[0039] Here, an example of the cross-sectional shapes of the extending portion 412, the relay conductor 650, and the extending portion 442 will be described. Figures 11 and 12 are cross-sectional views showing examples of the cross-sectional shapes of the extending portion 412, the relay conductor 650, and the extending portion 442. Figures 11 and 12 correspond to cross-sectional views taken along line XI-XI in Figure 10.

[0040] 11 , the main surface of the substrate 130 has a concave surface 131 continuing to the side surface 412A of the extending portion 412, a concave surface 132 continuing to the side surface 650A of the relay conductor 650, and a concave surface 133 continuing to the side surface 442A of the extending portion 442. In the example shown in FIG. 11 , the side surfaces 412A and 442A and the side surface 650A are inclined so as to move away from each other as they move away from the substrate 130.

[0041] In the example shown in FIG. 12, the side surfaces 412A and 442A and the side surface 650A are inclined so that the farther away from the substrate 130 they are, the closer they become to each other.

[0042] The cross-sectional shapes of the extension 412, the relay conductor 650, and the extension 442 are not limited to these.

[0043] Seventh Embodiment Next, a seventh embodiment will be described. The seventh embodiment differs from the second embodiment mainly in that it includes a plurality of quantum bits. Fig. 13 is a schematic diagram showing a quantum device according to the seventh embodiment.

[0044] 13 , a quantum device 700 according to the seventh embodiment includes a quantum bit 710, a quantum bit 740, a ground conductor 720, a relay conductor 750, and a substrate 130. The quantum bit 710 includes a first conductor 711, a second conductor 712, and a Josephson junction device 713. The quantum bit 740 includes a first conductor 741, a second conductor 742, and a Josephson junction device 743. The first conductor 711, the second conductor 712, and the Josephson junction device 713 have the same configurations as the first conductor 211, the second conductor 212, and the Josephson junction device 213, respectively. The first conductor 741, the second conductor 742, and the Josephson junction device 743 also have the same configurations as the first conductor 211, the second conductor 212, and the Josephson junction device 213, respectively. The first conductor 711, the second conductor 712, the first conductor 741, and the second conductor 742 are electrically insulated from each other. The relay conductor 750 is provided on the main surface of the substrate 130 between the second conductor 712 and the second conductor 742 and is electrically insulated from the second conductors 712 and 742. The relay conductor 750 faces each of the second conductors 712 and 742 and is capacitively coupled to each of the second conductors 712 and 742. The second conductors 712 and 742 are capacitively coupled to each other via the relay conductor 750. In a plan view perpendicular to the main surface of the substrate 130, the ground conductor 720 surrounds the first conductor 711, the second conductor 712, the first conductor 741, the second conductor 742, and the relay conductor 750. In this embodiment, an electrical control signal is supplied to the first conductors 711 and 741. The ground conductor 720 has a ground potential.

[0045] The quantum device 700 includes a capacitor 751 including a first conductor 711 and a second conductor 712, a capacitor 752 including a second conductor 712 and a ground conductor 720, and a capacitor 753 including a first conductor 711 and a ground conductor 720. The capacitance of the capacitor 751 corresponds to the capacitance C4 of the capacitor 4 in FIG. 1 , and the combined capacitance of the capacitances of the capacitors 752 and 753 corresponds to the capacitance C6 of the capacitor 6 in FIG. 1 . The quantum device 700 further includes a capacitor 761 including a first conductor 741 and a second conductor 742, a capacitor 762 including the second conductor 742 and a ground conductor 720, and a capacitor 763 including the first conductor 741 and a ground conductor 720. The capacitance of the capacitor 761 corresponds to the capacitance C4 of the capacitor 4 in FIG. 1 , and the combined capacitance of the capacitances of the capacitors 762 and 763 corresponds to the capacitance C6 of the capacitor 6 in FIG. 1 . The capacitance of quantum bit 710 with respect to ground and the capacitance of quantum bit 740 with respect to ground may be 10 fF or more and 30 fF or less. The combined capacitance of capacitor 752 and capacitor 753 and the combined capacitance of capacitors 762 and 763 may be 10 fF or more and 30 fF or less. The capacitance of capacitor 752 can be adjusted, for example, by adjusting the facing area between second conductor 712 and ground conductor 720 and the distance between second conductor 712 and ground conductor 720. The capacitance of capacitor 753 can be adjusted, for example, by adjusting the facing area between first conductor 711 and ground conductor 720 and the distance between first conductor 711 and ground conductor 720. The capacitance of capacitor 762 can be adjusted, for example, by adjusting the facing area between second conductor 742 and ground conductor 720 and the distance between second conductor 742 and ground conductor 720. The capacitance of the capacitor 763 can be adjusted by, for example, the facing area between the first conductor 741 and the ground conductor 720 and the distance between the first conductor 741 and the ground conductor 720 .

[0046] In the seventh embodiment, the capacitance of quantum bit 710 with respect to ground is not less than 10 fF and not more than 30 fF, so that a large internal current can be obtained in quantum bit 710. Furthermore, the capacitance of quantum bit 740 with respect to ground is not less than 10 fF and not more than 30 fF, so that a large internal current can be obtained in quantum bit 740.

[0047] Furthermore, because the capacitance of qubit 710 to ground and the capacitance of qubit 740 to ground are small, at between 10 fF and 30 fF, even if the capacitance between second conductor 712 and relay conductor 750 and the capacitance between second conductor 742 and relay conductor 750 are small, it is possible to obtain a distinguishable capacitive coupling between qubit 710 and qubit 740. Therefore, even if qubit 710 or 740 is capacitively coupled to another qubit, crosstalk can be suppressed.

[0048] Eighth Embodiment Next, an eighth embodiment will be described. The eighth embodiment differs from the seventh embodiment mainly in the configuration of the ground conductor. Fig. 14 is a schematic diagram showing a quantum device according to the eighth embodiment.

[0049] 14 , a quantum device 800 according to the eighth embodiment has a ground conductor 820 instead of the ground conductor 720. The ground conductor 820 has a proximity portion 821 located between the first conductor 711 and the first conductor 741. The proximity portion 821 faces the first conductors 711 and 741. The ground conductor 820 has a ground potential.

[0050] Other configurations of the eighth embodiment are the same as those of the seventh embodiment. The eighth embodiment can also achieve the same effects as those of the seventh embodiment. Furthermore, in the seventh embodiment, the ground conductor 820 has a proximity portion 821, so that the capacitance of the capacitor 853 between the ground conductor 820 and the first conductor 711 is larger than the capacitance of the capacitor 752, and the capacitance of the capacitor 863 between the ground conductor 820 and the first conductor 741 is larger than the capacitance of the capacitor 762.

[0051] Ninth Embodiment Next, a ninth embodiment will be described. The ninth embodiment differs from the seventh embodiment mainly in the configuration of the capacitive coupling between quantum bits. Fig. 15 is a schematic diagram showing a quantum device according to the ninth embodiment.

[0052] 15 , in the quantum device 900 according to the ninth embodiment, the second conductor 712 has an extending portion 912 extending toward the second conductor 742, and the second conductor 742 has an extending portion 942 extending toward the second conductor 712. The quantum device 900 also has a relay conductor 950. A plurality of recesses 715 and a plurality of protrusions 716 are alternately formed in the portion of the extending portion 912 facing the relay conductor 950, and a plurality of recesses 745 and a plurality of protrusions 746 are alternately formed in the portion of the extending portion 942 facing the relay conductor 950. That is, the portion of the extending portion 912 facing the relay conductor 950 has a comb-like shape, and the portion of the extending portion 942 facing the relay conductor 950 also has a comb-like shape. A plurality of recesses 915 and a plurality of protrusions 916 are alternately formed in a portion of the relay conductor 950 facing the extending portion 942, and a plurality of recesses 945 and a plurality of protrusions 946 are alternately formed in a portion facing the extending portion 912. That is, the portion of the relay conductor 950 facing the extending portion 942 has a comb-like shape, and the portion facing the extending portion 912 has a comb-like shape. The protrusions 716 fit into the recesses 945, the protrusions 946 fit into the recesses 715, the protrusions 746 fit into the recesses 915, and the protrusions 916 fit into the recesses 745. The ground conductor 720 may have a recess 721 that is spaced apart from the relay conductor 950.

[0053] Other configurations of the ninth embodiment are the same as those of the seventh embodiment. The ninth embodiment can also achieve the same effects as those of the seventh embodiment. Furthermore, in the ninth embodiment, a large facing area is obtained between the extension portion 912 and the relay conductor 950, and a large facing area is obtained between the extension portion 942 and the relay conductor 950, so that a large capacitance can be obtained between the quantum bit 910 and the quantum bit 940 via the relay conductor 950.

[0054] Tenth Embodiment Next, a tenth embodiment will be described. The tenth embodiment differs from the ninth embodiment mainly in the configuration of the ground conductor. Fig. 16 is a schematic diagram showing a quantum device according to the tenth embodiment.

[0055] 16 , the quantum device 1000 according to the tenth embodiment has a ground conductor 820 instead of the ground conductor 720. The ground conductor 820 has a proximity portion 821 located between the first conductor 711 and the first conductor 741. The proximity portion 821 faces the first conductors 711 and 741.

[0056] Other configurations of the tenth embodiment are the same as those of the ninth embodiment. According to the tenth embodiment, the same effects as those of the eighth embodiment and the ninth embodiment can be obtained.

[0057] (Eleventh Embodiment) Next, an eleventh embodiment will be described. The eleventh embodiment relates to a quantum device. FIG. 17 is a schematic diagram showing a quantum device according to the eleventh embodiment. In the following description, an XYZ Cartesian coordinate system is used, and when viewed from an arbitrary point, the +Z side may be referred to as the upper side, upper side, or top, and the −Z side may be referred to as the lower side, lower side, or bottom. However, this coordinate system is defined for the purpose of explanation and does not limit the attitude of the quantum device.

[0058] 17 , a quantum device 1100 according to the eleventh embodiment includes a quantum bit 1110, a quantum bit 1140, a ground conductor 1120, a relay conductor 1150, a readout conductor 1191, a readout conductor 1192, and a substrate 1130. The quantum bit 1110 includes an internal conductor 1111, an external conductor 1112, and a Josephson junction device 1113. The quantum bit 1140 includes an internal conductor 1141, an external conductor 1142, and a Josephson junction device 1143. The internal conductor 1111, the internal conductor 1141, the external conductor 1112, the external conductor 1142, the Josephson junction device 1113, the Josephson junction device 1143, the relay conductor 1150, the readout conductor 1191, the readout conductor 1192, and the ground conductor 1120 are provided on a major surface of the substrate 1130. In a plan view perpendicular to the main surface of the substrate 1130, the external conductor 1112 surrounds the internal conductor 1111, and the external conductor 1142 surrounds the internal conductor 1141. The internal conductors 1111 and 1112 are electrically insulated from each other, and the internal conductors 1141 and 1142 are electrically insulated from each other. In a plan view, the internal conductors 1111 and 1141 have shapes that are concave along the X-axis, concave along the Y-axis, and bulge in four directions inclined at 45 degrees from the X-axis and Y-axis. In a plan view, the external conductors 1112 and 1142 have shapes that follow the outer edges of the internal conductors 1111 and 1141, i.e., shapes that are concave along the X-axis, concave along the Y-axis, and bulge in four directions inclined at 45 degrees from the X-axis and Y-axis. The inner conductors 1111 and 1141 are examples of first conductors, and the outer conductors 1112 and 1142 are examples of second conductors. The ground conductor 1120 has a ground potential.

[0059] A relay conductor 1150 is provided between the quantum bit 1110 and the quantum bit 1140. The relay conductor 1150 has a convex portion 1151 that protrudes toward the external conductor 1112 and a convex portion 1152 that protrudes toward the external conductor 1142. The external conductor 1112 of the quantum bit 1110 has a concave portion 1112A that is recessed away from the convex portion 1151, and the external conductor 1142 of the quantum bit 1140 has a concave portion 1142A that is recessed away from the convex portion 1152. The relay conductor 1150 is capacitively coupled to the external conductors 1112 and 1142. The external conductors 1112 and 1142 are capacitively coupled to each other via the relay conductor 1150. The convex portion 1151 is an example of a third convex portion, and the concave portion 1112A is an example of a third concave portion. The convex portion 1152 is an example of a fourth convex portion, and the concave portion 1142A is an example of a fourth concave portion.

[0060] In this embodiment, electrical control signals are supplied to internal conductors 1111 and 1141. Readout conductor 1191 is capacitively coupled to external conductor 1112, and readout conductor 1192 is capacitively coupled to external conductor 1142. The state of quantum bit 1110 is read out to the outside via readout conductor 1191, and the state of quantum bit 1140 is read out to the outside via readout conductor 1192.

[0061] Ground conductor 1120 surrounds qubit 1110, qubit 1140, relay conductor 1150, readout conductor 1191, and readout conductor 1192. Quantum device 1100 may have other qubits capacitively coupled to qubit 1110, may have other qubits capacitively coupled to qubit 1140, and may have relay conductors that capacitively couple these qubits. In this case, these qubits and relay conductors are also surrounded by ground conductor 1120.

[0062] The capacitance of quantum bit 1110 to ground and the capacitance of quantum bit 1140 to ground are 10 fF or more and 30 fF or less. The capacitance of the capacitor including external conductor 1112 and ground conductor 1120 and the capacitance of the capacitor including external conductor 1142 and ground conductor 1120 may be 10 fF or more and 30 fF or less.

[0063] According to the eleventh embodiment, a large internal current can be obtained in quantum bits 1110 and 1140. Furthermore, even if quantum bit 1110 or 1140 is further capacitively coupled to another quantum bit, crosstalk can be suppressed.

[0064] Twelfth Embodiment Next, a twelfth embodiment will be described. The twelfth embodiment differs from the eleventh embodiment mainly in the configuration of the capacitive coupling between quantum bits. Fig. 18 is a schematic diagram showing a quantum device according to the twelfth embodiment.

[0065] 18 , in the quantum device 1200 according to the twelfth embodiment, in a plan view, the internal conductors 1111 and 1141 protrude along the X-axis, protrude along the Y-axis, and have shapes concave in four directions inclined at 45 degrees from the X-axis and the Y-axis. In a plan view, the external conductors 1112 and 1142 have shapes that follow the outer edges of the internal conductors 1111 and 1141. That is, in a plan view, the external conductor 1112 has two protruding portions 1112B protruding along the X-axis and two protruding portions 1112C protruding along the Y-axis, and the external conductor 1142 has two protruding portions 1142B protruding along the X-axis and two protruding portions 1142C protruding along the Y-axis.

[0066] The relay conductor 1150 has a convex portion 1153 located on the +Y side of the +X side convex portion 1112B and capacitively coupled to the +X side convex portion 1112B, and a convex portion 1154 located on the -Y side of the -X side convex portion 1142B and capacitively coupled to the -X side convex portion 1142B.

[0067] Other configurations of the twelfth embodiment are the same as those of the eleventh embodiment. The twelfth embodiment can also achieve the same effects as the eleventh embodiment.

[0068] (Thirteenth Embodiment) Next, a thirteenth embodiment will be described. The thirteenth embodiment differs from the twelfth embodiment mainly in the configuration of the capacitive coupling between quantum bits. Fig. 19 is a schematic diagram showing a quantum device according to the thirteenth embodiment.

[0069] 19 , the quantum device 1300 according to the thirteenth embodiment does not have a relay conductor 1150. The external conductor 1112 has an extension 1312 extending toward the external conductor 1142, and the external conductor 1142 has an extension 1342 extending toward the external conductor 1112. The extension 1312 has a convex portion 1312A protruding toward the external conductor 1142, and the extension 1342 has a concave portion 1342A recessed away from the external conductor 1112. The extensions 1312 and 1342 face each other and are capacitively coupled to each other.

[0070] Other configurations of the thirteenth embodiment are the same as those of the twelfth embodiment. The thirteenth embodiment can also achieve the same effects as those of the twelfth embodiment.

[0071] Here, an example of a method for measuring the capacitance of a quantum bit with respect to ground potential according to the present disclosure will be described. In one example, the probes of a capacitance meter are placed on the external conductor and the ground conductor, and a high-frequency signal of 0.2 GHz to 30 GHz is input using a vector network analyzer. Then, S-parameters are measured from an admittance chart. Then, the curve obtained by measuring the S-parameters is fitted to the admittance equation of the system. In this way, the capacitance of the quantum bit with respect to ground potential can be measured.

[0072] In another example, the capacitance of the quantum bit with respect to the ground potential may be calculated from the layout of the first conductor, the second conductor, and the ground conductor. The method for measuring the capacitance of the quantum bit with respect to the ground potential is not limited to these methods.

[0073] Quantum devices according to the present disclosure can be used, for example, in quantum computing.

[0074] Although the preferred embodiments have been described in detail above, the present disclosure is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims.

[0075] 100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300: quantum device 110, 210, 310, 340, 710, 740, 910, 940, 1110, 1140: quantum bit 111, 311, 341, 1111, 1141: internal conductor 112, 312, 342, 1112, 1142: external conductor 113, 213, 313, 343, 713, 743, 1113, 1143: Josephson junction element 120, 220, 320, 720, 820, 1120: ground conductor 130, 1130: substrate 131, 132, 133: concave surfaces 151, 152, 251, 252, 253, 351, 352, 361, 362, 751, 752, 753, 761, 762, 763, 853, 863: capacitors 211, 711, 741: first conductors 212, 712, 742: second conductors 350, 650, 750, 950, 1150: relay conductors 412A, 442A, 650A: side surfaces 515, 545, 615, 645, 715, 745, 915, 945, 1112A, 1142A, 1342A: recesses 516, 546, 616, 646, 716, 746, 916, 946, 1112B, 1112C, 1142B, 1142C, 1151, 1152, 1153, 1154, 1312A: convex portions

Claims

1. A quantum device having one or more quantum bits, the quantum bits having a first conductor, a second conductor, and a Josephson junction element connected between the first conductor and the second conductor, and a capacitance of the quantum bit to ground potential of 10 fF or more and 30 fF or less.

2. The quantum device according to claim 1, wherein, in a plan view, the second conductor surrounds the first conductor, and the capacitance of the second conductor with respect to the ground potential is equal to or greater than 10 fF and equal to or less than 30 fF.

3. The quantum device according to claim 2, further comprising a ground conductor having the ground potential and disposed outside the second conductor in a plan view.

4. The quantum device of claim 1, wherein the capacitance of the quantum bit to the ground potential is a combined capacitance of the capacitance of the first conductor to the ground potential and the capacitance of the second conductor to the ground potential.

5. A quantum device according to any one of claims 1 to 4, wherein the one or more quantum bits include a first quantum bit and a second quantum bit, and the second conductor of the first quantum bit and the second conductor of the second quantum bit are capacitively coupled.

6. The quantum device of claim 5, wherein the second conductor of the first quantum bit and the second conductor of the second quantum bit face each other.

7. The quantum device according to claim 6, wherein, in a plan view, the second conductor of the first quantum bit has a convex portion that protrudes toward the second conductor of the second quantum bit, and the second conductor of the second quantum bit has a concave portion that is recessed away from the second conductor of the first quantum bit.

8. The quantum device of claim 6, wherein, in a plan view, a plurality of first recesses and a plurality of first protrusions are alternately formed in a portion of the second conductor of the first quantum bit that faces the second conductor of the second quantum bit, a plurality of second recesses and a plurality of second protrusions are alternately formed in a portion of the second conductor of the second quantum bit that faces the second conductor of the first quantum bit, and the first protrusions extend into the second recesses and the second protrusions extend into the first recesses.

9. The quantum device of claim 5, further comprising a relay conductor that faces the second conductor of the first quantum bit and faces the second conductor of the second quantum bit.

10. The quantum device of claim 9, wherein, in a plan view, one of the second conductor or the relay conductor of the first quantum bit has a third convex portion protruding toward the other of the second conductor or the relay conductor of the first quantum bit, the other of the second conductor or the relay conductor of the first quantum bit has a third concave portion recessed away from the second conductor or the one of the relay conductor of the first quantum bit, the second conductor or the one of the relay conductor of the second quantum bit has a fourth convex portion protruding toward the other of the second conductor or the relay conductor of the second quantum bit, and the other of the second conductor or the relay conductor of the second quantum bit has a fourth concave portion recessed away from the second conductor or the one of the relay conductor of the second quantum bit.

11. The quantum device of claim 9, wherein, in a plan view, a plurality of fifth recesses and a plurality of fifth protrusions are alternately formed in a portion of the second conductor of the first quantum bit that faces the relay conductor, a plurality of sixth recesses and a plurality of sixth protrusions are alternately formed in a portion of the relay conductor that faces the second conductor of the first quantum bit, a plurality of seventh recesses and a plurality of seventh protrusions are alternately formed in a portion of the relay conductor that faces the second conductor of the second quantum bit, a plurality of eighth recesses and a plurality of eighth protrusions are alternately formed in a portion of the second conductor of the second quantum bit that faces the relay conductor, and the fifth protrusions extend into the sixth recess, the sixth protrusions extend into the fifth recess, the seventh protrusions extend into the eighth recess, and the eighth protrusions extend into the seventh recess.

12. The quantum device described in claim 11, wherein the second conductor of the first quantum bit, the second conductor of the second quantum bit, and the relay conductor are formed on a main surface of a substrate, and the main surface has a concave surface continuing into a side surface of the second conductor of the first quantum bit, a concave surface continuing into a side surface of the second conductor of the second quantum bit, and a concave surface continuing into a side surface of the relay conductor.

13. The quantum device described in claim 11, wherein the second conductor of the first quantum bit, the second conductor of the second quantum bit, and the relay conductor are formed on a main surface of a substrate, a side of the second conductor of the first quantum bit facing the relay conductor and a side of the relay conductor facing the second conductor are inclined so as to move away from each other with increasing distance from the substrate, and a side of the second conductor of the second quantum bit facing the relay conductor and a side of the relay conductor facing the second conductor are inclined so as to move away from each other with increasing distance from the substrate.

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