Data processing method for privacy protection and computing device

Abstract

A data processing method for privacy protection and a computing device. The computing device comprises a first trusted execution environment (TEE) and a second TEE. The computing device is provided with a shared memory outside the TEEs, the shared memory comprises a first address corresponding to the first TEE, and the first TEE and the second TEE pre-store the first address. The method comprises: a first TEE processes acquired first data to obtain intermediate data, and stores the intermediate data into a first address; and a second TEE reads the intermediate data from the first address and performs data processing on the intermediate data.

Description

Data processing method and computing device for privacy protection

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on August 31, 2023, with application number 202311119609.6 and application name “A data processing method and computing device for privacy protection”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The embodiments of this specification belong to the field of computer technology, and more particularly, to a data processing method and computing device for privacy protection. Background Art

[0003] A Trusted Execution Environment (TEE) is a hardware-secured, trusted execution environment within a computing device. A TEE provides an isolated execution environment, ensuring that code and data running within the TEE are not interfered with by the regular operating system. This ensures the security, confidentiality, and integrity of the code and data stored within the TEE.

[0004] Summary of the Invention

[0005] The present invention aims to provide a data processing method for privacy protection for data transmission between TEEs.

[0006] According to a first aspect of the present disclosure, a data processing method for privacy protection is provided. The method is performed by a computing device, the computing device including a first trusted execution environment (TEE) and a second TEE. The computing device is provided with a shared memory outside the TEE, the shared memory including a first address corresponding to the first TEE, and the first address is pre-stored in the first TEE and the second TEE. The method includes:

[0007] The first TEE processes the acquired first data to obtain intermediate data; and stores the intermediate data in the first address;

[0008] The second TEE reads the intermediate data from the first address and performs data processing on the intermediate data.

[0009] A second aspect of this specification provides a computing device for privacy protection, the computing device including a first trusted execution environment (TEE) and a second TEE. The computing device is provided with a shared memory outside the TEE, the shared memory including a first address corresponding to the first TEE, the first address being pre-stored in the first TEE and the second TEE.

[0010] The first TEE is used to process the acquired first data to obtain intermediate data; and store the intermediate data in the first address;

[0011] The second TEE is used to read the intermediate data from the first address and perform data processing on the intermediate data.

[0012] A third aspect of this specification provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed in a computer, the computer is caused to execute the method described in the first aspect.

[0013] A fourth aspect of this specification provides a computing device, including a memory and a processor, wherein the memory stores executable code, and when the processor executes the executable code, the method described in the first aspect is implemented.

[0014] In the data processing method provided in the embodiments of this specification, shared memory is created in an untrusted area and a storage address (slot) is allocated to a TEE in the shared memory. This allows the TEE to transfer data to other TEEs through the allocated slot. In this process, each TEE executes in its own context, eliminating the need for context switching and multiple data copies. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of this specification, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0016] FIG1 is an architectural diagram of a computing device according to an embodiment of the present specification;

[0017] FIG2 is a flow chart of a data processing method executed by an application in an embodiment of this specification;

[0018] FIG3 is a flow chart of a method for performing key negotiation between a user equipment and a TEE according to an embodiment of this specification;

[0019] FIG4 is a flow chart of a data processing method for privacy protection in an embodiment of this specification;

[0020] FIG5 is an architecture diagram of a computing device for privacy protection provided in an embodiment of this specification. DETAILED DESCRIPTION

[0021] To help those skilled in the art better understand the technical solutions in this specification, the following will provide a clear and complete description of the technical solutions in the embodiments of this specification, in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of this specification, not all of them. All other embodiments derived by those skilled in the art based on the embodiments in this specification without creative effort shall fall within the scope of protection of this specification.

[0022] A TEE is a trusted execution environment (TEE) based on a secure extension of the CPU hardware, completely isolated from the outside world. Currently, there are various TEE solutions, including the software-based TPM (Trusted Platform Module) and hardware-based SGX (Software Guard Extensions), ARM Trustzone, and AMD PSP (Platform Security Processor). The TEE acts as a black box, preventing even the operating system from intruding on the code and data executed within it. These operations can only be performed through predefined interfaces within the code. Therefore, TEE technology enables trusted computing while protecting private data.

[0023] SGX (Software Guard Extension) is an example of TEE technology. Based on SGX technology, computing devices can create enclaves (enclaves or enclaves) as TEEs for data processing. Using new processor instructions in the CPU, computing devices can allocate a memory area called the EPC (Enclave Page Cache) to host the enclave. The memory area corresponding to the EPC is encrypted by the CPU's internal Memory Encryption Engine (MEE). The contents of this memory area (code and data within the enclave) can only be decrypted within the CPU core, and the encryption and decryption keys are generated and stored in the CPU only when the EPC is started. As can be seen, the enclave's security boundary only includes the enclave itself and the CPU. Neither privileged nor unprivileged software can access the enclave. Even operating system administrators and virtual machine monitors (VMMs, also known as hypervisors) cannot affect the code and data within the enclave, resulting in extremely high security. Under the premise of the above security guarantees, the CPU can process data in the enclave with extremely high computing efficiency, thus taking into account both data security and computing efficiency. In addition, data entering and leaving the TEE is usually encrypted to ensure data privacy.

[0024] In related technologies, if two enclaves of the same process need to communicate, they are respectively denoted as EnclaveA and EnclaveB. The general approach includes the following steps:

[0025] 1. EnclaveA calls the ocall function to copy the data to the untrusted area;

[0026] 2. The program in the non-trusted area receives the data and then calls the ecall function of EnclaveB to copy the data to the trusted area where the Enclave is located.

[0027] The above process involves the ecall function and the ocall function. When EncalveA executes the ocall function, it needs to perform a context switch on the thread. When the thread in the untrusted zone executes the ecall function, it also needs to perform a context switch. The process also includes two data copying processes, each of which consumes a lot of computing and storage resources, resulting in poor performance.

[0028] The embodiments of this specification take advantage of the fact that the trusted zone can directly access the untrusted zone. They create shared memory in the untrusted zone and assign storage addresses (also known as slots) to the TEEs in this shared memory. This allows the TEE to transfer data to other TEEs through its assigned slots. In this process, each TEE executes in its own context, eliminating the need for context switching and multiple data copies.

[0029] Figure 1 is an architectural diagram of a computing device or computing system in an embodiment of this specification. As shown in Figure 1 , an application for data processing is installed in the computing device. For example, the application can be used to cluster multiple samples. A user device can send a data processing request to the application, which, for example, includes multiple ciphertext samples to be processed. After receiving the data processing request, the application can determine the number of TEEs to schedule based on the amount of data to be processed, for example, n+1 TEEs to schedule. The application can then divide the multiple ciphertext samples to be processed into multiple ciphertext sample sets and store these multiple ciphertext sample sets in memory in an untrusted area for access by multiple TEEs. Figure 1 schematically illustrates data d1 and data d2 as examples, each representing a ciphertext sample set. Simultaneously, the application can create n+1 TEEs using the method described above. Figure 1 illustrates TEE0, TEE1, and TEE2 as examples. Furthermore, the application can create shared memory for the TEEs and set slots corresponding to at least some of the TEEs in the shared memory to facilitate data transmission between the TEEs via the slots. Among them, Slot1 corresponding to TEE1 and Slot2 corresponding to TEE2 are shown in Figure 1 as examples. Each TEE is also loaded with algorithms related to data processing corresponding to the application, for example, algorithm A0 is loaded in TEE0, algorithm A1 is loaded in TEE1, and algorithm A2 is loaded in TEE2. In addition, each TEE is provided with a cache (cache m0, cache m1, and cache m2), which is set in the trusted memory of the TEE and can be used to cache data to be written to the Slot. Through the architecture shown in Figure 1, multiple TEEs can directly read and write data based on the Slot in the shared memory without context switching, so that data transmission between TEEs can be conveniently performed to jointly run complex algorithms (such as clustering algorithms).

[0030] Figure 2 is a flow chart of a data processing method executed by an application in an embodiment of this specification. The application runs in a non-trusted area, and the method includes the following steps.

[0031] In step S210 , a data processing request is received, where the data processing request includes M pieces of ciphertext data.

[0032] An application may receive a data processing request from a user device, where the data processing request includes M pieces of ciphertext data. For example, the data processing request includes M ciphertext samples, each of which is generated by the user device symmetrically encrypting a plaintext sample using a key KeyA. In scenarios where the application performs clustering calculations, the data processing request may, for example, request the application to cluster the M ciphertext samples. In scenarios where the application performs model training (or machine learning), the data processing request may, for example, request model training based on the M ciphertext samples.

[0033] In step S220, n+1 TEEs are created according to the data processing request, and the M pieces of ciphertext data are grouped into n ciphertext sets and stored separately.

[0034] The application can determine the number of TEEs to be created based on the amount of data in the ciphertext sample included in the data processing request. For example, if the application determines that n+1 TEEs need to be created, the application can create, for example, n+1 enclaves using the method described above, such as TEE0, TEE1, and TEE2 as shown in Figure 1. Among them, the application can be used to perform complex calculations on the data, such as training a neural network based on multiple samples, or clustering based on multiple samples. In this case, the application can perform federated learning (such as horizontal federated learning) based on multiple TEEs.

[0035] In horizontal federated learning, multiple TEEs process data on a subset of samples, and a designated TEE (e.g., TEE0) aggregates the processing results from each TEE. For example, an application can load the corresponding code for TEE0, TEE1, and TEE2, corresponding to the horizontal federated learning process.

[0036] In order to reduce the amount of data transmission between TEEs, in the embodiments of this specification, the application sets TEE0 as the master TEE and TEE1 and TEE2 as slave TEEs. In the clustering calculation scenario, TEE1 and TEE2 can be used to cluster some samples respectively and provide the clustering results to TEE0. TEE0 can be used to summarize the clustering results of TEE1 and TEE2 and provide the summary results to TEE1 and TEE2, so that TEE1 and TEE2 can perform the next round of clustering based on the summary results. In the model training scenario, TEE1 and TEE2 can perform model calculations based on some samples respectively and provide the output of the model calculations to TEE0. TEE0 can be used to summarize the outputs of TEE1 and TEE2.

[0037] In this case, for example, in a clustering calculation scenario, the clustering algorithm code is loaded into TEE1 and TEE2 respectively, and the code for aggregating multiple clustering results is loaded into TEE0. In a model training scenario, the multi-layer neural network code is loaded into TEE1 and TEE2 respectively, and the code for aggregating the outputs of multiple neural networks is loaded into TEE0.

[0038] At the same time, the application can group the ciphertext samples in the data processing request into two ciphertext sample sets (such as data d1 and data d2 in Figure 1) and store them in address addr1 and address addr2 in the memory to provide them to TEE1 and TEE2 for processing respectively.

[0039] It is understood that in one embodiment, TEE0 can also perform clustering processing on some samples and summarize the clustering results of the three TEEs TEE0, TEE1 and TEE2. In this case, the application can group M ciphertext samples into three ciphertext sample sets and provide them to TEE0, TEE1 and TEE2 for processing respectively.

[0040] In step S230, the application sends the storage address of each ciphertext set to TEE1-TEE n Each TEE in.

[0041] For example, the application may send the address addr1 to TEE1 and the address addr2 to TEE2, so that TEE1 and TEE2 can directly read data d1 and data d2 from address addr1 and address addr2 respectively, and process data d1 and data d2 respectively.

[0042] In step S240, the application creates a shared memory, sets n slots in the shared memory, and sends the addresses of each slot to TEE0 and TEE1-TEE respectively. n The TEE corresponding to the slot.

[0043] For example, as shown in Figure 1, an application can create shared memory in the untrusted zone and set up two slots in this shared memory: Slot1 and Slot2. Slot1 corresponds to TEE1, for example, and Slot2 corresponds to TEE2. The application can then send Slot1's address, addr-slot1, to TEE0 and TEE1, allowing both TEE0 and TEE1 to read and write to Slot1. The application can also send Slot2's address, addr-slot2, to TEE0 and TEE2, allowing both TEE0 and TEE2 to read and write to Slot2.

[0044] FIG3 is a flow chart of a method for performing key negotiation between a user device and a TEE in an embodiment of this specification.

[0045] As shown in FIG3 , first in step S310 , the TEE sends the public key of the TEE to the user equipment.

[0046] In response to a request from a user device, the TEE can send its public key to the user device. The public key is generated internally by the TEE, and the private key corresponding to the public key is also stored in the TEE. The public key and private key are used to encrypt and decrypt data.

[0047] In one embodiment, after creating each TEE in the computing device, the specified program code (e.g., at least part of the code for the clustering algorithm) is loaded into each TEE as described above. Before using the TEE for data processing, the user device can initiate a remote authentication process for the TEE in the computing device. During the remote authentication process, the TEE can generate a public-private key pair for encryption and provide the public key to the user device. This process is described in detail below.

[0048] Before leaving the factory, the manufacturer of the SGX-supported CPU will burn the Provisioning Key and Sealing Key into the fuse register in the CPU. The fuse register is a one-time programmable register. Once the data is burned into it, the fuse will be blown, making the subsequent contents of the register only readable but no longer writable. The Provisioning Key can represent some information in the CPU, such as the CPU code (such as the sixth-generation Core, seventh-generation Core, etc.), model (such as desktop, mobile, etc.). For security reasons, encryption, signing and other operations do not directly use the Provisioning Key. Instead, an attestation key derived from the Provisioning Key is used for them. Therefore, the Provisioning Key plays a deployment role.

[0049] Before the user device initiates remote authentication of the TEE in the computing device, the CPU in the computing device can detect whether there is an attestation key. If not, initialization is initiated. During the initialization process, based on the key generation protocol, through interaction with the server and according to the generation rules of the Provisioning Key, an EPID (Enhanced Privacy IDentification) can be generated. The EPID can be used as an attestation key, generally used as the private key sk1 in the asymmetric encryption key. The generated EPID can be stored in the TEE for subsequent signing operations. Thus, the server can obtain the public key pk1 corresponding to the EPID through the interaction process. In particular, the public key pk1 corresponding to the EPID will not be made public and is only kept by the server. Such characteristics are suitable for subsequent authentication by the server (also known as IAS) during the remote attestation process.

[0050] After preparing the private key sk1 and public key pk1 for signing, the TEE can obtain the private key sk2 and public key pk2 for asymmetric encryption through the following steps:

[0051] Step 1: The user device initiates a challenge to the TEE in the computing device to request it to produce a report to prove that the program code included therein is the correct code; the user device can send the challenge to the computing device, and the computing device initiates a report generation request based on the challenge and provides the report generation request to the TEE.

[0052] Step 2: After receiving the report generation request, the TEE in the computing device calculates hash1 of the local code, generates the public key pk2 and private key sk2 for encryption, generates a report quote, which includes hash1 and pk2, and signs the quote with the above key sk1 to obtain the signature sig1.

[0053] Step 3: The TEE in the computing device can send the quote and its signature sig1 to the user device. Specifically, the TEE can call the ocall function to write the quote and signature sig1 outside the TEE, so that the computing device can send the quote and signature sig1 to the user device.

[0054] Because the user device does not have the public key pk1 corresponding to sk1, after receiving quote and its signature sig1, the user device sends quote and its signature sig1 to the IAS. The IAS verifies quote's signature sig1 using public key pk1 and returns the verification result to the user device. To prevent the verification result from being intercepted or modified, the IAS signs the verification result with its own private key to obtain signature sig2, and sends the verification result and its signature sig2 to the user device.

[0055] After receiving the verification result, if the verification result indicates that sig1 is correct, the user device verifies hash1 in the quote against the correct hash value of the code in the TEE obtained in advance. If they are consistent, the remote attestation verifies that the correct code is running in the computing device's TEE. At the same time, the user device can obtain the public key pk2 from the report.

[0056] In step S320, the user device encrypts the encryption key KeyA using the public key to obtain the ciphertext KeyA.

[0057] The user device may use a public key (eg, the public key pk2) to asymmetrically encrypt the encryption key KeyA to obtain a ciphertext KeyA, where KeyA is used to symmetrically encrypt the plaintext sample.

[0058] In step S330 , the user device sends the ciphertext KeyA to the TEE.

[0059] Specifically, the user device sends the ciphertext KeyA to the computing device, and the computing device can provide the ciphertext KeyA to the TEE by calling the ecall function, or the device can provide the ciphertext KeyA to the TEE by writing the ciphertext KeyA to the slot corresponding to the TEE.

[0060] In step S340, the TEE uses the private key to decrypt the ciphertext KeyA, obtains the key KeyA, and stores the key KeyA.

[0061] The TEE can decrypt the ciphertext KeyA using the private key corresponding to the public key (e.g., private key sk2), thereby obtaining the plaintext key KeyA, and then storing the key KeyA. In one embodiment, the user device also sends the user identification to the TEE. The TEE can then store the user identification and the key KeyA in the TEE in association.

[0062] The user device can perform the key negotiation process shown in Figure 3 with each TEE in Figure 1. Each TEE then stores the key KeyA, facilitating complex computations such as federated learning. For example, after obtaining KeyA, TEE1 can decrypt the ciphertext samples included in the acquired data d1 to obtain multiple plaintext samples.

[0063] Figure 4 is a flow chart of a data processing method for privacy protection in an embodiment of this specification. Figure 4 shows the interaction process between TEE0 and TEE1. It can be understood that the same interaction can be performed between TEE0 and TEE2.

[0064] As shown in FIG4 , first, in step S410 , TEE1 processes the acquired data d1 to obtain intermediate data, and stores the intermediate data in Slot1 .

[0065] As described above, TEE1 decrypts data d1 using keyA to obtain multiple plaintext samples. In a clustering calculation scenario, TEE1 can run the algorithm code loaded therein, such as the one for clustering, to cluster the multiple plaintext samples and obtain intermediate data. The clustering algorithm, for example, is a Dirichlet process mixture model (DPMM). The intermediate data, for example, includes the clustering results obtained by clustering the multiple plaintext samples, including the cluster categories and the distribution probability of each sample in each category.

[0066] In one embodiment, in a model training scenario, TEE1 is loaded with, for example, a multi-layer neural network algorithm code, and TEE1 can input multiple plaintext samples into the first layer of the neural network to output intermediate data from the first layer of the neural network.

[0067] After calculating and obtaining the intermediate data in TEE1, the intermediate data can be encrypted using the key KeyA to obtain the ciphertext intermediate data, and then the ciphertext intermediate data can be directly written into Slot1 according to the pre-stored address of Slot1.

[0068] Specifically, when TEE1 processes multiple plaintext samples, it can first write the data generated during the processing (this data is part of the intermediate data) into the cache m1 in TEE1. After TEE1 finishes processing the multiple plaintext samples, it encrypts all the intermediate data in cache m1 and stores them in Slot 1. In this way, TEE1 can frequently read and write plaintext to cache m1 during data processing without the need for encryption and decryption.

[0069] At the same time, TEE1 can be loaded with a memory allocation module, which can allocate memory addresses in Slot1 through a memory allocation function, thereby sequentially writing the ciphertext intermediate data into Slot1. Specifically, when writing partial data included in the intermediate data, TEE1 allocates an idle address addr3 from Slot1 through the memory allocation module. The storage capacity of address addr3 corresponds to the size of the partial data. Then, TEE1 can write the partial data to address addr3.

[0070] In step S420 , TEE1 provides notification information to TEE0 to remind TEE0 that the intermediate data has been written into Slot1 .

[0071] TEE1 can write notification information to a specific address in the shared memory, for example, by setting a 0 in a specific bit in the address to a 1, to indicate that TEE0 has written the intermediate data to Slot1. It is understood that this step is not required but optional. For example, TEE0 can poll Slot1 based on the pre-stored address of Slot1 to determine whether TEE1 has written the intermediate data to Slot1.

[0072] In step S430, TEE0 reads the intermediate data from Slot1, processes the intermediate data, and obtains a processing result.

[0073] After TEE0 determines that TEE1 has written the intermediate data into Slot1, it can read the ciphertext intermediate data from Slot1 based on the pre-stored address of Slot1, decrypt the ciphertext intermediate data using key KeyA, obtain the plaintext intermediate data, and process the intermediate data based on the algorithm code loaded in TEE0.

[0074] For example, in the clustering calculation scenario, TEE0 is loaded with the algorithm code for summarizing the clustering results of TEE1 and TEE2. TEE0 can also read the clustering results calculated by TEE2 from Slot2, summarize the clustering results of TEE1 and TEE2 together, and obtain the summarized cluster categories, the distribution probability of each sample in each category, etc.

[0075] In the model training scenario, TEE0 is loaded with the algorithm code for merging the calculation results of the first-layer neural networks of TEE1 and TEE2. For example, the calculation results of the first-layer neural networks of TEE1 and TEE2 are added together to obtain the summary result.

[0076] In step S440, TEE0 stores the processing result in Slot1.

[0077] After TEE0 processes the intermediate data as described above and obtains the processing result, it can directly write the processing result to Slot1 based on the address of Slot1. Specifically, after obtaining the processing result, TEE0 can encrypt the processing result using key KeyA to obtain the ciphertext processing result, and write the ciphertext processing result to Slot1. In this embodiment, TEE0 and TEE1 use Slot1 for data transmission between them in a time-sharing manner. Therefore, during the writing process of Slot1, Slot1 does not need to be locked, making data transmission faster.

[0078] In step S450 , TEE0 provides notification information to TEE1 to indicate that TEE0 has stored the processing result in Slot1 .

[0079] Similar to step S420 , this step is not necessary, and TEE1 can poll Slot1 to determine whether TEE0 has stored the processing result in Slot1 .

[0080] In step S460 , TEE 1 reads the processing result from Slot 1 .

[0081] After TEE1 determines that the processing result has been written to Slot1, it can directly read the processing result from Slot1 based on Slot1's address, and then perform subsequent processing based on the processing result. Specifically, TEE1 can read the ciphertext processing result from Slot1 and decrypt it using KeyA to obtain the plaintext processing result.

[0082] For example, in a clustering calculation scenario, TEE1 can perform a second round of clustering calculation based on the clustering summary results. Similarly, the intermediate data obtained through the second round of clustering calculation is provided to TEE0. TEE0 can summarize the intermediate data obtained from the second round of clustering calculation of each TEE to obtain a summary result. If TEE0 determines that the clustering result meets the convergence conditions, it can provide the clustering result outside the TEE to return it to the user device, thereby completing the clustering calculation process.

[0083] In a model training scenario, TEE1 can input the summary results into its second-layer neural network for computation. Assuming the neural network consists of two layers, TEE1 obtains the model output through computation in the second layer and provides it to TEE0 in the same manner as described above. After obtaining the model outputs from TEE1 and TEE2, TEE0 aggregates the outputs and reads data d1 and d2 from the addresses addr1 and addr2. It then updates the model parameters based on the sample labels in data d1 and d2 and the aggregated model outputs. If TEE0 determines that model training has met convergence criteria, it can provide the updated model parameters to an external TEE. For example, TEE0 can write the model parameters to Slot0, which is allocated in shared memory for TEE0. The application can retrieve the updated model parameters and return them to the user device, completing the model training process.

[0084] FIG5 is an architecture diagram of a computing device for privacy protection provided by an embodiment of this specification. The computing device is used to execute the method shown in any of FIG2 to FIG4 , including a first TEE 51 and a second TEE 52. The computing device is provided with a shared memory outside the TEE. The shared memory includes a first address corresponding to the first TEE. The first address is pre-stored in the first TEE and the second TEE.

[0085] The first TEE 51 is used to process the acquired first data to obtain intermediate data; and store the intermediate data in the first address;

[0086] The second TEE 52 is used to read the intermediate data from the first address and perform data processing on the intermediate data.

[0087] An embodiment of the present specification further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed in a computer, the computer is caused to execute a method as shown in any one of FIG. 2 to FIG. 4 .

[0088] An embodiment of the present specification further provides a computing device, including a memory and a processor, wherein the memory stores executable code, and when the processor executes the executable code, the method shown in any one of Figures 2 to 4 is implemented.

[0089] The embodiments of this specification also provide a computer-readable storage medium having a computer program stored thereon. When the computer program is executed in a computer, the computer is caused to execute the method shown in FIG. 2 or FIG. 3 .

[0090] An embodiment of this specification further provides a computing device, including a memory and a processor, wherein the memory stores executable code, and when the processor executes the executable code, the method shown in FIG. 2 or FIG. 3 is implemented.

[0091] In the 1990s, technological improvements could be clearly distinguished as either hardware improvements (for example, improvements to circuit structures like diodes, transistors, and switches) or software improvements (improvements to process flows). However, with the advancement of technology, many process flow improvements today can now be considered direct improvements to hardware circuit structures. Designers almost always create the corresponding hardware circuit structure by programming the improved process flow into the hardware circuit. Therefore, it cannot be said that a process flow improvement cannot be implemented using hardware modules. For example, a programmable logic device (PLD), such as a field programmable gate array (FPGA), is an integrated circuit whose logical function is determined by user programming. Designers can "integrate" a digital system on a PLD by programming it themselves, without having to hire a chip manufacturer to design and manufacture a dedicated integrated circuit chip. Moreover, nowadays, instead of manually fabricating integrated circuit chips, this programming is mostly done using "logic compiler" software. This is similar to the software compiler used when developing programs. Before compilation, the original code must also be written in a specific programming language, called a hardware description language (HDL). There is not just one HDL, but many, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, RHDL (Ruby Hardware Description Language), etc. The most commonly used are VHDL (Very-High-Speed ​​Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art will also understand that by simply programming the method flow in one of these hardware description languages ​​and then programming it into an integrated circuit, a hardware circuit that implements the logic method flow can be easily obtained.

[0092] The controller can be implemented in any suitable manner. For example, the controller can take the form of a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro)processor, logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicone Labs C8051F320. The memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art will also know that in addition to implementing the controller in a purely computer-readable program code format, the controller can be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, such a controller can be considered a hardware component, and the devices included therein for implementing various functions can also be considered as structures within the hardware component. Or even, the devices for implementing various functions can be considered as both software modules that implement the method and structures within the hardware component.

[0093] The systems, devices, modules or units described in the above embodiments may be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a server system. Of course, this application does not exclude that with the future development of computer technology, the computer that implements the functions of the above embodiments may be, for example, a personal computer, a laptop computer, an in-vehicle human-computer interaction device, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0094] Although one or more embodiments of this specification provide method operation steps as described in the embodiments or flow charts, more or fewer operation steps may be included based on conventional or non-creative means. The order of steps listed in the embodiments is only one way of executing the order of many steps and does not represent the only execution order. When the device or terminal product in practice is executed, it can be executed in sequence or in parallel according to the method shown in the embodiments or the drawings (for example, a parallel processor or a multi-threaded processing environment, or even a distributed data processing environment). The term "comprise", "include" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, product or equipment including a series of elements includes not only those elements, but also includes other elements that are not clearly listed, or also includes elements inherent to such process, method, product or equipment. In the absence of more restrictions, it is not excluded that there are other identical or equivalent elements in the process, method, product or equipment including the elements. For example, if the words first, second, etc. are used to represent the name, they do not represent any particular order.

[0095] For the convenience of description, the above devices are described in terms of functions divided into various modules. Of course, when implementing one or more of the present specifications, the functions of each module can be implemented in the same or multiple software and / or hardware, or the module that implements the same function can be implemented by a combination of multiple sub-modules or sub-units, etc. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0096] The present invention is described with reference to the flowcharts and / or block diagrams of the methods, apparatus (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for implementing the functions specified in one or more processes in the flowchart and / or one or more blocks in the block diagram.

[0097] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0098] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more flows in the flowchart and / or one or more blocks in the block diagram. In a typical configuration, a computing device includes one or more processors (CPUs), an input / output interface, a network interface, and a memory.

[0099] Memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. Memory is an example of a computer-readable medium.

[0100] Computer-readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic disk storage, graphene storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory media such as modulated data signals and carrier waves.

[0101] Those skilled in the art will appreciate that one or more embodiments of this specification may be provided as a method, system, or computer program product. Thus, one or more embodiments of this specification may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, one or more embodiments of this specification may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0102] One or more embodiments of this specification may be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, and the like that perform specific tasks or implement specific abstract data types. One or more embodiments of this specification may also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communications network. In a distributed computing environment, program modules may be located in local and remote computer storage media, including storage devices.

[0103] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between the various embodiments can be referenced across them. Each embodiment focuses on the differences from the other embodiments. In particular, since the system embodiments are generally similar to the method embodiments, their description is relatively simple. For relevant parts, reference can be made to the description of the method embodiments. Throughout this specification, reference to the terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with that embodiment or example are included in at least one embodiment or example of this specification. In this specification, the schematic representations of these terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, those skilled in the art may combine and integrate the different embodiments or examples, and features of different embodiments or examples, described in this specification, without conflict.

[0104] The foregoing description is merely an example of one or more embodiments of this specification and is not intended to limit the one or more embodiments of this specification. Those skilled in the art will appreciate that various modifications and variations of one or more embodiments of this specification are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of this specification are intended to be included within the scope of the claims.

Claims

1. A data processing method for privacy protection, executed by a computing device, the computing device comprising a first trusted execution environment TEE and a second TEE, the computing device being provided with a shared memory outside the TEE, the shared memory comprising a first address corresponding to the first TEE, the first TEE and the second TEE pre-stored with the first address, the method comprising: The first TEE processes the acquired first data to obtain intermediate data; storing the intermediate data to the first address; The second TEE reads the intermediate data from the first address and performs data processing on the intermediate data.

2. The method according to claim 1, wherein the computing device includes n first TEEs, the shared memory includes n first addresses corresponding to the n first TEEs, each of the first TEEs stores a first address corresponding thereto, and the second TEE pre-stores the n first addresses. The second TEE reads the intermediate data from the first address, and performs data processing on the intermediate data, including: The second TEE reads n intermediate data from the n first addresses, aggregates the n intermediate data, and obtains a first aggregate result.

3. The method according to claim 1, wherein the shared memory further includes a second address, and the first TEE and the second TEE pre-store the second address, and the method further includes, after the first TEE stores the intermediate data in the first address, writing in the second address to indicate that the first TEE has stored the intermediate data in the first address, The second TEE reading the intermediate data from the first address includes: The second TEE reads the second address, and in a case where the information read from the second address indicates that the first TEE has stored the intermediate data to the first address, reads the intermediate data from the first address.

4. The method according to claim 2, further comprising: Receiving a data processing request sent by a user device, wherein the data processing request includes M pieces of ciphertext data to be processed; Grouping the M pieces of ciphertext data into n ciphertext sets and storing them separately, and sending the storage address of each ciphertext set to each first TEE; Each first TEE reads the ciphertext set from the storage address it receives, decrypts the ciphertext set, and obtains the first data.

5. The method according to claim 4, further comprising: The shared memory is created, the n first addresses are set in the shared memory, and each of the first addresses is provided to each of the first TEEs.

6. The method according to claim 2, wherein each of the first TEE and the second TEE stores a key, and storing the intermediate data to the first address comprises: The intermediate data is encrypted based on the key to obtain ciphertext intermediate data, and the ciphertext intermediate data is stored in the first address.

7. According to the method of claim 1, a memory allocation module is provided in the first TEE, and storing the intermediate data to the first address comprises: An idle third address is allocated from the first address by the memory allocation module, the storage capacity of the third address corresponds to the size of the second data included in the intermediate data, and the second data is written into the third address.

8. The method according to claim 7, further comprising: The first TEE stores the obtained third data in a cache in the first TEE during processing of the first data, wherein the third data is part of the intermediate data. Storing the intermediate data to the first address includes: after the first TEE completes processing of the first data, the first TEE writes the intermediate data stored in the cache to the first address.

9. The method according to claim 5, wherein the first TEE stores a first code for machine learning, the second TEE stores a second code for machine learning, and the M pieces of ciphertext data are M ciphertext samples. The first TEE processes the received first data to obtain intermediate data including: The first TEE decrypts each ciphertext sample in the first data to obtain a sample set, and processes the sample set based on the first code to obtain the intermediate data; The second TEE performing data processing on the intermediate data includes: the second TEE performing data processing on the intermediate data based on the second code.

10. A computing device for privacy protection, the computing device comprising a first trusted execution environment TEE and a second TEE, the computing device being provided with a shared memory outside the TEE, the shared memory comprising a first address corresponding to the first TEE, the first TEE and the second TEE pre-stored with the first address, The first TEE is used to process the acquired first data to obtain intermediate data; and store the intermediate data at the first address; The second TEE is used to read the intermediate data from the first address and perform data processing on the intermediate data.

11. A computing device, comprising a memory and a processor, wherein the memory stores executable codes, and when the processor executes the executable codes, the method according to any one of claims 1 to 9 is implemented.

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