Data reading method and apparatus, and related device

By executing the data reading method in the network card, data is read directly from the storage space of the storage device, the problems of processor computing resource consumption and performance impact in the storage area network are solved, and the effect of improving the performance of the storage device is achieved.

WO2025044021A1PCT designated stage expired Publication Date: 2025-03-06HUAWEI TECH CO LTD
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Patent Information

Application Number
PCT/CN2024/070365
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-08-25
Filing Date
2024-01-03
Publication Date
2025-03-06

AI Technical Summary

Technical Problem

In a storage area network, when computing devices read data from storage devices, they need to parse the read operation request through the processor, resulting in the consumption and performance impact of processor computing resources.

Method used

By executing the data reading method in the network card, after receiving the read operation request, the network card directly reads data from the storage space of the storage device, avoiding the resolution of the physical address through the processor.

Benefits of technology

It reduces the computing resource consumption of the processor and the number of information interactions between the network card and the processor, and improves the performance of the storage device.

✦ Generated by Eureka AI based on patent content.

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Abstract

A data reading method and apparatus, and a related device. A network card of a computing device or a network card of a storage device can query and obtain an accessed physical address, so that data can be directly read from a storage space of the storage device. The storage space of the storage device is directly accessed by the network card to read the data from the storage space, and a storage controller of the storage device does not need to execute a read operation request, so that the number of interactions between the network card and the storage controller of the storage device can be reduced, and the consumption of computing resources of the storage controller of the storage device can be reduced, thereby improving the performance of the storage device.
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Description

Data reading method, device and related equipment

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on August 25, 2023, with application number 202311089202.3 and application name “A data reading method, device and related equipment”, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of computer technology, and in particular to a data reading method, apparatus, and related equipment. Background Art

[0004] A storage area network (SAN) is a network architecture for data storage. A data storage system using this network architecture may include computing devices and storage devices, wherein the storage devices may include a network card, a processor, and a memory array.

[0005] When a computing device reads data from a storage device, it needs to send a read operation request to the storage device through the computing device's network card. The storage device's network card receives the read operation request sent by the computing device's network card and transmits the read operation request to the processor. The processor parses the read operation request, obtains the physical address, accesses the memory array based on the physical address, reads data from the memory array, and transmits the read data to the storage device's network card. The storage device's network card then sends the read data to the computing device.

[0006] During the data reading process, the processor accesses the memory array based on a read operation request. Multiple interactions occur between the network card of the storage device and the processor, and between the processor and the memory array, consuming the computing resources of the processor of the storage device and affecting the performance of the storage device.

[0007] Summary of the Invention

[0008] The present application provides a data reading method, apparatus, and related devices, which can save computing resources of a storage controller of a storage device.

[0009] In the first aspect, the present application provides a data reading method, which can be executed by a network card. When the network card receives a first read operation request, it obtains the first target logical address in the first read operation request, determines the first target physical address corresponding to the first target logical address, and reads the data indicated by the first read operation request from the storage space of the storage device based on the first target physical address.

[0010] The data reading method provided by the present application is that when the network card receives a read operation request, it can determine the target physical address of the storage space to be accessed by the read operation request in the storage device based on the target logical address in the read operation request. After obtaining the target physical address, the data can be read directly from the storage space of the storage device. Since the target physical address of the read data has been obtained by relying on the network card, the data can be read directly from the memory of the storage device (such as SSD) without the participation of the processor of the storage device. In other words, accessing the memory in the storage device does not require the processor of the storage device to execute the read operation request (parse the physical address). This solution can not only reduce the consumption of computing resources of the processor, but also reduce the number of information interactions between the network card and the processor of the storage device, thereby improving the performance of the storage device.

[0011] In an optional implementation, after obtaining the first target logical address in the first read operation request, the network card may query the first target virtual address corresponding to the first target logical address, and query the first target physical address corresponding to the first target virtual address.

[0012] The above-mentioned logical address is used as an index for a computing device to access the storage space of a storage device, and the computing device is the computing device that generates the first read operation request. The above-mentioned virtual address is used as an index for a network card to access the storage space of a storage device. The above-mentioned physical address is used to point to any storage unit contained in the storage space of the storage device. Exemplarily, the logical address may include a logical hard disk unit identifier LUN ID and a logical block address LBA; the virtual address may be a local virtual address LVA or a global virtual address GPA, and the physical address may be a physical address PA.

[0013] In the above implementation, the network card can determine the target physical address to be accessed by the read operation request by converting the first target logical address into the first target virtual address, and then converting the first target virtual address into the first target physical address, thereby achieving the purpose of directly reading data from the storage space of the storage device based on the target physical address.

[0014] In one optional implementation, the first read operation request is generated by a computing device, the storage device and the computing device are connected via a network, the network card executing the data reading method may be the network card of the computing device, and the network card and the processor of the computing device may communicate via a computer bus. In another optional implementation, the network card executing the data reading method may be the network card of a storage device, and the network card and the processor of the storage device may communicate via a computer bus.

[0015] In an optional implementation, the mapping relationship between the logical address and the virtual address is recorded in a first mapping table; the mapping relationship between the virtual address and the physical address is recorded in a second mapping table; if the network card that executes the above-mentioned data reading method is a network card of a storage device, the above-mentioned first mapping table can be saved in the network card, and the second mapping table can be saved in the storage device. The network card of the storage device can query the first target physical address corresponding to the first target virtual address in the second mapping table through direct memory access DMA.

[0016] In the above implementation, considering that the second mapping table occupies a large amount of storage space while the memory space of the network card is limited, storing the second mapping table in the storage device can save the memory space of the network card. The network card of the storage device can query the second mapping table using DMA, which not only saves the computing resources of the processor but also allows for fast query of the second mapping table.

[0017] In an optional implementation, the mapping relationship between the logical address and the virtual address is recorded in a first mapping table; the mapping relationship between the virtual address and the physical address is recorded in a second mapping table; if the network card that executes the above-mentioned data reading method is a network card of a computing device, the first mapping table can be stored in the network card, and the second mapping table can be stored in the system memory of the computing device. The network card can query the first target physical address corresponding to the first target virtual address in the second mapping table through DMA.

[0018] In the above implementation, the second mapping table is stored in the system memory of the computing device, which can save the memory space of the network card. The network card of the computing device can query the second mapping table through DMA, which can quickly query the second mapping table.

[0019] In an optional implementation, the network card further stores validity status information of the second mapping table. Upon receiving the second read operation request, the network card determines whether the second mapping table is valid based on the validity status information of the second mapping table. If the second mapping table is valid, the network card searches the first mapping table for a second target virtual address corresponding to the second target logical address in the second read operation request, and searches the second mapping table for a second target physical address corresponding to the second target virtual address. Based on the second target physical address, the network card reads the data indicated by the second read operation request from the storage space of the storage device.

[0020] In another optional implementation, if the validity status information of the second mapping table indicates that the second mapping table is invalid, or the second target virtual address corresponding to the second target logical address is not found in the first mapping table, a second read operation request is sent to the storage device; the execution result returned by the storage device is received; the execution result includes data read by the storage device from the storage space of the storage device based on the second read operation request.

[0021] In the above implementation, the network card can determine whether to query the first and second mapping tables by querying the validity status information of the second mapping table. If the validity status information of the second mapping table is invalid, the steps of querying the first and second mapping tables are not performed, thereby avoiding wasting the network card's computing resources. If the validity status information of the second mapping table is invalid or the second target virtual address corresponding to the second target logical address is not found, the storage device executes the second read operation request, thereby ensuring the reliability of the data reading process.

[0022] In an optional implementation, the second mapping table also stores validity information of the mapping relationship between each virtual address and the physical address; when the network card receives the third read operation request, it obtains the third target logical address in the third read operation request, queries the third target virtual address corresponding to the third target logical address in the first mapping table, and queries the third target physical address corresponding to the third target virtual address in the second mapping table. If the mapping relationship of the third target virtual address is valid, the step of reading the data indicated by the third read operation request from the storage space of the storage device is performed based on the third target physical address.

[0023] In another optional implementation, if the mapping relationship of the third target virtual address is invalid, or the third target physical address corresponding to the third target virtual address is not found in the second mapping table, a third read operation request is sent to the storage device; and the execution result returned by the storage device is received.

[0024] In the above implementation, by saving the validity information of the mapping relationship of each virtual address in the second mapping table, when the third target physical address corresponding to the third target virtual address is not queried, or the mapping relationship of the third target virtual address is invalid, the storage device executes the third read operation request, thereby ensuring the reliability of the data reading process.

[0025] In an optional implementation, if the network card is a network card of a computing device, upon receiving a notification message from a storage device indicating that the fourth target virtual address is invalid, the network card may set the validity information of the mapping relationship of the fourth target virtual address stored in the second mapping table to invalid. The notification information is sent by the storage device upon determining that the fourth target virtual address is invalid, based on the correspondence between the virtual address information stored in the storage device and multiple computing devices. The storage device determines that the fourth target virtual address is invalid when data to be updated for the fourth target virtual address is stored in a cache area of ​​the storage device.

[0026] In the above implementation, when the cache area of ​​the storage device stores data to be updated at the fourth target virtual address, the storage device determines that the fourth target virtual address is invalid, thereby preventing the computing device from reading erroneous data when reading the data at the fourth target virtual address. By establishing a correspondence between virtual address information and multiple computing devices in the storage device, the storage device can send notification messages to the corresponding computing devices based on the correspondence between the virtual address information and the multiple computing devices, without the need for message broadcasting, thereby reducing the number of broadcast messages.

[0027] In a second aspect, the present application further provides a data reading device, which may include:

[0028] a request processing unit, configured to receive a first read operation request, obtain a first target logical address in the first read operation request, and determine a first target physical address corresponding to the first target logical address;

[0029] The data reading unit is configured to read the data indicated by the first read operation request from the storage space of the storage device based on the first target physical address.

[0030] In an optional implementation, the request processing unit may be specifically configured to:

[0031] The first target virtual address corresponding to the first target logical address is queried, and the first target physical address corresponding to the first target virtual address is queried.

[0032] In an optional implementation, the logical address is used as an index for a computing device to access the storage space of a storage device; the computing device is a computing device that generates a first read operation request; the virtual address is used as an index for a network card to access the storage space of the storage device; and the physical address is used to point to any storage unit contained in the storage space of the storage device.

[0033] In an optional implementation, the logical address may include a logical disk unit identifier LUN ID and a logical block address LBA; the virtual address may be a local virtual address LVA or a global virtual address GVA; and the physical address may be a physical address PA.

[0034] In an optional implementation, the first read operation request is generated by a computing device, and the computing device and the storage device are connected through a network; the network card is a network card of the computing device, and the network card and the processor of the computing device communicate through a computer bus; or, the network card is a network card of the storage device, and the network card and the processor of the storage device communicate through a computer bus.

[0035] In an optional implementation, the network card is a network card of a storage device, a mapping relationship between a logical address and a virtual address is recorded in a first mapping table, and a mapping relationship between a virtual address and a physical address is recorded in a second mapping table; the first mapping table is stored in the network card, and the second mapping table is stored in the storage device, and the request processing unit is specifically configured to:

[0036] In a direct memory access (DMA) manner, a first target physical address corresponding to the first target virtual address is searched in the second mapping table.

[0037] In an optional implementation, the network card is a network card of a computing device, a mapping relationship between a logical address and a virtual address is recorded in a first mapping table, and a mapping relationship between a virtual address and a physical address is recorded in a second mapping table; the first mapping table is stored in the network card, and the second mapping table is stored in a system memory of the computing device, and the request processing unit is specifically configured to:

[0038] In a direct memory access (DMA) manner, a first target physical address corresponding to the first target virtual address is searched in the second mapping table.

[0039] In an optional implementation, the network card stores valid status information of the second mapping table; and the request processing unit is further configured to:

[0040] When a second read operation request is received, whether the second mapping table is valid is determined based on the validity status information of the second mapping table; if the second mapping table is valid, the second target virtual address corresponding to the second target logical address in the second read operation request is queried in the first mapping table; the second target physical address corresponding to the second target virtual address is queried in the second mapping table; based on the second target physical address, the data indicated by the second read operation request is read from the storage space of the storage device.

[0041] In an optional implementation, the request processing unit is further configured to:

[0042] If the second mapping table is invalid, or the second target virtual address corresponding to the second target logical address is not found in the first mapping table, sending the second read operation request to the storage device;

[0043] Receive an execution result returned by the storage device; the execution result includes data read by the storage device from the storage space of the storage device based on the second read operation request.

[0044] In an optional implementation, the second mapping table further stores validity information of the mapping relationship between each virtual address and the physical address; and the request processing unit is further configured to:

[0045] When the third read operation request is received, the third target logical address in the third read operation request is obtained, and the third target virtual address corresponding to the third target logical address is queried in the first mapping table. The third target physical address corresponding to the third target virtual address is queried in the second mapping table. If the mapping relationship of the third target virtual address is valid, the data indicated by the third read operation request is read from the storage space of the storage device based on the third target physical address.

[0046] In an optional implementation, the request processing unit is further configured to:

[0047] If the mapping relationship of the third target virtual address fails, or the third target physical address corresponding to the third target virtual address is not found in the second mapping table, sending a third read operation request to the storage device;

[0048] Receive an execution result returned by the storage device; the execution result includes data read from the storage space of the storage device by the storage device based on the third read operation request.

[0049] In an optional implementation, the network card is a network card of a computing device; the data reading device further includes a mapping table maintenance unit; the mapping table maintenance unit is configured to:

[0050] If a notification message indicating that the fourth target virtual address is invalid is received from the storage device, the validity information of the mapping relationship of the fourth target virtual address stored in the second mapping table is set to invalid; the notification information is sent by the storage device when it determines that the fourth target virtual address is invalid, based on the correspondence between the virtual address information stored in the storage device and multiple computing devices.

[0051] In a third aspect, the present application also provides a chip that can be applied to a network card. The chip includes a processor and a power supply circuit. The power supply circuit is used to power the processor, and the processor is used to execute a computer program to implement any one of the methods performed by the network card recorded in the first aspect above.

[0052] In a fourth aspect, the present application also provides a network card for installation on a bus interface of a device, the network card comprising a memory and a processor, the memory storing a computer program; the processor being used to execute the computer program stored in the memory to implement any one of the methods described in the first aspect above.

[0053] In a fifth aspect, the present application also provides a storage device comprising a network card and a memory; the network card is used to execute a computer program to read data from the storage space of the memory by executing the method executed by the network card of the storage device recorded in the first aspect.

[0054] In a sixth aspect, the present application also provides a computing device comprising a network card; the computing device is connected to a storage device via the network card, and the network card is used to execute a computer program to implement the method executed by the network card of the computing device recorded in the first aspect.

[0055] In the seventh aspect, the present application also provides a data storage system, including a storage device and a computing device, wherein the storage device adopts the storage device recorded in the fifth aspect, and the computing device adopts the computing device recorded in the sixth aspect.

[0056] In an eighth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute any one of the methods provided in the first aspect above.

[0057] The technical effects that can be achieved in any of the second to eighth aspects mentioned above can refer to the description of the beneficial effects in the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] FIG1 is a schematic structural diagram of a data storage system provided in an embodiment of the present application;

[0059] FIG2 is an application scenario diagram of another data storage system provided in an embodiment of the present application;

[0060] FIG3 is a flow chart of a data reading method provided in an embodiment of the present application;

[0061] FIG4 is a schematic diagram of a storage method of a second mapping table provided in an embodiment of the present application;

[0062] FIG5 is a flow chart of another data reading method provided in an embodiment of the present application;

[0063] FIG6 is a logical diagram of a data reading process provided by an embodiment of the present application;

[0064] FIG7 is a logical diagram of a data writing process provided in an embodiment of the present application;

[0065] FIG8 is a logical diagram of a mapping table establishment process provided in an embodiment of the present application;

[0066] FIG9 is a schematic diagram of a mapping relationship between a logical address and a virtual address provided in an embodiment of the present application;

[0067] FIG10 is a logic diagram of another mapping table establishment process provided in an embodiment of the present application;

[0068] FIG11 is a logical diagram of a computing device accessing a faulty storage device according to an embodiment of the present application;

[0069] FIG12 is a schematic diagram of the processing logic of a failure recovery process of a storage device provided in an embodiment of the present application;

[0070] FIG13 is a flow chart of another data reading method provided in an embodiment of the present application;

[0071] FIG14 is a structural block diagram of a data reading device provided in an embodiment of the present application;

[0072] FIG15 is a block diagram of a chip structure provided in an embodiment of the present application;

[0073] FIG16 is a structural block diagram of a network card provided in an embodiment of the present application. DETAILED DESCRIPTION

[0074] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. The terms used in the implementation methods of the present application are only used to explain the specific embodiments of the present application and are not intended to limit the present application.

[0075] Before introducing the specific solutions provided by the embodiments of the present application, some of the terms in the present application are explained to facilitate understanding by those skilled in the art, and the terms in the present application are not limited.

[0076] (1) Network card: deployed on a computing device or storage device, and can be used to communicate with other electronic devices in the network. In an embodiment of the present application, the network card supports a programmable architecture and has direct memory access (DMA) capability. The network card can be, but is not limited to, a data processing unit (DPU), an infrastructure processing unit (IPU), a network processing unit (NPU), a system on chip (SoC), an application-specific integrated circuit (ASIC), a programmable logic device (PLD), a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), an iNIC or a smartNIC, etc. Among them, iNIC or smartNIC can be understood as an intelligent network card.

[0077] In the embodiments of the present application, "multiple" refers to two or more. In view of this, in the embodiments of the present application, "multiple" can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two or more. For example, including at least one means including one, two or more, and does not limit which ones are included. For example, including at least one of A, B and C, then the included ones may be A, B, C, A and B, A and C, B and C, or A, B and C. "And / or" describes the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / ", unless otherwise specified, generally indicates that the previous and subsequent associated objects are in an "or" relationship.

[0078] Unless otherwise specified, ordinal numbers such as "first" and "second" in the embodiments of the present application are used to distinguish multiple objects and are not used to limit the order, timing, priority or importance of multiple objects.

[0079] The data reading method provided in the embodiment of the present application can be applied to a data storage system, for example, it can be applied to a data storage system in application scenarios such as cloud storage or cloud computing. Figure 1 exemplarily shows a structural diagram of a data storage system. As shown in Figure 1, the data storage system includes a computing device 100 and a storage device 200, the computing device 100 includes a processor 110 and a network card 120, and the network card 120 and the processor 110 can communicate through a computer bus; the storage device 200 may include a network card 210, a processor 220 and a memory array 230. Among them, the network card 210 can communicate with the processor 220 and the memory array 230 through a computer bus, and the processor 220 can also be called a storage controller. The computing device and the storage device can communicate through the network card.

[0080] In some embodiments, the processor 220 can be connected to multiple network cards. The memory array 230 may include multiple memories, each of which can be connected to the processor 220 and the network card 210 via an interface card, and one interface card can be connected to multiple memories. The processor 220 may include a processor and a memory. The processor may be a central processing unit (CPU), and the memory may be synchronous dynamic random access memory (SDRAM) or double data rate (DDR) SDRAM. To distinguish it from the system memory of the processor 220, the memory array 230 may be referred to as the external memory of the processor 220, and the memory array 230 constitutes the storage space of the storage device 200. The memory in the memory array 230 may be a non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), a disk or a tape, etc., wherein the solid-state drive may be an SSD based on the nonvolatile memory express (NVMe) protocol.

[0081] The computing device 100 may send a data access operation request to the storage device 200 through the network card 120 . The storage device 200 may receive the data access operation request sent by the computing device 100 through the network card 210 , and the processor 220 may access the memory array 230 based on the received data access operation request.

[0082] In some embodiments, the data storage system may include multiple computing devices and multiple storage devices, and the multiple computing devices and multiple storage devices may be connected via a network. For example, the multiple computing devices and multiple storage devices may be connected via a wired network or a wireless network, and each computing device may transmit data to any storage device via the network. The data storage system may adopt a SAN network architecture, the computing device may be understood as a host server, and the storage device may be a database device accessible by the host server. For example, as shown in Figure 2, the data storage system may include computing device 300, computing device 400, storage device 500, and storage device 600. The computing device 300 may communicate with the storage device 500 and storage device 600 via the network, and the computing device 400 may also communicate with the storage device 500 and storage device 600 via the network. The structures of computing device 300 and computing device 400 are the same as those of computing device 100, and the structures of storage device 500 and storage device 600 are the same as those of storage device 200, and will not be repeated here.

[0083] Taking the computing device 100 and the storage device 200 as an example, when the computing device 100 reads data from the storage device 200, it needs to send a read request message to the storage device 200 through the network card 120 of the computing device 100. The network card 210 of the storage device 200 receives the read request message sent by the network card 120 of the computing device 100, parses the read request message, and transmits the parsed read request message to the processor 220. The processor 220 accesses the memory array 230 based on the read request message, reads data from the memory array 230, and transmits the read data to the network card 210 of the storage device 200. The network card 210 sends the read data to the computing device 100.

[0084] During the above data reading process, the processor accesses the memory array based on the read request message. There are multiple interactions between the network card of the storage device and the processor, and between the processor and the memory array, which consumes the computing resources of the processor of the storage device and affects the performance of the storage device.

[0085] Based on this, an embodiment of the present application provides a data reading method. When the network card receives a read operation request, it can determine the target physical address of the storage space to be accessed by the read operation request in the storage device based on the target logical address in the read operation request. Based on the target physical address, data is read directly from the storage space of the storage device without passing through the processor of the storage device, thereby bypassing the processor. This method can not only reduce the number of information interactions between the network card and the processor, and between the processor and the memory array, but also reduce the consumption of computing resources of the processor, thereby improving the performance of the storage device.

[0086] Figures 1 and 2 are merely exemplary illustrations of the application scenarios of the embodiments of the present application. In addition to the application scenarios shown in Figures 1 and 2, the data reading method provided in the embodiments of the present application can also be applied to distributed data storage systems, where the storage devices may include a network interface card (NIC) and at least one memory device. The following describes the data reading method provided in the embodiments of the present application in detail, using the application scenarios shown in Figures 1 and 2 as an example.

[0087] In some embodiments, a first mapping table may be stored in the network card of the storage device, and the first mapping table is used to store the mapping relationship between the logical address and the virtual address. When the network card of the storage device receives a read operation request sent by the computing device, it can obtain the target logical address carried in the read operation request, query the first target virtual address corresponding to the target logical address in the first mapping table, and query the target physical address corresponding to the first target virtual address in the second mapping table, and read data from the storage space of the storage device based on the target physical address. The second mapping table is used to store the mapping relationship between the virtual address and the physical address. In an optional embodiment, the second mapping table can be stored in the network card of the storage device. In another optional embodiment, the second mapping table can be stored in the memory of the processor of the storage device. The network card of the storage device can access the memory of the processor through direct memory access (DMA) to query the second mapping table.

[0088] FIG3 shows a flow chart of a data reading method performed by a network card of a storage device. The network card of the storage device is hereinafter referred to as a storage network card. As shown in FIG3 , the data reading method performed by the storage network card may include the following steps:

[0089] S301: Receive a first read operation request sent by a computing device, and obtain a first target logical address in the first read operation request.

[0090] When a computing device needs to read data from a storage device, the computing device can send a read operation request to the storage network card through the network card of the computing device. The storage network card receives the first read operation request sent by the computing device and obtains the first target logical address from the first read operation request. The first read operation request can be understood as any read operation request generated by the computing device. The first target logical address can include a logical hard disk unit identifier and a logical block address (LBA). Since each logical hard disk unit in the storage device has a logical unit number (LUN), the logical hard disk unit identifier can also be called the identity (ID) information of the LUN, referred to as LUN ID. LBA can be a segment of logical address. For example, the first target logical address of the first read operation request can be LUN ID LUN100 and LBA 0x0100~0x0120.

[0091] In some embodiments, the computing device has a set of logical addresses used by the computing device, which can be referred to as host-side block device information, and the storage device has a set of logical addresses used by the storage device, which can be referred to as array-side block device information. The set of logical addresses used by the computing device and the set of logical addresses used by the storage device can be the same, or they can have a certain correspondence, and the correspondence can be a conversion rule. The logical address of the first read operation request sent by the computing device to the storage device can use the host-side block device information. After receiving the first read operation request, the storage network card can convert the host-side block device information in the first read operation request into array-side block device information based on the correspondence between the host-side block device information and the array-side block device information, thereby obtaining the first target logical address of the first read operation request.

[0092] S302: Determine a first target physical address corresponding to the first target logical address.

[0093] In some embodiments, the storage network card may query the first target virtual address corresponding to the first target logical address in the first mapping table.

[0094] The first mapping table is stored in the storage network card, or in other words, in the memory of the storage network card. It is lost after a power outage. In addition to being stored in the storage network card, the first mapping table can also be persistently stored in a processor connected to the storage network card, specifically in non-volatile memory within the processor, to prevent loss during a power outage. In scenarios such as storage device failure recovery or power-on, the processor can resend the persistently stored first mapping table to the storage network card for preservation.

[0095] The first mapping table is used to store the mapping relationship between logical addresses and virtual addresses, where the logical address may include a LUN ID and an LBA, and the virtual address may refer to the local virtual address (LVA) of the storage device to which the storage network card belongs. Therefore, it can be said that the first mapping table is used to store the mapping relationship between the LUN ID and LBA to the LVA; alternatively, the virtual address may refer to the global virtual address (GVA) of the data storage system. The first mapping table can be user-configured, and the process of user configuration of the first mapping table will be described in detail below.

[0096] In some embodiments, in order to reduce the memory space occupied by the storage network card and save the memory of the storage network card, the first mapping table can use a linear partition mapping method to save the mapping relationship between the logical address and the virtual address. Therefore, the first mapping table can also be called a partition table. For example, assume that the size of LUN100 is 16T. For example, the logical address range of LUN100 is 0~16T. If the mapping relationship between each logical address and the virtual address in LUN100 is saved, a total of 16T entries are required. Each entry saves the virtual address corresponding to a logical address, which will take up a lot of memory space. In an embodiment of the present application, a segmented or linear partition mapping method can be used to divide the 16T logical address range in LUN100 into 16 segments or 16 intervals. Each interval corresponds to a 1T logical address range. The logical address and virtual address of each interval are linearly corresponding. Taking the LBA of the interval 0~1T as an example, if the LVA corresponding to this interval is 0T~1T, it can be determined that the LVA corresponding to the logical address of LBA 0x0100 in LUN100 is 0x0100. If the LBAs in the range 0 to 1T correspond to LVAs in the range 1T to 2T, then the LVA corresponding to the logical address 0x0100 in LUN 100 is the 100th virtual address space after 1T. Therefore, a single entry can be used to store the virtual address range corresponding to the 1T logical address range. That is, each entry stores the mapping relationship between the LBAs and LVAs for a 1T range. This requires a total of 16 entries to store the virtual addresses corresponding to the logical addresses 0 to 16T of LUN 100. This significantly reduces the size of the first mapping table, reduces the memory space occupied by the first mapping table, and conserves memory on the storage network card.

[0097] For example, a portion of the first mapping table may be shown in Table 1. Each entry in the first mapping table stores a virtual address range corresponding to a logical address range. The LBA corresponding to each entry in Table 1 is defined by the LBA start address and LBA length. For example, an LBA start address of 2T and an LBA length of 1T corresponds to a logical address space with LBAs of 2T to 3T.

[0098] Table 1

[0099] The storage network card can determine the first target virtual address corresponding to the first target logical address of the first read operation request by querying the first mapping table. For example, assuming that the first target logical address of the first read operation request is a LUN with a LUN ID of LUN100 and an LBA of 100K to 120K, by querying the first mapping table, the storage network card can determine that the first target virtual address corresponding to the first target logical address is a virtual address space of 100K to 120K.

[0100] After determining the first target virtual address, the storage network card may query the second mapping table for a first target physical address corresponding to the first target virtual address.

[0101] Among them, the second mapping table is used to save the mapping relationship between the virtual address and the physical address (PA), or in other words, the second mapping table is used to save the mapping relationship from LVA to PA. In some embodiments, the second mapping table can be saved in the storage network card. In other embodiments, since the memory of the storage network card is small, the second mapping table can be saved in the memory of the processor. In addition, the second mapping table supports preheat loading, which can accelerate the performance recovery speed in power-off and power-off scenarios. The storage network card can access the memory of the processor through DMA to query the second mapping table. If the processor is connected to multiple network cards, each network card can access the second mapping table saved in the processor.

[0102] Exemplarily, the second mapping table may also be referred to as a page table. As shown in FIG4 , the second mapping table may include a root node, an intermediate node, and a leaf node. The root node may also be referred to as a page table root. The virtual address space may be divided into multiple segments, and the root node is used to store the node IDs of the intermediate nodes corresponding to the multiple virtual address intervals. For example, the node ID of the intermediate node corresponding to the virtual address interval of 0 to 1T is 001, that is, the virtual address interval of 0 to 1T corresponds to the intermediate node 001; the node ID of the intermediate node corresponding to the virtual address interval of 1T to 2T is 002, that is, the virtual address interval of 1T to 2T corresponds to the intermediate node 002, and so on. Intermediate nodes are used to store the node IDs of leaf nodes corresponding to multiple small virtual address ranges. Taking the intermediate node with node ID 001 as an example, the node ID of the leaf node corresponding to the virtual address range of 0-512M is 101, i.e., the virtual address range of 0-512M corresponds to leaf node 101; the node ID of the leaf node corresponding to the virtual address range of 512M-1024M is 102, i.e., the virtual address range of 512M-1024M corresponds to leaf node 102. Each leaf node is mapped at a certain granularity, for example, at an 8M granularity, and each 8M virtual address range can be called a page. Furthermore, each leaf node supports setting validity at a certain granularity, for example, at a 128K granularity, and each 128K virtual address range can be called a subpage. Each 128K virtual address range corresponds to a continuous segment of physical address space in the memory array. For example, a portion of leaf node 101 can be shown in Table 2.

[0103] Table 2

[0104] Among them, when there is data to be updated in the virtual address interval corresponding to a subpage, or when the hard disk corresponding to a subpage fails, the valid status information corresponding to the subpage is invalid. For example, when the hard disk is unplugged or fails, it cannot respond to direct reads, so the valid status information corresponding to the subpage associated with the hard disk needs to be set to invalid. Reconstruction may occur after a hard disk fails. After reconstruction, the subpage associated with the hard disk can be re-established, and the virtual address associated with the hard disk can be mapped to a new physical address. If the hard disk fails and is directly restored without reconstruction, and the stored data is not damaged, the valid status information corresponding to the subpage associated with the hard disk can be set to valid without re-establishing the subpage associated with the hard disk.

[0105] In some embodiments, considering that the second mapping table will occupy a large amount of memory space, the second mapping table can be established in a dynamic mapping manner, that is, when no data has been written to a certain virtual address, the second mapping table does not contain the mapping relationship between the virtual address and the physical address. Each time the processor performs a disk flushing operation, multiple virtual address to physical address mapping relationships are added to the second mapping table. The disk flushing operation refers to writing multiple data to be written to the memory array stored in the cache area of ​​the processor into the memory array, and the cache area of ​​the processor can be located in the memory of the processor. The process of writing data to the memory array will assign a physical address to each data. In the second mapping table, for each data written to the memory array, a mapping relationship between the virtual address of the data and the physical address is established, and the valid status information of each newly established virtual address mapping relationship is set to valid. When a new hard disk is added to the memory array, there is no need to process the second mapping table.

[0106] For any virtual address already in the second mapping table, if the processor receives an update data operation for the virtual address, the data to be updated corresponding to the virtual address is saved in the cache area of ​​the processor, and the mapping relationship of the virtual address in the second mapping table is set to invalid. Waiting for the disk flushing operation to be performed again, when the data to be updated corresponding to the virtual address is written to the memory array, a new physical address is reassigned to the virtual address, the original mapping relationship of the virtual address is deleted in the second mapping table, the mapping relationship from the virtual address to the new physical address is re-established, and the validity status information of the newly established mapping relationship is set to valid. Through the above process, the coordination and consistency between the second mapping table and the cache area are maintained.

[0107] In some embodiments, if the second mapping table is stored in the processor's memory, a copy of the root node of the second mapping table can be stored in the storage network card. Based on the copy of the root node, the second mapping table stored in the processor's memory can be queried via DMA. By querying the root node, intermediate node, and leaf node step by step, a rapid search can be performed to determine the first target physical address corresponding to the first target virtual address. The first target physical address can include the hard disk ID and the offset of the first address. As shown in Table 2, the hard disk ID is ID1, the offset of the first address is the physical address of 0x0020, and the corresponding LVA is 0.

[0108] For example, assuming the first target virtual address is in the virtual address range of 100K to 120K, by querying the second mapping table, the storage network card can determine that the first target physical address corresponding to the first target virtual address 100K to 120K is the physical address space 100K to 120K after the first address offset 0x0020, with the hard disk ID being ID1. Furthermore, the virtual address range of 100K to 120K belongs to the "0-128K" subpage, and the validity status information of this subpage is valid. Therefore, it can be determined that the mapping relationship of the first target virtual address is valid.

[0109] S303: Read data from a storage space of a storage device based on the first target physical address.

[0110] The storage network card finds a valid mapping relationship for the first target virtual address in the second mapping table, obtains a first target physical address corresponding to the first target virtual address, reads data from the storage space of the storage device based on the first target physical address, and sends the read data to the computing device. The network card of the computing device receives the data sent by the storage network card and transmits the data to the processor of the computing device so that the processor of the computing device processes the data.

[0111] In an embodiment of the present application, the storage array can be directly accessed via the storage network card. If the storage network card can determine the first target physical address of the first read operation request, the storage device's processor can be completely bypassed. Because the target physical address of the data to be read is already obtained via the network card, data can be directly read from the storage device's memory without the involvement of the storage device's processor. This eliminates the need for the processor to read data from the memory array based on the first read operation request. This conserves computing resources of the storage device's processor and improves storage device performance.

[0112] Through the data reading method provided in the embodiment of the present application, the storage network card can directly access the memory space of the processor, that is, the above-mentioned first target physical address can also be a DDR address.

[0113] In some embodiments, the storage network card may also save the valid status information of the second mapping table in the processor. For example, when the processor is performing a reset operation or performing fault recovery, the valid status information of the second mapping table in the processor is invalid. If the valid status information of the second mapping table is invalid, it means that the second mapping table cannot be accessed at the current moment. After obtaining the target logical address in the read operation request, the storage network card may first query the valid status information of the second mapping table. If the valid status information of the second mapping table is valid, the steps of querying the target virtual address corresponding to the target logical address in the first mapping table and querying the target physical address corresponding to the target virtual address in the second mapping table are executed. If the valid status information of the second mapping table is invalid, there is no need to execute subsequent steps to avoid wasting the computing resources of the storage network card.

[0114] In this embodiment, the data reading method performed by the storage network card is shown in FIG5 , and may include the following steps:

[0115] S501: Receive a second read operation request sent by a computing device, and obtain a second target logical address in the second read operation request.

[0116] When the computing device needs to read data from the storage device, a storage application running on a processor of the computing device initiates a second read operation request and sends the second read operation request to the storage network card via the network card of the computing device. The second read operation request can be understood as any read operation request generated by the computing device.

[0117] As shown in Figure 6, the process of sending a second read operation request may include the following steps: Step R1: The storage application initiates a second read operation request. After being processed by software such as a block device driver in the computing device, the second read operation request is sent to multipath software running on the computing device's processor. Step R2: If the data storage system includes multiple storage devices, the multipath software determines the storage device to be accessed from the multiple storage devices based on a routing algorithm and sends the second read operation request to the computing device's network interface card. Step R3: The computing device's network interface card sends the second read operation request to the storage device to be accessed, and the storage network interface card of the storage device receives the second read operation request. For example, assuming that the data storage system includes storage device A and storage device B, the computing device's processor may determine, based on a routing algorithm, that the storage device to be accessed by the second read operation request is storage device A. The computing device's network interface card then sends the second read operation request to storage device A, and the storage network interface card of storage device A receives the second read operation request.

[0118] After receiving the second read operation request sent by the computing device, the storage network card converts the host-side block device information in the second read operation request into array-side block device information according to the correspondence between the host-side block device information and the array-side block device information, thereby obtaining a second target logical address of the second read operation request.

[0119] S502, determine whether the second mapping table is valid; if yes, execute step S503; if not, execute step S509.

[0120] The storage network card queries the valid status information of the second mapping table. If the valid status information of the second mapping table is valid, continue to execute the step of querying the first mapping table in step S503; if the valid status information of the second mapping table is invalid, execute the step of sending the second read operation request to the processor of the storage device in step S509, and let the processor process the second read operation request.

[0121] S503, query whether the first mapping table contains the second target virtual address corresponding to the second target logical address; if yes, execute step S504; if not, execute step S509.

[0122] If the validity status information of the second mapping table is valid, the storage network card queries the first mapping table. If the first mapping table contains the second target virtual address corresponding to the second target logical address, the storage network card obtains the second target virtual address corresponding to the second target logical address and executes the step of querying the second mapping table in step S504. If the second target virtual address corresponding to the second target logical address is not found in the first mapping table, the storage network card executes the step of sending the second read operation request to the processor of the storage device in step S509, and the processor processes the second read operation request.

[0123] S504, query the second mapping table to determine whether the mapping relationship of the second target virtual address is valid; if yes, execute step S505; if not, execute step S509.

[0124] If the storage network card queries the second target virtual address corresponding to the second target logical address in step S503, the storage network card queries the second mapping table to determine whether the second mapping table contains the mapping relationship of the second target virtual address; if the second mapping table contains the mapping relationship of the second target virtual address, and the valid status information of the mapping relationship of the second target virtual address is valid, then the step of determining the second target physical address corresponding to the second target virtual address in step S505 is executed; if the mapping relationship of the second target virtual address is not queried in the second mapping table, or although the second mapping table contains the mapping relationship of the second target virtual address, the valid status information of the mapping relationship of the second target virtual address is invalid, then the step of sending the second read operation request to the processor of the storage device in step S509 is executed, and the processor processes the second read operation request.

[0125] S505 : Determine a second target physical address corresponding to the second target virtual address according to the mapping relationship of the second target virtual address.

[0126] If the second mapping table includes the mapping relationship of the second target virtual address, and the validity status information of the mapping relationship of the second target virtual address is valid, the storage network card obtains the second target physical address corresponding to the second target virtual address in the second mapping table.

[0127] S506 , based on the second target physical address, read data from the storage space of the storage device, and verify the read data.

[0128] After the storage network card determines the second target physical address corresponding to the second target virtual address, it can read data from the storage space of the storage device based on the second target physical address in step R4' of Figure 6 and perform a data integrity field (DIF) check. When performing the DIF check on the read data, a checksum algorithm such as a cyclic redundancy check algorithm or a Hamming code can be used to calculate the data using these algorithms to obtain a checksum of a fixed length. The calculated checksum of the data is then compared with the read checksum to determine the integrity of the read data and whether the read data is correct.

[0129] S507, determine whether the verification is passed; if yes, execute step S508; if not, execute step S509.

[0130] S508: Send the read data to the computing device.

[0131] If the verification passes, the storage network card sends the read data to the network card of the computing device, and the network card of the computing device transmits the data to the storage application in the processor of the computing device.

[0132] S509: Send the second read operation request to the processor of the storage device, and send the execution result returned by the processor to the computing device.

[0133] If the verification fails, the storage network card sends the second read operation request to the processor of the storage device, and the processor processes the second read operation request. As shown in Figure 6, the process may include the following steps: Step R4, after the network card of the storage device determines the second target logical address in the second read operation request, the second read operation request is sent to the fabric-based NVMe (nonvolatile memory express over fabric, NOF) driver in the processor; Step R5, the NOF driver sends the second read operation request to the block module in the processor; Step R6, the block module sends the second read operation request to the cache module in the processor, and the cache module queries the cache area according to the second read operation request. If the cache area stores data corresponding to the second target logical address, the data corresponding to the second target logical address stored in the cache area is directly returned. For example, the order of R1 to R6 can be reversed to transfer data to the storage application in the processor of the computing device; if there is no data corresponding to the second target logical address in the cache area, step R7 is executed; in step R7, the Cache module sends the second read operation request to the Pool module in the processor, and in step R8, the Pool module queries the hard disk metadata index table based on the second target logical address, i.e., LunID, LBA first address and length information, determines the second target physical address, and reads data from the memory array based on the second target physical address, and reversely executes in the order of R1 to R7 to transfer the data to the storage application in the processor of the computing device. The above-mentioned NOF driver, Block module, Cache module and Pool module can all be understood as software modules running on the processor in the processor.

[0134] The above process can also be understood as follows: after the processor reads data from the cache table or the memory array, it sends the execution result of the second read operation request to the storage network card, including the read data. The storage network card receives the execution result returned by the processor and sends the read data to the computing device.

[0135] For example, in the above-mentioned data reading process, if the storage network card finds the mapping relationship of the second target virtual address in the second mapping table when querying the second mapping table, but the valid status information of the mapping relationship of the second target virtual address is invalid, it means that there may be data to be updated at the second target virtual address, that is, there may be data to be updated at the corresponding second target logical address. In step R6, when the cache module in the processor queries the cache area according to the second read operation request, it may read the data corresponding to the second target logical address in the cache area and send the read data to the computing device.

[0136] In the above embodiment, the processor may execute the second read operation request when any of the following conditions are met. These conditions may include: the validity status information of the second mapping table is invalid; the second target virtual address corresponding to the second target logical address is not found; the second target physical address corresponding to the second target virtual address is not found; the mapping relationship corresponding to the second target virtual address is invalid; or the read data fails verification. When any of the conditions are met, the processor executes the second read operation request, thereby ensuring the reliability of the data reading process.

[0137] In some embodiments, for any virtual address already in the second mapping table, if the processor receives a data update operation for the virtual address, the data to be updated corresponding to the virtual address is saved to the cache area of ​​the processor, and the mapping relationship of the virtual address in the second mapping table is set to invalid. The data update process may include the following steps as shown in Figure 7:

[0138] In step W1, a storage application initiates a write operation request, which is processed by software such as a block device driver in the computing device and then sent to multipath software running on a processor of the computing device.

[0139] In step W2, if the data storage system includes multiple storage devices, the host multipath software determines the storage device to be accessed from the multiple storage devices according to the routing algorithm, and sends the write operation request to the network card of the computing device.

[0140] In step W3, the network card of the computing device selects a suitable link and sends a write operation request to the storage device to be accessed, and the network card of the storage device receives the write operation request.

[0141] In step W4, the storage device's network interface card receives the write request and, based on the correspondence between the host-side block device information and the array-side block device information, converts the host-side block device information in the write request into array-side block device information. This information then determines the destination logical address of the write request and sends the write request to the NOF driver in the processor. The destination logical address is the logical address of the data to be written, corresponding to the write request.

[0142] In step W5, the NOF driver sends a write operation request to the Block software module in the processor.

[0143] In step W6, the Block software module sends the write operation request to the cache module in the processor. The cache module stores the data to be written and the corresponding destination logical address contained in the write operation request in the processor's cache area, saves a mirror image of the data to be written in memory, and returns the execution result of the write operation request to the computing device. For example, the execution can be reversed in the order of W1 to W6, and the execution result of the write operation request is transmitted to the storage application in the computing device's processor to notify the storage application that the processor has received and executed the write operation request.

[0144] In step W7, the processor determines the target virtual address corresponding to the destination logical address, and sets the valid status information of the mapping relationship of the target virtual address to invalid in the second mapping table.

[0145] In some embodiments, the processor of the storage device also stores a first mapping table. The processor can determine the target virtual address corresponding to the destination logical address by querying the first mapping table. After determining the target virtual address, the processor can query the second mapping table. If the second mapping table contains a mapping relationship of the target virtual address, the valid status information of the mapping relationship of the target virtual address can be set to invalid. If the second mapping table is stored in the storage network card, the processor can modify the valid status information of the mapping relationship of the target virtual address in the second mapping table by DMA, or the processor can send a notification message of the modification status to the storage network card, and the storage network card sets the valid status information of the mapping relationship of the target virtual address in the second mapping table to invalid based on the notification message.

[0146] When the processor receives a write data operation for the target virtual address, that is, when the data is updated for the target virtual address, the mapping relationship of the target virtual address in the second mapping table is set to invalid to maintain the coordination consistency of the second mapping table and the data in the cache area of ​​the processor, thereby avoiding the computing device in the data storage system from reading outdated and erroneous data when reading the data in the target virtual address.

[0147] In some embodiments, the memory array may include multiple hard disks. When a hard disk fails, the processor can set the mapping relationship of the virtual address associated with the hard disk ID in the second mapping table to invalid based on the hard disk ID of the failed hard disk, so as to avoid the storage network card being unable to obtain access results for a long time when accessing the failed hard disk, thereby affecting the normal execution of subsequent operations.

[0148] When the amount of data stored in the processor's cache area reaches a certain amount, the processor can initiate a disk flushing operation to write the data stored in the cache area to the memory array. The disk flushing operation can be initiated by the cache module, and the disk flushing operation process may include the following steps as shown in Figure 7:

[0149] In step F1, the Cache module obtains data from the cache area of ​​the processor, assembles it into a write data instruction, and sends it to the Pool module.

[0150] In step F2, the Pool module queries or applies for the physical hard disk space to be written in units of Pages, writes the data to the hard disk of the storage array, and writes the metadata information, that is, the mapping relationship between virtual addresses and Page address spaces, to the hard disk metadata index table. Each Page can be an 8MB slice with multiple copies or erasure code (EC) redundancy.

[0151] In step F3, the processor parses the page information of the written data to obtain the physical address. In the second mapping table, for each data written to the memory array, a mapping relationship between the virtual address of the data and the physical address is established. After the disk is flushed successfully, the valid status information of each newly established virtual address mapping relationship is set to valid according to the granularity of the subpage (which can be 128KB).

[0152] The first mapping table used in the above embodiments can be established based on user configuration. A second mapping table can be established while the first mapping table is being established, and the newly established second mapping table may not yet contain entries for mapping relationships. If the data storage system includes multiple storage devices, the process of establishing the first and second mapping tables will be described below using the first storage device as an example. The first storage device can be any one of the multiple storage devices, or a storage device with management functionality among the multiple storage devices. The processor of the first storage device may include a configuration module, a direct table management module, and a virtual space management module. The configuration module is configured to receive user configuration instructions; the direct table management module is configured to create, manage, and maintain the first and second mapping tables. In some embodiments, the first mapping table can be configured to store mappings between logical addresses and LVAs, and the virtual space management module is configured to map GVAs to LVAs, ensuring GVA redundancy. A GVA refers to a virtual address accessible by computing devices in the data storage system and is a global virtual address shared by all storage devices in the data storage system. An LVA refers to a local virtual address used by a storage device in the data storage system. Each storage device in the data storage system stores a copy of the GVA-to-LVA mapping. In some embodiments, the processor of the first storage device may further include a persistence module, which may be used to persistently store the established first mapping table. The above modules are only divided based on functional dimensions and may be respectively assigned to corresponding software modules in software implementation.

[0153] In some embodiments, the process of establishing the first mapping table and the second mapping table, as shown in FIG8 , may include the following steps:

[0154] In step P1, the configuration module receives a configuration operation instruction input by a user and sends the configuration operation instruction to the direct table management module.

[0155] The configuration module receives a configuration operation instruction input by a user. The configuration operation instruction includes user-configured parameters, including the LUN ID of each logical hard disk unit included in the first mapping table to be established, the LBA starting address and length of each logical hard disk unit, and the number of partitions of each logical hard disk unit. The length represents the space size of the corresponding logical hard disk unit, and the number of partitions represents the number of mapping entries corresponding to the corresponding logical hard disk unit in the first mapping table.

[0156] In step P2, the through table management module determines whether the second mapping table has been created and whether the GVA space associated with the second mapping table has any remaining space. If the second mapping table has not been created or the GVA space associated with the second mapping table has no remaining space, step P3 is executed. If the second mapping table has been created and the GVA space associated with the second mapping table has any remaining space, step P5 is executed.

[0157] In step P3, the direct table management module applies for virtual space from the virtual space management module. The applied virtual space is generally N times the LUN size, where N is a configurable value. The GVA corresponding to the applied virtual space is obtained, and the LVA is determined based on the mapping relationship between the GVA and the LVA of the first storage device.

[0158] In step P4, the direct table management module notifies the network card of the first storage device to create a second mapping table according to the LVA, and sets the validity status information of the second mapping table to valid.

[0159] Step P5: The through table management module obtains the PageTableID of the second mapping table.

[0160] If the second mapping table is newly created by the network card, the second mapping table returned by the network card may be received, the PageTableID of the second mapping table may be obtained, and the second mapping table may be saved in the memory of the processor.

[0161] In step P6, the direct table management module applies for GVA space. If the LUN size is 16TB, the GVA space applied for can also be 16TB.

[0162] In step P7, the direct table management module creates an initial first mapping table, which is used to store the mapping relationship between the logical address and the GVA.

[0163] In some embodiments, the mapping relationship between the logical address LUN ID and LBA to the GVA, as well as the mapping relationship between the GVA and the LVA of any two storage devices can be as shown in Figure 9. The GVA (0~64T) mapped to the LVA of each storage device is LVA (0~64T), thereby achieving the purpose of GVA multi-redundancy. As shown in Figure 9, the logical address range of LUN ID is LUN100 and LBA is 0~16T, which corresponds to 0~16T of GVA. The logical address range of LUN ID is LUN200 and LBA is 0~16T, which corresponds to 16T~32T of GVA. The logical address range of LUN ID is LUN100 and LBA is 16~32T, which corresponds to 32T~48T of GVA. The logical address range of LUN ID is LUN300 and LBA is 0~16T, which corresponds to 48T~64T of GVA.

[0164] In some embodiments, the direct table management module can create a partition table based on the number of partitions. If the LUN size is 16TB and the number of partitions is 16, the size of each partition can be 1TB. The first mapping table can include LUNID, START_LBA, LENGTH, and START_GVA. START_LBA is the LBA starting address, and START_GVA is the GVA starting address corresponding to the LBA starting address. The initial first mapping table can also include the PageTableID corresponding to each partition.

[0165] In step P8, the through table management module sends the initial first mapping table to the persistence module, so that the persistence module persists and saves the initial first mapping table.

[0166] In step P9, the pass-through table management module converts the GVA in the initial first mapping table into LVA according to the mapping relationship between the GVA and the LVA of the first storage device to obtain a first mapping table, and sends the first mapping table to the network card driver.

[0167] In step P10, the network card driver sends the first mapping table to the network card, so that the network card saves the first mapping table.

[0168] If the processor to which the network card driver belongs is connected to multiple network cards, the network card driver sends the first mapping table to the multiple network cards respectively, wherein the network card is the network card of the first storage device.

[0169] In step P11 , the direct table management module broadcasts the information of the initial first mapping table to other storage devices in the data storage system.

[0170] Taking the second storage device among other storage devices as an example, where the second storage device can be any one of the other storage devices, as shown in FIG10 , after receiving the initial first mapping table broadcast by the first storage device, the second storage device can perform the following steps:

[0171] Step P12: The direct table management module receives the initial first mapping table broadcasted by the first storage device.

[0172] In step P13, the direct table management module applies to the virtual space management module for a mapping relationship between the GVA and the LVA of the second storage device, and determines the LVA according to the mapping relationship between the GVA and the LVA of the second storage device.

[0173] Step P14, if the second mapping table of the second storage device has not been created, the direct table management module notifies the network card of the second storage device, creates the second mapping table of the second storage device according to LVA, and sets the valid status information of the second mapping table to valid, and the direct table management module obtains the PageTableID of the second mapping table of the second storage device.

[0174] Step P15: The direct table management module creates a first mapping table for the second storage device.

[0175] The through table management module may convert the GVA in the initial first mapping table into the LVA according to the received initial first mapping table and the mapping relationship between the GVA and the LVA of the second storage device to obtain the first mapping table of the second storage device.

[0176] In step P16, the direct table management module sends the first mapping table of the second storage device to the network card driver of the second storage device.

[0177] In step P17, the network card driver sends the first mapping table of the second storage device to the network card of the second storage device, so that the network card of the second storage device saves the first mapping table of the second storage device.

[0178] If the processor to which the network card driver belongs is connected to multiple network cards, the network card driver sends the first mapping table of the second storage device to the multiple network cards respectively.

[0179] In some embodiments, a data storage system includes multiple storage devices. When a processor of a storage device fails, the second mapping table stored in the memory of the processor is cleared, and the services executed by the storage device can be taken over by other storage devices. For example, as shown in FIG11 , when a processor of a first storage device fails, the second mapping table stored in the memory of the processor of the first storage device is cleared, and the services executed by the first storage device can be taken over by the second storage device. For example, the second mapping table of the first storage device can be stored in the memory of the processor of the second storage device, and the first mapping table of the first storage device can be stored in the memory of the network interface card of the second storage device. When a first computing device needs to access the memory array of the first storage device, but the first computing device is unable to send a read operation request to the processor of the first storage device, the first computing device can send a read operation request for the first storage device to the second storage device. The network interface card of the second storage device can query the first mapping table and the second mapping table of the first storage device based on the target logical address carried in the read operation request, determine the target physical address, and based on the target physical address, access the memory array of the first storage device via the network, read data from the memory array of the first storage device, and return it to the first computing device. At this time, the service volume of the network card of the second storage device will increase by about one-fold, and the capacity of the second mapping table stored in the processor of the second storage device will also increase by one-fold.

[0180] When the processor of the first storage device recovers, the services executed by the first storage device are switched back to the processor of the first storage device. At this time, the network card of the second storage device can set the valid status information of the second mapping table of the first storage device to an invalid state and set the mapping relationship corresponding to the virtual address in the second mapping table of the first storage device to an invalid state.

[0181] The second storage device is used as the source storage device, the first storage device is used as the target storage device, the first storage device is powered on, the network card of the first storage device sets the status information of the second mapping table to an invalid state, and then the services executed by the second storage device are restored to the first storage device. As shown in Figure 12, the process of restoring the services executed by the second storage device to the first storage device may include the following steps:

[0182] In step H1, the fault processing module of the second storage device notifies the direct table management module of the second storage device to set the second mapping table of the first storage device to an invalid state.

[0183] In step H2, the direct table management module of the second storage device notifies the network card driver of the second storage device to set the second mapping table of the first storage device to an invalid state.

[0184] In step H3, the network card driver of the second storage device notifies the network card of the second storage device, so that the network card of the second storage device sets the second mapping table of the first storage device stored in the network card to an invalid state.

[0185] In step H4, the fault processing module of the second storage device sends the second mapping table of the first storage device to the direct table management module of the first storage device.

[0186] In step H5, the direct table management module of the first storage device restores the second mapping table and the first mapping table of the first storage device, and sends the first mapping table of the first storage device to the network card driver of the first storage device.

[0187] In step H6, the network card driver of the first storage device sends the first mapping table of the first storage device to the network card of the first storage device for storage, and sets the validity status information of the second mapping table of the first storage device to a valid state.

[0188] Step H7: After determining that the second mapping table and the first mapping table of the first storage device are restored, the direct table management module of the first storage device sends a notification message of successful service takeover to the fault processing module of the second storage device.

[0189] In step H8, the fault processing module of the second storage device notifies the direct table management module of the second storage device to set the mapping relationship corresponding to the virtual address in the second mapping table of the first storage device stored in the processor of the second storage device to an invalid state.

[0190] The fault processing module, direct table management module and network card driver of the second storage device are set in the processor of the second storage device, and the direct table management module and network card driver of the first storage device are set in the processor of the first storage device.

[0191] In the above embodiment, a first mapping table storing mappings between logical addresses and virtual addresses is provided in the network interface card of the storage device. When executing a read operation request, the network interface card of the storage device can quickly query the first mapping table to determine the target virtual address of the read operation request. Based on the target virtual address, the second mapping table is then queried to determine the target physical address. This allows direct access to the memory array based on the target physical address, without requiring access to the processor of the storage device, thereby conserving processor computing resources. The first mapping table can utilize a linear partition mapping approach, thereby reducing the consumption of storage space in the network interface card memory.

[0192] The network interface card of the storage device also includes validity status information of the second mapping table at the controller granularity. By querying the validity status information of the second mapping table, it can be determined whether the first mapping table and the second mapping table need to be queried. If the validity status information of the second mapping table is invalid, the step of querying the first mapping table and the second mapping table is not performed, thereby avoiding wasting computing resources of the network interface card.

[0193] In other embodiments, a first mapping table may be stored in a network card of the computing device, where the first mapping table is used to store a mapping relationship between logical addresses and virtual addresses. When the data storage system includes multiple storage devices, the network card of the computing device may store a first mapping table corresponding to each storage device. That is, the network card of the computing device may store the first mapping tables of multiple storage devices.

[0194] When a network card of a computing device receives a read operation request from the computing device, it can query the target storage device's first mapping table for the target virtual address corresponding to the target logical address and query the target storage device's second mapping table for the target physical address corresponding to the target virtual address based on the target logical address and the target storage device's identifier carried in the read operation request. Data can then be read from the target storage device's storage space based on the target physical address. The second mapping table of the target storage device is used to store a mapping relationship between the target storage device's virtual address and its physical address. In an optional embodiment, the second mapping table of the target storage device can be stored in the computing device's network card. That is, in addition to storing the first mapping tables for multiple storage devices, the computing device's network card can also store the second mapping tables for multiple storage devices. In another optional embodiment, the second mapping table of the target storage device can be stored in the computing device's memory. That is, the computing device's memory can store the second mapping tables for multiple storage devices. The computing device's memory can be understood as the memory of the computing device's processor. The computing device's network card can access the computing device's memory via direct memory access (DMA) to query the target storage device's second mapping table.

[0195] In some embodiments, the network card of the computing device may further store the validity status information of the second mapping table of each storage device. For example, if the validity status information of the second mapping table of the first storage device is invalid, it indicates that the second mapping table of the first storage device is not accessible at the current moment.

[0196] Exemplarily, the data reading method executed by the network card of the computing device may include the following steps as shown in FIG13 :

[0197] S1301: Receive a third read operation request sent by a processor of a computing device, and obtain an identifier of a target storage device and a third target logical address in the third read operation request.

[0198] When a computing device needs to read data from a storage device, a storage application running on a processor of the computing device initiates a third read operation request. The third read operation request can be understood as any read operation request generated by the computing device. For example, the storage application initiates a third read operation request, which, after being processed by software such as a block device driver in the computing device, is sent to multipath software running on a processor of the computing device. If the data storage system includes multiple storage devices, the multipath software determines the target storage device to be accessed from the multiple storage devices based on a routing algorithm. For example, assuming that the data storage system includes storage device A and storage device B, the processor of the computing device can determine, based on the routing algorithm, that the storage device to be accessed by the third read operation request is storage device A, i.e., storage device A is the target storage device. The multipath software sends the third read operation request to the network card of the computing device, and the third read operation request carries the identifier of the target storage device.

[0199] The network interface card of the computing device receives the third read operation request, extracts the identifier of the target storage device carried in the third read operation request, and converts the host-side block device information in the third read operation request into array-side block device information based on a correspondence between the host-side block device information of the computing device and the array-side block device information of the target storage device, thereby obtaining a third target logical address of the third read operation request.

[0200] S1302, determine whether the second mapping table of the target storage device is valid; if yes, execute step S1303; if not, execute step S1309.

[0201] The network card of the computing device stores the validity status information of the second mapping table of each storage device. The network card of the computing device queries the validity status information of the second mapping table of the target storage device. If the validity status information of the second mapping table of the target storage device is valid, the step of querying the first mapping table of the target storage device in step S1303 is continued. If the validity status information of the second mapping table of the target storage device is invalid, the step of sending a third read operation request to the storage device in step S1309 is executed, and the processor of the storage device processes the third read operation request.

[0202] S1303, query whether the first mapping table of the target storage device contains the third target virtual address corresponding to the third target logical address; if yes, execute step S1304; if not, execute step S1309.

[0203] If the validity status information of the second mapping table of the target storage device is valid, the network card of the computing device queries the first mapping table of the target storage device. If the first mapping table of the target storage device contains a third target virtual address corresponding to the third target logical address, the network card of the computing device obtains the first target virtual address corresponding to the third target logical address and executes the step of querying the second mapping table of the target storage device in step S1304. If the third target virtual address corresponding to the third target logical address is not found in the first mapping table of the target storage device, the step of sending a third read operation request to the storage device is executed, and the processor of the storage device processes the third read operation request in step S1309.

[0204] S1304, query the second mapping table of the target storage device to determine whether the mapping relationship of the third target virtual address is valid; if yes, execute step S1305; if not, execute step S1309.

[0205] If the network card of the computing device queries the third target virtual address corresponding to the target logical address in step S1303, the storage network card queries the second mapping table of the target storage device to determine whether the second mapping table of the target storage device contains the mapping relationship of the third target virtual address; if the second mapping table of the target storage device contains the mapping relationship of the third target virtual address, and the valid status information of the mapping relationship of the third target virtual address is valid, then the step of determining the third target physical address corresponding to the third target virtual address in step S1305 is executed; if the mapping relationship of the first target virtual address is not queried in the second mapping table of the target storage device, or although the second mapping table of the target storage device contains the mapping relationship of the third target virtual address, the valid status information of the mapping relationship of the third target virtual address is invalid, then the step of sending the third read operation request to the storage device in step S1309 is executed, and the processor of the storage device processes the third read operation request.

[0206] S1305: Determine a third target physical address corresponding to the third target virtual address according to the mapping relationship of the third target virtual address.

[0207] If the second mapping table of the target storage device contains the mapping relationship of the third target virtual address, and the valid status information of the mapping relationship of the third target virtual address is valid, the network card of the computing device obtains the third target physical address corresponding to the third target virtual address in the second mapping table of the target storage device.

[0208] S1306: Read data from the storage space of the target storage device based on the third target physical address, and verify the read data.

[0209] After the network card of the computing device determines the third target physical address, it can add the third target physical address to a third read operation request and send it to the network card of the target storage device. The network card of the target storage device reads data from the memory array of the storage device based on the third target physical address in the received third read operation request and sends the data to the network card of the computing device. The network card of the computing device performs a DIF check on the data to determine the integrity of the read data and whether the read data is correct.

[0210] S1307, determine whether the verification is passed; if yes, execute step S1308; if not, execute step S1309.

[0211] S1308: Send the read data to the processor of the computing device.

[0212] If the verification passes, the network card of the computing device sends the read data to the processor of the computing device, or in other words, sends the data to the storage application in the processor of the computing device.

[0213] S1309: Send the third read operation request to the target storage device, and send the execution result returned by the target storage device to the processor of the computing device.

[0214] If the verification fails, the computing device's network card sends a third read operation request to the target storage device. The target storage device's network card receives the third read operation request and sends it to the target storage device. The target storage device processes the third read operation request, reads data from the target storage device's memory array based on the third read operation request, and sends an execution result, including the read data, to the computing device's network card via the target storage device's network card. The computing device's network card then transmits the read data to a storage application in the computing device's processor.

[0215] The first mapping table and the second mapping table of each storage device stored in the computing device may be sent to the computing device for storage after each storage device establishes the first mapping table and the second mapping table.

[0216] In some embodiments, a computing device can monitor the operating status of each storage device in the data storage system. When a processor failure or offline detection is detected for a storage device, the network interface card of the computing device can set the valid status information of the second mapping table of the storage device to invalid. For example, when the processor of a first storage device fails, the computing device can access the memory array of the first storage device through the processor of a second storage device. The second storage device can be any storage device in the data storage system other than the first storage device.

[0217] In the above embodiment, the processor of the target storage device may execute the third read operation request when any of the following conditions are met. These conditions may include: the validity status information of the second mapping table is invalid; the first target virtual address corresponding to the third target logical address is not found; the third target physical address corresponding to the first target virtual address is not found; the mapping relationship corresponding to the first target virtual address is invalid; or the read data fails verification. When any of the conditions are met, the processor of the target storage device executes the third read operation request, thereby ensuring the reliability of the data reading process.

[0218] In some embodiments, if the data storage system includes multiple computing devices, each storage device in the data storage system further stores a correspondence between virtual address information and the multiple computing devices. The correspondence between the virtual address information and the multiple computing devices may be stored in a processor of the storage device or in a network interface card of the storage device.

[0219] Taking the first storage device as an example, when the processor of the first storage device receives a write operation request for the fourth target virtual address, the data carried in the write operation request is first saved to the cache area of ​​the processor of the first storage device, and then written to the memory array of the first storage device when the disk flushing operation is executed. After the data carried in the write operation request is first saved to the cache area of ​​the processor of the first storage device, the processor of the first storage device can determine that there is data to be updated at the fourth target virtual address and the fourth target virtual address is invalid. At this time, the processor of the first storage device can send a notification message of the invalidation of the fourth target virtual address to each of the multiple computing devices through the network card of the first storage device based on the correspondence between the saved virtual address information and the multiple computing devices, without the need for message broadcasting. Among them, the first storage device can be any storage device in the data storage system. By setting the correspondence between the virtual address information and the multiple computing devices in the processor, the number of broadcast messages can be reduced.

[0220] After receiving the notification message of the invalidation of the fourth target virtual address, each computing device may set the validity information of the mapping relationship of the fourth target virtual address stored in the second mapping table of the first storage device to be invalid. In some embodiments, after receiving the notification message of the invalidation of the fourth target virtual address, the processor of the computing device may set the validity information of the mapping relationship of the fourth target virtual address stored in the second mapping table of the first storage device to be invalid. In other embodiments, after receiving the notification message of the invalidation of the fourth target virtual address, the network card of the computing device may set the validity information of the mapping relationship of the fourth target virtual address stored in the second mapping table of the first storage device to be invalid. If the second mapping table of the first storage device is stored in the processor memory of the computing device, the network card of the computing device may access the processor memory of the computing device through DMA to modify the validity information of the mapping relationship of the fourth target virtual address.

[0221] Still taking the first storage device as an example, when the first storage device performs a disk flushing operation, it assigns a corresponding physical address to each virtual address of the data to be written to the memory array, generating multiple mapping relationships between virtual addresses and physical addresses. The processor of the first storage device can send multiple mapping relationships between virtual addresses and physical addresses to each of the multiple computing devices through the network card of the first storage device based on the correspondence between the stored virtual address information and the multiple computing devices. After receiving the multiple mapping relationships between virtual addresses and physical addresses sent by the first storage device, each computing device can add the received multiple mapping relationships between virtual addresses and physical addresses to the second mapping table of the first storage device, and set the validity status information of each newly added virtual address mapping relationship to valid.

[0222] In the above embodiment, a first mapping table storing mappings between logical addresses and virtual addresses is provided in the network card of the computing device. When executing a read operation request, the network card of the computing device can quickly query the first mapping table to determine the target virtual address of the read operation request, and then query the second mapping table based on the target virtual address to determine the target physical address. This allows direct access to the memory array based on the target physical address, without going through the processor of the storage device, thereby conserving processor computing resources. The first mapping table can use a linear partition mapping method to reduce the consumption of storage space in the network card memory.

[0223] The network interface card of the computing device also includes valid status information of the second mapping table at the controller granularity. By querying the valid status information of the second mapping table, it can be determined whether the first mapping table and the second mapping table need to be queried. If the valid status information of the second mapping table is invalid, the step of querying the first mapping table and the second mapping table is not performed, thereby avoiding wasting computing resources of the network interface card.

[0224] Based on the same technical concept as the above-mentioned method embodiment, the present application also provides a data reading device in the embodiment. The data reading device can be installed in the network card of a computing device or the network card of a storage device, and the computing device and the storage device are communicatively connected. In some embodiments, as shown in Figure 14, the data reading device 1400 may include a request processing unit 1401 and a data reading unit 1402. The data reading device 1400 can be used to implement the functions of the above-mentioned method embodiment, thereby achieving the beneficial effects of the above-mentioned method embodiment.

[0225] Among them, the request processing unit 1401 can be used to obtain the first target logical address in the first read operation request when receiving the first read operation request; determine the first target physical address corresponding to the first target logical address; the data reading unit 1402 can be used to read the data indicated by the first read operation request from the storage space of the storage device based on the first target physical address.

[0226] It should be noted that, in other embodiments, the request processing unit 1401 can be used to execute any step in the data reading method, and the data reading unit 1402 can be used to execute any step in the data reading method. The steps that the request processing unit 1401 and the data reading unit 1402 are responsible for implementing can be specified as needed. The full functionality of the data reading device is achieved by having the request processing unit 1401 and the data reading unit 1402 respectively implement different steps in the data reading method.

[0227] The functional modules in the embodiments of the present application may be integrated into a processor, or each module may exist physically separately, or two or more modules may be integrated into a single module. The above-mentioned integrated modules may be implemented in the form of hardware or software functional units.

[0228] Based on the same technical concept as the above-mentioned method embodiment, the present application also provides a chip in an embodiment. The chip can be a computing chip and can be applied to a network interface card (NIC) of a computing device or a network interface card (NIC) of a storage device. The chip can be used to implement the functions of the above-mentioned method embodiment, thereby achieving the beneficial effects of the above-mentioned method embodiment.

[0229] In some embodiments, the structure of the chip 1500 may be as shown in FIG15 , including a processor 1501 and a power supply circuit 1502 connected to the processor 1501. The processor 1501 and the power supply circuit 1502 may be interconnected via a bus. The processor 1501 may be a digital signal processor (DSP), an ASIC, a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component or other specific integrated circuit, etc. The bus may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc. The power supply circuit 1502 is used to power the processor 1501 via the bus.

[0230] The processor 1501 can be connected to a memory provided outside the chip, or to a memory provided inside the chip, to run software programs and modules stored in the memory, thereby executing various functional applications and data processing of the chip 1500, such as the data reading method provided in the embodiment of the present application.

[0231] In some embodiments, processor 1501 may include one or more processing units. Different processing units may be independent devices or integrated into one or more processors. Processor 1501 may also include a controller that can generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution.

[0232] Based on the same technical concept as the above embodiment, the present application also provides a network card, which can be provided on a computing device or a storage device. The network card can be installed on a bus interface of the computing device or storage device. The network card can be used to implement the functions of the above method embodiment, thereby achieving the beneficial effects of the above method embodiment.

[0233] In some embodiments, the structure of the network card 1600 can be as shown in Figure 16, including a processor 1601 and a memory 1602 connected to the processor 1601. The processor 1601 and the memory 1602 can be connected to each other via a bus. The processor 1601 can be a general-purpose processor, such as a microprocessor, or other conventional processor. The bus can be a PCI bus or an EISA bus. The bus can be divided into an address bus, a data bus, a control bus, etc.

[0234] The memory 1602 can be understood as the memory of the network card 1600. The memory 1602 can be used to store software programs and modules. The processor 1601 executes the various functional applications and data processing of the terminal device 1600 by running the software programs and modules stored in the memory 1602, such as the data reading method provided in the embodiment of the present application.

[0235] The memory 1602 may primarily include a program storage area and a data storage area. The program storage area may store at least one application program, etc., and the data storage area may be used to store information such as the validity status of the first mapping table and the second mapping table. Furthermore, the memory 1602 may include high-speed random access memory and non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage device.

[0236] The processor 1601 in the network card 1600 is configured to execute computer instructions or programs stored in the memory 1602 and perform the functions described in any of the above-described method embodiments. In some embodiments, the processor 1601 may include one or more processing units, which may be independent devices or integrated into one or more processors. The processor 1601 may also include a controller that generates operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution.

[0237] It should be understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the acceleration device. In other embodiments of this application, the acceleration device may include more or fewer components than shown, or may combine or separate certain components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0238] Based on the same technical concept as the above-mentioned method embodiment, a storage device is also provided in the embodiment of the present application. The structure of the storage device can refer to the structure of the second storage device shown in Figure 11. In some embodiments, the storage device may include a network card and a memory, and the memory provides storage space for the storage device. In some embodiments, the memory may be the above-mentioned memory array. Among them, the network card can adopt the network card shown in Figure 16, and the network card can be used to execute a computer program. When receiving a first read operation request, the network card obtains the first target logical address in the first read operation request and determines the first target physical address corresponding to the first target logical address; illustratively, the network card can query the first target virtual address corresponding to the target logical address in the first mapping table; query the target physical address corresponding to the first target virtual address in the second mapping table; based on the first target physical address, read the data indicated by the first read operation request from the storage space of the storage device.

[0239] In some embodiments, the storage device further includes a processor, and the network card can communicate with the processor and the memory array via a computer bus. The second mapping table can be stored in the storage device, and the network card of the storage device can query the first target physical address corresponding to the first target virtual address in the second mapping table by means of DMA. If any of the following conditions is met: the second mapping table is invalid, the first target virtual address corresponding to the first target logical address is not found in the first mapping table, the mapping relationship of the first target virtual address is invalid, or the first target physical address corresponding to the first target virtual address is not found in the second mapping table, then the network card of the storage device can send the first read operation request to the processor, and the processor executes the first read operation request.

[0240] Based on the same technical concept as the above-mentioned method embodiment, a computing device is further provided in an embodiment of the present application. The structure of the computing device can refer to the structure of any computing device shown in Figure 1 or Figure 2. In some embodiments, the computing device may include a network card, and the network card may adopt the network card shown in Figure 16. The network card can be used to execute a computer program, and upon receiving a first read operation request, obtain the first target logical address in the first read operation request, and determine the first target physical address corresponding to the first target logical address in a first mapping table; illustratively, the network card can query the first target virtual address corresponding to the target logical address; query the target physical address corresponding to the first target virtual address in a second mapping table; and read the data indicated by the first read operation request from the storage space of the storage device based on the first target physical address.

[0241] In some embodiments, the computing device further includes a processor, and the network card and the processor can communicate via a computer bus. The processor is a core processor of the computing device, the second mapping table can be stored in a system memory of the computing device, and the network card of the computing device can query the first target physical address corresponding to the first target virtual address in the second mapping table via DMA.

[0242] Based on the same technical concept as the above-mentioned method embodiment, an embodiment of the present application also provides a data storage system. The structure of the data storage system can be as shown in Figure 1 or Figure 2, including one or more computing devices and one or more storage devices. The computing device can send a first read operation request to the storage device through the network card of the computing device, and receive the execution result returned by the storage device through the network card of the computing device. The storage device can receive the first read operation request sent by the computing device through the network card of the storage device, and send the execution result to the computing device through the network card of the storage device. The network card of the computing device or the network card of the storage device can be used to execute a computer program to implement the functions of the above-mentioned method embodiment.

[0243] The method steps in the embodiments of the present application can be implemented by hardware, or by a processor executing a computer program or instruction. The computer program or instruction can constitute a computer program product.

[0244] The present application also provides a computer program product comprising computer-executable instructions. In one embodiment, the computer-executable instructions are used to enable a computer to perform the functions of the above method embodiment.

[0245] Computer-executable instructions can be stored in a computer-readable storage medium. The present application also provides a computer-readable storage medium having executable instructions stored therein. In one embodiment, the computer-executable instructions are used to cause a computer to perform the functions of the above method embodiment.

[0246] The computer-readable storage medium provided in the embodiments of the present application may be a random access memory (RAM), a flash memory, a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a register, a hard disk, a mobile hard disk, a CD-ROM, or any other form of computer-readable storage medium known in the art.

[0247] Computer-executable instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium such as a floppy disk, hard disk, or magnetic tape; an optical medium such as a digital video disc (DVD); or a semiconductor medium such as a solid-state drive.

[0248] One or more of the above modules or units can be implemented in software, hardware, or a combination of the two. When any of the above modules or units is implemented in software, the software exists in the form of computer program instructions and is stored in a memory, and the processor can be used to execute the program instructions and implement the above method flow. The processor may include but is not limited to at least one of the following: a CPU, a microprocessor, a digital signal processor (DSP), a microcontroller unit (MCU), or an artificial intelligence processor, etc., and each computing device may include one or more cores for executing software instructions to perform calculations or processing. The processor may be built into an SoC, a DPU or an ASIC, or it may be an independent semiconductor chip. In addition to the core for executing software instructions for calculations or processing within the processor, it may further include necessary hardware accelerators, such as FPGAs, PLDs, or logic circuits for implementing dedicated logic operations.

[0249] When the above modules or units are implemented in hardware, the hardware can be any one or any combination of a CPU, a microprocessor, a DSP, an MCU, an artificial intelligence processor, an ASIC, a SoC, an FPGA, a PLD, a dedicated digital circuit, a hardware accelerator or a non-integrated discrete device, which can run the necessary software or not rely on the software to execute the above method flow.

[0250] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present application, and such modifications or substitutions should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A data reading method, characterized in that: Applied to a network card, the method comprises: Receive a first read operation request, and obtain a first target logical address in the first read operation request; Determine a first target physical address corresponding to the first target logical address; Based on the first target physical address, the data indicated by the first read operation request is read from the storage space of the storage device.

2. The method according to claim 1, characterized in that The determining the first target physical address corresponding to the first target logical address includes: Querying a first target virtual address corresponding to the first target logical address; Query a first target physical address corresponding to the first target virtual address.

3. The method according to claim 2, characterized in that The logical address is used as an index for the computing device to access the storage space of the storage device; the computing device is the computing device that generates the first read operation request; the virtual address is used as an index for the network card to access the storage space of the storage device; the physical address is used to point to any storage unit contained in the storage space of the storage device.

4. The method according to claim 2 or 3, characterized in that: The logical address includes a logical hard disk unit identifier LUN ID and a logical block address LBA; the virtual address is a local virtual address LVA or a global virtual address GVA; and the physical address is a physical address PA.

5. The method according to any one of claims 1 to 4, characterized in that: The first read operation request is generated by a computing device, and the computing device is connected to the storage device via a network, wherein: The network card is a network card of the computing device, and the network card communicates with the processor of the computing device via a computer bus; or The network card is a network card of the storage device, and the network card communicates with the processor of the storage device through a computer bus.

6. The method according to any one of claims 2 to 4, characterized in that: The network card is the network card of the storage device, the mapping relationship between the logical address and the virtual address is recorded in the first mapping table; the mapping relationship between the virtual address and the physical address is recorded in the second mapping table; The first mapping table is stored in the network card, the second mapping table is stored in the storage device, and the operation of querying the first target physical address corresponding to the first target virtual address includes: By means of direct memory access (DMA), a first target physical address corresponding to the first target virtual address is queried in a second mapping table.

7. The method according to any one of claims 2 to 4, characterized in that: The network card is a network card of a computing device, the mapping relationship between the logical address and the virtual address is recorded in a first mapping table; the mapping relationship between the virtual address and the physical address is recorded in a second mapping table; The first mapping table is stored in the network card, the second mapping table is stored in the system memory of the computing device, and the operation of querying the first target physical address corresponding to the first target virtual address includes: By means of DMA, the first target physical address corresponding to the first target virtual address is queried in the second mapping table.

8. The method according to any one of claims 2 to 7, characterized in that: The method further comprises: The network card receives the second read operation request, and when the second target virtual address corresponding to the second target logical address accessed by the second read operation request is not queried, then: sending the second read operation request to the storage device; Receive an execution result returned by the storage device; the execution result includes data read by the storage device from the storage space of the storage device based on the second read operation request.

9. The method according to any one of claims 2 to 8, characterized in that: The method further comprises: The network card receives a third read operation request, and when no third target virtual address corresponding to the third read operation request is found, target physical address, then: sending the third read operation request to the storage device; Receive an execution result returned by the storage device; the execution result includes data read by the storage device from the storage space of the storage device based on the third read operation request.

10. A data reading device, characterized in that: Applied to a network card, the device comprises: a request processing unit, configured to receive a first read operation request, obtain a first target logical address in the first read operation request, and determine a first target physical address corresponding to the first target logical address; A data reading unit is used to read the data indicated by the first read operation request from the storage space of the storage device based on the first target physical address.

11. The device according to claim 10, characterized in that The request processing unit is specifically used for: Querying a first target virtual address corresponding to the first target logical address; Query a first target physical address corresponding to the first target virtual address.

12. The device according to claim 10 or 11, characterized in that The first read operation request is generated by a computing device, and the computing device is connected to the storage device via a network, wherein: The network card is a network card of the computing device, and the network card communicates with the processor of the computing device via a computer bus; or The network card is a network card of the storage device, and the network card communicates with the processor of the storage device through a computer bus.

13. A chip, characterized in that: Applied to a network card, the chip comprises a processor and a power supply circuit; the power supply circuit is used to supply power to the processor, and the processor is used to execute a computer program to implement the method according to any one of claims 1 to 9.

14. A network card, characterized in that: A bus interface for installation in a device, wherein the network card comprises a memory and a processor, wherein a computer program is stored in the memory; and the processor is used to execute the computer program stored in the memory to implement the method according to any one of claims 1 to 9.

15. A storage device, characterized in that: It comprises a network card and a memory; the network card is used to execute a computer program to read data from the storage space of the memory by executing the method as described in any one of claims 1 to 4, 6, 8 to 9.

16. A computing device, characterized in that It comprises a network card; the computing device communicates with the storage device through the network card, and the network card is used to execute a computer program to implement the method as described in any one of claims 1 to 4 and 7 to 9.

17. A data storage system, characterized in that: It includes a storage device and a computing device; the computing device is connected to the storage device via a network; The storage device adopts the storage device described in claim 15, or the computing device adopts the computing device described in claim 16.

18. A computer-readable storage medium, characterized in that: Computer executable instructions are stored, and the computer executable instructions are used to make a computer execute the method according to any one of claims 1 to 9.

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