Electronic lock detection circuit, charging pile and vehicle

Abstract

An electronic lock detection circuit, comprising an electronic lock and a signal conversion circuit, wherein the electronic lock and the signal conversion circuit are located in the same detection circuit, and the signal conversion circuit is used for converting a collected signal of the electronic lock and then sending the signal to a processor.

Description

Electronic lock detection circuit, charging pile and vehicle

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on August 30, 2023, with application number 202311113889.X and application name “Electronic lock detection circuit, charging pile and vehicle”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the technical field of new energy vehicles, and in particular to an electronic lock detection circuit, a charging pile, and a vehicle. Background Art

[0003] A conventional electronic lock detection circuit is shown in Figure 1. The electronic locking device 20 includes an electronic lock 40 and an electronic lock feedback switch S2. The electronic lock detection circuit 10 provides power to the electronic lock. The electronic lock detection circuit 10 includes a switch S1 and a level conversion circuit 30. Switch S1 controls the power supply to the electronic lock. When switch S1, located in the power supply device or the electric vehicle's internal controller, is closed, the electronic lock's power supply is energized, causing the electronic lock to activate. Simultaneously, the coil drives the electronic lock's position feedback switch S2, which is then converted by the level conversion circuit in the controller, generating a level signal at the level conversion circuit's output terminal, Vo. The power supply device or the electric vehicle's internal controller uses the fluctuations in the level signal at Vo to determine whether the electronic lock has correctly locked the mechanical lock or is unlocked.

[0004] Summary of the Invention

[0005] The embodiments of the present application provide an electronic lock detection circuit, a charging pile, and a vehicle to solve the above-mentioned technical problems.

[0006] A first aspect of an embodiment of the present application provides an electronic lock detection circuit, comprising:

[0007] Electronic locks;

[0008] The signal conversion circuit is located in the same detection circuit as the electronic lock and the signal conversion circuit. The signal conversion circuit is used to convert the collected signal of the electronic lock and then send the signal to the processor.

[0009] Optionally, the signal conversion circuit includes an amplifying unit, which is used to amplify the collected signal of the electronic lock and then send the signal to the processor.

[0010] Optionally, the signal conversion circuit includes an isolation unit, which is used to isolate the collected signal of the electronic lock and then send the signal to the processor.

[0011] Optionally, the signal conversion circuit includes an amplifying unit and an isolating unit, the amplifying unit is used to amplify the collected signal of the electronic lock, and the isolating unit is used to isolate the amplified signal and then send the signal to the processor.

[0012] Optionally, the amplification unit includes a resistor R3, a resistor R4 and an operational amplifier U2, the first end of the resistor R3 is the input end of the signal conversion circuit, the second end of the resistor R3 is connected to the inverting input end of the operational amplifier U2 and the first end of the resistor R4, the second end of the resistor R4 is connected to the output end of the operational amplifier U2, the non-inverting input end of the operational amplifier U2 is connected to the reference bias voltage, and the output end of the operational amplifier U2 is the output end of the amplification module.

[0013] Optionally, the isolation unit includes a resistor R6, a resistor R7, a second switch and a photocoupler U3, the resistor R6, the second switch and the transmitting end of the photocoupler U3 form a first series branch, the resistor R7 and the receiving end of the photocoupler U3 form a second series branch, and the control end of the second switch is the input end of the isolation unit.

[0014] Optionally, the second switch is an NMOS tube Q1, the gate of the NMOS tube Q1 is the control end of the second switch, the source of the NMOS tube Q1 is grounded, the drain of the NMOS tube Q1 is connected to the negative electrode of the emitter end of the photoelectric coupler U3, the positive electrode of the emitter end of the photoelectric coupler U3 is connected to the first end of the resistor R6, the second end of the resistor R6 is connected to a preset voltage, the collector of the emitter end of the photoelectric coupler U3 is connected to the second end of the resistor R7 and constitutes the output end of the isolation unit, the first end of the resistor R7 is connected to the preset voltage, and the emitter of the emitter end of the photoelectric coupler U3 is connected to the ground.

[0015] Optionally, the electronic lock detection circuit further includes:

[0016] A voltage sampling unit is connected to the electronic lock and is used to collect the voltage signal of the electronic lock.

[0017] Optionally, the electronic lock detection circuit further includes:

[0018] A voltage following unit is located between the voltage sampling unit and the signal conversion circuit, and is used to keep the signal of the electronic lock unchanged and transmit the signal of the electronic lock to the signal conversion circuit.

[0019] Optionally, the input end of the voltage follower unit is connected to the voltage sampling unit, and the output end of the voltage follower unit is connected to the signal conversion circuit;

[0020] The voltage follower unit includes an operational amplifier U1, the non-inverting input terminal of the operational amplifier U1 is the input terminal of the voltage follower unit, the inverting input terminal of the operational amplifier U1 is connected to the output terminal of the operational amplifier U1, and the output terminal of the operational amplifier U1 is the output terminal of the voltage follower unit.

[0021] Optionally, the first switch is located between the power supply terminal and the electronic lock;

[0022] Alternatively, the first switch is located between the electronic lock and the signal conversion circuit.

[0023] A second aspect of an embodiment of the present application provides a charging pile, comprising the electronic lock detection circuit and a processor described in the first aspect, wherein the processor is connected to the signal conversion circuit.

[0024] A third aspect of an embodiment of the present application provides a vehicle, comprising the electronic lock detection circuit and a processor described in the first aspect, wherein the processor is connected to the signal conversion circuit.

[0025] The technical effect of the embodiment of the present application is: by setting an electronic lock detection circuit to replace the electronic lock feedback switch in the prior art, the voltage signal generated by the electronic lock is converted and processed by the internal circuit signal to determine whether the electronic lock is locked. Compared with the existing circuit, the circuit structure is simple, the number of circuit components is small, and the circuit power consumption is low, which can reduce the manufacturing cost. There is no need to energize or de-energize the coil to control the electronic lock feedback switch, which avoids the problem of failure of the electronic lock feedback switch to detect the electronic lock status, thereby improving the reliability of electronic lock detection. In addition, all components can use surface mount components, the entire circuit is extremely small, and can be processed into thick film modules or circuit components, which is convenient for the installation and welding of components. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0027] FIG1 is a schematic structural diagram of an electronic lock power supply device provided by the prior art;

[0028] FIG2 is a schematic structural diagram of an electronic lock detection circuit provided in Example 1 of the present application;

[0029] FIG3 is a schematic structural diagram of an electronic lock detection circuit provided in Example 2 of the present application;

[0030] FIG4 is another structural diagram of an electronic lock detection circuit provided in Example 2 of the present application;

[0031] FIG5 is a schematic structural diagram of an electronic lock detection circuit provided in Example 3 of the present application;

[0032] FIG6 is a circuit diagram of an electronic lock detection circuit provided in Example 4 of the present application;

[0033] FIG7 is a circuit diagram of an electronic lock detection circuit provided in Example 5 of the present application;

[0034] FIG8 is a circuit diagram of an electronic lock detection circuit provided in Example 6 of the present application;

[0035] FIG9 is a schematic structural diagram of a charging pile provided in Example 7 of the present application;

[0036] In the figure: 10, electronic lock detection circuit; 40, electronic lock; 101, first switch; 102, power supply end; 103, voltage sampling unit; 104, voltage following unit; 105, signal conversion circuit; 110, amplification unit; 120, isolation unit; 130, second switch; 200, processor. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0038] It should be understood that the present application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to make the disclosure thorough and complete and to fully convey the scope of the present application to those skilled in the art. In the drawings, the dimensions and relative dimensions of layers and regions may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0039] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it may be directly on, adjacent to, connected to, or coupled to the other element or layer, or there may be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there may be no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part.

[0040] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," etc., may be used herein for convenience of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the drawings is turned over, then the elements or features described as "under" or "beneath" or "beneath" the other elements will be oriented as "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both the upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or in other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0041] The purpose of the terms used herein is only to describe specific embodiments and is not intended to limit the present application. When used herein, the singular forms "a", "an", and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0042] In order to fully understand the present application, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed by the present application. The preferred embodiments of the present application are described in detail below. However, in addition to these detailed descriptions, the present application may also have other implementation methods.

[0043] Currently, electric vehicle charging systems primarily include AC and DC charging systems. GB / T 18787.1-2015 Electric Vehicle Conductive Charging System requires that the vehicle interface have a locking function to prevent accidental disconnection during charging. Existing technologies present the following technical issues: As shown in Figure 1, the electronic lock feedback switch S2 typically uses a physical switch such as a relay, resulting in high cost. Furthermore, the electronic lock utilizes a coil to activate the electronic lock feedback switch S2, which is prone to sticking or failing to conduct, making it impossible to accurately detect the electronic lock's status.

[0044] Example 1

[0045] Embodiment 1 of the present application provides an electronic lock detection circuit to solve the problems of high cost and poor reliability caused by the use of electronic lock feedback switches in the prior art.

[0046] The technical solution provided in the first embodiment of the present application, as shown in FIG2 , provides an electronic lock detection circuit 10, comprising:

[0047] Electronic lock 40;

[0048] The signal conversion circuit 105 , the electronic lock 40 and the signal conversion circuit 105 are located in the same detection circuit. The signal conversion circuit 105 is used to convert the collected signal of the electronic lock 40 and then send the signal to the processor 200 .

[0049] When the electronic lock detection circuit is turned on, the voltage signal or current signal of the electronic lock 40 can be collected by voltage or current acquisition; specifically, the state of the electronic lock 40 is obtained by setting a sampling resistor to collect the voltage signal of the electronic lock 40.

[0050] The signal conversion circuit 105 processes the collected signal from the electronic lock 40 to make it suitable for the locked state of the electronic lock 40 being detected. Regarding the processing methods: The first processing method of the signal conversion circuit 105 is to amplify and transform the collected signal from the electronic lock 40. Specifically, the circuit further amplifies the collected analog signal from the electronic lock 40 using an inverting proportional operational amplifier circuit. By adjusting the ratio of the input resistor and the feedback resistor, the amplification factor can be adjusted, making the design more flexible. The final output analog signal can be used to detect the locked state of the electronic lock 40, thereby enabling the processor 200 to detect the state of the electronic lock 40. The second processing method of the signal conversion circuit 105 is to achieve isolation between the input and output signals by using isolation devices such as optocouplers, ensuring electrical isolation between the input and output signals and improving the safety and reliability of the circuit. The high and low level changes of the output signal at the output terminal can reflect the locked state of the electronic lock 40, thereby enabling the processor 200 to monitor the state of the electronic lock 40. The third processing mode of the signal conversion circuit 105 is to combine the first processing mode and the second processing mode, further amplify the collected analog signal of the electronic lock 40, isolate it and output it, thereby enabling the processor 200 to monitor the status of the electronic lock 40.

[0051] The technical effect of the first embodiment of the present application is that: by setting an electronic lock detection circuit to replace the electronic lock feedback switch in the prior art, the voltage signal generated by the electronic lock is converted and processed by the internal circuit signal to determine whether the electronic lock is locked. Compared with the existing circuit, the circuit structure is simple, the number of circuit components is small, and the circuit power consumption is low, which can reduce the manufacturing cost. There is no need to energize or de-energize the coil to control the electronic lock feedback switch, which avoids the problem of failure of the electronic lock feedback switch to detect the electronic lock status, thereby improving the reliability of electronic lock detection. In addition, all components can use surface mount components, the entire circuit is extremely small, and can be processed into a thick film module or circuit assembly, which is convenient for the installation and welding of components.

[0052] Example 2

[0053] A second embodiment of the present application provides an electronic lock detection circuit. A first switch is provided in the electronic lock detection circuit, and the electronic lock is powered on and off by controlling the first switch.

[0054] The technical solution provided in Example 2 of the present application is based on the technical solution provided in Example 1. As shown in Figures 3 and 4, the electronic lock detection circuit also includes a first switch 101, wherein the power supply end 102, the first switch 101, the electronic lock 40 and the signal conversion circuit 105 form a detection loop.

[0055] When the first switch 101 is turned on, the electronic lock detection circuit is turned on, thereby providing power to the electronic lock 40, allowing the electronic lock 40 to operate normally. When the first switch 101 is turned off, the electronic lock detection circuit is disconnected, and the power supply terminal 102 stops supplying power to the electronic lock 40, thereby disconnecting the electronic lock 40 and causing it to stop operating.

[0056] As for the connection mode of the first switch, as an implementation mode, as shown in FIG. 3 , the first switch 101 is located between the power supply terminal 102 and the electronic lock 40 .

[0057] In another embodiment of the connection mode of the first switch, as shown in FIG. 4 , the first switch 101 is located between the electronic lock 40 and the signal conversion circuit 105 .

[0058] The technical effect of setting the first switch in the second embodiment is that by setting the first switch, the power on and off of the electronic lock can be conveniently controlled, thereby achieving control of the electronic lock, while improving security and providing a more flexible application method of the electronic lock.

[0059] Example 3

[0060] A third embodiment of the present application provides an electronic lock detection circuit, which improves the quality of a transmitted voltage signal by providing a voltage follower unit in the electronic lock detection circuit.

[0061] The technical solution provided in the third embodiment of the present application is based on the technical solution provided in the first embodiment. As shown in FIG5 , the electronic lock detection circuit 10 further includes:

[0062] The voltage sampling unit 103 is connected to the electronic lock 40 and is used to collect the voltage signal of the electronic lock 40 .

[0063] The voltage sampling unit 103 may be a voltage collection device such as a sampling resistor.

[0064] The electronic lock detection circuit 10 further includes:

[0065] The voltage follower unit 104 is located between the voltage sampling unit 103 and the signal conversion circuit 105 , and is used to keep the voltage signal of the electronic lock 40 unchanged and transmit the voltage signal of the electronic lock 40 .

[0066] The voltage follower unit 104 is used to maintain a constant voltage during signal transmission within the circuit, while simultaneously increasing input resistance and reducing input signal voltage loss, thereby improving signal quality and signal-to-noise ratio. The input signal is tracked in real time, replicated, and proportionally amplified for output, ensuring that the voltage ratio between the output signal and the input signal remains constant, achieving the purpose of signal transmission.

[0067] As a preferred embodiment, as shown in FIG5 , the power supply terminal 102 , the first switch 101 , the electronic lock 40 , the voltage sampling unit 103 , the voltage following unit 104 , and the signal conversion circuit 105 form a detection loop.

[0068] The technical effect of providing a voltage follower unit in this third embodiment is that the voltage follower unit acts as a voltage stabilizer in the circuit, ensuring that the voltage signal of the electronic lock remains unchanged during transmission. This ensures that the voltage signal received by the electronic lock is stable and unaffected by external interference or circuit changes, thereby ensuring the stable operation of the electronic lock. During signal transmission, signal voltage loss may occur. The voltage follower unit can effectively reduce signal voltage loss, ensuring that the signal remains accurate and complete during transmission in the circuit. The voltage follower unit maintains signal stability and reduces signal voltage loss, thereby improving signal quality and signal-to-noise ratio.

[0069] Example 4

[0070] A fourth embodiment of the present application provides an electronic lock detection circuit, which amplifies the voltage signal of the electronic lock through a signal conversion circuit and then outputs a voltage detection signal.

[0071] The technical solution provided in the fourth embodiment of the present application is based on the technical solution provided in the first embodiment. As shown in FIG6 , the voltage sampling unit 103 includes a sampling resistor R2 , a first end of the sampling resistor R2 is connected to the electronic lock 40 , and a second end of the sampling resistor R2 is grounded.

[0072] The voltage follower unit 104 includes an operational amplifier U1 , a non-inverting input terminal of the operational amplifier U1 is connected to a first terminal of the sampling resistor R2 , and an inverting input terminal of the operational amplifier U1 is connected to an output terminal of the operational amplifier U1 .

[0073] The signal conversion circuit 105 amplifies the voltage signal of the electronic lock 40 and outputs it; the input end of the signal conversion circuit 105 is connected to the output end of the voltage follower unit 104; the signal conversion circuit 105 includes an amplification unit 110, which is used to amplify the collected signal of the electronic lock 40 and send the signal to the processor 200. The amplification unit 110 includes a resistor R3, a resistor R4 and an operational amplifier U2. The first end of the resistor R3 is the input end of the signal conversion circuit 105, the second end of the resistor R3 is connected to the inverting input end of the operational amplifier U2 and the first end of the resistor R4, the second end of the resistor R4 is connected to the output end of the operational amplifier U2, and the non-inverting input end of the operational amplifier U2 is connected to the reference bias voltage.

[0074] When the switch S1 is closed, the switch S1 , the electronic lock 40 , the voltage sampling unit 103 , the voltage following unit 104 , and the signal conversion circuit 105 form a loop. The sampling resistor R2 obtains the voltage signal of the electronic lock 40 by sampling the divided voltage in the loop.

[0075] The voltage follower unit 104 uses an operational amplifier U1 to amplify the voltage signal input to the electronic lock 40 and follow its changes, outputting a signal of the same magnitude but with a voltage gain of 1. The voltage follower unit 104 can effectively increase the input resistance of the signal, reduce the loss of the input signal voltage, and improve the signal-to-noise ratio.

[0076] The signal conversion circuit 105 is an inverting proportional operational amplifier circuit consisting of a second operational amplifier U2 and resistors R3 and R4. The non-inverting input of the second operational amplifier U2 is connected to the Vref reference bias voltage. The input signal of the inverting proportional operational amplifier circuit is amplified by utilizing the virtual short and virtual open high open-loop characteristics of the second operational amplifier U2, outputting an analog value Vo. By controlling the closing or opening of switch S1, changes in the analog value at the Vo terminal are detected, thereby determining the locked state of the electronic lock 40. Resistors R3 and R4 can be used to appropriately adjust the input signal amplification ratio according to actual needs, thereby outputting the analog value Vo at an appropriate ratio.

[0077] The technical effects of the fourth embodiment are as follows: the signal conversion circuit uses an inverting proportional operational amplifier circuit of an operational amplifier, which can provide high-precision signal amplification and conversion, ensuring the accuracy and stability of the output signal; the signal conversion circuit uses the virtual short and virtual open characteristics of the operational amplifier, which can effectively reduce the effects of nonlinear distortion and temperature drift of the circuit, thereby improving the performance of the circuit; after the input signal of the signal conversion circuit is amplified, the output analog signal can very sensitively reflect the changes in the input signal, so that the locking state of the electronic lock can be accurately detected; the resistors R3 and R4 of the signal conversion circuit can be appropriately adjusted according to actual needs to change the amplification ratio of the input signal, making the design selection more flexible.

[0078] Example 5

[0079] A fifth embodiment of the present application provides an electronic lock detection circuit, which isolates the voltage signal of the electronic lock through a signal conversion circuit and then outputs a voltage detection signal.

[0080] The technical solution provided in the fifth embodiment of the present application is based on the technical solution provided in the first embodiment. As shown in FIG7 , the signal conversion circuit 105 isolates the voltage signal of the electronic lock 40 and outputs the signal; the input end of the signal conversion circuit 105 is connected to the output end of the voltage follower unit 104;

[0081] The signal conversion circuit 105 includes an isolation unit 120, which is used to isolate the collected signal of the electronic lock 40 and then send the signal to the processor 200. The isolation unit 120 includes a resistor R6, a resistor R7, a second switch 130 and a photoelectric coupler U3. The resistor R6, the second switch 130, and the transmitting end of the photoelectric coupler U3 form a first series branch, and the resistor R7 and the receiving end of the photoelectric coupler U3 form a second series branch. The control end of the second switch 130 is the input end of the signal conversion circuit.

[0082] The second switch 130 may be a switch tube, which may be located at the positive terminal of the transmitting end of the photoelectric coupler U3 or at the negative terminal of the transmitting end of the photoelectric coupler U3.

[0083] As an embodiment, the second switch 130 is an NMOS transistor Q1, and the signal conversion circuit 105 includes a resistor R5, a resistor R6, a resistor R7, an NMOS transistor Q1 and a photoelectric coupler U3. The first end of the resistor R3 is the input end of the signal conversion circuit 105, the second end of the resistor R3 is connected to the gate of the NMOS transistor Q1, the source of the NMOS transistor Q1 is grounded, the drain of the NMOS transistor Q1 is connected to the negative electrode of the emitter end of the photoelectric coupler U3, the positive electrode of the emitter end of the photoelectric coupler U3 is connected to the first end of the resistor R6, the second end of the resistor R6 is connected to the power supply end 102, the collector of the emitter end of the photoelectric coupler U3 is connected to the second end of the resistor R7 and constitutes the output end of the signal conversion circuit 105, the first end of the resistor R7 is connected to the power supply end 102, and the emitter end of the photoelectric coupler U3 is connected to the ground.

[0084] Among them, the resistor R6, the emitter of the optocoupler U3, and the NMOS transistor Q1 form I DS The resistor R7 and the receiving end of the optocoupler U3 form I CE Loop. Resistor R6 is I DS The current limiting resistor in the loop is used to protect the optocoupler U3 and the NMOS transistor Q1 from damage due to overcurrent. The collector of the receiving end of the optocoupler U3, one end of the resistor R7 and the Vo signal output end are connected. The resistor R7 is a pull-up resistor. When the optocoupler U3 is not conducting, the Vo signal output end is clamped at a high level through the resistor R7; when the optocoupler U3 is conducting, the Vo signal output end generates a low level, and the resistor R7 is at I CE The circuit acts as a current limiter. By controlling the closing or opening of the first switch S1, the voltage level change at the Vo signal output terminal is detected, thereby determining the locked state of the electronic lock 40. Because the optocoupler U3 transmits electrical signals using light as a medium, it provides good isolation between input and output signals. This effectively achieves electrical isolation between the signal conversion circuit 105 and the processor 200, allowing for greater design flexibility.

[0085] The technical effect of the fifth embodiment of the present application is that the optocoupler in the signal conversion circuit serves as a medium for signal isolation, which can effectively isolate the input and output signals, protect the processor and the detection circuit, and improve the reliability of the system; the current limiting resistor R6 is used to protect the optocoupler U3 and the NMOS transistor Q1 to prevent damage to the devices due to overcurrent, thereby improving the reliability and stability of the circuit.

[0086] Example 6

[0087] A sixth embodiment of the present application provides an electronic lock detection circuit, which amplifies and isolates the voltage signal of the electronic lock through a signal conversion circuit and then outputs a voltage detection signal.

[0088] The technical solution provided in Example 6 of the present application is based on the technical solution provided in Example 1. As shown in Figure 8, the signal conversion circuit 105 amplifies and isolates the voltage signal of the electronic lock 40 and then outputs it; the input end of the signal conversion circuit 105 is connected to the output end of the voltage follower unit 104.

[0089] The signal conversion circuit 105 includes an amplifying unit 110 and an isolating unit 120. The amplifying unit 110 is used to amplify the signal collected from the electronic lock 40, and the isolating unit 120 is used to isolate the amplified signal and send the signal to the processor 200. The amplifying unit 110 includes a resistor R3, a resistor R4, and an operational amplifier U2. The isolating unit 120 includes a resistor R6, a resistor R7, an NMOS transistor Q1, and an optocoupler U3. The signal conversion circuit 105 also includes a resistor R5. The first end of the resistor R3 is the input end of the signal conversion circuit 105. The second end of the resistor R3 is connected to the inverting input end of the operational amplifier U2 and the first end of the resistor R4. The second end of the resistor R4 is connected to the output end of the operational amplifier U2. The non-inverting input end of the operational amplifier U2 is connected to the reference bias voltage. The first end of the resistor R3 is connected to the operational amplifier U2. The output end of the signal conversion circuit 105 is connected to the output end of the signal conversion circuit 105, the second end of the resistor R3 is connected to the gate of the NMOS transistor Q1, the source of the NMOS transistor Q1 is grounded, the drain of the NMOS transistor Q1 is connected to the negative electrode of the emitter end of the photoelectric coupler U3, the positive electrode of the emitter end of the photoelectric coupler U3 is connected to the first end of the resistor R6, the second end of the resistor R6 is connected to the power supply terminal 102, the collector of the emitter end of the photoelectric coupler U3 is connected to the second end of the resistor R7 and constitutes the output end of the signal conversion circuit 105, the first end of the resistor R7 is connected to the power supply terminal 102, and the emitter of the emitter end of the photoelectric coupler U3 is connected to the ground.

[0090] The voltage signal from electronic lock 40 enters an inverting proportional operational amplifier circuit consisting of a second op amp U2, resistors R3, and resistor R4, where it is proportionally amplified. The amplified signal then enters optocoupler U3. When optocoupler U3 is off, the Vo signal output is clamped to a high level via resistor R7. When optocoupler U3 is on, the Vo signal output generates a low level. Because optocouplers use light as a medium for transmitting electrical signals, they effectively isolate input and output signals, preventing mutual interference. By controlling the closed or open state of switch S1, processor 200 detects changes in the voltage level at the Vo terminal and uses this to determine the locked state of electronic lock 40.

[0091] The technical effect of the sixth embodiment of the present application is that the voltage signal is amplified and transformed using an inverting proportional operational amplifier circuit, which can amplify the amplitude of the input signal to an appropriate range for subsequent processing and detection. By using a photocoupler as the transmission medium for input and output signals, effective isolation of the input and output electrical signals can be achieved, mutual interference between the input and output can be avoided, and the reliability and stability of the system can be improved. The inverting proportional operational amplifier circuit is composed of an adjustable resistor, and the amplification ratio of the input signal can be flexibly adjusted according to actual needs, thereby outputting an analog signal of appropriate proportion. At the same time, the locking state of the electronic lock can be detected by using a switch for control. In I DS A current limiting resistor is used in the circuit to protect the optocoupler and NMOS transistor from overcurrent damage. CE Pull-up resistors and current-limiting resistors are used in the loop to effectively protect the stability and reliability of the system.

[0092] Example 7

[0093] Embodiment 7 of the present application provides a charging pile, comprising the electronic lock detection circuit and processor provided in embodiments 1 to 6, wherein the processor is connected to the signal conversion circuit.

[0094] The technical solution provided in Example 7 of the present application, when the electronic lock detection circuit is set in the charging pile, for example, when it is set in the charging gun or the charging pile body, can realize the detection of the status of the electronic lock during the DC charging of the vehicle.

[0095] The technical solution provided in the seventh embodiment of the present application is based on the technical solution provided in the first embodiment. As shown in FIG9 , the charging pile further includes:

[0096] The processor 200 has an input end connected to the output end of the signal conversion circuit 105 and an output end connected to the control end of the first switch 101, and is used to control the locking state of the electronic lock 40 through a voltage detection signal when the first switch 101 is turned on or off.

[0097] The processor 200 is connected to the control terminal of the switch 101 via its output terminal and can control the on / off state of the first switch 101. When the processor 200 controls the on / off state of the first switch 101, it detects a level change at the output terminal of the signal conversion circuit 105 and determines the locked state of the electronic lock 40. If the first switch 101 is controlled to be on, the signal at the output terminal of the detection signal conversion circuit 105 is a high level, and the electronic lock 40 is determined to be in the locked state; if the first switch 101 is controlled to be off, the signal at the output terminal of the detection signal conversion circuit 105 is a low level, and the electronic lock 40 is determined to be in the unlocked state. By controlling the on / off state of the first switch 101, the processor can effectively control the state of the electronic lock 40 and detect the signal at the output terminal of the signal conversion circuit 105 in real time to obtain the state of the electronic lock 40, thereby achieving management and control of the electronic lock 40.

[0098] The technical effect of the seventh embodiment is that by setting a processor in the charging pile to control the on or off of the switch, the on / off state of the electronic lock can be remotely controlled, and the signal conversion circuit can detect the locking state of the electronic lock in real time, and the usage status of the electronic lock can be obtained at any time, thereby enhancing the management and security of the electronic lock.

[0099] Example 8

[0100] Embodiment 8 of the present application provides a vehicle, comprising the electronic lock circuit and processor provided in embodiments 1 to 6, wherein the processor is connected to a signal conversion circuit.

[0101] The technical solution provided in Example 8 of the present application, when the electronic lock detection circuit is set in the vehicle, for example, at the charging port, can detect the status of the electronic lock during AC charging of the vehicle.

[0102] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the scope of protection of the present application.

Claims

1. An electronic lock detection circuit (10), characterized in that: include: Electronic lock (40); A signal conversion circuit (105), wherein the electronic lock (40) and the signal conversion circuit (105) are located in the same detection circuit, and the signal conversion circuit (105) is used to convert the collected signal of the electronic lock (40) and then send the signal to the processor (200).

2. The electronic lock detection circuit according to claim 1, characterized in that: The signal conversion circuit (105) comprises an amplifying unit (110), and the amplifying unit (110) is used to amplify the collected signal of the electronic lock (40) and then send the signal to the processor (200).

3. The electronic lock detection circuit as claimed in claim 1, characterized in that: The signal conversion circuit (105) comprises an isolation unit (120), and the isolation unit (120) is used to isolate the collected signal of the electronic lock (40) and then send the signal to the processor (200).

4. The electronic lock detection circuit according to claim 1, characterized in that: The signal conversion circuit (105) comprises an amplifying unit (110) and an isolating unit (120), wherein the amplifying unit (110) is used to amplify the signal collected from the electronic lock (40), and the isolating unit (120) is used to isolate the amplified signal and then send the signal to the processor (200).

5. The electronic lock detection circuit according to claim 2 or 4, characterized in that: The amplification unit (110) comprises a resistor R3, a resistor R4 and an operational amplifier U2, wherein the first end of the resistor R3 is the input end of the signal conversion circuit, the second end of the resistor R3 is connected to the inverting input end of the operational amplifier U2 and the first end of the resistor R4, the second end of the resistor R4 is connected to the output end of the operational amplifier U2, the non-inverting input end of the operational amplifier U2 is connected to a reference bias voltage, and the output end of the operational amplifier U2 is the output end of the amplification unit (110).

6. The electronic lock detection circuit according to claim 3 or 4, characterized in that: The isolation unit (120) comprises a resistor R6, a resistor R7, a second switch (130) and a photoelectric coupler U3; the resistor R6, the second switch (130) and a transmitting end of the photoelectric coupler U3 form a first series branch; the resistor R7 and a receiving end of the photoelectric coupler U3 form a second series branch; and the control end of the second switch (130) is an input end of the isolation unit (120).

7. The electronic lock detection circuit as claimed in claim 6, characterized in that: The second switch (130) is an NMOS tube Q1, the gate of the NMOS tube Q1 is the control end of the second switch (130), the source of the NMOS tube Q1 is grounded, the drain of the NMOS tube Q1 is connected to the negative electrode of the emitter end of the photoelectric coupler U3, the positive electrode of the emitter end of the photoelectric coupler U3 is connected to the first end of the resistor R6, the second end of the resistor R6 is connected to a preset voltage, the collector of the emitter end of the photoelectric coupler U3 is connected to the second end of the resistor R7 and constitutes the output end of the isolation unit, the first end of the resistor R7 is connected to the preset voltage, and the emitter of the emitter end of the photoelectric coupler U3 is connected to the ground.

8. The electronic lock detection circuit according to any one of claims 1 to 7, characterized in that: The electronic lock detection circuit (10) further comprises: A voltage sampling unit (103) is connected to the electronic lock (40) and is used to collect a voltage signal of the electronic lock (40).

9. The electronic lock detection circuit according to any one of claims 1 to 8, characterized in that: The electronic lock detection circuit (10) further comprises: A voltage following unit (104) is located between the voltage sampling unit (103) and the signal conversion circuit (105), and is used to keep the signal of the electronic lock (40) unchanged and transmit the signal of the electronic lock (40) to the signal conversion circuit (105).

10. The electronic lock detection circuit according to claim 9, characterized in that: The input end of the voltage follower unit (130) is connected to the voltage sampling unit (103), and the output end of the voltage follower unit (104) is connected to the signal conversion circuit (105); The voltage follower unit (130) comprises an operational amplifier U1, the non-inverting input terminal of the operational amplifier U1 is the input terminal of the voltage follower unit, the inverting input terminal of the operational amplifier U1 is connected to the output terminal of the operational amplifier U1, and the output terminal of the operational amplifier U1 is the output terminal of the voltage follower unit (130).

11. The electronic lock detection circuit according to any one of claims 1 to 10, characterized in that: The first switch (101) is located between the power supply terminal (102) and the electronic lock (40); Alternatively, the first switch (101) is located between the electronic lock (40) and the signal conversion circuit (105).

12. A charging pile, characterized in that: It comprises the electronic lock detection circuit (10) according to any one of claims 1 to 11 and a processor (200), wherein the processor (200) is connected to the signal conversion circuit (105).

13. A vehicle, characterized in that: It comprises the electronic lock detection circuit (10) according to any one of claims 1 to 11 and a processor (200), wherein the processor (200) is connected to the signal conversion circuit (105).

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