Imaging device and surveying device

WO2025047121A1PCT designated stage expired Publication Date: 2025-03-06SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
PCT/JP2024/024383
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-08-29
Filing Date
2024-07-05
Publication Date
2025-03-06

Smart Images

  • Figure JP2024024383_06032025_PF_FP_ABST
    Figure JP2024024383_06032025_PF_FP_ABST
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Abstract

The present invention efficiently specifies shared locations in mutually different images. This imaging device comprises: a pixel array unit in which pixels are arranged in a matrix form along a row direction and a column direction; a transfer unit capable of transferring charges, which are photoelectrically converted by the pixels, between pixels in the same row or between pixels in the same column; and a comparison unit for comparing a first pixel signal that is based on the charges photoelectrically converted by the pixels and a second pixel signal that is based on the charges transferred via the transfer unit. The transfer unit may be connected between floating diffusions of adjacent pixels in the same row or between floating diffusions of adjacent pixels in the same column.
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Description

Imaging and surveying equipment

[0001] The present technology relates to an imaging device and a surveying instrument. More specifically, the present technology relates to an imaging device and a surveying instrument that are capable of comparing different images with each other.

[0002] Images captured at different positions may be stitched together to measure topography, terrain, etc. For example, an imaging device has been proposed in which a first floating diffusion layer selected from a pair of first floating diffusion layers and a second floating diffusion layer selected from a pair of second floating diffusion layers are connected to a first wiring (see, for example, Patent Document 1).

[0003] International Publication No. 2021 / 181734

[0004] However, in the above-described conventional technology, the range of sharing of images captured at different positions is largely limited, which may make it difficult to identify common areas of images captured at different positions.

[0005] This technology was developed in light of these circumstances, and aims to improve the efficiency of identifying common areas between different images.

[0006] The present technology has been made to solve the above-mentioned problems, and a first aspect thereof is an imaging device including: a pixel array unit in which pixels are arranged in a matrix along row and column directions; a transfer unit capable of transferring charges photoelectrically converted in the pixels between pixels in the same row or between pixels in the same column; and a comparison unit that compares a first pixel signal based on the charges photoelectrically converted in the pixels with a second pixel signal based on the charges transferred via the transfer unit. This provides an effect that captured images of different locations can be compared during imaging within the imaging device.

[0007] In the first aspect, the transfer unit may be connected between floating diffusions of adjacent pixels in the same row or between floating diffusions of adjacent pixels in the same column, thereby achieving the effect of transferring charges photoelectrically converted in the pixels between pixels in the same row or between pixels in the same column while controlling the transfer timing.

[0008] In the first aspect, the transfer unit may include a first transistor and a second transistor connected in series to the first transistor, thereby enabling charges held in the floating diffusion to be held between the first transistor and the second transistor, and allowing charges photoelectrically converted in the pixels to be transferred between pixels in the same row or between pixels in the same column.

[0009] In the first aspect, the pixel may further include a transfer line connecting the floating diffusions of adjacent pixels in the same row or the floating diffusions of adjacent pixels in the same column via the transfer unit, thereby allowing charges photoelectrically converted in the pixels to be transferred between pixels in the same row or between pixels in the same column.

[0010] In addition, in the first aspect, the image capturing device may further include a vertical signal line that transmits the first pixel signal and the second pixel signal for each column in the column direction, an AD conversion unit that performs AD conversion on the first pixel signal and the second pixel signal transmitted via the vertical signal line for each column, and a data memory that stores a digital value of the second pixel signal for each column, wherein the comparison unit compares the first pixel signal stored in the AD conversion unit with the second pixel signal stored in the data memory for each column. This provides an effect that a captured image is generated for each frame based on charges photoelectrically converted in pixels, and captured images of different locations are compared during image capture within the image capturing device.

[0011] In the first aspect, the comparator may compare the first pixel signal held in the AD converter with the second pixel signal held in the data memory for each column each time the second pixel signal is transferred to an adjacent pixel in the row direction or the column direction, thereby producing an effect that a first captured image is generated for each frame based on charges photoelectrically converted in pixels, and a second captured image based on charges transferred in the row direction or the column direction is compared with the first captured image.

[0012] In the first aspect, a P-phase charge may be held between the first transistor and the second transistor when the floating diffusion is reset, and after A-D (Analog to Digital) conversion of the first pixel signal, the D-phase charge held in the floating diffusion may be transferred via the first transistor and the second transistor, thereby achieving an effect of comparing a first captured image subjected to CDS processing based on charges photoelectrically converted in the pixel with a second captured image subjected to CDS processing based on charges transferred via a transfer unit.

[0013] In the first aspect, the image capturing device may further include a common part determination unit that determines a common part between a first image generated based on the first pixel signal and a second image generated based on the second pixel signal based on a comparison result between the first pixel signal and the second pixel signal, thereby providing an effect that a common part between captured images of different locations is identified during image capturing within the image capturing device.

[0014] In the first aspect, the image capturing device may further include an image capturing timing control unit that controls image capturing timing based on a result of detection of a common portion between the first image and the second image, thereby achieving an effect of capturing images of different positions such that the common portion is included in the captured images.

[0015] In the first aspect, a transfer control unit may be further provided that controls the transfer direction of the charges via the transfer unit so that the direction is opposite to the imaging direction, thereby achieving the effect of imaging being performed so that images captured at different locations can be stitched together vertically or horizontally.

[0016] In addition, in the first aspect, the pixel may include a photoelectric conversion unit, a capacitor that holds charge photoelectrically converted by the photoelectric conversion unit, a first transfer transistor that transfers the charge photoelectrically converted by the photoelectric conversion unit to the capacitor, a second transfer transistor that transfers the charge held in the capacitor to a floating diffusion, an output transistor that outputs the first pixel signal and the second pixel signal based on the charge transferred to the floating diffusion, and a selection transistor that selects between the output of the first pixel signal and the second pixel signal. This provides the effect of configuring a pixel that can transfer and hold charge photoelectrically converted.

[0017] In the first aspect, the pixels may transfer and hold the photoelectrically converted charges based on a global shutter operation, thereby providing an effect that exposure is started simultaneously for all pixels.

[0018] A second aspect of the present invention is a surveying instrument that includes a flying object and an imaging device mounted on the flying object, the imaging device including a pixel array unit in which pixels are arranged in a matrix along row and column directions, a transfer unit that can transfer charges photoelectrically converted in the pixels between pixels in the same row or between pixels in the same column, and a comparison unit that compares a first pixel signal based on the charges photoelectrically converted in the pixels with a second pixel signal based on the charges transferred via the transfer unit. This enables aerial photography to be performed continuously at different locations, and allows aerial images of different locations to be compared within the imaging device during aerial photography.

[0019] In a second aspect, the flying object may be set to have a direction of travel that coincides with the imaging direction of the imaging device, and the imaging device may switch the transfer direction via the transfer unit to the row direction or the column direction so that the transfer direction is opposite to the imaging direction. This brings about an effect that aerial photography is performed according to the flying object's direction of travel so that aerial photographs of different locations can be stitched together vertically or horizontally.

[0020] 1 is a block diagram showing an example of the configuration of an imaging device according to a first embodiment. FIG. 2 is a block diagram showing an example of the configuration of a solid-state imaging device according to the first embodiment. FIG. 3 is a diagram showing an example of the circuit configuration of pixels in the solid-state imaging device according to the first embodiment. FIG. 4 is a diagram showing an example of the connection of pixels in the same row of the solid-state imaging device according to the first embodiment. FIG. 5 is a block diagram showing an example of the configuration of a comparison unit according to the first embodiment. FIG. 6 is a diagram showing a surveying method using a drone according to the first embodiment. FIG. 7 is a diagram showing the transfer direction of charges used to generate a captured image when the traveling direction of the drone according to the first embodiment is left and right. FIG. 8 is a block diagram showing waveforms of each part of the solid-state imaging device when reading out pixel signals according to the first embodiment. FIG. 9 is a diagram showing the potential of each part of a pixel when resetting a floating diffusion according to the first embodiment. FIG. 10 is a diagram showing the potential of each part of a pixel when transferred to a floating diffusion according to the first embodiment. FIG. 11 is a flowchart showing a method of comparing a pixel signal held in a counter with a pixel signal held in a data memory when the traveling direction of the drone according to the first embodiment is left and right. FIG. 12 is a diagram showing an example of the connection of pixels in the same column of the solid-state imaging device according to the first embodiment. FIG. 13 is a diagram showing the transfer direction of charges used to generate a captured image when the traveling direction of the drone according to the first embodiment is forward and backward. 10 is a flowchart showing a method for comparing pixel signals stored in a counter with pixel signals stored in a data memory when the traveling direction of a drone according to a first embodiment is a forward / backward direction. FIG. 11 is a perspective view showing an example of the configuration of a surveying device according to a second embodiment. FIG. 12 is a block diagram showing an example of the configuration of a drone control device according to a second embodiment. FIG. 13 is a perspective view showing an example of stacking of pixel array units according to a third embodiment.

[0021] Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described. The description will be given in the following order: 1. First embodiment (an example in which a pixel signal based on charges photoelectrically converted in a pixel is compared with a pixel signal based on charges transferred via a transfer unit) 2. Second embodiment (an example in which an imaging device is mounted on a drone) 3. Third embodiment (an example in which semiconductor chips on which a solid-state imaging device is formed are stacked)

[0022] 1. First Embodiment FIG. 1 is a block diagram showing an example of the configuration of an imaging device according to a first embodiment.

[0023] In the figure, the imaging device 100 includes an optical system 101, a solid-state imaging device 102, an imaging control unit 103, an image processing unit 104, a storage unit 105, a display unit 106, an operation unit 107, and a communication unit 108. The imaging control unit 103, the image processing unit 104, the storage unit 105, the display unit 106, the operation unit 107, and the communication unit 108 are connected to one another via a bus 109. The imaging device 100 may be used as a standalone device, or may be incorporated into a mobile terminal such as a smartphone, an authentication device, a monitoring device, a vehicle, or a drone.

[0024] The optical system 101 causes light from a subject to be incident on the solid-state imaging device 102, and forms an optical image on the light-receiving surface of the solid-state imaging device 102. The optical system 101 may include, for example, a focus lens, a zoom lens, and an aperture. The optical system 101 may also include multiple lenses, such as a wide-angle lens, a standard lens, and a telephoto lens.

[0025] The solid-state imaging device 102 converts an optical image formed on the light-receiving surface into an electrical signal for each pixel, digitizes the electrical signal, and outputs the digitized signal. The solid-state imaging device 102 can operate based on a charge domain global shutter system. The solid-state imaging device 102 can also compare pixel signals of captured images captured at different locations and output the comparison results to the imaging control unit 103. The solid-state imaging device 102 is, for example, a complementary metal oxide semiconductor (CMOS) image sensor. The CMOS image sensor may be a back-illuminated image sensor or a front-illuminated image sensor. The light received by the solid-state imaging device 102 may be visible light, near infrared light (NIR), short wavelength infrared light (SWIR), ultraviolet light, X-rays, or the like.

[0026] The imaging control unit 103 controls imaging by the solid-state imaging device 102 based on commands from the operation unit 107. At this time, the imaging control unit 103 can control the exposure time, exposure amount, imaging timing, etc. of the solid-state imaging device 102. The imaging control unit 103 can also receive from the solid-state imaging device 102 a comparison result of pixel signals of images captured at different locations, and determine common locations between the images captured at different locations based on the comparison result. The imaging control unit 103 can control the imaging timing of the solid-state imaging device 102 based on the determination result of common locations between the images captured at different locations.

[0027] The image processing unit 104 performs image processing based on the output from the solid-state imaging device 102. The image processing includes, for example, gamma correction, white balance processing, sharpness processing, and tone conversion processing. The image processing unit 104 may include a processor that executes processing based on software.

[0028] The storage unit 105 stores images captured by the solid-state imaging device 102 and stores imaging parameters of the solid-state imaging device 102. The storage unit 105 can store images captured by the solid-state imaging device 102 and data specifying common locations used to stitch the images together, linking each image to the image. The storage unit 105 can also store a program that operates the imaging device 100 based on software. The storage unit 105 may include a read-only memory (ROM), a random access memory (RAM), and a memory card.

[0029] The display unit 106 displays captured images and various information that supports the image capturing operation, etc. The display unit 106 may be a liquid crystal display or an organic EL (Electro Luminescence) display.

[0030] The operation unit 107 provides a user interface for operating the imaging device 100. The operation unit 107 may include, for example, buttons, dials, and switches provided on the imaging device 100. The operation unit 107 may be configured as a touch panel together with the display unit 106.

[0031] The communication unit 108 communicates with an external device outside the imaging device 100. The communication partner of the imaging device 100 may be a drone on which the imaging device 100 is mounted during surveying, or a server that manages images captured by the imaging device 100.

[0032] Depending on the usage pattern of the imaging device 100, some of the above-described functions may not be present, and conversely, the imaging device 100 may further include functions that are not disclosed.

[0033] FIG. 2 is a block diagram showing an example of the configuration of the solid-state imaging device according to the first embodiment.

[0034] In the figure, the solid-state imaging device 102 includes a pixel array section 111, a vertical scanning circuit 112, a column readout circuit 113, a column signal processing section 114, a horizontal scanning circuit 115, and a control circuit 116.

[0035] The pixel array unit 111 includes a plurality of pixels PIX and transfer units TA and TB. The pixels PIX are arranged in a matrix along the row direction (also referred to as the horizontal direction) and the column direction (also referred to as the vertical direction). Each pixel PIX can transfer and hold photoelectrically converted charges based on a global shutter operation. Each pixel PIX can form a source follower for each column between itself and the column readout circuit 113 during signal readout. Each pixel PIX is connected to a horizontal drive line HSL for each row and to a vertical signal line VSL for each column. The horizontal drive line HSL drives each pixel PIX for each row during signal readout from each pixel PIX. The vertical signal line VSL transmits a potential based on the current flowing during signal readout from the pixel PIX to the column signal processing unit 114 for each column.

[0036] The transfer unit TA can transfer charges photoelectrically converted in each pixel PIX between pixels PIX in the same row. The transfer unit TA can be connected between the floating diffusions of adjacent pixels in the same row. In this case, the pixel array unit 111 can be provided with a horizontal transfer line TLA that connects the floating diffusions of adjacent pixels in the same row via the transfer unit TA.

[0037] The transfer unit TB can transfer charges photoelectrically converted in each pixel PIX between pixels PIX in the same column. The transfer unit TB can be connected between the floating diffusions of adjacent pixels in the same column. In this case, the pixel array unit 111 can be provided with a vertical transfer line TLB that connects the floating diffusions of adjacent pixels in the same column via the transfer unit TB.

[0038] The vertical scanning circuit 112 scans the pixels PIX to be read in the column direction. The vertical scanning circuit 112 may be configured using vertical registers.

[0039] When reading out a signal from each pixel PIX, the column readout circuit 113 can form a source follower for each column between the pixel PIX and the column readout circuit 113 via the vertical signal line VSL. At this time, the column readout circuit 113 can change the potential of the vertical signal line VSL based on the charge held in the pixel PIX.

[0040] The column signal processing unit 114 processes signals transmitted in the column direction from each pixel PIX. For example, the column signal processing unit 114 can perform correlated double sampling (CDS) processing based on the signals transmitted in the column direction from each pixel PIX. The column signal processing unit 114 can also perform analog-to-digital (AD) conversion processing based on the signals transmitted in the column direction from each pixel PIX, and output an image pickup signal Gout.

[0041] In addition, the column signal processing unit 114 can compare the pixel signal based on the charge photoelectrically converted in each pixel PIX with the pixel signal based on the charge transferred via each transfer unit TA, TB, and output the comparison result Dout.

[0042] The column signal processing unit 114 includes a column ADC unit 114A, a data memory 114B, and a comparison unit 114C. The column ADC unit 114A can perform AD conversion processing for each column in parallel. At this time, the column ADC unit 114A can perform AD conversion for each column based on the comparison result between the pixel signal read from the pixel PIX and a reference signal. Here, the column ADC unit 114A can AD convert pixel signals based on charges photoelectrically converted in the pixels and output the converted signals to the comparison unit 114C for each column. In addition, the column ADC unit 114A can AD convert pixel signals based on charges transferred via each transfer unit TA and TB and output the converted signals to the data memory 114B for each column.

[0043] The data memory 114B holds, for each column, the digital values ​​of pixel signals based on the charges transferred via the transfer units TA and TB.

[0044] The comparison unit 114C compares the digital value of the pixel signal held in the column ADC unit 114A with the digital value of the pixel signal held in the data memory 114B for each column.

[0045] The horizontal scanning circuit 115 scans the pixels PIX to be read in the row direction. The horizontal scanning circuit 115 may be configured using a horizontal register.

[0046] The control circuit 116 controls the vertical scanning circuit 112, the column readout circuit 113, the column signal processing unit 114, and the horizontal scanning circuit 115. For example, the control circuit 116 can control the scanning timing in the column direction, the scanning timing in the row direction, the operation timing of the column readout circuit 113, and the processing timing of the column signal processing unit 114. The control circuit 116 can also control the transfer direction of charges via the transfer units TA and TB so that the transfer direction is opposite to the imaging direction. The solid-state imaging device 102 can determine the imaging direction based on the traveling direction of a drone or the like on which the solid-state imaging device 102 is mounted when surveying the topography, terrain, etc. The control circuit 116 is an example of a transfer control unit described in the claims.

[0047] 3 is a diagram showing an example of the circuit configuration of a pixel of the solid-state imaging device according to the first embodiment. Note that the diagram shows an example of the circuit configuration of a two-pixel sharing cell CEL in which two pixels PIX are shared.

[0048] In the figure, the two-pixel sharing cell CEL includes photodiodes 211 and 221, a floating diffusion FD, capacitors 215 and 225, and overflow control transistors 213 and 223. The two-pixel sharing cell CEL further includes transfer transistors 212, 214, 216, 222, 224, and 226, a switching transistor 231, a reset transistor 232, an output transistor 233, and a selection transistor 234.

[0049] The overflow control transistors 213 and 223, the capacitors 215 and 225, the transfer transistors 212, 214, 216, 222, 224, and 226, the switching transistor 231, the reset transistor 232, the output transistor 233, and the selection transistor 234 may be MOS (Metal Oxide Semiconductor) transistors.

[0050] Each photodiode 211, 221 performs photoelectric conversion and accumulates the photoelectrically converted charge. Each photodiode 211, 221 is an example of a photoelectric conversion unit described in the claims. Each capacitor 215, 225 holds the charge transferred from each photodiode 211, 221. A gate electrode may be provided for each capacitor 215, 225. By controlling the gate potential of each capacitor 215, 225, a potential gradient can be created in the charge transfer direction, preventing charge leakage. Charge transfer from each photodiode 211, 221 to each capacitor 215, 225 may be performed simultaneously for all pixels. Each overflow control transistor 213, 223 controls the overflow of charge from each photodiode 211, 221.

[0051] The transfer transistors 212 and 222 transfer the charges overflowing from the photodiodes 211 and 221. The transfer transistors 214 and 224 transfer the charges accumulated in the photodiodes 211 and 221 to the capacitors 215 and 225. The transfer transistors 216 and 226 transfer the charges held in the capacitors 215 and 225 to the floating diffusions FD. The switching transistor 231 switches the capacitance seen from the output transistor 233 to change the conversion efficiency. The reset transistor 232 resets the floating diffusion FD. The output transistor 233 outputs a signal corresponding to the potential of the floating diffusion FD. The signal corresponding to the potential of the floating diffusion FD includes a signal corresponding to the charges photoelectrically converted in the pixel itself and a signal corresponding to the charges transferred from an adjacent pixel. The selection transistor 234 selects the output of the output transistor 233. At this time, the output transistor 233 can form a source follower together with the current source GA when the selection transistor 234 is turned on.

[0052] The output transistor 233 and the selection transistor 234 are connected in series. The cathode of the photodiode 211 is connected to the power supply potential VDD via the transfer transistor 212 and the overflow control transistor 213. The cathode of the photodiode 221 is connected to the power supply potential VDD via the transfer transistor 222 and the overflow control transistor 223. The cathodes of the photodiodes 211 and 221 are connected to the capacitors 215 and 225 via the transfer transistors 214 and 224, respectively. The capacitors 215 and 225 are connected to the floating diffusion FD via the transfer transistors 216 and 226, respectively. The floating diffusion FD is connected to the power supply voltage VDD via the switching transistor 231 and the reset transistor 232, respectively. The floating diffusion FD is connected to the control potential FDB via the capacitor 217 and is grounded via the capacitor 227. The series circuit of the output transistor 233 and the selection transistor 234 is connected between the power supply voltage VDD and the vertical signal line VSL. The gate of the output transistor 233 is connected to the floating diffusion FD. The vertical signal line VSL is connected to the current source GA.

[0053] The floating diffusion FD is connected to a transfer unit TA via a horizontal transfer line TLA. The transfer unit TA includes horizontal transfer transistors 261 and 262. The horizontal transfer transistors 261 and 262 are connected in series.

[0054] Overflow control signals OFG1 and OFG2 are applied to the gates of the overflow control transistors 213 and 223. Transfer signals TRZ1 and TRZ2 are applied to the gates of the transfer transistors 212 and 222. Transfer signals TRY1 and TRY2 are applied to the gates of the transfer transistors 214 and 224. Transfer signals TRX1 and TRX2 are applied to the gates of the capacitors. Transfer signals TRG1 and TRG2 are applied to the gates of the transfer transistors 216 and 226. A switching signal FDG is applied to the gate of the switching transistor 231. A reset signal RST is applied to the gate of the reset transistor 232. A selection signal SEL is applied to the gate of the selection transistor 234. Horizontal transfer signals H1 and H2 are applied to the gates of the horizontal transfer transistors 261 and 262. The overflow control signals OFG1, OFG2, transfer signals TRZ1, TRX2, TRY1, TRY2, TRX1, TRX2, TRG1, TRG2, switching signal FDG, reset signal RST and selection signal SEL can be transmitted to each pixel PIX1, PIX2 via the horizontal drive line HSL in FIG. 2.

[0055] The photodiodes 211 and 221, the floating diffusions FD, the capacitors 215 and 225, the overflow control transistors 213 and 223, the transfer transistors 212, 214, 216, 222, 224, and 226, the switching transistor 231, and the reset transistor 232 can be formed on the upper chip UCP. The output transistor 233, the selection transistor 234, the horizontal transfer transistors 261 and 262, and the current source GA can be formed on the lower chip LCP.

[0056] Bonding electrodes 241 and 242 may be formed on the upper chip UCP. Bonding electrodes 251 and 252 may be formed on the lower chip LCP. In this case, the bonding electrode 241 may be connected to the floating diffusion FD, and the bonding electrode 251 may be connected to the gate of the output transistor 233. The bonding electrode 242 may be connected individually to the gates of the capacitors 215 and 225, the overflow control transistors 213 and 223, the transfer transistors 212, 214, 216, 222, 224, and 226, the switching transistor 231, and the reset transistor 232. The bonding electrode 252 may be connected to the horizontal drive line HSL. By bonding the bonding electrodes 241 and 251 to each other and bonding the bonding electrodes 242 and 252 to each other, the upper chip UCP and the lower chip LCP can be electrically connected.

[0057] 4 is a diagram showing an example of connection of pixels in the same row of the solid-state imaging device according to the first embodiment. Note that although the diagram shows an example in which three pixels PIX1 to PIX3 are connected in the row direction, more pixels may be connected in the row direction.

[0058] In the same figure, cells CEL1 to CEL3 are provided in the same row. Each of cells CEL1 to CEL3 is connected to vertical signal lines VSL1 to VSL3, respectively. Each of vertical signal lines VSL1 to VSL3 is connected to current sources GA1 to GA3, respectively. The floating diffusion FD of cell CEL1 is connected to the floating diffusion FD of cell CEL2 via transfer unit TA1. The floating diffusion FD of cell CEL2 is connected to the floating diffusion FD of cell CEL3 via transfer unit TA2. Each of cells CEL1 to CEL3 can be configured in the same way as cell CEL. Each of transfer units TA1 and TA2 can be configured in the same way as transfer unit TA.

[0059] 5 is a block diagram showing an example of the configuration of a comparison unit according to the first embodiment. Note that although the diagram shows an example of the configuration of a comparison unit for four columns, it may be applied to more columns.

[0060] In the figure, vertical signal lines VSL1 to VSL4 are provided for each column. The column readout circuit 113 includes current sources GA1 to GA4 for each column. The current sources GA1 to GA4 are connected to the vertical signal lines VSL1 to VSL4, respectively.

[0061] The column ADC unit 114A includes comparators CP1 to CP4 and counters CN1 to CN4 for each column. Each comparator CP1 to CP4 compares a pixel signal transmitted via each vertical signal line VSL1 to VSL4 with a reference signal VRF and outputs the comparison result to each counter CN1 to CN4. The reference signal VRF may include a ramp signal.

[0062] Each of the counters CN1 to CN4 performs a count operation based on the output timing of each comparison result output from each of the comparators CP1 to CP4. Then, each of the counters CN1 to CN4 digitizes the pixel signals transmitted via each of the vertical signal lines VSL1 to VSL4 based on the count value obtained from the count operation.

[0063] At this time, each counter CN1 to CN4 can hold a count value obtained by AD converting pixel signals based on charges photoelectrically converted by the pixels. Each counter CN1 to CN4 can then output the held count value to each comparator HK1 to HK4 for each column. Furthermore, each counter CN1 to CN4 can output a count value obtained by AD converting pixel signals based on charges transferred via each transfer unit TA, TB to each data memory DM1 to DM4 for each column.

[0064] The data memory 114B includes data memories DM1 to DM4 for each column. Each of the data memories DM1 to DM4 holds, for each column, a digital value of a pixel signal based on the charge transferred via each of the transfer units TA and TB.

[0065] The comparison unit 114C includes comparators HK1 to HK4 for each column. Each of the comparators HK1 to HK4 compares the digital value of the pixel signal held in the column ADC unit 114A with the digital value of the pixel signal held in the data memory 114B for each column.

[0066] The imaging control unit 103 includes a common part determination unit 301 and an imaging timing control unit 302. The common part determination unit 301 receives the comparison results of each of the comparators HK1 to HK4 from the solid-state imaging device 102 and, based on these comparison results, determines common parts of the captured images in which different parts have been captured. The imaging timing control unit 302 controls the imaging timing of the solid-state imaging device 102 based on the detection results of common parts of the captured images in which different parts have been captured.

[0067] FIG. 6 is a diagram illustrating a surveying method using a drone according to the first embodiment.

[0068] In the figure, a drone DR is sometimes used to measure the topography and terrain by stitching together images captured at different locations. To streamline the survey, it is necessary to expand the range of images captured at one time and improve the accuracy of the images. When a drone DR captures images at high altitudes PA1 and PA2 (70-80 m), the range can be expanded, but the accuracy of the images decreases. In this case, incorporating evaluation points into the captured images can reduce positioning errors.

[0069] In the figure, when the drone DR captures images at low altitude points PB1 and PB2 (10-30 m), the image capture accuracy is high, but the capture range is narrow. This makes it difficult to find common areas, and it takes time to stitch the images together. In the method of finding common areas by comparing the current image with the next image, the overlap rate (common areas) between the current image and the next image is 60%-90%, which increases the number of images captured during the survey and leads to increased power consumption.

[0070] FIG. 7 is a diagram showing the transfer direction of the electric charges used to generate a captured image when the traveling direction of the drone according to the first embodiment is the left-right direction.

[0071] In the figure, it is assumed that one frame of captured image GZ is obtained in this imaging. Then, it is assumed that the drone DR finds a common location with the captured image GZ while moving in the traveling direction PA1. Here, it is assumed that the traveling direction PA1 of the drone DR is the row direction of the pixel array unit 111. At this time, based on the global shutter operation, the charge photoelectrically converted during generation of the captured image GZ is stored in each capacitor 215, 225 for each pixel. Then, pixel signals based on the charge transferred in the transfer direction HA1 via the transfer unit TA are input to comparators CP1 to CP4 via vertical signal lines VSL1 to VSL4 for each column. Then, based on the counting operations of each counter CN1 to CN4 based on comparisons made by each comparator CP1 to CP4, the pixel signals transferred in the transfer direction HA1 are digitized and stored in each data memory DM1 to DM4. The transfer direction HA1 is set to be opposite the traveling direction PA1 of the drone DR.

[0072] Furthermore, pixel signals based on charges photoelectrically converted when an image captured while the drone DR is moving in the traveling direction PA1 is generated are input to comparators CP1 to CP4 for each column via vertical signal lines VSL1 to VSL4. Then, based on the counting operations of the counters CN1 to CN4 based on the comparisons of the comparators CP1 to CP4, the pixel signals when an image captured while the drone DR is moving is digitized and held in the counters CN1 to CN4.

[0073] Then, in each comparator HK1 to HK4, the digital values ​​of the pixel signals stored in each data memory DM1 to DM4 are compared with the digital values ​​of the pixel signals stored in each counter CN1 to CN4, column by column. Then, based on the comparison results of each comparator HK1 to HK4, the common part determination unit 301 determines common parts with the captured image GZ while the drone DR is moving. The common part determination range CE1 can be set to ensure accuracy in determining common parts with the captured image GZ. For example, the common part determination range CE1 may be a range of 3 x 3 pixels. In this case, to improve the accuracy of determining common parts, when images in multiple columns of the common part determination range CE1 match, the common part determination unit 301 may determine the matching parts as common parts of the captured images.

[0074] 8 is a block diagram showing waveforms at various parts of the solid-state imaging device when pixel signals are read out according to the first embodiment, in which the readout of one pixel of a two-pixel sharing cell CEL is shown.

[0075] In the diagram, when reading out pixel signals, the power supply voltage VDD and overflow control signal OFG1 are set to high levels, and the transfer signals TRZ1 and TRY1 are set to low levels. At this time, the overflow control transistor 213 is turned on, and the selection transistor 234 is turned off. Then, the selection signal SEL rises (t1), turning on the selection transistor 234.

[0076] Next, the reset signal RST and the switching signal FDG rise (t2), turning on the reset transistor 232 and the switching transistor 231. At this time, the conversion efficiency is reduced, the floating diffusion FD is reset, and the P-phase level of the floating diffusion FD is transmitted via the vertical signal line VSL.

[0077] Furthermore, the horizontal transfer signal H1 rises (t2), turning on the horizontal transfer transistor 261, and the level between the horizontal transfer transistors 261 and 262 is set to the P-phase level of the floating diffusion FD.

[0078] Then, when the reset signal RST, the switching signal FDG, and the horizontal transfer signal H1 fall (t3), the P-phase level of the floating diffusion FD is AD converted and held in each of the counters CN1 to CN4 for each column.

[0079] Next, the transfer signals TRX1, TRG1 and the control potential FDB rise, turning on the transfer transistor 216 and controlling the potential of the capacitor 215 (t4). At this time, the charge held in the capacitor CA1 is transferred to the floating diffusion FD, and the D-phase level of the floating diffusion FD is transmitted via the vertical signal line VSL.

[0080] Then, when the transfer signals TRX1, TRG1 and the control potential FDB fall (t5, t6, t7), the D-phase level of the floating diffusion FD is AD converted and held in each of the counters CN1 to CN4 for each column. Note that the transfer signal TRX1 may fall in stages. At this time, each of the counters CN1 to CN4 can hold a CDS-processed value by subtracting the P-phase level from the D-phase level of the floating diffusion FD.

[0081] Next, the horizontal transfer signal H1 rises (t8), turning on the horizontal transfer transistor 261, thereby transferring charges corresponding to the D-phase level of the floating diffusion FD between the horizontal transfer transistors 261 and 262. At this time, the P-phase level is subtracted from the D-phase level of the floating diffusion FD between the horizontal transfer transistors 261 and 262, thereby allowing the CDS-processed charges to be held. After the horizontal transfer signal H1 falls, the horizontal transfer signal H2 rises (t9), turning on the horizontal transfer transistor 262, thereby transferring the charges held in the floating diffusion FD of the pixel in question to the floating diffusion FD of the adjacent pixel via the transfer unit TA.

[0082] 9 is a diagram showing the potentials of various parts of a pixel when the floating diffusion according to the first embodiment is reset. The diagram shows the potentials of one pixel of a two-pixel sharing cell CEL. Also, in the diagram, "a" indicates the potential from the photodiode 211 to the reset transistor 232, and "b" indicates the potential from the photodiode 211 to the overflow control transistor 213.

[0083] In the figure, when resetting the floating diffusion FD, the reset signal RST is set to a high level, and the reset transistor 232 is turned on. At this time, the transfer signals TRY1 and TRG1 are set to a low level, and the charge EL held in the capacitor CA1 is maintained. Also, the transfer signal TRZ1 is set to a low level, and the charge EL photoelectrically converted by the photodiode 211 is accumulated.

[0084] 10 is a diagram showing the potential of each part of the pixel when transferring to the floating diffusion according to the first embodiment. The figure shows the potential for one pixel of the two-pixel sharing cell CEL. Also, in the figure, "a" indicates the potential from the photodiode 211 to the reset transistor 232, and "b" indicates the potential from the photodiode 211 to the overflow control transistor 213.

[0085] In the figure, when transferring to the floating diffusion FD, the transfer signal TRG1 is set to a high level, and the transfer transistor 216 is turned on. At this time, the transfer signal TRZ1 is set to a low level, and the charge EL photoelectrically converted by the photodiode 211 is accumulated.

[0086] FIG. 11 is a flowchart showing a method of comparing pixel signals held in a counter with pixel signals held in a data memory when the drone is traveling in a left-right direction in the first embodiment.

[0087] In the figure, the solid-state imaging device 102 determines the traveling direction of the drone DR (S101). If the traveling direction of the drone DR is the left-right direction, the process proceeds to S103. On the other hand, if the traveling direction of the drone DR is the forward-backward direction, the solid-state imaging device 102 proceeds to S203 (S102).

[0088] Next, the solid-state imaging device 102 transfers the P-phase charges from the previous imaging via the horizontal transfer line TLA and holds them between the horizontal transfer transistors 261 and 262 of the transfer unit TA (S103).

[0089] Next, the solid-state imaging device 102 transmits the P-phase pixel signals from the previous imaging via the vertical signal line VSL, performs AD conversion, and holds the signals in the counters CN1 to CN4 for each column (S104).

[0090] Next, the solid-state imaging device 102 transmits the D-phase pixel signals from the previous imaging via the vertical signal line VSL, performs AD conversion, and holds the signals in the counters CN1 to CN4 for each column (S105).

[0091] Next, the solid-state imaging device 102 transfers the D-phase charge from the previous imaging to the floating diffusion FD of the adjacent pixel via the horizontal transfer line TLA (S106).

[0092] Next, the solid-state imaging device 102 transmits, via the vertical signal line VSL, a D-phase pixel signal based on the D-phase charge transferred via the horizontal transfer line TLA in the previous imaging, performs AD conversion, and stores the signal in each data memory DM1 to DM4 for each column (S107).

[0093] Next, the solid-state imaging device 102 compares the digital values ​​of the pixel signals held in each data memory DM1 to DM4 with the digital values ​​of the pixel signals held in each counter CN1 to CN4 for each column using each comparator HK1 to HK4 (S108).

[0094] Next, the solid-state imaging device 102 determines whether the digital values ​​of the pixel signals held in each of the data memories DM1 to DM4 match the digital values ​​of the pixel signals held in each of the counters CN1 to CN4 (S109). If the digital values ​​of the pixel signals held in each of the data memories DM1 to DM4 do not match the digital values ​​of the pixel signals held in each of the counters CN1 to CN4, the solid-state imaging device 102 returns to the process of S101 and repeats the processes of S101 to S109. On the other hand, if the digital values ​​of the pixel signals held in each of the data memories DM1 to DM4 match the digital values ​​of the pixel signals held in each of the counters CN1 to CN4, the solid-state imaging device 102 transmits the comparison result to the common part determination unit 301 (S110).

[0095] Next, the solid-state imaging device 102 determines whether or not the surveying is complete (S111). If the surveying is not complete, the solid-state imaging device 102 returns to the process of S101 and repeats the processes of S101 to S111.

[0096] 12 is a diagram showing an example of connection of pixels in the same column of the solid-state imaging device according to the first embodiment. Note that although the diagram shows an example in which three pixels PIX11 to PIX13 are connected in the column direction, more pixels may be connected in the column direction.

[0097] In the figure, cells CEL11 to CEL13 are provided in the same column. Each of cells CEL11 to CEL13 is connected to a vertical signal line VSL11. The vertical signal line VSL11 is connected to a current source GA11. The floating diffusion FD of cell CEL11 is connected to the floating diffusion FD of cell CEL12 via a transfer unit TB1. The floating diffusion FD of cell CEL12 is connected to the floating diffusion FD of cell CEL13 via a transfer unit TB2. Each of cells CEL11 to CEL13 can be configured similarly to cell CEL. Each of transfer units TB1 and TB2 includes vertical transfer transistors 271 and 272. The vertical transfer transistors 271 and 272 are connected in series. Vertical transfer signals H11 and H12 are applied to the gates of the vertical transfer transistors 271 and 272. The application timings of the vertical transfer signals H11 and H12 can be set in the same manner as the application timings of the horizontal transfer signals H1 and H2.

[0098] FIG. 13 is a diagram showing the transfer direction of the electric charges used to generate a captured image when the traveling direction of the drone according to the first embodiment is the forward / backward direction.

[0099] In the figure, it is assumed that one frame of captured image GZ is obtained in this imaging. Then, it is assumed that the drone DR finds a common location with the captured image GZ while moving in the traveling direction PA2. Here, it is assumed that the traveling direction PA2 of the drone DR is the column direction of the pixel array unit 111. At this time, based on the global shutter operation, the charge photoelectrically converted during generation of the captured image GZ is stored in each of the capacitors 215 and 225 for each pixel. Then, pixel signals based on the charge transferred in the transfer direction HA2 via the transfer unit TB are input to the comparators CP1 to CP4 via the vertical signal lines VSL1 to VSL4 for each column. Then, based on the counting operations of the counters CN1 to CN4 based on the comparisons of the comparators CP1 to CP4, the pixel signals transferred in the transfer direction HA2 are digitized and stored in the data memories DM1 to DM4. The transfer direction HA2 is set to be opposite the traveling direction PA2 of the drone DR.

[0100] Furthermore, pixel signals based on charges photoelectrically converted when an image captured while the drone DR is moving in the traveling direction PA2 is generated are input to comparators CP1 to CP4 for each column via vertical signal lines VSL1 to VSL4. Then, based on the counting operations of the counters CN1 to CN4 based on the comparisons of the comparators CP1 to CP4, the pixel signals when an image captured while the drone DR is moving is digitized and held in the counters CN1 to CN4.

[0101] Then, in each comparator HK1 to HK4, the digital values ​​of the pixel signals stored in each data memory DM1 to DM4 are compared with the digital values ​​of the pixel signals stored in each counter CN1 to CN4, column by column. Then, based on the comparison results of each comparator HK1 to HK4, the common part determination unit 301 determines common parts with the captured image GZ while the drone DR is moving. The common part determination range CE2 can be set to ensure accuracy in determining common parts with the captured image GZ. For example, the common part determination range CE2 may be a range of 3 x 3 pixels. In this case, to improve the accuracy of determining common parts, when images in the common part determination range CE2 for multiple columns match, the common part determination unit 301 may determine the matching parts as common parts of the captured images.

[0102] FIG. 14 is a flowchart showing a method of comparing pixel signals held in the counter with pixel signals held in the data memory when the drone in the first embodiment is traveling in the forward / backward direction.

[0103] In the same figure, the solid-state imaging device 102 determines the traveling direction of the drone DR (S201). If the traveling direction of the drone DR is the forward / backward direction, the process proceeds to S203. On the other hand, if the traveling direction of the drone DR is the left / right direction, the solid-state imaging device 102 proceeds to S103 (S202).

[0104] Next, the solid-state imaging device 102 transfers the P-phase charges from the previous imaging via the vertical transfer line TLB and holds them between the vertical transfer transistors 271 and 272 of the transfer unit TB (S203).

[0105] Next, the solid-state imaging device 102 transmits the P-phase pixel signals from the previous imaging via the vertical signal line VSL, performs AD conversion, and holds the signals in the counters CN1 to CN4 for each column (S204).

[0106] Next, the solid-state imaging device 102 transmits the D-phase pixel signals from the previous imaging via the vertical signal line VSL, performs AD conversion, and holds the signals in the counters CN1 to CN4 for each column (S205).

[0107] Next, the solid-state imaging device 102 transfers the D-phase charge from the previous imaging to the floating diffusion FD of the adjacent pixel via the vertical transfer line TLB (S206).

[0108] Next, the solid-state imaging device 102 transmits, via the vertical signal line VSL, a D-phase pixel signal based on the D-phase charge transferred via the vertical transfer line TLB in the previous imaging, performs AD conversion, and stores the signal in each data memory DM1 to DM4 for each column (S207).

[0109] Next, the solid-state imaging device 102 compares the digital values ​​of the pixel signals held in each data memory DM1 to DM4 with the digital values ​​of the pixel signals held in each counter CN1 to CN4 for each column in each comparator HK1 to HK4 (S208).

[0110] Next, the solid-state imaging device 102 determines whether the digital values ​​of the pixel signals held in each of the data memories DM1 to DM4 match the digital values ​​of the pixel signals held in each of the counters CN1 to CN4 (S209). If the digital values ​​of the pixel signals held in each of the data memories DM1 to DM4 do not match the digital values ​​of the pixel signals held in each of the counters CN1 to CN4, the solid-state imaging device 102 returns to the process of S201 and repeats the processes of S201 to S209. On the other hand, if the digital values ​​of the pixel signals held in each of the data memories DM1 to DM4 match the digital values ​​of the pixel signals held in each of the counters CN1 to CN4, the solid-state imaging device 102 transmits the comparison result to the common part determination unit 301 (S210).

[0111] Next, the solid-state imaging device 102 determines whether or not the surveying is complete (S211). If the surveying is not complete, the solid-state imaging device 102 returns to the process of S201 and repeats the processes of S201 to S211.

[0112] As described above, in the first embodiment, pixel signals based on charges photoelectrically converted by the pixel PIX are compared with pixel signals based on charges transferred via the transfer units TA and TB. This allows captured images of different locations to be compared during capture within the solid-state imaging device 102. Therefore, when a common location is found between captured images of different locations, image capture can be performed, and the image capture timing can be controlled so that the common location between the captured images of different locations is included. As a result, the overlap rate of the captured images of different locations can be reduced, and the captured images of different locations can be stitched together.

[0113] 2. Second Embodiment In the first embodiment described above, a pixel signal based on the charge photoelectrically converted in the pixel PIX is compared with a pixel signal based on the charge transferred via each transfer unit TA and TB. In this second embodiment, the imaging device 100 is mounted on a drone DR during surveying.

[0114] FIG. 15 is a perspective view showing an example of the configuration of a surveying device according to the second embodiment.

[0115] In the figure, a propeller 401 and a motor 402 are attached to the drone DR. The propeller 401 and the motor 402 can be attached to four locations on the drone DR. The propeller 401 generates buoyancy and thrust for the drone DR. The motor 402 rotates the propeller 401. At this time, the motor 402 can individually set the rotation speed and direction of the propeller 401. An imaging device 100 is attached to the underside of the drone DR. At this time, the imaging device 100 can capture images of the ground surface below the drone DR. The imaging device 100 can communicate with the drone DR.

[0116] FIG. 16 is a block diagram illustrating an example configuration of a drone control device according to the second embodiment.

[0117] In the figure, a drone control device 500 controls a drone DR. The drone control device 500 is mounted on the drone DR. The drone control device 500 includes a motor control unit 502, a positioning unit 503, an overall control unit 504, a memory unit 505, an inter-camera communication unit 506, and an external communication unit 507. The motor control unit 502, the positioning unit 503, the overall control unit 504, the memory unit 505, the inter-camera communication unit 506, and the external communication unit 507 are connected to one another via a bus 508.

[0118] The motor control unit 502 controls the number of rotations and the direction of rotation of each motor 402. At this time, by controlling the number of rotations and the direction of rotation of each motor 402, the motor control unit 502 can control the traveling direction, speed, etc. of the drone DR.

[0119] The positioning unit 503 measures the current position of the drone DR. The positioning unit 503 may include a GNSS (Global Navigation Satellite System), an RTK (Real Time Kinematic), or an IMU (Inertial Measurement Unit).

[0120] The overall control unit 504 controls the overall operation of the drone DR. For example, the overall control unit 504 can coordinate the motor control unit 502, positioning unit 503, inter-camera communication unit 506, and external communication unit 507, or coordinate the inter-camera communication unit 506 and storage unit 505. In this case, when the drone DR is used for surveying, the overall control unit 504 can set the direction of travel of the drone DR to the column direction or row direction of the imaging device 100. This allows the terrain to be regularly divided vertically and horizontally for surveying. The overall control unit 504 may include a processor that executes processing based on software.

[0121] The storage unit 505 can store parameters for operating the motor control unit 502 and a program for operating the drone control device 500 based on software. The storage unit 505 may include a ROM, a RAM, and a memory card.

[0122] The inter-camera communication unit 506 provides a communication interface used for communication with the imaging device 100. The inter-camera communication unit 506 may communicate with the imaging device 100 based on, for example, USB (Universal Serial Bus) communication. At this time, the inter-camera communication unit 506 can notify the imaging device 100 of the traveling direction of the drone DR. The imaging device 100 can switch the charge transfer direction between the column direction and the row direction based on the traveling direction of the drone DR.

[0123] The external communication unit 507 provides a communication interface used for communication with the outside of the drone DR. The outside of the drone DR may be a remote control for operating the drone DR, a personal computer for monitoring the drone DR, an artificial satellite used for GNSS, or a reference station used for RTK.

[0124] In this way, in the second embodiment described above, the imaging device 100 is mounted on the drone DR during surveying. This reduces the overlap rate of captured images of different locations, and allows captured images that can be stitched together to be acquired. This makes it possible to reduce the number of captured images during surveying, thereby reducing power consumption and reducing storage capacity during surveying.

[0125] In the above-described embodiment, an example was shown in which an imaging device was mounted on a drone for surveying, but the imaging device may also be mounted on a flying object other than a drone, such as an artificial satellite, airship, balloon, helicopter, or airplane, for surveying.

[0126] 3. Third Embodiment In the above-described first embodiment, a pixel signal based on charges photoelectrically converted in the pixel PIX is compared with a pixel signal based on charges transferred via each transfer unit TA and TB. In this third embodiment, semiconductor chips each having a pixel array unit in which pixels are arranged in a matrix are stacked.

[0127] FIG. 17 is a perspective view showing an example of a stack of pixel array units according to the third embodiment.

[0128] In the figure, the solid-state imaging device includes semiconductor chips 921 and 922. The semiconductor chip 922 is stacked on the semiconductor chip 921. The semiconductor chip 922 may be the upper chip UCP of the first embodiment described above. The semiconductor chip 921 may be the lower chip LCP of the first embodiment described above.

[0129] A pixel array section 923 is formed in the semiconductor chip 922. In the pixel array section 923, pixels 931 are arranged in a matrix in the row and column directions. The pixel 931 may be the pixel PIX of FIG. 3 or the two-pixel sharing cell CEL of FIG. 3. Pad electrodes 932 and via electrodes 933 are formed around the pixel array section 923. The via electrodes 933 penetrate the semiconductor chip 922 and can electrically connect the semiconductor chips 921 and 922 to each other.

[0130] A peripheral circuit 924 is formed on the semiconductor chip 921. A column readout circuit 925, a column ADC 926, a communication interface 927, and an oscillation circuit 928 are formed in the peripheral circuit 924. The column readout circuit 925 and the column ADC 926 may be formed so as to correspond to positions on both sides of the pixel array unit 923 in the column direction.

[0131] The semiconductor chips 921 and 922 may be directly bonded to each other. Hybrid bonding can be used for directly bonding the semiconductor chips 921 and 922. In this case, the semiconductor chips 921 and 922 may be electrically connected based on Cu-Cu bonding. The material of the semiconductor substrate used for the semiconductor chips 921 and 922 may be Si, InGaAs, or InP.

[0132] As described above, in the third embodiment, the semiconductor chip 922 on which the pixel array unit 923 is formed is stacked on the semiconductor chip 921 on which the peripheral circuit 924 is formed. This makes it possible to increase the sensitivity of the solid-state imaging device while suppressing an increase in the mounting area of ​​the semiconductor chip on which the solid-state imaging device is formed.

[0133] Note that the above-described embodiment shows an example for realizing the present technology, and the matters in the embodiment and the matters specifying the invention in the claims correspond to each other. Similarly, the matters specifying the invention in the claims and the matters in the embodiment of the present technology with the same title correspond to each other. However, the present technology is not limited to the embodiment, and can be realized by applying various modifications to the embodiment within the scope of the gist. Furthermore, the effects described in this specification are merely examples and are not limited, and other effects may also be present.

[0134] The present technology may also be configured as follows: (1) An imaging device comprising: a pixel array unit in which pixels are arranged in a matrix along the row and column directions; a transfer unit capable of transferring charges photoelectrically converted in the pixels between pixels in the same row or between pixels in the same column; and a comparison unit that compares a first pixel signal based on the charges photoelectrically converted in the pixels with a second pixel signal based on the charges transferred via the transfer unit. (2) The imaging device according to (1), wherein the transfer unit is connected between floating diffusions of adjacent pixels in the same row or between floating diffusions of adjacent pixels in the same column. (3) The imaging device according to (1) or (2), wherein the transfer unit comprises: a first transistor; and a second transistor connected in series to the first transistor. (4) The imaging device according to any of (1) to (3), further comprising: a transfer line that connects the floating diffusions of adjacent pixels in the same row or the floating diffusions of adjacent pixels in the same column via the transfer unit. (5) The imaging device according to any one of (1) to (4), further comprising: vertical signal lines that transmit the first pixel signals and the second pixel signals for each column in the column direction; an AD conversion unit that performs AD conversion on the first pixel signals and the second pixel signals transmitted via the vertical signal lines for each column; and a data memory that stores digital values ​​of the second pixel signals for each column, wherein the comparison unit compares the first pixel signals stored in the AD conversion unit with the second pixel signals stored in the data memory for each column. (6) The imaging device according to (5), further comprising: vertical signal lines that transmit the first pixel signals and the second pixel signals for each column in the column direction;(7) The imaging device according to (3), further comprising: a common portion determination unit configured to determine a common portion between a first image generated based on the first pixel signal and a second image generated based on the second pixel signal based on a comparison result between the first pixel signal and the second pixel signal, based on a comparison result between the first pixel signal and the second pixel signal; (9) The imaging device according to (8), further comprising: an imaging timing control unit configured to control imaging timing based on a detection result of the common portion between the first image and the second image; (10) The imaging device according to any of (1) to (9), further comprising: a transfer control unit configured to control a transfer direction of the charge via the transfer unit so that the transfer direction is opposite to the imaging direction. (11) The imaging device according to any one of (1) to (10), wherein the pixel comprises: a photoelectric conversion unit, a capacitor that holds charge photoelectrically converted by the photoelectric conversion unit, a first transfer transistor that transfers the charge photoelectrically converted by the photoelectric conversion unit to the capacitor, a second transfer transistor that transfers the charge held in the capacitor to a floating diffusion, an output transistor that outputs the first pixel signal and the second pixel signal based on the charge transferred to the floating diffusion, and a selection transistor that selects output of the first pixel signal and the second pixel signal. (12) The imaging device according to any one of (1) to (11), wherein the pixel transfers and holds the charge photoelectrically converted based on a global shutter operation.(13) A surveying instrument comprising: a flying object; and an imaging device mounted on the flying object, wherein the imaging device comprises: a pixel array unit in which pixels are arranged in a matrix along row and column directions; a transfer unit capable of transferring charges photoelectrically converted in the pixels between pixels in the same row or between pixels in the same column; and a comparison unit that compares a first pixel signal based on the charges photoelectrically converted in the pixels with a second pixel signal based on the charges transferred via the transfer unit. (14) The surveying instrument according to (13), wherein the flying object is set in a direction of travel that matches the imaging direction of the imaging device, and the imaging device switches the transfer direction via the transfer unit to the row direction or the column direction so that the transfer direction is opposite to the imaging direction.

[0135] REFERENCE SIGNS LIST 100 Imaging device 101 Optical system 102 Solid-state imaging device 103 Imaging control unit 104 Image processing unit 105 Memory unit 106 Display unit 107 Operation unit 108 Bus 111 Pixel array unit 112 Vertical scanning circuit 113 Column readout circuit 114 Column signal processing unit 115 Horizontal scanning circuit 116 Control circuit PIX Pixel HSL Horizontal drive line VSL Vertical signal line UCP Upper layer chip LCP Lower layer chip 241, 242, 251, 252 Bonding electrode 211, 221 Photodiode 212, 214, 216, 222, 224, 226 Transfer transistor 213, 223 Overflow control transistor 215, 225, 217, 227 Capacitor FD Floating diffusion 231 Switching transistor 232 Reset transistor 233 Output transistor 234 Selection transistor GA Current source TLA Horizontal transfer line TA Transfer section 261, 262 Horizontal transfer transistor

Claims

1. An imaging device comprising: a pixel array section in which pixels are arranged in a matrix along row and column directions; a transfer section capable of transferring electric charges photoelectrically converted in the pixels between pixels in the same row or between pixels in the same column; and a comparison section that compares a first pixel signal based on the electric charges photoelectrically converted in the pixels with a second pixel signal based on the electric charges transferred via the transfer section.

2. The imaging device according to claim 1, wherein the transfer section is connected between the floating diffusions of adjacent pixels in the same row or between the floating diffusions of adjacent pixels in the same column.

3. The imaging device according to claim 1, wherein the transfer section comprises: a first transistor; and a second transistor connected in series to the first transistor.

4. The imaging device according to claim 1, further comprising a transfer line that connects floating diffusions of adjacent pixels in the same row or floating diffusions of adjacent pixels in the same column via the transfer section.

5. The imaging device of claim 1, further comprising: a vertical signal line that transmits the first pixel signal and the second pixel signal for each column in the column direction; an AD conversion unit that performs AD conversion on the first pixel signal and the second pixel signal transmitted via the vertical signal line for each column; and a data memory that holds a digital value of the second pixel signal for each column, wherein the comparison unit compares the first pixel signal held in the AD conversion unit with the second pixel signal held in the data memory for each column.

6. The imaging device according to claim 5, wherein the comparison unit compares the first pixel signal held in the AD conversion unit with the second pixel signal held in the data memory for each column each time the second pixel signal is transferred to an adjacent pixel in the row direction or the column direction.

7. The imaging device according to claim 3, wherein a P-phase charge is held between the first transistor and the second transistor when the floating diffusion is reset, and after AD (Analog to Digital) conversion of the first pixel signal, the D-phase charge held in the floating diffusion is transferred via the first transistor and the second transistor.

8. The imaging device according to claim 1, further comprising a common part determination unit that determines common parts between a first image generated based on the first pixel signal and a second image generated based on the second pixel signal based on a comparison result between the first pixel signal and the second pixel signal.

9. The imaging device according to claim 1, further comprising an imaging timing control unit that controls imaging timing based on a result of detection of common points between the first image and the second image.

10. The imaging device according to claim 1, further comprising a transfer control section that controls the transfer direction of the electric charges via the transfer section so that the direction is opposite to the imaging direction.

11. The imaging device of claim 1, wherein the pixel comprises: a photoelectric conversion unit; a capacitor that holds charge photoelectrically converted by the photoelectric conversion unit; a first transfer transistor that transfers the charge photoelectrically converted by the photoelectric conversion unit to the capacitor; a second transfer transistor that transfers the charge held in the capacitor to a floating diffusion; an output transistor that outputs the first pixel signal and the second pixel signal based on the charge transferred to the floating diffusion; and a selection transistor that selects the output of the first pixel signal and the second pixel signal.

12. The imaging device according to claim 1, wherein the pixel transfers and holds the photoelectrically converted charge based on a global shutter operation.

13. A surveying instrument comprising: a flying object; and an imaging device mounted on the flying object, wherein the imaging device comprises: a pixel array section in which pixels are arranged in a matrix along row and column directions; a transfer section capable of transferring charges photoelectrically converted in the pixels between pixels in the same row or between pixels in the same column; and a comparison section that compares a first pixel signal based on the charges photoelectrically converted in the pixels with a second pixel signal based on the charges transferred via the transfer section.

14. The surveying device of claim 13, wherein the flying object's direction of travel is set to coincide with the imaging direction of the imaging device, and the imaging device switches the transfer direction via the transfer unit to the row direction or the column direction so that the transfer direction is opposite to the imaging direction.

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