Automatic test system independent of RF peripheral units for digital receivers and technical generators in electronic warfare

Abstract

This invention fundamentally relates to a system (1) that enables the testing of hardware cores and embedded software designed for digital receiver and technical generator units, which forms the basis of electronic warfare systems, in a more real-time, comprehensive, automatic, fast manner and with repeatable test steps independently of RF peripheral units and the software running on these units thanks to a simulator structure to that will be put in front of the product to be tested. Thanks to the system (1) in question, the testing of the digital receiver and technical generator units to be tested (2), which forms the basis of electronic warfare systems, without being connected to the RF peripheral units used with the units in question, while eliminating the necessity of setup, maintenance and operation of real RF test mechanisms, in a more real-time, comprehensive, automatic, fast and with repeatable test steps through the real-time processing of RF peripheral unit responses that are formed thanks to the simulator card (3) is provided.

Description

[0001] AUTOMATIC TEST SYSTEM INDEPENDENT OF RF PERIPHERAL UNITS FOR DIGITAL RECEIVERS AND TECHNICAL GENERATORS

[0002] IN ELECTRONIC WARFARE

[0003] Field of the Invention

[0004] This invention relates to a system that provides the testing of hardware cores and embedded software designed for digital receiver and technical generator units, which forms the basis of electronic warfare systems independently from RF peripheral units and the software running on these units, in an almost real-life, more comprehensive, faster, automatic compared to universal verification tests and with repeatable test steps thanks to a simulator structure to that will be put in front of the product to be tested.

[0005] Prior Art

[0006] In electronic warfare systems, all systems produced for the purposes of electronic intelligence and communications intelligence interception, electromagnetic jamming, and non-jamming communications, fundamentally include at least one digital receiver unit or at least one technical generator unit. In order to ensure that these fundamental units that enable the operation of electronic warfare systems work correctly, universal verification tests are applied, and all features of the units are tested under different conditions. Universal verification tests take quite a long time, are difficult to implement in real time, and create an additional time burden to repeat following changes in units.

[0007] Universal verification tests in electronic warfare systems necessitate full system integration, requiring RF peripheral units to be connected to the electronic warfare systems and to operate according to direct communication protocols. In tests conducted in this manner, reproducing the observed error becomes a challenging factor. In the state of the art, the United States patent document numbered US6047387 mentions a simulation system that facilitates testing different design iterations of integrated circuits through peripheral unit in question without physically producing the peripheral unit. By this invention, integrated circuit designers can first implement the circuit design using an FPGA and then check each function of the circuit separately before checking the integrated circuit as a whole, eliminate errors by using the simulation system of this invention, and the physical presence of the peripheral unit is not required for this. The simulation system can operate in the environment of the host computer or the environment of the peripheral and is divided into three main modules: a software simulation module (Ml), a peripheral unit (M2) and its connection logic module, and a simulation software (M3) and its connection logic module. Although the invention disclosed in the United States patent document numbered US 6047387 enables the testing of integrated circuits without a peripheral unit, there is no mention of a unit that is involved in the data transmission of the tests in question and implements the data routing function, so it cannot be ensured that the tests are carried out automatically and quickly.

[0008] Therefore, in the state of the art, there is need for a system that enables hardware cores and embedded software designed for digital receiver and technical generator units, which forms the basis of electronic warfare systems, to be tested in almost real time, in a way that is more comprehensive, faster, automatic and with repeatable test steps compared to universal verification tests independently from the RF peripheral units and the software running on these units thanks to a simulator structure that will be put in front of a product to be tested.

[0009] Brief Description of the Invention

[0010] The object of this invention is to implement a system that enables the testing of hardware cores and embedded software designed for digital receiver and technical generator units, which forms the basis of electronic warfare systems, in a more realtime, comprehensive, automatic, fast manner and with repeatable test steps independently of RF peripheral units and the software running on these units thanks to a simulator structure to that will be put in front of the product to be tested.

[0011] The system defined in the first claim and any claims dependent to this claim comprises the following in order to achieve the object of the invention, provides the testing of hardware cores and embedded software designed for digital receiver and technical generator units, which forms the basis of electronic warfare systems in almost real-time, in a way that is more comprehensive, faster, automatic and with repeatable test steps compared to universal verification tests independently from the RF peripheral units and the software running on these units thanks to a simulator structure that will be put in front of a product to be tested comprises the following; a unit to be tested which comprises at least one hardware core in the structure of a field programmable gate array, which comprises multiple components which are configured to perform at least one purpose of running embedded software in the hardware core, signal receiving or technical signal generating in electronic warfare systems, a simulator card configured to emulate any one of the combinations of RF peripheral units’ work structure which will work with the unit to be tested and at least one pre-circuit, switching / filtering units, at least one post-circuit, at least one transmitter layer in the RF peripheral units, a computer-based scenario simulator to run a testing software on it, create at least one test scenario within the testing software, manage the test scenarios and to report the results of the test scenarios, a central processor card configured to establish communication between testing software running on a computer-based scenario simulator and the unit to be tested through a fast data bus, to run the central processing based control simulator embedded software which executes the messaging protocol and messaging scenario which contains a predetermined messaging protocol between the testing software and the unit to be tested, to execute the messaging protocol and messaging scenario between the testing software and the unit to be tested through the fast data bus, motherboard to provide the necessary power, communication, control interfaces between the unit to be tested and the simulator card, the computer-based scenario simulator and the central processor card.

[0012] Detailed Description of the Invention

[0013] The system implemented to achieve the object of this invention is shown in the attached figures, and from these figures,

[0014] Figure 1 is the block diagram of the system of the invention.

[0015] Components shown in the figures are individually numbered, and the corresponding numbers are provided below.

[0016] 1. System

[0017] 2. Unit to be tested

[0018] 3. Simulator card

[0019] 4. Computer based scenario simulator

[0020] 5. Central processor card

[0021] 6. Motherboard

[0022] The system (1) of the invention which provides the testing of hardware cores and embedded software designed for digital receiver and technical generator units, which forms the basis of electronic warfare systems in almost real-time, in a way that is more comprehensive, faster, automatic and with repeatable test steps compared to universal verification tests independently from the RF peripheral units and the software running on these units thanks to a simulator structure that will be put in front of a product to be tested comprises the following; a unit to be tested (2) which comprises at least one hardware core in the structure of a field programmable gate array, which comprises multiple components which are configured to perform at least one purpose of running embedded software in the hardware core, signal receiving or technical signal generating in electronic warfare systems, a simulator card (3) configured to emulate any one of the combinations of RF peripheral units’ work structure which will work with the unit to be tested (2) and at least one pre-circuit, switching / filtering units, at least one post-circuit, at least one transmitter layer in the RF peripheral units, a computer-based scenario simulator (4) to run a testing software on it, create at least one test scenario within the testing software, manage the test scenarios and to report the results of the test scenarios, a central processor card (5) configured to establish communication between testing software running on a computer-based scenario simulator and the unit to be tested through a fast data bus, to run the central processing based control simulator embedded software which executes the messaging protocol and messaging scenario which contains a predetermined messaging protocol between the testing software and the unit to be tested (2), to execute the messaging protocol and messaging scenario between the testing software and the unit to be tested (2) through the fast data bus, motherboard (6) to provide the necessary power, communication, control interfaces between the unit to be tested (2) and the simulator card (3), the computer-based scenario simulator (4) and the central processor card (5).

[0023] Since the responses of the unit to be tested (2) in different working scenarios can be reported in real time thanks to fast data bus communication techniques, it is ensured that the test scenarios are paused, edited, restarted and reports are collected instantly.

[0024] In an embodiment of the invention, the computer based scenario simulator (4) is configured to run testing software configured to write, edit, execute and report scenarios that test the components of the unit to be tested (2) on itself and / or in accordance with signals from the simulator card (3), an in-device test case in which messages indicating targeted fault conditions are generated in the testing software that enable the components of the unit to be tested (2) to be checked, and the responses of the unit to be tested (2) to the messages from the simulator card (3) and the test case are compared with the predetermined responses and reported, by a signal sent from the unit to be tested (2) to the simulator card (3), the unit to be tested (2) generates a predetermined pulse identification word from among the pulse identification words specifying the attributes that enable the identification of a communication captured by the RF peripheral units of the unit to be tested (2), and the unit to be tested (2) correctly generates the targeted pulse identification word under different conditions a receiver pulse identification word generation test case in which the responses are compared and reported against the targeted pulse identification word and a technical generator jamming and deception test case in which the responses of the unit to be tested (2) are compared and reported against the targeted pulse identification word in scenarios where jamming or deception is applied during pulse identification word generation, is structured to manage test cases and report the results of test scenarios.

[0025] Thanks to the system (1) of the invention, the units to be tested (2) which are digital receiver and technical generator units, which forms the basis of electronic warfare systems, without being connected to the RF peripheral units used with the units in question, while eliminating the necessity of setup, maintenance and operation of real RF test mechanisms, the real-time processing of RF peripheral unit responses that are formed thanks to the simulator card (3) in a manner that is real-time, comprehensive, automatic, fast and with repeatable test steps is provided.

Claims

CLAIMS1. System (1) of invention which provides the testing of hardware cores and embedded software designed for digital receiver and technical generator units, which forms the basis of electronic warfare systems in almost realtime, in a way that is more comprehensive, faster, automatic and with repeatable test steps compared to universal verification tests independently from the RF peripheral units and the software running on these units thanks to a simulator structure that will be put in front of a product to be tested, comprising a unit to be tested (2) which comprises at least one hardware core in the structure of a field programmable gate array, which comprises multiple components which are configured to perform at least one purpose of running embedded software in the hardware core, signal receiving or technical signal generating in electronic warfare systems, a simulator card (3) configured to emulate any one of the combinations of RF peripheral units’ work structure which will work with the unit to be tested (2) and at least one pre-circuit, switching / filtering units, at least one post-circuit, at least one transmitter layer in the RF peripheral units, a computer-based scenario simulator (4) to run a testing software on it, create at least one test scenario within the testing software, manage the test scenarios and to report the results of the test scenarios, motherboard (6), characterized by a central processor card (5) configured to establish communication between testing software running on a computer-based scenario simulator and the unit to be tested through a fast data bus, to run the central processing based control simulator embedded software which executes the messaging protocol and messaging scenario which contains a predetermined messaging protocol between the testing software and the unit to be tested (2), to executethe messaging protocol and messaging scenario between the testing software and the unit to be tested (2) through the fast data bus, the motherboard (6) is configured to provide the necessary power, communication, control interfaces between the unit to be tested (2) and the simulator card (3), the computer-based scenario simulator (4) and the central processor card (5).

2. The system (1) according to claim 1, characterized by the computer based scenario simulator (4) which is configured to run testing software configured to write, edit, execute and report scenarios that test the components of the unit to be tested (2) on itself and / or in accordance with signals from the simulator card (3), an in-device test case in which messages indicating targeted fault conditions are generated in the testing software that enable the components of the unit to be tested (2) to be checked, and the responses of the unit to be tested (2) to the messages from the simulator card (3) and the test case are compared with the predetermined responses and reported, by a signal sent from the unit to be tested (2) to the simulator card (3), the unit to be tested (2) generates a predetermined pulse identification word from among the pulse identification words specifying the attributes that enable the identification of a communication captured by the RF peripheral units of the unit to be tested (2), and the unit to be tested (2) correctly generates the targeted pulse identification word under different conditions a receiver pulse identification word generation test case in which the responses are compared and reported against the targeted pulse identification word and a technical generator jamming and deception test case in which the responses of the unit to be tested (2) are compared and reported against the targeted pulse identification word in scenarios where jamming or deception is applied during pulse identification word generation, is structured to manage test cases and report the results of test scenarios.

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